1 /* i810_dma.c -- DMA support for the i810 -*- linux-c -*-
2 * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
4 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25 * DEALINGS IN THE SOFTWARE.
27 * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
28 * Jeff Hartmann <jhartmann@valinux.com>
29 * Keith Whitwell <keith@tungstengraphics.com>
37 #include <linux/interrupt.h> /* For task queue support */
38 #include <linux/delay.h>
39 #include <linux/slab.h>
40 #include <linux/pagemap.h>
42 #define I810_BUF_FREE 2
43 #define I810_BUF_CLIENT 1
44 #define I810_BUF_HARDWARE 0
46 #define I810_BUF_UNMAPPED 0
47 #define I810_BUF_MAPPED 1
49 static struct drm_buf *i810_freelist_get(struct drm_device * dev)
51 struct drm_device_dma *dma = dev->dma;
55 /* Linear search might not be the best solution */
57 for (i = 0; i < dma->buf_count; i++) {
58 struct drm_buf *buf = dma->buflist[i];
59 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
60 /* In use is already a pointer */
61 used = cmpxchg(buf_priv->in_use, I810_BUF_FREE,
63 if (used == I810_BUF_FREE)
69 /* This should only be called if the buffer is not sent to the hardware
70 * yet, the hardware updates in use for us once its on the ring buffer.
73 static int i810_freelist_put(struct drm_device *dev, struct drm_buf *buf)
75 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
78 /* In use is already a pointer */
79 used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_FREE);
80 if (used != I810_BUF_CLIENT) {
81 DRM_ERROR("Freeing buffer thats not in use : %d\n", buf->idx);
88 static int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma)
90 struct drm_file *priv = filp->private_data;
91 struct drm_device *dev;
92 drm_i810_private_t *dev_priv;
94 drm_i810_buf_priv_t *buf_priv;
97 dev = priv->minor->dev;
98 dev_priv = dev->dev_private;
99 buf = dev_priv->mmap_buffer;
100 buf_priv = buf->dev_private;
102 vma->vm_flags |= (VM_IO | VM_DONTCOPY);
105 buf_priv->currently_mapped = I810_BUF_MAPPED;
108 if (io_remap_pfn_range(vma, vma->vm_start,
110 vma->vm_end - vma->vm_start, vma->vm_page_prot))
115 static const struct file_operations i810_buffer_fops = {
117 .release = drm_release,
118 .unlocked_ioctl = drm_ioctl,
119 .mmap = i810_mmap_buffers,
120 .fasync = drm_fasync,
123 static int i810_map_buffer(struct drm_buf *buf, struct drm_file *file_priv)
125 struct drm_device *dev = file_priv->minor->dev;
126 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
127 drm_i810_private_t *dev_priv = dev->dev_private;
128 const struct file_operations *old_fops;
131 if (buf_priv->currently_mapped == I810_BUF_MAPPED)
134 down_write(¤t->mm->mmap_sem);
135 old_fops = file_priv->filp->f_op;
136 file_priv->filp->f_op = &i810_buffer_fops;
137 dev_priv->mmap_buffer = buf;
138 buf_priv->virtual = (void *)do_mmap(file_priv->filp, 0, buf->total,
139 PROT_READ | PROT_WRITE,
140 MAP_SHARED, buf->bus_address);
141 dev_priv->mmap_buffer = NULL;
142 file_priv->filp->f_op = old_fops;
143 if (IS_ERR(buf_priv->virtual)) {
145 DRM_ERROR("mmap error\n");
146 retcode = PTR_ERR(buf_priv->virtual);
147 buf_priv->virtual = NULL;
149 up_write(¤t->mm->mmap_sem);
154 static int i810_unmap_buffer(struct drm_buf *buf)
156 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
159 if (buf_priv->currently_mapped != I810_BUF_MAPPED)
162 down_write(¤t->mm->mmap_sem);
163 retcode = do_munmap(current->mm,
164 (unsigned long)buf_priv->virtual,
165 (size_t) buf->total);
166 up_write(¤t->mm->mmap_sem);
168 buf_priv->currently_mapped = I810_BUF_UNMAPPED;
169 buf_priv->virtual = NULL;
174 static int i810_dma_get_buffer(struct drm_device *dev, drm_i810_dma_t *d,
175 struct drm_file *file_priv)
178 drm_i810_buf_priv_t *buf_priv;
181 buf = i810_freelist_get(dev);
184 DRM_DEBUG("retcode=%d\n", retcode);
188 retcode = i810_map_buffer(buf, file_priv);
190 i810_freelist_put(dev, buf);
191 DRM_ERROR("mapbuf failed, retcode %d\n", retcode);
194 buf->file_priv = file_priv;
195 buf_priv = buf->dev_private;
197 d->request_idx = buf->idx;
198 d->request_size = buf->total;
199 d->virtual = buf_priv->virtual;
204 static int i810_dma_cleanup(struct drm_device *dev)
206 struct drm_device_dma *dma = dev->dma;
208 /* Make sure interrupts are disabled here because the uninstall ioctl
209 * may not have been called from userspace and after dev_private
210 * is freed, it's too late.
212 if (drm_core_check_feature(dev, DRIVER_HAVE_IRQ) && dev->irq_enabled)
213 drm_irq_uninstall(dev);
215 if (dev->dev_private) {
217 drm_i810_private_t *dev_priv =
218 (drm_i810_private_t *) dev->dev_private;
220 if (dev_priv->ring.virtual_start)
221 drm_core_ioremapfree(&dev_priv->ring.map, dev);
222 if (dev_priv->hw_status_page) {
223 pci_free_consistent(dev->pdev, PAGE_SIZE,
224 dev_priv->hw_status_page,
225 dev_priv->dma_status_page);
226 /* Need to rewrite hardware status page */
227 I810_WRITE(0x02080, 0x1ffff000);
229 kfree(dev->dev_private);
230 dev->dev_private = NULL;
232 for (i = 0; i < dma->buf_count; i++) {
233 struct drm_buf *buf = dma->buflist[i];
234 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
236 if (buf_priv->kernel_virtual && buf->total)
237 drm_core_ioremapfree(&buf_priv->map, dev);
243 static int i810_wait_ring(struct drm_device *dev, int n)
245 drm_i810_private_t *dev_priv = dev->dev_private;
246 drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
249 unsigned int last_head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
251 end = jiffies + (HZ * 3);
252 while (ring->space < n) {
253 ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
254 ring->space = ring->head - (ring->tail + 8);
256 ring->space += ring->Size;
258 if (ring->head != last_head) {
259 end = jiffies + (HZ * 3);
260 last_head = ring->head;
264 if (time_before(end, jiffies)) {
265 DRM_ERROR("space: %d wanted %d\n", ring->space, n);
266 DRM_ERROR("lockup\n");
276 static void i810_kernel_lost_context(struct drm_device *dev)
278 drm_i810_private_t *dev_priv = dev->dev_private;
279 drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
281 ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
282 ring->tail = I810_READ(LP_RING + RING_TAIL);
283 ring->space = ring->head - (ring->tail + 8);
285 ring->space += ring->Size;
288 static int i810_freelist_init(struct drm_device *dev, drm_i810_private_t *dev_priv)
290 struct drm_device_dma *dma = dev->dma;
292 u32 *hw_status = (u32 *) (dev_priv->hw_status_page + my_idx);
295 if (dma->buf_count > 1019) {
296 /* Not enough space in the status page for the freelist */
300 for (i = 0; i < dma->buf_count; i++) {
301 struct drm_buf *buf = dma->buflist[i];
302 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
304 buf_priv->in_use = hw_status++;
305 buf_priv->my_use_idx = my_idx;
308 *buf_priv->in_use = I810_BUF_FREE;
310 buf_priv->map.offset = buf->bus_address;
311 buf_priv->map.size = buf->total;
312 buf_priv->map.type = _DRM_AGP;
313 buf_priv->map.flags = 0;
314 buf_priv->map.mtrr = 0;
316 drm_core_ioremap(&buf_priv->map, dev);
317 buf_priv->kernel_virtual = buf_priv->map.handle;
323 static int i810_dma_initialize(struct drm_device *dev,
324 drm_i810_private_t *dev_priv,
325 drm_i810_init_t *init)
327 struct drm_map_list *r_list;
328 memset(dev_priv, 0, sizeof(drm_i810_private_t));
330 list_for_each_entry(r_list, &dev->maplist, head) {
332 r_list->map->type == _DRM_SHM &&
333 r_list->map->flags & _DRM_CONTAINS_LOCK) {
334 dev_priv->sarea_map = r_list->map;
338 if (!dev_priv->sarea_map) {
339 dev->dev_private = (void *)dev_priv;
340 i810_dma_cleanup(dev);
341 DRM_ERROR("can not find sarea!\n");
344 dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset);
345 if (!dev_priv->mmio_map) {
346 dev->dev_private = (void *)dev_priv;
347 i810_dma_cleanup(dev);
348 DRM_ERROR("can not find mmio map!\n");
351 dev->agp_buffer_token = init->buffers_offset;
352 dev->agp_buffer_map = drm_core_findmap(dev, init->buffers_offset);
353 if (!dev->agp_buffer_map) {
354 dev->dev_private = (void *)dev_priv;
355 i810_dma_cleanup(dev);
356 DRM_ERROR("can not find dma buffer map!\n");
360 dev_priv->sarea_priv = (drm_i810_sarea_t *)
361 ((u8 *) dev_priv->sarea_map->handle + init->sarea_priv_offset);
363 dev_priv->ring.Start = init->ring_start;
364 dev_priv->ring.End = init->ring_end;
365 dev_priv->ring.Size = init->ring_size;
367 dev_priv->ring.map.offset = dev->agp->base + init->ring_start;
368 dev_priv->ring.map.size = init->ring_size;
369 dev_priv->ring.map.type = _DRM_AGP;
370 dev_priv->ring.map.flags = 0;
371 dev_priv->ring.map.mtrr = 0;
373 drm_core_ioremap(&dev_priv->ring.map, dev);
375 if (dev_priv->ring.map.handle == NULL) {
376 dev->dev_private = (void *)dev_priv;
377 i810_dma_cleanup(dev);
378 DRM_ERROR("can not ioremap virtual address for"
383 dev_priv->ring.virtual_start = dev_priv->ring.map.handle;
385 dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
387 dev_priv->w = init->w;
388 dev_priv->h = init->h;
389 dev_priv->pitch = init->pitch;
390 dev_priv->back_offset = init->back_offset;
391 dev_priv->depth_offset = init->depth_offset;
392 dev_priv->front_offset = init->front_offset;
394 dev_priv->overlay_offset = init->overlay_offset;
395 dev_priv->overlay_physical = init->overlay_physical;
397 dev_priv->front_di1 = init->front_offset | init->pitch_bits;
398 dev_priv->back_di1 = init->back_offset | init->pitch_bits;
399 dev_priv->zi1 = init->depth_offset | init->pitch_bits;
401 /* Program Hardware Status Page */
402 dev_priv->hw_status_page =
403 pci_alloc_consistent(dev->pdev, PAGE_SIZE,
404 &dev_priv->dma_status_page);
405 if (!dev_priv->hw_status_page) {
406 dev->dev_private = (void *)dev_priv;
407 i810_dma_cleanup(dev);
408 DRM_ERROR("Can not allocate hardware status page\n");
411 memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
412 DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
414 I810_WRITE(0x02080, dev_priv->dma_status_page);
415 DRM_DEBUG("Enabled hardware status page\n");
417 /* Now we need to init our freelist */
418 if (i810_freelist_init(dev, dev_priv) != 0) {
419 dev->dev_private = (void *)dev_priv;
420 i810_dma_cleanup(dev);
421 DRM_ERROR("Not enough space in the status page for"
425 dev->dev_private = (void *)dev_priv;
430 static int i810_dma_init(struct drm_device *dev, void *data,
431 struct drm_file *file_priv)
433 drm_i810_private_t *dev_priv;
434 drm_i810_init_t *init = data;
437 switch (init->func) {
438 case I810_INIT_DMA_1_4:
439 DRM_INFO("Using v1.4 init.\n");
440 dev_priv = kmalloc(sizeof(drm_i810_private_t), GFP_KERNEL);
441 if (dev_priv == NULL)
443 retcode = i810_dma_initialize(dev, dev_priv, init);
446 case I810_CLEANUP_DMA:
447 DRM_INFO("DMA Cleanup\n");
448 retcode = i810_dma_cleanup(dev);
457 /* Most efficient way to verify state for the i810 is as it is
458 * emitted. Non-conformant state is silently dropped.
460 * Use 'volatile' & local var tmp to force the emitted values to be
461 * identical to the verified ones.
463 static void i810EmitContextVerified(struct drm_device *dev,
464 volatile unsigned int *code)
466 drm_i810_private_t *dev_priv = dev->dev_private;
471 BEGIN_LP_RING(I810_CTX_SETUP_SIZE);
473 OUT_RING(GFX_OP_COLOR_FACTOR);
474 OUT_RING(code[I810_CTXREG_CF1]);
476 OUT_RING(GFX_OP_STIPPLE);
477 OUT_RING(code[I810_CTXREG_ST1]);
479 for (i = 4; i < I810_CTX_SETUP_SIZE; i++) {
482 if ((tmp & (7 << 29)) == (3 << 29) &&
483 (tmp & (0x1f << 24)) < (0x1d << 24)) {
487 printk("constext state dropped!!!\n");
496 static void i810EmitTexVerified(struct drm_device *dev, volatile unsigned int *code)
498 drm_i810_private_t *dev_priv = dev->dev_private;
503 BEGIN_LP_RING(I810_TEX_SETUP_SIZE);
505 OUT_RING(GFX_OP_MAP_INFO);
506 OUT_RING(code[I810_TEXREG_MI1]);
507 OUT_RING(code[I810_TEXREG_MI2]);
508 OUT_RING(code[I810_TEXREG_MI3]);
510 for (i = 4; i < I810_TEX_SETUP_SIZE; i++) {
513 if ((tmp & (7 << 29)) == (3 << 29) &&
514 (tmp & (0x1f << 24)) < (0x1d << 24)) {
518 printk("texture state dropped!!!\n");
527 /* Need to do some additional checking when setting the dest buffer.
529 static void i810EmitDestVerified(struct drm_device *dev,
530 volatile unsigned int *code)
532 drm_i810_private_t *dev_priv = dev->dev_private;
536 BEGIN_LP_RING(I810_DEST_SETUP_SIZE + 2);
538 tmp = code[I810_DESTREG_DI1];
539 if (tmp == dev_priv->front_di1 || tmp == dev_priv->back_di1) {
540 OUT_RING(CMD_OP_DESTBUFFER_INFO);
543 DRM_DEBUG("bad di1 %x (allow %x or %x)\n",
544 tmp, dev_priv->front_di1, dev_priv->back_di1);
548 OUT_RING(CMD_OP_Z_BUFFER_INFO);
549 OUT_RING(dev_priv->zi1);
551 OUT_RING(GFX_OP_DESTBUFFER_VARS);
552 OUT_RING(code[I810_DESTREG_DV1]);
554 OUT_RING(GFX_OP_DRAWRECT_INFO);
555 OUT_RING(code[I810_DESTREG_DR1]);
556 OUT_RING(code[I810_DESTREG_DR2]);
557 OUT_RING(code[I810_DESTREG_DR3]);
558 OUT_RING(code[I810_DESTREG_DR4]);
564 static void i810EmitState(struct drm_device *dev)
566 drm_i810_private_t *dev_priv = dev->dev_private;
567 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
568 unsigned int dirty = sarea_priv->dirty;
570 DRM_DEBUG("%x\n", dirty);
572 if (dirty & I810_UPLOAD_BUFFERS) {
573 i810EmitDestVerified(dev, sarea_priv->BufferState);
574 sarea_priv->dirty &= ~I810_UPLOAD_BUFFERS;
577 if (dirty & I810_UPLOAD_CTX) {
578 i810EmitContextVerified(dev, sarea_priv->ContextState);
579 sarea_priv->dirty &= ~I810_UPLOAD_CTX;
582 if (dirty & I810_UPLOAD_TEX0) {
583 i810EmitTexVerified(dev, sarea_priv->TexState[0]);
584 sarea_priv->dirty &= ~I810_UPLOAD_TEX0;
587 if (dirty & I810_UPLOAD_TEX1) {
588 i810EmitTexVerified(dev, sarea_priv->TexState[1]);
589 sarea_priv->dirty &= ~I810_UPLOAD_TEX1;
595 static void i810_dma_dispatch_clear(struct drm_device *dev, int flags,
596 unsigned int clear_color,
597 unsigned int clear_zval)
599 drm_i810_private_t *dev_priv = dev->dev_private;
600 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
601 int nbox = sarea_priv->nbox;
602 struct drm_clip_rect *pbox = sarea_priv->boxes;
603 int pitch = dev_priv->pitch;
608 if (dev_priv->current_page == 1) {
609 unsigned int tmp = flags;
611 flags &= ~(I810_FRONT | I810_BACK);
612 if (tmp & I810_FRONT)
618 i810_kernel_lost_context(dev);
620 if (nbox > I810_NR_SAREA_CLIPRECTS)
621 nbox = I810_NR_SAREA_CLIPRECTS;
623 for (i = 0; i < nbox; i++, pbox++) {
624 unsigned int x = pbox->x1;
625 unsigned int y = pbox->y1;
626 unsigned int width = (pbox->x2 - x) * cpp;
627 unsigned int height = pbox->y2 - y;
628 unsigned int start = y * pitch + x * cpp;
630 if (pbox->x1 > pbox->x2 ||
631 pbox->y1 > pbox->y2 ||
632 pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
635 if (flags & I810_FRONT) {
637 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
638 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
639 OUT_RING((height << 16) | width);
641 OUT_RING(clear_color);
646 if (flags & I810_BACK) {
648 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
649 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
650 OUT_RING((height << 16) | width);
651 OUT_RING(dev_priv->back_offset + start);
652 OUT_RING(clear_color);
657 if (flags & I810_DEPTH) {
659 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
660 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
661 OUT_RING((height << 16) | width);
662 OUT_RING(dev_priv->depth_offset + start);
663 OUT_RING(clear_zval);
670 static void i810_dma_dispatch_swap(struct drm_device *dev)
672 drm_i810_private_t *dev_priv = dev->dev_private;
673 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
674 int nbox = sarea_priv->nbox;
675 struct drm_clip_rect *pbox = sarea_priv->boxes;
676 int pitch = dev_priv->pitch;
681 DRM_DEBUG("swapbuffers\n");
683 i810_kernel_lost_context(dev);
685 if (nbox > I810_NR_SAREA_CLIPRECTS)
686 nbox = I810_NR_SAREA_CLIPRECTS;
688 for (i = 0; i < nbox; i++, pbox++) {
689 unsigned int w = pbox->x2 - pbox->x1;
690 unsigned int h = pbox->y2 - pbox->y1;
691 unsigned int dst = pbox->x1 * cpp + pbox->y1 * pitch;
692 unsigned int start = dst;
694 if (pbox->x1 > pbox->x2 ||
695 pbox->y1 > pbox->y2 ||
696 pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
700 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_SRC_COPY_BLT | 0x4);
701 OUT_RING(pitch | (0xCC << 16));
702 OUT_RING((h << 16) | (w * cpp));
703 if (dev_priv->current_page == 0)
704 OUT_RING(dev_priv->front_offset + start);
706 OUT_RING(dev_priv->back_offset + start);
708 if (dev_priv->current_page == 0)
709 OUT_RING(dev_priv->back_offset + start);
711 OUT_RING(dev_priv->front_offset + start);
716 static void i810_dma_dispatch_vertex(struct drm_device *dev,
717 struct drm_buf *buf, int discard, int used)
719 drm_i810_private_t *dev_priv = dev->dev_private;
720 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
721 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
722 struct drm_clip_rect *box = sarea_priv->boxes;
723 int nbox = sarea_priv->nbox;
724 unsigned long address = (unsigned long)buf->bus_address;
725 unsigned long start = address - dev->agp->base;
729 i810_kernel_lost_context(dev);
731 if (nbox > I810_NR_SAREA_CLIPRECTS)
732 nbox = I810_NR_SAREA_CLIPRECTS;
737 if (sarea_priv->dirty)
740 if (buf_priv->currently_mapped == I810_BUF_MAPPED) {
741 unsigned int prim = (sarea_priv->vertex_prim & PR_MASK);
743 *(u32 *) buf_priv->kernel_virtual =
744 ((GFX_OP_PRIMITIVE | prim | ((used / 4) - 2)));
747 *(u32 *) ((char *) buf_priv->kernel_virtual + used) = 0;
751 i810_unmap_buffer(buf);
758 OUT_RING(GFX_OP_SCISSOR | SC_UPDATE_SCISSOR |
760 OUT_RING(GFX_OP_SCISSOR_INFO);
761 OUT_RING(box[i].x1 | (box[i].y1 << 16));
762 OUT_RING((box[i].x2 -
763 1) | ((box[i].y2 - 1) << 16));
768 OUT_RING(CMD_OP_BATCH_BUFFER);
769 OUT_RING(start | BB1_PROTECTED);
770 OUT_RING(start + used - 4);
774 } while (++i < nbox);
780 (void)cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
784 OUT_RING(CMD_STORE_DWORD_IDX);
786 OUT_RING(dev_priv->counter);
787 OUT_RING(CMD_STORE_DWORD_IDX);
788 OUT_RING(buf_priv->my_use_idx);
789 OUT_RING(I810_BUF_FREE);
790 OUT_RING(CMD_REPORT_HEAD);
796 static void i810_dma_dispatch_flip(struct drm_device *dev)
798 drm_i810_private_t *dev_priv = dev->dev_private;
799 int pitch = dev_priv->pitch;
802 DRM_DEBUG("page=%d pfCurrentPage=%d\n",
803 dev_priv->current_page,
804 dev_priv->sarea_priv->pf_current_page);
806 i810_kernel_lost_context(dev);
809 OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
813 BEGIN_LP_RING(I810_DEST_SETUP_SIZE + 2);
814 /* On i815 at least ASYNC is buggy */
815 /* pitch<<5 is from 11.2.8 p158,
816 its the pitch / 8 then left shifted 8,
817 so (pitch >> 3) << 8 */
818 OUT_RING(CMD_OP_FRONTBUFFER_INFO | (pitch << 5) /*| ASYNC_FLIP */ );
819 if (dev_priv->current_page == 0) {
820 OUT_RING(dev_priv->back_offset);
821 dev_priv->current_page = 1;
823 OUT_RING(dev_priv->front_offset);
824 dev_priv->current_page = 0;
830 OUT_RING(CMD_OP_WAIT_FOR_EVENT | WAIT_FOR_PLANE_A_FLIP);
834 /* Increment the frame counter. The client-side 3D driver must
835 * throttle the framerate by waiting for this value before
836 * performing the swapbuffer ioctl.
838 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
842 static void i810_dma_quiescent(struct drm_device *dev)
844 drm_i810_private_t *dev_priv = dev->dev_private;
847 i810_kernel_lost_context(dev);
850 OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
851 OUT_RING(CMD_REPORT_HEAD);
856 i810_wait_ring(dev, dev_priv->ring.Size - 8);
859 static int i810_flush_queue(struct drm_device *dev)
861 drm_i810_private_t *dev_priv = dev->dev_private;
862 struct drm_device_dma *dma = dev->dma;
866 i810_kernel_lost_context(dev);
869 OUT_RING(CMD_REPORT_HEAD);
873 i810_wait_ring(dev, dev_priv->ring.Size - 8);
875 for (i = 0; i < dma->buf_count; i++) {
876 struct drm_buf *buf = dma->buflist[i];
877 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
879 int used = cmpxchg(buf_priv->in_use, I810_BUF_HARDWARE,
882 if (used == I810_BUF_HARDWARE)
883 DRM_DEBUG("reclaimed from HARDWARE\n");
884 if (used == I810_BUF_CLIENT)
885 DRM_DEBUG("still on client\n");
891 /* Must be called with the lock held */
892 static void i810_reclaim_buffers(struct drm_device *dev,
893 struct drm_file *file_priv)
895 struct drm_device_dma *dma = dev->dma;
900 if (!dev->dev_private)
905 i810_flush_queue(dev);
907 for (i = 0; i < dma->buf_count; i++) {
908 struct drm_buf *buf = dma->buflist[i];
909 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
911 if (buf->file_priv == file_priv && buf_priv) {
912 int used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
915 if (used == I810_BUF_CLIENT)
916 DRM_DEBUG("reclaimed from client\n");
917 if (buf_priv->currently_mapped == I810_BUF_MAPPED)
918 buf_priv->currently_mapped = I810_BUF_UNMAPPED;
923 static int i810_flush_ioctl(struct drm_device *dev, void *data,
924 struct drm_file *file_priv)
926 LOCK_TEST_WITH_RETURN(dev, file_priv);
928 i810_flush_queue(dev);
932 static int i810_dma_vertex(struct drm_device *dev, void *data,
933 struct drm_file *file_priv)
935 struct drm_device_dma *dma = dev->dma;
936 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
937 u32 *hw_status = dev_priv->hw_status_page;
938 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
939 dev_priv->sarea_priv;
940 drm_i810_vertex_t *vertex = data;
942 LOCK_TEST_WITH_RETURN(dev, file_priv);
944 DRM_DEBUG("idx %d used %d discard %d\n",
945 vertex->idx, vertex->used, vertex->discard);
947 if (vertex->idx < 0 || vertex->idx > dma->buf_count)
950 i810_dma_dispatch_vertex(dev,
951 dma->buflist[vertex->idx],
952 vertex->discard, vertex->used);
954 atomic_add(vertex->used, &dev->counts[_DRM_STAT_SECONDARY]);
955 atomic_inc(&dev->counts[_DRM_STAT_DMA]);
956 sarea_priv->last_enqueue = dev_priv->counter - 1;
957 sarea_priv->last_dispatch = (int)hw_status[5];
962 static int i810_clear_bufs(struct drm_device *dev, void *data,
963 struct drm_file *file_priv)
965 drm_i810_clear_t *clear = data;
967 LOCK_TEST_WITH_RETURN(dev, file_priv);
969 /* GH: Someone's doing nasty things... */
970 if (!dev->dev_private)
973 i810_dma_dispatch_clear(dev, clear->flags,
974 clear->clear_color, clear->clear_depth);
978 static int i810_swap_bufs(struct drm_device *dev, void *data,
979 struct drm_file *file_priv)
983 LOCK_TEST_WITH_RETURN(dev, file_priv);
985 i810_dma_dispatch_swap(dev);
989 static int i810_getage(struct drm_device *dev, void *data,
990 struct drm_file *file_priv)
992 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
993 u32 *hw_status = dev_priv->hw_status_page;
994 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
995 dev_priv->sarea_priv;
997 sarea_priv->last_dispatch = (int)hw_status[5];
1001 static int i810_getbuf(struct drm_device *dev, void *data,
1002 struct drm_file *file_priv)
1005 drm_i810_dma_t *d = data;
1006 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1007 u32 *hw_status = dev_priv->hw_status_page;
1008 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
1009 dev_priv->sarea_priv;
1011 LOCK_TEST_WITH_RETURN(dev, file_priv);
1015 retcode = i810_dma_get_buffer(dev, d, file_priv);
1017 DRM_DEBUG("i810_dma: %d returning %d, granted = %d\n",
1018 task_pid_nr(current), retcode, d->granted);
1020 sarea_priv->last_dispatch = (int)hw_status[5];
1025 static int i810_copybuf(struct drm_device *dev, void *data,
1026 struct drm_file *file_priv)
1028 /* Never copy - 2.4.x doesn't need it */
1032 static int i810_docopy(struct drm_device *dev, void *data,
1033 struct drm_file *file_priv)
1035 /* Never copy - 2.4.x doesn't need it */
1039 static void i810_dma_dispatch_mc(struct drm_device *dev, struct drm_buf *buf, int used,
1040 unsigned int last_render)
1042 drm_i810_private_t *dev_priv = dev->dev_private;
1043 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
1044 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
1045 unsigned long address = (unsigned long)buf->bus_address;
1046 unsigned long start = address - dev->agp->base;
1050 i810_kernel_lost_context(dev);
1052 u = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_HARDWARE);
1053 if (u != I810_BUF_CLIENT)
1054 DRM_DEBUG("MC found buffer that isn't mine!\n");
1056 if (used > 4 * 1024)
1059 sarea_priv->dirty = 0x7f;
1061 DRM_DEBUG("addr 0x%lx, used 0x%x\n", address, used);
1063 dev_priv->counter++;
1064 DRM_DEBUG("dispatch counter : %ld\n", dev_priv->counter);
1065 DRM_DEBUG("start : %lx\n", start);
1066 DRM_DEBUG("used : %d\n", used);
1067 DRM_DEBUG("start + used - 4 : %ld\n", start + used - 4);
1069 if (buf_priv->currently_mapped == I810_BUF_MAPPED) {
1071 *(u32 *) ((char *) buf_priv->virtual + used) = 0;
1075 i810_unmap_buffer(buf);
1078 OUT_RING(CMD_OP_BATCH_BUFFER);
1079 OUT_RING(start | BB1_PROTECTED);
1080 OUT_RING(start + used - 4);
1085 OUT_RING(CMD_STORE_DWORD_IDX);
1086 OUT_RING(buf_priv->my_use_idx);
1087 OUT_RING(I810_BUF_FREE);
1090 OUT_RING(CMD_STORE_DWORD_IDX);
1092 OUT_RING(last_render);
1097 static int i810_dma_mc(struct drm_device *dev, void *data,
1098 struct drm_file *file_priv)
1100 struct drm_device_dma *dma = dev->dma;
1101 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1102 u32 *hw_status = dev_priv->hw_status_page;
1103 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
1104 dev_priv->sarea_priv;
1105 drm_i810_mc_t *mc = data;
1107 LOCK_TEST_WITH_RETURN(dev, file_priv);
1109 if (mc->idx >= dma->buf_count || mc->idx < 0)
1112 i810_dma_dispatch_mc(dev, dma->buflist[mc->idx], mc->used,
1115 atomic_add(mc->used, &dev->counts[_DRM_STAT_SECONDARY]);
1116 atomic_inc(&dev->counts[_DRM_STAT_DMA]);
1117 sarea_priv->last_enqueue = dev_priv->counter - 1;
1118 sarea_priv->last_dispatch = (int)hw_status[5];
1123 static int i810_rstatus(struct drm_device *dev, void *data,
1124 struct drm_file *file_priv)
1126 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1128 return (int)(((u32 *) (dev_priv->hw_status_page))[4]);
1131 static int i810_ov0_info(struct drm_device *dev, void *data,
1132 struct drm_file *file_priv)
1134 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1135 drm_i810_overlay_t *ov = data;
1137 ov->offset = dev_priv->overlay_offset;
1138 ov->physical = dev_priv->overlay_physical;
1143 static int i810_fstatus(struct drm_device *dev, void *data,
1144 struct drm_file *file_priv)
1146 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1148 LOCK_TEST_WITH_RETURN(dev, file_priv);
1149 return I810_READ(0x30008);
1152 static int i810_ov0_flip(struct drm_device *dev, void *data,
1153 struct drm_file *file_priv)
1155 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1157 LOCK_TEST_WITH_RETURN(dev, file_priv);
1159 /* Tell the overlay to update */
1160 I810_WRITE(0x30000, dev_priv->overlay_physical | 0x80000000);
1165 /* Not sure why this isn't set all the time:
1167 static void i810_do_init_pageflip(struct drm_device *dev)
1169 drm_i810_private_t *dev_priv = dev->dev_private;
1172 dev_priv->page_flipping = 1;
1173 dev_priv->current_page = 0;
1174 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
1177 static int i810_do_cleanup_pageflip(struct drm_device *dev)
1179 drm_i810_private_t *dev_priv = dev->dev_private;
1182 if (dev_priv->current_page != 0)
1183 i810_dma_dispatch_flip(dev);
1185 dev_priv->page_flipping = 0;
1189 static int i810_flip_bufs(struct drm_device *dev, void *data,
1190 struct drm_file *file_priv)
1192 drm_i810_private_t *dev_priv = dev->dev_private;
1196 LOCK_TEST_WITH_RETURN(dev, file_priv);
1198 if (!dev_priv->page_flipping)
1199 i810_do_init_pageflip(dev);
1201 i810_dma_dispatch_flip(dev);
1205 int i810_driver_load(struct drm_device *dev, unsigned long flags)
1207 /* i810 has 4 more counters */
1209 dev->types[6] = _DRM_STAT_IRQ;
1210 dev->types[7] = _DRM_STAT_PRIMARY;
1211 dev->types[8] = _DRM_STAT_SECONDARY;
1212 dev->types[9] = _DRM_STAT_DMA;
1217 void i810_driver_lastclose(struct drm_device *dev)
1219 i810_dma_cleanup(dev);
1222 void i810_driver_preclose(struct drm_device *dev, struct drm_file *file_priv)
1224 if (dev->dev_private) {
1225 drm_i810_private_t *dev_priv = dev->dev_private;
1226 if (dev_priv->page_flipping)
1227 i810_do_cleanup_pageflip(dev);
1231 void i810_driver_reclaim_buffers_locked(struct drm_device *dev,
1232 struct drm_file *file_priv)
1234 i810_reclaim_buffers(dev, file_priv);
1237 int i810_driver_dma_quiescent(struct drm_device *dev)
1239 i810_dma_quiescent(dev);
1243 struct drm_ioctl_desc i810_ioctls[] = {
1244 DRM_IOCTL_DEF(DRM_I810_INIT, i810_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1245 DRM_IOCTL_DEF(DRM_I810_VERTEX, i810_dma_vertex, DRM_AUTH),
1246 DRM_IOCTL_DEF(DRM_I810_CLEAR, i810_clear_bufs, DRM_AUTH),
1247 DRM_IOCTL_DEF(DRM_I810_FLUSH, i810_flush_ioctl, DRM_AUTH),
1248 DRM_IOCTL_DEF(DRM_I810_GETAGE, i810_getage, DRM_AUTH),
1249 DRM_IOCTL_DEF(DRM_I810_GETBUF, i810_getbuf, DRM_AUTH),
1250 DRM_IOCTL_DEF(DRM_I810_SWAP, i810_swap_bufs, DRM_AUTH),
1251 DRM_IOCTL_DEF(DRM_I810_COPY, i810_copybuf, DRM_AUTH),
1252 DRM_IOCTL_DEF(DRM_I810_DOCOPY, i810_docopy, DRM_AUTH),
1253 DRM_IOCTL_DEF(DRM_I810_OV0INFO, i810_ov0_info, DRM_AUTH),
1254 DRM_IOCTL_DEF(DRM_I810_FSTATUS, i810_fstatus, DRM_AUTH),
1255 DRM_IOCTL_DEF(DRM_I810_OV0FLIP, i810_ov0_flip, DRM_AUTH),
1256 DRM_IOCTL_DEF(DRM_I810_MC, i810_dma_mc, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1257 DRM_IOCTL_DEF(DRM_I810_RSTATUS, i810_rstatus, DRM_AUTH),
1258 DRM_IOCTL_DEF(DRM_I810_FLIP, i810_flip_bufs, DRM_AUTH)
1261 int i810_max_ioctl = DRM_ARRAY_SIZE(i810_ioctls);
1264 * Determine if the device really is AGP or not.
1266 * All Intel graphics chipsets are treated as AGP, even if they are really
1269 * \param dev The device to be tested.
1272 * A value of 1 is always retured to indictate every i810 is AGP.
1274 int i810_driver_device_is_agp(struct drm_device *dev)