Merge tag 'v4.15-rc1' into drm-misc-fixes
[sfrench/cifs-2.6.git] / drivers / gpu / drm / drm_edid.c
1 /*
2  * Copyright (c) 2006 Luc Verhaegen (quirks list)
3  * Copyright (c) 2007-2008 Intel Corporation
4  *   Jesse Barnes <jesse.barnes@intel.com>
5  * Copyright 2010 Red Hat, Inc.
6  *
7  * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
8  * FB layer.
9  *   Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
10  *
11  * Permission is hereby granted, free of charge, to any person obtaining a
12  * copy of this software and associated documentation files (the "Software"),
13  * to deal in the Software without restriction, including without limitation
14  * the rights to use, copy, modify, merge, publish, distribute, sub license,
15  * and/or sell copies of the Software, and to permit persons to whom the
16  * Software is furnished to do so, subject to the following conditions:
17  *
18  * The above copyright notice and this permission notice (including the
19  * next paragraph) shall be included in all copies or substantial portions
20  * of the Software.
21  *
22  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
25  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
26  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
27  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
28  * DEALINGS IN THE SOFTWARE.
29  */
30 #include <linux/kernel.h>
31 #include <linux/slab.h>
32 #include <linux/hdmi.h>
33 #include <linux/i2c.h>
34 #include <linux/module.h>
35 #include <linux/vga_switcheroo.h>
36 #include <drm/drmP.h>
37 #include <drm/drm_edid.h>
38 #include <drm/drm_encoder.h>
39 #include <drm/drm_displayid.h>
40 #include <drm/drm_scdc_helper.h>
41
42 #include "drm_crtc_internal.h"
43
44 #define version_greater(edid, maj, min) \
45         (((edid)->version > (maj)) || \
46          ((edid)->version == (maj) && (edid)->revision > (min)))
47
48 #define EDID_EST_TIMINGS 16
49 #define EDID_STD_TIMINGS 8
50 #define EDID_DETAILED_TIMINGS 4
51
52 /*
53  * EDID blocks out in the wild have a variety of bugs, try to collect
54  * them here (note that userspace may work around broken monitors first,
55  * but fixes should make their way here so that the kernel "just works"
56  * on as many displays as possible).
57  */
58
59 /* First detailed mode wrong, use largest 60Hz mode */
60 #define EDID_QUIRK_PREFER_LARGE_60              (1 << 0)
61 /* Reported 135MHz pixel clock is too high, needs adjustment */
62 #define EDID_QUIRK_135_CLOCK_TOO_HIGH           (1 << 1)
63 /* Prefer the largest mode at 75 Hz */
64 #define EDID_QUIRK_PREFER_LARGE_75              (1 << 2)
65 /* Detail timing is in cm not mm */
66 #define EDID_QUIRK_DETAILED_IN_CM               (1 << 3)
67 /* Detailed timing descriptors have bogus size values, so just take the
68  * maximum size and use that.
69  */
70 #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE    (1 << 4)
71 /* Monitor forgot to set the first detailed is preferred bit. */
72 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED     (1 << 5)
73 /* use +hsync +vsync for detailed mode */
74 #define EDID_QUIRK_DETAILED_SYNC_PP             (1 << 6)
75 /* Force reduced-blanking timings for detailed modes */
76 #define EDID_QUIRK_FORCE_REDUCED_BLANKING       (1 << 7)
77 /* Force 8bpc */
78 #define EDID_QUIRK_FORCE_8BPC                   (1 << 8)
79 /* Force 12bpc */
80 #define EDID_QUIRK_FORCE_12BPC                  (1 << 9)
81 /* Force 6bpc */
82 #define EDID_QUIRK_FORCE_6BPC                   (1 << 10)
83 /* Force 10bpc */
84 #define EDID_QUIRK_FORCE_10BPC                  (1 << 11)
85 /* Non desktop display (i.e. HMD) */
86 #define EDID_QUIRK_NON_DESKTOP                  (1 << 12)
87
88 struct detailed_mode_closure {
89         struct drm_connector *connector;
90         struct edid *edid;
91         bool preferred;
92         u32 quirks;
93         int modes;
94 };
95
96 #define LEVEL_DMT       0
97 #define LEVEL_GTF       1
98 #define LEVEL_GTF2      2
99 #define LEVEL_CVT       3
100
101 static const struct edid_quirk {
102         char vendor[4];
103         int product_id;
104         u32 quirks;
105 } edid_quirk_list[] = {
106         /* Acer AL1706 */
107         { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
108         /* Acer F51 */
109         { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
110         /* Unknown Acer */
111         { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
112
113         /* AEO model 0 reports 8 bpc, but is a 6 bpc panel */
114         { "AEO", 0, EDID_QUIRK_FORCE_6BPC },
115
116         /* Belinea 10 15 55 */
117         { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
118         { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
119
120         /* Envision Peripherals, Inc. EN-7100e */
121         { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
122         /* Envision EN2028 */
123         { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
124
125         /* Funai Electronics PM36B */
126         { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
127           EDID_QUIRK_DETAILED_IN_CM },
128
129         /* LGD panel of HP zBook 17 G2, eDP 10 bpc, but reports unknown bpc */
130         { "LGD", 764, EDID_QUIRK_FORCE_10BPC },
131
132         /* LG Philips LCD LP154W01-A5 */
133         { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
134         { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
135
136         /* Philips 107p5 CRT */
137         { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
138
139         /* Proview AY765C */
140         { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
141
142         /* Samsung SyncMaster 205BW.  Note: irony */
143         { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
144         /* Samsung SyncMaster 22[5-6]BW */
145         { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
146         { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
147
148         /* Sony PVM-2541A does up to 12 bpc, but only reports max 8 bpc */
149         { "SNY", 0x2541, EDID_QUIRK_FORCE_12BPC },
150
151         /* ViewSonic VA2026w */
152         { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING },
153
154         /* Medion MD 30217 PG */
155         { "MED", 0x7b8, EDID_QUIRK_PREFER_LARGE_75 },
156
157         /* Panel in Samsung NP700G7A-S01PL notebook reports 6bpc */
158         { "SEC", 0xd033, EDID_QUIRK_FORCE_8BPC },
159
160         /* Rotel RSX-1058 forwards sink's EDID but only does HDMI 1.1*/
161         { "ETR", 13896, EDID_QUIRK_FORCE_8BPC },
162
163         /* HTC Vive VR Headset */
164         { "HVR", 0xaa01, EDID_QUIRK_NON_DESKTOP },
165 };
166
167 /*
168  * Autogenerated from the DMT spec.
169  * This table is copied from xfree86/modes/xf86EdidModes.c.
170  */
171 static const struct drm_display_mode drm_dmt_modes[] = {
172         /* 0x01 - 640x350@85Hz */
173         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
174                    736, 832, 0, 350, 382, 385, 445, 0,
175                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
176         /* 0x02 - 640x400@85Hz */
177         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
178                    736, 832, 0, 400, 401, 404, 445, 0,
179                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
180         /* 0x03 - 720x400@85Hz */
181         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
182                    828, 936, 0, 400, 401, 404, 446, 0,
183                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
184         /* 0x04 - 640x480@60Hz */
185         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
186                    752, 800, 0, 480, 490, 492, 525, 0,
187                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
188         /* 0x05 - 640x480@72Hz */
189         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
190                    704, 832, 0, 480, 489, 492, 520, 0,
191                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
192         /* 0x06 - 640x480@75Hz */
193         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
194                    720, 840, 0, 480, 481, 484, 500, 0,
195                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
196         /* 0x07 - 640x480@85Hz */
197         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
198                    752, 832, 0, 480, 481, 484, 509, 0,
199                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
200         /* 0x08 - 800x600@56Hz */
201         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
202                    896, 1024, 0, 600, 601, 603, 625, 0,
203                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
204         /* 0x09 - 800x600@60Hz */
205         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
206                    968, 1056, 0, 600, 601, 605, 628, 0,
207                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
208         /* 0x0a - 800x600@72Hz */
209         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
210                    976, 1040, 0, 600, 637, 643, 666, 0,
211                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
212         /* 0x0b - 800x600@75Hz */
213         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
214                    896, 1056, 0, 600, 601, 604, 625, 0,
215                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
216         /* 0x0c - 800x600@85Hz */
217         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
218                    896, 1048, 0, 600, 601, 604, 631, 0,
219                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
220         /* 0x0d - 800x600@120Hz RB */
221         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 73250, 800, 848,
222                    880, 960, 0, 600, 603, 607, 636, 0,
223                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
224         /* 0x0e - 848x480@60Hz */
225         { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
226                    976, 1088, 0, 480, 486, 494, 517, 0,
227                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
228         /* 0x0f - 1024x768@43Hz, interlace */
229         { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
230                    1208, 1264, 0, 768, 768, 776, 817, 0,
231                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
232                    DRM_MODE_FLAG_INTERLACE) },
233         /* 0x10 - 1024x768@60Hz */
234         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
235                    1184, 1344, 0, 768, 771, 777, 806, 0,
236                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
237         /* 0x11 - 1024x768@70Hz */
238         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
239                    1184, 1328, 0, 768, 771, 777, 806, 0,
240                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
241         /* 0x12 - 1024x768@75Hz */
242         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
243                    1136, 1312, 0, 768, 769, 772, 800, 0,
244                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
245         /* 0x13 - 1024x768@85Hz */
246         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
247                    1168, 1376, 0, 768, 769, 772, 808, 0,
248                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
249         /* 0x14 - 1024x768@120Hz RB */
250         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 115500, 1024, 1072,
251                    1104, 1184, 0, 768, 771, 775, 813, 0,
252                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
253         /* 0x15 - 1152x864@75Hz */
254         { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
255                    1344, 1600, 0, 864, 865, 868, 900, 0,
256                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
257         /* 0x55 - 1280x720@60Hz */
258         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
259                    1430, 1650, 0, 720, 725, 730, 750, 0,
260                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
261         /* 0x16 - 1280x768@60Hz RB */
262         { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 68250, 1280, 1328,
263                    1360, 1440, 0, 768, 771, 778, 790, 0,
264                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
265         /* 0x17 - 1280x768@60Hz */
266         { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
267                    1472, 1664, 0, 768, 771, 778, 798, 0,
268                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
269         /* 0x18 - 1280x768@75Hz */
270         { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
271                    1488, 1696, 0, 768, 771, 778, 805, 0,
272                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
273         /* 0x19 - 1280x768@85Hz */
274         { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
275                    1496, 1712, 0, 768, 771, 778, 809, 0,
276                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
277         /* 0x1a - 1280x768@120Hz RB */
278         { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 140250, 1280, 1328,
279                    1360, 1440, 0, 768, 771, 778, 813, 0,
280                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
281         /* 0x1b - 1280x800@60Hz RB */
282         { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 71000, 1280, 1328,
283                    1360, 1440, 0, 800, 803, 809, 823, 0,
284                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
285         /* 0x1c - 1280x800@60Hz */
286         { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
287                    1480, 1680, 0, 800, 803, 809, 831, 0,
288                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
289         /* 0x1d - 1280x800@75Hz */
290         { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
291                    1488, 1696, 0, 800, 803, 809, 838, 0,
292                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
293         /* 0x1e - 1280x800@85Hz */
294         { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
295                    1496, 1712, 0, 800, 803, 809, 843, 0,
296                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
297         /* 0x1f - 1280x800@120Hz RB */
298         { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 146250, 1280, 1328,
299                    1360, 1440, 0, 800, 803, 809, 847, 0,
300                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
301         /* 0x20 - 1280x960@60Hz */
302         { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
303                    1488, 1800, 0, 960, 961, 964, 1000, 0,
304                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
305         /* 0x21 - 1280x960@85Hz */
306         { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
307                    1504, 1728, 0, 960, 961, 964, 1011, 0,
308                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
309         /* 0x22 - 1280x960@120Hz RB */
310         { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 175500, 1280, 1328,
311                    1360, 1440, 0, 960, 963, 967, 1017, 0,
312                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
313         /* 0x23 - 1280x1024@60Hz */
314         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
315                    1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
316                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
317         /* 0x24 - 1280x1024@75Hz */
318         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
319                    1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
320                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
321         /* 0x25 - 1280x1024@85Hz */
322         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
323                    1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
324                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
325         /* 0x26 - 1280x1024@120Hz RB */
326         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 187250, 1280, 1328,
327                    1360, 1440, 0, 1024, 1027, 1034, 1084, 0,
328                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
329         /* 0x27 - 1360x768@60Hz */
330         { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
331                    1536, 1792, 0, 768, 771, 777, 795, 0,
332                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
333         /* 0x28 - 1360x768@120Hz RB */
334         { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 148250, 1360, 1408,
335                    1440, 1520, 0, 768, 771, 776, 813, 0,
336                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
337         /* 0x51 - 1366x768@60Hz */
338         { DRM_MODE("1366x768", DRM_MODE_TYPE_DRIVER, 85500, 1366, 1436,
339                    1579, 1792, 0, 768, 771, 774, 798, 0,
340                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
341         /* 0x56 - 1366x768@60Hz */
342         { DRM_MODE("1366x768", DRM_MODE_TYPE_DRIVER, 72000, 1366, 1380,
343                    1436, 1500, 0, 768, 769, 772, 800, 0,
344                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
345         /* 0x29 - 1400x1050@60Hz RB */
346         { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 101000, 1400, 1448,
347                    1480, 1560, 0, 1050, 1053, 1057, 1080, 0,
348                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
349         /* 0x2a - 1400x1050@60Hz */
350         { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
351                    1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
352                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
353         /* 0x2b - 1400x1050@75Hz */
354         { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
355                    1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
356                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
357         /* 0x2c - 1400x1050@85Hz */
358         { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
359                    1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
360                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
361         /* 0x2d - 1400x1050@120Hz RB */
362         { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 208000, 1400, 1448,
363                    1480, 1560, 0, 1050, 1053, 1057, 1112, 0,
364                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
365         /* 0x2e - 1440x900@60Hz RB */
366         { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 88750, 1440, 1488,
367                    1520, 1600, 0, 900, 903, 909, 926, 0,
368                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
369         /* 0x2f - 1440x900@60Hz */
370         { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
371                    1672, 1904, 0, 900, 903, 909, 934, 0,
372                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
373         /* 0x30 - 1440x900@75Hz */
374         { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
375                    1688, 1936, 0, 900, 903, 909, 942, 0,
376                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
377         /* 0x31 - 1440x900@85Hz */
378         { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
379                    1696, 1952, 0, 900, 903, 909, 948, 0,
380                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
381         /* 0x32 - 1440x900@120Hz RB */
382         { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 182750, 1440, 1488,
383                    1520, 1600, 0, 900, 903, 909, 953, 0,
384                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
385         /* 0x53 - 1600x900@60Hz */
386         { DRM_MODE("1600x900", DRM_MODE_TYPE_DRIVER, 108000, 1600, 1624,
387                    1704, 1800, 0, 900, 901, 904, 1000, 0,
388                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
389         /* 0x33 - 1600x1200@60Hz */
390         { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
391                    1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
392                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
393         /* 0x34 - 1600x1200@65Hz */
394         { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
395                    1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
396                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
397         /* 0x35 - 1600x1200@70Hz */
398         { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
399                    1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
400                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
401         /* 0x36 - 1600x1200@75Hz */
402         { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 202500, 1600, 1664,
403                    1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
404                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
405         /* 0x37 - 1600x1200@85Hz */
406         { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
407                    1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
408                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
409         /* 0x38 - 1600x1200@120Hz RB */
410         { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 268250, 1600, 1648,
411                    1680, 1760, 0, 1200, 1203, 1207, 1271, 0,
412                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
413         /* 0x39 - 1680x1050@60Hz RB */
414         { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 119000, 1680, 1728,
415                    1760, 1840, 0, 1050, 1053, 1059, 1080, 0,
416                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
417         /* 0x3a - 1680x1050@60Hz */
418         { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
419                    1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
420                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
421         /* 0x3b - 1680x1050@75Hz */
422         { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
423                    1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
424                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
425         /* 0x3c - 1680x1050@85Hz */
426         { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
427                    1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
428                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
429         /* 0x3d - 1680x1050@120Hz RB */
430         { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 245500, 1680, 1728,
431                    1760, 1840, 0, 1050, 1053, 1059, 1112, 0,
432                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
433         /* 0x3e - 1792x1344@60Hz */
434         { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
435                    2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
436                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
437         /* 0x3f - 1792x1344@75Hz */
438         { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
439                    2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
440                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
441         /* 0x40 - 1792x1344@120Hz RB */
442         { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 333250, 1792, 1840,
443                    1872, 1952, 0, 1344, 1347, 1351, 1423, 0,
444                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
445         /* 0x41 - 1856x1392@60Hz */
446         { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
447                    2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
448                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
449         /* 0x42 - 1856x1392@75Hz */
450         { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
451                    2208, 2560, 0, 1392, 1393, 1396, 1500, 0,
452                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
453         /* 0x43 - 1856x1392@120Hz RB */
454         { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 356500, 1856, 1904,
455                    1936, 2016, 0, 1392, 1395, 1399, 1474, 0,
456                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
457         /* 0x52 - 1920x1080@60Hz */
458         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
459                    2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
460                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
461         /* 0x44 - 1920x1200@60Hz RB */
462         { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 154000, 1920, 1968,
463                    2000, 2080, 0, 1200, 1203, 1209, 1235, 0,
464                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
465         /* 0x45 - 1920x1200@60Hz */
466         { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
467                    2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
468                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
469         /* 0x46 - 1920x1200@75Hz */
470         { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
471                    2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
472                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
473         /* 0x47 - 1920x1200@85Hz */
474         { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
475                    2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
476                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
477         /* 0x48 - 1920x1200@120Hz RB */
478         { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 317000, 1920, 1968,
479                    2000, 2080, 0, 1200, 1203, 1209, 1271, 0,
480                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
481         /* 0x49 - 1920x1440@60Hz */
482         { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
483                    2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
484                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
485         /* 0x4a - 1920x1440@75Hz */
486         { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
487                    2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
488                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
489         /* 0x4b - 1920x1440@120Hz RB */
490         { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 380500, 1920, 1968,
491                    2000, 2080, 0, 1440, 1443, 1447, 1525, 0,
492                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
493         /* 0x54 - 2048x1152@60Hz */
494         { DRM_MODE("2048x1152", DRM_MODE_TYPE_DRIVER, 162000, 2048, 2074,
495                    2154, 2250, 0, 1152, 1153, 1156, 1200, 0,
496                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
497         /* 0x4c - 2560x1600@60Hz RB */
498         { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 268500, 2560, 2608,
499                    2640, 2720, 0, 1600, 1603, 1609, 1646, 0,
500                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
501         /* 0x4d - 2560x1600@60Hz */
502         { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
503                    3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
504                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
505         /* 0x4e - 2560x1600@75Hz */
506         { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
507                    3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
508                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
509         /* 0x4f - 2560x1600@85Hz */
510         { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
511                    3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
512                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
513         /* 0x50 - 2560x1600@120Hz RB */
514         { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 552750, 2560, 2608,
515                    2640, 2720, 0, 1600, 1603, 1609, 1694, 0,
516                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
517         /* 0x57 - 4096x2160@60Hz RB */
518         { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 556744, 4096, 4104,
519                    4136, 4176, 0, 2160, 2208, 2216, 2222, 0,
520                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
521         /* 0x58 - 4096x2160@59.94Hz RB */
522         { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 556188, 4096, 4104,
523                    4136, 4176, 0, 2160, 2208, 2216, 2222, 0,
524                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
525 };
526
527 /*
528  * These more or less come from the DMT spec.  The 720x400 modes are
529  * inferred from historical 80x25 practice.  The 640x480@67 and 832x624@75
530  * modes are old-school Mac modes.  The EDID spec says the 1152x864@75 mode
531  * should be 1152x870, again for the Mac, but instead we use the x864 DMT
532  * mode.
533  *
534  * The DMT modes have been fact-checked; the rest are mild guesses.
535  */
536 static const struct drm_display_mode edid_est_modes[] = {
537         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
538                    968, 1056, 0, 600, 601, 605, 628, 0,
539                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */
540         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
541                    896, 1024, 0, 600, 601, 603,  625, 0,
542                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */
543         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
544                    720, 840, 0, 480, 481, 484, 500, 0,
545                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */
546         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
547                    704,  832, 0, 480, 489, 492, 520, 0,
548                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */
549         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
550                    768,  864, 0, 480, 483, 486, 525, 0,
551                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */
552         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
553                    752, 800, 0, 480, 490, 492, 525, 0,
554                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */
555         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
556                    846, 900, 0, 400, 421, 423,  449, 0,
557                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */
558         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
559                    846,  900, 0, 400, 412, 414, 449, 0,
560                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */
561         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
562                    1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
563                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */
564         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
565                    1136, 1312, 0,  768, 769, 772, 800, 0,
566                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */
567         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
568                    1184, 1328, 0,  768, 771, 777, 806, 0,
569                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */
570         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
571                    1184, 1344, 0,  768, 771, 777, 806, 0,
572                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */
573         { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032,
574                    1208, 1264, 0, 768, 768, 776, 817, 0,
575                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */
576         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
577                    928, 1152, 0, 624, 625, 628, 667, 0,
578                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */
579         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
580                    896, 1056, 0, 600, 601, 604,  625, 0,
581                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */
582         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
583                    976, 1040, 0, 600, 637, 643, 666, 0,
584                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */
585         { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
586                    1344, 1600, 0,  864, 865, 868, 900, 0,
587                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */
588 };
589
590 struct minimode {
591         short w;
592         short h;
593         short r;
594         short rb;
595 };
596
597 static const struct minimode est3_modes[] = {
598         /* byte 6 */
599         { 640, 350, 85, 0 },
600         { 640, 400, 85, 0 },
601         { 720, 400, 85, 0 },
602         { 640, 480, 85, 0 },
603         { 848, 480, 60, 0 },
604         { 800, 600, 85, 0 },
605         { 1024, 768, 85, 0 },
606         { 1152, 864, 75, 0 },
607         /* byte 7 */
608         { 1280, 768, 60, 1 },
609         { 1280, 768, 60, 0 },
610         { 1280, 768, 75, 0 },
611         { 1280, 768, 85, 0 },
612         { 1280, 960, 60, 0 },
613         { 1280, 960, 85, 0 },
614         { 1280, 1024, 60, 0 },
615         { 1280, 1024, 85, 0 },
616         /* byte 8 */
617         { 1360, 768, 60, 0 },
618         { 1440, 900, 60, 1 },
619         { 1440, 900, 60, 0 },
620         { 1440, 900, 75, 0 },
621         { 1440, 900, 85, 0 },
622         { 1400, 1050, 60, 1 },
623         { 1400, 1050, 60, 0 },
624         { 1400, 1050, 75, 0 },
625         /* byte 9 */
626         { 1400, 1050, 85, 0 },
627         { 1680, 1050, 60, 1 },
628         { 1680, 1050, 60, 0 },
629         { 1680, 1050, 75, 0 },
630         { 1680, 1050, 85, 0 },
631         { 1600, 1200, 60, 0 },
632         { 1600, 1200, 65, 0 },
633         { 1600, 1200, 70, 0 },
634         /* byte 10 */
635         { 1600, 1200, 75, 0 },
636         { 1600, 1200, 85, 0 },
637         { 1792, 1344, 60, 0 },
638         { 1792, 1344, 75, 0 },
639         { 1856, 1392, 60, 0 },
640         { 1856, 1392, 75, 0 },
641         { 1920, 1200, 60, 1 },
642         { 1920, 1200, 60, 0 },
643         /* byte 11 */
644         { 1920, 1200, 75, 0 },
645         { 1920, 1200, 85, 0 },
646         { 1920, 1440, 60, 0 },
647         { 1920, 1440, 75, 0 },
648 };
649
650 static const struct minimode extra_modes[] = {
651         { 1024, 576,  60, 0 },
652         { 1366, 768,  60, 0 },
653         { 1600, 900,  60, 0 },
654         { 1680, 945,  60, 0 },
655         { 1920, 1080, 60, 0 },
656         { 2048, 1152, 60, 0 },
657         { 2048, 1536, 60, 0 },
658 };
659
660 /*
661  * Probably taken from CEA-861 spec.
662  * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c.
663  *
664  * Index using the VIC.
665  */
666 static const struct drm_display_mode edid_cea_modes[] = {
667         /* 0 - dummy, VICs start at 1 */
668         { },
669         /* 1 - 640x480@60Hz */
670         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
671                    752, 800, 0, 480, 490, 492, 525, 0,
672                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
673           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
674         /* 2 - 720x480@60Hz */
675         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
676                    798, 858, 0, 480, 489, 495, 525, 0,
677                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
678           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
679         /* 3 - 720x480@60Hz */
680         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
681                    798, 858, 0, 480, 489, 495, 525, 0,
682                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
683           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
684         /* 4 - 1280x720@60Hz */
685         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
686                    1430, 1650, 0, 720, 725, 730, 750, 0,
687                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
688           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
689         /* 5 - 1920x1080i@60Hz */
690         { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
691                    2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
692                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
693                         DRM_MODE_FLAG_INTERLACE),
694           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
695         /* 6 - 720(1440)x480i@60Hz */
696         { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
697                    801, 858, 0, 480, 488, 494, 525, 0,
698                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
699                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
700           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
701         /* 7 - 720(1440)x480i@60Hz */
702         { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
703                    801, 858, 0, 480, 488, 494, 525, 0,
704                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
705                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
706           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
707         /* 8 - 720(1440)x240@60Hz */
708         { DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
709                    801, 858, 0, 240, 244, 247, 262, 0,
710                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
711                         DRM_MODE_FLAG_DBLCLK),
712           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
713         /* 9 - 720(1440)x240@60Hz */
714         { DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
715                    801, 858, 0, 240, 244, 247, 262, 0,
716                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
717                         DRM_MODE_FLAG_DBLCLK),
718           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
719         /* 10 - 2880x480i@60Hz */
720         { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
721                    3204, 3432, 0, 480, 488, 494, 525, 0,
722                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
723                         DRM_MODE_FLAG_INTERLACE),
724           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
725         /* 11 - 2880x480i@60Hz */
726         { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
727                    3204, 3432, 0, 480, 488, 494, 525, 0,
728                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
729                         DRM_MODE_FLAG_INTERLACE),
730           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
731         /* 12 - 2880x240@60Hz */
732         { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
733                    3204, 3432, 0, 240, 244, 247, 262, 0,
734                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
735           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
736         /* 13 - 2880x240@60Hz */
737         { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
738                    3204, 3432, 0, 240, 244, 247, 262, 0,
739                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
740           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
741         /* 14 - 1440x480@60Hz */
742         { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
743                    1596, 1716, 0, 480, 489, 495, 525, 0,
744                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
745           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
746         /* 15 - 1440x480@60Hz */
747         { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
748                    1596, 1716, 0, 480, 489, 495, 525, 0,
749                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
750           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
751         /* 16 - 1920x1080@60Hz */
752         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
753                    2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
754                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
755           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
756         /* 17 - 720x576@50Hz */
757         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
758                    796, 864, 0, 576, 581, 586, 625, 0,
759                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
760           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
761         /* 18 - 720x576@50Hz */
762         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
763                    796, 864, 0, 576, 581, 586, 625, 0,
764                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
765           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
766         /* 19 - 1280x720@50Hz */
767         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720,
768                    1760, 1980, 0, 720, 725, 730, 750, 0,
769                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
770           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
771         /* 20 - 1920x1080i@50Hz */
772         { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
773                    2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
774                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
775                         DRM_MODE_FLAG_INTERLACE),
776           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
777         /* 21 - 720(1440)x576i@50Hz */
778         { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
779                    795, 864, 0, 576, 580, 586, 625, 0,
780                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
781                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
782           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
783         /* 22 - 720(1440)x576i@50Hz */
784         { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
785                    795, 864, 0, 576, 580, 586, 625, 0,
786                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
787                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
788           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
789         /* 23 - 720(1440)x288@50Hz */
790         { DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
791                    795, 864, 0, 288, 290, 293, 312, 0,
792                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
793                         DRM_MODE_FLAG_DBLCLK),
794           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
795         /* 24 - 720(1440)x288@50Hz */
796         { DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
797                    795, 864, 0, 288, 290, 293, 312, 0,
798                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
799                         DRM_MODE_FLAG_DBLCLK),
800           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
801         /* 25 - 2880x576i@50Hz */
802         { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
803                    3180, 3456, 0, 576, 580, 586, 625, 0,
804                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
805                         DRM_MODE_FLAG_INTERLACE),
806           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
807         /* 26 - 2880x576i@50Hz */
808         { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
809                    3180, 3456, 0, 576, 580, 586, 625, 0,
810                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
811                         DRM_MODE_FLAG_INTERLACE),
812           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
813         /* 27 - 2880x288@50Hz */
814         { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
815                    3180, 3456, 0, 288, 290, 293, 312, 0,
816                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
817           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
818         /* 28 - 2880x288@50Hz */
819         { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
820                    3180, 3456, 0, 288, 290, 293, 312, 0,
821                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
822           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
823         /* 29 - 1440x576@50Hz */
824         { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
825                    1592, 1728, 0, 576, 581, 586, 625, 0,
826                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
827           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
828         /* 30 - 1440x576@50Hz */
829         { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
830                    1592, 1728, 0, 576, 581, 586, 625, 0,
831                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
832           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
833         /* 31 - 1920x1080@50Hz */
834         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
835                    2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
836                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
837           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
838         /* 32 - 1920x1080@24Hz */
839         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558,
840                    2602, 2750, 0, 1080, 1084, 1089, 1125, 0,
841                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
842           .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
843         /* 33 - 1920x1080@25Hz */
844         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
845                    2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
846                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
847           .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
848         /* 34 - 1920x1080@30Hz */
849         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
850                    2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
851                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
852           .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
853         /* 35 - 2880x480@60Hz */
854         { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
855                    3192, 3432, 0, 480, 489, 495, 525, 0,
856                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
857           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
858         /* 36 - 2880x480@60Hz */
859         { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
860                    3192, 3432, 0, 480, 489, 495, 525, 0,
861                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
862           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
863         /* 37 - 2880x576@50Hz */
864         { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
865                    3184, 3456, 0, 576, 581, 586, 625, 0,
866                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
867           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
868         /* 38 - 2880x576@50Hz */
869         { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
870                    3184, 3456, 0, 576, 581, 586, 625, 0,
871                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
872           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
873         /* 39 - 1920x1080i@50Hz */
874         { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 72000, 1920, 1952,
875                    2120, 2304, 0, 1080, 1126, 1136, 1250, 0,
876                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC |
877                         DRM_MODE_FLAG_INTERLACE),
878           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
879         /* 40 - 1920x1080i@100Hz */
880         { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
881                    2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
882                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
883                         DRM_MODE_FLAG_INTERLACE),
884           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
885         /* 41 - 1280x720@100Hz */
886         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720,
887                    1760, 1980, 0, 720, 725, 730, 750, 0,
888                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
889           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
890         /* 42 - 720x576@100Hz */
891         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
892                    796, 864, 0, 576, 581, 586, 625, 0,
893                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
894           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
895         /* 43 - 720x576@100Hz */
896         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
897                    796, 864, 0, 576, 581, 586, 625, 0,
898                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
899           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
900         /* 44 - 720(1440)x576i@100Hz */
901         { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
902                    795, 864, 0, 576, 580, 586, 625, 0,
903                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
904                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
905           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
906         /* 45 - 720(1440)x576i@100Hz */
907         { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
908                    795, 864, 0, 576, 580, 586, 625, 0,
909                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
910                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
911           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
912         /* 46 - 1920x1080i@120Hz */
913         { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
914                    2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
915                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
916                         DRM_MODE_FLAG_INTERLACE),
917           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
918         /* 47 - 1280x720@120Hz */
919         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390,
920                    1430, 1650, 0, 720, 725, 730, 750, 0,
921                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
922           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
923         /* 48 - 720x480@120Hz */
924         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
925                    798, 858, 0, 480, 489, 495, 525, 0,
926                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
927           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
928         /* 49 - 720x480@120Hz */
929         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
930                    798, 858, 0, 480, 489, 495, 525, 0,
931                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
932           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
933         /* 50 - 720(1440)x480i@120Hz */
934         { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 27000, 720, 739,
935                    801, 858, 0, 480, 488, 494, 525, 0,
936                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
937                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
938           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
939         /* 51 - 720(1440)x480i@120Hz */
940         { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 27000, 720, 739,
941                    801, 858, 0, 480, 488, 494, 525, 0,
942                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
943                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
944           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
945         /* 52 - 720x576@200Hz */
946         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
947                    796, 864, 0, 576, 581, 586, 625, 0,
948                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
949           .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
950         /* 53 - 720x576@200Hz */
951         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
952                    796, 864, 0, 576, 581, 586, 625, 0,
953                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
954           .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
955         /* 54 - 720(1440)x576i@200Hz */
956         { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
957                    795, 864, 0, 576, 580, 586, 625, 0,
958                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
959                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
960           .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
961         /* 55 - 720(1440)x576i@200Hz */
962         { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
963                    795, 864, 0, 576, 580, 586, 625, 0,
964                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
965                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
966           .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
967         /* 56 - 720x480@240Hz */
968         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
969                    798, 858, 0, 480, 489, 495, 525, 0,
970                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
971           .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
972         /* 57 - 720x480@240Hz */
973         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
974                    798, 858, 0, 480, 489, 495, 525, 0,
975                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
976           .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
977         /* 58 - 720(1440)x480i@240Hz */
978         { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 54000, 720, 739,
979                    801, 858, 0, 480, 488, 494, 525, 0,
980                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
981                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
982           .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
983         /* 59 - 720(1440)x480i@240Hz */
984         { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 54000, 720, 739,
985                    801, 858, 0, 480, 488, 494, 525, 0,
986                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
987                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
988           .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
989         /* 60 - 1280x720@24Hz */
990         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040,
991                    3080, 3300, 0, 720, 725, 730, 750, 0,
992                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
993           .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
994         /* 61 - 1280x720@25Hz */
995         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700,
996                    3740, 3960, 0, 720, 725, 730, 750, 0,
997                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
998           .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
999         /* 62 - 1280x720@30Hz */
1000         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040,
1001                    3080, 3300, 0, 720, 725, 730, 750, 0,
1002                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1003           .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1004         /* 63 - 1920x1080@120Hz */
1005         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008,
1006                    2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
1007                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1008          .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1009         /* 64 - 1920x1080@100Hz */
1010         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448,
1011                    2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
1012                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1013          .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1014         /* 65 - 1280x720@24Hz */
1015         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040,
1016                    3080, 3300, 0, 720, 725, 730, 750, 0,
1017                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1018           .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1019         /* 66 - 1280x720@25Hz */
1020         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700,
1021                    3740, 3960, 0, 720, 725, 730, 750, 0,
1022                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1023           .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1024         /* 67 - 1280x720@30Hz */
1025         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040,
1026                    3080, 3300, 0, 720, 725, 730, 750, 0,
1027                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1028           .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1029         /* 68 - 1280x720@50Hz */
1030         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720,
1031                    1760, 1980, 0, 720, 725, 730, 750, 0,
1032                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1033           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1034         /* 69 - 1280x720@60Hz */
1035         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
1036                    1430, 1650, 0, 720, 725, 730, 750, 0,
1037                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1038           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1039         /* 70 - 1280x720@100Hz */
1040         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720,
1041                    1760, 1980, 0, 720, 725, 730, 750, 0,
1042                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1043           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1044         /* 71 - 1280x720@120Hz */
1045         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390,
1046                    1430, 1650, 0, 720, 725, 730, 750, 0,
1047                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1048           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1049         /* 72 - 1920x1080@24Hz */
1050         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558,
1051                    2602, 2750, 0, 1080, 1084, 1089, 1125, 0,
1052                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1053           .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1054         /* 73 - 1920x1080@25Hz */
1055         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
1056                    2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
1057                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1058           .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1059         /* 74 - 1920x1080@30Hz */
1060         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
1061                    2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
1062                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1063           .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1064         /* 75 - 1920x1080@50Hz */
1065         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
1066                    2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
1067                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1068           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1069         /* 76 - 1920x1080@60Hz */
1070         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
1071                    2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
1072                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1073           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1074         /* 77 - 1920x1080@100Hz */
1075         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448,
1076                    2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
1077                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1078           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1079         /* 78 - 1920x1080@120Hz */
1080         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008,
1081                    2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
1082                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1083           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1084         /* 79 - 1680x720@24Hz */
1085         { DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 59400, 1680, 3040,
1086                    3080, 3300, 0, 720, 725, 730, 750, 0,
1087                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1088           .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1089         /* 80 - 1680x720@25Hz */
1090         { DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 59400, 1680, 2908,
1091                    2948, 3168, 0, 720, 725, 730, 750, 0,
1092                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1093           .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1094         /* 81 - 1680x720@30Hz */
1095         { DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 59400, 1680, 2380,
1096                    2420, 2640, 0, 720, 725, 730, 750, 0,
1097                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1098           .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1099         /* 82 - 1680x720@50Hz */
1100         { DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 82500, 1680, 1940,
1101                    1980, 2200, 0, 720, 725, 730, 750, 0,
1102                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1103           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1104         /* 83 - 1680x720@60Hz */
1105         { DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 99000, 1680, 1940,
1106                    1980, 2200, 0, 720, 725, 730, 750, 0,
1107                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1108           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1109         /* 84 - 1680x720@100Hz */
1110         { DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 165000, 1680, 1740,
1111                    1780, 2000, 0, 720, 725, 730, 825, 0,
1112                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1113           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1114         /* 85 - 1680x720@120Hz */
1115         { DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 198000, 1680, 1740,
1116                    1780, 2000, 0, 720, 725, 730, 825, 0,
1117                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1118           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1119         /* 86 - 2560x1080@24Hz */
1120         { DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 99000, 2560, 3558,
1121                    3602, 3750, 0, 1080, 1084, 1089, 1100, 0,
1122                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1123           .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1124         /* 87 - 2560x1080@25Hz */
1125         { DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 90000, 2560, 3008,
1126                    3052, 3200, 0, 1080, 1084, 1089, 1125, 0,
1127                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1128           .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1129         /* 88 - 2560x1080@30Hz */
1130         { DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 118800, 2560, 3328,
1131                    3372, 3520, 0, 1080, 1084, 1089, 1125, 0,
1132                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1133           .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1134         /* 89 - 2560x1080@50Hz */
1135         { DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 185625, 2560, 3108,
1136                    3152, 3300, 0, 1080, 1084, 1089, 1125, 0,
1137                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1138           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1139         /* 90 - 2560x1080@60Hz */
1140         { DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 198000, 2560, 2808,
1141                    2852, 3000, 0, 1080, 1084, 1089, 1100, 0,
1142                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1143           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1144         /* 91 - 2560x1080@100Hz */
1145         { DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 371250, 2560, 2778,
1146                    2822, 2970, 0, 1080, 1084, 1089, 1250, 0,
1147                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1148           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1149         /* 92 - 2560x1080@120Hz */
1150         { DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 495000, 2560, 3108,
1151                    3152, 3300, 0, 1080, 1084, 1089, 1250, 0,
1152                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1153           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1154         /* 93 - 3840x2160p@24Hz 16:9 */
1155         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 5116,
1156                    5204, 5500, 0, 2160, 2168, 2178, 2250, 0,
1157                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1158           .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1159         /* 94 - 3840x2160p@25Hz 16:9 */
1160         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 4896,
1161                    4984, 5280, 0, 2160, 2168, 2178, 2250, 0,
1162                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1163           .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1164         /* 95 - 3840x2160p@30Hz 16:9 */
1165         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 4016,
1166                    4104, 4400, 0, 2160, 2168, 2178, 2250, 0,
1167                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1168           .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1169         /* 96 - 3840x2160p@50Hz 16:9 */
1170         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 594000, 3840, 4896,
1171                    4984, 5280, 0, 2160, 2168, 2178, 2250, 0,
1172                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1173           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1174         /* 97 - 3840x2160p@60Hz 16:9 */
1175         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 594000, 3840, 4016,
1176                    4104, 4400, 0, 2160, 2168, 2178, 2250, 0,
1177                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1178           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1179         /* 98 - 4096x2160p@24Hz 256:135 */
1180         { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000, 4096, 5116,
1181                    5204, 5500, 0, 2160, 2168, 2178, 2250, 0,
1182                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1183           .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
1184         /* 99 - 4096x2160p@25Hz 256:135 */
1185         { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000, 4096, 5064,
1186                    5152, 5280, 0, 2160, 2168, 2178, 2250, 0,
1187                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1188           .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
1189         /* 100 - 4096x2160p@30Hz 256:135 */
1190         { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000, 4096, 4184,
1191                    4272, 4400, 0, 2160, 2168, 2178, 2250, 0,
1192                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1193           .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
1194         /* 101 - 4096x2160p@50Hz 256:135 */
1195         { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 594000, 4096, 5064,
1196                    5152, 5280, 0, 2160, 2168, 2178, 2250, 0,
1197                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1198           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
1199         /* 102 - 4096x2160p@60Hz 256:135 */
1200         { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 594000, 4096, 4184,
1201                    4272, 4400, 0, 2160, 2168, 2178, 2250, 0,
1202                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1203           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
1204         /* 103 - 3840x2160p@24Hz 64:27 */
1205         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 5116,
1206                    5204, 5500, 0, 2160, 2168, 2178, 2250, 0,
1207                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1208           .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1209         /* 104 - 3840x2160p@25Hz 64:27 */
1210         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 4896,
1211                    4984, 5280, 0, 2160, 2168, 2178, 2250, 0,
1212                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1213           .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1214         /* 105 - 3840x2160p@30Hz 64:27 */
1215         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 4016,
1216                    4104, 4400, 0, 2160, 2168, 2178, 2250, 0,
1217                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1218           .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1219         /* 106 - 3840x2160p@50Hz 64:27 */
1220         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 594000, 3840, 4896,
1221                    4984, 5280, 0, 2160, 2168, 2178, 2250, 0,
1222                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1223           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1224         /* 107 - 3840x2160p@60Hz 64:27 */
1225         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 594000, 3840, 4016,
1226                    4104, 4400, 0, 2160, 2168, 2178, 2250, 0,
1227                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1228           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1229 };
1230
1231 /*
1232  * HDMI 1.4 4k modes. Index using the VIC.
1233  */
1234 static const struct drm_display_mode edid_4k_modes[] = {
1235         /* 0 - dummy, VICs start at 1 */
1236         { },
1237         /* 1 - 3840x2160@30Hz */
1238         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
1239                    3840, 4016, 4104, 4400, 0,
1240                    2160, 2168, 2178, 2250, 0,
1241                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1242           .vrefresh = 30, },
1243         /* 2 - 3840x2160@25Hz */
1244         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
1245                    3840, 4896, 4984, 5280, 0,
1246                    2160, 2168, 2178, 2250, 0,
1247                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1248           .vrefresh = 25, },
1249         /* 3 - 3840x2160@24Hz */
1250         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
1251                    3840, 5116, 5204, 5500, 0,
1252                    2160, 2168, 2178, 2250, 0,
1253                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1254           .vrefresh = 24, },
1255         /* 4 - 4096x2160@24Hz (SMPTE) */
1256         { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000,
1257                    4096, 5116, 5204, 5500, 0,
1258                    2160, 2168, 2178, 2250, 0,
1259                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1260           .vrefresh = 24, },
1261 };
1262
1263 /*** DDC fetch and block validation ***/
1264
1265 static const u8 edid_header[] = {
1266         0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
1267 };
1268
1269 /**
1270  * drm_edid_header_is_valid - sanity check the header of the base EDID block
1271  * @raw_edid: pointer to raw base EDID block
1272  *
1273  * Sanity check the header of the base EDID block.
1274  *
1275  * Return: 8 if the header is perfect, down to 0 if it's totally wrong.
1276  */
1277 int drm_edid_header_is_valid(const u8 *raw_edid)
1278 {
1279         int i, score = 0;
1280
1281         for (i = 0; i < sizeof(edid_header); i++)
1282                 if (raw_edid[i] == edid_header[i])
1283                         score++;
1284
1285         return score;
1286 }
1287 EXPORT_SYMBOL(drm_edid_header_is_valid);
1288
1289 static int edid_fixup __read_mostly = 6;
1290 module_param_named(edid_fixup, edid_fixup, int, 0400);
1291 MODULE_PARM_DESC(edid_fixup,
1292                  "Minimum number of valid EDID header bytes (0-8, default 6)");
1293
1294 static void drm_get_displayid(struct drm_connector *connector,
1295                               struct edid *edid);
1296
1297 static int drm_edid_block_checksum(const u8 *raw_edid)
1298 {
1299         int i;
1300         u8 csum = 0;
1301         for (i = 0; i < EDID_LENGTH; i++)
1302                 csum += raw_edid[i];
1303
1304         return csum;
1305 }
1306
1307 static bool drm_edid_is_zero(const u8 *in_edid, int length)
1308 {
1309         if (memchr_inv(in_edid, 0, length))
1310                 return false;
1311
1312         return true;
1313 }
1314
1315 /**
1316  * drm_edid_block_valid - Sanity check the EDID block (base or extension)
1317  * @raw_edid: pointer to raw EDID block
1318  * @block: type of block to validate (0 for base, extension otherwise)
1319  * @print_bad_edid: if true, dump bad EDID blocks to the console
1320  * @edid_corrupt: if true, the header or checksum is invalid
1321  *
1322  * Validate a base or extension EDID block and optionally dump bad blocks to
1323  * the console.
1324  *
1325  * Return: True if the block is valid, false otherwise.
1326  */
1327 bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid,
1328                           bool *edid_corrupt)
1329 {
1330         u8 csum;
1331         struct edid *edid = (struct edid *)raw_edid;
1332
1333         if (WARN_ON(!raw_edid))
1334                 return false;
1335
1336         if (edid_fixup > 8 || edid_fixup < 0)
1337                 edid_fixup = 6;
1338
1339         if (block == 0) {
1340                 int score = drm_edid_header_is_valid(raw_edid);
1341                 if (score == 8) {
1342                         if (edid_corrupt)
1343                                 *edid_corrupt = false;
1344                 } else if (score >= edid_fixup) {
1345                         /* Displayport Link CTS Core 1.2 rev1.1 test 4.2.2.6
1346                          * The corrupt flag needs to be set here otherwise, the
1347                          * fix-up code here will correct the problem, the
1348                          * checksum is correct and the test fails
1349                          */
1350                         if (edid_corrupt)
1351                                 *edid_corrupt = true;
1352                         DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
1353                         memcpy(raw_edid, edid_header, sizeof(edid_header));
1354                 } else {
1355                         if (edid_corrupt)
1356                                 *edid_corrupt = true;
1357                         goto bad;
1358                 }
1359         }
1360
1361         csum = drm_edid_block_checksum(raw_edid);
1362         if (csum) {
1363                 if (edid_corrupt)
1364                         *edid_corrupt = true;
1365
1366                 /* allow CEA to slide through, switches mangle this */
1367                 if (raw_edid[0] == CEA_EXT) {
1368                         DRM_DEBUG("EDID checksum is invalid, remainder is %d\n", csum);
1369                         DRM_DEBUG("Assuming a KVM switch modified the CEA block but left the original checksum\n");
1370                 } else {
1371                         if (print_bad_edid)
1372                                 DRM_NOTE("EDID checksum is invalid, remainder is %d\n", csum);
1373
1374                         goto bad;
1375                 }
1376         }
1377
1378         /* per-block-type checks */
1379         switch (raw_edid[0]) {
1380         case 0: /* base */
1381                 if (edid->version != 1) {
1382                         DRM_NOTE("EDID has major version %d, instead of 1\n", edid->version);
1383                         goto bad;
1384                 }
1385
1386                 if (edid->revision > 4)
1387                         DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
1388                 break;
1389
1390         default:
1391                 break;
1392         }
1393
1394         return true;
1395
1396 bad:
1397         if (print_bad_edid) {
1398                 if (drm_edid_is_zero(raw_edid, EDID_LENGTH)) {
1399                         pr_notice("EDID block is all zeroes\n");
1400                 } else {
1401                         pr_notice("Raw EDID:\n");
1402                         print_hex_dump(KERN_NOTICE,
1403                                        " \t", DUMP_PREFIX_NONE, 16, 1,
1404                                        raw_edid, EDID_LENGTH, false);
1405                 }
1406         }
1407         return false;
1408 }
1409 EXPORT_SYMBOL(drm_edid_block_valid);
1410
1411 /**
1412  * drm_edid_is_valid - sanity check EDID data
1413  * @edid: EDID data
1414  *
1415  * Sanity-check an entire EDID record (including extensions)
1416  *
1417  * Return: True if the EDID data is valid, false otherwise.
1418  */
1419 bool drm_edid_is_valid(struct edid *edid)
1420 {
1421         int i;
1422         u8 *raw = (u8 *)edid;
1423
1424         if (!edid)
1425                 return false;
1426
1427         for (i = 0; i <= edid->extensions; i++)
1428                 if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true, NULL))
1429                         return false;
1430
1431         return true;
1432 }
1433 EXPORT_SYMBOL(drm_edid_is_valid);
1434
1435 #define DDC_SEGMENT_ADDR 0x30
1436 /**
1437  * drm_do_probe_ddc_edid() - get EDID information via I2C
1438  * @data: I2C device adapter
1439  * @buf: EDID data buffer to be filled
1440  * @block: 128 byte EDID block to start fetching from
1441  * @len: EDID data buffer length to fetch
1442  *
1443  * Try to fetch EDID information by calling I2C driver functions.
1444  *
1445  * Return: 0 on success or -1 on failure.
1446  */
1447 static int
1448 drm_do_probe_ddc_edid(void *data, u8 *buf, unsigned int block, size_t len)
1449 {
1450         struct i2c_adapter *adapter = data;
1451         unsigned char start = block * EDID_LENGTH;
1452         unsigned char segment = block >> 1;
1453         unsigned char xfers = segment ? 3 : 2;
1454         int ret, retries = 5;
1455
1456         /*
1457          * The core I2C driver will automatically retry the transfer if the
1458          * adapter reports EAGAIN. However, we find that bit-banging transfers
1459          * are susceptible to errors under a heavily loaded machine and
1460          * generate spurious NAKs and timeouts. Retrying the transfer
1461          * of the individual block a few times seems to overcome this.
1462          */
1463         do {
1464                 struct i2c_msg msgs[] = {
1465                         {
1466                                 .addr   = DDC_SEGMENT_ADDR,
1467                                 .flags  = 0,
1468                                 .len    = 1,
1469                                 .buf    = &segment,
1470                         }, {
1471                                 .addr   = DDC_ADDR,
1472                                 .flags  = 0,
1473                                 .len    = 1,
1474                                 .buf    = &start,
1475                         }, {
1476                                 .addr   = DDC_ADDR,
1477                                 .flags  = I2C_M_RD,
1478                                 .len    = len,
1479                                 .buf    = buf,
1480                         }
1481                 };
1482
1483                 /*
1484                  * Avoid sending the segment addr to not upset non-compliant
1485                  * DDC monitors.
1486                  */
1487                 ret = i2c_transfer(adapter, &msgs[3 - xfers], xfers);
1488
1489                 if (ret == -ENXIO) {
1490                         DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n",
1491                                         adapter->name);
1492                         break;
1493                 }
1494         } while (ret != xfers && --retries);
1495
1496         return ret == xfers ? 0 : -1;
1497 }
1498
1499 static void connector_bad_edid(struct drm_connector *connector,
1500                                u8 *edid, int num_blocks)
1501 {
1502         int i;
1503
1504         if (connector->bad_edid_counter++ && !(drm_debug & DRM_UT_KMS))
1505                 return;
1506
1507         dev_warn(connector->dev->dev,
1508                  "%s: EDID is invalid:\n",
1509                  connector->name);
1510         for (i = 0; i < num_blocks; i++) {
1511                 u8 *block = edid + i * EDID_LENGTH;
1512                 char prefix[20];
1513
1514                 if (drm_edid_is_zero(block, EDID_LENGTH))
1515                         sprintf(prefix, "\t[%02x] ZERO ", i);
1516                 else if (!drm_edid_block_valid(block, i, false, NULL))
1517                         sprintf(prefix, "\t[%02x] BAD  ", i);
1518                 else
1519                         sprintf(prefix, "\t[%02x] GOOD ", i);
1520
1521                 print_hex_dump(KERN_WARNING,
1522                                prefix, DUMP_PREFIX_NONE, 16, 1,
1523                                block, EDID_LENGTH, false);
1524         }
1525 }
1526
1527 /**
1528  * drm_do_get_edid - get EDID data using a custom EDID block read function
1529  * @connector: connector we're probing
1530  * @get_edid_block: EDID block read function
1531  * @data: private data passed to the block read function
1532  *
1533  * When the I2C adapter connected to the DDC bus is hidden behind a device that
1534  * exposes a different interface to read EDID blocks this function can be used
1535  * to get EDID data using a custom block read function.
1536  *
1537  * As in the general case the DDC bus is accessible by the kernel at the I2C
1538  * level, drivers must make all reasonable efforts to expose it as an I2C
1539  * adapter and use drm_get_edid() instead of abusing this function.
1540  *
1541  * The EDID may be overridden using debugfs override_edid or firmare EDID
1542  * (drm_load_edid_firmware() and drm.edid_firmware parameter), in this priority
1543  * order. Having either of them bypasses actual EDID reads.
1544  *
1545  * Return: Pointer to valid EDID or NULL if we couldn't find any.
1546  */
1547 struct edid *drm_do_get_edid(struct drm_connector *connector,
1548         int (*get_edid_block)(void *data, u8 *buf, unsigned int block,
1549                               size_t len),
1550         void *data)
1551 {
1552         int i, j = 0, valid_extensions = 0;
1553         u8 *edid, *new;
1554         struct edid *override = NULL;
1555
1556         if (connector->override_edid)
1557                 override = drm_edid_duplicate((const struct edid *)
1558                                               connector->edid_blob_ptr->data);
1559
1560         if (!override)
1561                 override = drm_load_edid_firmware(connector);
1562
1563         if (!IS_ERR_OR_NULL(override))
1564                 return override;
1565
1566         if ((edid = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL)
1567                 return NULL;
1568
1569         /* base block fetch */
1570         for (i = 0; i < 4; i++) {
1571                 if (get_edid_block(data, edid, 0, EDID_LENGTH))
1572                         goto out;
1573                 if (drm_edid_block_valid(edid, 0, false,
1574                                          &connector->edid_corrupt))
1575                         break;
1576                 if (i == 0 && drm_edid_is_zero(edid, EDID_LENGTH)) {
1577                         connector->null_edid_counter++;
1578                         goto carp;
1579                 }
1580         }
1581         if (i == 4)
1582                 goto carp;
1583
1584         /* if there's no extensions, we're done */
1585         valid_extensions = edid[0x7e];
1586         if (valid_extensions == 0)
1587                 return (struct edid *)edid;
1588
1589         new = krealloc(edid, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL);
1590         if (!new)
1591                 goto out;
1592         edid = new;
1593
1594         for (j = 1; j <= edid[0x7e]; j++) {
1595                 u8 *block = edid + j * EDID_LENGTH;
1596
1597                 for (i = 0; i < 4; i++) {
1598                         if (get_edid_block(data, block, j, EDID_LENGTH))
1599                                 goto out;
1600                         if (drm_edid_block_valid(block, j, false, NULL))
1601                                 break;
1602                 }
1603
1604                 if (i == 4)
1605                         valid_extensions--;
1606         }
1607
1608         if (valid_extensions != edid[0x7e]) {
1609                 u8 *base;
1610
1611                 connector_bad_edid(connector, edid, edid[0x7e] + 1);
1612
1613                 edid[EDID_LENGTH-1] += edid[0x7e] - valid_extensions;
1614                 edid[0x7e] = valid_extensions;
1615
1616                 new = kmalloc((valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL);
1617                 if (!new)
1618                         goto out;
1619
1620                 base = new;
1621                 for (i = 0; i <= edid[0x7e]; i++) {
1622                         u8 *block = edid + i * EDID_LENGTH;
1623
1624                         if (!drm_edid_block_valid(block, i, false, NULL))
1625                                 continue;
1626
1627                         memcpy(base, block, EDID_LENGTH);
1628                         base += EDID_LENGTH;
1629                 }
1630
1631                 kfree(edid);
1632                 edid = new;
1633         }
1634
1635         return (struct edid *)edid;
1636
1637 carp:
1638         connector_bad_edid(connector, edid, 1);
1639 out:
1640         kfree(edid);
1641         return NULL;
1642 }
1643 EXPORT_SYMBOL_GPL(drm_do_get_edid);
1644
1645 /**
1646  * drm_probe_ddc() - probe DDC presence
1647  * @adapter: I2C adapter to probe
1648  *
1649  * Return: True on success, false on failure.
1650  */
1651 bool
1652 drm_probe_ddc(struct i2c_adapter *adapter)
1653 {
1654         unsigned char out;
1655
1656         return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
1657 }
1658 EXPORT_SYMBOL(drm_probe_ddc);
1659
1660 /**
1661  * drm_get_edid - get EDID data, if available
1662  * @connector: connector we're probing
1663  * @adapter: I2C adapter to use for DDC
1664  *
1665  * Poke the given I2C channel to grab EDID data if possible.  If found,
1666  * attach it to the connector.
1667  *
1668  * Return: Pointer to valid EDID or NULL if we couldn't find any.
1669  */
1670 struct edid *drm_get_edid(struct drm_connector *connector,
1671                           struct i2c_adapter *adapter)
1672 {
1673         struct edid *edid;
1674
1675         if (connector->force == DRM_FORCE_OFF)
1676                 return NULL;
1677
1678         if (connector->force == DRM_FORCE_UNSPECIFIED && !drm_probe_ddc(adapter))
1679                 return NULL;
1680
1681         edid = drm_do_get_edid(connector, drm_do_probe_ddc_edid, adapter);
1682         if (edid)
1683                 drm_get_displayid(connector, edid);
1684         return edid;
1685 }
1686 EXPORT_SYMBOL(drm_get_edid);
1687
1688 /**
1689  * drm_get_edid_switcheroo - get EDID data for a vga_switcheroo output
1690  * @connector: connector we're probing
1691  * @adapter: I2C adapter to use for DDC
1692  *
1693  * Wrapper around drm_get_edid() for laptops with dual GPUs using one set of
1694  * outputs. The wrapper adds the requisite vga_switcheroo calls to temporarily
1695  * switch DDC to the GPU which is retrieving EDID.
1696  *
1697  * Return: Pointer to valid EDID or %NULL if we couldn't find any.
1698  */
1699 struct edid *drm_get_edid_switcheroo(struct drm_connector *connector,
1700                                      struct i2c_adapter *adapter)
1701 {
1702         struct pci_dev *pdev = connector->dev->pdev;
1703         struct edid *edid;
1704
1705         vga_switcheroo_lock_ddc(pdev);
1706         edid = drm_get_edid(connector, adapter);
1707         vga_switcheroo_unlock_ddc(pdev);
1708
1709         return edid;
1710 }
1711 EXPORT_SYMBOL(drm_get_edid_switcheroo);
1712
1713 /**
1714  * drm_edid_duplicate - duplicate an EDID and the extensions
1715  * @edid: EDID to duplicate
1716  *
1717  * Return: Pointer to duplicated EDID or NULL on allocation failure.
1718  */
1719 struct edid *drm_edid_duplicate(const struct edid *edid)
1720 {
1721         return kmemdup(edid, (edid->extensions + 1) * EDID_LENGTH, GFP_KERNEL);
1722 }
1723 EXPORT_SYMBOL(drm_edid_duplicate);
1724
1725 /*** EDID parsing ***/
1726
1727 /**
1728  * edid_vendor - match a string against EDID's obfuscated vendor field
1729  * @edid: EDID to match
1730  * @vendor: vendor string
1731  *
1732  * Returns true if @vendor is in @edid, false otherwise
1733  */
1734 static bool edid_vendor(struct edid *edid, const char *vendor)
1735 {
1736         char edid_vendor[3];
1737
1738         edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
1739         edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
1740                           ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
1741         edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
1742
1743         return !strncmp(edid_vendor, vendor, 3);
1744 }
1745
1746 /**
1747  * edid_get_quirks - return quirk flags for a given EDID
1748  * @edid: EDID to process
1749  *
1750  * This tells subsequent routines what fixes they need to apply.
1751  */
1752 static u32 edid_get_quirks(struct edid *edid)
1753 {
1754         const struct edid_quirk *quirk;
1755         int i;
1756
1757         for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
1758                 quirk = &edid_quirk_list[i];
1759
1760                 if (edid_vendor(edid, quirk->vendor) &&
1761                     (EDID_PRODUCT_ID(edid) == quirk->product_id))
1762                         return quirk->quirks;
1763         }
1764
1765         return 0;
1766 }
1767
1768 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
1769 #define MODE_REFRESH_DIFF(c,t) (abs((c) - (t)))
1770
1771 /**
1772  * edid_fixup_preferred - set preferred modes based on quirk list
1773  * @connector: has mode list to fix up
1774  * @quirks: quirks list
1775  *
1776  * Walk the mode list for @connector, clearing the preferred status
1777  * on existing modes and setting it anew for the right mode ala @quirks.
1778  */
1779 static void edid_fixup_preferred(struct drm_connector *connector,
1780                                  u32 quirks)
1781 {
1782         struct drm_display_mode *t, *cur_mode, *preferred_mode;
1783         int target_refresh = 0;
1784         int cur_vrefresh, preferred_vrefresh;
1785
1786         if (list_empty(&connector->probed_modes))
1787                 return;
1788
1789         if (quirks & EDID_QUIRK_PREFER_LARGE_60)
1790                 target_refresh = 60;
1791         if (quirks & EDID_QUIRK_PREFER_LARGE_75)
1792                 target_refresh = 75;
1793
1794         preferred_mode = list_first_entry(&connector->probed_modes,
1795                                           struct drm_display_mode, head);
1796
1797         list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
1798                 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
1799
1800                 if (cur_mode == preferred_mode)
1801                         continue;
1802
1803                 /* Largest mode is preferred */
1804                 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
1805                         preferred_mode = cur_mode;
1806
1807                 cur_vrefresh = cur_mode->vrefresh ?
1808                         cur_mode->vrefresh : drm_mode_vrefresh(cur_mode);
1809                 preferred_vrefresh = preferred_mode->vrefresh ?
1810                         preferred_mode->vrefresh : drm_mode_vrefresh(preferred_mode);
1811                 /* At a given size, try to get closest to target refresh */
1812                 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
1813                     MODE_REFRESH_DIFF(cur_vrefresh, target_refresh) <
1814                     MODE_REFRESH_DIFF(preferred_vrefresh, target_refresh)) {
1815                         preferred_mode = cur_mode;
1816                 }
1817         }
1818
1819         preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
1820 }
1821
1822 static bool
1823 mode_is_rb(const struct drm_display_mode *mode)
1824 {
1825         return (mode->htotal - mode->hdisplay == 160) &&
1826                (mode->hsync_end - mode->hdisplay == 80) &&
1827                (mode->hsync_end - mode->hsync_start == 32) &&
1828                (mode->vsync_start - mode->vdisplay == 3);
1829 }
1830
1831 /*
1832  * drm_mode_find_dmt - Create a copy of a mode if present in DMT
1833  * @dev: Device to duplicate against
1834  * @hsize: Mode width
1835  * @vsize: Mode height
1836  * @fresh: Mode refresh rate
1837  * @rb: Mode reduced-blanking-ness
1838  *
1839  * Walk the DMT mode list looking for a match for the given parameters.
1840  *
1841  * Return: A newly allocated copy of the mode, or NULL if not found.
1842  */
1843 struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
1844                                            int hsize, int vsize, int fresh,
1845                                            bool rb)
1846 {
1847         int i;
1848
1849         for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
1850                 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
1851                 if (hsize != ptr->hdisplay)
1852                         continue;
1853                 if (vsize != ptr->vdisplay)
1854                         continue;
1855                 if (fresh != drm_mode_vrefresh(ptr))
1856                         continue;
1857                 if (rb != mode_is_rb(ptr))
1858                         continue;
1859
1860                 return drm_mode_duplicate(dev, ptr);
1861         }
1862
1863         return NULL;
1864 }
1865 EXPORT_SYMBOL(drm_mode_find_dmt);
1866
1867 typedef void detailed_cb(struct detailed_timing *timing, void *closure);
1868
1869 static void
1870 cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1871 {
1872         int i, n = 0;
1873         u8 d = ext[0x02];
1874         u8 *det_base = ext + d;
1875
1876         n = (127 - d) / 18;
1877         for (i = 0; i < n; i++)
1878                 cb((struct detailed_timing *)(det_base + 18 * i), closure);
1879 }
1880
1881 static void
1882 vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1883 {
1884         unsigned int i, n = min((int)ext[0x02], 6);
1885         u8 *det_base = ext + 5;
1886
1887         if (ext[0x01] != 1)
1888                 return; /* unknown version */
1889
1890         for (i = 0; i < n; i++)
1891                 cb((struct detailed_timing *)(det_base + 18 * i), closure);
1892 }
1893
1894 static void
1895 drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
1896 {
1897         int i;
1898         struct edid *edid = (struct edid *)raw_edid;
1899
1900         if (edid == NULL)
1901                 return;
1902
1903         for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
1904                 cb(&(edid->detailed_timings[i]), closure);
1905
1906         for (i = 1; i <= raw_edid[0x7e]; i++) {
1907                 u8 *ext = raw_edid + (i * EDID_LENGTH);
1908                 switch (*ext) {
1909                 case CEA_EXT:
1910                         cea_for_each_detailed_block(ext, cb, closure);
1911                         break;
1912                 case VTB_EXT:
1913                         vtb_for_each_detailed_block(ext, cb, closure);
1914                         break;
1915                 default:
1916                         break;
1917                 }
1918         }
1919 }
1920
1921 static void
1922 is_rb(struct detailed_timing *t, void *data)
1923 {
1924         u8 *r = (u8 *)t;
1925         if (r[3] == EDID_DETAIL_MONITOR_RANGE)
1926                 if (r[15] & 0x10)
1927                         *(bool *)data = true;
1928 }
1929
1930 /* EDID 1.4 defines this explicitly.  For EDID 1.3, we guess, badly. */
1931 static bool
1932 drm_monitor_supports_rb(struct edid *edid)
1933 {
1934         if (edid->revision >= 4) {
1935                 bool ret = false;
1936                 drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
1937                 return ret;
1938         }
1939
1940         return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
1941 }
1942
1943 static void
1944 find_gtf2(struct detailed_timing *t, void *data)
1945 {
1946         u8 *r = (u8 *)t;
1947         if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02)
1948                 *(u8 **)data = r;
1949 }
1950
1951 /* Secondary GTF curve kicks in above some break frequency */
1952 static int
1953 drm_gtf2_hbreak(struct edid *edid)
1954 {
1955         u8 *r = NULL;
1956         drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1957         return r ? (r[12] * 2) : 0;
1958 }
1959
1960 static int
1961 drm_gtf2_2c(struct edid *edid)
1962 {
1963         u8 *r = NULL;
1964         drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1965         return r ? r[13] : 0;
1966 }
1967
1968 static int
1969 drm_gtf2_m(struct edid *edid)
1970 {
1971         u8 *r = NULL;
1972         drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1973         return r ? (r[15] << 8) + r[14] : 0;
1974 }
1975
1976 static int
1977 drm_gtf2_k(struct edid *edid)
1978 {
1979         u8 *r = NULL;
1980         drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1981         return r ? r[16] : 0;
1982 }
1983
1984 static int
1985 drm_gtf2_2j(struct edid *edid)
1986 {
1987         u8 *r = NULL;
1988         drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1989         return r ? r[17] : 0;
1990 }
1991
1992 /**
1993  * standard_timing_level - get std. timing level(CVT/GTF/DMT)
1994  * @edid: EDID block to scan
1995  */
1996 static int standard_timing_level(struct edid *edid)
1997 {
1998         if (edid->revision >= 2) {
1999                 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
2000                         return LEVEL_CVT;
2001                 if (drm_gtf2_hbreak(edid))
2002                         return LEVEL_GTF2;
2003                 return LEVEL_GTF;
2004         }
2005         return LEVEL_DMT;
2006 }
2007
2008 /*
2009  * 0 is reserved.  The spec says 0x01 fill for unused timings.  Some old
2010  * monitors fill with ascii space (0x20) instead.
2011  */
2012 static int
2013 bad_std_timing(u8 a, u8 b)
2014 {
2015         return (a == 0x00 && b == 0x00) ||
2016                (a == 0x01 && b == 0x01) ||
2017                (a == 0x20 && b == 0x20);
2018 }
2019
2020 /**
2021  * drm_mode_std - convert standard mode info (width, height, refresh) into mode
2022  * @connector: connector of for the EDID block
2023  * @edid: EDID block to scan
2024  * @t: standard timing params
2025  *
2026  * Take the standard timing params (in this case width, aspect, and refresh)
2027  * and convert them into a real mode using CVT/GTF/DMT.
2028  */
2029 static struct drm_display_mode *
2030 drm_mode_std(struct drm_connector *connector, struct edid *edid,
2031              struct std_timing *t)
2032 {
2033         struct drm_device *dev = connector->dev;
2034         struct drm_display_mode *m, *mode = NULL;
2035         int hsize, vsize;
2036         int vrefresh_rate;
2037         unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
2038                 >> EDID_TIMING_ASPECT_SHIFT;
2039         unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
2040                 >> EDID_TIMING_VFREQ_SHIFT;
2041         int timing_level = standard_timing_level(edid);
2042
2043         if (bad_std_timing(t->hsize, t->vfreq_aspect))
2044                 return NULL;
2045
2046         /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
2047         hsize = t->hsize * 8 + 248;
2048         /* vrefresh_rate = vfreq + 60 */
2049         vrefresh_rate = vfreq + 60;
2050         /* the vdisplay is calculated based on the aspect ratio */
2051         if (aspect_ratio == 0) {
2052                 if (edid->revision < 3)
2053                         vsize = hsize;
2054                 else
2055                         vsize = (hsize * 10) / 16;
2056         } else if (aspect_ratio == 1)
2057                 vsize = (hsize * 3) / 4;
2058         else if (aspect_ratio == 2)
2059                 vsize = (hsize * 4) / 5;
2060         else
2061                 vsize = (hsize * 9) / 16;
2062
2063         /* HDTV hack, part 1 */
2064         if (vrefresh_rate == 60 &&
2065             ((hsize == 1360 && vsize == 765) ||
2066              (hsize == 1368 && vsize == 769))) {
2067                 hsize = 1366;
2068                 vsize = 768;
2069         }
2070
2071         /*
2072          * If this connector already has a mode for this size and refresh
2073          * rate (because it came from detailed or CVT info), use that
2074          * instead.  This way we don't have to guess at interlace or
2075          * reduced blanking.
2076          */
2077         list_for_each_entry(m, &connector->probed_modes, head)
2078                 if (m->hdisplay == hsize && m->vdisplay == vsize &&
2079                     drm_mode_vrefresh(m) == vrefresh_rate)
2080                         return NULL;
2081
2082         /* HDTV hack, part 2 */
2083         if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) {
2084                 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0,
2085                                     false);
2086                 mode->hdisplay = 1366;
2087                 mode->hsync_start = mode->hsync_start - 1;
2088                 mode->hsync_end = mode->hsync_end - 1;
2089                 return mode;
2090         }
2091
2092         /* check whether it can be found in default mode table */
2093         if (drm_monitor_supports_rb(edid)) {
2094                 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate,
2095                                          true);
2096                 if (mode)
2097                         return mode;
2098         }
2099         mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false);
2100         if (mode)
2101                 return mode;
2102
2103         /* okay, generate it */
2104         switch (timing_level) {
2105         case LEVEL_DMT:
2106                 break;
2107         case LEVEL_GTF:
2108                 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
2109                 break;
2110         case LEVEL_GTF2:
2111                 /*
2112                  * This is potentially wrong if there's ever a monitor with
2113                  * more than one ranges section, each claiming a different
2114                  * secondary GTF curve.  Please don't do that.
2115                  */
2116                 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
2117                 if (!mode)
2118                         return NULL;
2119                 if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) {
2120                         drm_mode_destroy(dev, mode);
2121                         mode = drm_gtf_mode_complex(dev, hsize, vsize,
2122                                                     vrefresh_rate, 0, 0,
2123                                                     drm_gtf2_m(edid),
2124                                                     drm_gtf2_2c(edid),
2125                                                     drm_gtf2_k(edid),
2126                                                     drm_gtf2_2j(edid));
2127                 }
2128                 break;
2129         case LEVEL_CVT:
2130                 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
2131                                     false);
2132                 break;
2133         }
2134         return mode;
2135 }
2136
2137 /*
2138  * EDID is delightfully ambiguous about how interlaced modes are to be
2139  * encoded.  Our internal representation is of frame height, but some
2140  * HDTV detailed timings are encoded as field height.
2141  *
2142  * The format list here is from CEA, in frame size.  Technically we
2143  * should be checking refresh rate too.  Whatever.
2144  */
2145 static void
2146 drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
2147                             struct detailed_pixel_timing *pt)
2148 {
2149         int i;
2150         static const struct {
2151                 int w, h;
2152         } cea_interlaced[] = {
2153                 { 1920, 1080 },
2154                 {  720,  480 },
2155                 { 1440,  480 },
2156                 { 2880,  480 },
2157                 {  720,  576 },
2158                 { 1440,  576 },
2159                 { 2880,  576 },
2160         };
2161
2162         if (!(pt->misc & DRM_EDID_PT_INTERLACED))
2163                 return;
2164
2165         for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) {
2166                 if ((mode->hdisplay == cea_interlaced[i].w) &&
2167                     (mode->vdisplay == cea_interlaced[i].h / 2)) {
2168                         mode->vdisplay *= 2;
2169                         mode->vsync_start *= 2;
2170                         mode->vsync_end *= 2;
2171                         mode->vtotal *= 2;
2172                         mode->vtotal |= 1;
2173                 }
2174         }
2175
2176         mode->flags |= DRM_MODE_FLAG_INTERLACE;
2177 }
2178
2179 /**
2180  * drm_mode_detailed - create a new mode from an EDID detailed timing section
2181  * @dev: DRM device (needed to create new mode)
2182  * @edid: EDID block
2183  * @timing: EDID detailed timing info
2184  * @quirks: quirks to apply
2185  *
2186  * An EDID detailed timing block contains enough info for us to create and
2187  * return a new struct drm_display_mode.
2188  */
2189 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
2190                                                   struct edid *edid,
2191                                                   struct detailed_timing *timing,
2192                                                   u32 quirks)
2193 {
2194         struct drm_display_mode *mode;
2195         struct detailed_pixel_timing *pt = &timing->data.pixel_data;
2196         unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
2197         unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
2198         unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
2199         unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
2200         unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
2201         unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
2202         unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) << 2 | pt->vsync_offset_pulse_width_lo >> 4;
2203         unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
2204
2205         /* ignore tiny modes */
2206         if (hactive < 64 || vactive < 64)
2207                 return NULL;
2208
2209         if (pt->misc & DRM_EDID_PT_STEREO) {
2210                 DRM_DEBUG_KMS("stereo mode not supported\n");
2211                 return NULL;
2212         }
2213         if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
2214                 DRM_DEBUG_KMS("composite sync not supported\n");
2215         }
2216
2217         /* it is incorrect if hsync/vsync width is zero */
2218         if (!hsync_pulse_width || !vsync_pulse_width) {
2219                 DRM_DEBUG_KMS("Incorrect Detailed timing. "
2220                                 "Wrong Hsync/Vsync pulse width\n");
2221                 return NULL;
2222         }
2223
2224         if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) {
2225                 mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false);
2226                 if (!mode)
2227                         return NULL;
2228
2229                 goto set_size;
2230         }
2231
2232         mode = drm_mode_create(dev);
2233         if (!mode)
2234                 return NULL;
2235
2236         if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
2237                 timing->pixel_clock = cpu_to_le16(1088);
2238
2239         mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
2240
2241         mode->hdisplay = hactive;
2242         mode->hsync_start = mode->hdisplay + hsync_offset;
2243         mode->hsync_end = mode->hsync_start + hsync_pulse_width;
2244         mode->htotal = mode->hdisplay + hblank;
2245
2246         mode->vdisplay = vactive;
2247         mode->vsync_start = mode->vdisplay + vsync_offset;
2248         mode->vsync_end = mode->vsync_start + vsync_pulse_width;
2249         mode->vtotal = mode->vdisplay + vblank;
2250
2251         /* Some EDIDs have bogus h/vtotal values */
2252         if (mode->hsync_end > mode->htotal)
2253                 mode->htotal = mode->hsync_end + 1;
2254         if (mode->vsync_end > mode->vtotal)
2255                 mode->vtotal = mode->vsync_end + 1;
2256
2257         drm_mode_do_interlace_quirk(mode, pt);
2258
2259         if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
2260                 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
2261         }
2262
2263         mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
2264                 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
2265         mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
2266                 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
2267
2268 set_size:
2269         mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
2270         mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
2271
2272         if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
2273                 mode->width_mm *= 10;
2274                 mode->height_mm *= 10;
2275         }
2276
2277         if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
2278                 mode->width_mm = edid->width_cm * 10;
2279                 mode->height_mm = edid->height_cm * 10;
2280         }
2281
2282         mode->type = DRM_MODE_TYPE_DRIVER;
2283         mode->vrefresh = drm_mode_vrefresh(mode);
2284         drm_mode_set_name(mode);
2285
2286         return mode;
2287 }
2288
2289 static bool
2290 mode_in_hsync_range(const struct drm_display_mode *mode,
2291                     struct edid *edid, u8 *t)
2292 {
2293         int hsync, hmin, hmax;
2294
2295         hmin = t[7];
2296         if (edid->revision >= 4)
2297             hmin += ((t[4] & 0x04) ? 255 : 0);
2298         hmax = t[8];
2299         if (edid->revision >= 4)
2300             hmax += ((t[4] & 0x08) ? 255 : 0);
2301         hsync = drm_mode_hsync(mode);
2302
2303         return (hsync <= hmax && hsync >= hmin);
2304 }
2305
2306 static bool
2307 mode_in_vsync_range(const struct drm_display_mode *mode,
2308                     struct edid *edid, u8 *t)
2309 {
2310         int vsync, vmin, vmax;
2311
2312         vmin = t[5];
2313         if (edid->revision >= 4)
2314             vmin += ((t[4] & 0x01) ? 255 : 0);
2315         vmax = t[6];
2316         if (edid->revision >= 4)
2317             vmax += ((t[4] & 0x02) ? 255 : 0);
2318         vsync = drm_mode_vrefresh(mode);
2319
2320         return (vsync <= vmax && vsync >= vmin);
2321 }
2322
2323 static u32
2324 range_pixel_clock(struct edid *edid, u8 *t)
2325 {
2326         /* unspecified */
2327         if (t[9] == 0 || t[9] == 255)
2328                 return 0;
2329
2330         /* 1.4 with CVT support gives us real precision, yay */
2331         if (edid->revision >= 4 && t[10] == 0x04)
2332                 return (t[9] * 10000) - ((t[12] >> 2) * 250);
2333
2334         /* 1.3 is pathetic, so fuzz up a bit */
2335         return t[9] * 10000 + 5001;
2336 }
2337
2338 static bool
2339 mode_in_range(const struct drm_display_mode *mode, struct edid *edid,
2340               struct detailed_timing *timing)
2341 {
2342         u32 max_clock;
2343         u8 *t = (u8 *)timing;
2344
2345         if (!mode_in_hsync_range(mode, edid, t))
2346                 return false;
2347
2348         if (!mode_in_vsync_range(mode, edid, t))
2349                 return false;
2350
2351         if ((max_clock = range_pixel_clock(edid, t)))
2352                 if (mode->clock > max_clock)
2353                         return false;
2354
2355         /* 1.4 max horizontal check */
2356         if (edid->revision >= 4 && t[10] == 0x04)
2357                 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3))))
2358                         return false;
2359
2360         if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
2361                 return false;
2362
2363         return true;
2364 }
2365
2366 static bool valid_inferred_mode(const struct drm_connector *connector,
2367                                 const struct drm_display_mode *mode)
2368 {
2369         const struct drm_display_mode *m;
2370         bool ok = false;
2371
2372         list_for_each_entry(m, &connector->probed_modes, head) {
2373                 if (mode->hdisplay == m->hdisplay &&
2374                     mode->vdisplay == m->vdisplay &&
2375                     drm_mode_vrefresh(mode) == drm_mode_vrefresh(m))
2376                         return false; /* duplicated */
2377                 if (mode->hdisplay <= m->hdisplay &&
2378                     mode->vdisplay <= m->vdisplay)
2379                         ok = true;
2380         }
2381         return ok;
2382 }
2383
2384 static int
2385 drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid,
2386                         struct detailed_timing *timing)
2387 {
2388         int i, modes = 0;
2389         struct drm_display_mode *newmode;
2390         struct drm_device *dev = connector->dev;
2391
2392         for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
2393                 if (mode_in_range(drm_dmt_modes + i, edid, timing) &&
2394                     valid_inferred_mode(connector, drm_dmt_modes + i)) {
2395                         newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
2396                         if (newmode) {
2397                                 drm_mode_probed_add(connector, newmode);
2398                                 modes++;
2399                         }
2400                 }
2401         }
2402
2403         return modes;
2404 }
2405
2406 /* fix up 1366x768 mode from 1368x768;
2407  * GFT/CVT can't express 1366 width which isn't dividable by 8
2408  */
2409 void drm_mode_fixup_1366x768(struct drm_display_mode *mode)
2410 {
2411         if (mode->hdisplay == 1368 && mode->vdisplay == 768) {
2412                 mode->hdisplay = 1366;
2413                 mode->hsync_start--;
2414                 mode->hsync_end--;
2415                 drm_mode_set_name(mode);
2416         }
2417 }
2418
2419 static int
2420 drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
2421                         struct detailed_timing *timing)
2422 {
2423         int i, modes = 0;
2424         struct drm_display_mode *newmode;
2425         struct drm_device *dev = connector->dev;
2426
2427         for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
2428                 const struct minimode *m = &extra_modes[i];
2429                 newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0);
2430                 if (!newmode)
2431                         return modes;
2432
2433                 drm_mode_fixup_1366x768(newmode);
2434                 if (!mode_in_range(newmode, edid, timing) ||
2435                     !valid_inferred_mode(connector, newmode)) {
2436                         drm_mode_destroy(dev, newmode);
2437                         continue;
2438                 }
2439
2440                 drm_mode_probed_add(connector, newmode);
2441                 modes++;
2442         }
2443
2444         return modes;
2445 }
2446
2447 static int
2448 drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid,
2449                         struct detailed_timing *timing)
2450 {
2451         int i, modes = 0;
2452         struct drm_display_mode *newmode;
2453         struct drm_device *dev = connector->dev;
2454         bool rb = drm_monitor_supports_rb(edid);
2455
2456         for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
2457                 const struct minimode *m = &extra_modes[i];
2458                 newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0);
2459                 if (!newmode)
2460                         return modes;
2461
2462                 drm_mode_fixup_1366x768(newmode);
2463                 if (!mode_in_range(newmode, edid, timing) ||
2464                     !valid_inferred_mode(connector, newmode)) {
2465                         drm_mode_destroy(dev, newmode);
2466                         continue;
2467                 }
2468
2469                 drm_mode_probed_add(connector, newmode);
2470                 modes++;
2471         }
2472
2473         return modes;
2474 }
2475
2476 static void
2477 do_inferred_modes(struct detailed_timing *timing, void *c)
2478 {
2479         struct detailed_mode_closure *closure = c;
2480         struct detailed_non_pixel *data = &timing->data.other_data;
2481         struct detailed_data_monitor_range *range = &data->data.range;
2482
2483         if (data->type != EDID_DETAIL_MONITOR_RANGE)
2484                 return;
2485
2486         closure->modes += drm_dmt_modes_for_range(closure->connector,
2487                                                   closure->edid,
2488                                                   timing);
2489         
2490         if (!version_greater(closure->edid, 1, 1))
2491                 return; /* GTF not defined yet */
2492
2493         switch (range->flags) {
2494         case 0x02: /* secondary gtf, XXX could do more */
2495         case 0x00: /* default gtf */
2496                 closure->modes += drm_gtf_modes_for_range(closure->connector,
2497                                                           closure->edid,
2498                                                           timing);
2499                 break;
2500         case 0x04: /* cvt, only in 1.4+ */
2501                 if (!version_greater(closure->edid, 1, 3))
2502                         break;
2503
2504                 closure->modes += drm_cvt_modes_for_range(closure->connector,
2505                                                           closure->edid,
2506                                                           timing);
2507                 break;
2508         case 0x01: /* just the ranges, no formula */
2509         default:
2510                 break;
2511         }
2512 }
2513
2514 static int
2515 add_inferred_modes(struct drm_connector *connector, struct edid *edid)
2516 {
2517         struct detailed_mode_closure closure = {
2518                 .connector = connector,
2519                 .edid = edid,
2520         };
2521
2522         if (version_greater(edid, 1, 0))
2523                 drm_for_each_detailed_block((u8 *)edid, do_inferred_modes,
2524                                             &closure);
2525
2526         return closure.modes;
2527 }
2528
2529 static int
2530 drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
2531 {
2532         int i, j, m, modes = 0;
2533         struct drm_display_mode *mode;
2534         u8 *est = ((u8 *)timing) + 6;
2535
2536         for (i = 0; i < 6; i++) {
2537                 for (j = 7; j >= 0; j--) {
2538                         m = (i * 8) + (7 - j);
2539                         if (m >= ARRAY_SIZE(est3_modes))
2540                                 break;
2541                         if (est[i] & (1 << j)) {
2542                                 mode = drm_mode_find_dmt(connector->dev,
2543                                                          est3_modes[m].w,
2544                                                          est3_modes[m].h,
2545                                                          est3_modes[m].r,
2546                                                          est3_modes[m].rb);
2547                                 if (mode) {
2548                                         drm_mode_probed_add(connector, mode);
2549                                         modes++;
2550                                 }
2551                         }
2552                 }
2553         }
2554
2555         return modes;
2556 }
2557
2558 static void
2559 do_established_modes(struct detailed_timing *timing, void *c)
2560 {
2561         struct detailed_mode_closure *closure = c;
2562         struct detailed_non_pixel *data = &timing->data.other_data;
2563
2564         if (data->type == EDID_DETAIL_EST_TIMINGS)
2565                 closure->modes += drm_est3_modes(closure->connector, timing);
2566 }
2567
2568 /**
2569  * add_established_modes - get est. modes from EDID and add them
2570  * @connector: connector to add mode(s) to
2571  * @edid: EDID block to scan
2572  *
2573  * Each EDID block contains a bitmap of the supported "established modes" list
2574  * (defined above).  Tease them out and add them to the global modes list.
2575  */
2576 static int
2577 add_established_modes(struct drm_connector *connector, struct edid *edid)
2578 {
2579         struct drm_device *dev = connector->dev;
2580         unsigned long est_bits = edid->established_timings.t1 |
2581                 (edid->established_timings.t2 << 8) |
2582                 ((edid->established_timings.mfg_rsvd & 0x80) << 9);
2583         int i, modes = 0;
2584         struct detailed_mode_closure closure = {
2585                 .connector = connector,
2586                 .edid = edid,
2587         };
2588
2589         for (i = 0; i <= EDID_EST_TIMINGS; i++) {
2590                 if (est_bits & (1<<i)) {
2591                         struct drm_display_mode *newmode;
2592                         newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
2593                         if (newmode) {
2594                                 drm_mode_probed_add(connector, newmode);
2595                                 modes++;
2596                         }
2597                 }
2598         }
2599
2600         if (version_greater(edid, 1, 0))
2601                     drm_for_each_detailed_block((u8 *)edid,
2602                                                 do_established_modes, &closure);
2603
2604         return modes + closure.modes;
2605 }
2606
2607 static void
2608 do_standard_modes(struct detailed_timing *timing, void *c)
2609 {
2610         struct detailed_mode_closure *closure = c;
2611         struct detailed_non_pixel *data = &timing->data.other_data;
2612         struct drm_connector *connector = closure->connector;
2613         struct edid *edid = closure->edid;
2614
2615         if (data->type == EDID_DETAIL_STD_MODES) {
2616                 int i;
2617                 for (i = 0; i < 6; i++) {
2618                         struct std_timing *std;
2619                         struct drm_display_mode *newmode;
2620
2621                         std = &data->data.timings[i];
2622                         newmode = drm_mode_std(connector, edid, std);
2623                         if (newmode) {
2624                                 drm_mode_probed_add(connector, newmode);
2625                                 closure->modes++;
2626                         }
2627                 }
2628         }
2629 }
2630
2631 /**
2632  * add_standard_modes - get std. modes from EDID and add them
2633  * @connector: connector to add mode(s) to
2634  * @edid: EDID block to scan
2635  *
2636  * Standard modes can be calculated using the appropriate standard (DMT,
2637  * GTF or CVT. Grab them from @edid and add them to the list.
2638  */
2639 static int
2640 add_standard_modes(struct drm_connector *connector, struct edid *edid)
2641 {
2642         int i, modes = 0;
2643         struct detailed_mode_closure closure = {
2644                 .connector = connector,
2645                 .edid = edid,
2646         };
2647
2648         for (i = 0; i < EDID_STD_TIMINGS; i++) {
2649                 struct drm_display_mode *newmode;
2650
2651                 newmode = drm_mode_std(connector, edid,
2652                                        &edid->standard_timings[i]);
2653                 if (newmode) {
2654                         drm_mode_probed_add(connector, newmode);
2655                         modes++;
2656                 }
2657         }
2658
2659         if (version_greater(edid, 1, 0))
2660                 drm_for_each_detailed_block((u8 *)edid, do_standard_modes,
2661                                             &closure);
2662
2663         /* XXX should also look for standard codes in VTB blocks */
2664
2665         return modes + closure.modes;
2666 }
2667
2668 static int drm_cvt_modes(struct drm_connector *connector,
2669                          struct detailed_timing *timing)
2670 {
2671         int i, j, modes = 0;
2672         struct drm_display_mode *newmode;
2673         struct drm_device *dev = connector->dev;
2674         struct cvt_timing *cvt;
2675         const int rates[] = { 60, 85, 75, 60, 50 };
2676         const u8 empty[3] = { 0, 0, 0 };
2677
2678         for (i = 0; i < 4; i++) {
2679                 int uninitialized_var(width), height;
2680                 cvt = &(timing->data.other_data.data.cvt[i]);
2681
2682                 if (!memcmp(cvt->code, empty, 3))
2683                         continue;
2684
2685                 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
2686                 switch (cvt->code[1] & 0x0c) {
2687                 case 0x00:
2688                         width = height * 4 / 3;
2689                         break;
2690                 case 0x04:
2691                         width = height * 16 / 9;
2692                         break;
2693                 case 0x08:
2694                         width = height * 16 / 10;
2695                         break;
2696                 case 0x0c:
2697                         width = height * 15 / 9;
2698                         break;
2699                 }
2700
2701                 for (j = 1; j < 5; j++) {
2702                         if (cvt->code[2] & (1 << j)) {
2703                                 newmode = drm_cvt_mode(dev, width, height,
2704                                                        rates[j], j == 0,
2705                                                        false, false);
2706                                 if (newmode) {
2707                                         drm_mode_probed_add(connector, newmode);
2708                                         modes++;
2709                                 }
2710                         }
2711                 }
2712         }
2713
2714         return modes;
2715 }
2716
2717 static void
2718 do_cvt_mode(struct detailed_timing *timing, void *c)
2719 {
2720         struct detailed_mode_closure *closure = c;
2721         struct detailed_non_pixel *data = &timing->data.other_data;
2722
2723         if (data->type == EDID_DETAIL_CVT_3BYTE)
2724                 closure->modes += drm_cvt_modes(closure->connector, timing);
2725 }
2726
2727 static int
2728 add_cvt_modes(struct drm_connector *connector, struct edid *edid)
2729 {       
2730         struct detailed_mode_closure closure = {
2731                 .connector = connector,
2732                 .edid = edid,
2733         };
2734
2735         if (version_greater(edid, 1, 2))
2736                 drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure);
2737
2738         /* XXX should also look for CVT codes in VTB blocks */
2739
2740         return closure.modes;
2741 }
2742
2743 static void fixup_detailed_cea_mode_clock(struct drm_display_mode *mode);
2744
2745 static void
2746 do_detailed_mode(struct detailed_timing *timing, void *c)
2747 {
2748         struct detailed_mode_closure *closure = c;
2749         struct drm_display_mode *newmode;
2750
2751         if (timing->pixel_clock) {
2752                 newmode = drm_mode_detailed(closure->connector->dev,
2753                                             closure->edid, timing,
2754                                             closure->quirks);
2755                 if (!newmode)
2756                         return;
2757
2758                 if (closure->preferred)
2759                         newmode->type |= DRM_MODE_TYPE_PREFERRED;
2760
2761                 /*
2762                  * Detailed modes are limited to 10kHz pixel clock resolution,
2763                  * so fix up anything that looks like CEA/HDMI mode, but the clock
2764                  * is just slightly off.
2765                  */
2766                 fixup_detailed_cea_mode_clock(newmode);
2767
2768                 drm_mode_probed_add(closure->connector, newmode);
2769                 closure->modes++;
2770                 closure->preferred = 0;
2771         }
2772 }
2773
2774 /*
2775  * add_detailed_modes - Add modes from detailed timings
2776  * @connector: attached connector
2777  * @edid: EDID block to scan
2778  * @quirks: quirks to apply
2779  */
2780 static int
2781 add_detailed_modes(struct drm_connector *connector, struct edid *edid,
2782                    u32 quirks)
2783 {
2784         struct detailed_mode_closure closure = {
2785                 .connector = connector,
2786                 .edid = edid,
2787                 .preferred = 1,
2788                 .quirks = quirks,
2789         };
2790
2791         if (closure.preferred && !version_greater(edid, 1, 3))
2792                 closure.preferred =
2793                     (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
2794
2795         drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure);
2796
2797         return closure.modes;
2798 }
2799
2800 #define AUDIO_BLOCK     0x01
2801 #define VIDEO_BLOCK     0x02
2802 #define VENDOR_BLOCK    0x03
2803 #define SPEAKER_BLOCK   0x04
2804 #define USE_EXTENDED_TAG 0x07
2805 #define EXT_VIDEO_CAPABILITY_BLOCK 0x00
2806 #define EXT_VIDEO_DATA_BLOCK_420        0x0E
2807 #define EXT_VIDEO_CAP_BLOCK_Y420CMDB 0x0F
2808 #define EDID_BASIC_AUDIO        (1 << 6)
2809 #define EDID_CEA_YCRCB444       (1 << 5)
2810 #define EDID_CEA_YCRCB422       (1 << 4)
2811 #define EDID_CEA_VCDB_QS        (1 << 6)
2812
2813 /*
2814  * Search EDID for CEA extension block.
2815  */
2816 static u8 *drm_find_edid_extension(struct edid *edid, int ext_id)
2817 {
2818         u8 *edid_ext = NULL;
2819         int i;
2820
2821         /* No EDID or EDID extensions */
2822         if (edid == NULL || edid->extensions == 0)
2823                 return NULL;
2824
2825         /* Find CEA extension */
2826         for (i = 0; i < edid->extensions; i++) {
2827                 edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1);
2828                 if (edid_ext[0] == ext_id)
2829                         break;
2830         }
2831
2832         if (i == edid->extensions)
2833                 return NULL;
2834
2835         return edid_ext;
2836 }
2837
2838 static u8 *drm_find_cea_extension(struct edid *edid)
2839 {
2840         return drm_find_edid_extension(edid, CEA_EXT);
2841 }
2842
2843 static u8 *drm_find_displayid_extension(struct edid *edid)
2844 {
2845         return drm_find_edid_extension(edid, DISPLAYID_EXT);
2846 }
2847
2848 /*
2849  * Calculate the alternate clock for the CEA mode
2850  * (60Hz vs. 59.94Hz etc.)
2851  */
2852 static unsigned int
2853 cea_mode_alternate_clock(const struct drm_display_mode *cea_mode)
2854 {
2855         unsigned int clock = cea_mode->clock;
2856
2857         if (cea_mode->vrefresh % 6 != 0)
2858                 return clock;
2859
2860         /*
2861          * edid_cea_modes contains the 59.94Hz
2862          * variant for 240 and 480 line modes,
2863          * and the 60Hz variant otherwise.
2864          */
2865         if (cea_mode->vdisplay == 240 || cea_mode->vdisplay == 480)
2866                 clock = DIV_ROUND_CLOSEST(clock * 1001, 1000);
2867         else
2868                 clock = DIV_ROUND_CLOSEST(clock * 1000, 1001);
2869
2870         return clock;
2871 }
2872
2873 static bool
2874 cea_mode_alternate_timings(u8 vic, struct drm_display_mode *mode)
2875 {
2876         /*
2877          * For certain VICs the spec allows the vertical
2878          * front porch to vary by one or two lines.
2879          *
2880          * cea_modes[] stores the variant with the shortest
2881          * vertical front porch. We can adjust the mode to
2882          * get the other variants by simply increasing the
2883          * vertical front porch length.
2884          */
2885         BUILD_BUG_ON(edid_cea_modes[8].vtotal != 262 ||
2886                      edid_cea_modes[9].vtotal != 262 ||
2887                      edid_cea_modes[12].vtotal != 262 ||
2888                      edid_cea_modes[13].vtotal != 262 ||
2889                      edid_cea_modes[23].vtotal != 312 ||
2890                      edid_cea_modes[24].vtotal != 312 ||
2891                      edid_cea_modes[27].vtotal != 312 ||
2892                      edid_cea_modes[28].vtotal != 312);
2893
2894         if (((vic == 8 || vic == 9 ||
2895               vic == 12 || vic == 13) && mode->vtotal < 263) ||
2896             ((vic == 23 || vic == 24 ||
2897               vic == 27 || vic == 28) && mode->vtotal < 314)) {
2898                 mode->vsync_start++;
2899                 mode->vsync_end++;
2900                 mode->vtotal++;
2901
2902                 return true;
2903         }
2904
2905         return false;
2906 }
2907
2908 static u8 drm_match_cea_mode_clock_tolerance(const struct drm_display_mode *to_match,
2909                                              unsigned int clock_tolerance)
2910 {
2911         u8 vic;
2912
2913         if (!to_match->clock)
2914                 return 0;
2915
2916         for (vic = 1; vic < ARRAY_SIZE(edid_cea_modes); vic++) {
2917                 struct drm_display_mode cea_mode = edid_cea_modes[vic];
2918                 unsigned int clock1, clock2;
2919
2920                 /* Check both 60Hz and 59.94Hz */
2921                 clock1 = cea_mode.clock;
2922                 clock2 = cea_mode_alternate_clock(&cea_mode);
2923
2924                 if (abs(to_match->clock - clock1) > clock_tolerance &&
2925                     abs(to_match->clock - clock2) > clock_tolerance)
2926                         continue;
2927
2928                 do {
2929                         if (drm_mode_equal_no_clocks_no_stereo(to_match, &cea_mode))
2930                                 return vic;
2931                 } while (cea_mode_alternate_timings(vic, &cea_mode));
2932         }
2933
2934         return 0;
2935 }
2936
2937 /**
2938  * drm_match_cea_mode - look for a CEA mode matching given mode
2939  * @to_match: display mode
2940  *
2941  * Return: The CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861
2942  * mode.
2943  */
2944 u8 drm_match_cea_mode(const struct drm_display_mode *to_match)
2945 {
2946         u8 vic;
2947
2948         if (!to_match->clock)
2949                 return 0;
2950
2951         for (vic = 1; vic < ARRAY_SIZE(edid_cea_modes); vic++) {
2952                 struct drm_display_mode cea_mode = edid_cea_modes[vic];
2953                 unsigned int clock1, clock2;
2954
2955                 /* Check both 60Hz and 59.94Hz */
2956                 clock1 = cea_mode.clock;
2957                 clock2 = cea_mode_alternate_clock(&cea_mode);
2958
2959                 if (KHZ2PICOS(to_match->clock) != KHZ2PICOS(clock1) &&
2960                     KHZ2PICOS(to_match->clock) != KHZ2PICOS(clock2))
2961                         continue;
2962
2963                 do {
2964                         if (drm_mode_equal_no_clocks_no_stereo(to_match, &cea_mode))
2965                                 return vic;
2966                 } while (cea_mode_alternate_timings(vic, &cea_mode));
2967         }
2968
2969         return 0;
2970 }
2971 EXPORT_SYMBOL(drm_match_cea_mode);
2972
2973 static bool drm_valid_cea_vic(u8 vic)
2974 {
2975         return vic > 0 && vic < ARRAY_SIZE(edid_cea_modes);
2976 }
2977
2978 /**
2979  * drm_get_cea_aspect_ratio - get the picture aspect ratio corresponding to
2980  * the input VIC from the CEA mode list
2981  * @video_code: ID given to each of the CEA modes
2982  *
2983  * Returns picture aspect ratio
2984  */
2985 enum hdmi_picture_aspect drm_get_cea_aspect_ratio(const u8 video_code)
2986 {
2987         return edid_cea_modes[video_code].picture_aspect_ratio;
2988 }
2989 EXPORT_SYMBOL(drm_get_cea_aspect_ratio);
2990
2991 /*
2992  * Calculate the alternate clock for HDMI modes (those from the HDMI vendor
2993  * specific block).
2994  *
2995  * It's almost like cea_mode_alternate_clock(), we just need to add an
2996  * exception for the VIC 4 mode (4096x2160@24Hz): no alternate clock for this
2997  * one.
2998  */
2999 static unsigned int
3000 hdmi_mode_alternate_clock(const struct drm_display_mode *hdmi_mode)
3001 {
3002         if (hdmi_mode->vdisplay == 4096 && hdmi_mode->hdisplay == 2160)
3003                 return hdmi_mode->clock;
3004
3005         return cea_mode_alternate_clock(hdmi_mode);
3006 }
3007
3008 static u8 drm_match_hdmi_mode_clock_tolerance(const struct drm_display_mode *to_match,
3009                                               unsigned int clock_tolerance)
3010 {
3011         u8 vic;
3012
3013         if (!to_match->clock)
3014                 return 0;
3015
3016         for (vic = 1; vic < ARRAY_SIZE(edid_4k_modes); vic++) {
3017                 const struct drm_display_mode *hdmi_mode = &edid_4k_modes[vic];
3018                 unsigned int clock1, clock2;
3019
3020                 /* Make sure to also match alternate clocks */
3021                 clock1 = hdmi_mode->clock;
3022                 clock2 = hdmi_mode_alternate_clock(hdmi_mode);
3023
3024                 if (abs(to_match->clock - clock1) > clock_tolerance &&
3025                     abs(to_match->clock - clock2) > clock_tolerance)
3026                         continue;
3027
3028                 if (drm_mode_equal_no_clocks(to_match, hdmi_mode))
3029                         return vic;
3030         }
3031
3032         return 0;
3033 }
3034
3035 /*
3036  * drm_match_hdmi_mode - look for a HDMI mode matching given mode
3037  * @to_match: display mode
3038  *
3039  * An HDMI mode is one defined in the HDMI vendor specific block.
3040  *
3041  * Returns the HDMI Video ID (VIC) of the mode or 0 if it isn't one.
3042  */
3043 static u8 drm_match_hdmi_mode(const struct drm_display_mode *to_match)
3044 {
3045         u8 vic;
3046