Merge tag 'drm-misc-fixes-2018-02-21' of git://anongit.freedesktop.org/drm/drm-misc...
[sfrench/cifs-2.6.git] / drivers / gpu / drm / drm_edid.c
1 /*
2  * Copyright (c) 2006 Luc Verhaegen (quirks list)
3  * Copyright (c) 2007-2008 Intel Corporation
4  *   Jesse Barnes <jesse.barnes@intel.com>
5  * Copyright 2010 Red Hat, Inc.
6  *
7  * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
8  * FB layer.
9  *   Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
10  *
11  * Permission is hereby granted, free of charge, to any person obtaining a
12  * copy of this software and associated documentation files (the "Software"),
13  * to deal in the Software without restriction, including without limitation
14  * the rights to use, copy, modify, merge, publish, distribute, sub license,
15  * and/or sell copies of the Software, and to permit persons to whom the
16  * Software is furnished to do so, subject to the following conditions:
17  *
18  * The above copyright notice and this permission notice (including the
19  * next paragraph) shall be included in all copies or substantial portions
20  * of the Software.
21  *
22  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
25  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
26  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
27  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
28  * DEALINGS IN THE SOFTWARE.
29  */
30 #include <linux/kernel.h>
31 #include <linux/slab.h>
32 #include <linux/hdmi.h>
33 #include <linux/i2c.h>
34 #include <linux/module.h>
35 #include <linux/vga_switcheroo.h>
36 #include <drm/drmP.h>
37 #include <drm/drm_edid.h>
38 #include <drm/drm_encoder.h>
39 #include <drm/drm_displayid.h>
40 #include <drm/drm_scdc_helper.h>
41
42 #include "drm_crtc_internal.h"
43
44 #define version_greater(edid, maj, min) \
45         (((edid)->version > (maj)) || \
46          ((edid)->version == (maj) && (edid)->revision > (min)))
47
48 #define EDID_EST_TIMINGS 16
49 #define EDID_STD_TIMINGS 8
50 #define EDID_DETAILED_TIMINGS 4
51
52 /*
53  * EDID blocks out in the wild have a variety of bugs, try to collect
54  * them here (note that userspace may work around broken monitors first,
55  * but fixes should make their way here so that the kernel "just works"
56  * on as many displays as possible).
57  */
58
59 /* First detailed mode wrong, use largest 60Hz mode */
60 #define EDID_QUIRK_PREFER_LARGE_60              (1 << 0)
61 /* Reported 135MHz pixel clock is too high, needs adjustment */
62 #define EDID_QUIRK_135_CLOCK_TOO_HIGH           (1 << 1)
63 /* Prefer the largest mode at 75 Hz */
64 #define EDID_QUIRK_PREFER_LARGE_75              (1 << 2)
65 /* Detail timing is in cm not mm */
66 #define EDID_QUIRK_DETAILED_IN_CM               (1 << 3)
67 /* Detailed timing descriptors have bogus size values, so just take the
68  * maximum size and use that.
69  */
70 #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE    (1 << 4)
71 /* Monitor forgot to set the first detailed is preferred bit. */
72 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED     (1 << 5)
73 /* use +hsync +vsync for detailed mode */
74 #define EDID_QUIRK_DETAILED_SYNC_PP             (1 << 6)
75 /* Force reduced-blanking timings for detailed modes */
76 #define EDID_QUIRK_FORCE_REDUCED_BLANKING       (1 << 7)
77 /* Force 8bpc */
78 #define EDID_QUIRK_FORCE_8BPC                   (1 << 8)
79 /* Force 12bpc */
80 #define EDID_QUIRK_FORCE_12BPC                  (1 << 9)
81 /* Force 6bpc */
82 #define EDID_QUIRK_FORCE_6BPC                   (1 << 10)
83 /* Force 10bpc */
84 #define EDID_QUIRK_FORCE_10BPC                  (1 << 11)
85 /* Non desktop display (i.e. HMD) */
86 #define EDID_QUIRK_NON_DESKTOP                  (1 << 12)
87
88 struct detailed_mode_closure {
89         struct drm_connector *connector;
90         struct edid *edid;
91         bool preferred;
92         u32 quirks;
93         int modes;
94 };
95
96 #define LEVEL_DMT       0
97 #define LEVEL_GTF       1
98 #define LEVEL_GTF2      2
99 #define LEVEL_CVT       3
100
101 static const struct edid_quirk {
102         char vendor[4];
103         int product_id;
104         u32 quirks;
105 } edid_quirk_list[] = {
106         /* Acer AL1706 */
107         { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
108         /* Acer F51 */
109         { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
110         /* Unknown Acer */
111         { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
112
113         /* AEO model 0 reports 8 bpc, but is a 6 bpc panel */
114         { "AEO", 0, EDID_QUIRK_FORCE_6BPC },
115
116         /* CPT panel of Asus UX303LA reports 8 bpc, but is a 6 bpc panel */
117         { "CPT", 0x17df, EDID_QUIRK_FORCE_6BPC },
118
119         /* Belinea 10 15 55 */
120         { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
121         { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
122
123         /* Envision Peripherals, Inc. EN-7100e */
124         { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
125         /* Envision EN2028 */
126         { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
127
128         /* Funai Electronics PM36B */
129         { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
130           EDID_QUIRK_DETAILED_IN_CM },
131
132         /* LGD panel of HP zBook 17 G2, eDP 10 bpc, but reports unknown bpc */
133         { "LGD", 764, EDID_QUIRK_FORCE_10BPC },
134
135         /* LG Philips LCD LP154W01-A5 */
136         { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
137         { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
138
139         /* Philips 107p5 CRT */
140         { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
141
142         /* Proview AY765C */
143         { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
144
145         /* Samsung SyncMaster 205BW.  Note: irony */
146         { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
147         /* Samsung SyncMaster 22[5-6]BW */
148         { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
149         { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
150
151         /* Sony PVM-2541A does up to 12 bpc, but only reports max 8 bpc */
152         { "SNY", 0x2541, EDID_QUIRK_FORCE_12BPC },
153
154         /* ViewSonic VA2026w */
155         { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING },
156
157         /* Medion MD 30217 PG */
158         { "MED", 0x7b8, EDID_QUIRK_PREFER_LARGE_75 },
159
160         /* Panel in Samsung NP700G7A-S01PL notebook reports 6bpc */
161         { "SEC", 0xd033, EDID_QUIRK_FORCE_8BPC },
162
163         /* Rotel RSX-1058 forwards sink's EDID but only does HDMI 1.1*/
164         { "ETR", 13896, EDID_QUIRK_FORCE_8BPC },
165
166         /* HTC Vive VR Headset */
167         { "HVR", 0xaa01, EDID_QUIRK_NON_DESKTOP },
168
169         /* Oculus Rift DK1, DK2, and CV1 VR Headsets */
170         { "OVR", 0x0001, EDID_QUIRK_NON_DESKTOP },
171         { "OVR", 0x0003, EDID_QUIRK_NON_DESKTOP },
172         { "OVR", 0x0004, EDID_QUIRK_NON_DESKTOP },
173
174         /* Windows Mixed Reality Headsets */
175         { "ACR", 0x7fce, EDID_QUIRK_NON_DESKTOP },
176         { "HPN", 0x3515, EDID_QUIRK_NON_DESKTOP },
177         { "LEN", 0x0408, EDID_QUIRK_NON_DESKTOP },
178         { "LEN", 0xb800, EDID_QUIRK_NON_DESKTOP },
179         { "FUJ", 0x1970, EDID_QUIRK_NON_DESKTOP },
180         { "DEL", 0x7fce, EDID_QUIRK_NON_DESKTOP },
181         { "SEC", 0x144a, EDID_QUIRK_NON_DESKTOP },
182         { "AUS", 0xc102, EDID_QUIRK_NON_DESKTOP },
183
184         /* Sony PlayStation VR Headset */
185         { "SNY", 0x0704, EDID_QUIRK_NON_DESKTOP },
186 };
187
188 /*
189  * Autogenerated from the DMT spec.
190  * This table is copied from xfree86/modes/xf86EdidModes.c.
191  */
192 static const struct drm_display_mode drm_dmt_modes[] = {
193         /* 0x01 - 640x350@85Hz */
194         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
195                    736, 832, 0, 350, 382, 385, 445, 0,
196                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
197         /* 0x02 - 640x400@85Hz */
198         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
199                    736, 832, 0, 400, 401, 404, 445, 0,
200                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
201         /* 0x03 - 720x400@85Hz */
202         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
203                    828, 936, 0, 400, 401, 404, 446, 0,
204                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
205         /* 0x04 - 640x480@60Hz */
206         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
207                    752, 800, 0, 480, 490, 492, 525, 0,
208                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
209         /* 0x05 - 640x480@72Hz */
210         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
211                    704, 832, 0, 480, 489, 492, 520, 0,
212                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
213         /* 0x06 - 640x480@75Hz */
214         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
215                    720, 840, 0, 480, 481, 484, 500, 0,
216                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
217         /* 0x07 - 640x480@85Hz */
218         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
219                    752, 832, 0, 480, 481, 484, 509, 0,
220                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
221         /* 0x08 - 800x600@56Hz */
222         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
223                    896, 1024, 0, 600, 601, 603, 625, 0,
224                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
225         /* 0x09 - 800x600@60Hz */
226         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
227                    968, 1056, 0, 600, 601, 605, 628, 0,
228                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
229         /* 0x0a - 800x600@72Hz */
230         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
231                    976, 1040, 0, 600, 637, 643, 666, 0,
232                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
233         /* 0x0b - 800x600@75Hz */
234         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
235                    896, 1056, 0, 600, 601, 604, 625, 0,
236                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
237         /* 0x0c - 800x600@85Hz */
238         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
239                    896, 1048, 0, 600, 601, 604, 631, 0,
240                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
241         /* 0x0d - 800x600@120Hz RB */
242         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 73250, 800, 848,
243                    880, 960, 0, 600, 603, 607, 636, 0,
244                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
245         /* 0x0e - 848x480@60Hz */
246         { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
247                    976, 1088, 0, 480, 486, 494, 517, 0,
248                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
249         /* 0x0f - 1024x768@43Hz, interlace */
250         { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
251                    1208, 1264, 0, 768, 768, 776, 817, 0,
252                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
253                    DRM_MODE_FLAG_INTERLACE) },
254         /* 0x10 - 1024x768@60Hz */
255         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
256                    1184, 1344, 0, 768, 771, 777, 806, 0,
257                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
258         /* 0x11 - 1024x768@70Hz */
259         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
260                    1184, 1328, 0, 768, 771, 777, 806, 0,
261                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
262         /* 0x12 - 1024x768@75Hz */
263         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
264                    1136, 1312, 0, 768, 769, 772, 800, 0,
265                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
266         /* 0x13 - 1024x768@85Hz */
267         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
268                    1168, 1376, 0, 768, 769, 772, 808, 0,
269                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
270         /* 0x14 - 1024x768@120Hz RB */
271         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 115500, 1024, 1072,
272                    1104, 1184, 0, 768, 771, 775, 813, 0,
273                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
274         /* 0x15 - 1152x864@75Hz */
275         { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
276                    1344, 1600, 0, 864, 865, 868, 900, 0,
277                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
278         /* 0x55 - 1280x720@60Hz */
279         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
280                    1430, 1650, 0, 720, 725, 730, 750, 0,
281                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
282         /* 0x16 - 1280x768@60Hz RB */
283         { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 68250, 1280, 1328,
284                    1360, 1440, 0, 768, 771, 778, 790, 0,
285                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
286         /* 0x17 - 1280x768@60Hz */
287         { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
288                    1472, 1664, 0, 768, 771, 778, 798, 0,
289                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
290         /* 0x18 - 1280x768@75Hz */
291         { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
292                    1488, 1696, 0, 768, 771, 778, 805, 0,
293                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
294         /* 0x19 - 1280x768@85Hz */
295         { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
296                    1496, 1712, 0, 768, 771, 778, 809, 0,
297                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
298         /* 0x1a - 1280x768@120Hz RB */
299         { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 140250, 1280, 1328,
300                    1360, 1440, 0, 768, 771, 778, 813, 0,
301                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
302         /* 0x1b - 1280x800@60Hz RB */
303         { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 71000, 1280, 1328,
304                    1360, 1440, 0, 800, 803, 809, 823, 0,
305                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
306         /* 0x1c - 1280x800@60Hz */
307         { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
308                    1480, 1680, 0, 800, 803, 809, 831, 0,
309                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
310         /* 0x1d - 1280x800@75Hz */
311         { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
312                    1488, 1696, 0, 800, 803, 809, 838, 0,
313                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
314         /* 0x1e - 1280x800@85Hz */
315         { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
316                    1496, 1712, 0, 800, 803, 809, 843, 0,
317                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
318         /* 0x1f - 1280x800@120Hz RB */
319         { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 146250, 1280, 1328,
320                    1360, 1440, 0, 800, 803, 809, 847, 0,
321                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
322         /* 0x20 - 1280x960@60Hz */
323         { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
324                    1488, 1800, 0, 960, 961, 964, 1000, 0,
325                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
326         /* 0x21 - 1280x960@85Hz */
327         { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
328                    1504, 1728, 0, 960, 961, 964, 1011, 0,
329                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
330         /* 0x22 - 1280x960@120Hz RB */
331         { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 175500, 1280, 1328,
332                    1360, 1440, 0, 960, 963, 967, 1017, 0,
333                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
334         /* 0x23 - 1280x1024@60Hz */
335         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
336                    1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
337                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
338         /* 0x24 - 1280x1024@75Hz */
339         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
340                    1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
341                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
342         /* 0x25 - 1280x1024@85Hz */
343         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
344                    1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
345                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
346         /* 0x26 - 1280x1024@120Hz RB */
347         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 187250, 1280, 1328,
348                    1360, 1440, 0, 1024, 1027, 1034, 1084, 0,
349                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
350         /* 0x27 - 1360x768@60Hz */
351         { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
352                    1536, 1792, 0, 768, 771, 777, 795, 0,
353                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
354         /* 0x28 - 1360x768@120Hz RB */
355         { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 148250, 1360, 1408,
356                    1440, 1520, 0, 768, 771, 776, 813, 0,
357                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
358         /* 0x51 - 1366x768@60Hz */
359         { DRM_MODE("1366x768", DRM_MODE_TYPE_DRIVER, 85500, 1366, 1436,
360                    1579, 1792, 0, 768, 771, 774, 798, 0,
361                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
362         /* 0x56 - 1366x768@60Hz */
363         { DRM_MODE("1366x768", DRM_MODE_TYPE_DRIVER, 72000, 1366, 1380,
364                    1436, 1500, 0, 768, 769, 772, 800, 0,
365                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
366         /* 0x29 - 1400x1050@60Hz RB */
367         { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 101000, 1400, 1448,
368                    1480, 1560, 0, 1050, 1053, 1057, 1080, 0,
369                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
370         /* 0x2a - 1400x1050@60Hz */
371         { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
372                    1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
373                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
374         /* 0x2b - 1400x1050@75Hz */
375         { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
376                    1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
377                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
378         /* 0x2c - 1400x1050@85Hz */
379         { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
380                    1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
381                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
382         /* 0x2d - 1400x1050@120Hz RB */
383         { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 208000, 1400, 1448,
384                    1480, 1560, 0, 1050, 1053, 1057, 1112, 0,
385                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
386         /* 0x2e - 1440x900@60Hz RB */
387         { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 88750, 1440, 1488,
388                    1520, 1600, 0, 900, 903, 909, 926, 0,
389                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
390         /* 0x2f - 1440x900@60Hz */
391         { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
392                    1672, 1904, 0, 900, 903, 909, 934, 0,
393                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
394         /* 0x30 - 1440x900@75Hz */
395         { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
396                    1688, 1936, 0, 900, 903, 909, 942, 0,
397                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
398         /* 0x31 - 1440x900@85Hz */
399         { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
400                    1696, 1952, 0, 900, 903, 909, 948, 0,
401                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
402         /* 0x32 - 1440x900@120Hz RB */
403         { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 182750, 1440, 1488,
404                    1520, 1600, 0, 900, 903, 909, 953, 0,
405                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
406         /* 0x53 - 1600x900@60Hz */
407         { DRM_MODE("1600x900", DRM_MODE_TYPE_DRIVER, 108000, 1600, 1624,
408                    1704, 1800, 0, 900, 901, 904, 1000, 0,
409                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
410         /* 0x33 - 1600x1200@60Hz */
411         { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
412                    1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
413                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
414         /* 0x34 - 1600x1200@65Hz */
415         { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
416                    1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
417                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
418         /* 0x35 - 1600x1200@70Hz */
419         { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
420                    1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
421                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
422         /* 0x36 - 1600x1200@75Hz */
423         { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 202500, 1600, 1664,
424                    1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
425                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
426         /* 0x37 - 1600x1200@85Hz */
427         { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
428                    1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
429                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
430         /* 0x38 - 1600x1200@120Hz RB */
431         { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 268250, 1600, 1648,
432                    1680, 1760, 0, 1200, 1203, 1207, 1271, 0,
433                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
434         /* 0x39 - 1680x1050@60Hz RB */
435         { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 119000, 1680, 1728,
436                    1760, 1840, 0, 1050, 1053, 1059, 1080, 0,
437                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
438         /* 0x3a - 1680x1050@60Hz */
439         { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
440                    1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
441                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
442         /* 0x3b - 1680x1050@75Hz */
443         { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
444                    1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
445                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
446         /* 0x3c - 1680x1050@85Hz */
447         { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
448                    1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
449                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
450         /* 0x3d - 1680x1050@120Hz RB */
451         { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 245500, 1680, 1728,
452                    1760, 1840, 0, 1050, 1053, 1059, 1112, 0,
453                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
454         /* 0x3e - 1792x1344@60Hz */
455         { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
456                    2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
457                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
458         /* 0x3f - 1792x1344@75Hz */
459         { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
460                    2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
461                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
462         /* 0x40 - 1792x1344@120Hz RB */
463         { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 333250, 1792, 1840,
464                    1872, 1952, 0, 1344, 1347, 1351, 1423, 0,
465                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
466         /* 0x41 - 1856x1392@60Hz */
467         { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
468                    2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
469                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
470         /* 0x42 - 1856x1392@75Hz */
471         { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
472                    2208, 2560, 0, 1392, 1393, 1396, 1500, 0,
473                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
474         /* 0x43 - 1856x1392@120Hz RB */
475         { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 356500, 1856, 1904,
476                    1936, 2016, 0, 1392, 1395, 1399, 1474, 0,
477                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
478         /* 0x52 - 1920x1080@60Hz */
479         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
480                    2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
481                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
482         /* 0x44 - 1920x1200@60Hz RB */
483         { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 154000, 1920, 1968,
484                    2000, 2080, 0, 1200, 1203, 1209, 1235, 0,
485                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
486         /* 0x45 - 1920x1200@60Hz */
487         { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
488                    2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
489                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
490         /* 0x46 - 1920x1200@75Hz */
491         { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
492                    2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
493                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
494         /* 0x47 - 1920x1200@85Hz */
495         { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
496                    2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
497                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
498         /* 0x48 - 1920x1200@120Hz RB */
499         { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 317000, 1920, 1968,
500                    2000, 2080, 0, 1200, 1203, 1209, 1271, 0,
501                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
502         /* 0x49 - 1920x1440@60Hz */
503         { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
504                    2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
505                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
506         /* 0x4a - 1920x1440@75Hz */
507         { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
508                    2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
509                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
510         /* 0x4b - 1920x1440@120Hz RB */
511         { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 380500, 1920, 1968,
512                    2000, 2080, 0, 1440, 1443, 1447, 1525, 0,
513                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
514         /* 0x54 - 2048x1152@60Hz */
515         { DRM_MODE("2048x1152", DRM_MODE_TYPE_DRIVER, 162000, 2048, 2074,
516                    2154, 2250, 0, 1152, 1153, 1156, 1200, 0,
517                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
518         /* 0x4c - 2560x1600@60Hz RB */
519         { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 268500, 2560, 2608,
520                    2640, 2720, 0, 1600, 1603, 1609, 1646, 0,
521                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
522         /* 0x4d - 2560x1600@60Hz */
523         { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
524                    3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
525                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
526         /* 0x4e - 2560x1600@75Hz */
527         { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
528                    3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
529                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
530         /* 0x4f - 2560x1600@85Hz */
531         { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
532                    3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
533                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
534         /* 0x50 - 2560x1600@120Hz RB */
535         { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 552750, 2560, 2608,
536                    2640, 2720, 0, 1600, 1603, 1609, 1694, 0,
537                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
538         /* 0x57 - 4096x2160@60Hz RB */
539         { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 556744, 4096, 4104,
540                    4136, 4176, 0, 2160, 2208, 2216, 2222, 0,
541                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
542         /* 0x58 - 4096x2160@59.94Hz RB */
543         { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 556188, 4096, 4104,
544                    4136, 4176, 0, 2160, 2208, 2216, 2222, 0,
545                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
546 };
547
548 /*
549  * These more or less come from the DMT spec.  The 720x400 modes are
550  * inferred from historical 80x25 practice.  The 640x480@67 and 832x624@75
551  * modes are old-school Mac modes.  The EDID spec says the 1152x864@75 mode
552  * should be 1152x870, again for the Mac, but instead we use the x864 DMT
553  * mode.
554  *
555  * The DMT modes have been fact-checked; the rest are mild guesses.
556  */
557 static const struct drm_display_mode edid_est_modes[] = {
558         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
559                    968, 1056, 0, 600, 601, 605, 628, 0,
560                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */
561         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
562                    896, 1024, 0, 600, 601, 603,  625, 0,
563                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */
564         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
565                    720, 840, 0, 480, 481, 484, 500, 0,
566                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */
567         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
568                    704,  832, 0, 480, 489, 492, 520, 0,
569                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */
570         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
571                    768,  864, 0, 480, 483, 486, 525, 0,
572                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */
573         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
574                    752, 800, 0, 480, 490, 492, 525, 0,
575                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */
576         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
577                    846, 900, 0, 400, 421, 423,  449, 0,
578                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */
579         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
580                    846,  900, 0, 400, 412, 414, 449, 0,
581                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */
582         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
583                    1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
584                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */
585         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
586                    1136, 1312, 0,  768, 769, 772, 800, 0,
587                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */
588         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
589                    1184, 1328, 0,  768, 771, 777, 806, 0,
590                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */
591         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
592                    1184, 1344, 0,  768, 771, 777, 806, 0,
593                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */
594         { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032,
595                    1208, 1264, 0, 768, 768, 776, 817, 0,
596                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */
597         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
598                    928, 1152, 0, 624, 625, 628, 667, 0,
599                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */
600         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
601                    896, 1056, 0, 600, 601, 604,  625, 0,
602                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */
603         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
604                    976, 1040, 0, 600, 637, 643, 666, 0,
605                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */
606         { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
607                    1344, 1600, 0,  864, 865, 868, 900, 0,
608                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */
609 };
610
611 struct minimode {
612         short w;
613         short h;
614         short r;
615         short rb;
616 };
617
618 static const struct minimode est3_modes[] = {
619         /* byte 6 */
620         { 640, 350, 85, 0 },
621         { 640, 400, 85, 0 },
622         { 720, 400, 85, 0 },
623         { 640, 480, 85, 0 },
624         { 848, 480, 60, 0 },
625         { 800, 600, 85, 0 },
626         { 1024, 768, 85, 0 },
627         { 1152, 864, 75, 0 },
628         /* byte 7 */
629         { 1280, 768, 60, 1 },
630         { 1280, 768, 60, 0 },
631         { 1280, 768, 75, 0 },
632         { 1280, 768, 85, 0 },
633         { 1280, 960, 60, 0 },
634         { 1280, 960, 85, 0 },
635         { 1280, 1024, 60, 0 },
636         { 1280, 1024, 85, 0 },
637         /* byte 8 */
638         { 1360, 768, 60, 0 },
639         { 1440, 900, 60, 1 },
640         { 1440, 900, 60, 0 },
641         { 1440, 900, 75, 0 },
642         { 1440, 900, 85, 0 },
643         { 1400, 1050, 60, 1 },
644         { 1400, 1050, 60, 0 },
645         { 1400, 1050, 75, 0 },
646         /* byte 9 */
647         { 1400, 1050, 85, 0 },
648         { 1680, 1050, 60, 1 },
649         { 1680, 1050, 60, 0 },
650         { 1680, 1050, 75, 0 },
651         { 1680, 1050, 85, 0 },
652         { 1600, 1200, 60, 0 },
653         { 1600, 1200, 65, 0 },
654         { 1600, 1200, 70, 0 },
655         /* byte 10 */
656         { 1600, 1200, 75, 0 },
657         { 1600, 1200, 85, 0 },
658         { 1792, 1344, 60, 0 },
659         { 1792, 1344, 75, 0 },
660         { 1856, 1392, 60, 0 },
661         { 1856, 1392, 75, 0 },
662         { 1920, 1200, 60, 1 },
663         { 1920, 1200, 60, 0 },
664         /* byte 11 */
665         { 1920, 1200, 75, 0 },
666         { 1920, 1200, 85, 0 },
667         { 1920, 1440, 60, 0 },
668         { 1920, 1440, 75, 0 },
669 };
670
671 static const struct minimode extra_modes[] = {
672         { 1024, 576,  60, 0 },
673         { 1366, 768,  60, 0 },
674         { 1600, 900,  60, 0 },
675         { 1680, 945,  60, 0 },
676         { 1920, 1080, 60, 0 },
677         { 2048, 1152, 60, 0 },
678         { 2048, 1536, 60, 0 },
679 };
680
681 /*
682  * Probably taken from CEA-861 spec.
683  * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c.
684  *
685  * Index using the VIC.
686  */
687 static const struct drm_display_mode edid_cea_modes[] = {
688         /* 0 - dummy, VICs start at 1 */
689         { },
690         /* 1 - 640x480@60Hz */
691         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
692                    752, 800, 0, 480, 490, 492, 525, 0,
693                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
694           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
695         /* 2 - 720x480@60Hz */
696         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
697                    798, 858, 0, 480, 489, 495, 525, 0,
698                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
699           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
700         /* 3 - 720x480@60Hz */
701         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
702                    798, 858, 0, 480, 489, 495, 525, 0,
703                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
704           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
705         /* 4 - 1280x720@60Hz */
706         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
707                    1430, 1650, 0, 720, 725, 730, 750, 0,
708                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
709           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
710         /* 5 - 1920x1080i@60Hz */
711         { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
712                    2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
713                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
714                         DRM_MODE_FLAG_INTERLACE),
715           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
716         /* 6 - 720(1440)x480i@60Hz */
717         { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
718                    801, 858, 0, 480, 488, 494, 525, 0,
719                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
720                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
721           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
722         /* 7 - 720(1440)x480i@60Hz */
723         { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
724                    801, 858, 0, 480, 488, 494, 525, 0,
725                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
726                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
727           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
728         /* 8 - 720(1440)x240@60Hz */
729         { DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
730                    801, 858, 0, 240, 244, 247, 262, 0,
731                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
732                         DRM_MODE_FLAG_DBLCLK),
733           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
734         /* 9 - 720(1440)x240@60Hz */
735         { DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
736                    801, 858, 0, 240, 244, 247, 262, 0,
737                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
738                         DRM_MODE_FLAG_DBLCLK),
739           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
740         /* 10 - 2880x480i@60Hz */
741         { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
742                    3204, 3432, 0, 480, 488, 494, 525, 0,
743                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
744                         DRM_MODE_FLAG_INTERLACE),
745           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
746         /* 11 - 2880x480i@60Hz */
747         { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
748                    3204, 3432, 0, 480, 488, 494, 525, 0,
749                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
750                         DRM_MODE_FLAG_INTERLACE),
751           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
752         /* 12 - 2880x240@60Hz */
753         { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
754                    3204, 3432, 0, 240, 244, 247, 262, 0,
755                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
756           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
757         /* 13 - 2880x240@60Hz */
758         { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
759                    3204, 3432, 0, 240, 244, 247, 262, 0,
760                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
761           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
762         /* 14 - 1440x480@60Hz */
763         { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
764                    1596, 1716, 0, 480, 489, 495, 525, 0,
765                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
766           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
767         /* 15 - 1440x480@60Hz */
768         { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
769                    1596, 1716, 0, 480, 489, 495, 525, 0,
770                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
771           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
772         /* 16 - 1920x1080@60Hz */
773         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
774                    2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
775                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
776           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
777         /* 17 - 720x576@50Hz */
778         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
779                    796, 864, 0, 576, 581, 586, 625, 0,
780                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
781           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
782         /* 18 - 720x576@50Hz */
783         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
784                    796, 864, 0, 576, 581, 586, 625, 0,
785                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
786           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
787         /* 19 - 1280x720@50Hz */
788         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720,
789                    1760, 1980, 0, 720, 725, 730, 750, 0,
790                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
791           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
792         /* 20 - 1920x1080i@50Hz */
793         { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
794                    2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
795                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
796                         DRM_MODE_FLAG_INTERLACE),
797           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
798         /* 21 - 720(1440)x576i@50Hz */
799         { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
800                    795, 864, 0, 576, 580, 586, 625, 0,
801                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
802                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
803           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
804         /* 22 - 720(1440)x576i@50Hz */
805         { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
806                    795, 864, 0, 576, 580, 586, 625, 0,
807                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
808                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
809           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
810         /* 23 - 720(1440)x288@50Hz */
811         { DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
812                    795, 864, 0, 288, 290, 293, 312, 0,
813                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
814                         DRM_MODE_FLAG_DBLCLK),
815           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
816         /* 24 - 720(1440)x288@50Hz */
817         { DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
818                    795, 864, 0, 288, 290, 293, 312, 0,
819                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
820                         DRM_MODE_FLAG_DBLCLK),
821           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
822         /* 25 - 2880x576i@50Hz */
823         { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
824                    3180, 3456, 0, 576, 580, 586, 625, 0,
825                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
826                         DRM_MODE_FLAG_INTERLACE),
827           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
828         /* 26 - 2880x576i@50Hz */
829         { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
830                    3180, 3456, 0, 576, 580, 586, 625, 0,
831                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
832                         DRM_MODE_FLAG_INTERLACE),
833           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
834         /* 27 - 2880x288@50Hz */
835         { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
836                    3180, 3456, 0, 288, 290, 293, 312, 0,
837                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
838           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
839         /* 28 - 2880x288@50Hz */
840         { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
841                    3180, 3456, 0, 288, 290, 293, 312, 0,
842                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
843           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
844         /* 29 - 1440x576@50Hz */
845         { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
846                    1592, 1728, 0, 576, 581, 586, 625, 0,
847                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
848           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
849         /* 30 - 1440x576@50Hz */
850         { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
851                    1592, 1728, 0, 576, 581, 586, 625, 0,
852                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
853           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
854         /* 31 - 1920x1080@50Hz */
855         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
856                    2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
857                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
858           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
859         /* 32 - 1920x1080@24Hz */
860         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558,
861                    2602, 2750, 0, 1080, 1084, 1089, 1125, 0,
862                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
863           .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
864         /* 33 - 1920x1080@25Hz */
865         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
866                    2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
867                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
868           .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
869         /* 34 - 1920x1080@30Hz */
870         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
871                    2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
872                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
873           .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
874         /* 35 - 2880x480@60Hz */
875         { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
876                    3192, 3432, 0, 480, 489, 495, 525, 0,
877                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
878           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
879         /* 36 - 2880x480@60Hz */
880         { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
881                    3192, 3432, 0, 480, 489, 495, 525, 0,
882                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
883           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
884         /* 37 - 2880x576@50Hz */
885         { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
886                    3184, 3456, 0, 576, 581, 586, 625, 0,
887                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
888           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
889         /* 38 - 2880x576@50Hz */
890         { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
891                    3184, 3456, 0, 576, 581, 586, 625, 0,
892                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
893           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
894         /* 39 - 1920x1080i@50Hz */
895         { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 72000, 1920, 1952,
896                    2120, 2304, 0, 1080, 1126, 1136, 1250, 0,
897                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC |
898                         DRM_MODE_FLAG_INTERLACE),
899           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
900         /* 40 - 1920x1080i@100Hz */
901         { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
902                    2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
903                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
904                         DRM_MODE_FLAG_INTERLACE),
905           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
906         /* 41 - 1280x720@100Hz */
907         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720,
908                    1760, 1980, 0, 720, 725, 730, 750, 0,
909                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
910           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
911         /* 42 - 720x576@100Hz */
912         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
913                    796, 864, 0, 576, 581, 586, 625, 0,
914                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
915           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
916         /* 43 - 720x576@100Hz */
917         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
918                    796, 864, 0, 576, 581, 586, 625, 0,
919                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
920           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
921         /* 44 - 720(1440)x576i@100Hz */
922         { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
923                    795, 864, 0, 576, 580, 586, 625, 0,
924                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
925                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
926           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
927         /* 45 - 720(1440)x576i@100Hz */
928         { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
929                    795, 864, 0, 576, 580, 586, 625, 0,
930                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
931                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
932           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
933         /* 46 - 1920x1080i@120Hz */
934         { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
935                    2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
936                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
937                         DRM_MODE_FLAG_INTERLACE),
938           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
939         /* 47 - 1280x720@120Hz */
940         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390,
941                    1430, 1650, 0, 720, 725, 730, 750, 0,
942                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
943           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
944         /* 48 - 720x480@120Hz */
945         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
946                    798, 858, 0, 480, 489, 495, 525, 0,
947                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
948           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
949         /* 49 - 720x480@120Hz */
950         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
951                    798, 858, 0, 480, 489, 495, 525, 0,
952                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
953           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
954         /* 50 - 720(1440)x480i@120Hz */
955         { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 27000, 720, 739,
956                    801, 858, 0, 480, 488, 494, 525, 0,
957                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
958                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
959           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
960         /* 51 - 720(1440)x480i@120Hz */
961         { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 27000, 720, 739,
962                    801, 858, 0, 480, 488, 494, 525, 0,
963                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
964                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
965           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
966         /* 52 - 720x576@200Hz */
967         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
968                    796, 864, 0, 576, 581, 586, 625, 0,
969                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
970           .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
971         /* 53 - 720x576@200Hz */
972         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
973                    796, 864, 0, 576, 581, 586, 625, 0,
974                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
975           .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
976         /* 54 - 720(1440)x576i@200Hz */
977         { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
978                    795, 864, 0, 576, 580, 586, 625, 0,
979                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
980                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
981           .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
982         /* 55 - 720(1440)x576i@200Hz */
983         { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
984                    795, 864, 0, 576, 580, 586, 625, 0,
985                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
986                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
987           .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
988         /* 56 - 720x480@240Hz */
989         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
990                    798, 858, 0, 480, 489, 495, 525, 0,
991                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
992           .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
993         /* 57 - 720x480@240Hz */
994         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
995                    798, 858, 0, 480, 489, 495, 525, 0,
996                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
997           .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
998         /* 58 - 720(1440)x480i@240Hz */
999         { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 54000, 720, 739,
1000                    801, 858, 0, 480, 488, 494, 525, 0,
1001                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
1002                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
1003           .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
1004         /* 59 - 720(1440)x480i@240Hz */
1005         { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 54000, 720, 739,
1006                    801, 858, 0, 480, 488, 494, 525, 0,
1007                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
1008                         DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
1009           .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1010         /* 60 - 1280x720@24Hz */
1011         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040,
1012                    3080, 3300, 0, 720, 725, 730, 750, 0,
1013                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1014           .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1015         /* 61 - 1280x720@25Hz */
1016         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700,
1017                    3740, 3960, 0, 720, 725, 730, 750, 0,
1018                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1019           .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1020         /* 62 - 1280x720@30Hz */
1021         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040,
1022                    3080, 3300, 0, 720, 725, 730, 750, 0,
1023                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1024           .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1025         /* 63 - 1920x1080@120Hz */
1026         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008,
1027                    2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
1028                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1029          .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1030         /* 64 - 1920x1080@100Hz */
1031         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448,
1032                    2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
1033                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1034          .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1035         /* 65 - 1280x720@24Hz */
1036         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040,
1037                    3080, 3300, 0, 720, 725, 730, 750, 0,
1038                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1039           .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1040         /* 66 - 1280x720@25Hz */
1041         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700,
1042                    3740, 3960, 0, 720, 725, 730, 750, 0,
1043                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1044           .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1045         /* 67 - 1280x720@30Hz */
1046         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040,
1047                    3080, 3300, 0, 720, 725, 730, 750, 0,
1048                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1049           .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1050         /* 68 - 1280x720@50Hz */
1051         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720,
1052                    1760, 1980, 0, 720, 725, 730, 750, 0,
1053                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1054           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1055         /* 69 - 1280x720@60Hz */
1056         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
1057                    1430, 1650, 0, 720, 725, 730, 750, 0,
1058                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1059           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1060         /* 70 - 1280x720@100Hz */
1061         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720,
1062                    1760, 1980, 0, 720, 725, 730, 750, 0,
1063                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1064           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1065         /* 71 - 1280x720@120Hz */
1066         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390,
1067                    1430, 1650, 0, 720, 725, 730, 750, 0,
1068                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1069           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1070         /* 72 - 1920x1080@24Hz */
1071         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558,
1072                    2602, 2750, 0, 1080, 1084, 1089, 1125, 0,
1073                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1074           .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1075         /* 73 - 1920x1080@25Hz */
1076         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
1077                    2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
1078                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1079           .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1080         /* 74 - 1920x1080@30Hz */
1081         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
1082                    2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
1083                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1084           .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1085         /* 75 - 1920x1080@50Hz */
1086         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
1087                    2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
1088                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1089           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1090         /* 76 - 1920x1080@60Hz */
1091         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
1092                    2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
1093                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1094           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1095         /* 77 - 1920x1080@100Hz */
1096         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448,
1097                    2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
1098                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1099           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1100         /* 78 - 1920x1080@120Hz */
1101         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008,
1102                    2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
1103                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1104           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1105         /* 79 - 1680x720@24Hz */
1106         { DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 59400, 1680, 3040,
1107                    3080, 3300, 0, 720, 725, 730, 750, 0,
1108                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1109           .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1110         /* 80 - 1680x720@25Hz */
1111         { DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 59400, 1680, 2908,
1112                    2948, 3168, 0, 720, 725, 730, 750, 0,
1113                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1114           .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1115         /* 81 - 1680x720@30Hz */
1116         { DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 59400, 1680, 2380,
1117                    2420, 2640, 0, 720, 725, 730, 750, 0,
1118                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1119           .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1120         /* 82 - 1680x720@50Hz */
1121         { DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 82500, 1680, 1940,
1122                    1980, 2200, 0, 720, 725, 730, 750, 0,
1123                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1124           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1125         /* 83 - 1680x720@60Hz */
1126         { DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 99000, 1680, 1940,
1127                    1980, 2200, 0, 720, 725, 730, 750, 0,
1128                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1129           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1130         /* 84 - 1680x720@100Hz */
1131         { DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 165000, 1680, 1740,
1132                    1780, 2000, 0, 720, 725, 730, 825, 0,
1133                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1134           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1135         /* 85 - 1680x720@120Hz */
1136         { DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 198000, 1680, 1740,
1137                    1780, 2000, 0, 720, 725, 730, 825, 0,
1138                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1139           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1140         /* 86 - 2560x1080@24Hz */
1141         { DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 99000, 2560, 3558,
1142                    3602, 3750, 0, 1080, 1084, 1089, 1100, 0,
1143                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1144           .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1145         /* 87 - 2560x1080@25Hz */
1146         { DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 90000, 2560, 3008,
1147                    3052, 3200, 0, 1080, 1084, 1089, 1125, 0,
1148                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1149           .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1150         /* 88 - 2560x1080@30Hz */
1151         { DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 118800, 2560, 3328,
1152                    3372, 3520, 0, 1080, 1084, 1089, 1125, 0,
1153                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1154           .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1155         /* 89 - 2560x1080@50Hz */
1156         { DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 185625, 2560, 3108,
1157                    3152, 3300, 0, 1080, 1084, 1089, 1125, 0,
1158                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1159           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1160         /* 90 - 2560x1080@60Hz */
1161         { DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 198000, 2560, 2808,
1162                    2852, 3000, 0, 1080, 1084, 1089, 1100, 0,
1163                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1164           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1165         /* 91 - 2560x1080@100Hz */
1166         { DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 371250, 2560, 2778,
1167                    2822, 2970, 0, 1080, 1084, 1089, 1250, 0,
1168                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1169           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1170         /* 92 - 2560x1080@120Hz */
1171         { DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 495000, 2560, 3108,
1172                    3152, 3300, 0, 1080, 1084, 1089, 1250, 0,
1173                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1174           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1175         /* 93 - 3840x2160p@24Hz 16:9 */
1176         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 5116,
1177                    5204, 5500, 0, 2160, 2168, 2178, 2250, 0,
1178                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1179           .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1180         /* 94 - 3840x2160p@25Hz 16:9 */
1181         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 4896,
1182                    4984, 5280, 0, 2160, 2168, 2178, 2250, 0,
1183                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1184           .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1185         /* 95 - 3840x2160p@30Hz 16:9 */
1186         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 4016,
1187                    4104, 4400, 0, 2160, 2168, 2178, 2250, 0,
1188                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1189           .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1190         /* 96 - 3840x2160p@50Hz 16:9 */
1191         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 594000, 3840, 4896,
1192                    4984, 5280, 0, 2160, 2168, 2178, 2250, 0,
1193                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1194           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1195         /* 97 - 3840x2160p@60Hz 16:9 */
1196         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 594000, 3840, 4016,
1197                    4104, 4400, 0, 2160, 2168, 2178, 2250, 0,
1198                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1199           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1200         /* 98 - 4096x2160p@24Hz 256:135 */
1201         { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000, 4096, 5116,
1202                    5204, 5500, 0, 2160, 2168, 2178, 2250, 0,
1203                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1204           .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
1205         /* 99 - 4096x2160p@25Hz 256:135 */
1206         { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000, 4096, 5064,
1207                    5152, 5280, 0, 2160, 2168, 2178, 2250, 0,
1208                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1209           .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
1210         /* 100 - 4096x2160p@30Hz 256:135 */
1211         { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000, 4096, 4184,
1212                    4272, 4400, 0, 2160, 2168, 2178, 2250, 0,
1213                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1214           .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
1215         /* 101 - 4096x2160p@50Hz 256:135 */
1216         { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 594000, 4096, 5064,
1217                    5152, 5280, 0, 2160, 2168, 2178, 2250, 0,
1218                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1219           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
1220         /* 102 - 4096x2160p@60Hz 256:135 */
1221         { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 594000, 4096, 4184,
1222                    4272, 4400, 0, 2160, 2168, 2178, 2250, 0,
1223                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1224           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
1225         /* 103 - 3840x2160p@24Hz 64:27 */
1226         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 5116,
1227                    5204, 5500, 0, 2160, 2168, 2178, 2250, 0,
1228                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1229           .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1230         /* 104 - 3840x2160p@25Hz 64:27 */
1231         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 4896,
1232                    4984, 5280, 0, 2160, 2168, 2178, 2250, 0,
1233                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1234           .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1235         /* 105 - 3840x2160p@30Hz 64:27 */
1236         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 4016,
1237                    4104, 4400, 0, 2160, 2168, 2178, 2250, 0,
1238                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1239           .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1240         /* 106 - 3840x2160p@50Hz 64:27 */
1241         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 594000, 3840, 4896,
1242                    4984, 5280, 0, 2160, 2168, 2178, 2250, 0,
1243                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1244           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1245         /* 107 - 3840x2160p@60Hz 64:27 */
1246         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 594000, 3840, 4016,
1247                    4104, 4400, 0, 2160, 2168, 2178, 2250, 0,
1248                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1249           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1250 };
1251
1252 /*
1253  * HDMI 1.4 4k modes. Index using the VIC.
1254  */
1255 static const struct drm_display_mode edid_4k_modes[] = {
1256         /* 0 - dummy, VICs start at 1 */
1257         { },
1258         /* 1 - 3840x2160@30Hz */
1259         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
1260                    3840, 4016, 4104, 4400, 0,
1261                    2160, 2168, 2178, 2250, 0,
1262                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1263           .vrefresh = 30, },
1264         /* 2 - 3840x2160@25Hz */
1265         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
1266                    3840, 4896, 4984, 5280, 0,
1267                    2160, 2168, 2178, 2250, 0,
1268                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1269           .vrefresh = 25, },
1270         /* 3 - 3840x2160@24Hz */
1271         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
1272                    3840, 5116, 5204, 5500, 0,
1273                    2160, 2168, 2178, 2250, 0,
1274                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1275           .vrefresh = 24, },
1276         /* 4 - 4096x2160@24Hz (SMPTE) */
1277         { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000,
1278                    4096, 5116, 5204, 5500, 0,
1279                    2160, 2168, 2178, 2250, 0,
1280                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1281           .vrefresh = 24, },
1282 };
1283
1284 /*** DDC fetch and block validation ***/
1285
1286 static const u8 edid_header[] = {
1287         0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
1288 };
1289
1290 /**
1291  * drm_edid_header_is_valid - sanity check the header of the base EDID block
1292  * @raw_edid: pointer to raw base EDID block
1293  *
1294  * Sanity check the header of the base EDID block.
1295  *
1296  * Return: 8 if the header is perfect, down to 0 if it's totally wrong.
1297  */
1298 int drm_edid_header_is_valid(const u8 *raw_edid)
1299 {
1300         int i, score = 0;
1301
1302         for (i = 0; i < sizeof(edid_header); i++)
1303                 if (raw_edid[i] == edid_header[i])
1304                         score++;
1305
1306         return score;
1307 }
1308 EXPORT_SYMBOL(drm_edid_header_is_valid);
1309
1310 static int edid_fixup __read_mostly = 6;
1311 module_param_named(edid_fixup, edid_fixup, int, 0400);
1312 MODULE_PARM_DESC(edid_fixup,
1313                  "Minimum number of valid EDID header bytes (0-8, default 6)");
1314
1315 static void drm_get_displayid(struct drm_connector *connector,
1316                               struct edid *edid);
1317
1318 static int drm_edid_block_checksum(const u8 *raw_edid)
1319 {
1320         int i;
1321         u8 csum = 0;
1322         for (i = 0; i < EDID_LENGTH; i++)
1323                 csum += raw_edid[i];
1324
1325         return csum;
1326 }
1327
1328 static bool drm_edid_is_zero(const u8 *in_edid, int length)
1329 {
1330         if (memchr_inv(in_edid, 0, length))
1331                 return false;
1332
1333         return true;
1334 }
1335
1336 /**
1337  * drm_edid_block_valid - Sanity check the EDID block (base or extension)
1338  * @raw_edid: pointer to raw EDID block
1339  * @block: type of block to validate (0 for base, extension otherwise)
1340  * @print_bad_edid: if true, dump bad EDID blocks to the console
1341  * @edid_corrupt: if true, the header or checksum is invalid
1342  *
1343  * Validate a base or extension EDID block and optionally dump bad blocks to
1344  * the console.
1345  *
1346  * Return: True if the block is valid, false otherwise.
1347  */
1348 bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid,
1349                           bool *edid_corrupt)
1350 {
1351         u8 csum;
1352         struct edid *edid = (struct edid *)raw_edid;
1353
1354         if (WARN_ON(!raw_edid))
1355                 return false;
1356
1357         if (edid_fixup > 8 || edid_fixup < 0)
1358                 edid_fixup = 6;
1359
1360         if (block == 0) {
1361                 int score = drm_edid_header_is_valid(raw_edid);
1362                 if (score == 8) {
1363                         if (edid_corrupt)
1364                                 *edid_corrupt = false;
1365                 } else if (score >= edid_fixup) {
1366                         /* Displayport Link CTS Core 1.2 rev1.1 test 4.2.2.6
1367                          * The corrupt flag needs to be set here otherwise, the
1368                          * fix-up code here will correct the problem, the
1369                          * checksum is correct and the test fails
1370                          */
1371                         if (edid_corrupt)
1372                                 *edid_corrupt = true;
1373                         DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
1374                         memcpy(raw_edid, edid_header, sizeof(edid_header));
1375                 } else {
1376                         if (edid_corrupt)
1377                                 *edid_corrupt = true;
1378                         goto bad;
1379                 }
1380         }
1381
1382         csum = drm_edid_block_checksum(raw_edid);
1383         if (csum) {
1384                 if (edid_corrupt)
1385                         *edid_corrupt = true;
1386
1387                 /* allow CEA to slide through, switches mangle this */
1388                 if (raw_edid[0] == CEA_EXT) {
1389                         DRM_DEBUG("EDID checksum is invalid, remainder is %d\n", csum);
1390                         DRM_DEBUG("Assuming a KVM switch modified the CEA block but left the original checksum\n");
1391                 } else {
1392                         if (print_bad_edid)
1393                                 DRM_NOTE("EDID checksum is invalid, remainder is %d\n", csum);
1394
1395                         goto bad;
1396                 }
1397         }
1398
1399         /* per-block-type checks */
1400         switch (raw_edid[0]) {
1401         case 0: /* base */
1402                 if (edid->version != 1) {
1403                         DRM_NOTE("EDID has major version %d, instead of 1\n", edid->version);
1404                         goto bad;
1405                 }
1406
1407                 if (edid->revision > 4)
1408                         DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
1409                 break;
1410
1411         default:
1412                 break;
1413         }
1414
1415         return true;
1416
1417 bad:
1418         if (print_bad_edid) {
1419                 if (drm_edid_is_zero(raw_edid, EDID_LENGTH)) {
1420                         pr_notice("EDID block is all zeroes\n");
1421                 } else {
1422                         pr_notice("Raw EDID:\n");
1423                         print_hex_dump(KERN_NOTICE,
1424                                        " \t", DUMP_PREFIX_NONE, 16, 1,
1425                                        raw_edid, EDID_LENGTH, false);
1426                 }
1427         }
1428         return false;
1429 }
1430 EXPORT_SYMBOL(drm_edid_block_valid);
1431
1432 /**
1433  * drm_edid_is_valid - sanity check EDID data
1434  * @edid: EDID data
1435  *
1436  * Sanity-check an entire EDID record (including extensions)
1437  *
1438  * Return: True if the EDID data is valid, false otherwise.
1439  */
1440 bool drm_edid_is_valid(struct edid *edid)
1441 {
1442         int i;
1443         u8 *raw = (u8 *)edid;
1444
1445         if (!edid)
1446                 return false;
1447
1448         for (i = 0; i <= edid->extensions; i++)
1449                 if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true, NULL))
1450                         return false;
1451
1452         return true;
1453 }
1454 EXPORT_SYMBOL(drm_edid_is_valid);
1455
1456 #define DDC_SEGMENT_ADDR 0x30
1457 /**
1458  * drm_do_probe_ddc_edid() - get EDID information via I2C
1459  * @data: I2C device adapter
1460  * @buf: EDID data buffer to be filled
1461  * @block: 128 byte EDID block to start fetching from
1462  * @len: EDID data buffer length to fetch
1463  *
1464  * Try to fetch EDID information by calling I2C driver functions.
1465  *
1466  * Return: 0 on success or -1 on failure.
1467  */
1468 static int
1469 drm_do_probe_ddc_edid(void *data, u8 *buf, unsigned int block, size_t len)
1470 {
1471         struct i2c_adapter *adapter = data;
1472         unsigned char start = block * EDID_LENGTH;
1473         unsigned char segment = block >> 1;
1474         unsigned char xfers = segment ? 3 : 2;
1475         int ret, retries = 5;
1476
1477         /*
1478          * The core I2C driver will automatically retry the transfer if the
1479          * adapter reports EAGAIN. However, we find that bit-banging transfers
1480          * are susceptible to errors under a heavily loaded machine and
1481          * generate spurious NAKs and timeouts. Retrying the transfer
1482          * of the individual block a few times seems to overcome this.
1483          */
1484         do {
1485                 struct i2c_msg msgs[] = {
1486                         {
1487                                 .addr   = DDC_SEGMENT_ADDR,
1488                                 .flags  = 0,
1489                                 .len    = 1,
1490                                 .buf    = &segment,
1491                         }, {
1492                                 .addr   = DDC_ADDR,
1493                                 .flags  = 0,
1494                                 .len    = 1,
1495                                 .buf    = &start,
1496                         }, {
1497                                 .addr   = DDC_ADDR,
1498                                 .flags  = I2C_M_RD,
1499                                 .len    = len,
1500                                 .buf    = buf,
1501                         }
1502                 };
1503
1504                 /*
1505                  * Avoid sending the segment addr to not upset non-compliant
1506                  * DDC monitors.
1507                  */
1508                 ret = i2c_transfer(adapter, &msgs[3 - xfers], xfers);
1509
1510                 if (ret == -ENXIO) {
1511                         DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n",
1512                                         adapter->name);
1513                         break;
1514                 }
1515         } while (ret != xfers && --retries);
1516
1517         return ret == xfers ? 0 : -1;
1518 }
1519
1520 static void connector_bad_edid(struct drm_connector *connector,
1521                                u8 *edid, int num_blocks)
1522 {
1523         int i;
1524
1525         if (connector->bad_edid_counter++ && !(drm_debug & DRM_UT_KMS))
1526                 return;
1527
1528         dev_warn(connector->dev->dev,
1529                  "%s: EDID is invalid:\n",
1530                  connector->name);
1531         for (i = 0; i < num_blocks; i++) {
1532                 u8 *block = edid + i * EDID_LENGTH;
1533                 char prefix[20];
1534
1535                 if (drm_edid_is_zero(block, EDID_LENGTH))
1536                         sprintf(prefix, "\t[%02x] ZERO ", i);
1537                 else if (!drm_edid_block_valid(block, i, false, NULL))
1538                         sprintf(prefix, "\t[%02x] BAD  ", i);
1539                 else
1540                         sprintf(prefix, "\t[%02x] GOOD ", i);
1541
1542                 print_hex_dump(KERN_WARNING,
1543                                prefix, DUMP_PREFIX_NONE, 16, 1,
1544                                block, EDID_LENGTH, false);
1545         }
1546 }
1547
1548 /**
1549  * drm_do_get_edid - get EDID data using a custom EDID block read function
1550  * @connector: connector we're probing
1551  * @get_edid_block: EDID block read function
1552  * @data: private data passed to the block read function
1553  *
1554  * When the I2C adapter connected to the DDC bus is hidden behind a device that
1555  * exposes a different interface to read EDID blocks this function can be used
1556  * to get EDID data using a custom block read function.
1557  *
1558  * As in the general case the DDC bus is accessible by the kernel at the I2C
1559  * level, drivers must make all reasonable efforts to expose it as an I2C
1560  * adapter and use drm_get_edid() instead of abusing this function.
1561  *
1562  * The EDID may be overridden using debugfs override_edid or firmare EDID
1563  * (drm_load_edid_firmware() and drm.edid_firmware parameter), in this priority
1564  * order. Having either of them bypasses actual EDID reads.
1565  *
1566  * Return: Pointer to valid EDID or NULL if we couldn't find any.
1567  */
1568 struct edid *drm_do_get_edid(struct drm_connector *connector,
1569         int (*get_edid_block)(void *data, u8 *buf, unsigned int block,
1570                               size_t len),
1571         void *data)
1572 {
1573         int i, j = 0, valid_extensions = 0;
1574         u8 *edid, *new;
1575         struct edid *override = NULL;
1576
1577         if (connector->override_edid)
1578                 override = drm_edid_duplicate((const struct edid *)
1579                                               connector->edid_blob_ptr->data);
1580
1581         if (!override)
1582                 override = drm_load_edid_firmware(connector);
1583
1584         if (!IS_ERR_OR_NULL(override))
1585                 return override;
1586
1587         if ((edid = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL)
1588                 return NULL;
1589
1590         /* base block fetch */
1591         for (i = 0; i < 4; i++) {
1592                 if (get_edid_block(data, edid, 0, EDID_LENGTH))
1593                         goto out;
1594                 if (drm_edid_block_valid(edid, 0, false,
1595                                          &connector->edid_corrupt))
1596                         break;
1597                 if (i == 0 && drm_edid_is_zero(edid, EDID_LENGTH)) {
1598                         connector->null_edid_counter++;
1599                         goto carp;
1600                 }
1601         }
1602         if (i == 4)
1603                 goto carp;
1604
1605         /* if there's no extensions, we're done */
1606         valid_extensions = edid[0x7e];
1607         if (valid_extensions == 0)
1608                 return (struct edid *)edid;
1609
1610         new = krealloc(edid, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL);
1611         if (!new)
1612                 goto out;
1613         edid = new;
1614
1615         for (j = 1; j <= edid[0x7e]; j++) {
1616                 u8 *block = edid + j * EDID_LENGTH;
1617
1618                 for (i = 0; i < 4; i++) {
1619                         if (get_edid_block(data, block, j, EDID_LENGTH))
1620                                 goto out;
1621                         if (drm_edid_block_valid(block, j, false, NULL))
1622                                 break;
1623                 }
1624
1625                 if (i == 4)
1626                         valid_extensions--;
1627         }
1628
1629         if (valid_extensions != edid[0x7e]) {
1630                 u8 *base;
1631
1632                 connector_bad_edid(connector, edid, edid[0x7e] + 1);
1633
1634                 edid[EDID_LENGTH-1] += edid[0x7e] - valid_extensions;
1635                 edid[0x7e] = valid_extensions;
1636
1637                 new = kmalloc((valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL);
1638                 if (!new)
1639                         goto out;
1640
1641                 base = new;
1642                 for (i = 0; i <= edid[0x7e]; i++) {
1643                         u8 *block = edid + i * EDID_LENGTH;
1644
1645                         if (!drm_edid_block_valid(block, i, false, NULL))
1646                                 continue;
1647
1648                         memcpy(base, block, EDID_LENGTH);
1649                         base += EDID_LENGTH;
1650                 }
1651
1652                 kfree(edid);
1653                 edid = new;
1654         }
1655
1656         return (struct edid *)edid;
1657
1658 carp:
1659         connector_bad_edid(connector, edid, 1);
1660 out:
1661         kfree(edid);
1662         return NULL;
1663 }
1664 EXPORT_SYMBOL_GPL(drm_do_get_edid);
1665
1666 /**
1667  * drm_probe_ddc() - probe DDC presence
1668  * @adapter: I2C adapter to probe
1669  *
1670  * Return: True on success, false on failure.
1671  */
1672 bool
1673 drm_probe_ddc(struct i2c_adapter *adapter)
1674 {
1675         unsigned char out;
1676
1677         return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
1678 }
1679 EXPORT_SYMBOL(drm_probe_ddc);
1680
1681 /**
1682  * drm_get_edid - get EDID data, if available
1683  * @connector: connector we're probing
1684  * @adapter: I2C adapter to use for DDC
1685  *
1686  * Poke the given I2C channel to grab EDID data if possible.  If found,
1687  * attach it to the connector.
1688  *
1689  * Return: Pointer to valid EDID or NULL if we couldn't find any.
1690  */
1691 struct edid *drm_get_edid(struct drm_connector *connector,
1692                           struct i2c_adapter *adapter)
1693 {
1694         struct edid *edid;
1695
1696         if (connector->force == DRM_FORCE_OFF)
1697                 return NULL;
1698
1699         if (connector->force == DRM_FORCE_UNSPECIFIED && !drm_probe_ddc(adapter))
1700                 return NULL;
1701
1702         edid = drm_do_get_edid(connector, drm_do_probe_ddc_edid, adapter);
1703         if (edid)
1704                 drm_get_displayid(connector, edid);
1705         return edid;
1706 }
1707 EXPORT_SYMBOL(drm_get_edid);
1708
1709 /**
1710  * drm_get_edid_switcheroo - get EDID data for a vga_switcheroo output
1711  * @connector: connector we're probing
1712  * @adapter: I2C adapter to use for DDC
1713  *
1714  * Wrapper around drm_get_edid() for laptops with dual GPUs using one set of
1715  * outputs. The wrapper adds the requisite vga_switcheroo calls to temporarily
1716  * switch DDC to the GPU which is retrieving EDID.
1717  *
1718  * Return: Pointer to valid EDID or %NULL if we couldn't find any.
1719  */
1720 struct edid *drm_get_edid_switcheroo(struct drm_connector *connector,
1721                                      struct i2c_adapter *adapter)
1722 {
1723         struct pci_dev *pdev = connector->dev->pdev;
1724         struct edid *edid;
1725
1726         vga_switcheroo_lock_ddc(pdev);
1727         edid = drm_get_edid(connector, adapter);
1728         vga_switcheroo_unlock_ddc(pdev);
1729
1730         return edid;
1731 }
1732 EXPORT_SYMBOL(drm_get_edid_switcheroo);
1733
1734 /**
1735  * drm_edid_duplicate - duplicate an EDID and the extensions
1736  * @edid: EDID to duplicate
1737  *
1738  * Return: Pointer to duplicated EDID or NULL on allocation failure.
1739  */
1740 struct edid *drm_edid_duplicate(const struct edid *edid)
1741 {
1742         return kmemdup(edid, (edid->extensions + 1) * EDID_LENGTH, GFP_KERNEL);
1743 }
1744 EXPORT_SYMBOL(drm_edid_duplicate);
1745
1746 /*** EDID parsing ***/
1747
1748 /**
1749  * edid_vendor - match a string against EDID's obfuscated vendor field
1750  * @edid: EDID to match
1751  * @vendor: vendor string
1752  *
1753  * Returns true if @vendor is in @edid, false otherwise
1754  */
1755 static bool edid_vendor(const struct edid *edid, const char *vendor)
1756 {
1757         char edid_vendor[3];
1758
1759         edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
1760         edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
1761                           ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
1762         edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
1763
1764         return !strncmp(edid_vendor, vendor, 3);
1765 }
1766
1767 /**
1768  * edid_get_quirks - return quirk flags for a given EDID
1769  * @edid: EDID to process
1770  *
1771  * This tells subsequent routines what fixes they need to apply.
1772  */
1773 static u32 edid_get_quirks(const struct edid *edid)
1774 {
1775         const struct edid_quirk *quirk;
1776         int i;
1777
1778         for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
1779                 quirk = &edid_quirk_list[i];
1780
1781                 if (edid_vendor(edid, quirk->vendor) &&
1782                     (EDID_PRODUCT_ID(edid) == quirk->product_id))
1783                         return quirk->quirks;
1784         }
1785
1786         return 0;
1787 }
1788
1789 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
1790 #define MODE_REFRESH_DIFF(c,t) (abs((c) - (t)))
1791
1792 /**
1793  * edid_fixup_preferred - set preferred modes based on quirk list
1794  * @connector: has mode list to fix up
1795  * @quirks: quirks list
1796  *
1797  * Walk the mode list for @connector, clearing the preferred status
1798  * on existing modes and setting it anew for the right mode ala @quirks.
1799  */
1800 static void edid_fixup_preferred(struct drm_connector *connector,
1801                                  u32 quirks)
1802 {
1803         struct drm_display_mode *t, *cur_mode, *preferred_mode;
1804         int target_refresh = 0;
1805         int cur_vrefresh, preferred_vrefresh;
1806
1807         if (list_empty(&connector->probed_modes))
1808                 return;
1809
1810         if (quirks & EDID_QUIRK_PREFER_LARGE_60)
1811                 target_refresh = 60;
1812         if (quirks & EDID_QUIRK_PREFER_LARGE_75)
1813                 target_refresh = 75;
1814
1815         preferred_mode = list_first_entry(&connector->probed_modes,
1816                                           struct drm_display_mode, head);
1817
1818         list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
1819                 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
1820
1821                 if (cur_mode == preferred_mode)
1822                         continue;
1823
1824                 /* Largest mode is preferred */
1825                 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
1826                         preferred_mode = cur_mode;
1827
1828                 cur_vrefresh = cur_mode->vrefresh ?
1829                         cur_mode->vrefresh : drm_mode_vrefresh(cur_mode);
1830                 preferred_vrefresh = preferred_mode->vrefresh ?
1831                         preferred_mode->vrefresh : drm_mode_vrefresh(preferred_mode);
1832                 /* At a given size, try to get closest to target refresh */
1833                 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
1834                     MODE_REFRESH_DIFF(cur_vrefresh, target_refresh) <
1835                     MODE_REFRESH_DIFF(preferred_vrefresh, target_refresh)) {
1836                         preferred_mode = cur_mode;
1837                 }
1838         }
1839
1840         preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
1841 }
1842
1843 static bool
1844 mode_is_rb(const struct drm_display_mode *mode)
1845 {
1846         return (mode->htotal - mode->hdisplay == 160) &&
1847                (mode->hsync_end - mode->hdisplay == 80) &&
1848                (mode->hsync_end - mode->hsync_start == 32) &&
1849                (mode->vsync_start - mode->vdisplay == 3);
1850 }
1851
1852 /*
1853  * drm_mode_find_dmt - Create a copy of a mode if present in DMT
1854  * @dev: Device to duplicate against
1855  * @hsize: Mode width
1856  * @vsize: Mode height
1857  * @fresh: Mode refresh rate
1858  * @rb: Mode reduced-blanking-ness
1859  *
1860  * Walk the DMT mode list looking for a match for the given parameters.
1861  *
1862  * Return: A newly allocated copy of the mode, or NULL if not found.
1863  */
1864 struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
1865                                            int hsize, int vsize, int fresh,
1866                                            bool rb)
1867 {
1868         int i;
1869
1870         for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
1871                 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
1872                 if (hsize != ptr->hdisplay)
1873                         continue;
1874                 if (vsize != ptr->vdisplay)
1875                         continue;
1876                 if (fresh != drm_mode_vrefresh(ptr))
1877                         continue;
1878                 if (rb != mode_is_rb(ptr))
1879                         continue;
1880
1881                 return drm_mode_duplicate(dev, ptr);
1882         }
1883
1884         return NULL;
1885 }
1886 EXPORT_SYMBOL(drm_mode_find_dmt);
1887
1888 typedef void detailed_cb(struct detailed_timing *timing, void *closure);
1889
1890 static void
1891 cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1892 {
1893         int i, n = 0;
1894         u8 d = ext[0x02];
1895         u8 *det_base = ext + d;
1896
1897         n = (127 - d) / 18;
1898         for (i = 0; i < n; i++)
1899                 cb((struct detailed_timing *)(det_base + 18 * i), closure);
1900 }
1901
1902 static void
1903 vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1904 {
1905         unsigned int i, n = min((int)ext[0x02], 6);
1906         u8 *det_base = ext + 5;
1907
1908         if (ext[0x01] != 1)
1909                 return; /* unknown version */
1910
1911         for (i = 0; i < n; i++)
1912                 cb((struct detailed_timing *)(det_base + 18 * i), closure);
1913 }
1914
1915 static void
1916 drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
1917 {
1918         int i;
1919         struct edid *edid = (struct edid *)raw_edid;
1920
1921         if (edid == NULL)
1922                 return;
1923
1924         for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
1925                 cb(&(edid->detailed_timings[i]), closure);
1926
1927         for (i = 1; i <= raw_edid[0x7e]; i++) {
1928                 u8 *ext = raw_edid + (i * EDID_LENGTH);
1929                 switch (*ext) {
1930                 case CEA_EXT:
1931                         cea_for_each_detailed_block(ext, cb, closure);
1932                         break;
1933                 case VTB_EXT:
1934                         vtb_for_each_detailed_block(ext, cb, closure);
1935                         break;
1936                 default:
1937                         break;
1938                 }
1939         }
1940 }
1941
1942 static void
1943 is_rb(struct detailed_timing *t, void *data)
1944 {
1945         u8 *r = (u8 *)t;
1946         if (r[3] == EDID_DETAIL_MONITOR_RANGE)
1947                 if (r[15] & 0x10)
1948                         *(bool *)data = true;
1949 }
1950
1951 /* EDID 1.4 defines this explicitly.  For EDID 1.3, we guess, badly. */
1952 static bool
1953 drm_monitor_supports_rb(struct edid *edid)
1954 {
1955         if (edid->revision >= 4) {
1956                 bool ret = false;
1957                 drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
1958                 return ret;
1959         }
1960
1961         return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
1962 }
1963
1964 static void
1965 find_gtf2(struct detailed_timing *t, void *data)
1966 {
1967         u8 *r = (u8 *)t;
1968         if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02)
1969                 *(u8 **)data = r;
1970 }
1971
1972 /* Secondary GTF curve kicks in above some break frequency */
1973 static int
1974 drm_gtf2_hbreak(struct edid *edid)
1975 {
1976         u8 *r = NULL;
1977         drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1978         return r ? (r[12] * 2) : 0;
1979 }
1980
1981 static int
1982 drm_gtf2_2c(struct edid *edid)
1983 {
1984         u8 *r = NULL;
1985         drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1986         return r ? r[13] : 0;
1987 }
1988
1989 static int
1990 drm_gtf2_m(struct edid *edid)
1991 {
1992         u8 *r = NULL;
1993         drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1994         return r ? (r[15] << 8) + r[14] : 0;
1995 }
1996
1997 static int
1998 drm_gtf2_k(struct edid *edid)
1999 {
2000         u8 *r = NULL;
2001         drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
2002         return r ? r[16] : 0;
2003 }
2004
2005 static int
2006 drm_gtf2_2j(struct edid *edid)
2007 {
2008         u8 *r = NULL;
2009         drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
2010         return r ? r[17] : 0;
2011 }
2012
2013 /**
2014  * standard_timing_level - get std. timing level(CVT/GTF/DMT)
2015  * @edid: EDID block to scan
2016  */
2017 static int standard_timing_level(struct edid *edid)
2018 {
2019         if (edid->revision >= 2) {
2020                 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
2021                         return LEVEL_CVT;
2022                 if (drm_gtf2_hbreak(edid))
2023                         return LEVEL_GTF2;
2024                 return LEVEL_GTF;
2025         }
2026         return LEVEL_DMT;
2027 }
2028
2029 /*
2030  * 0 is reserved.  The spec says 0x01 fill for unused timings.  Some old
2031  * monitors fill with ascii space (0x20) instead.
2032  */
2033 static int
2034 bad_std_timing(u8 a, u8 b)
2035 {
2036         return (a == 0x00 && b == 0x00) ||
2037                (a == 0x01 && b == 0x01) ||
2038                (a == 0x20 && b == 0x20);
2039 }
2040
2041 /**
2042  * drm_mode_std - convert standard mode info (width, height, refresh) into mode
2043  * @connector: connector of for the EDID block
2044  * @edid: EDID block to scan
2045  * @t: standard timing params
2046  *
2047  * Take the standard timing params (in this case width, aspect, and refresh)
2048  * and convert them into a real mode using CVT/GTF/DMT.
2049  */
2050 static struct drm_display_mode *
2051 drm_mode_std(struct drm_connector *connector, struct edid *edid,
2052              struct std_timing *t)
2053 {
2054         struct drm_device *dev = connector->dev;
2055         struct drm_display_mode *m, *mode = NULL;
2056         int hsize, vsize;
2057         int vrefresh_rate;
2058         unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
2059                 >> EDID_TIMING_ASPECT_SHIFT;
2060         unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
2061                 >> EDID_TIMING_VFREQ_SHIFT;
2062         int timing_level = standard_timing_level(edid);
2063
2064         if (bad_std_timing(t->hsize, t->vfreq_aspect))
2065                 return NULL;
2066
2067         /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
2068         hsize = t->hsize * 8 + 248;
2069         /* vrefresh_rate = vfreq + 60 */
2070         vrefresh_rate = vfreq + 60;
2071         /* the vdisplay is calculated based on the aspect ratio */
2072         if (aspect_ratio == 0) {
2073                 if (edid->revision < 3)
2074                         vsize = hsize;
2075                 else
2076                         vsize = (hsize * 10) / 16;
2077         } else if (aspect_ratio == 1)
2078                 vsize = (hsize * 3) / 4;
2079         else if (aspect_ratio == 2)
2080                 vsize = (hsize * 4) / 5;
2081         else
2082                 vsize = (hsize * 9) / 16;
2083
2084         /* HDTV hack, part 1 */
2085         if (vrefresh_rate == 60 &&
2086             ((hsize == 1360 && vsize == 765) ||
2087              (hsize == 1368 && vsize == 769))) {
2088                 hsize = 1366;
2089                 vsize = 768;
2090         }
2091
2092         /*
2093          * If this connector already has a mode for this size and refresh
2094          * rate (because it came from detailed or CVT info), use that
2095          * instead.  This way we don't have to guess at interlace or
2096          * reduced blanking.
2097          */
2098         list_for_each_entry(m, &connector->probed_modes, head)
2099                 if (m->hdisplay == hsize && m->vdisplay == vsize &&
2100                     drm_mode_vrefresh(m) == vrefresh_rate)
2101                         return NULL;
2102
2103         /* HDTV hack, part 2 */
2104         if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) {
2105                 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0,
2106                                     false);
2107                 mode->hdisplay = 1366;
2108                 mode->hsync_start = mode->hsync_start - 1;
2109                 mode->hsync_end = mode->hsync_end - 1;
2110                 return mode;
2111         }
2112
2113         /* check whether it can be found in default mode table */
2114         if (drm_monitor_supports_rb(edid)) {
2115                 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate,
2116                                          true);
2117                 if (mode)
2118                         return mode;
2119         }
2120         mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false);
2121         if (mode)
2122                 return mode;
2123
2124         /* okay, generate it */
2125         switch (timing_level) {
2126         case LEVEL_DMT:
2127                 break;
2128         case LEVEL_GTF:
2129                 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
2130                 break;
2131         case LEVEL_GTF2:
2132                 /*
2133                  * This is potentially wrong if there's ever a monitor with
2134                  * more than one ranges section, each claiming a different
2135                  * secondary GTF curve.  Please don't do that.
2136                  */
2137                 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
2138                 if (!mode)
2139                         return NULL;
2140                 if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) {
2141                         drm_mode_destroy(dev, mode);
2142                         mode = drm_gtf_mode_complex(dev, hsize, vsize,
2143                                                     vrefresh_rate, 0, 0,
2144                                                     drm_gtf2_m(edid),
2145                                                     drm_gtf2_2c(edid),
2146                                                     drm_gtf2_k(edid),
2147                                                     drm_gtf2_2j(edid));
2148                 }
2149                 break;
2150         case LEVEL_CVT:
2151                 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
2152                                     false);
2153                 break;
2154         }
2155         return mode;
2156 }
2157
2158 /*
2159  * EDID is delightfully ambiguous about how interlaced modes are to be
2160  * encoded.  Our internal representation is of frame height, but some
2161  * HDTV detailed timings are encoded as field height.
2162  *
2163  * The format list here is from CEA, in frame size.  Technically we
2164  * should be checking refresh rate too.  Whatever.
2165  */
2166 static void
2167 drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
2168                             struct detailed_pixel_timing *pt)
2169 {
2170         int i;
2171         static const struct {
2172                 int w, h;
2173         } cea_interlaced[] = {
2174                 { 1920, 1080 },
2175                 {  720,  480 },
2176                 { 1440,  480 },
2177                 { 2880,  480 },
2178                 {  720,  576 },
2179                 { 1440,  576 },
2180                 { 2880,  576 },
2181         };
2182
2183         if (!(pt->misc & DRM_EDID_PT_INTERLACED))
2184                 return;
2185
2186         for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) {
2187                 if ((mode->hdisplay == cea_interlaced[i].w) &&
2188                     (mode->vdisplay == cea_interlaced[i].h / 2)) {
2189                         mode->vdisplay *= 2;
2190                         mode->vsync_start *= 2;
2191                         mode->vsync_end *= 2;
2192                         mode->vtotal *= 2;
2193                         mode->vtotal |= 1;
2194                 }
2195         }
2196
2197         mode->flags |= DRM_MODE_FLAG_INTERLACE;
2198 }
2199
2200 /**
2201  * drm_mode_detailed - create a new mode from an EDID detailed timing section
2202  * @dev: DRM device (needed to create new mode)
2203  * @edid: EDID block
2204  * @timing: EDID detailed timing info
2205  * @quirks: quirks to apply
2206  *
2207  * An EDID detailed timing block contains enough info for us to create and
2208  * return a new struct drm_display_mode.
2209  */
2210 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
2211                                                   struct edid *edid,
2212                                                   struct detailed_timing *timing,
2213                                                   u32 quirks)
2214 {
2215         struct drm_display_mode *mode;
2216         struct detailed_pixel_timing *pt = &timing->data.pixel_data;
2217         unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
2218         unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
2219         unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
2220         unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
2221         unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
2222         unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
2223         unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) << 2 | pt->vsync_offset_pulse_width_lo >> 4;
2224         unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
2225
2226         /* ignore tiny modes */
2227         if (hactive < 64 || vactive < 64)
2228                 return NULL;
2229
2230         if (pt->misc & DRM_EDID_PT_STEREO) {
2231                 DRM_DEBUG_KMS("stereo mode not supported\n");
2232                 return NULL;
2233         }
2234         if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
2235                 DRM_DEBUG_KMS("composite sync not supported\n");
2236         }
2237
2238         /* it is incorrect if hsync/vsync width is zero */
2239         if (!hsync_pulse_width || !vsync_pulse_width) {
2240                 DRM_DEBUG_KMS("Incorrect Detailed timing. "
2241                                 "Wrong Hsync/Vsync pulse width\n");
2242                 return NULL;
2243         }
2244
2245         if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) {
2246                 mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false);
2247                 if (!mode)
2248                         return NULL;
2249
2250                 goto set_size;
2251         }
2252
2253         mode = drm_mode_create(dev);
2254         if (!mode)
2255                 return NULL;
2256
2257         if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
2258                 timing->pixel_clock = cpu_to_le16(1088);
2259
2260         mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
2261
2262         mode->hdisplay = hactive;
2263         mode->hsync_start = mode->hdisplay + hsync_offset;
2264         mode->hsync_end = mode->hsync_start + hsync_pulse_width;
2265         mode->htotal = mode->hdisplay + hblank;
2266
2267         mode->vdisplay = vactive;
2268         mode->vsync_start = mode->vdisplay + vsync_offset;
2269         mode->vsync_end = mode->vsync_start + vsync_pulse_width;
2270         mode->vtotal = mode->vdisplay + vblank;
2271
2272         /* Some EDIDs have bogus h/vtotal values */
2273         if (mode->hsync_end > mode->htotal)
2274                 mode->htotal = mode->hsync_end + 1;
2275         if (mode->vsync_end > mode->vtotal)
2276                 mode->vtotal = mode->vsync_end + 1;
2277
2278         drm_mode_do_interlace_quirk(mode, pt);
2279
2280         if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
2281                 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
2282         }
2283
2284         mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
2285                 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
2286         mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
2287                 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
2288
2289 set_size:
2290         mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
2291         mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
2292
2293         if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
2294                 mode->width_mm *= 10;
2295                 mode->height_mm *= 10;
2296         }
2297
2298         if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
2299                 mode->width_mm = edid->width_cm * 10;
2300                 mode->height_mm = edid->height_cm * 10;
2301         }
2302
2303         mode->type = DRM_MODE_TYPE_DRIVER;
2304         mode->vrefresh = drm_mode_vrefresh(mode);
2305         drm_mode_set_name(mode);
2306
2307         return mode;
2308 }
2309
2310 static bool
2311 mode_in_hsync_range(const struct drm_display_mode *mode,
2312                     struct edid *edid, u8 *t)
2313 {
2314         int hsync, hmin, hmax;
2315
2316         hmin = t[7];
2317         if (edid->revision >= 4)
2318             hmin += ((t[4] & 0x04) ? 255 : 0);
2319         hmax = t[8];
2320         if (edid->revision >= 4)
2321             hmax += ((t[4] & 0x08) ? 255 : 0);
2322         hsync = drm_mode_hsync(mode);
2323
2324         return (hsync <= hmax && hsync >= hmin);
2325 }
2326
2327 static bool
2328 mode_in_vsync_range(const struct drm_display_mode *mode,
2329                     struct edid *edid, u8 *t)
2330 {
2331         int vsync, vmin, vmax;
2332
2333         vmin = t[5];
2334         if (edid->revision >= 4)
2335             vmin += ((t[4] & 0x01) ? 255 : 0);
2336         vmax = t[6];
2337         if (edid->revision >= 4)
2338             vmax += ((t[4] & 0x02) ? 255 : 0);
2339         vsync = drm_mode_vrefresh(mode);
2340
2341         return (vsync <= vmax && vsync >= vmin);
2342 }
2343
2344 static u32
2345 range_pixel_clock(struct edid *edid, u8 *t)
2346 {
2347         /* unspecified */
2348         if (t[9] == 0 || t[9] == 255)
2349                 return 0;
2350
2351         /* 1.4 with CVT support gives us real precision, yay */
2352         if (edid->revision >= 4 && t[10] == 0x04)
2353                 return (t[9] * 10000) - ((t[12] >> 2) * 250);
2354
2355         /* 1.3 is pathetic, so fuzz up a bit */
2356         return t[9] * 10000 + 5001;
2357 }
2358
2359 static bool
2360 mode_in_range(const struct drm_display_mode *mode, struct edid *edid,
2361               struct detailed_timing *timing)
2362 {
2363         u32 max_clock;
2364         u8 *t = (u8 *)timing;
2365
2366         if (!mode_in_hsync_range(mode, edid, t))
2367                 return false;
2368
2369         if (!mode_in_vsync_range(mode, edid, t))
2370                 return false;
2371
2372         if ((max_clock = range_pixel_clock(edid, t)))
2373                 if (mode->clock > max_clock)
2374                         return false;
2375
2376         /* 1.4 max horizontal check */
2377         if (edid->revision >= 4 && t[10] == 0x04)
2378                 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3))))
2379                         return false;
2380
2381         if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
2382                 return false;
2383
2384         return true;
2385 }
2386
2387 static bool valid_inferred_mode(const struct drm_connector *connector,
2388                                 const struct drm_display_mode *mode)
2389 {
2390         const struct drm_display_mode *m;
2391         bool ok = false;
2392
2393         list_for_each_entry(m, &connector->probed_modes, head) {
2394                 if (mode->hdisplay == m->hdisplay &&
2395                     mode->vdisplay == m->vdisplay &&
2396                     drm_mode_vrefresh(mode) == drm_mode_vrefresh(m))
2397                         return false; /* duplicated */
2398                 if (mode->hdisplay <= m->hdisplay &&
2399                     mode->vdisplay <= m->vdisplay)
2400                         ok = true;
2401         }
2402         return ok;
2403 }
2404
2405 static int
2406 drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid,
2407                         struct detailed_timing *timing)
2408 {
2409         int i, modes = 0;
2410         struct drm_display_mode *newmode;
2411         struct drm_device *dev = connector->dev;
2412
2413         for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
2414                 if (mode_in_range(drm_dmt_modes + i, edid, timing) &&
2415                     valid_inferred_mode(connector, drm_dmt_modes + i)) {
2416                         newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
2417                         if (newmode) {
2418                                 drm_mode_probed_add(connector, newmode);
2419                                 modes++;
2420                         }
2421                 }
2422         }
2423
2424         return modes;
2425 }
2426
2427 /* fix up 1366x768 mode from 1368x768;
2428  * GFT/CVT can't express 1366 width which isn't dividable by 8
2429  */
2430 void drm_mode_fixup_1366x768(struct drm_display_mode *mode)
2431 {
2432         if (mode->hdisplay == 1368 && mode->vdisplay == 768) {
2433                 mode->hdisplay = 1366;
2434                 mode->hsync_start--;
2435                 mode->hsync_end--;
2436                 drm_mode_set_name(mode);
2437         }
2438 }
2439
2440 static int
2441 drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
2442                         struct detailed_timing *timing)
2443 {
2444         int i, modes = 0;
2445         struct drm_display_mode *newmode;
2446         struct drm_device *dev = connector->dev;
2447
2448         for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
2449                 const struct minimode *m = &extra_modes[i];
2450                 newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0);
2451                 if (!newmode)
2452                         return modes;
2453
2454                 drm_mode_fixup_1366x768(newmode);
2455                 if (!mode_in_range(newmode, edid, timing) ||
2456                     !valid_inferred_mode(connector, newmode)) {
2457                         drm_mode_destroy(dev, newmode);
2458                         continue;
2459                 }
2460
2461                 drm_mode_probed_add(connector, newmode);
2462                 modes++;
2463         }
2464
2465         return modes;
2466 }
2467
2468 static int
2469 drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid,
2470                         struct detailed_timing *timing)
2471 {
2472         int i, modes = 0;
2473         struct drm_display_mode *newmode;
2474         struct drm_device *dev = connector->dev;
2475         bool rb = drm_monitor_supports_rb(edid);
2476
2477         for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
2478                 const struct minimode *m = &extra_modes[i];
2479                 newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0);
2480                 if (!newmode)
2481                         return modes;
2482
2483                 drm_mode_fixup_1366x768(newmode);
2484                 if (!mode_in_range(newmode, edid, timing) ||
2485                     !valid_inferred_mode(connector, newmode)) {
2486                         drm_mode_destroy(dev, newmode);
2487                         continue;
2488                 }
2489
2490                 drm_mode_probed_add(connector, newmode);
2491                 modes++;
2492         }
2493
2494         return modes;
2495 }
2496
2497 static void
2498 do_inferred_modes(struct detailed_timing *timing, void *c)
2499 {
2500         struct detailed_mode_closure *closure = c;
2501         struct detailed_non_pixel *data = &timing->data.other_data;
2502         struct detailed_data_monitor_range *range = &data->data.range;
2503
2504         if (data->type != EDID_DETAIL_MONITOR_RANGE)
2505                 return;
2506
2507         closure->modes += drm_dmt_modes_for_range(closure->connector,
2508                                                   closure->edid,
2509                                                   timing);
2510         
2511         if (!version_greater(closure->edid, 1, 1))
2512                 return; /* GTF not defined yet */
2513
2514         switch (range->flags) {
2515         case 0x02: /* secondary gtf, XXX could do more */
2516         case 0x00: /* default gtf */
2517                 closure->modes += drm_gtf_modes_for_range(closure->connector,
2518                                                           closure->edid,
2519                                                           timing);
2520                 break;
2521         case 0x04: /* cvt, only in 1.4+ */
2522                 if (!version_greater(closure->edid, 1, 3))
2523                         break;
2524
2525                 closure->modes += drm_cvt_modes_for_range(closure->connector,
2526                                                           closure->edid,
2527                                                           timing);
2528                 break;
2529         case 0x01: /* just the ranges, no formula */
2530         default:
2531                 break;
2532         }
2533 }
2534
2535 static int
2536 add_inferred_modes(struct drm_connector *connector, struct edid *edid)
2537 {
2538         struct detailed_mode_closure closure = {
2539                 .connector = connector,
2540                 .edid = edid,
2541         };
2542
2543         if (version_greater(edid, 1, 0))
2544                 drm_for_each_detailed_block((u8 *)edid, do_inferred_modes,
2545                                             &closure);
2546
2547         return closure.modes;
2548 }
2549
2550 static int
2551 drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
2552 {
2553         int i, j, m, modes = 0;
2554         struct drm_display_mode *mode;
2555         u8 *est = ((u8 *)timing) + 6;
2556
2557         for (i = 0; i < 6; i++) {
2558                 for (j = 7; j >= 0; j--) {
2559                         m = (i * 8) + (7 - j);
2560                         if (m >= ARRAY_SIZE(est3_modes))
2561                                 break;
2562                         if (est[i] & (1 << j)) {
2563                                 mode = drm_mode_find_dmt(connector->dev,
2564                                                          est3_modes[m].w,
2565                                                          est3_modes[m].h,
2566                                                          est3_modes[m].r,
2567                                                          est3_modes[m].rb);
2568                                 if (mode) {
2569                                         drm_mode_probed_add(connector, mode);
2570                                         modes++;
2571                                 }
2572                         }
2573                 }
2574         }
2575
2576         return modes;
2577 }
2578
2579 static void
2580 do_established_modes(struct detailed_timing *timing, void *c)
2581 {
2582         struct detailed_mode_closure *closure = c;
2583         struct detailed_non_pixel *data = &timing->data.other_data;
2584
2585         if (data->type == EDID_DETAIL_EST_TIMINGS)
2586                 closure->modes += drm_est3_modes(closure->connector, timing);
2587 }
2588
2589 /**
2590  * add_established_modes - get est. modes from EDID and add them
2591  * @connector: connector to add mode(s) to
2592  * @edid: EDID block to scan
2593  *
2594  * Each EDID block contains a bitmap of the supported "established modes" list
2595  * (defined above).  Tease them out and add them to the global modes list.
2596  */
2597 static int
2598 add_established_modes(struct drm_connector *connector, struct edid *edid)
2599 {
2600         struct drm_device *dev = connector->dev;
2601         unsigned long est_bits = edid->established_timings.t1 |
2602                 (edid->established_timings.t2 << 8) |
2603                 ((edid->established_timings.mfg_rsvd & 0x80) << 9);
2604         int i, modes = 0;
2605         struct detailed_mode_closure closure = {
2606                 .connector = connector,
2607                 .edid = edid,
2608         };
2609
2610         for (i = 0; i <= EDID_EST_TIMINGS; i++) {
2611                 if (est_bits & (1<<i)) {
2612                         struct drm_display_mode *newmode;
2613                         newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
2614                         if (newmode) {
2615                                 drm_mode_probed_add(connector, newmode);
2616                                 modes++;
2617                         }
2618                 }
2619         }
2620
2621         if (version_greater(edid, 1, 0))
2622                     drm_for_each_detailed_block((u8 *)edid,
2623                                                 do_established_modes, &closure);
2624
2625         return modes + closure.modes;
2626 }
2627
2628 static void
2629 do_standard_modes(struct detailed_timing *timing, void *c)
2630 {
2631         struct detailed_mode_closure *closure = c;
2632         struct detailed_non_pixel *data = &timing->data.other_data;
2633         struct drm_connector *connector = closure->connector;
2634         struct edid *edid = closure->edid;
2635
2636         if (data->type == EDID_DETAIL_STD_MODES) {
2637                 int i;
2638                 for (i = 0; i < 6; i++) {
2639                         struct std_timing *std;
2640                         struct drm_display_mode *newmode;
2641
2642                         std = &data->data.timings[i];
2643                         newmode = drm_mode_std(connector, edid, std);
2644                         if (newmode) {
2645                                 drm_mode_probed_add(connector, newmode);
2646                                 closure->modes++;
2647                         }
2648                 }
2649         }
2650 }
2651
2652 /**
2653  * add_standard_modes - get std. modes from EDID and add them
2654  * @connector: connector to add mode(s) to
2655  * @edid: EDID block to scan
2656  *
2657  * Standard modes can be calculated using the appropriate standard (DMT,
2658  * GTF or CVT. Grab them from @edid and add them to the list.
2659  */
2660 static int
2661 add_standard_modes(struct drm_connector *connector, struct edid *edid)
2662 {
2663         int i, modes = 0;
2664         struct detailed_mode_closure closure = {
2665                 .connector = connector,
2666                 .edid = edid,
2667         };
2668
2669         for (i = 0; i < EDID_STD_TIMINGS; i++) {
2670                 struct drm_display_mode *newmode;
2671
2672                 newmode = drm_mode_std(connector, edid,
2673                                        &edid->standard_timings[i]);
2674                 if (newmode) {
2675                         drm_mode_probed_add(connector, newmode);
2676                         modes++;
2677                 }
2678         }
2679
2680         if (version_greater(edid, 1, 0))
2681                 drm_for_each_detailed_block((u8 *)edid, do_standard_modes,
2682                                             &closure);
2683
2684         /* XXX should also look for standard codes in VTB blocks */
2685
2686         return modes + closure.modes;
2687 }
2688
2689 static int drm_cvt_modes(struct drm_connector *connector,
2690                          struct detailed_timing *timing)
2691 {
2692         int i, j, modes = 0;
2693         struct drm_display_mode *newmode;
2694         struct drm_device *dev = connector->dev;
2695         struct cvt_timing *cvt;
2696         const int rates[] = { 60, 85, 75, 60, 50 };
2697         const u8 empty[3] = { 0, 0, 0 };
2698
2699         for (i = 0; i < 4; i++) {
2700                 int uninitialized_var(width), height;
2701                 cvt = &(timing->data.other_data.data.cvt[i]);
2702
2703                 if (!memcmp(cvt->code, empty, 3))
2704                         continue;
2705
2706                 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
2707                 switch (cvt->code[1] & 0x0c) {
2708                 case 0x00:
2709                         width = height * 4 / 3;
2710                         break;
2711                 case 0x04:
2712                         width = height * 16 / 9;
2713                         break;
2714                 case 0x08:
2715                         width = height * 16 / 10;
2716                         break;
2717                 case 0x0c:
2718                         width = height * 15 / 9;
2719                         break;
2720                 }
2721
2722                 for (j = 1; j < 5; j++) {
2723                         if (cvt->code[2] & (1 << j)) {
2724                                 newmode = drm_cvt_mode(dev, width, height,
2725                                                        rates[j], j == 0,
2726                                                        false, false);
2727                                 if (newmode) {
2728                                         drm_mode_probed_add(connector, newmode);
2729                                         modes++;
2730                                 }
2731                         }
2732                 }
2733         }
2734
2735         return modes;
2736 }
2737
2738 static void
2739 do_cvt_mode(struct detailed_timing *timing, void *c)
2740 {
2741         struct detailed_mode_closure *closure = c;
2742         struct detailed_non_pixel *data = &timing->data.other_data;
2743
2744         if (data->type == EDID_DETAIL_CVT_3BYTE)
2745                 closure->modes += drm_cvt_modes(closure->connector, timing);
2746 }
2747
2748 static int
2749 add_cvt_modes(struct drm_connector *connector, struct edid *edid)
2750 {       
2751         struct detailed_mode_closure closure = {
2752                 .connector = connector,
2753                 .edid = edid,
2754         };
2755
2756         if (version_greater(edid, 1, 2))
2757                 drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure);
2758
2759         /* XXX should also look for CVT codes in VTB blocks */
2760
2761         return closure.modes;
2762 }
2763
2764 static void fixup_detailed_cea_mode_clock(struct drm_display_mode *mode);
2765
2766 static void
2767 do_detailed_mode(struct detailed_timing *timing, void *c)
2768 {
2769         struct detailed_mode_closure *closure = c;
2770         struct drm_display_mode *newmode;
2771
2772         if (timing->pixel_clock) {
2773                 newmode = drm_mode_detailed(closure->connector->dev,
2774                                             closure->edid, timing,
2775                                             closure->quirks);
2776                 if (!newmode)
2777                         return;
2778
2779                 if (closure->preferred)
2780                         newmode->type |= DRM_MODE_TYPE_PREFERRED;
2781
2782                 /*
2783                  * Detailed modes are limited to 10kHz pixel clock resolution,
2784                  * so fix up anything that looks like CEA/HDMI mode, but the clock
2785                  * is just slightly off.
2786                  */
2787                 fixup_detailed_cea_mode_clock(newmode);
2788
2789                 drm_mode_probed_add(closure->connector, newmode);
2790                 closure->modes++;
2791                 closure->preferred = 0;
2792         }
2793 }
2794
2795 /*
2796  * add_detailed_modes - Add modes from detailed timings
2797  * @connector: attached connector
2798  * @edid: EDID block to scan
2799  * @quirks: quirks to apply
2800  */
2801 static int
2802 add_detailed_modes(struct drm_connector *connector, struct edid *edid,
2803                    u32 quirks)
2804 {
2805         struct detailed_mode_closure closure = {
2806                 .connector = connector,
2807                 .edid = edid,
2808                 .preferred = 1,
2809                 .quirks = quirks,
2810         };
2811
2812         if (closure.preferred && !version_greater(edid, 1, 3))
2813                 closure.preferred =
2814                     (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
2815
2816         drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure);
2817
2818         return closure.modes;
2819 }
2820
2821 #define AUDIO_BLOCK     0x01
2822 #define VIDEO_BLOCK     0x02
2823 #define VENDOR_BLOCK    0x03
2824 #define SPEAKER_BLOCK   0x04
2825 #define USE_EXTENDED_TAG 0x07
2826 #define EXT_VIDEO_CAPABILITY_BLOCK 0x00
2827 #define EXT_VIDEO_DATA_BLOCK_420        0x0E
2828 #define EXT_VIDEO_CAP_BLOCK_Y420CMDB 0x0F
2829 #define EDID_BASIC_AUDIO        (1 << 6)
2830 #define EDID_CEA_YCRCB444       (1 << 5)
2831 #define EDID_CEA_YCRCB422       (1 << 4)
2832 #define EDID_CEA_VCDB_QS        (1 << 6)
2833
2834 /*
2835  * Search EDID for CEA extension block.
2836  */
2837 static u8 *drm_find_edid_extension(const struct edid *edid, int ext_id)
2838 {
2839         u8 *edid_ext = NULL;
2840         int i;
2841
2842         /* No EDID or EDID extensions */
2843         if (edid == NULL || edid->extensions == 0)
2844                 return NULL;
2845
2846         /* Find CEA extension */
2847         for (i = 0; i < edid->extensions; i++) {
2848                 edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1);
2849                 if (edid_ext[0] == ext_id)
2850                         break;
2851         }
2852
2853         if (i == edid->extensions)
2854                 return NULL;
2855
2856         return edid_ext;
2857 }
2858
2859 static u8 *drm_find_cea_extension(const struct edid *edid)
2860 {
2861         return drm_find_edid_extension(edid, CEA_EXT);
2862 }
2863
2864 static u8 *drm_find_displayid_extension(const struct edid *edid)
2865 {
2866         return drm_find_edid_extension(edid, DISPLAYID_EXT);
2867 }
2868
2869 /*
2870  * Calculate the alternate clock for the CEA mode
2871  * (60Hz vs. 59.94Hz etc.)
2872  */
2873 static unsigned int
2874 cea_mode_alternate_clock(const struct drm_display_mode *cea_mode)
2875 {
2876         unsigned int clock = cea_mode->clock;
2877
2878         if (cea_mode->vrefresh % 6 != 0)
2879                 return clock;
2880
2881         /*
2882          * edid_cea_modes contains the 59.94Hz
2883          * variant for 240 and 480 line modes,
2884          * and the 60Hz variant otherwise.
2885          */
2886         if (cea_mode->vdisplay == 240 || cea_mode->vdisplay == 480)
2887                 clock = DIV_ROUND_CLOSEST(clock * 1001, 1000);
2888         else
2889                 clock = DIV_ROUND_CLOSEST(clock * 1000, 1001);
2890
2891         return clock;
2892 }
2893
2894 static bool
2895 cea_mode_alternate_timings(u8 vic, struct drm_display_mode *mode)
2896 {
2897         /*
2898          * For certain VICs the spec allows the vertical
2899          * front porch to vary by one or two lines.
2900          *
2901          * cea_modes[] stores the variant with the shortest
2902          * vertical front porch. We can adjust the mode to
2903          * get the other variants by simply increasing the
2904          * vertical front porch length.
2905          */
2906         BUILD_BUG_ON(edid_cea_modes[8].vtotal != 262 ||
2907                      edid_cea_modes[9].vtotal != 262 ||
2908                      edid_cea_modes[12].vtotal != 262 ||
2909                      edid_cea_modes[13].vtotal != 262 ||
2910                      edid_cea_modes[23].vtotal != 312 ||
2911                      edid_cea_modes[24].vtotal != 312 ||
2912                      edid_cea_modes[27].vtotal != 312 ||
2913                      edid_cea_modes[28].vtotal != 312);
2914
2915         if (((vic == 8 || vic == 9 ||
2916               vic == 12 || vic == 13) && mode->vtotal < 263) ||
2917             ((vic == 23 || vic == 24 ||
2918               vic == 27 || vic == 28) && mode->vtotal < 314)) {
2919                 mode->vsync_start++;
2920                 mode->vsync_end++;
2921                 mode->vtotal++;
2922
2923                 return true;
2924         }
2925
2926         return false;
2927 }
2928
2929 static u8 drm_match_cea_mode_clock_tolerance(const struct drm_display_mode *to_match,
2930                                              unsigned int clock_tolerance)
2931 {
2932         u8 vic;
2933
2934         if (!to_match->clock)
2935                 return 0;
2936
2937         for (vic = 1; vic < ARRAY_SIZE(edid_cea_modes); vic++) {
2938                 struct drm_display_mode cea_mode = edid_cea_modes[vic];
2939                 unsigned int clock1, clock2;
2940
2941                 /* Check both 60Hz and 59.94Hz */
2942                 clock1 = cea_mode.clock;
2943                 clock2 = cea_mode_alternate_clock(&cea_mode);
2944
2945                 if (abs(to_match->clock - clock1) > clock_tolerance &&
2946                     abs(to_match->clock - clock2) > clock_tolerance)
2947                         continue;
2948
2949                 do {
2950                         if (drm_mode_equal_no_clocks_no_stereo(to_match, &cea_mode))
2951                                 return vic;
2952                 } while (cea_mode_alternate_timings(vic, &cea_mode));
2953         }
2954
2955         return 0;
2956 }
2957
2958 /**
2959  * drm_match_cea_mode - look for a CEA mode matching given mode
2960  * @to_match: display mode
2961  *
2962  * Return: The CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861
2963  * mode.
2964  */
2965 u8 drm_match_cea_mode(const struct drm_display_mode *to_match)
2966 {
2967         u8 vic;
2968
2969         if (!to_match->clock)
2970                 return 0;
2971
2972         for (vic = 1; vic < ARRAY_SIZE(edid_cea_modes); vic++) {
2973                 struct drm_display_mode cea_mode = edid_cea_modes[vic];
2974                 unsigned int clock1, clock2;
2975
2976                 /* Check both 60Hz and 59.94Hz */
2977                 clock1 = cea_mode.clock;
2978                 clock2 = cea_mode_alternate_clock(&cea_mode);
2979
2980                 if (KHZ2PICOS(to_match->clock) != KHZ2PICOS(clock1) &&
2981                     KHZ2PICOS(to_match->clock) != KHZ2PICOS(clock2))
2982                         continue;
2983
2984                 do {
2985                         if (drm_mode_equal_no_clocks_no_stereo(to_match, &cea_mode))
2986                                 return vic;
2987                 } while (cea_mode_alternate_timings(vic, &cea_mode));
2988         }
2989
2990         return 0;
2991 }
2992 EXPORT_SYMBOL(drm_match_cea_mode);
2993
2994 static bool drm_valid_cea_vic(u8 vic)
2995 {
2996         return vic > 0 && vic < ARRAY_SIZE(edid_cea_modes);
2997 }
2998
2999 /**
3000  * drm_get_cea_aspect_ratio - get the picture aspect ratio corresponding to
3001  * the input VIC from the CEA mode list
3002  * @video_code: ID given to each of the CEA modes
3003  *
3004  * Returns picture aspect ratio
3005  */
3006 enum hdmi_picture_aspect drm_get_cea_aspect_ratio(const u8 video_code)
3007 {
3008         return edid_cea_modes[video_code].picture_aspect_ratio;
3009 }
3010 EXPORT_SYMBOL(drm_get_cea_aspect_ratio);
3011
3012 /*
3013  * Calculate the alternate clock for HDMI modes (those from the HDMI vendor
3014  * specific block).
3015  *
3016  * It's almost like cea_mode_alternate_clock(), we just need to add an
3017  * exception for the VIC 4 mode (4096x2160@24Hz): no alternate clock for this
3018  * one.
3019  */
3020 static unsigned int
3021 hdmi_mode_alternate_clock(const struct drm_display_mode *hdmi_mode)
3022 {
3023         if (hdmi_mode->vdisplay == 4096 && hdmi_mode->hdisplay == 2160)
3024                 return hdmi_mode->clock;
3025
3026         return cea_mode_alternate_clock(hdmi_mode);
3027 }
3028
3029 static u8 drm_match_hdmi_mode_clock_tolerance(const struct drm_display_mode *to_match,
3030                                               unsigned int clock_tolerance)
3031 {
3032         u8 vic;
3033
3034         if (!to_match->clock)
3035                 return 0;
3036
3037         for (vic = 1; vic < ARRAY_SIZE(edid_4k_modes); vic++) {
3038                 const struct drm_display_mode *hdmi_mode = &edid_4k_modes[vic];
3039                 unsigned int clock1, clock2;
3040
3041                 /* Make sure to also match alternate clocks */
3042                 clock1 = hdmi_mode->clock;
3043                 clock2 = hdmi_mode_alternate_clock(hdmi_mode);
3044