Merge branch 'drm-next-4.19' of git://people.freedesktop.org/~agd5f/linux into drm...
[sfrench/cifs-2.6.git] / drivers / gpu / drm / amd / display / amdgpu_dm / amdgpu_dm_mst_types.c
1 /*
2  * Copyright 2012-15 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25
26 #include <linux/version.h>
27 #include <drm/drm_atomic_helper.h>
28 #include "dm_services.h"
29 #include "amdgpu.h"
30 #include "amdgpu_dm.h"
31 #include "amdgpu_dm_mst_types.h"
32
33 #include "dc.h"
34 #include "dm_helpers.h"
35
36 #include "dc_link_ddc.h"
37
38 /* #define TRACE_DPCD */
39
40 #ifdef TRACE_DPCD
41 #define SIDE_BAND_MSG(address) (address >= DP_SIDEBAND_MSG_DOWN_REQ_BASE && address < DP_SINK_COUNT_ESI)
42
43 static inline char *side_band_msg_type_to_str(uint32_t address)
44 {
45         static char str[10] = {0};
46
47         if (address < DP_SIDEBAND_MSG_UP_REP_BASE)
48                 strcpy(str, "DOWN_REQ");
49         else if (address < DP_SIDEBAND_MSG_DOWN_REP_BASE)
50                 strcpy(str, "UP_REP");
51         else if (address < DP_SIDEBAND_MSG_UP_REQ_BASE)
52                 strcpy(str, "DOWN_REP");
53         else
54                 strcpy(str, "UP_REQ");
55
56         return str;
57 }
58
59 static void log_dpcd(uint8_t type,
60                      uint32_t address,
61                      uint8_t *data,
62                      uint32_t size,
63                      bool res)
64 {
65         DRM_DEBUG_KMS("Op: %s, addr: %04x, SideBand Msg: %s, Op res: %s\n",
66                         (type == DP_AUX_NATIVE_READ) ||
67                         (type == DP_AUX_I2C_READ) ?
68                                         "Read" : "Write",
69                         address,
70                         SIDE_BAND_MSG(address) ?
71                                         side_band_msg_type_to_str(address) : "Nop",
72                         res ? "OK" : "Fail");
73
74         if (res) {
75                 print_hex_dump(KERN_INFO, "Body: ", DUMP_PREFIX_NONE, 16, 1, data, size, false);
76         }
77 }
78 #endif
79
80 static ssize_t dm_dp_aux_transfer(struct drm_dp_aux *aux,
81                                   struct drm_dp_aux_msg *msg)
82 {
83         ssize_t result = 0;
84         enum i2caux_transaction_action action;
85         enum aux_transaction_type type;
86
87         if (WARN_ON(msg->size > 16))
88                 return -E2BIG;
89
90         switch (msg->request & ~DP_AUX_I2C_MOT) {
91         case DP_AUX_NATIVE_READ:
92                 type = AUX_TRANSACTION_TYPE_DP;
93                 action = I2CAUX_TRANSACTION_ACTION_DP_READ;
94
95                 result = dc_link_aux_transfer(TO_DM_AUX(aux)->ddc_service,
96                                               msg->address,
97                                               &msg->reply,
98                                               msg->buffer,
99                                               msg->size,
100                                               type,
101                                               action);
102                 break;
103         case DP_AUX_NATIVE_WRITE:
104                 type = AUX_TRANSACTION_TYPE_DP;
105                 action = I2CAUX_TRANSACTION_ACTION_DP_WRITE;
106
107                 dc_link_aux_transfer(TO_DM_AUX(aux)->ddc_service,
108                                      msg->address,
109                                      &msg->reply,
110                                      msg->buffer,
111                                      msg->size,
112                                      type,
113                                      action);
114                 result = msg->size;
115                 break;
116         case DP_AUX_I2C_READ:
117                 type = AUX_TRANSACTION_TYPE_I2C;
118                 if (msg->request & DP_AUX_I2C_MOT)
119                         action = I2CAUX_TRANSACTION_ACTION_I2C_READ_MOT;
120                 else
121                         action = I2CAUX_TRANSACTION_ACTION_I2C_READ;
122
123                 result = dc_link_aux_transfer(TO_DM_AUX(aux)->ddc_service,
124                                               msg->address,
125                                               &msg->reply,
126                                               msg->buffer,
127                                               msg->size,
128                                               type,
129                                               action);
130                 break;
131         case DP_AUX_I2C_WRITE:
132                 type = AUX_TRANSACTION_TYPE_I2C;
133                 if (msg->request & DP_AUX_I2C_MOT)
134                         action = I2CAUX_TRANSACTION_ACTION_I2C_WRITE_MOT;
135                 else
136                         action = I2CAUX_TRANSACTION_ACTION_I2C_WRITE;
137
138                 dc_link_aux_transfer(TO_DM_AUX(aux)->ddc_service,
139                                      msg->address,
140                                      &msg->reply,
141                                      msg->buffer,
142                                      msg->size,
143                                      type,
144                                      action);
145                 result = msg->size;
146                 break;
147         default:
148                 return -EINVAL;
149         }
150
151 #ifdef TRACE_DPCD
152         log_dpcd(msg->request,
153                  msg->address,
154                  msg->buffer,
155                  msg->size,
156                  r == DDC_RESULT_SUCESSFULL);
157 #endif
158
159         if (result < 0) /* DC doesn't know about kernel error codes */
160                 result = -EIO;
161
162         return result;
163 }
164
165 static enum drm_connector_status
166 dm_dp_mst_detect(struct drm_connector *connector, bool force)
167 {
168         struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
169         struct amdgpu_dm_connector *master = aconnector->mst_port;
170
171         enum drm_connector_status status =
172                 drm_dp_mst_detect_port(
173                         connector,
174                         &master->mst_mgr,
175                         aconnector->port);
176
177         return status;
178 }
179
180 static void
181 dm_dp_mst_connector_destroy(struct drm_connector *connector)
182 {
183         struct amdgpu_dm_connector *amdgpu_dm_connector = to_amdgpu_dm_connector(connector);
184         struct amdgpu_encoder *amdgpu_encoder = amdgpu_dm_connector->mst_encoder;
185
186         if (amdgpu_dm_connector->edid) {
187                 kfree(amdgpu_dm_connector->edid);
188                 amdgpu_dm_connector->edid = NULL;
189         }
190
191         drm_encoder_cleanup(&amdgpu_encoder->base);
192         kfree(amdgpu_encoder);
193         drm_connector_cleanup(connector);
194         kfree(amdgpu_dm_connector);
195 }
196
197 static const struct drm_connector_funcs dm_dp_mst_connector_funcs = {
198         .detect = dm_dp_mst_detect,
199         .fill_modes = drm_helper_probe_single_connector_modes,
200         .destroy = dm_dp_mst_connector_destroy,
201         .reset = amdgpu_dm_connector_funcs_reset,
202         .atomic_duplicate_state = amdgpu_dm_connector_atomic_duplicate_state,
203         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
204         .atomic_set_property = amdgpu_dm_connector_atomic_set_property,
205         .atomic_get_property = amdgpu_dm_connector_atomic_get_property
206 };
207
208 void dm_dp_mst_dc_sink_create(struct drm_connector *connector)
209 {
210         struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
211         struct dc_sink *dc_sink;
212         struct dc_sink_init_data init_params = {
213                         .link = aconnector->dc_link,
214                         .sink_signal = SIGNAL_TYPE_DISPLAY_PORT_MST };
215
216         /* FIXME none of this is safe. we shouldn't touch aconnector here in
217          * atomic_check
218          */
219
220         /*
221          * TODO: Need to further figure out why ddc.algo is NULL while MST port exists
222          */
223         if (!aconnector->port || !aconnector->port->aux.ddc.algo)
224                 return;
225
226         ASSERT(aconnector->edid);
227
228         dc_sink = dc_link_add_remote_sink(
229                 aconnector->dc_link,
230                 (uint8_t *)aconnector->edid,
231                 (aconnector->edid->extensions + 1) * EDID_LENGTH,
232                 &init_params);
233
234         dc_sink->priv = aconnector;
235         aconnector->dc_sink = dc_sink;
236
237         amdgpu_dm_add_sink_to_freesync_module(
238                         connector, aconnector->edid);
239 }
240
241 static int dm_dp_mst_get_modes(struct drm_connector *connector)
242 {
243         struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
244         int ret = 0;
245
246         if (!aconnector)
247                 return drm_add_edid_modes(connector, NULL);
248
249         if (!aconnector->edid) {
250                 struct edid *edid;
251                 edid = drm_dp_mst_get_edid(connector, &aconnector->mst_port->mst_mgr, aconnector->port);
252
253                 if (!edid) {
254                         drm_connector_update_edid_property(
255                                 &aconnector->base,
256                                 NULL);
257                         return ret;
258                 }
259
260                 aconnector->edid = edid;
261         }
262
263         if (!aconnector->dc_sink) {
264                 struct dc_sink *dc_sink;
265                 struct dc_sink_init_data init_params = {
266                                 .link = aconnector->dc_link,
267                                 .sink_signal = SIGNAL_TYPE_DISPLAY_PORT_MST };
268                 dc_sink = dc_link_add_remote_sink(
269                         aconnector->dc_link,
270                         (uint8_t *)aconnector->edid,
271                         (aconnector->edid->extensions + 1) * EDID_LENGTH,
272                         &init_params);
273
274                 dc_sink->priv = aconnector;
275                 aconnector->dc_sink = dc_sink;
276
277                 if (aconnector->dc_sink)
278                         amdgpu_dm_add_sink_to_freesync_module(
279                                         connector, aconnector->edid);
280         }
281
282         drm_connector_update_edid_property(
283                                         &aconnector->base, aconnector->edid);
284
285         ret = drm_add_edid_modes(connector, aconnector->edid);
286
287         return ret;
288 }
289
290 static struct drm_encoder *dm_mst_best_encoder(struct drm_connector *connector)
291 {
292         struct amdgpu_dm_connector *amdgpu_dm_connector = to_amdgpu_dm_connector(connector);
293
294         return &amdgpu_dm_connector->mst_encoder->base;
295 }
296
297 static const struct drm_connector_helper_funcs dm_dp_mst_connector_helper_funcs = {
298         .get_modes = dm_dp_mst_get_modes,
299         .mode_valid = amdgpu_dm_connector_mode_valid,
300         .best_encoder = dm_mst_best_encoder,
301 };
302
303 static void amdgpu_dm_encoder_destroy(struct drm_encoder *encoder)
304 {
305         drm_encoder_cleanup(encoder);
306         kfree(encoder);
307 }
308
309 static const struct drm_encoder_funcs amdgpu_dm_encoder_funcs = {
310         .destroy = amdgpu_dm_encoder_destroy,
311 };
312
313 static struct amdgpu_encoder *
314 dm_dp_create_fake_mst_encoder(struct amdgpu_dm_connector *connector)
315 {
316         struct drm_device *dev = connector->base.dev;
317         struct amdgpu_device *adev = dev->dev_private;
318         struct amdgpu_encoder *amdgpu_encoder;
319         struct drm_encoder *encoder;
320         const struct drm_connector_helper_funcs *connector_funcs =
321                 connector->base.helper_private;
322         struct drm_encoder *enc_master =
323                 connector_funcs->best_encoder(&connector->base);
324
325         DRM_DEBUG_KMS("enc master is %p\n", enc_master);
326         amdgpu_encoder = kzalloc(sizeof(*amdgpu_encoder), GFP_KERNEL);
327         if (!amdgpu_encoder)
328                 return NULL;
329
330         encoder = &amdgpu_encoder->base;
331         encoder->possible_crtcs = amdgpu_dm_get_encoder_crtc_mask(adev);
332
333         drm_encoder_init(
334                 dev,
335                 &amdgpu_encoder->base,
336                 &amdgpu_dm_encoder_funcs,
337                 DRM_MODE_ENCODER_DPMST,
338                 NULL);
339
340         drm_encoder_helper_add(encoder, &amdgpu_dm_encoder_helper_funcs);
341
342         return amdgpu_encoder;
343 }
344
345 static struct drm_connector *
346 dm_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
347                         struct drm_dp_mst_port *port,
348                         const char *pathprop)
349 {
350         struct amdgpu_dm_connector *master = container_of(mgr, struct amdgpu_dm_connector, mst_mgr);
351         struct drm_device *dev = master->base.dev;
352         struct amdgpu_device *adev = dev->dev_private;
353         struct amdgpu_dm_connector *aconnector;
354         struct drm_connector *connector;
355         struct drm_connector_list_iter conn_iter;
356
357         drm_connector_list_iter_begin(dev, &conn_iter);
358         drm_for_each_connector_iter(connector, &conn_iter) {
359                 aconnector = to_amdgpu_dm_connector(connector);
360                 if (aconnector->mst_port == master
361                                 && !aconnector->port) {
362                         DRM_INFO("DM_MST: reusing connector: %p [id: %d] [master: %p]\n",
363                                                 aconnector, connector->base.id, aconnector->mst_port);
364
365                         aconnector->port = port;
366                         drm_connector_set_path_property(connector, pathprop);
367
368                         drm_connector_list_iter_end(&conn_iter);
369                         aconnector->mst_connected = true;
370                         return &aconnector->base;
371                 }
372         }
373         drm_connector_list_iter_end(&conn_iter);
374
375         aconnector = kzalloc(sizeof(*aconnector), GFP_KERNEL);
376         if (!aconnector)
377                 return NULL;
378
379         connector = &aconnector->base;
380         aconnector->port = port;
381         aconnector->mst_port = master;
382
383         if (drm_connector_init(
384                 dev,
385                 connector,
386                 &dm_dp_mst_connector_funcs,
387                 DRM_MODE_CONNECTOR_DisplayPort)) {
388                 kfree(aconnector);
389                 return NULL;
390         }
391         drm_connector_helper_add(connector, &dm_dp_mst_connector_helper_funcs);
392
393         amdgpu_dm_connector_init_helper(
394                 &adev->dm,
395                 aconnector,
396                 DRM_MODE_CONNECTOR_DisplayPort,
397                 master->dc_link,
398                 master->connector_id);
399
400         aconnector->mst_encoder = dm_dp_create_fake_mst_encoder(master);
401
402         /*
403          * TODO: understand why this one is needed
404          */
405         drm_object_attach_property(
406                 &connector->base,
407                 dev->mode_config.path_property,
408                 0);
409         drm_object_attach_property(
410                 &connector->base,
411                 dev->mode_config.tile_property,
412                 0);
413
414         drm_connector_set_path_property(connector, pathprop);
415
416         /*
417          * Initialize connector state before adding the connectror to drm and
418          * framebuffer lists
419          */
420         amdgpu_dm_connector_funcs_reset(connector);
421
422         aconnector->mst_connected = true;
423
424         DRM_INFO("DM_MST: added connector: %p [id: %d] [master: %p]\n",
425                         aconnector, connector->base.id, aconnector->mst_port);
426
427         DRM_DEBUG_KMS(":%d\n", connector->base.id);
428
429         return connector;
430 }
431
432 static void dm_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
433                                         struct drm_connector *connector)
434 {
435         struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
436
437         DRM_INFO("DM_MST: Disabling connector: %p [id: %d] [master: %p]\n",
438                                 aconnector, connector->base.id, aconnector->mst_port);
439
440         aconnector->port = NULL;
441         if (aconnector->dc_sink) {
442                 amdgpu_dm_remove_sink_from_freesync_module(connector);
443                 dc_link_remove_remote_sink(aconnector->dc_link, aconnector->dc_sink);
444                 dc_sink_release(aconnector->dc_sink);
445                 aconnector->dc_sink = NULL;
446         }
447
448         aconnector->mst_connected = false;
449 }
450
451 static void dm_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr)
452 {
453         struct amdgpu_dm_connector *master = container_of(mgr, struct amdgpu_dm_connector, mst_mgr);
454         struct drm_device *dev = master->base.dev;
455
456         drm_kms_helper_hotplug_event(dev);
457 }
458
459 static void dm_dp_mst_link_status_reset(struct drm_connector *connector)
460 {
461         mutex_lock(&connector->dev->mode_config.mutex);
462         drm_connector_set_link_status_property(connector, DRM_MODE_LINK_STATUS_BAD);
463         mutex_unlock(&connector->dev->mode_config.mutex);
464 }
465
466 static void dm_dp_mst_register_connector(struct drm_connector *connector)
467 {
468         struct drm_device *dev = connector->dev;
469         struct amdgpu_device *adev = dev->dev_private;
470         struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
471
472         if (adev->mode_info.rfbdev)
473                 drm_fb_helper_add_one_connector(&adev->mode_info.rfbdev->helper, connector);
474         else
475                 DRM_ERROR("adev->mode_info.rfbdev is NULL\n");
476
477         drm_connector_register(connector);
478
479         if (aconnector->mst_connected)
480                 dm_dp_mst_link_status_reset(connector);
481 }
482
483 static const struct drm_dp_mst_topology_cbs dm_mst_cbs = {
484         .add_connector = dm_dp_add_mst_connector,
485         .destroy_connector = dm_dp_destroy_mst_connector,
486         .hotplug = dm_dp_mst_hotplug,
487         .register_connector = dm_dp_mst_register_connector
488 };
489
490 void amdgpu_dm_initialize_dp_connector(struct amdgpu_display_manager *dm,
491                                        struct amdgpu_dm_connector *aconnector)
492 {
493         aconnector->dm_dp_aux.aux.name = "dmdc";
494         aconnector->dm_dp_aux.aux.dev = dm->adev->dev;
495         aconnector->dm_dp_aux.aux.transfer = dm_dp_aux_transfer;
496         aconnector->dm_dp_aux.ddc_service = aconnector->dc_link->ddc;
497
498         drm_dp_aux_register(&aconnector->dm_dp_aux.aux);
499         aconnector->mst_mgr.cbs = &dm_mst_cbs;
500         drm_dp_mst_topology_mgr_init(
501                 &aconnector->mst_mgr,
502                 dm->adev->ddev,
503                 &aconnector->dm_dp_aux.aux,
504                 16,
505                 4,
506                 aconnector->connector_id);
507 }
508