1 // SPDX-License-Identifier: GPL-2.0-only
3 * PCA953x 4/8/16/24/40 bit I/O ports
5 * Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com>
6 * Copyright (C) 2007 Marvell International Ltd.
8 * Derived from drivers/i2c/chips/pca9539.c
11 #include <linux/acpi.h>
12 #include <linux/gpio/driver.h>
13 #include <linux/gpio/consumer.h>
14 #include <linux/i2c.h>
15 #include <linux/init.h>
16 #include <linux/interrupt.h>
17 #include <linux/module.h>
18 #include <linux/of_platform.h>
19 #include <linux/platform_data/pca953x.h>
20 #include <linux/regmap.h>
21 #include <linux/regulator/consumer.h>
22 #include <linux/slab.h>
24 #include <asm/unaligned.h>
26 #define PCA953X_INPUT 0x00
27 #define PCA953X_OUTPUT 0x01
28 #define PCA953X_INVERT 0x02
29 #define PCA953X_DIRECTION 0x03
31 #define REG_ADDR_MASK 0x3f
32 #define REG_ADDR_EXT 0x40
33 #define REG_ADDR_AI 0x80
35 #define PCA957X_IN 0x00
36 #define PCA957X_INVRT 0x01
37 #define PCA957X_BKEN 0x02
38 #define PCA957X_PUPD 0x03
39 #define PCA957X_CFG 0x04
40 #define PCA957X_OUT 0x05
41 #define PCA957X_MSK 0x06
42 #define PCA957X_INTS 0x07
44 #define PCAL953X_OUT_STRENGTH 0x20
45 #define PCAL953X_IN_LATCH 0x22
46 #define PCAL953X_PULL_EN 0x23
47 #define PCAL953X_PULL_SEL 0x24
48 #define PCAL953X_INT_MASK 0x25
49 #define PCAL953X_INT_STAT 0x26
50 #define PCAL953X_OUT_CONF 0x27
52 #define PCAL6524_INT_EDGE 0x28
53 #define PCAL6524_INT_CLR 0x2a
54 #define PCAL6524_IN_STATUS 0x2b
55 #define PCAL6524_OUT_INDCONF 0x2c
56 #define PCAL6524_DEBOUNCE 0x2d
58 #define PCA_GPIO_MASK 0x00FF
60 #define PCAL_GPIO_MASK 0x1f
61 #define PCAL_PINCTRL_MASK 0x60
63 #define PCA_INT 0x0100
64 #define PCA_PCAL 0x0200
65 #define PCA_LATCH_INT (PCA_PCAL | PCA_INT)
66 #define PCA953X_TYPE 0x1000
67 #define PCA957X_TYPE 0x2000
68 #define PCA_TYPE_MASK 0xF000
70 #define PCA_CHIP_TYPE(x) ((x) & PCA_TYPE_MASK)
72 static const struct i2c_device_id pca953x_id[] = {
73 { "pca6416", 16 | PCA953X_TYPE | PCA_INT, },
74 { "pca9505", 40 | PCA953X_TYPE | PCA_INT, },
75 { "pca9534", 8 | PCA953X_TYPE | PCA_INT, },
76 { "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
77 { "pca9536", 4 | PCA953X_TYPE, },
78 { "pca9537", 4 | PCA953X_TYPE | PCA_INT, },
79 { "pca9538", 8 | PCA953X_TYPE | PCA_INT, },
80 { "pca9539", 16 | PCA953X_TYPE | PCA_INT, },
81 { "pca9554", 8 | PCA953X_TYPE | PCA_INT, },
82 { "pca9555", 16 | PCA953X_TYPE | PCA_INT, },
83 { "pca9556", 8 | PCA953X_TYPE, },
84 { "pca9557", 8 | PCA953X_TYPE, },
85 { "pca9574", 8 | PCA957X_TYPE | PCA_INT, },
86 { "pca9575", 16 | PCA957X_TYPE | PCA_INT, },
87 { "pca9698", 40 | PCA953X_TYPE, },
89 { "pcal6416", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
90 { "pcal6524", 24 | PCA953X_TYPE | PCA_LATCH_INT, },
91 { "pcal9555a", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
93 { "max7310", 8 | PCA953X_TYPE, },
94 { "max7312", 16 | PCA953X_TYPE | PCA_INT, },
95 { "max7313", 16 | PCA953X_TYPE | PCA_INT, },
96 { "max7315", 8 | PCA953X_TYPE | PCA_INT, },
97 { "max7318", 16 | PCA953X_TYPE | PCA_INT, },
98 { "pca6107", 8 | PCA953X_TYPE | PCA_INT, },
99 { "tca6408", 8 | PCA953X_TYPE | PCA_INT, },
100 { "tca6416", 16 | PCA953X_TYPE | PCA_INT, },
101 { "tca6424", 24 | PCA953X_TYPE | PCA_INT, },
102 { "tca9539", 16 | PCA953X_TYPE | PCA_INT, },
103 { "tca9554", 8 | PCA953X_TYPE | PCA_INT, },
104 { "xra1202", 8 | PCA953X_TYPE },
107 MODULE_DEVICE_TABLE(i2c, pca953x_id);
109 static const struct acpi_device_id pca953x_acpi_ids[] = {
110 { "INT3491", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
113 MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids);
118 #define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ)
120 struct pca953x_reg_config {
127 static const struct pca953x_reg_config pca953x_regs = {
128 .direction = PCA953X_DIRECTION,
129 .output = PCA953X_OUTPUT,
130 .input = PCA953X_INPUT,
131 .invert = PCA953X_INVERT,
134 static const struct pca953x_reg_config pca957x_regs = {
135 .direction = PCA957X_CFG,
136 .output = PCA957X_OUT,
138 .invert = PCA957X_INVRT,
141 struct pca953x_chip {
143 struct mutex i2c_lock;
144 struct regmap *regmap;
146 #ifdef CONFIG_GPIO_PCA953X_IRQ
147 struct mutex irq_lock;
148 u8 irq_mask[MAX_BANK];
149 u8 irq_stat[MAX_BANK];
150 u8 irq_trig_raise[MAX_BANK];
151 u8 irq_trig_fall[MAX_BANK];
152 struct irq_chip irq_chip;
154 atomic_t wakeup_path;
156 struct i2c_client *client;
157 struct gpio_chip gpio_chip;
158 const char *const *names;
159 unsigned long driver_data;
160 struct regulator *regulator;
162 const struct pca953x_reg_config *regs;
165 static int pca953x_bank_shift(struct pca953x_chip *chip)
167 return fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
170 #define PCA953x_BANK_INPUT BIT(0)
171 #define PCA953x_BANK_OUTPUT BIT(1)
172 #define PCA953x_BANK_POLARITY BIT(2)
173 #define PCA953x_BANK_CONFIG BIT(3)
175 #define PCA957x_BANK_INPUT BIT(0)
176 #define PCA957x_BANK_POLARITY BIT(1)
177 #define PCA957x_BANK_BUSHOLD BIT(2)
178 #define PCA957x_BANK_CONFIG BIT(4)
179 #define PCA957x_BANK_OUTPUT BIT(5)
181 #define PCAL9xxx_BANK_IN_LATCH BIT(8 + 2)
182 #define PCAL9xxx_BANK_PULL_EN BIT(8 + 3)
183 #define PCAL9xxx_BANK_PULL_SEL BIT(8 + 4)
184 #define PCAL9xxx_BANK_IRQ_MASK BIT(8 + 5)
185 #define PCAL9xxx_BANK_IRQ_STAT BIT(8 + 6)
188 * We care about the following registers:
189 * - Standard set, below 0x40, each port can be replicated up to 8 times
191 * Input port 0x00 + 0 * bank_size R
192 * Output port 0x00 + 1 * bank_size RW
193 * Polarity Inversion port 0x00 + 2 * bank_size RW
194 * Configuration port 0x00 + 3 * bank_size RW
195 * - PCA957x with mixed up registers
196 * Input port 0x00 + 0 * bank_size R
197 * Polarity Inversion port 0x00 + 1 * bank_size RW
198 * Bus hold port 0x00 + 2 * bank_size RW
199 * Configuration port 0x00 + 4 * bank_size RW
200 * Output port 0x00 + 5 * bank_size RW
202 * - Extended set, above 0x40, often chip specific.
203 * - PCAL6524/PCAL9555A with custom PCAL IRQ handling:
204 * Input latch register 0x40 + 2 * bank_size RW
205 * Pull-up/pull-down enable reg 0x40 + 3 * bank_size RW
206 * Pull-up/pull-down select reg 0x40 + 4 * bank_size RW
207 * Interrupt mask register 0x40 + 5 * bank_size RW
208 * Interrupt status register 0x40 + 6 * bank_size R
210 * - Registers with bit 0x80 set, the AI bit
211 * The bit is cleared and the registers fall into one of the
215 static bool pca953x_check_register(struct pca953x_chip *chip, unsigned int reg,
218 int bank_shift = pca953x_bank_shift(chip);
219 int bank = (reg & REG_ADDR_MASK) >> bank_shift;
220 int offset = reg & (BIT(bank_shift) - 1);
222 /* Special PCAL extended register check. */
223 if (reg & REG_ADDR_EXT) {
224 if (!(chip->driver_data & PCA_PCAL))
229 /* Register is not in the matching bank. */
230 if (!(BIT(bank) & checkbank))
233 /* Register is not within allowed range of bank. */
234 if (offset >= NBANK(chip))
240 static bool pca953x_readable_register(struct device *dev, unsigned int reg)
242 struct pca953x_chip *chip = dev_get_drvdata(dev);
245 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
246 bank = PCA953x_BANK_INPUT | PCA953x_BANK_OUTPUT |
247 PCA953x_BANK_POLARITY | PCA953x_BANK_CONFIG;
249 bank = PCA957x_BANK_INPUT | PCA957x_BANK_OUTPUT |
250 PCA957x_BANK_POLARITY | PCA957x_BANK_CONFIG |
251 PCA957x_BANK_BUSHOLD;
254 if (chip->driver_data & PCA_PCAL) {
255 bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN |
256 PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK |
257 PCAL9xxx_BANK_IRQ_STAT;
260 return pca953x_check_register(chip, reg, bank);
263 static bool pca953x_writeable_register(struct device *dev, unsigned int reg)
265 struct pca953x_chip *chip = dev_get_drvdata(dev);
268 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
269 bank = PCA953x_BANK_OUTPUT | PCA953x_BANK_POLARITY |
272 bank = PCA957x_BANK_OUTPUT | PCA957x_BANK_POLARITY |
273 PCA957x_BANK_CONFIG | PCA957x_BANK_BUSHOLD;
276 if (chip->driver_data & PCA_PCAL)
277 bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN |
278 PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK;
280 return pca953x_check_register(chip, reg, bank);
283 static bool pca953x_volatile_register(struct device *dev, unsigned int reg)
285 struct pca953x_chip *chip = dev_get_drvdata(dev);
288 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE)
289 bank = PCA953x_BANK_INPUT;
291 bank = PCA957x_BANK_INPUT;
293 if (chip->driver_data & PCA_PCAL)
294 bank |= PCAL9xxx_BANK_IRQ_STAT;
296 return pca953x_check_register(chip, reg, bank);
299 static const struct regmap_config pca953x_i2c_regmap = {
303 .readable_reg = pca953x_readable_register,
304 .writeable_reg = pca953x_writeable_register,
305 .volatile_reg = pca953x_volatile_register,
307 .cache_type = REGCACHE_RBTREE,
308 /* REVISIT: should be 0x7f but some 24 bit chips use REG_ADDR_AI */
309 .max_register = 0xff,
312 static u8 pca953x_recalc_addr(struct pca953x_chip *chip, int reg, int off,
313 bool write, bool addrinc)
315 int bank_shift = pca953x_bank_shift(chip);
316 int addr = (reg & PCAL_GPIO_MASK) << bank_shift;
317 int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1;
318 u8 regaddr = pinctrl | addr | (off / BANK_SZ);
320 /* Single byte read doesn't need AI bit set. */
324 /* Chips with 24 and more GPIOs always support Auto Increment */
325 if (write && NBANK(chip) > 2)
326 regaddr |= REG_ADDR_AI;
328 /* PCA9575 needs address-increment on multi-byte writes */
329 if (PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE)
330 regaddr |= REG_ADDR_AI;
335 static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val)
337 u8 regaddr = pca953x_recalc_addr(chip, reg, 0, true, true);
340 ret = regmap_bulk_write(chip->regmap, regaddr, val, NBANK(chip));
342 dev_err(&chip->client->dev, "failed writing register\n");
349 static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val)
351 u8 regaddr = pca953x_recalc_addr(chip, reg, 0, false, true);
354 ret = regmap_bulk_read(chip->regmap, regaddr, val, NBANK(chip));
356 dev_err(&chip->client->dev, "failed reading register\n");
363 static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
365 struct pca953x_chip *chip = gpiochip_get_data(gc);
366 u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off,
368 u8 bit = BIT(off % BANK_SZ);
371 mutex_lock(&chip->i2c_lock);
372 ret = regmap_write_bits(chip->regmap, dirreg, bit, bit);
373 mutex_unlock(&chip->i2c_lock);
377 static int pca953x_gpio_direction_output(struct gpio_chip *gc,
378 unsigned off, int val)
380 struct pca953x_chip *chip = gpiochip_get_data(gc);
381 u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off,
383 u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off,
385 u8 bit = BIT(off % BANK_SZ);
388 mutex_lock(&chip->i2c_lock);
389 /* set output level */
390 ret = regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0);
395 ret = regmap_write_bits(chip->regmap, dirreg, bit, 0);
397 mutex_unlock(&chip->i2c_lock);
401 static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
403 struct pca953x_chip *chip = gpiochip_get_data(gc);
404 u8 inreg = pca953x_recalc_addr(chip, chip->regs->input, off,
406 u8 bit = BIT(off % BANK_SZ);
410 mutex_lock(&chip->i2c_lock);
411 ret = regmap_read(chip->regmap, inreg, ®_val);
412 mutex_unlock(&chip->i2c_lock);
414 /* NOTE: diagnostic already emitted; that's all we should
415 * do unless gpio_*_value_cansleep() calls become different
416 * from their nonsleeping siblings (and report faults).
421 return !!(reg_val & bit);
424 static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
426 struct pca953x_chip *chip = gpiochip_get_data(gc);
427 u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off,
429 u8 bit = BIT(off % BANK_SZ);
431 mutex_lock(&chip->i2c_lock);
432 regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0);
433 mutex_unlock(&chip->i2c_lock);
436 static int pca953x_gpio_get_direction(struct gpio_chip *gc, unsigned off)
438 struct pca953x_chip *chip = gpiochip_get_data(gc);
439 u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off,
441 u8 bit = BIT(off % BANK_SZ);
445 mutex_lock(&chip->i2c_lock);
446 ret = regmap_read(chip->regmap, dirreg, ®_val);
447 mutex_unlock(&chip->i2c_lock);
451 return !!(reg_val & bit);
454 static void pca953x_gpio_set_multiple(struct gpio_chip *gc,
455 unsigned long *mask, unsigned long *bits)
457 struct pca953x_chip *chip = gpiochip_get_data(gc);
458 unsigned int bank_mask, bank_val;
460 u8 reg_val[MAX_BANK];
463 mutex_lock(&chip->i2c_lock);
464 ret = pca953x_read_regs(chip, chip->regs->output, reg_val);
468 for (bank = 0; bank < NBANK(chip); bank++) {
469 bank_mask = mask[bank / sizeof(*mask)] >>
470 ((bank % sizeof(*mask)) * 8);
472 bank_val = bits[bank / sizeof(*bits)] >>
473 ((bank % sizeof(*bits)) * 8);
474 bank_val &= bank_mask;
475 reg_val[bank] = (reg_val[bank] & ~bank_mask) | bank_val;
479 pca953x_write_regs(chip, chip->regs->output, reg_val);
481 mutex_unlock(&chip->i2c_lock);
484 static int pca953x_gpio_set_pull_up_down(struct pca953x_chip *chip,
486 unsigned long config)
488 u8 pull_en_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_EN, offset,
490 u8 pull_sel_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_SEL, offset,
492 u8 bit = BIT(offset % BANK_SZ);
496 * pull-up/pull-down configuration requires PCAL extended
499 if (!(chip->driver_data & PCA_PCAL))
502 mutex_lock(&chip->i2c_lock);
504 /* Disable pull-up/pull-down */
505 ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, 0);
509 /* Configure pull-up/pull-down */
510 if (config == PIN_CONFIG_BIAS_PULL_UP)
511 ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, bit);
512 else if (config == PIN_CONFIG_BIAS_PULL_DOWN)
513 ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, 0);
517 /* Enable pull-up/pull-down */
518 ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, bit);
521 mutex_unlock(&chip->i2c_lock);
525 static int pca953x_gpio_set_config(struct gpio_chip *gc, unsigned int offset,
526 unsigned long config)
528 struct pca953x_chip *chip = gpiochip_get_data(gc);
531 case PIN_CONFIG_BIAS_PULL_UP:
532 case PIN_CONFIG_BIAS_PULL_DOWN:
533 return pca953x_gpio_set_pull_up_down(chip, offset, config);
539 static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
541 struct gpio_chip *gc;
543 gc = &chip->gpio_chip;
545 gc->direction_input = pca953x_gpio_direction_input;
546 gc->direction_output = pca953x_gpio_direction_output;
547 gc->get = pca953x_gpio_get_value;
548 gc->set = pca953x_gpio_set_value;
549 gc->get_direction = pca953x_gpio_get_direction;
550 gc->set_multiple = pca953x_gpio_set_multiple;
551 gc->set_config = pca953x_gpio_set_config;
552 gc->can_sleep = true;
554 gc->base = chip->gpio_start;
556 gc->label = dev_name(&chip->client->dev);
557 gc->parent = &chip->client->dev;
558 gc->owner = THIS_MODULE;
559 gc->names = chip->names;
562 #ifdef CONFIG_GPIO_PCA953X_IRQ
563 static void pca953x_irq_mask(struct irq_data *d)
565 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
566 struct pca953x_chip *chip = gpiochip_get_data(gc);
568 chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ));
571 static void pca953x_irq_unmask(struct irq_data *d)
573 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
574 struct pca953x_chip *chip = gpiochip_get_data(gc);
576 chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ);
579 static int pca953x_irq_set_wake(struct irq_data *d, unsigned int on)
581 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
582 struct pca953x_chip *chip = gpiochip_get_data(gc);
585 atomic_inc(&chip->wakeup_path);
587 atomic_dec(&chip->wakeup_path);
589 return irq_set_irq_wake(chip->client->irq, on);
592 static void pca953x_irq_bus_lock(struct irq_data *d)
594 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
595 struct pca953x_chip *chip = gpiochip_get_data(gc);
597 mutex_lock(&chip->irq_lock);
600 static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
602 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
603 struct pca953x_chip *chip = gpiochip_get_data(gc);
606 u8 invert_irq_mask[MAX_BANK];
607 u8 reg_direction[MAX_BANK];
609 pca953x_read_regs(chip, chip->regs->direction, reg_direction);
611 if (chip->driver_data & PCA_PCAL) {
612 /* Enable latch on interrupt-enabled inputs */
613 pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask);
615 for (i = 0; i < NBANK(chip); i++)
616 invert_irq_mask[i] = ~chip->irq_mask[i];
618 /* Unmask enabled interrupts */
619 pca953x_write_regs(chip, PCAL953X_INT_MASK, invert_irq_mask);
622 /* Look for any newly setup interrupt */
623 for (i = 0; i < NBANK(chip); i++) {
624 new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i];
625 new_irqs &= reg_direction[i];
628 level = __ffs(new_irqs);
629 pca953x_gpio_direction_input(&chip->gpio_chip,
630 level + (BANK_SZ * i));
631 new_irqs &= ~(1 << level);
635 mutex_unlock(&chip->irq_lock);
638 static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
640 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
641 struct pca953x_chip *chip = gpiochip_get_data(gc);
642 int bank_nb = d->hwirq / BANK_SZ;
643 u8 mask = 1 << (d->hwirq % BANK_SZ);
645 if (!(type & IRQ_TYPE_EDGE_BOTH)) {
646 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
651 if (type & IRQ_TYPE_EDGE_FALLING)
652 chip->irq_trig_fall[bank_nb] |= mask;
654 chip->irq_trig_fall[bank_nb] &= ~mask;
656 if (type & IRQ_TYPE_EDGE_RISING)
657 chip->irq_trig_raise[bank_nb] |= mask;
659 chip->irq_trig_raise[bank_nb] &= ~mask;
664 static void pca953x_irq_shutdown(struct irq_data *d)
666 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
667 struct pca953x_chip *chip = gpiochip_get_data(gc);
668 u8 mask = 1 << (d->hwirq % BANK_SZ);
670 chip->irq_trig_raise[d->hwirq / BANK_SZ] &= ~mask;
671 chip->irq_trig_fall[d->hwirq / BANK_SZ] &= ~mask;
674 static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending)
676 u8 cur_stat[MAX_BANK];
677 u8 old_stat[MAX_BANK];
678 bool pending_seen = false;
679 bool trigger_seen = false;
680 u8 trigger[MAX_BANK];
681 u8 reg_direction[MAX_BANK];
684 if (chip->driver_data & PCA_PCAL) {
685 /* Read the current interrupt status from the device */
686 ret = pca953x_read_regs(chip, PCAL953X_INT_STAT, trigger);
690 /* Check latched inputs and clear interrupt status */
691 ret = pca953x_read_regs(chip, PCA953X_INPUT, cur_stat);
695 for (i = 0; i < NBANK(chip); i++) {
696 /* Apply filter for rising/falling edge selection */
697 pending[i] = (~cur_stat[i] & chip->irq_trig_fall[i]) |
698 (cur_stat[i] & chip->irq_trig_raise[i]);
699 pending[i] &= trigger[i];
707 ret = pca953x_read_regs(chip, chip->regs->input, cur_stat);
711 /* Remove output pins from the equation */
712 pca953x_read_regs(chip, chip->regs->direction, reg_direction);
713 for (i = 0; i < NBANK(chip); i++)
714 cur_stat[i] &= reg_direction[i];
716 memcpy(old_stat, chip->irq_stat, NBANK(chip));
718 for (i = 0; i < NBANK(chip); i++) {
719 trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i];
727 memcpy(chip->irq_stat, cur_stat, NBANK(chip));
729 for (i = 0; i < NBANK(chip); i++) {
730 pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) |
731 (cur_stat[i] & chip->irq_trig_raise[i]);
732 pending[i] &= trigger[i];
740 static irqreturn_t pca953x_irq_handler(int irq, void *devid)
742 struct pca953x_chip *chip = devid;
743 u8 pending[MAX_BANK];
745 unsigned nhandled = 0;
748 if (!pca953x_irq_pending(chip, pending))
751 for (i = 0; i < NBANK(chip); i++) {
753 level = __ffs(pending[i]);
754 handle_nested_irq(irq_find_mapping(chip->gpio_chip.irq.domain,
755 level + (BANK_SZ * i)));
756 pending[i] &= ~(1 << level);
761 return (nhandled > 0) ? IRQ_HANDLED : IRQ_NONE;
764 static int pca953x_irq_setup(struct pca953x_chip *chip,
767 struct i2c_client *client = chip->client;
768 struct irq_chip *irq_chip = &chip->irq_chip;
769 u8 reg_direction[MAX_BANK];
778 if (!(chip->driver_data & PCA_INT))
781 ret = pca953x_read_regs(chip, chip->regs->input, chip->irq_stat);
786 * There is no way to know which GPIO line generated the
787 * interrupt. We have to rely on the previous read for
790 pca953x_read_regs(chip, chip->regs->direction, reg_direction);
791 for (i = 0; i < NBANK(chip); i++)
792 chip->irq_stat[i] &= reg_direction[i];
793 mutex_init(&chip->irq_lock);
795 ret = devm_request_threaded_irq(&client->dev, client->irq,
796 NULL, pca953x_irq_handler,
797 IRQF_TRIGGER_LOW | IRQF_ONESHOT |
799 dev_name(&client->dev), chip);
801 dev_err(&client->dev, "failed to request irq %d\n",
806 irq_chip->name = dev_name(&chip->client->dev);
807 irq_chip->irq_mask = pca953x_irq_mask;
808 irq_chip->irq_unmask = pca953x_irq_unmask;
809 irq_chip->irq_set_wake = pca953x_irq_set_wake;
810 irq_chip->irq_bus_lock = pca953x_irq_bus_lock;
811 irq_chip->irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock;
812 irq_chip->irq_set_type = pca953x_irq_set_type;
813 irq_chip->irq_shutdown = pca953x_irq_shutdown;
815 ret = gpiochip_irqchip_add_nested(&chip->gpio_chip, irq_chip,
816 irq_base, handle_simple_irq,
819 dev_err(&client->dev,
820 "could not connect irqchip to gpiochip\n");
824 gpiochip_set_nested_irqchip(&chip->gpio_chip, irq_chip, client->irq);
829 #else /* CONFIG_GPIO_PCA953X_IRQ */
830 static int pca953x_irq_setup(struct pca953x_chip *chip,
833 struct i2c_client *client = chip->client;
835 if (client->irq && irq_base != -1 && (chip->driver_data & PCA_INT))
836 dev_warn(&client->dev, "interrupt support not compiled in\n");
842 static int device_pca95xx_init(struct pca953x_chip *chip, u32 invert)
847 ret = regcache_sync_region(chip->regmap, chip->regs->output,
848 chip->regs->output + NBANK(chip));
852 ret = regcache_sync_region(chip->regmap, chip->regs->direction,
853 chip->regs->direction + NBANK(chip));
857 /* set platform specific polarity inversion */
859 memset(val, 0xFF, NBANK(chip));
861 memset(val, 0, NBANK(chip));
863 ret = pca953x_write_regs(chip, chip->regs->invert, val);
868 static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
873 ret = device_pca95xx_init(chip, invert);
877 /* To enable register 6, 7 to control pull up and pull down */
878 memset(val, 0x02, NBANK(chip));
879 ret = pca953x_write_regs(chip, PCA957X_BKEN, val);
888 static const struct of_device_id pca953x_dt_ids[];
890 static int pca953x_probe(struct i2c_client *client,
891 const struct i2c_device_id *i2c_id)
893 struct pca953x_platform_data *pdata;
894 struct pca953x_chip *chip;
898 struct regulator *reg;
900 chip = devm_kzalloc(&client->dev,
901 sizeof(struct pca953x_chip), GFP_KERNEL);
905 pdata = dev_get_platdata(&client->dev);
907 irq_base = pdata->irq_base;
908 chip->gpio_start = pdata->gpio_base;
909 invert = pdata->invert;
910 chip->names = pdata->names;
912 struct gpio_desc *reset_gpio;
914 chip->gpio_start = -1;
918 * See if we need to de-assert a reset pin.
920 * There is no known ACPI-enabled platforms that are
921 * using "reset" GPIO. Otherwise any of those platform
922 * must use _DSD method with corresponding property.
924 reset_gpio = devm_gpiod_get_optional(&client->dev, "reset",
926 if (IS_ERR(reset_gpio))
927 return PTR_ERR(reset_gpio);
930 chip->client = client;
932 reg = devm_regulator_get(&client->dev, "vcc");
935 if (ret != -EPROBE_DEFER)
936 dev_err(&client->dev, "reg get err: %d\n", ret);
939 ret = regulator_enable(reg);
941 dev_err(&client->dev, "reg en err: %d\n", ret);
944 chip->regulator = reg;
947 chip->driver_data = i2c_id->driver_data;
949 const struct acpi_device_id *acpi_id;
950 struct device *dev = &client->dev;
952 chip->driver_data = (uintptr_t)of_device_get_match_data(dev);
953 if (!chip->driver_data) {
954 acpi_id = acpi_match_device(pca953x_acpi_ids, dev);
960 chip->driver_data = acpi_id->driver_data;
964 i2c_set_clientdata(client, chip);
966 chip->regmap = devm_regmap_init_i2c(client, &pca953x_i2c_regmap);
967 if (IS_ERR(chip->regmap)) {
968 ret = PTR_ERR(chip->regmap);
972 regcache_mark_dirty(chip->regmap);
974 mutex_init(&chip->i2c_lock);
976 * In case we have an i2c-mux controlled by a GPIO provided by an
977 * expander using the same driver higher on the device tree, read the
978 * i2c adapter nesting depth and use the retrieved value as lockdep
979 * subclass for chip->i2c_lock.
981 * REVISIT: This solution is not complete. It protects us from lockdep
982 * false positives when the expander controlling the i2c-mux is on
983 * a different level on the device tree, but not when it's on the same
984 * level on a different branch (in which case the subclass number
985 * would be the same).
987 * TODO: Once a correct solution is developed, a similar fix should be
988 * applied to all other i2c-controlled GPIO expanders (and potentially
991 lockdep_set_subclass(&chip->i2c_lock,
992 i2c_adapter_depth(client->adapter));
994 /* initialize cached registers from their original values.
995 * we can't share this chip with another i2c master.
997 pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK);
999 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
1000 chip->regs = &pca953x_regs;
1001 ret = device_pca95xx_init(chip, invert);
1003 chip->regs = &pca957x_regs;
1004 ret = device_pca957x_init(chip, invert);
1009 ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip);
1013 ret = pca953x_irq_setup(chip, irq_base);
1017 if (pdata && pdata->setup) {
1018 ret = pdata->setup(client, chip->gpio_chip.base,
1019 chip->gpio_chip.ngpio, pdata->context);
1021 dev_warn(&client->dev, "setup failed, %d\n", ret);
1027 regulator_disable(chip->regulator);
1031 static int pca953x_remove(struct i2c_client *client)
1033 struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev);
1034 struct pca953x_chip *chip = i2c_get_clientdata(client);
1037 if (pdata && pdata->teardown) {
1038 ret = pdata->teardown(client, chip->gpio_chip.base,
1039 chip->gpio_chip.ngpio, pdata->context);
1041 dev_err(&client->dev, "%s failed, %d\n",
1047 regulator_disable(chip->regulator);
1052 #ifdef CONFIG_PM_SLEEP
1053 static int pca953x_regcache_sync(struct device *dev)
1055 struct pca953x_chip *chip = dev_get_drvdata(dev);
1059 * The ordering between direction and output is important,
1060 * sync these registers first and only then sync the rest.
1062 ret = regcache_sync_region(chip->regmap, chip->regs->direction,
1063 chip->regs->direction + NBANK(chip));
1065 dev_err(dev, "Failed to sync GPIO dir registers: %d\n", ret);
1069 ret = regcache_sync_region(chip->regmap, chip->regs->output,
1070 chip->regs->output + NBANK(chip));
1072 dev_err(dev, "Failed to sync GPIO out registers: %d\n", ret);
1076 #ifdef CONFIG_GPIO_PCA953X_IRQ
1077 if (chip->driver_data & PCA_PCAL) {
1078 ret = regcache_sync_region(chip->regmap, PCAL953X_IN_LATCH,
1079 PCAL953X_IN_LATCH + NBANK(chip));
1081 dev_err(dev, "Failed to sync INT latch registers: %d\n",
1086 ret = regcache_sync_region(chip->regmap, PCAL953X_INT_MASK,
1087 PCAL953X_INT_MASK + NBANK(chip));
1089 dev_err(dev, "Failed to sync INT mask registers: %d\n",
1099 static int pca953x_suspend(struct device *dev)
1101 struct pca953x_chip *chip = dev_get_drvdata(dev);
1103 regcache_cache_only(chip->regmap, true);
1105 if (atomic_read(&chip->wakeup_path))
1106 device_set_wakeup_path(dev);
1108 regulator_disable(chip->regulator);
1113 static int pca953x_resume(struct device *dev)
1115 struct pca953x_chip *chip = dev_get_drvdata(dev);
1118 if (!atomic_read(&chip->wakeup_path)) {
1119 ret = regulator_enable(chip->regulator);
1121 dev_err(dev, "Failed to enable regulator: %d\n", ret);
1126 regcache_cache_only(chip->regmap, false);
1127 regcache_mark_dirty(chip->regmap);
1128 ret = pca953x_regcache_sync(dev);
1132 ret = regcache_sync(chip->regmap);
1134 dev_err(dev, "Failed to restore register map: %d\n", ret);
1142 /* convenience to stop overlong match-table lines */
1143 #define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int)
1144 #define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int)
1146 static const struct of_device_id pca953x_dt_ids[] = {
1147 { .compatible = "nxp,pca6416", .data = OF_953X(16, PCA_INT), },
1148 { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), },
1149 { .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), },
1150 { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), },
1151 { .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), },
1152 { .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), },
1153 { .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), },
1154 { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), },
1155 { .compatible = "nxp,pca9554", .data = OF_953X( 8, PCA_INT), },
1156 { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), },
1157 { .compatible = "nxp,pca9556", .data = OF_953X( 8, 0), },
1158 { .compatible = "nxp,pca9557", .data = OF_953X( 8, 0), },
1159 { .compatible = "nxp,pca9574", .data = OF_957X( 8, PCA_INT), },
1160 { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), },
1161 { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), },
1163 { .compatible = "nxp,pcal6416", .data = OF_953X(16, PCA_LATCH_INT), },
1164 { .compatible = "nxp,pcal6524", .data = OF_953X(24, PCA_LATCH_INT), },
1165 { .compatible = "nxp,pcal9555a", .data = OF_953X(16, PCA_LATCH_INT), },
1167 { .compatible = "maxim,max7310", .data = OF_953X( 8, 0), },
1168 { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), },
1169 { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), },
1170 { .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), },
1171 { .compatible = "maxim,max7318", .data = OF_953X(16, PCA_INT), },
1173 { .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), },
1174 { .compatible = "ti,pca9536", .data = OF_953X( 4, 0), },
1175 { .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), },
1176 { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), },
1177 { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), },
1178 { .compatible = "ti,tca9539", .data = OF_953X(16, PCA_INT), },
1180 { .compatible = "onnn,cat9554", .data = OF_953X( 8, PCA_INT), },
1181 { .compatible = "onnn,pca9654", .data = OF_953X( 8, PCA_INT), },
1183 { .compatible = "exar,xra1202", .data = OF_953X( 8, 0), },
1187 MODULE_DEVICE_TABLE(of, pca953x_dt_ids);
1189 static SIMPLE_DEV_PM_OPS(pca953x_pm_ops, pca953x_suspend, pca953x_resume);
1191 static struct i2c_driver pca953x_driver = {
1194 .pm = &pca953x_pm_ops,
1195 .of_match_table = pca953x_dt_ids,
1196 .acpi_match_table = ACPI_PTR(pca953x_acpi_ids),
1198 .probe = pca953x_probe,
1199 .remove = pca953x_remove,
1200 .id_table = pca953x_id,
1203 static int __init pca953x_init(void)
1205 return i2c_add_driver(&pca953x_driver);
1207 /* register after i2c postcore initcall and before
1208 * subsys initcalls that may rely on these GPIOs
1210 subsys_initcall(pca953x_init);
1212 static void __exit pca953x_exit(void)
1214 i2c_del_driver(&pca953x_driver);
1216 module_exit(pca953x_exit);
1218 MODULE_AUTHOR("eric miao <eric.miao@marvell.com>");
1219 MODULE_DESCRIPTION("GPIO expander driver for PCA953x");
1220 MODULE_LICENSE("GPL");