2 * A FSI master controller, using a simple GPIO bit-banging interface
5 #include <linux/crc4.h>
6 #include <linux/delay.h>
7 #include <linux/device.h>
9 #include <linux/gpio/consumer.h>
11 #include <linux/module.h>
13 #include <linux/platform_device.h>
14 #include <linux/slab.h>
15 #include <linux/spinlock.h>
17 #include "fsi-master.h"
19 #define FSI_GPIO_STD_DLY 1 /* Standard pin delay in nS */
20 #define FSI_ECHO_DELAY_CLOCKS 16 /* Number clocks for echo delay */
21 #define FSI_PRE_BREAK_CLOCKS 50 /* Number clocks to prep for break */
22 #define FSI_BREAK_CLOCKS 256 /* Number of clocks to issue break */
23 #define FSI_POST_BREAK_CLOCKS 16000 /* Number clocks to set up cfam */
24 #define FSI_INIT_CLOCKS 5000 /* Clock out any old data */
25 #define FSI_GPIO_STD_DELAY 10 /* Standard GPIO delay in nS */
26 /* todo: adjust down as low as */
27 /* possible or eliminate */
28 #define FSI_GPIO_CMD_DPOLL 0x2
29 #define FSI_GPIO_CMD_TERM 0x3f
30 #define FSI_GPIO_CMD_ABS_AR 0x4
32 #define FSI_GPIO_DPOLL_CLOCKS 100 /* < 21 will cause slave to hang */
35 #define FSI_GPIO_ERR_BUSY 1 /* Slave stuck in busy state */
36 #define FSI_GPIO_RESP_ERRA 2 /* Any (misc) Error */
37 #define FSI_GPIO_RESP_ERRC 3 /* Slave reports master CRC error */
38 #define FSI_GPIO_MTOE 4 /* Master time out error */
39 #define FSI_GPIO_CRC_INVAL 5 /* Master reports slave CRC error */
41 /* Normal slave responses */
42 #define FSI_GPIO_RESP_BUSY 1
43 #define FSI_GPIO_RESP_ACK 0
44 #define FSI_GPIO_RESP_ACKD 4
46 #define FSI_GPIO_MAX_BUSY 100
47 #define FSI_GPIO_MTOE_COUNT 1000
48 #define FSI_GPIO_DRAIN_BITS 20
49 #define FSI_GPIO_CRC_SIZE 4
50 #define FSI_GPIO_MSG_ID_SIZE 2
51 #define FSI_GPIO_MSG_RESPID_SIZE 2
52 #define FSI_GPIO_PRIME_SLAVE_CLOCKS 100
54 struct fsi_master_gpio {
55 struct fsi_master master;
57 spinlock_t cmd_lock; /* Lock for commands */
58 struct gpio_desc *gpio_clk;
59 struct gpio_desc *gpio_data;
60 struct gpio_desc *gpio_trans; /* Voltage translator */
61 struct gpio_desc *gpio_enable; /* FSI enable */
62 struct gpio_desc *gpio_mux; /* Mux control */
66 #define CREATE_TRACE_POINTS
67 #include <trace/events/fsi_master_gpio.h>
69 #define to_fsi_master_gpio(m) container_of(m, struct fsi_master_gpio, master)
76 static void clock_toggle(struct fsi_master_gpio *master, int count)
80 for (i = 0; i < count; i++) {
81 ndelay(FSI_GPIO_STD_DLY);
82 gpiod_set_value(master->gpio_clk, 0);
83 ndelay(FSI_GPIO_STD_DLY);
84 gpiod_set_value(master->gpio_clk, 1);
88 static int sda_in(struct fsi_master_gpio *master)
92 ndelay(FSI_GPIO_STD_DLY);
93 in = gpiod_get_value(master->gpio_data);
97 static void sda_out(struct fsi_master_gpio *master, int value)
99 gpiod_set_value(master->gpio_data, value);
102 static void set_sda_input(struct fsi_master_gpio *master)
104 gpiod_direction_input(master->gpio_data);
105 gpiod_set_value(master->gpio_trans, 0);
108 static void set_sda_output(struct fsi_master_gpio *master, int value)
110 gpiod_set_value(master->gpio_trans, 1);
111 gpiod_direction_output(master->gpio_data, value);
114 static void clock_zeros(struct fsi_master_gpio *master, int count)
116 set_sda_output(master, 1);
117 clock_toggle(master, count);
120 static void serial_in(struct fsi_master_gpio *master, struct fsi_gpio_msg *msg,
125 set_sda_input(master);
127 for (bit = 0; bit < num_bits; bit++) {
128 clock_toggle(master, 1);
129 in_bit = sda_in(master);
131 msg->msg |= ~in_bit & 0x1; /* Data is active low */
133 msg->bits += num_bits;
135 trace_fsi_master_gpio_in(master, num_bits, msg->msg);
138 static void serial_out(struct fsi_master_gpio *master,
139 const struct fsi_gpio_msg *cmd)
142 uint64_t msg = ~cmd->msg; /* Data is active low */
143 uint64_t sda_mask = 0x1ULL << (cmd->bits - 1);
144 uint64_t last_bit = ~0;
147 trace_fsi_master_gpio_out(master, cmd->bits, cmd->msg);
150 dev_warn(master->dev, "trying to output 0 bits\n");
153 set_sda_output(master, 0);
155 /* Send the start bit */
157 clock_toggle(master, 1);
159 /* Send the message */
160 for (bit = 0; bit < cmd->bits; bit++) {
161 next_bit = (msg & sda_mask) >> (cmd->bits - 1);
162 if (last_bit ^ next_bit) {
163 sda_out(master, next_bit);
166 clock_toggle(master, 1);
171 static void msg_push_bits(struct fsi_gpio_msg *msg, uint64_t data, int bits)
174 msg->msg |= data & ((1ull << bits) - 1);
178 static void msg_push_crc(struct fsi_gpio_msg *msg)
183 top = msg->bits & 0x3;
185 /* start bit, and any non-aligned top bits */
186 crc = crc4(0, 1 << top | msg->msg >> (msg->bits - top), top + 1);
189 crc = crc4(crc, msg->msg, msg->bits - top);
191 msg_push_bits(msg, crc, 4);
195 * Encode an Absolute Address command
197 static void build_abs_ar_command(struct fsi_gpio_msg *cmd,
198 uint8_t id, uint32_t addr, size_t size, const void *data)
207 msg_push_bits(cmd, id, 2);
208 msg_push_bits(cmd, FSI_GPIO_CMD_ABS_AR, 3);
209 msg_push_bits(cmd, write ? 0 : 1, 1);
212 * The read/write size is encoded in the lower bits of the address
213 * (as it must be naturally-aligned), and the following ds bit.
215 * size addr:1 addr:0 ds
221 ds = size > 1 ? 1 : 0;
226 msg_push_bits(cmd, addr & ((1 << 21) - 1), 21);
227 msg_push_bits(cmd, ds, 1);
228 for (i = 0; write && i < size; i++)
229 msg_push_bits(cmd, ((uint8_t *)data)[i], 8);
234 static void build_dpoll_command(struct fsi_gpio_msg *cmd, uint8_t slave_id)
239 msg_push_bits(cmd, slave_id, 2);
240 msg_push_bits(cmd, FSI_GPIO_CMD_DPOLL, 3);
244 static void echo_delay(struct fsi_master_gpio *master)
246 set_sda_output(master, 1);
247 clock_toggle(master, FSI_ECHO_DELAY_CLOCKS);
250 static void build_term_command(struct fsi_gpio_msg *cmd, uint8_t slave_id)
255 msg_push_bits(cmd, slave_id, 2);
256 msg_push_bits(cmd, FSI_GPIO_CMD_TERM, 6);
261 * Store information on master errors so handler can detect and clean
264 static void fsi_master_gpio_error(struct fsi_master_gpio *master, int error)
269 static int read_one_response(struct fsi_master_gpio *master,
270 uint8_t data_size, struct fsi_gpio_msg *msgp, uint8_t *tagp)
272 struct fsi_gpio_msg msg;
277 /* wait for the start bit */
278 for (i = 0; i < FSI_GPIO_MTOE_COUNT; i++) {
281 serial_in(master, &msg, 1);
285 if (i == FSI_GPIO_MTOE_COUNT) {
287 "Master time out waiting for response\n");
288 fsi_master_gpio_error(master, FSI_GPIO_MTOE);
295 /* Read slave ID & response tag */
296 serial_in(master, &msg, 4);
298 id = (msg.msg >> FSI_GPIO_MSG_RESPID_SIZE) & 0x3;
301 /* If we have an ACK and we're expecting data, clock the data in too */
302 if (tag == FSI_GPIO_RESP_ACK && data_size)
303 serial_in(master, &msg, data_size * 8);
306 serial_in(master, &msg, FSI_GPIO_CRC_SIZE);
308 /* we have a whole message now; check CRC */
310 crc = crc4(crc, msg.msg, msg.bits);
312 dev_dbg(master->dev, "ERR response CRC\n");
313 fsi_master_gpio_error(master, FSI_GPIO_CRC_INVAL);
325 static int issue_term(struct fsi_master_gpio *master, uint8_t slave)
327 struct fsi_gpio_msg cmd;
331 build_term_command(&cmd, slave);
332 serial_out(master, &cmd);
335 rc = read_one_response(master, 0, NULL, &tag);
338 "TERM failed; lost communication with slave\n");
340 } else if (tag != FSI_GPIO_RESP_ACK) {
341 dev_err(master->dev, "TERM failed; response %d\n", tag);
348 static int poll_for_response(struct fsi_master_gpio *master,
349 uint8_t slave, uint8_t size, void *data)
351 struct fsi_gpio_msg response, cmd;
352 int busy_count = 0, rc, i;
354 uint8_t *data_byte = data;
357 rc = read_one_response(master, size, &response, &tag);
362 case FSI_GPIO_RESP_ACK:
364 uint64_t val = response.msg;
365 /* clear crc & mask */
367 val &= (1ull << (size * 8)) - 1;
369 for (i = 0; i < size; i++) {
370 data_byte[size-i-1] = val;
375 case FSI_GPIO_RESP_BUSY:
377 * Its necessary to clock slave before issuing
378 * d-poll, not indicated in the hardware protocol
379 * spec. < 20 clocks causes slave to hang, 21 ok.
381 clock_zeros(master, FSI_GPIO_DPOLL_CLOCKS);
382 if (busy_count++ < FSI_GPIO_MAX_BUSY) {
383 build_dpoll_command(&cmd, slave);
384 serial_out(master, &cmd);
388 dev_warn(master->dev,
389 "ERR slave is stuck in busy state, issuing TERM\n");
390 issue_term(master, slave);
394 case FSI_GPIO_RESP_ERRA:
395 case FSI_GPIO_RESP_ERRC:
396 dev_dbg(master->dev, "ERR%c received: 0x%x\n",
397 tag == FSI_GPIO_RESP_ERRA ? 'A' : 'C',
399 fsi_master_gpio_error(master, response.msg);
405 trace_fsi_master_gpio_poll_response_busy(master, busy_count);
407 /* Clock the slave enough to be ready for next operation */
408 clock_zeros(master, FSI_GPIO_PRIME_SLAVE_CLOCKS);
412 static int fsi_master_gpio_xfer(struct fsi_master_gpio *master, uint8_t slave,
413 struct fsi_gpio_msg *cmd, size_t resp_len, void *resp)
418 spin_lock_irqsave(&master->cmd_lock, flags);
420 if (master->external_mode) {
421 spin_unlock_irqrestore(&master->cmd_lock, flags);
425 serial_out(master, cmd);
427 rc = poll_for_response(master, slave, resp_len, resp);
428 spin_unlock_irqrestore(&master->cmd_lock, flags);
433 static int fsi_master_gpio_read(struct fsi_master *_master, int link,
434 uint8_t id, uint32_t addr, void *val, size_t size)
436 struct fsi_master_gpio *master = to_fsi_master_gpio(_master);
437 struct fsi_gpio_msg cmd;
442 build_abs_ar_command(&cmd, id, addr, size, NULL);
443 return fsi_master_gpio_xfer(master, id, &cmd, size, val);
446 static int fsi_master_gpio_write(struct fsi_master *_master, int link,
447 uint8_t id, uint32_t addr, const void *val, size_t size)
449 struct fsi_master_gpio *master = to_fsi_master_gpio(_master);
450 struct fsi_gpio_msg cmd;
455 build_abs_ar_command(&cmd, id, addr, size, val);
456 return fsi_master_gpio_xfer(master, id, &cmd, 0, NULL);
459 static int fsi_master_gpio_term(struct fsi_master *_master,
460 int link, uint8_t id)
462 struct fsi_master_gpio *master = to_fsi_master_gpio(_master);
463 struct fsi_gpio_msg cmd;
468 build_term_command(&cmd, id);
469 return fsi_master_gpio_xfer(master, id, &cmd, 0, NULL);
472 static int fsi_master_gpio_break(struct fsi_master *_master, int link)
474 struct fsi_master_gpio *master = to_fsi_master_gpio(_master);
480 trace_fsi_master_gpio_break(master);
482 spin_lock_irqsave(&master->cmd_lock, flags);
483 if (master->external_mode) {
484 spin_unlock_irqrestore(&master->cmd_lock, flags);
487 set_sda_output(master, 1);
489 clock_toggle(master, FSI_PRE_BREAK_CLOCKS);
491 clock_toggle(master, FSI_BREAK_CLOCKS);
494 clock_toggle(master, FSI_POST_BREAK_CLOCKS);
495 spin_unlock_irqrestore(&master->cmd_lock, flags);
497 /* Wait for logic reset to take effect */
503 static void fsi_master_gpio_init(struct fsi_master_gpio *master)
505 gpiod_direction_output(master->gpio_mux, 1);
506 gpiod_direction_output(master->gpio_trans, 1);
507 gpiod_direction_output(master->gpio_enable, 1);
508 gpiod_direction_output(master->gpio_clk, 1);
509 gpiod_direction_output(master->gpio_data, 1);
511 /* todo: evaluate if clocks can be reduced */
512 clock_zeros(master, FSI_INIT_CLOCKS);
515 static void fsi_master_gpio_init_external(struct fsi_master_gpio *master)
517 gpiod_direction_output(master->gpio_mux, 0);
518 gpiod_direction_output(master->gpio_trans, 0);
519 gpiod_direction_output(master->gpio_enable, 1);
520 gpiod_direction_input(master->gpio_clk);
521 gpiod_direction_input(master->gpio_data);
524 static int fsi_master_gpio_link_enable(struct fsi_master *_master, int link)
526 struct fsi_master_gpio *master = to_fsi_master_gpio(_master);
533 spin_lock_irqsave(&master->cmd_lock, flags);
534 if (!master->external_mode) {
535 gpiod_set_value(master->gpio_enable, 1);
538 spin_unlock_irqrestore(&master->cmd_lock, flags);
543 static ssize_t external_mode_show(struct device *dev,
544 struct device_attribute *attr, char *buf)
546 struct fsi_master_gpio *master = dev_get_drvdata(dev);
548 return snprintf(buf, PAGE_SIZE - 1, "%u\n",
549 master->external_mode ? 1 : 0);
552 static ssize_t external_mode_store(struct device *dev,
553 struct device_attribute *attr, const char *buf, size_t count)
555 struct fsi_master_gpio *master = dev_get_drvdata(dev);
556 unsigned long flags, val;
560 err = kstrtoul(buf, 0, &val);
564 external_mode = !!val;
566 spin_lock_irqsave(&master->cmd_lock, flags);
568 if (external_mode == master->external_mode) {
569 spin_unlock_irqrestore(&master->cmd_lock, flags);
573 master->external_mode = external_mode;
574 if (master->external_mode)
575 fsi_master_gpio_init_external(master);
577 fsi_master_gpio_init(master);
578 spin_unlock_irqrestore(&master->cmd_lock, flags);
580 fsi_master_rescan(&master->master);
585 static DEVICE_ATTR(external_mode, 0664,
586 external_mode_show, external_mode_store);
588 static int fsi_master_gpio_probe(struct platform_device *pdev)
590 struct fsi_master_gpio *master;
591 struct gpio_desc *gpio;
594 master = devm_kzalloc(&pdev->dev, sizeof(*master), GFP_KERNEL);
598 master->dev = &pdev->dev;
599 master->master.dev.parent = master->dev;
600 master->master.dev.of_node = of_node_get(dev_of_node(master->dev));
602 gpio = devm_gpiod_get(&pdev->dev, "clock", 0);
604 dev_err(&pdev->dev, "failed to get clock gpio\n");
605 return PTR_ERR(gpio);
607 master->gpio_clk = gpio;
609 gpio = devm_gpiod_get(&pdev->dev, "data", 0);
611 dev_err(&pdev->dev, "failed to get data gpio\n");
612 return PTR_ERR(gpio);
614 master->gpio_data = gpio;
617 gpio = devm_gpiod_get_optional(&pdev->dev, "trans", 0);
619 dev_err(&pdev->dev, "failed to get trans gpio\n");
620 return PTR_ERR(gpio);
622 master->gpio_trans = gpio;
624 gpio = devm_gpiod_get_optional(&pdev->dev, "enable", 0);
626 dev_err(&pdev->dev, "failed to get enable gpio\n");
627 return PTR_ERR(gpio);
629 master->gpio_enable = gpio;
631 gpio = devm_gpiod_get_optional(&pdev->dev, "mux", 0);
633 dev_err(&pdev->dev, "failed to get mux gpio\n");
634 return PTR_ERR(gpio);
636 master->gpio_mux = gpio;
638 master->master.n_links = 1;
639 master->master.flags = FSI_MASTER_FLAG_SWCLOCK;
640 master->master.read = fsi_master_gpio_read;
641 master->master.write = fsi_master_gpio_write;
642 master->master.term = fsi_master_gpio_term;
643 master->master.send_break = fsi_master_gpio_break;
644 master->master.link_enable = fsi_master_gpio_link_enable;
645 platform_set_drvdata(pdev, master);
646 spin_lock_init(&master->cmd_lock);
648 fsi_master_gpio_init(master);
650 rc = device_create_file(&pdev->dev, &dev_attr_external_mode);
654 return fsi_master_register(&master->master);
658 static int fsi_master_gpio_remove(struct platform_device *pdev)
660 struct fsi_master_gpio *master = platform_get_drvdata(pdev);
662 devm_gpiod_put(&pdev->dev, master->gpio_clk);
663 devm_gpiod_put(&pdev->dev, master->gpio_data);
664 if (master->gpio_trans)
665 devm_gpiod_put(&pdev->dev, master->gpio_trans);
666 if (master->gpio_enable)
667 devm_gpiod_put(&pdev->dev, master->gpio_enable);
668 if (master->gpio_mux)
669 devm_gpiod_put(&pdev->dev, master->gpio_mux);
670 fsi_master_unregister(&master->master);
672 of_node_put(master->master.dev.of_node);
677 static const struct of_device_id fsi_master_gpio_match[] = {
678 { .compatible = "fsi-master-gpio" },
682 static struct platform_driver fsi_master_gpio_driver = {
684 .name = "fsi-master-gpio",
685 .of_match_table = fsi_master_gpio_match,
687 .probe = fsi_master_gpio_probe,
688 .remove = fsi_master_gpio_remove,
691 module_platform_driver(fsi_master_gpio_driver);
692 MODULE_LICENSE("GPL");