drivers/crypto/caam/ctrl.c

   1 /* * CAAM control-plane driver backend
   2  * Controller-level driver, kernel property detection, initialization
   3  *
   4  * Copyright 2008-2012 Freescale Semiconductor, Inc.
   5  */
   6
   7 #include <linux/device.h>
   8 #include <linux/of_address.h>
   9 #include <linux/of_irq.h>
  10
  11 #include "compat.h"
  12 #include "regs.h"
  13 #include "intern.h"
  14 #include "jr.h"
  15 #include "desc_constr.h"
  16 #include "error.h"
  17
  18 bool caam_little_end;
  19 EXPORT_SYMBOL(caam_little_end);
  20
  21 /*
  22  * i.MX targets tend to have clock control subsystems that can
  23  * enable/disable clocking to our device.
  24  */
  25 #ifdef CONFIG_CRYPTO_DEV_FSL_CAAM_IMX
  26 static inline struct clk *caam_drv_identify_clk(struct device *dev,
  27                                                 char *clk_name)
  28 {
  29         return devm_clk_get(dev, clk_name);
  30 }
  31 #else
  32 static inline struct clk *caam_drv_identify_clk(struct device *dev,
  33                                                 char *clk_name)
  34 {
  35         return NULL;
  36 }
  37 #endif
  38
  39 /*
  40  * Descriptor to instantiate RNG State Handle 0 in normal mode and
  41  * load the JDKEK, TDKEK and TDSK registers
  42  */
  43 static void build_instantiation_desc(u32 *desc, int handle, int do_sk)
  44 {
  45         u32 *jump_cmd, op_flags;
  46
  47         init_job_desc(desc, 0);
  48
  49         op_flags = OP_TYPE_CLASS1_ALG | OP_ALG_ALGSEL_RNG |
  50                         (handle << OP_ALG_AAI_SHIFT) | OP_ALG_AS_INIT;
  51
  52         /* INIT RNG in non-test mode */
  53         append_operation(desc, op_flags);
  54
  55         if (!handle && do_sk) {
  56                 /*
  57                  * For SH0, Secure Keys must be generated as well
  58                  */
  59
  60                 /* wait for done */
  61                 jump_cmd = append_jump(desc, JUMP_CLASS_CLASS1);
  62                 set_jump_tgt_here(desc, jump_cmd);
  63
  64                 /*
  65                  * load 1 to clear written reg:
  66                  * resets the done interrrupt and returns the RNG to idle.
  67                  */
  68                 append_load_imm_u32(desc, 1, LDST_SRCDST_WORD_CLRW);
  69
  70                 /* Initialize State Handle  */
  71                 append_operation(desc, OP_TYPE_CLASS1_ALG | OP_ALG_ALGSEL_RNG |
  72                                  OP_ALG_AAI_RNG4_SK);
  73         }
  74
  75         append_jump(desc, JUMP_CLASS_CLASS1 | JUMP_TYPE_HALT);
  76 }
  77
  78 /* Descriptor for deinstantiation of State Handle 0 of the RNG block. */
  79 static void build_deinstantiation_desc(u32 *desc, int handle)
  80 {
  81         init_job_desc(desc, 0);
  82
  83         /* Uninstantiate State Handle 0 */
  84         append_operation(desc, OP_TYPE_CLASS1_ALG | OP_ALG_ALGSEL_RNG |
  85                          (handle << OP_ALG_AAI_SHIFT) | OP_ALG_AS_INITFINAL);
  86
  87         append_jump(desc, JUMP_CLASS_CLASS1 | JUMP_TYPE_HALT);
  88 }
  89
  90 /*
  91  * run_descriptor_deco0 - runs a descriptor on DECO0, under direct control of
  92  *                        the software (no JR/QI used).
  93  * @ctrldev - pointer to device
  94  * @status - descriptor status, after being run
  95  *
  96  * Return: - 0 if no error occurred
  97  *         - -ENODEV if the DECO couldn't be acquired
  98  *         - -EAGAIN if an error occurred while executing the descriptor
  99  */
 100 static inline int run_descriptor_deco0(struct device *ctrldev, u32 *desc,
 101                                         u32 *status)
 102 {
 103         struct caam_drv_private *ctrlpriv = dev_get_drvdata(ctrldev);
 104         struct caam_ctrl __iomem *ctrl = ctrlpriv->ctrl;
 105         struct caam_deco __iomem *deco = ctrlpriv->deco;
 106         unsigned int timeout = 100000;
 107         u32 deco_dbg_reg, flags;
 108         int i;
 109
 110
 111         if (ctrlpriv->virt_en == 1) {
 112                 clrsetbits_32(&ctrl->deco_rsr, 0, DECORSR_JR0);
 113
 114                 while (!(rd_reg32(&ctrl->deco_rsr) & DECORSR_VALID) &&
 115                        --timeout)
 116                         cpu_relax();
 117
 118                 timeout = 100000;
 119         }
 120
 121         clrsetbits_32(&ctrl->deco_rq, 0, DECORR_RQD0ENABLE);
 122
 123         while (!(rd_reg32(&ctrl->deco_rq) & DECORR_DEN0) &&
 124                                                                  --timeout)
 125                 cpu_relax();
 126
 127         if (!timeout) {
 128                 dev_err(ctrldev, "failed to acquire DECO 0\n");
 129                 clrsetbits_32(&ctrl->deco_rq, DECORR_RQD0ENABLE, 0);
 130                 return -ENODEV;
 131         }
 132
 133         for (i = 0; i < desc_len(desc); i++)
 134                 wr_reg32(&deco->descbuf[i], caam32_to_cpu(*(desc + i)));
 135
 136         flags = DECO_JQCR_WHL;
 137         /*
 138          * If the descriptor length is longer than 4 words, then the
 139          * FOUR bit in JRCTRL register must be set.
 140          */
 141         if (desc_len(desc) >= 4)
 142                 flags |= DECO_JQCR_FOUR;
 143
 144         /* Instruct the DECO to execute it */
 145         clrsetbits_32(&deco->jr_ctl_hi, 0, flags);
 146
 147         timeout = 10000000;
 148         do {
 149                 deco_dbg_reg = rd_reg32(&deco->desc_dbg);
 150                 /*
 151                  * If an error occured in the descriptor, then
 152                  * the DECO status field will be set to 0x0D
 153                  */
 154                 if ((deco_dbg_reg & DESC_DBG_DECO_STAT_MASK) ==
 155                     DESC_DBG_DECO_STAT_HOST_ERR)
 156                         break;
 157                 cpu_relax();
 158         } while ((deco_dbg_reg & DESC_DBG_DECO_STAT_VALID) && --timeout);
 159
 160         *status = rd_reg32(&deco->op_status_hi) &
 161                   DECO_OP_STATUS_HI_ERR_MASK;
 162
 163         if (ctrlpriv->virt_en == 1)
 164                 clrsetbits_32(&ctrl->deco_rsr, DECORSR_JR0, 0);
 165
 166         /* Mark the DECO as free */
 167         clrsetbits_32(&ctrl->deco_rq, DECORR_RQD0ENABLE, 0);
 168
 169         if (!timeout)
 170                 return -EAGAIN;
 171
 172         return 0;
 173 }
 174
 175 /*
 176  * instantiate_rng - builds and executes a descriptor on DECO0,
 177  *                   which initializes the RNG block.
 178  * @ctrldev - pointer to device
 179  * @state_handle_mask - bitmask containing the instantiation status
 180  *                      for the RNG4 state handles which exist in
 181  *                      the RNG4 block: 1 if it's been instantiated
 182  *                      by an external entry, 0 otherwise.
 183  * @gen_sk  - generate data to be loaded into the JDKEK, TDKEK and TDSK;
 184  *            Caution: this can be done only once; if the keys need to be
 185  *            regenerated, a POR is required
 186  *
 187  * Return: - 0 if no error occurred
 188  *         - -ENOMEM if there isn't enough memory to allocate the descriptor
 189  *         - -ENODEV if DECO0 couldn't be acquired
 190  *         - -EAGAIN if an error occurred when executing the descriptor
 191  *            f.i. there was a RNG hardware error due to not "good enough"
 192  *            entropy being aquired.
 193  */
 194 static int instantiate_rng(struct device *ctrldev, int state_handle_mask,
 195                            int gen_sk)
 196 {
 197         struct caam_drv_private *ctrlpriv = dev_get_drvdata(ctrldev);
 198         struct caam_ctrl __iomem *ctrl;
 199         u32 *desc, status = 0, rdsta_val;
 200         int ret = 0, sh_idx;
 201
 202         ctrl = (struct caam_ctrl __iomem *)ctrlpriv->ctrl;
 203         desc = kmalloc(CAAM_CMD_SZ * 7, GFP_KERNEL);
 204         if (!desc)
 205                 return -ENOMEM;
 206
 207         for (sh_idx = 0; sh_idx < RNG4_MAX_HANDLES; sh_idx++) {
 208                 /*
 209                  * If the corresponding bit is set, this state handle
 210                  * was initialized by somebody else, so it's left alone.
 211                  */
 212                 if ((1 << sh_idx) & state_handle_mask)
 213                         continue;
 214
 215                 /* Create the descriptor for instantiating RNG State Handle */
 216                 build_instantiation_desc(desc, sh_idx, gen_sk);
 217
 218                 /* Try to run it through DECO0 */
 219                 ret = run_descriptor_deco0(ctrldev, desc, &status);
 220
 221                 /*
 222                  * If ret is not 0, or descriptor status is not 0, then
 223                  * something went wrong. No need to try the next state
 224                  * handle (if available), bail out here.
 225                  * Also, if for some reason, the State Handle didn't get
 226                  * instantiated although the descriptor has finished
 227                  * without any error (HW optimizations for later
 228                  * CAAM eras), then try again.
 229                  */
 230                 rdsta_val = rd_reg32(&ctrl->r4tst[0].rdsta) & RDSTA_IFMASK;
 231                 if ((status && status != JRSTA_SSRC_JUMP_HALT_CC) ||
 232                     !(rdsta_val & (1 << sh_idx)))
 233                         ret = -EAGAIN;
 234                 if (ret)
 235                         break;
 236                 dev_info(ctrldev, "Instantiated RNG4 SH%d\n", sh_idx);
 237                 /* Clear the contents before recreating the descriptor */
 238                 memset(desc, 0x00, CAAM_CMD_SZ * 7);
 239         }
 240
 241         kfree(desc);
 242
 243         return ret;
 244 }
 245
 246 /*
 247  * deinstantiate_rng - builds and executes a descriptor on DECO0,
 248  *                     which deinitializes the RNG block.
 249  * @ctrldev - pointer to device
 250  * @state_handle_mask - bitmask containing the instantiation status
 251  *                      for the RNG4 state handles which exist in
 252  *                      the RNG4 block: 1 if it's been instantiated
 253  *
 254  * Return: - 0 if no error occurred
 255  *         - -ENOMEM if there isn't enough memory to allocate the descriptor
 256  *         - -ENODEV if DECO0 couldn't be acquired
 257  *         - -EAGAIN if an error occurred when executing the descriptor
 258  */
 259 static int deinstantiate_rng(struct device *ctrldev, int state_handle_mask)
 260 {
 261         u32 *desc, status;
 262         int sh_idx, ret = 0;
 263
 264         desc = kmalloc(CAAM_CMD_SZ * 3, GFP_KERNEL);
 265         if (!desc)
 266                 return -ENOMEM;
 267
 268         for (sh_idx = 0; sh_idx < RNG4_MAX_HANDLES; sh_idx++) {
 269                 /*
 270                  * If the corresponding bit is set, then it means the state
 271                  * handle was initialized by us, and thus it needs to be
 272                  * deintialized as well
 273                  */
 274                 if ((1 << sh_idx) & state_handle_mask) {
 275                         /*
 276                          * Create the descriptor for deinstantating this state
 277                          * handle
 278                          */
 279                         build_deinstantiation_desc(desc, sh_idx);
 280
 281                         /* Try to run it through DECO0 */
 282                         ret = run_descriptor_deco0(ctrldev, desc, &status);
 283
 284                         if (ret || status) {
 285                                 dev_err(ctrldev,
 286                                         "Failed to deinstantiate RNG4 SH%d\n",
 287                                         sh_idx);
 288                                 break;
 289                         }
 290                         dev_info(ctrldev, "Deinstantiated RNG4 SH%d\n", sh_idx);
 291                 }
 292         }
 293
 294         kfree(desc);
 295
 296         return ret;
 297 }
 298
 299 static int caam_remove(struct platform_device *pdev)
 300 {
 301         struct device *ctrldev;
 302         struct caam_drv_private *ctrlpriv;
 303         struct caam_ctrl __iomem *ctrl;
 304         int ring;
 305
 306         ctrldev = &pdev->dev;
 307         ctrlpriv = dev_get_drvdata(ctrldev);
 308         ctrl = (struct caam_ctrl __iomem *)ctrlpriv->ctrl;
 309
 310         /* Remove platform devices for JobRs */
 311         for (ring = 0; ring < ctrlpriv->total_jobrs; ring++) {
 312                 if (ctrlpriv->jrpdev[ring])
 313                         of_device_unregister(ctrlpriv->jrpdev[ring]);
 314         }
 315
 316         /* De-initialize RNG state handles initialized by this driver. */
 317         if (ctrlpriv->rng4_sh_init)
 318                 deinstantiate_rng(ctrldev, ctrlpriv->rng4_sh_init);
 319
 320         /* Shut down debug views */
 321 #ifdef CONFIG_DEBUG_FS
 322         debugfs_remove_recursive(ctrlpriv->dfs_root);
 323 #endif
 324
 325         /* Unmap controller region */
 326         iounmap(ctrl);
 327
 328         /* shut clocks off before finalizing shutdown */
 329         clk_disable_unprepare(ctrlpriv->caam_ipg);
 330         clk_disable_unprepare(ctrlpriv->caam_mem);
 331         clk_disable_unprepare(ctrlpriv->caam_aclk);
 332         clk_disable_unprepare(ctrlpriv->caam_emi_slow);
 333
 334         return 0;
 335 }
 336
 337 /*
 338  * kick_trng - sets the various parameters for enabling the initialization
 339  *             of the RNG4 block in CAAM
 340  * @pdev - pointer to the platform device
 341  * @ent_delay - Defines the length (in system clocks) of each entropy sample.
 342  */
 343 static void kick_trng(struct platform_device *pdev, int ent_delay)
 344 {
 345         struct device *ctrldev = &pdev->dev;
 346         struct caam_drv_private *ctrlpriv = dev_get_drvdata(ctrldev);
 347         struct caam_ctrl __iomem *ctrl;
 348         struct rng4tst __iomem *r4tst;
 349         u32 val;
 350
 351         ctrl = (struct caam_ctrl __iomem *)ctrlpriv->ctrl;
 352         r4tst = &ctrl->r4tst[0];
 353
 354         /* put RNG4 into program mode */
 355         clrsetbits_32(&r4tst->rtmctl, 0, RTMCTL_PRGM);
 356
 357         /*
 358          * Performance-wise, it does not make sense to
 359          * set the delay to a value that is lower
 360          * than the last one that worked (i.e. the state handles
 361          * were instantiated properly. Thus, instead of wasting
 362          * time trying to set the values controlling the sample
 363          * frequency, the function simply returns.
 364          */
 365         val = (rd_reg32(&r4tst->rtsdctl) & RTSDCTL_ENT_DLY_MASK)
 366               >> RTSDCTL_ENT_DLY_SHIFT;
 367         if (ent_delay <= val) {
 368                 /* put RNG4 into run mode */
 369                 clrsetbits_32(&r4tst->rtmctl, RTMCTL_PRGM, 0);
 370                 return;
 371         }
 372
 373         val = rd_reg32(&r4tst->rtsdctl);
 374         val = (val & ~RTSDCTL_ENT_DLY_MASK) |
 375               (ent_delay << RTSDCTL_ENT_DLY_SHIFT);
 376         wr_reg32(&r4tst->rtsdctl, val);
 377         /* min. freq. count, equal to 1/4 of the entropy sample length */
 378         wr_reg32(&r4tst->rtfrqmin, ent_delay >> 2);
 379         /* disable maximum frequency count */
 380         wr_reg32(&r4tst->rtfrqmax, RTFRQMAX_DISABLE);
 381         /* read the control register */
 382         val = rd_reg32(&r4tst->rtmctl);
 383         /*
 384          * select raw sampling in both entropy shifter
 385          * and statistical checker
 386          */
 387         clrsetbits_32(&val, 0, RTMCTL_SAMP_MODE_RAW_ES_SC);
 388         /* put RNG4 into run mode */
 389         clrsetbits_32(&val, RTMCTL_PRGM, 0);
 390         /* write back the control register */
 391         wr_reg32(&r4tst->rtmctl, val);
 392 }
 393
 394 /**
 395  * caam_get_era() - Return the ERA of the SEC on SoC, based
 396  * on "sec-era" propery in the DTS. This property is updated by u-boot.
 397  **/
 398 int caam_get_era(void)
 399 {
 400         struct device_node *caam_node;
 401         int ret;
 402         u32 prop;
 403
 404         caam_node = of_find_compatible_node(NULL, NULL, "fsl,sec-v4.0");
 405         ret = of_property_read_u32(caam_node, "fsl,sec-era", &prop);
 406         of_node_put(caam_node);
 407
 408         return ret ? -ENOTSUPP : prop;
 409 }
 410 EXPORT_SYMBOL(caam_get_era);
 411
 412 #ifdef CONFIG_DEBUG_FS
 413 static int caam_debugfs_u64_get(void *data, u64 *val)
 414 {
 415         *val = caam64_to_cpu(*(u64 *)data);
 416         return 0;
 417 }
 418
 419 static int caam_debugfs_u32_get(void *data, u64 *val)
 420 {
 421         *val = caam32_to_cpu(*(u32 *)data);
 422         return 0;
 423 }
 424
 425 DEFINE_SIMPLE_ATTRIBUTE(caam_fops_u32_ro, caam_debugfs_u32_get, NULL, "%llu\n");
 426 DEFINE_SIMPLE_ATTRIBUTE(caam_fops_u64_ro, caam_debugfs_u64_get, NULL, "%llu\n");
 427 #endif
 428
 429 /* Probe routine for CAAM top (controller) level */
 430 static int caam_probe(struct platform_device *pdev)
 431 {
 432         int ret, ring, rspec, gen_sk, ent_delay = RTSDCTL_ENT_DLY_MIN;
 433         u64 caam_id;
 434         struct device *dev;
 435         struct device_node *nprop, *np;
 436         struct caam_ctrl __iomem *ctrl;
 437         struct caam_drv_private *ctrlpriv;
 438         struct clk *clk;
 439 #ifdef CONFIG_DEBUG_FS
 440         struct caam_perfmon *perfmon;
 441 #endif
 442         u32 scfgr, comp_params;
 443         u32 cha_vid_ls;
 444         int pg_size;
 445         int BLOCK_OFFSET = 0;
 446
 447         ctrlpriv = devm_kzalloc(&pdev->dev, sizeof(*ctrlpriv), GFP_KERNEL);
 448         if (!ctrlpriv)
 449                 return -ENOMEM;
 450
 451         dev = &pdev->dev;
 452         dev_set_drvdata(dev, ctrlpriv);
 453         ctrlpriv->pdev = pdev;
 454         nprop = pdev->dev.of_node;
 455
 456         /* Enable clocking */
 457         clk = caam_drv_identify_clk(&pdev->dev, "ipg");
 458         if (IS_ERR(clk)) {
 459                 ret = PTR_ERR(clk);
 460                 dev_err(&pdev->dev,
 461                         "can't identify CAAM ipg clk: %d\n", ret);
 462                 return ret;
 463         }
 464         ctrlpriv->caam_ipg = clk;
 465
 466         clk = caam_drv_identify_clk(&pdev->dev, "mem");
 467         if (IS_ERR(clk)) {
 468                 ret = PTR_ERR(clk);
 469                 dev_err(&pdev->dev,
 470                         "can't identify CAAM mem clk: %d\n", ret);
 471                 return ret;
 472         }
 473         ctrlpriv->caam_mem = clk;
 474
 475         clk = caam_drv_identify_clk(&pdev->dev, "aclk");
 476         if (IS_ERR(clk)) {
 477                 ret = PTR_ERR(clk);
 478                 dev_err(&pdev->dev,
 479                         "can't identify CAAM aclk clk: %d\n", ret);
 480                 return ret;
 481         }
 482         ctrlpriv->caam_aclk = clk;
 483
 484         clk = caam_drv_identify_clk(&pdev->dev, "emi_slow");
 485         if (IS_ERR(clk)) {
 486                 ret = PTR_ERR(clk);
 487                 dev_err(&pdev->dev,
 488                         "can't identify CAAM emi_slow clk: %d\n", ret);
 489                 return ret;
 490         }
 491         ctrlpriv->caam_emi_slow = clk;
 492
 493         ret = clk_prepare_enable(ctrlpriv->caam_ipg);
 494         if (ret < 0) {
 495                 dev_err(&pdev->dev, "can't enable CAAM ipg clock: %d\n", ret);
 496                 return ret;
 497         }
 498
 499         ret = clk_prepare_enable(ctrlpriv->caam_mem);
 500         if (ret < 0) {
 501                 dev_err(&pdev->dev, "can't enable CAAM secure mem clock: %d\n",
 502                         ret);
 503                 goto disable_caam_ipg;
 504         }
 505
 506         ret = clk_prepare_enable(ctrlpriv->caam_aclk);
 507         if (ret < 0) {
 508                 dev_err(&pdev->dev, "can't enable CAAM aclk clock: %d\n", ret);
 509                 goto disable_caam_mem;
 510         }
 511
 512         ret = clk_prepare_enable(ctrlpriv->caam_emi_slow);
 513         if (ret < 0) {
 514                 dev_err(&pdev->dev, "can't enable CAAM emi slow clock: %d\n",
 515                         ret);
 516                 goto disable_caam_aclk;
 517         }
 518
 519         /* Get configuration properties from device tree */
 520         /* First, get register page */
 521         ctrl = of_iomap(nprop, 0);
 522         if (ctrl == NULL) {
 523                 dev_err(dev, "caam: of_iomap() failed\n");
 524                 ret = -ENOMEM;
 525                 goto disable_caam_emi_slow;
 526         }
 527
 528         caam_little_end = !(bool)(rd_reg32(&ctrl->perfmon.status) &
 529                                   (CSTA_PLEND | CSTA_ALT_PLEND));
 530
 531         /* Finding the page size for using the CTPR_MS register */
 532         comp_params = rd_reg32(&ctrl->perfmon.comp_parms_ms);
 533         pg_size = (comp_params & CTPR_MS_PG_SZ_MASK) >> CTPR_MS_PG_SZ_SHIFT;
 534
 535         /* Allocating the BLOCK_OFFSET based on the supported page size on
 536          * the platform
 537          */
 538         if (pg_size == 0)
 539                 BLOCK_OFFSET = PG_SIZE_4K;
 540         else
 541                 BLOCK_OFFSET = PG_SIZE_64K;
 542
 543         ctrlpriv->ctrl = (struct caam_ctrl __force *)ctrl;
 544         ctrlpriv->assure = (struct caam_assurance __force *)
 545                            ((uint8_t *)ctrl +
 546                             BLOCK_OFFSET * ASSURE_BLOCK_NUMBER
 547                            );
 548         ctrlpriv->deco = (struct caam_deco __force *)
 549                          ((uint8_t *)ctrl +
 550                          BLOCK_OFFSET * DECO_BLOCK_NUMBER
 551                          );
 552
 553         /* Get the IRQ of the controller (for security violations only) */
 554         ctrlpriv->secvio_irq = irq_of_parse_and_map(nprop, 0);
 555
 556         /*
 557          * Enable DECO watchdogs and, if this is a PHYS_ADDR_T_64BIT kernel,
 558          * long pointers in master configuration register
 559          */
 560         clrsetbits_32(&ctrl->mcr, MCFGR_AWCACHE_MASK, MCFGR_AWCACHE_CACH |
 561                       MCFGR_AWCACHE_BUFF | MCFGR_WDENABLE | MCFGR_LARGE_BURST |
 562                       (sizeof(dma_addr_t) == sizeof(u64) ? MCFGR_LONG_PTR : 0));
 563
 564         /*
 565          *  Read the Compile Time paramters and SCFGR to determine
 566          * if Virtualization is enabled for this platform
 567          */
 568         scfgr = rd_reg32(&ctrl->scfgr);
 569
 570         ctrlpriv->virt_en = 0;
 571         if (comp_params & CTPR_MS_VIRT_EN_INCL) {
 572                 /* VIRT_EN_INCL = 1 & VIRT_EN_POR = 1 or
 573                  * VIRT_EN_INCL = 1 & VIRT_EN_POR = 0 & SCFGR_VIRT_EN = 1
 574                  */
 575                 if ((comp_params & CTPR_MS_VIRT_EN_POR) ||
 576                     (!(comp_params & CTPR_MS_VIRT_EN_POR) &&
 577                        (scfgr & SCFGR_VIRT_EN)))
 578                                 ctrlpriv->virt_en = 1;
 579         } else {
 580                 /* VIRT_EN_INCL = 0 && VIRT_EN_POR_VALUE = 1 */
 581                 if (comp_params & CTPR_MS_VIRT_EN_POR)
 582                                 ctrlpriv->virt_en = 1;
 583         }
 584
 585         if (ctrlpriv->virt_en == 1)
 586                 clrsetbits_32(&ctrl->jrstart, 0, JRSTART_JR0_START |
 587                               JRSTART_JR1_START | JRSTART_JR2_START |
 588                               JRSTART_JR3_START);
 589
 590         if (sizeof(dma_addr_t) == sizeof(u64))
 591                 if (of_device_is_compatible(nprop, "fsl,sec-v5.0"))
 592                         dma_set_mask_and_coherent(dev, DMA_BIT_MASK(40));
 593                 else
 594                         dma_set_mask_and_coherent(dev, DMA_BIT_MASK(36));
 595         else
 596                 dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
 597
 598         /*
 599          * Detect and enable JobRs
 600          * First, find out how many ring spec'ed, allocate references
 601          * for all, then go probe each one.
 602          */
 603         rspec = 0;
 604         for_each_available_child_of_node(nprop, np)
 605                 if (of_device_is_compatible(np, "fsl,sec-v4.0-job-ring") ||
 606                     of_device_is_compatible(np, "fsl,sec4.0-job-ring"))
 607                         rspec++;
 608
 609         ctrlpriv->jrpdev = devm_kcalloc(&pdev->dev, rspec,
 610                                         sizeof(*ctrlpriv->jrpdev), GFP_KERNEL);
 611         if (ctrlpriv->jrpdev == NULL) {
 612                 ret = -ENOMEM;
 613                 goto iounmap_ctrl;
 614         }
 615
 616         ring = 0;
 617         ctrlpriv->total_jobrs = 0;
 618         for_each_available_child_of_node(nprop, np)
 619                 if (of_device_is_compatible(np, "fsl,sec-v4.0-job-ring") ||
 620                     of_device_is_compatible(np, "fsl,sec4.0-job-ring")) {
 621                         ctrlpriv->jrpdev[ring] =
 622                                 of_platform_device_create(np, NULL, dev);
 623                         if (!ctrlpriv->jrpdev[ring]) {
 624                                 pr_warn("JR%d Platform device creation error\n",
 625                                         ring);
 626                                 continue;
 627                         }
 628                         ctrlpriv->jr[ring] = (struct caam_job_ring __force *)
 629                                              ((uint8_t *)ctrl +
 630                                              (ring + JR_BLOCK_NUMBER) *
 631                                               BLOCK_OFFSET
 632                                              );
 633                         ctrlpriv->total_jobrs++;
 634                         ring++;
 635         }
 636
 637         /* Check to see if QI present. If so, enable */
 638         ctrlpriv->qi_present =
 639                         !!(rd_reg32(&ctrl->perfmon.comp_parms_ms) &
 640                            CTPR_MS_QI_MASK);
 641         if (ctrlpriv->qi_present) {
 642                 ctrlpriv->qi = (struct caam_queue_if __force *)
 643                                ((uint8_t *)ctrl +
 644                                  BLOCK_OFFSET * QI_BLOCK_NUMBER
 645                                );
 646                 /* This is all that's required to physically enable QI */
 647                 wr_reg32(&ctrlpriv->qi->qi_control_lo, QICTL_DQEN);
 648         }
 649
 650         /* If no QI and no rings specified, quit and go home */
 651         if ((!ctrlpriv->qi_present) && (!ctrlpriv->total_jobrs)) {
 652                 dev_err(dev, "no queues configured, terminating\n");
 653                 ret = -ENOMEM;
 654                 goto caam_remove;
 655         }
 656
 657         cha_vid_ls = rd_reg32(&ctrl->perfmon.cha_id_ls);
 658
 659         /*
 660          * If SEC has RNG version >= 4 and RNG state handle has not been
 661          * already instantiated, do RNG instantiation
 662          */
 663         if ((cha_vid_ls & CHA_ID_LS_RNG_MASK) >> CHA_ID_LS_RNG_SHIFT >= 4) {
 664                 ctrlpriv->rng4_sh_init =
 665                         rd_reg32(&ctrl->r4tst[0].rdsta);
 666                 /*
 667                  * If the secure keys (TDKEK, JDKEK, TDSK), were already
 668                  * generated, signal this to the function that is instantiating
 669                  * the state handles. An error would occur if RNG4 attempts
 670                  * to regenerate these keys before the next POR.
 671                  */
 672                 gen_sk = ctrlpriv->rng4_sh_init & RDSTA_SKVN ? 0 : 1;
 673                 ctrlpriv->rng4_sh_init &= RDSTA_IFMASK;
 674                 do {
 675                         int inst_handles =
 676                                 rd_reg32(&ctrl->r4tst[0].rdsta) &
 677                                                                 RDSTA_IFMASK;
 678                         /*
 679                          * If either SH were instantiated by somebody else
 680                          * (e.g. u-boot) then it is assumed that the entropy
 681                          * parameters are properly set and thus the function
 682                          * setting these (kick_trng(...)) is skipped.
 683                          * Also, if a handle was instantiated, do not change
 684                          * the TRNG parameters.
 685                          */
 686                         if (!(ctrlpriv->rng4_sh_init || inst_handles)) {
 687                                 dev_info(dev,
 688                                          "Entropy delay = %u\n",
 689                                          ent_delay);
 690                                 kick_trng(pdev, ent_delay);
 691                                 ent_delay += 400;
 692                         }
 693                         /*
 694                          * if instantiate_rng(...) fails, the loop will rerun
 695                          * and the kick_trng(...) function will modfiy the
 696                          * upper and lower limits of the entropy sampling
 697                          * interval, leading to a sucessful initialization of
 698                          * the RNG.
 699                          */
 700                         ret = instantiate_rng(dev, inst_handles,
 701                                               gen_sk);
 702                         if (ret == -EAGAIN)
 703                                 /*
 704                                  * if here, the loop will rerun,
 705                                  * so don't hog the CPU
 706                                  */
 707                                 cpu_relax();
 708                 } while ((ret == -EAGAIN) && (ent_delay < RTSDCTL_ENT_DLY_MAX));
 709                 if (ret) {
 710                         dev_err(dev, "failed to instantiate RNG");
 711                         goto caam_remove;
 712                 }
 713                 /*
 714                  * Set handles init'ed by this module as the complement of the
 715                  * already initialized ones
 716                  */
 717                 ctrlpriv->rng4_sh_init = ~ctrlpriv->rng4_sh_init & RDSTA_IFMASK;
 718
 719                 /* Enable RDB bit so that RNG works faster */
 720                 clrsetbits_32(&ctrl->scfgr, 0, SCFGR_RDBENABLE);
 721         }
 722
 723         /* NOTE: RTIC detection ought to go here, around Si time */
 724
 725         caam_id = (u64)rd_reg32(&ctrl->perfmon.caam_id_ms) << 32 |
 726                   (u64)rd_reg32(&ctrl->perfmon.caam_id_ls);
 727
 728         /* Report "alive" for developer to see */
 729         dev_info(dev, "device ID = 0x%016llx (Era %d)\n", caam_id,
 730                  caam_get_era());
 731         dev_info(dev, "job rings = %d, qi = %d\n",
 732                  ctrlpriv->total_jobrs, ctrlpriv->qi_present);
 733
 734 #ifdef CONFIG_DEBUG_FS
 735         /*
 736          * FIXME: needs better naming distinction, as some amalgamation of
 737          * "caam" and nprop->full_name. The OF name isn't distinctive,
 738          * but does separate instances
 739          */
 740         perfmon = (struct caam_perfmon __force *)&ctrl->perfmon;
 741
 742         ctrlpriv->dfs_root = debugfs_create_dir(dev_name(dev), NULL);
 743         ctrlpriv->ctl = debugfs_create_dir("ctl", ctrlpriv->dfs_root);
 744
 745         /* Controller-level - performance monitor counters */
 746
 747         ctrlpriv->ctl_rq_dequeued =
 748                 debugfs_create_file("rq_dequeued",
 749                                     S_IRUSR | S_IRGRP | S_IROTH,
 750                                     ctrlpriv->ctl, &perfmon->req_dequeued,
 751                                     &caam_fops_u64_ro);
 752         ctrlpriv->ctl_ob_enc_req =
 753                 debugfs_create_file("ob_rq_encrypted",
 754                                     S_IRUSR | S_IRGRP | S_IROTH,
 755                                     ctrlpriv->ctl, &perfmon->ob_enc_req,
 756                                     &caam_fops_u64_ro);
 757         ctrlpriv->ctl_ib_dec_req =
 758                 debugfs_create_file("ib_rq_decrypted",
 759                                     S_IRUSR | S_IRGRP | S_IROTH,
 760                                     ctrlpriv->ctl, &perfmon->ib_dec_req,
 761                                     &caam_fops_u64_ro);
 762         ctrlpriv->ctl_ob_enc_bytes =
 763                 debugfs_create_file("ob_bytes_encrypted",
 764                                     S_IRUSR | S_IRGRP | S_IROTH,
 765                                     ctrlpriv->ctl, &perfmon->ob_enc_bytes,
 766                                     &caam_fops_u64_ro);
 767         ctrlpriv->ctl_ob_prot_bytes =
 768                 debugfs_create_file("ob_bytes_protected",
 769                                     S_IRUSR | S_IRGRP | S_IROTH,
 770                                     ctrlpriv->ctl, &perfmon->ob_prot_bytes,
 771                                     &caam_fops_u64_ro);
 772         ctrlpriv->ctl_ib_dec_bytes =
 773                 debugfs_create_file("ib_bytes_decrypted",
 774                                     S_IRUSR | S_IRGRP | S_IROTH,
 775                                     ctrlpriv->ctl, &perfmon->ib_dec_bytes,
 776                                     &caam_fops_u64_ro);
 777         ctrlpriv->ctl_ib_valid_bytes =
 778                 debugfs_create_file("ib_bytes_validated",
 779                                     S_IRUSR | S_IRGRP | S_IROTH,
 780                                     ctrlpriv->ctl, &perfmon->ib_valid_bytes,
 781                                     &caam_fops_u64_ro);
 782
 783         /* Controller level - global status values */
 784         ctrlpriv->ctl_faultaddr =
 785                 debugfs_create_file("fault_addr",
 786                                     S_IRUSR | S_IRGRP | S_IROTH,
 787                                     ctrlpriv->ctl, &perfmon->faultaddr,
 788                                     &caam_fops_u32_ro);
 789         ctrlpriv->ctl_faultdetail =
 790                 debugfs_create_file("fault_detail",
 791                                     S_IRUSR | S_IRGRP | S_IROTH,
 792                                     ctrlpriv->ctl, &perfmon->faultdetail,
 793                                     &caam_fops_u32_ro);
 794         ctrlpriv->ctl_faultstatus =
 795                 debugfs_create_file("fault_status",
 796                                     S_IRUSR | S_IRGRP | S_IROTH,
 797                                     ctrlpriv->ctl, &perfmon->status,
 798                                     &caam_fops_u32_ro);
 799
 800         /* Internal covering keys (useful in non-secure mode only) */
 801         ctrlpriv->ctl_kek_wrap.data = &ctrlpriv->ctrl->kek[0];
 802         ctrlpriv->ctl_kek_wrap.size = KEK_KEY_SIZE * sizeof(u32);
 803         ctrlpriv->ctl_kek = debugfs_create_blob("kek",
 804                                                 S_IRUSR |
 805                                                 S_IRGRP | S_IROTH,
 806                                                 ctrlpriv->ctl,
 807                                                 &ctrlpriv->ctl_kek_wrap);
 808
 809         ctrlpriv->ctl_tkek_wrap.data = &ctrlpriv->ctrl->tkek[0];
 810         ctrlpriv->ctl_tkek_wrap.size = KEK_KEY_SIZE * sizeof(u32);
 811         ctrlpriv->ctl_tkek = debugfs_create_blob("tkek",
 812                                                  S_IRUSR |
 813                                                  S_IRGRP | S_IROTH,
 814                                                  ctrlpriv->ctl,
 815                                                  &ctrlpriv->ctl_tkek_wrap);
 816
 817         ctrlpriv->ctl_tdsk_wrap.data = &ctrlpriv->ctrl->tdsk[0];
 818         ctrlpriv->ctl_tdsk_wrap.size = KEK_KEY_SIZE * sizeof(u32);
 819         ctrlpriv->ctl_tdsk = debugfs_create_blob("tdsk",
 820                                                  S_IRUSR |
 821                                                  S_IRGRP | S_IROTH,
 822                                                  ctrlpriv->ctl,
 823                                                  &ctrlpriv->ctl_tdsk_wrap);
 824 #endif
 825         return 0;
 826
 827 caam_remove:
 828         caam_remove(pdev);
 829 iounmap_ctrl:
 830         iounmap(ctrl);
 831 disable_caam_emi_slow:
 832         clk_disable_unprepare(ctrlpriv->caam_emi_slow);
 833 disable_caam_aclk:
 834         clk_disable_unprepare(ctrlpriv->caam_aclk);
 835 disable_caam_mem:
 836         clk_disable_unprepare(ctrlpriv->caam_mem);
 837 disable_caam_ipg:
 838         clk_disable_unprepare(ctrlpriv->caam_ipg);
 839         return ret;
 840 }
 841
 842 static struct of_device_id caam_match[] = {
 843         {
 844                 .compatible = "fsl,sec-v4.0",
 845         },
 846         {
 847                 .compatible = "fsl,sec4.0",
 848         },
 849         {},
 850 };
 851 MODULE_DEVICE_TABLE(of, caam_match);
 852
 853 static struct platform_driver caam_driver = {
 854         .driver = {
 855                 .name = "caam",
 856                 .of_match_table = caam_match,
 857         },
 858         .probe       = caam_probe,
 859         .remove      = caam_remove,
 860 };
 861
 862 module_platform_driver(caam_driver);
 863
 864 MODULE_LICENSE("GPL");
 865 MODULE_DESCRIPTION("FSL CAAM request backend");
 866 MODULE_AUTHOR("Freescale Semiconductor - NMG/STC");