drivers/clk/at91/sama5d4.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 #include <linux/clk-provider.h>
   3 #include <linux/mfd/syscon.h>
   4 #include <linux/slab.h>
   5
   6 #include <dt-bindings/clock/at91.h>
   7
   8 #include "pmc.h"
   9
  10 static const struct clk_master_characteristics mck_characteristics = {
  11         .output = { .min = 125000000, .max = 200000000 },
  12         .divisors = { 1, 2, 4, 3 },
  13 };
  14
  15 static u8 plla_out[] = { 0 };
  16
  17 static u16 plla_icpll[] = { 0 };
  18
  19 static struct clk_range plla_outputs[] = {
  20         { .min = 600000000, .max = 1200000000 },
  21 };
  22
  23 static const struct clk_pll_characteristics plla_characteristics = {
  24         .input = { .min = 12000000, .max = 12000000 },
  25         .num_output = ARRAY_SIZE(plla_outputs),
  26         .output = plla_outputs,
  27         .icpll = plla_icpll,
  28         .out = plla_out,
  29 };
  30
  31 static const struct {
  32         char *n;
  33         char *p;
  34         u8 id;
  35 } sama5d4_systemck[] = {
  36         { .n = "ddrck", .p = "masterck", .id = 2 },
  37         { .n = "lcdck", .p = "masterck", .id = 3 },
  38         { .n = "smdck", .p = "smdclk",   .id = 4 },
  39         { .n = "uhpck", .p = "usbck",    .id = 6 },
  40         { .n = "udpck", .p = "usbck",    .id = 7 },
  41         { .n = "pck0",  .p = "prog0",    .id = 8 },
  42         { .n = "pck1",  .p = "prog1",    .id = 9 },
  43         { .n = "pck2",  .p = "prog2",    .id = 10 },
  44 };
  45
  46 static const struct {
  47         char *n;
  48         u8 id;
  49 } sama5d4_periph32ck[] = {
  50         { .n = "pioD_clk", .id = 5 },
  51         { .n = "usart0_clk", .id = 6 },
  52         { .n = "usart1_clk", .id = 7 },
  53         { .n = "icm_clk", .id = 9 },
  54         { .n = "aes_clk", .id = 12 },
  55         { .n = "tdes_clk", .id = 14 },
  56         { .n = "sha_clk", .id = 15 },
  57         { .n = "matrix1_clk", .id = 17 },
  58         { .n = "hsmc_clk", .id = 22 },
  59         { .n = "pioA_clk", .id = 23 },
  60         { .n = "pioB_clk", .id = 24 },
  61         { .n = "pioC_clk", .id = 25 },
  62         { .n = "pioE_clk", .id = 26 },
  63         { .n = "uart0_clk", .id = 27 },
  64         { .n = "uart1_clk", .id = 28 },
  65         { .n = "usart2_clk", .id = 29 },
  66         { .n = "usart3_clk", .id = 30 },
  67         { .n = "usart4_clk", .id = 31 },
  68         { .n = "twi0_clk", .id = 32 },
  69         { .n = "twi1_clk", .id = 33 },
  70         { .n = "twi2_clk", .id = 34 },
  71         { .n = "mci0_clk", .id = 35 },
  72         { .n = "mci1_clk", .id = 36 },
  73         { .n = "spi0_clk", .id = 37 },
  74         { .n = "spi1_clk", .id = 38 },
  75         { .n = "spi2_clk", .id = 39 },
  76         { .n = "tcb0_clk", .id = 40 },
  77         { .n = "tcb1_clk", .id = 41 },
  78         { .n = "tcb2_clk", .id = 42 },
  79         { .n = "pwm_clk", .id = 43 },
  80         { .n = "adc_clk", .id = 44 },
  81         { .n = "dbgu_clk", .id = 45 },
  82         { .n = "uhphs_clk", .id = 46 },
  83         { .n = "udphs_clk", .id = 47 },
  84         { .n = "ssc0_clk", .id = 48 },
  85         { .n = "ssc1_clk", .id = 49 },
  86         { .n = "trng_clk", .id = 53 },
  87         { .n = "macb0_clk", .id = 54 },
  88         { .n = "macb1_clk", .id = 55 },
  89         { .n = "fuse_clk", .id = 57 },
  90         { .n = "securam_clk", .id = 59 },
  91         { .n = "smd_clk", .id = 61 },
  92         { .n = "twi3_clk", .id = 62 },
  93         { .n = "catb_clk", .id = 63 },
  94 };
  95
  96 static const struct {
  97         char *n;
  98         u8 id;
  99 } sama5d4_periphck[] = {
 100         { .n = "dma0_clk", .id = 8 },
 101         { .n = "cpkcc_clk", .id = 10 },
 102         { .n = "aesb_clk", .id = 13 },
 103         { .n = "mpddr_clk", .id = 16 },
 104         { .n = "matrix0_clk", .id = 18 },
 105         { .n = "vdec_clk", .id = 19 },
 106         { .n = "dma1_clk", .id = 50 },
 107         { .n = "lcdc_clk", .id = 51 },
 108         { .n = "isi_clk", .id = 52 },
 109 };
 110
 111 static void __init sama5d4_pmc_setup(struct device_node *np)
 112 {
 113         struct clk_range range = CLK_RANGE(0, 0);
 114         const char *slck_name, *mainxtal_name;
 115         struct pmc_data *sama5d4_pmc;
 116         const char *parent_names[5];
 117         struct regmap *regmap;
 118         struct clk_hw *hw;
 119         int i;
 120         bool bypass;
 121
 122         i = of_property_match_string(np, "clock-names", "slow_clk");
 123         if (i < 0)
 124                 return;
 125
 126         slck_name = of_clk_get_parent_name(np, i);
 127
 128         i = of_property_match_string(np, "clock-names", "main_xtal");
 129         if (i < 0)
 130                 return;
 131         mainxtal_name = of_clk_get_parent_name(np, i);
 132
 133         regmap = syscon_node_to_regmap(np);
 134         if (IS_ERR(regmap))
 135                 return;
 136
 137         sama5d4_pmc = pmc_data_allocate(PMC_MCK2 + 1,
 138                                         nck(sama5d4_systemck),
 139                                         nck(sama5d4_periph32ck), 0);
 140         if (!sama5d4_pmc)
 141                 return;
 142
 143         hw = at91_clk_register_main_rc_osc(regmap, "main_rc_osc", 12000000,
 144                                            100000000);
 145         if (IS_ERR(hw))
 146                 goto err_free;
 147
 148         bypass = of_property_read_bool(np, "atmel,osc-bypass");
 149
 150         hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name,
 151                                         bypass);
 152         if (IS_ERR(hw))
 153                 goto err_free;
 154
 155         parent_names[0] = "main_rc_osc";
 156         parent_names[1] = "main_osc";
 157         hw = at91_clk_register_sam9x5_main(regmap, "mainck", parent_names, 2);
 158         if (IS_ERR(hw))
 159                 goto err_free;
 160
 161         hw = at91_clk_register_pll(regmap, "pllack", "mainck", 0,
 162                                    &sama5d3_pll_layout, &plla_characteristics);
 163         if (IS_ERR(hw))
 164                 goto err_free;
 165
 166         hw = at91_clk_register_plldiv(regmap, "plladivck", "pllack");
 167         if (IS_ERR(hw))
 168                 goto err_free;
 169
 170         hw = at91_clk_register_utmi(regmap, NULL, "utmick", "mainck");
 171         if (IS_ERR(hw))
 172                 goto err_free;
 173
 174         sama5d4_pmc->chws[PMC_UTMI] = hw;
 175
 176         parent_names[0] = slck_name;
 177         parent_names[1] = "mainck";
 178         parent_names[2] = "plladivck";
 179         parent_names[3] = "utmick";
 180         hw = at91_clk_register_master(regmap, "masterck", 4, parent_names,
 181                                       &at91sam9x5_master_layout,
 182                                       &mck_characteristics);
 183         if (IS_ERR(hw))
 184                 goto err_free;
 185
 186         sama5d4_pmc->chws[PMC_MCK] = hw;
 187
 188         hw = at91_clk_register_h32mx(regmap, "h32mxck", "masterck");
 189         if (IS_ERR(hw))
 190                 goto err_free;
 191
 192         sama5d4_pmc->chws[PMC_MCK2] = hw;
 193
 194         parent_names[0] = "plladivck";
 195         parent_names[1] = "utmick";
 196         hw = at91sam9x5_clk_register_usb(regmap, "usbck", parent_names, 2);
 197         if (IS_ERR(hw))
 198                 goto err_free;
 199
 200         parent_names[0] = "plladivck";
 201         parent_names[1] = "utmick";
 202         hw = at91sam9x5_clk_register_smd(regmap, "smdclk", parent_names, 2);
 203         if (IS_ERR(hw))
 204                 goto err_free;
 205
 206         parent_names[0] = slck_name;
 207         parent_names[1] = "mainck";
 208         parent_names[2] = "plladivck";
 209         parent_names[3] = "utmick";
 210         parent_names[4] = "mck";
 211         for (i = 0; i < 3; i++) {
 212                 char name[6];
 213
 214                 snprintf(name, sizeof(name), "prog%d", i);
 215
 216                 hw = at91_clk_register_programmable(regmap, name,
 217                                                     parent_names, 5, i,
 218                                                     &at91sam9x5_programmable_layout);
 219                 if (IS_ERR(hw))
 220                         goto err_free;
 221         }
 222
 223         for (i = 0; i < ARRAY_SIZE(sama5d4_systemck); i++) {
 224                 hw = at91_clk_register_system(regmap, sama5d4_systemck[i].n,
 225                                               sama5d4_systemck[i].p,
 226                                               sama5d4_systemck[i].id);
 227                 if (IS_ERR(hw))
 228                         goto err_free;
 229
 230                 sama5d4_pmc->shws[sama5d4_systemck[i].id] = hw;
 231         }
 232
 233         for (i = 0; i < ARRAY_SIZE(sama5d4_periphck); i++) {
 234                 hw = at91_clk_register_sam9x5_peripheral(regmap, &pmc_pcr_lock,
 235                                                          sama5d4_periphck[i].n,
 236                                                          "masterck",
 237                                                          sama5d4_periphck[i].id,
 238                                                          &range);
 239                 if (IS_ERR(hw))
 240                         goto err_free;
 241
 242                 sama5d4_pmc->phws[sama5d4_periphck[i].id] = hw;
 243         }
 244
 245         for (i = 0; i < ARRAY_SIZE(sama5d4_periph32ck); i++) {
 246                 hw = at91_clk_register_sam9x5_peripheral(regmap, &pmc_pcr_lock,
 247                                                          sama5d4_periph32ck[i].n,
 248                                                          "h32mxck",
 249                                                          sama5d4_periph32ck[i].id,
 250                                                          &range);
 251                 if (IS_ERR(hw))
 252                         goto err_free;
 253
 254                 sama5d4_pmc->phws[sama5d4_periph32ck[i].id] = hw;
 255         }
 256
 257         of_clk_add_hw_provider(np, of_clk_hw_pmc_get, sama5d4_pmc);
 258
 259         return;
 260
 261 err_free:
 262         pmc_data_free(sama5d4_pmc);
 263 }
 264 CLK_OF_DECLARE_DRIVER(sama5d4_pmc, "atmel,sama5d4-pmc", sama5d4_pmc_setup);