Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6
[sfrench/cifs-2.6.git] / drivers / char / pcmcia / synclink_cs.c
1 /*
2  * linux/drivers/char/pcmcia/synclink_cs.c
3  *
4  * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
5  *
6  * Device driver for Microgate SyncLink PC Card
7  * multiprotocol serial adapter.
8  *
9  * written by Paul Fulghum for Microgate Corporation
10  * paulkf@microgate.com
11  *
12  * Microgate and SyncLink are trademarks of Microgate Corporation
13  *
14  * This code is released under the GNU General Public License (GPL)
15  *
16  * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
17  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
20  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
24  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
26  * OF THE POSSIBILITY OF SUCH DAMAGE.
27  */
28
29 #define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
30 #if defined(__i386__)
31 #  define BREAKPOINT() asm("   int $3");
32 #else
33 #  define BREAKPOINT() { }
34 #endif
35
36 #define MAX_DEVICE_COUNT 4
37
38 #include <linux/module.h>
39 #include <linux/errno.h>
40 #include <linux/signal.h>
41 #include <linux/sched.h>
42 #include <linux/timer.h>
43 #include <linux/time.h>
44 #include <linux/interrupt.h>
45 #include <linux/pci.h>
46 #include <linux/tty.h>
47 #include <linux/tty_flip.h>
48 #include <linux/serial.h>
49 #include <linux/major.h>
50 #include <linux/string.h>
51 #include <linux/fcntl.h>
52 #include <linux/ptrace.h>
53 #include <linux/ioport.h>
54 #include <linux/mm.h>
55 #include <linux/slab.h>
56 #include <linux/netdevice.h>
57 #include <linux/vmalloc.h>
58 #include <linux/init.h>
59 #include <linux/delay.h>
60 #include <linux/ioctl.h>
61
62 #include <asm/system.h>
63 #include <asm/io.h>
64 #include <asm/irq.h>
65 #include <asm/dma.h>
66 #include <linux/bitops.h>
67 #include <asm/types.h>
68 #include <linux/termios.h>
69 #include <linux/workqueue.h>
70 #include <linux/hdlc.h>
71
72 #include <pcmcia/cs_types.h>
73 #include <pcmcia/cs.h>
74 #include <pcmcia/cistpl.h>
75 #include <pcmcia/cisreg.h>
76 #include <pcmcia/ds.h>
77
78 #if defined(CONFIG_HDLC) || (defined(CONFIG_HDLC_MODULE) && defined(CONFIG_SYNCLINK_CS_MODULE))
79 #define SYNCLINK_GENERIC_HDLC 1
80 #else
81 #define SYNCLINK_GENERIC_HDLC 0
82 #endif
83
84 #define GET_USER(error,value,addr) error = get_user(value,addr)
85 #define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
86 #define PUT_USER(error,value,addr) error = put_user(value,addr)
87 #define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
88
89 #include <asm/uaccess.h>
90
91 #include "linux/synclink.h"
92
93 static MGSL_PARAMS default_params = {
94         MGSL_MODE_HDLC,                 /* unsigned long mode */
95         0,                              /* unsigned char loopback; */
96         HDLC_FLAG_UNDERRUN_ABORT15,     /* unsigned short flags; */
97         HDLC_ENCODING_NRZI_SPACE,       /* unsigned char encoding; */
98         0,                              /* unsigned long clock_speed; */
99         0xff,                           /* unsigned char addr_filter; */
100         HDLC_CRC_16_CCITT,              /* unsigned short crc_type; */
101         HDLC_PREAMBLE_LENGTH_8BITS,     /* unsigned char preamble_length; */
102         HDLC_PREAMBLE_PATTERN_NONE,     /* unsigned char preamble; */
103         9600,                           /* unsigned long data_rate; */
104         8,                              /* unsigned char data_bits; */
105         1,                              /* unsigned char stop_bits; */
106         ASYNC_PARITY_NONE               /* unsigned char parity; */
107 };
108
109 typedef struct
110 {
111         int count;
112         unsigned char status;
113         char data[1];
114 } RXBUF;
115
116 /* The queue of BH actions to be performed */
117
118 #define BH_RECEIVE  1
119 #define BH_TRANSMIT 2
120 #define BH_STATUS   4
121
122 #define IO_PIN_SHUTDOWN_LIMIT 100
123
124 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
125
126 struct _input_signal_events {
127         int     ri_up;  
128         int     ri_down;
129         int     dsr_up;
130         int     dsr_down;
131         int     dcd_up;
132         int     dcd_down;
133         int     cts_up;
134         int     cts_down;
135 };
136
137
138 /*
139  * Device instance data structure
140  */
141  
142 typedef struct _mgslpc_info {
143         void *if_ptr;   /* General purpose pointer (used by SPPP) */
144         int                     magic;
145         int                     flags;
146         int                     count;          /* count of opens */
147         int                     line;
148         unsigned short          close_delay;
149         unsigned short          closing_wait;   /* time to wait before closing */
150         
151         struct mgsl_icount      icount;
152         
153         struct tty_struct       *tty;
154         int                     timeout;
155         int                     x_char;         /* xon/xoff character */
156         int                     blocked_open;   /* # of blocked opens */
157         unsigned char           read_status_mask;
158         unsigned char           ignore_status_mask;     
159
160         unsigned char *tx_buf;
161         int            tx_put;
162         int            tx_get;
163         int            tx_count;
164
165         /* circular list of fixed length rx buffers */
166
167         unsigned char  *rx_buf;        /* memory allocated for all rx buffers */
168         int            rx_buf_total_size; /* size of memory allocated for rx buffers */
169         int            rx_put;         /* index of next empty rx buffer */
170         int            rx_get;         /* index of next full rx buffer */
171         int            rx_buf_size;    /* size in bytes of single rx buffer */
172         int            rx_buf_count;   /* total number of rx buffers */
173         int            rx_frame_count; /* number of full rx buffers */
174         
175         wait_queue_head_t       open_wait;
176         wait_queue_head_t       close_wait;
177         
178         wait_queue_head_t       status_event_wait_q;
179         wait_queue_head_t       event_wait_q;
180         struct timer_list       tx_timer;       /* HDLC transmit timeout timer */
181         struct _mgslpc_info     *next_device;   /* device list link */
182
183         unsigned short imra_value;
184         unsigned short imrb_value;
185         unsigned char  pim_value;
186
187         spinlock_t lock;
188         struct work_struct task;                /* task structure for scheduling bh */
189
190         u32 max_frame_size;
191
192         u32 pending_bh;
193
194         int bh_running;
195         int bh_requested;
196         
197         int dcd_chkcount; /* check counts to prevent */
198         int cts_chkcount; /* too many IRQs if a signal */
199         int dsr_chkcount; /* is floating */
200         int ri_chkcount;
201
202         int rx_enabled;
203         int rx_overflow;
204
205         int tx_enabled;
206         int tx_active;
207         int tx_aborting;
208         u32 idle_mode;
209
210         int if_mode; /* serial interface selection (RS-232, v.35 etc) */
211
212         char device_name[25];           /* device instance name */
213
214         unsigned int io_base;   /* base I/O address of adapter */
215         unsigned int irq_level;
216         
217         MGSL_PARAMS params;             /* communications parameters */
218
219         unsigned char serial_signals;   /* current serial signal states */
220
221         char irq_occurred;              /* for diagnostics use */
222         char testing_irq;
223         unsigned int init_error;        /* startup error (DIAGS)        */
224
225         char flag_buf[MAX_ASYNC_BUFFER_SIZE];
226         BOOLEAN drop_rts_on_tx_done;
227
228         struct  _input_signal_events    input_signal_events;
229
230         /* PCMCIA support */
231         struct pcmcia_device    *p_dev;
232         dev_node_t            node;
233         int                   stop;
234
235         /* SPPP/Cisco HDLC device parts */
236         int netcount;
237         int dosyncppp;
238         spinlock_t netlock;
239
240 #if SYNCLINK_GENERIC_HDLC
241         struct net_device *netdev;
242 #endif
243
244 } MGSLPC_INFO;
245
246 #define MGSLPC_MAGIC 0x5402
247
248 /*
249  * The size of the serial xmit buffer is 1 page, or 4096 bytes
250  */
251 #define TXBUFSIZE 4096
252
253     
254 #define CHA     0x00   /* channel A offset */
255 #define CHB     0x40   /* channel B offset */
256
257 /*
258  *  FIXME: PPC has PVR defined in asm/reg.h.  For now we just undef it.
259  */
260 #undef PVR
261
262 #define RXFIFO  0
263 #define TXFIFO  0
264 #define STAR    0x20
265 #define CMDR    0x20
266 #define RSTA    0x21
267 #define PRE     0x21
268 #define MODE    0x22
269 #define TIMR    0x23
270 #define XAD1    0x24
271 #define XAD2    0x25
272 #define RAH1    0x26
273 #define RAH2    0x27
274 #define DAFO    0x27
275 #define RAL1    0x28
276 #define RFC     0x28
277 #define RHCR    0x29
278 #define RAL2    0x29
279 #define RBCL    0x2a
280 #define XBCL    0x2a
281 #define RBCH    0x2b
282 #define XBCH    0x2b
283 #define CCR0    0x2c
284 #define CCR1    0x2d
285 #define CCR2    0x2e
286 #define CCR3    0x2f
287 #define VSTR    0x34
288 #define BGR     0x34
289 #define RLCR    0x35
290 #define AML     0x36
291 #define AMH     0x37
292 #define GIS     0x38
293 #define IVA     0x38
294 #define IPC     0x39
295 #define ISR     0x3a
296 #define IMR     0x3a
297 #define PVR     0x3c
298 #define PIS     0x3d
299 #define PIM     0x3d
300 #define PCR     0x3e
301 #define CCR4    0x3f
302     
303 // IMR/ISR
304     
305 #define IRQ_BREAK_ON    BIT15   // rx break detected
306 #define IRQ_DATAOVERRUN BIT14   // receive data overflow
307 #define IRQ_ALLSENT     BIT13   // all sent
308 #define IRQ_UNDERRUN    BIT12   // transmit data underrun
309 #define IRQ_TIMER       BIT11   // timer interrupt
310 #define IRQ_CTS         BIT10   // CTS status change
311 #define IRQ_TXREPEAT    BIT9    // tx message repeat
312 #define IRQ_TXFIFO      BIT8    // transmit pool ready
313 #define IRQ_RXEOM       BIT7    // receive message end
314 #define IRQ_EXITHUNT    BIT6    // receive frame start
315 #define IRQ_RXTIME      BIT6    // rx char timeout
316 #define IRQ_DCD         BIT2    // carrier detect status change
317 #define IRQ_OVERRUN     BIT1    // receive frame overflow
318 #define IRQ_RXFIFO      BIT0    // receive pool full
319     
320 // STAR
321     
322 #define XFW   BIT6              // transmit FIFO write enable
323 #define CEC   BIT2              // command executing
324 #define CTS   BIT1              // CTS state
325     
326 #define PVR_DTR      BIT0
327 #define PVR_DSR      BIT1
328 #define PVR_RI       BIT2
329 #define PVR_AUTOCTS  BIT3
330 #define PVR_RS232    0x20   /* 0010b */
331 #define PVR_V35      0xe0   /* 1110b */
332 #define PVR_RS422    0x40   /* 0100b */
333     
334 /* Register access functions */ 
335     
336 #define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
337 #define read_reg(info, reg) inb((info)->io_base + (reg))
338
339 #define read_reg16(info, reg) inw((info)->io_base + (reg))  
340 #define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
341     
342 #define set_reg_bits(info, reg, mask) \
343     write_reg(info, (reg), \
344                  (unsigned char) (read_reg(info, (reg)) | (mask)))  
345 #define clear_reg_bits(info, reg, mask) \
346     write_reg(info, (reg), \
347                  (unsigned char) (read_reg(info, (reg)) & ~(mask)))  
348 /*
349  * interrupt enable/disable routines
350  */ 
351 static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask) 
352 {
353         if (channel == CHA) {
354                 info->imra_value |= mask;
355                 write_reg16(info, CHA + IMR, info->imra_value);
356         } else {
357                 info->imrb_value |= mask;
358                 write_reg16(info, CHB + IMR, info->imrb_value);
359         }
360 }
361 static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask) 
362 {
363         if (channel == CHA) {
364                 info->imra_value &= ~mask;
365                 write_reg16(info, CHA + IMR, info->imra_value);
366         } else {
367                 info->imrb_value &= ~mask;
368                 write_reg16(info, CHB + IMR, info->imrb_value);
369         }
370 }
371
372 #define port_irq_disable(info, mask) \
373   { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
374
375 #define port_irq_enable(info, mask) \
376   { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
377
378 static void rx_start(MGSLPC_INFO *info);
379 static void rx_stop(MGSLPC_INFO *info);
380
381 static void tx_start(MGSLPC_INFO *info);
382 static void tx_stop(MGSLPC_INFO *info);
383 static void tx_set_idle(MGSLPC_INFO *info);
384
385 static void get_signals(MGSLPC_INFO *info);
386 static void set_signals(MGSLPC_INFO *info);
387
388 static void reset_device(MGSLPC_INFO *info);
389
390 static void hdlc_mode(MGSLPC_INFO *info);
391 static void async_mode(MGSLPC_INFO *info);
392
393 static void tx_timeout(unsigned long context);
394
395 static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg);
396
397 #if SYNCLINK_GENERIC_HDLC
398 #define dev_to_port(D) (dev_to_hdlc(D)->priv)
399 static void hdlcdev_tx_done(MGSLPC_INFO *info);
400 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
401 static int  hdlcdev_init(MGSLPC_INFO *info);
402 static void hdlcdev_exit(MGSLPC_INFO *info);
403 #endif
404
405 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
406
407 static BOOLEAN register_test(MGSLPC_INFO *info);
408 static BOOLEAN irq_test(MGSLPC_INFO *info);
409 static int adapter_test(MGSLPC_INFO *info);
410
411 static int claim_resources(MGSLPC_INFO *info);
412 static void release_resources(MGSLPC_INFO *info);
413 static void mgslpc_add_device(MGSLPC_INFO *info);
414 static void mgslpc_remove_device(MGSLPC_INFO *info);
415
416 static int  rx_get_frame(MGSLPC_INFO *info);
417 static void rx_reset_buffers(MGSLPC_INFO *info);
418 static int  rx_alloc_buffers(MGSLPC_INFO *info);
419 static void rx_free_buffers(MGSLPC_INFO *info);
420
421 static irqreturn_t mgslpc_isr(int irq, void *dev_id);
422
423 /*
424  * Bottom half interrupt handlers
425  */
426 static void bh_handler(struct work_struct *work);
427 static void bh_transmit(MGSLPC_INFO *info);
428 static void bh_status(MGSLPC_INFO *info);
429
430 /*
431  * ioctl handlers
432  */
433 static int tiocmget(struct tty_struct *tty, struct file *file);
434 static int tiocmset(struct tty_struct *tty, struct file *file,
435                     unsigned int set, unsigned int clear);
436 static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
437 static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
438 static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params);
439 static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
440 static int set_txidle(MGSLPC_INFO *info, int idle_mode);
441 static int set_txenable(MGSLPC_INFO *info, int enable);
442 static int tx_abort(MGSLPC_INFO *info);
443 static int set_rxenable(MGSLPC_INFO *info, int enable);
444 static int wait_events(MGSLPC_INFO *info, int __user *mask);
445
446 static MGSLPC_INFO *mgslpc_device_list = NULL;
447 static int mgslpc_device_count = 0;
448
449 /*
450  * Set this param to non-zero to load eax with the
451  * .text section address and breakpoint on module load.
452  * This is useful for use with gdb and add-symbol-file command.
453  */
454 static int break_on_load=0;
455
456 /*
457  * Driver major number, defaults to zero to get auto
458  * assigned major number. May be forced as module parameter.
459  */
460 static int ttymajor=0;
461
462 static int debug_level = 0;
463 static int maxframe[MAX_DEVICE_COUNT] = {0,};
464 static int dosyncppp[MAX_DEVICE_COUNT] = {1,1,1,1};
465
466 module_param(break_on_load, bool, 0);
467 module_param(ttymajor, int, 0);
468 module_param(debug_level, int, 0);
469 module_param_array(maxframe, int, NULL, 0);
470 module_param_array(dosyncppp, int, NULL, 0);
471
472 MODULE_LICENSE("GPL");
473
474 static char *driver_name = "SyncLink PC Card driver";
475 static char *driver_version = "$Revision: 4.34 $";
476
477 static struct tty_driver *serial_driver;
478
479 /* number of characters left in xmit buffer before we ask for more */
480 #define WAKEUP_CHARS 256
481
482 static void mgslpc_change_params(MGSLPC_INFO *info);
483 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
484
485 /* PCMCIA prototypes */
486
487 static int mgslpc_config(struct pcmcia_device *link);
488 static void mgslpc_release(u_long arg);
489 static void mgslpc_detach(struct pcmcia_device *p_dev);
490
491 /*
492  * 1st function defined in .text section. Calling this function in
493  * init_module() followed by a breakpoint allows a remote debugger
494  * (gdb) to get the .text address for the add-symbol-file command.
495  * This allows remote debugging of dynamically loadable modules.
496  */
497 static void* mgslpc_get_text_ptr(void)
498 {
499         return mgslpc_get_text_ptr;
500 }
501
502 /**
503  * line discipline callback wrappers
504  *
505  * The wrappers maintain line discipline references
506  * while calling into the line discipline.
507  *
508  * ldisc_flush_buffer - flush line discipline receive buffers
509  * ldisc_receive_buf  - pass receive data to line discipline
510  */
511
512 static void ldisc_flush_buffer(struct tty_struct *tty)
513 {
514         struct tty_ldisc *ld = tty_ldisc_ref(tty);
515         if (ld) {
516                 if (ld->flush_buffer)
517                         ld->flush_buffer(tty);
518                 tty_ldisc_deref(ld);
519         }
520 }
521
522 static void ldisc_receive_buf(struct tty_struct *tty,
523                               const __u8 *data, char *flags, int count)
524 {
525         struct tty_ldisc *ld;
526         if (!tty)
527                 return;
528         ld = tty_ldisc_ref(tty);
529         if (ld) {
530                 if (ld->receive_buf)
531                         ld->receive_buf(tty, data, flags, count);
532                 tty_ldisc_deref(ld);
533         }
534 }
535
536 static int mgslpc_probe(struct pcmcia_device *link)
537 {
538     MGSLPC_INFO *info;
539     int ret;
540
541     if (debug_level >= DEBUG_LEVEL_INFO)
542             printk("mgslpc_attach\n");
543
544     info = kmalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
545     if (!info) {
546             printk("Error can't allocate device instance data\n");
547             return -ENOMEM;
548     }
549
550     memset(info, 0, sizeof(MGSLPC_INFO));
551     info->magic = MGSLPC_MAGIC;
552     INIT_WORK(&info->task, bh_handler);
553     info->max_frame_size = 4096;
554     info->close_delay = 5*HZ/10;
555     info->closing_wait = 30*HZ;
556     init_waitqueue_head(&info->open_wait);
557     init_waitqueue_head(&info->close_wait);
558     init_waitqueue_head(&info->status_event_wait_q);
559     init_waitqueue_head(&info->event_wait_q);
560     spin_lock_init(&info->lock);
561     spin_lock_init(&info->netlock);
562     memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
563     info->idle_mode = HDLC_TXIDLE_FLAGS;                
564     info->imra_value = 0xffff;
565     info->imrb_value = 0xffff;
566     info->pim_value = 0xff;
567
568     info->p_dev = link;
569     link->priv = info;
570
571     /* Initialize the struct pcmcia_device structure */
572
573     /* Interrupt setup */
574     link->irq.Attributes = IRQ_TYPE_EXCLUSIVE;
575     link->irq.IRQInfo1   = IRQ_LEVEL_ID;
576     link->irq.Handler = NULL;
577
578     link->conf.Attributes = 0;
579     link->conf.IntType = INT_MEMORY_AND_IO;
580
581     ret = mgslpc_config(link);
582     if (ret)
583             return ret;
584
585     mgslpc_add_device(info);
586
587     return 0;
588 }
589
590 /* Card has been inserted.
591  */
592
593 #define CS_CHECK(fn, ret) \
594 do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
595
596 static int mgslpc_config(struct pcmcia_device *link)
597 {
598     MGSLPC_INFO *info = link->priv;
599     tuple_t tuple;
600     cisparse_t parse;
601     int last_fn, last_ret;
602     u_char buf[64];
603     cistpl_cftable_entry_t dflt = { 0 };
604     cistpl_cftable_entry_t *cfg;
605     
606     if (debug_level >= DEBUG_LEVEL_INFO)
607             printk("mgslpc_config(0x%p)\n", link);
608
609     tuple.Attributes = 0;
610     tuple.TupleData = buf;
611     tuple.TupleDataMax = sizeof(buf);
612     tuple.TupleOffset = 0;
613
614     /* get CIS configuration entry */
615
616     tuple.DesiredTuple = CISTPL_CFTABLE_ENTRY;
617     CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(link, &tuple));
618
619     cfg = &(parse.cftable_entry);
620     CS_CHECK(GetTupleData, pcmcia_get_tuple_data(link, &tuple));
621     CS_CHECK(ParseTuple, pcmcia_parse_tuple(link, &tuple, &parse));
622
623     if (cfg->flags & CISTPL_CFTABLE_DEFAULT) dflt = *cfg;
624     if (cfg->index == 0)
625             goto cs_failed;
626
627     link->conf.ConfigIndex = cfg->index;
628     link->conf.Attributes |= CONF_ENABLE_IRQ;
629         
630     /* IO window settings */
631     link->io.NumPorts1 = 0;
632     if ((cfg->io.nwin > 0) || (dflt.io.nwin > 0)) {
633             cistpl_io_t *io = (cfg->io.nwin) ? &cfg->io : &dflt.io;
634             link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
635             if (!(io->flags & CISTPL_IO_8BIT))
636                     link->io.Attributes1 = IO_DATA_PATH_WIDTH_16;
637             if (!(io->flags & CISTPL_IO_16BIT))
638                     link->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
639             link->io.IOAddrLines = io->flags & CISTPL_IO_LINES_MASK;
640             link->io.BasePort1 = io->win[0].base;
641             link->io.NumPorts1 = io->win[0].len;
642             CS_CHECK(RequestIO, pcmcia_request_io(link, &link->io));
643     }
644
645     link->conf.Attributes = CONF_ENABLE_IRQ;
646     link->conf.IntType = INT_MEMORY_AND_IO;
647     link->conf.ConfigIndex = 8;
648     link->conf.Present = PRESENT_OPTION;
649     
650     link->irq.Attributes |= IRQ_HANDLE_PRESENT;
651     link->irq.Handler     = mgslpc_isr;
652     link->irq.Instance    = info;
653     CS_CHECK(RequestIRQ, pcmcia_request_irq(link, &link->irq));
654
655     CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link, &link->conf));
656
657     info->io_base = link->io.BasePort1;
658     info->irq_level = link->irq.AssignedIRQ;
659
660     /* add to linked list of devices */
661     sprintf(info->node.dev_name, "mgslpc0");
662     info->node.major = info->node.minor = 0;
663     link->dev_node = &info->node;
664
665     printk(KERN_INFO "%s: index 0x%02x:",
666            info->node.dev_name, link->conf.ConfigIndex);
667     if (link->conf.Attributes & CONF_ENABLE_IRQ)
668             printk(", irq %d", link->irq.AssignedIRQ);
669     if (link->io.NumPorts1)
670             printk(", io 0x%04x-0x%04x", link->io.BasePort1,
671                    link->io.BasePort1+link->io.NumPorts1-1);
672     printk("\n");
673     return 0;
674
675 cs_failed:
676     cs_error(link, last_fn, last_ret);
677     mgslpc_release((u_long)link);
678     return -ENODEV;
679 }
680
681 /* Card has been removed.
682  * Unregister device and release PCMCIA configuration.
683  * If device is open, postpone until it is closed.
684  */
685 static void mgslpc_release(u_long arg)
686 {
687         struct pcmcia_device *link = (struct pcmcia_device *)arg;
688
689         if (debug_level >= DEBUG_LEVEL_INFO)
690                 printk("mgslpc_release(0x%p)\n", link);
691
692         pcmcia_disable_device(link);
693 }
694
695 static void mgslpc_detach(struct pcmcia_device *link)
696 {
697         if (debug_level >= DEBUG_LEVEL_INFO)
698                 printk("mgslpc_detach(0x%p)\n", link);
699
700         ((MGSLPC_INFO *)link->priv)->stop = 1;
701         mgslpc_release((u_long)link);
702
703         mgslpc_remove_device((MGSLPC_INFO *)link->priv);
704 }
705
706 static int mgslpc_suspend(struct pcmcia_device *link)
707 {
708         MGSLPC_INFO *info = link->priv;
709
710         info->stop = 1;
711
712         return 0;
713 }
714
715 static int mgslpc_resume(struct pcmcia_device *link)
716 {
717         MGSLPC_INFO *info = link->priv;
718
719         info->stop = 0;
720
721         return 0;
722 }
723
724
725 static inline int mgslpc_paranoia_check(MGSLPC_INFO *info,
726                                         char *name, const char *routine)
727 {
728 #ifdef MGSLPC_PARANOIA_CHECK
729         static const char *badmagic =
730                 "Warning: bad magic number for mgsl struct (%s) in %s\n";
731         static const char *badinfo =
732                 "Warning: null mgslpc_info for (%s) in %s\n";
733
734         if (!info) {
735                 printk(badinfo, name, routine);
736                 return 1;
737         }
738         if (info->magic != MGSLPC_MAGIC) {
739                 printk(badmagic, name, routine);
740                 return 1;
741         }
742 #else
743         if (!info)
744                 return 1;
745 #endif
746         return 0;
747 }
748
749
750 #define CMD_RXFIFO      BIT7    // release current rx FIFO
751 #define CMD_RXRESET     BIT6    // receiver reset
752 #define CMD_RXFIFO_READ BIT5
753 #define CMD_START_TIMER BIT4
754 #define CMD_TXFIFO      BIT3    // release current tx FIFO
755 #define CMD_TXEOM       BIT1    // transmit end message
756 #define CMD_TXRESET     BIT0    // transmit reset
757
758 static BOOLEAN wait_command_complete(MGSLPC_INFO *info, unsigned char channel) 
759 {
760         int i = 0;
761         /* wait for command completion */ 
762         while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
763                 udelay(1);
764                 if (i++ == 1000)
765                         return FALSE;
766         }
767         return TRUE;
768 }
769
770 static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd) 
771 {
772         wait_command_complete(info, channel);
773         write_reg(info, (unsigned char) (channel + CMDR), cmd);
774 }
775
776 static void tx_pause(struct tty_struct *tty)
777 {
778         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
779         unsigned long flags;
780         
781         if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
782                 return;
783         if (debug_level >= DEBUG_LEVEL_INFO)
784                 printk("tx_pause(%s)\n",info->device_name);     
785                 
786         spin_lock_irqsave(&info->lock,flags);
787         if (info->tx_enabled)
788                 tx_stop(info);
789         spin_unlock_irqrestore(&info->lock,flags);
790 }
791
792 static void tx_release(struct tty_struct *tty)
793 {
794         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
795         unsigned long flags;
796         
797         if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
798                 return;
799         if (debug_level >= DEBUG_LEVEL_INFO)
800                 printk("tx_release(%s)\n",info->device_name);   
801                 
802         spin_lock_irqsave(&info->lock,flags);
803         if (!info->tx_enabled)
804                 tx_start(info);
805         spin_unlock_irqrestore(&info->lock,flags);
806 }
807
808 /* Return next bottom half action to perform.
809  * or 0 if nothing to do.
810  */
811 static int bh_action(MGSLPC_INFO *info)
812 {
813         unsigned long flags;
814         int rc = 0;
815         
816         spin_lock_irqsave(&info->lock,flags);
817
818         if (info->pending_bh & BH_RECEIVE) {
819                 info->pending_bh &= ~BH_RECEIVE;
820                 rc = BH_RECEIVE;
821         } else if (info->pending_bh & BH_TRANSMIT) {
822                 info->pending_bh &= ~BH_TRANSMIT;
823                 rc = BH_TRANSMIT;
824         } else if (info->pending_bh & BH_STATUS) {
825                 info->pending_bh &= ~BH_STATUS;
826                 rc = BH_STATUS;
827         }
828
829         if (!rc) {
830                 /* Mark BH routine as complete */
831                 info->bh_running   = 0;
832                 info->bh_requested = 0;
833         }
834         
835         spin_unlock_irqrestore(&info->lock,flags);
836         
837         return rc;
838 }
839
840 static void bh_handler(struct work_struct *work)
841 {
842         MGSLPC_INFO *info = container_of(work, MGSLPC_INFO, task);
843         int action;
844
845         if (!info)
846                 return;
847                 
848         if (debug_level >= DEBUG_LEVEL_BH)
849                 printk( "%s(%d):bh_handler(%s) entry\n",
850                         __FILE__,__LINE__,info->device_name);
851         
852         info->bh_running = 1;
853
854         while((action = bh_action(info)) != 0) {
855         
856                 /* Process work item */
857                 if ( debug_level >= DEBUG_LEVEL_BH )
858                         printk( "%s(%d):bh_handler() work item action=%d\n",
859                                 __FILE__,__LINE__,action);
860
861                 switch (action) {
862                 
863                 case BH_RECEIVE:
864                         while(rx_get_frame(info));
865                         break;
866                 case BH_TRANSMIT:
867                         bh_transmit(info);
868                         break;
869                 case BH_STATUS:
870                         bh_status(info);
871                         break;
872                 default:
873                         /* unknown work item ID */
874                         printk("Unknown work item ID=%08X!\n", action);
875                         break;
876                 }
877         }
878
879         if (debug_level >= DEBUG_LEVEL_BH)
880                 printk( "%s(%d):bh_handler(%s) exit\n",
881                         __FILE__,__LINE__,info->device_name);
882 }
883
884 static void bh_transmit(MGSLPC_INFO *info)
885 {
886         struct tty_struct *tty = info->tty;
887         if (debug_level >= DEBUG_LEVEL_BH)
888                 printk("bh_transmit() entry on %s\n", info->device_name);
889
890         if (tty)
891                 tty_wakeup(tty);
892 }
893
894 static void bh_status(MGSLPC_INFO *info)
895 {
896         info->ri_chkcount = 0;
897         info->dsr_chkcount = 0;
898         info->dcd_chkcount = 0;
899         info->cts_chkcount = 0;
900 }
901
902 /* eom: non-zero = end of frame */ 
903 static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
904 {
905         unsigned char data[2];
906         unsigned char fifo_count, read_count, i;
907         RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
908
909         if (debug_level >= DEBUG_LEVEL_ISR)
910                 printk("%s(%d):rx_ready_hdlc(eom=%d)\n",__FILE__,__LINE__,eom);
911         
912         if (!info->rx_enabled)
913                 return;
914
915         if (info->rx_frame_count >= info->rx_buf_count) {
916                 /* no more free buffers */
917                 issue_command(info, CHA, CMD_RXRESET);
918                 info->pending_bh |= BH_RECEIVE;
919                 info->rx_overflow = 1;
920                 info->icount.buf_overrun++;
921                 return;
922         }
923
924         if (eom) {
925                 /* end of frame, get FIFO count from RBCL register */ 
926                 if (!(fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f)))
927                         fifo_count = 32;
928         } else
929                 fifo_count = 32;
930         
931         do {
932                 if (fifo_count == 1) {
933                         read_count = 1;
934                         data[0] = read_reg(info, CHA + RXFIFO);
935                 } else {
936                         read_count = 2;
937                         *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
938                 }
939                 fifo_count -= read_count;
940                 if (!fifo_count && eom)
941                         buf->status = data[--read_count];
942
943                 for (i = 0; i < read_count; i++) {
944                         if (buf->count >= info->max_frame_size) {
945                                 /* frame too large, reset receiver and reset current buffer */
946                                 issue_command(info, CHA, CMD_RXRESET);
947                                 buf->count = 0;
948                                 return;
949                         }
950                         *(buf->data + buf->count) = data[i];
951                         buf->count++;
952                 }
953         } while (fifo_count);
954
955         if (eom) {
956                 info->pending_bh |= BH_RECEIVE;
957                 info->rx_frame_count++;
958                 info->rx_put++;
959                 if (info->rx_put >= info->rx_buf_count)
960                         info->rx_put = 0;
961         }
962         issue_command(info, CHA, CMD_RXFIFO);
963 }
964
965 static void rx_ready_async(MGSLPC_INFO *info, int tcd)
966 {
967         unsigned char data, status, flag;
968         int fifo_count;
969         int work = 0;
970         struct tty_struct *tty = info->tty;
971         struct mgsl_icount *icount = &info->icount;
972
973         if (tcd) {
974                 /* early termination, get FIFO count from RBCL register */ 
975                 fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
976
977                 /* Zero fifo count could mean 0 or 32 bytes available.
978                  * If BIT5 of STAR is set then at least 1 byte is available.
979                  */
980                 if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
981                         fifo_count = 32;
982         } else
983                 fifo_count = 32;
984
985         tty_buffer_request_room(tty, fifo_count);
986         /* Flush received async data to receive data buffer. */ 
987         while (fifo_count) {
988                 data   = read_reg(info, CHA + RXFIFO);
989                 status = read_reg(info, CHA + RXFIFO);
990                 fifo_count -= 2;
991
992                 icount->rx++;
993                 flag = TTY_NORMAL;
994
995                 // if no frameing/crc error then save data
996                 // BIT7:parity error
997                 // BIT6:framing error
998
999                 if (status & (BIT7 + BIT6)) {
1000                         if (status & BIT7) 
1001                                 icount->parity++;
1002                         else
1003                                 icount->frame++;
1004
1005                         /* discard char if tty control flags say so */
1006                         if (status & info->ignore_status_mask)
1007                                 continue;
1008                                 
1009                         status &= info->read_status_mask;
1010
1011                         if (status & BIT7)
1012                                 flag = TTY_PARITY;
1013                         else if (status & BIT6)
1014                                 flag = TTY_FRAME;
1015                 }
1016                 work += tty_insert_flip_char(tty, data, flag);
1017         }
1018         issue_command(info, CHA, CMD_RXFIFO);
1019
1020         if (debug_level >= DEBUG_LEVEL_ISR) {
1021                 printk("%s(%d):rx_ready_async",
1022                         __FILE__,__LINE__);
1023                 printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
1024                         __FILE__,__LINE__,icount->rx,icount->brk,
1025                         icount->parity,icount->frame,icount->overrun);
1026         }
1027                         
1028         if (work)
1029                 tty_flip_buffer_push(tty);
1030 }
1031
1032
1033 static void tx_done(MGSLPC_INFO *info)
1034 {
1035         if (!info->tx_active)
1036                 return;
1037                         
1038         info->tx_active = 0;
1039         info->tx_aborting = 0;
1040
1041         if (info->params.mode == MGSL_MODE_ASYNC)
1042                 return;
1043
1044         info->tx_count = info->tx_put = info->tx_get = 0;
1045         del_timer(&info->tx_timer);     
1046         
1047         if (info->drop_rts_on_tx_done) {
1048                 get_signals(info);
1049                 if (info->serial_signals & SerialSignal_RTS) {
1050                         info->serial_signals &= ~SerialSignal_RTS;
1051                         set_signals(info);
1052                 }
1053                 info->drop_rts_on_tx_done = 0;
1054         }
1055
1056 #if SYNCLINK_GENERIC_HDLC
1057         if (info->netcount)
1058                 hdlcdev_tx_done(info);
1059         else 
1060 #endif
1061         {
1062                 if (info->tty->stopped || info->tty->hw_stopped) {
1063                         tx_stop(info);
1064                         return;
1065                 }
1066                 info->pending_bh |= BH_TRANSMIT;
1067         }
1068 }
1069
1070 static void tx_ready(MGSLPC_INFO *info)
1071 {
1072         unsigned char fifo_count = 32;
1073         int c;
1074
1075         if (debug_level >= DEBUG_LEVEL_ISR)
1076                 printk("%s(%d):tx_ready(%s)\n", __FILE__,__LINE__,info->device_name);
1077
1078         if (info->params.mode == MGSL_MODE_HDLC) {
1079                 if (!info->tx_active)
1080                         return;
1081         } else {
1082                 if (info->tty->stopped || info->tty->hw_stopped) {
1083                         tx_stop(info);
1084                         return;
1085                 }
1086                 if (!info->tx_count)
1087                         info->tx_active = 0;
1088         }
1089
1090         if (!info->tx_count)
1091                 return;
1092
1093         while (info->tx_count && fifo_count) {
1094                 c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
1095                 
1096                 if (c == 1) {
1097                         write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
1098                 } else {
1099                         write_reg16(info, CHA + TXFIFO,
1100                                           *((unsigned short*)(info->tx_buf + info->tx_get)));
1101                 }
1102                 info->tx_count -= c;
1103                 info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
1104                 fifo_count -= c;
1105         }
1106
1107         if (info->params.mode == MGSL_MODE_ASYNC) {
1108                 if (info->tx_count < WAKEUP_CHARS)
1109                         info->pending_bh |= BH_TRANSMIT;
1110                 issue_command(info, CHA, CMD_TXFIFO);
1111         } else {
1112                 if (info->tx_count)
1113                         issue_command(info, CHA, CMD_TXFIFO);
1114                 else
1115                         issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
1116         }
1117 }
1118
1119 static void cts_change(MGSLPC_INFO *info)
1120 {
1121         get_signals(info);
1122         if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1123                 irq_disable(info, CHB, IRQ_CTS);
1124         info->icount.cts++;
1125         if (info->serial_signals & SerialSignal_CTS)
1126                 info->input_signal_events.cts_up++;
1127         else
1128                 info->input_signal_events.cts_down++;
1129         wake_up_interruptible(&info->status_event_wait_q);
1130         wake_up_interruptible(&info->event_wait_q);
1131
1132         if (info->flags & ASYNC_CTS_FLOW) {
1133                 if (info->tty->hw_stopped) {
1134                         if (info->serial_signals & SerialSignal_CTS) {
1135                                 if (debug_level >= DEBUG_LEVEL_ISR)
1136                                         printk("CTS tx start...");
1137                                 if (info->tty)
1138                                         info->tty->hw_stopped = 0;
1139                                 tx_start(info);
1140                                 info->pending_bh |= BH_TRANSMIT;
1141                                 return;
1142                         }
1143                 } else {
1144                         if (!(info->serial_signals & SerialSignal_CTS)) {
1145                                 if (debug_level >= DEBUG_LEVEL_ISR)
1146                                         printk("CTS tx stop...");
1147                                 if (info->tty)
1148                                         info->tty->hw_stopped = 1;
1149                                 tx_stop(info);
1150                         }
1151                 }
1152         }
1153         info->pending_bh |= BH_STATUS;
1154 }
1155
1156 static void dcd_change(MGSLPC_INFO *info)
1157 {
1158         get_signals(info);
1159         if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1160                 irq_disable(info, CHB, IRQ_DCD);
1161         info->icount.dcd++;
1162         if (info->serial_signals & SerialSignal_DCD) {
1163                 info->input_signal_events.dcd_up++;
1164         }
1165         else
1166                 info->input_signal_events.dcd_down++;
1167 #if SYNCLINK_GENERIC_HDLC
1168         if (info->netcount) {
1169                 if (info->serial_signals & SerialSignal_DCD)
1170                         netif_carrier_on(info->netdev);
1171                 else
1172                         netif_carrier_off(info->netdev);
1173         }
1174 #endif
1175         wake_up_interruptible(&info->status_event_wait_q);
1176         wake_up_interruptible(&info->event_wait_q);
1177
1178         if (info->flags & ASYNC_CHECK_CD) {
1179                 if (debug_level >= DEBUG_LEVEL_ISR)
1180                         printk("%s CD now %s...", info->device_name,
1181                                (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
1182                 if (info->serial_signals & SerialSignal_DCD)
1183                         wake_up_interruptible(&info->open_wait);
1184                 else {
1185                         if (debug_level >= DEBUG_LEVEL_ISR)
1186                                 printk("doing serial hangup...");
1187                         if (info->tty)
1188                                 tty_hangup(info->tty);
1189                 }
1190         }
1191         info->pending_bh |= BH_STATUS;
1192 }
1193
1194 static void dsr_change(MGSLPC_INFO *info)
1195 {
1196         get_signals(info);
1197         if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1198                 port_irq_disable(info, PVR_DSR);
1199         info->icount.dsr++;
1200         if (info->serial_signals & SerialSignal_DSR)
1201                 info->input_signal_events.dsr_up++;
1202         else
1203                 info->input_signal_events.dsr_down++;
1204         wake_up_interruptible(&info->status_event_wait_q);
1205         wake_up_interruptible(&info->event_wait_q);
1206         info->pending_bh |= BH_STATUS;
1207 }
1208
1209 static void ri_change(MGSLPC_INFO *info)
1210 {
1211         get_signals(info);
1212         if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1213                 port_irq_disable(info, PVR_RI);
1214         info->icount.rng++;
1215         if (info->serial_signals & SerialSignal_RI)
1216                 info->input_signal_events.ri_up++;
1217         else
1218                 info->input_signal_events.ri_down++;
1219         wake_up_interruptible(&info->status_event_wait_q);
1220         wake_up_interruptible(&info->event_wait_q);
1221         info->pending_bh |= BH_STATUS;
1222 }
1223
1224 /* Interrupt service routine entry point.
1225  *      
1226  * Arguments:
1227  * 
1228  * irq     interrupt number that caused interrupt
1229  * dev_id  device ID supplied during interrupt registration
1230  */
1231 static irqreturn_t mgslpc_isr(int irq, void *dev_id)
1232 {
1233         MGSLPC_INFO * info = (MGSLPC_INFO *)dev_id;
1234         unsigned short isr;
1235         unsigned char gis, pis;
1236         int count=0;
1237
1238         if (debug_level >= DEBUG_LEVEL_ISR)     
1239                 printk("mgslpc_isr(%d) entry.\n", irq);
1240         if (!info)
1241                 return IRQ_NONE;
1242                 
1243         if (!(info->p_dev->_locked))
1244                 return IRQ_HANDLED;
1245
1246         spin_lock(&info->lock);
1247
1248         while ((gis = read_reg(info, CHA + GIS))) {
1249                 if (debug_level >= DEBUG_LEVEL_ISR)     
1250                         printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
1251
1252                 if ((gis & 0x70) || count > 1000) {
1253                         printk("synclink_cs:hardware failed or ejected\n");
1254                         break;
1255                 }
1256                 count++;
1257
1258                 if (gis & (BIT1 + BIT0)) {
1259                         isr = read_reg16(info, CHB + ISR);
1260                         if (isr & IRQ_DCD)
1261                                 dcd_change(info);
1262                         if (isr & IRQ_CTS)
1263                                 cts_change(info);
1264                 }
1265                 if (gis & (BIT3 + BIT2))
1266                 {
1267                         isr = read_reg16(info, CHA + ISR);
1268                         if (isr & IRQ_TIMER) {
1269                                 info->irq_occurred = 1;
1270                                 irq_disable(info, CHA, IRQ_TIMER);
1271                         }
1272
1273                         /* receive IRQs */ 
1274                         if (isr & IRQ_EXITHUNT) {
1275                                 info->icount.exithunt++;
1276                                 wake_up_interruptible(&info->event_wait_q);
1277                         }
1278                         if (isr & IRQ_BREAK_ON) {
1279                                 info->icount.brk++;
1280                                 if (info->flags & ASYNC_SAK)
1281                                         do_SAK(info->tty);
1282                         }
1283                         if (isr & IRQ_RXTIME) {
1284                                 issue_command(info, CHA, CMD_RXFIFO_READ);
1285                         }
1286                         if (isr & (IRQ_RXEOM + IRQ_RXFIFO)) {
1287                                 if (info->params.mode == MGSL_MODE_HDLC)
1288                                         rx_ready_hdlc(info, isr & IRQ_RXEOM); 
1289                                 else
1290                                         rx_ready_async(info, isr & IRQ_RXEOM);
1291                         }
1292
1293                         /* transmit IRQs */ 
1294                         if (isr & IRQ_UNDERRUN) {
1295                                 if (info->tx_aborting)
1296                                         info->icount.txabort++;
1297                                 else
1298                                         info->icount.txunder++;
1299                                 tx_done(info);
1300                         }
1301                         else if (isr & IRQ_ALLSENT) {
1302                                 info->icount.txok++;
1303                                 tx_done(info);
1304                         }
1305                         else if (isr & IRQ_TXFIFO)
1306                                 tx_ready(info);
1307                 }
1308                 if (gis & BIT7) {
1309                         pis = read_reg(info, CHA + PIS);
1310                         if (pis & BIT1)
1311                                 dsr_change(info);
1312                         if (pis & BIT2)
1313                                 ri_change(info);
1314                 }
1315         }
1316         
1317         /* Request bottom half processing if there's something 
1318          * for it to do and the bh is not already running
1319          */
1320
1321         if (info->pending_bh && !info->bh_running && !info->bh_requested) {
1322                 if ( debug_level >= DEBUG_LEVEL_ISR )   
1323                         printk("%s(%d):%s queueing bh task.\n",
1324                                 __FILE__,__LINE__,info->device_name);
1325                 schedule_work(&info->task);
1326                 info->bh_requested = 1;
1327         }
1328
1329         spin_unlock(&info->lock);
1330         
1331         if (debug_level >= DEBUG_LEVEL_ISR)     
1332                 printk("%s(%d):mgslpc_isr(%d)exit.\n",
1333                        __FILE__,__LINE__,irq);
1334
1335         return IRQ_HANDLED;
1336 }
1337
1338 /* Initialize and start device.
1339  */
1340 static int startup(MGSLPC_INFO * info)
1341 {
1342         int retval = 0;
1343         
1344         if (debug_level >= DEBUG_LEVEL_INFO)
1345                 printk("%s(%d):startup(%s)\n",__FILE__,__LINE__,info->device_name);
1346                 
1347         if (info->flags & ASYNC_INITIALIZED)
1348                 return 0;
1349         
1350         if (!info->tx_buf) {
1351                 /* allocate a page of memory for a transmit buffer */
1352                 info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
1353                 if (!info->tx_buf) {
1354                         printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
1355                                 __FILE__,__LINE__,info->device_name);
1356                         return -ENOMEM;
1357                 }
1358         }
1359
1360         info->pending_bh = 0;
1361         
1362         memset(&info->icount, 0, sizeof(info->icount));
1363
1364         init_timer(&info->tx_timer);
1365         info->tx_timer.data = (unsigned long)info;
1366         info->tx_timer.function = tx_timeout;
1367
1368         /* Allocate and claim adapter resources */
1369         retval = claim_resources(info);
1370         
1371         /* perform existance check and diagnostics */
1372         if ( !retval )
1373                 retval = adapter_test(info);
1374                 
1375         if ( retval ) {
1376                 if (capable(CAP_SYS_ADMIN) && info->tty)
1377                         set_bit(TTY_IO_ERROR, &info->tty->flags);
1378                 release_resources(info);
1379                 return retval;
1380         }
1381
1382         /* program hardware for current parameters */
1383         mgslpc_change_params(info);
1384         
1385         if (info->tty)
1386                 clear_bit(TTY_IO_ERROR, &info->tty->flags);
1387
1388         info->flags |= ASYNC_INITIALIZED;
1389         
1390         return 0;
1391 }
1392
1393 /* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
1394  */
1395 static void shutdown(MGSLPC_INFO * info)
1396 {
1397         unsigned long flags;
1398         
1399         if (!(info->flags & ASYNC_INITIALIZED))
1400                 return;
1401
1402         if (debug_level >= DEBUG_LEVEL_INFO)
1403                 printk("%s(%d):mgslpc_shutdown(%s)\n",
1404                          __FILE__,__LINE__, info->device_name );
1405
1406         /* clear status wait queue because status changes */
1407         /* can't happen after shutting down the hardware */
1408         wake_up_interruptible(&info->status_event_wait_q);
1409         wake_up_interruptible(&info->event_wait_q);
1410
1411         del_timer(&info->tx_timer);     
1412
1413         if (info->tx_buf) {
1414                 free_page((unsigned long) info->tx_buf);
1415                 info->tx_buf = NULL;
1416         }
1417
1418         spin_lock_irqsave(&info->lock,flags);
1419
1420         rx_stop(info);
1421         tx_stop(info);
1422
1423         /* TODO:disable interrupts instead of reset to preserve signal states */
1424         reset_device(info);
1425         
1426         if (!info->tty || info->tty->termios->c_cflag & HUPCL) {
1427                 info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
1428                 set_signals(info);
1429         }
1430         
1431         spin_unlock_irqrestore(&info->lock,flags);
1432
1433         release_resources(info);        
1434         
1435         if (info->tty)
1436                 set_bit(TTY_IO_ERROR, &info->tty->flags);
1437
1438         info->flags &= ~ASYNC_INITIALIZED;
1439 }
1440
1441 static void mgslpc_program_hw(MGSLPC_INFO *info)
1442 {
1443         unsigned long flags;
1444
1445         spin_lock_irqsave(&info->lock,flags);
1446         
1447         rx_stop(info);
1448         tx_stop(info);
1449         info->tx_count = info->tx_put = info->tx_get = 0;
1450         
1451         if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
1452                 hdlc_mode(info);
1453         else
1454                 async_mode(info);
1455                 
1456         set_signals(info);
1457         
1458         info->dcd_chkcount = 0;
1459         info->cts_chkcount = 0;
1460         info->ri_chkcount = 0;
1461         info->dsr_chkcount = 0;
1462
1463         irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
1464         port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
1465         get_signals(info);
1466                 
1467         if (info->netcount || info->tty->termios->c_cflag & CREAD)
1468                 rx_start(info);
1469                 
1470         spin_unlock_irqrestore(&info->lock,flags);
1471 }
1472
1473 /* Reconfigure adapter based on new parameters
1474  */
1475 static void mgslpc_change_params(MGSLPC_INFO *info)
1476 {
1477         unsigned cflag;
1478         int bits_per_char;
1479
1480         if (!info->tty || !info->tty->termios)
1481                 return;
1482                 
1483         if (debug_level >= DEBUG_LEVEL_INFO)
1484                 printk("%s(%d):mgslpc_change_params(%s)\n",
1485                          __FILE__,__LINE__, info->device_name );
1486                          
1487         cflag = info->tty->termios->c_cflag;
1488
1489         /* if B0 rate (hangup) specified then negate DTR and RTS */
1490         /* otherwise assert DTR and RTS */
1491         if (cflag & CBAUD)
1492                 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
1493         else
1494                 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
1495         
1496         /* byte size and parity */
1497         
1498         switch (cflag & CSIZE) {
1499         case CS5: info->params.data_bits = 5; break;
1500         case CS6: info->params.data_bits = 6; break;
1501         case CS7: info->params.data_bits = 7; break;
1502         case CS8: info->params.data_bits = 8; break;
1503         default:  info->params.data_bits = 7; break;
1504         }
1505               
1506         if (cflag & CSTOPB)
1507                 info->params.stop_bits = 2;
1508         else
1509                 info->params.stop_bits = 1;
1510
1511         info->params.parity = ASYNC_PARITY_NONE;
1512         if (cflag & PARENB) {
1513                 if (cflag & PARODD)
1514                         info->params.parity = ASYNC_PARITY_ODD;
1515                 else
1516                         info->params.parity = ASYNC_PARITY_EVEN;
1517 #ifdef CMSPAR
1518                 if (cflag & CMSPAR)
1519                         info->params.parity = ASYNC_PARITY_SPACE;
1520 #endif
1521         }
1522
1523         /* calculate number of jiffies to transmit a full
1524          * FIFO (32 bytes) at specified data rate
1525          */
1526         bits_per_char = info->params.data_bits + 
1527                         info->params.stop_bits + 1;
1528
1529         /* if port data rate is set to 460800 or less then
1530          * allow tty settings to override, otherwise keep the
1531          * current data rate.
1532          */
1533         if (info->params.data_rate <= 460800) {
1534                 info->params.data_rate = tty_get_baud_rate(info->tty);
1535         }
1536         
1537         if ( info->params.data_rate ) {
1538                 info->timeout = (32*HZ*bits_per_char) / 
1539                                 info->params.data_rate;
1540         }
1541         info->timeout += HZ/50;         /* Add .02 seconds of slop */
1542
1543         if (cflag & CRTSCTS)
1544                 info->flags |= ASYNC_CTS_FLOW;
1545         else
1546                 info->flags &= ~ASYNC_CTS_FLOW;
1547                 
1548         if (cflag & CLOCAL)
1549                 info->flags &= ~ASYNC_CHECK_CD;
1550         else
1551                 info->flags |= ASYNC_CHECK_CD;
1552
1553         /* process tty input control flags */
1554         
1555         info->read_status_mask = 0;
1556         if (I_INPCK(info->tty))
1557                 info->read_status_mask |= BIT7 | BIT6;
1558         if (I_IGNPAR(info->tty))
1559                 info->ignore_status_mask |= BIT7 | BIT6;
1560
1561         mgslpc_program_hw(info);
1562 }
1563
1564 /* Add a character to the transmit buffer
1565  */
1566 static void mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
1567 {
1568         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1569         unsigned long flags;
1570
1571         if (debug_level >= DEBUG_LEVEL_INFO) {
1572                 printk( "%s(%d):mgslpc_put_char(%d) on %s\n",
1573                         __FILE__,__LINE__,ch,info->device_name);
1574         }
1575
1576         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
1577                 return;
1578
1579         if (!info->tx_buf)
1580                 return;
1581
1582         spin_lock_irqsave(&info->lock,flags);
1583         
1584         if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
1585                 if (info->tx_count < TXBUFSIZE - 1) {
1586                         info->tx_buf[info->tx_put++] = ch;
1587                         info->tx_put &= TXBUFSIZE-1;
1588                         info->tx_count++;
1589                 }
1590         }
1591         
1592         spin_unlock_irqrestore(&info->lock,flags);
1593 }
1594
1595 /* Enable transmitter so remaining characters in the
1596  * transmit buffer are sent.
1597  */
1598 static void mgslpc_flush_chars(struct tty_struct *tty)
1599 {
1600         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1601         unsigned long flags;
1602                                 
1603         if (debug_level >= DEBUG_LEVEL_INFO)
1604                 printk( "%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
1605                         __FILE__,__LINE__,info->device_name,info->tx_count);
1606         
1607         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
1608                 return;
1609
1610         if (info->tx_count <= 0 || tty->stopped ||
1611             tty->hw_stopped || !info->tx_buf)
1612                 return;
1613
1614         if (debug_level >= DEBUG_LEVEL_INFO)
1615                 printk( "%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
1616                         __FILE__,__LINE__,info->device_name);
1617
1618         spin_lock_irqsave(&info->lock,flags);
1619         if (!info->tx_active)
1620                 tx_start(info);
1621         spin_unlock_irqrestore(&info->lock,flags);
1622 }
1623
1624 /* Send a block of data
1625  *      
1626  * Arguments:
1627  * 
1628  * tty        pointer to tty information structure
1629  * buf        pointer to buffer containing send data
1630  * count      size of send data in bytes
1631  *      
1632  * Returns: number of characters written
1633  */
1634 static int mgslpc_write(struct tty_struct * tty,
1635                         const unsigned char *buf, int count)
1636 {
1637         int c, ret = 0;
1638         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1639         unsigned long flags;
1640         
1641         if (debug_level >= DEBUG_LEVEL_INFO)
1642                 printk( "%s(%d):mgslpc_write(%s) count=%d\n",
1643                         __FILE__,__LINE__,info->device_name,count);
1644         
1645         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
1646                 !info->tx_buf)
1647                 goto cleanup;
1648
1649         if (info->params.mode == MGSL_MODE_HDLC) {
1650                 if (count > TXBUFSIZE) {
1651                         ret = -EIO;
1652                         goto cleanup;
1653                 }
1654                 if (info->tx_active)
1655                         goto cleanup;
1656                 else if (info->tx_count)
1657                         goto start;
1658         }
1659
1660         for (;;) {
1661                 c = min(count,
1662                         min(TXBUFSIZE - info->tx_count - 1,
1663                             TXBUFSIZE - info->tx_put));
1664                 if (c <= 0)
1665                         break;
1666                         
1667                 memcpy(info->tx_buf + info->tx_put, buf, c);
1668
1669                 spin_lock_irqsave(&info->lock,flags);
1670                 info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
1671                 info->tx_count += c;
1672                 spin_unlock_irqrestore(&info->lock,flags);
1673
1674                 buf += c;
1675                 count -= c;
1676                 ret += c;
1677         }
1678 start:
1679         if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
1680                 spin_lock_irqsave(&info->lock,flags);
1681                 if (!info->tx_active)
1682                         tx_start(info);
1683                 spin_unlock_irqrestore(&info->lock,flags);
1684         }
1685 cleanup:        
1686         if (debug_level >= DEBUG_LEVEL_INFO)
1687                 printk( "%s(%d):mgslpc_write(%s) returning=%d\n",
1688                         __FILE__,__LINE__,info->device_name,ret);
1689         return ret;
1690 }
1691
1692 /* Return the count of free bytes in transmit buffer
1693  */
1694 static int mgslpc_write_room(struct tty_struct *tty)
1695 {
1696         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1697         int ret;
1698                                 
1699         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
1700                 return 0;
1701
1702         if (info->params.mode == MGSL_MODE_HDLC) {
1703                 /* HDLC (frame oriented) mode */
1704                 if (info->tx_active)
1705                         return 0;
1706                 else
1707                         return HDLC_MAX_FRAME_SIZE;
1708         } else {
1709                 ret = TXBUFSIZE - info->tx_count - 1;
1710                 if (ret < 0)
1711                         ret = 0;
1712         }
1713         
1714         if (debug_level >= DEBUG_LEVEL_INFO)
1715                 printk("%s(%d):mgslpc_write_room(%s)=%d\n",
1716                          __FILE__,__LINE__, info->device_name, ret);
1717         return ret;
1718 }
1719
1720 /* Return the count of bytes in transmit buffer
1721  */
1722 static int mgslpc_chars_in_buffer(struct tty_struct *tty)
1723 {
1724         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1725         int rc;
1726                  
1727         if (debug_level >= DEBUG_LEVEL_INFO)
1728                 printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
1729                          __FILE__,__LINE__, info->device_name );
1730                          
1731         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
1732                 return 0;
1733                 
1734         if (info->params.mode == MGSL_MODE_HDLC)
1735                 rc = info->tx_active ? info->max_frame_size : 0;
1736         else
1737                 rc = info->tx_count;
1738
1739         if (debug_level >= DEBUG_LEVEL_INFO)
1740                 printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
1741                          __FILE__,__LINE__, info->device_name, rc);
1742                          
1743         return rc;
1744 }
1745
1746 /* Discard all data in the send buffer
1747  */
1748 static void mgslpc_flush_buffer(struct tty_struct *tty)
1749 {
1750         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1751         unsigned long flags;
1752         
1753         if (debug_level >= DEBUG_LEVEL_INFO)
1754                 printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
1755                          __FILE__,__LINE__, info->device_name );
1756         
1757         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
1758                 return;
1759                 
1760         spin_lock_irqsave(&info->lock,flags); 
1761         info->tx_count = info->tx_put = info->tx_get = 0;
1762         del_timer(&info->tx_timer);     
1763         spin_unlock_irqrestore(&info->lock,flags);
1764
1765         wake_up_interruptible(&tty->write_wait);
1766         tty_wakeup(tty);
1767 }
1768
1769 /* Send a high-priority XON/XOFF character
1770  */
1771 static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
1772 {
1773         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1774         unsigned long flags;
1775
1776         if (debug_level >= DEBUG_LEVEL_INFO)
1777                 printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
1778                          __FILE__,__LINE__, info->device_name, ch );
1779                          
1780         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
1781                 return;
1782
1783         info->x_char = ch;
1784         if (ch) {
1785                 spin_lock_irqsave(&info->lock,flags);
1786                 if (!info->tx_enabled)
1787                         tx_start(info);
1788                 spin_unlock_irqrestore(&info->lock,flags);
1789         }
1790 }
1791
1792 /* Signal remote device to throttle send data (our receive data)
1793  */
1794 static void mgslpc_throttle(struct tty_struct * tty)
1795 {
1796         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1797         unsigned long flags;
1798         
1799         if (debug_level >= DEBUG_LEVEL_INFO)
1800                 printk("%s(%d):mgslpc_throttle(%s) entry\n",
1801                          __FILE__,__LINE__, info->device_name );
1802
1803         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
1804                 return;
1805         
1806         if (I_IXOFF(tty))
1807                 mgslpc_send_xchar(tty, STOP_CHAR(tty));
1808  
1809         if (tty->termios->c_cflag & CRTSCTS) {
1810                 spin_lock_irqsave(&info->lock,flags);
1811                 info->serial_signals &= ~SerialSignal_RTS;
1812                 set_signals(info);
1813                 spin_unlock_irqrestore(&info->lock,flags);
1814         }
1815 }
1816
1817 /* Signal remote device to stop throttling send data (our receive data)
1818  */
1819 static void mgslpc_unthrottle(struct tty_struct * tty)
1820 {
1821         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1822         unsigned long flags;
1823         
1824         if (debug_level >= DEBUG_LEVEL_INFO)
1825                 printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
1826                          __FILE__,__LINE__, info->device_name );
1827
1828         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
1829                 return;
1830         
1831         if (I_IXOFF(tty)) {
1832                 if (info->x_char)
1833                         info->x_char = 0;
1834                 else
1835                         mgslpc_send_xchar(tty, START_CHAR(tty));
1836         }
1837         
1838         if (tty->termios->c_cflag & CRTSCTS) {
1839                 spin_lock_irqsave(&info->lock,flags);
1840                 info->serial_signals |= SerialSignal_RTS;
1841                 set_signals(info);
1842                 spin_unlock_irqrestore(&info->lock,flags);
1843         }
1844 }
1845
1846 /* get the current serial statistics
1847  */
1848 static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
1849 {
1850         int err;
1851         if (debug_level >= DEBUG_LEVEL_INFO)
1852                 printk("get_params(%s)\n", info->device_name);
1853         if (!user_icount) {
1854                 memset(&info->icount, 0, sizeof(info->icount));
1855         } else {
1856                 COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
1857                 if (err)
1858                         return -EFAULT;
1859         }
1860         return 0;
1861 }
1862
1863 /* get the current serial parameters
1864  */
1865 static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
1866 {
1867         int err;
1868         if (debug_level >= DEBUG_LEVEL_INFO)
1869                 printk("get_params(%s)\n", info->device_name);
1870         COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
1871         if (err)
1872                 return -EFAULT;
1873         return 0;
1874 }
1875
1876 /* set the serial parameters
1877  *      
1878  * Arguments:
1879  * 
1880  *      info            pointer to device instance data
1881  *      new_params      user buffer containing new serial params
1882  *
1883  * Returns:     0 if success, otherwise error code
1884  */
1885 static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params)
1886 {
1887         unsigned long flags;
1888         MGSL_PARAMS tmp_params;
1889         int err;
1890  
1891         if (debug_level >= DEBUG_LEVEL_INFO)
1892                 printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
1893                         info->device_name );
1894         COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
1895         if (err) {
1896                 if ( debug_level >= DEBUG_LEVEL_INFO )
1897                         printk( "%s(%d):set_params(%s) user buffer copy failed\n",
1898                                 __FILE__,__LINE__,info->device_name);
1899                 return -EFAULT;
1900         }
1901         
1902         spin_lock_irqsave(&info->lock,flags);
1903         memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
1904         spin_unlock_irqrestore(&info->lock,flags);
1905         
1906         mgslpc_change_params(info);
1907         
1908         return 0;
1909 }
1910
1911 static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
1912 {
1913         int err;
1914         if (debug_level >= DEBUG_LEVEL_INFO)
1915                 printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
1916         COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
1917         if (err)
1918                 return -EFAULT;
1919         return 0;
1920 }
1921
1922 static int set_txidle(MGSLPC_INFO * info, int idle_mode)
1923 {
1924         unsigned long flags;
1925         if (debug_level >= DEBUG_LEVEL_INFO)
1926                 printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
1927         spin_lock_irqsave(&info->lock,flags);
1928         info->idle_mode = idle_mode;
1929         tx_set_idle(info);
1930         spin_unlock_irqrestore(&info->lock,flags);
1931         return 0;
1932 }
1933
1934 static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
1935 {
1936         int err;
1937         if (debug_level >= DEBUG_LEVEL_INFO)
1938                 printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
1939         COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
1940         if (err)
1941                 return -EFAULT;
1942         return 0;
1943 }
1944
1945 static int set_interface(MGSLPC_INFO * info, int if_mode)
1946 {
1947         unsigned long flags;
1948         unsigned char val;
1949         if (debug_level >= DEBUG_LEVEL_INFO)
1950                 printk("set_interface(%s,%d)\n", info->device_name, if_mode);
1951         spin_lock_irqsave(&info->lock,flags);
1952         info->if_mode = if_mode;
1953
1954         val = read_reg(info, PVR) & 0x0f;
1955         switch (info->if_mode)
1956         {
1957         case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
1958         case MGSL_INTERFACE_V35:   val |= PVR_V35;   break;
1959         case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
1960         }
1961         write_reg(info, PVR, val);
1962
1963         spin_unlock_irqrestore(&info->lock,flags);
1964         return 0;
1965 }
1966
1967 static int set_txenable(MGSLPC_INFO * info, int enable)
1968 {
1969         unsigned long flags;
1970  
1971         if (debug_level >= DEBUG_LEVEL_INFO)
1972                 printk("set_txenable(%s,%d)\n", info->device_name, enable);
1973                         
1974         spin_lock_irqsave(&info->lock,flags);
1975         if (enable) {
1976                 if (!info->tx_enabled)
1977                         tx_start(info);
1978         } else {
1979                 if (info->tx_enabled)
1980                         tx_stop(info);
1981         }
1982         spin_unlock_irqrestore(&info->lock,flags);
1983         return 0;
1984 }
1985
1986 static int tx_abort(MGSLPC_INFO * info)
1987 {
1988         unsigned long flags;
1989  
1990         if (debug_level >= DEBUG_LEVEL_INFO)
1991                 printk("tx_abort(%s)\n", info->device_name);
1992                         
1993         spin_lock_irqsave(&info->lock,flags);
1994         if (info->tx_active && info->tx_count &&
1995             info->params.mode == MGSL_MODE_HDLC) {
1996                 /* clear data count so FIFO is not filled on next IRQ.
1997                  * This results in underrun and abort transmission.
1998                  */
1999                 info->tx_count = info->tx_put = info->tx_get = 0;
2000                 info->tx_aborting = TRUE;
2001         }
2002         spin_unlock_irqrestore(&info->lock,flags);
2003         return 0;
2004 }
2005
2006 static int set_rxenable(MGSLPC_INFO * info, int enable)
2007 {
2008         unsigned long flags;
2009  
2010         if (debug_level >= DEBUG_LEVEL_INFO)
2011                 printk("set_rxenable(%s,%d)\n", info->device_name, enable);
2012                         
2013         spin_lock_irqsave(&info->lock,flags);
2014         if (enable) {
2015                 if (!info->rx_enabled)
2016                         rx_start(info);
2017         } else {
2018                 if (info->rx_enabled)
2019                         rx_stop(info);
2020         }
2021         spin_unlock_irqrestore(&info->lock,flags);
2022         return 0;
2023 }
2024
2025 /* wait for specified event to occur
2026  *      
2027  * Arguments:           info    pointer to device instance data
2028  *                      mask    pointer to bitmask of events to wait for
2029  * Return Value:        0       if successful and bit mask updated with
2030  *                              of events triggerred,
2031  *                      otherwise error code
2032  */
2033 static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
2034 {
2035         unsigned long flags;
2036         int s;
2037         int rc=0;
2038         struct mgsl_icount cprev, cnow;
2039         int events;
2040         int mask;
2041         struct  _input_signal_events oldsigs, newsigs;
2042         DECLARE_WAITQUEUE(wait, current);
2043
2044         COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
2045         if (rc)
2046                 return  -EFAULT;
2047                  
2048         if (debug_level >= DEBUG_LEVEL_INFO)
2049                 printk("wait_events(%s,%d)\n", info->device_name, mask);
2050
2051         spin_lock_irqsave(&info->lock,flags);
2052
2053         /* return immediately if state matches requested events */
2054         get_signals(info);
2055         s = info->serial_signals;
2056         events = mask &
2057                 ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
2058                   ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
2059                   ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
2060                   ((s & SerialSignal_RI)  ? MgslEvent_RiActive :MgslEvent_RiInactive) );
2061         if (events) {
2062                 spin_unlock_irqrestore(&info->lock,flags);
2063                 goto exit;
2064         }
2065
2066         /* save current irq counts */
2067         cprev = info->icount;
2068         oldsigs = info->input_signal_events;
2069         
2070         if ((info->params.mode == MGSL_MODE_HDLC) &&
2071             (mask & MgslEvent_ExitHuntMode))
2072                 irq_enable(info, CHA, IRQ_EXITHUNT);
2073         
2074         set_current_state(TASK_INTERRUPTIBLE);
2075         add_wait_queue(&info->event_wait_q, &wait);
2076         
2077         spin_unlock_irqrestore(&info->lock,flags);
2078         
2079         
2080         for(;;) {
2081                 schedule();
2082                 if (signal_pending(current)) {
2083                         rc = -ERESTARTSYS;
2084                         break;
2085                 }
2086                         
2087                 /* get current irq counts */
2088                 spin_lock_irqsave(&info->lock,flags);
2089                 cnow = info->icount;
2090                 newsigs = info->input_signal_events;
2091                 set_current_state(TASK_INTERRUPTIBLE);
2092                 spin_unlock_irqrestore(&info->lock,flags);
2093
2094                 /* if no change, wait aborted for some reason */
2095                 if (newsigs.dsr_up   == oldsigs.dsr_up   &&
2096                     newsigs.dsr_down == oldsigs.dsr_down &&
2097                     newsigs.dcd_up   == oldsigs.dcd_up   &&
2098                     newsigs.dcd_down == oldsigs.dcd_down &&
2099                     newsigs.cts_up   == oldsigs.cts_up   &&
2100                     newsigs.cts_down == oldsigs.cts_down &&
2101                     newsigs.ri_up    == oldsigs.ri_up    &&
2102                     newsigs.ri_down  == oldsigs.ri_down  &&
2103                     cnow.exithunt    == cprev.exithunt   &&
2104                     cnow.rxidle      == cprev.rxidle) {
2105                         rc = -EIO;
2106                         break;
2107                 }
2108
2109                 events = mask &
2110                         ( (newsigs.dsr_up   != oldsigs.dsr_up   ? MgslEvent_DsrActive:0)   +
2111                           (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
2112                           (newsigs.dcd_up   != oldsigs.dcd_up   ? MgslEvent_DcdActive:0)   +
2113                           (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
2114                           (newsigs.cts_up   != oldsigs.cts_up   ? MgslEvent_CtsActive:0)   +
2115                           (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
2116                           (newsigs.ri_up    != oldsigs.ri_up    ? MgslEvent_RiActive:0)    +
2117                           (newsigs.ri_down  != oldsigs.ri_down  ? MgslEvent_RiInactive:0)  +
2118                           (cnow.exithunt    != cprev.exithunt   ? MgslEvent_ExitHuntMode:0) +
2119                           (cnow.rxidle      != cprev.rxidle     ? MgslEvent_IdleReceived:0) );
2120                 if (events)
2121                         break;
2122                 
2123                 cprev = cnow;
2124                 oldsigs = newsigs;
2125         }
2126         
2127         remove_wait_queue(&info->event_wait_q, &wait);
2128         set_current_state(TASK_RUNNING);
2129
2130         if (mask & MgslEvent_ExitHuntMode) {
2131                 spin_lock_irqsave(&info->lock,flags);
2132                 if (!waitqueue_active(&info->event_wait_q))
2133                         irq_disable(info, CHA, IRQ_EXITHUNT);
2134                 spin_unlock_irqrestore(&info->lock,flags);
2135         }
2136 exit:
2137         if (rc == 0)
2138                 PUT_USER(rc, events, mask_ptr);
2139         return rc;
2140 }
2141
2142 static int modem_input_wait(MGSLPC_INFO *info,int arg)
2143 {
2144         unsigned long flags;
2145         int rc;
2146         struct mgsl_icount cprev, cnow;
2147         DECLARE_WAITQUEUE(wait, current);
2148
2149         /* save current irq counts */
2150         spin_lock_irqsave(&info->lock,flags);
2151         cprev = info->icount;
2152         add_wait_queue(&info->status_event_wait_q, &wait);
2153         set_current_state(TASK_INTERRUPTIBLE);
2154         spin_unlock_irqrestore(&info->lock,flags);
2155
2156         for(;;) {
2157                 schedule();
2158                 if (signal_pending(current)) {
2159                         rc = -ERESTARTSYS;
2160                         break;
2161                 }
2162
2163                 /* get new irq counts */
2164                 spin_lock_irqsave(&info->lock,flags);
2165                 cnow = info->icount;
2166                 set_current_state(TASK_INTERRUPTIBLE);
2167                 spin_unlock_irqrestore(&info->lock,flags);
2168
2169                 /* if no change, wait aborted for some reason */
2170                 if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
2171                     cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
2172                         rc = -EIO;
2173                         break;
2174                 }
2175
2176                 /* check for change in caller specified modem input */
2177                 if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
2178                     (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
2179                     (arg & TIOCM_CD  && cnow.dcd != cprev.dcd) ||
2180                     (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
2181                         rc = 0;
2182                         break;
2183                 }
2184
2185                 cprev = cnow;
2186         }
2187         remove_wait_queue(&info->status_event_wait_q, &wait);
2188         set_current_state(TASK_RUNNING);
2189         return rc;
2190 }
2191
2192 /* return the state of the serial control and status signals
2193  */
2194 static int tiocmget(struct tty_struct *tty, struct file *file)
2195 {
2196         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2197         unsigned int result;
2198         unsigned long flags;
2199
2200         spin_lock_irqsave(&info->lock,flags);
2201         get_signals(info);
2202         spin_unlock_irqrestore(&info->lock,flags);
2203
2204         result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
2205                 ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
2206                 ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
2207                 ((info->serial_signals & SerialSignal_RI)  ? TIOCM_RNG:0) +
2208                 ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
2209                 ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
2210
2211         if (debug_level >= DEBUG_LEVEL_INFO)
2212                 printk("%s(%d):%s tiocmget() value=%08X\n",
2213                          __FILE__,__LINE__, info->device_name, result );
2214         return result;
2215 }
2216
2217 /* set modem control signals (DTR/RTS)
2218  */
2219 static int tiocmset(struct tty_struct *tty, struct file *file,
2220                     unsigned int set, unsigned int clear)
2221 {
2222         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2223         unsigned long flags;
2224
2225         if (debug_level >= DEBUG_LEVEL_INFO)
2226                 printk("%s(%d):%s tiocmset(%x,%x)\n",
2227                         __FILE__,__LINE__,info->device_name, set, clear);
2228
2229         if (set & TIOCM_RTS)
2230                 info->serial_signals |= SerialSignal_RTS;
2231         if (set & TIOCM_DTR)
2232                 info->serial_signals |= SerialSignal_DTR;
2233         if (clear & TIOCM_RTS)
2234                 info->serial_signals &= ~SerialSignal_RTS;
2235         if (clear & TIOCM_DTR)
2236                 info->serial_signals &= ~SerialSignal_DTR;
2237
2238         spin_lock_irqsave(&info->lock,flags);
2239         set_signals(info);
2240         spin_unlock_irqrestore(&info->lock,flags);
2241
2242         return 0;
2243 }
2244
2245 /* Set or clear transmit break condition
2246  *
2247  * Arguments:           tty             pointer to tty instance data
2248  *                      break_state     -1=set break condition, 0=clear
2249  */
2250 static void mgslpc_break(struct tty_struct *tty, int break_state)
2251 {
2252         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2253         unsigned long flags;
2254         
2255         if (debug_level >= DEBUG_LEVEL_INFO)
2256                 printk("%s(%d):mgslpc_break(%s,%d)\n",
2257                          __FILE__,__LINE__, info->device_name, break_state);
2258                          
2259         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
2260                 return;
2261
2262         spin_lock_irqsave(&info->lock,flags);
2263         if (break_state == -1)
2264                 set_reg_bits(info, CHA+DAFO, BIT6);
2265         else 
2266                 clear_reg_bits(info, CHA+DAFO, BIT6);
2267         spin_unlock_irqrestore(&info->lock,flags);
2268 }
2269
2270 /* Service an IOCTL request
2271  *      
2272  * Arguments:
2273  * 
2274  *      tty     pointer to tty instance data
2275  *      file    pointer to associated file object for device
2276  *      cmd     IOCTL command code
2277  *      arg     command argument/context
2278  *      
2279  * Return Value:        0 if success, otherwise error code
2280  */
2281 static int mgslpc_ioctl(struct tty_struct *tty, struct file * file,
2282                         unsigned int cmd, unsigned long arg)
2283 {
2284         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2285         
2286         if (debug_level >= DEBUG_LEVEL_INFO)
2287                 printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__,
2288                         info->device_name, cmd );
2289         
2290         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
2291                 return -ENODEV;
2292
2293         if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
2294             (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
2295                 if (tty->flags & (1 << TTY_IO_ERROR))
2296                     return -EIO;
2297         }
2298
2299         return ioctl_common(info, cmd, arg);
2300 }
2301
2302 static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg)
2303 {
2304         int error;
2305         struct mgsl_icount cnow;        /* kernel counter temps */
2306         struct serial_icounter_struct __user *p_cuser;  /* user space */
2307         void __user *argp = (void __user *)arg;
2308         unsigned long flags;
2309         
2310         switch (cmd) {
2311         case MGSL_IOCGPARAMS:
2312                 return get_params(info, argp);
2313         case MGSL_IOCSPARAMS:
2314                 return set_params(info, argp);
2315         case MGSL_IOCGTXIDLE:
2316                 return get_txidle(info, argp);
2317         case MGSL_IOCSTXIDLE:
2318                 return set_txidle(info, (int)arg);
2319         case MGSL_IOCGIF:
2320                 return get_interface(info, argp);
2321         case MGSL_IOCSIF:
2322                 return set_interface(info,(int)arg);
2323         case MGSL_IOCTXENABLE:
2324                 return set_txenable(info,(int)arg);
2325         case MGSL_IOCRXENABLE:
2326                 return set_rxenable(info,(int)arg);
2327         case MGSL_IOCTXABORT:
2328                 return tx_abort(info);
2329         case MGSL_IOCGSTATS:
2330                 return get_stats(info, argp);
2331         case MGSL_IOCWAITEVENT:
2332                 return wait_events(info, argp);
2333         case TIOCMIWAIT:
2334                 return modem_input_wait(info,(int)arg);
2335         case TIOCGICOUNT:
2336                 spin_lock_irqsave(&info->lock,flags);
2337                 cnow = info->icount;
2338                 spin_unlock_irqrestore(&info->lock,flags);
2339                 p_cuser = argp;
2340                 PUT_USER(error,cnow.cts, &p_cuser->cts);
2341                 if (error) return error;
2342                 PUT_USER(error,cnow.dsr, &p_cuser->dsr);
2343                 if (error) return error;
2344                 PUT_USER(error,cnow.rng, &p_cuser->rng);
2345                 if (error) return error;
2346                 PUT_USER(error,cnow.dcd, &p_cuser->dcd);
2347                 if (error) return error;
2348                 PUT_USER(error,cnow.rx, &p_cuser->rx);
2349                 if (error) return error;
2350                 PUT_USER(error,cnow.tx, &p_cuser->tx);
2351                 if (error) return error;
2352                 PUT_USER(error,cnow.frame, &p_cuser->frame);
2353                 if (error) return error;
2354                 PUT_USER(error,cnow.overrun, &p_cuser->overrun);
2355                 if (error) return error;
2356                 PUT_USER(error,cnow.parity, &p_cuser->parity);
2357                 if (error) return error;
2358                 PUT_USER(error,cnow.brk, &p_cuser->brk);
2359                 if (error) return error;
2360                 PUT_USER(error,cnow.buf_overrun, &p_cuser->buf_overrun);
2361                 if (error) return error;
2362                 return 0;
2363         default:
2364                 return -ENOIOCTLCMD;
2365         }
2366         return 0;
2367 }
2368
2369 /* Set new termios settings
2370  *      
2371  * Arguments:
2372  * 
2373  *      tty             pointer to tty structure
2374  *      termios         pointer to buffer to hold returned old termios
2375  */
2376 static void mgslpc_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
2377 {
2378         MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2379         unsigned long flags;
2380         
2381         if (debug_level >= DEBUG_LEVEL_INFO)
2382                 printk("%s(%d):mgslpc_set_termios %s\n", __FILE__,__LINE__,
2383                         tty->driver->name );
2384         
2385         /* just return if nothing has changed */
2386         if ((tty->termios->c_cflag == old_termios->c_cflag)
2387             && (RELEVANT_IFLAG(tty->termios->c_iflag) 
2388                 == RELEVANT_IFLAG(old_termios->c_iflag)))
2389           return;
2390
2391         mgslpc_change_params(info);
2392
2393         /* Handle transition to B0 status */
2394         if (old_termios->c_cflag & CBAUD &&
2395             !(tty->termios->c_cflag & CBAUD)) {
2396                 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
2397                 spin_lock_irqsave(&info->lock,flags);
2398                 set_signals(info);
2399                 spin_unlock_irqrestore(&info->lock,flags);
2400         }
2401         
2402         /* Handle transition away from B0 status */
2403         if (!(old_termios->c_cflag & CBAUD) &&
2404             tty->termios->c_cflag & CBAUD) {
2405                 info->serial_signals |= SerialSignal_DTR;
2406                 if (!(tty->termios->c_cflag & CRTSCTS) || 
2407                     !test_bit(TTY_THROTTLED, &tty->flags)) {
2408                         info->serial_signals |= SerialSignal_RTS;
2409                 }
2410                 spin_lock_irqsave(&info->lock,flags);
2411                 set_signals(info);
2412                 spin_unlock_irqrestore(&info->lock,flags);
2413         }
2414         
2415         /* Handle turning off CRTSCTS */
2416         if (old_termios->c_cflag & CRTSCTS &&
2417             !(tty->termios->c_cflag & CRTSCTS)) {
2418                 tty->hw_stopped = 0;
2419                 tx_release(tty);
2420         }
2421 }
2422
2423 static void mgslpc_close(struct tty_struct *tty, struct file * filp)
2424 {
2425         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2426
2427         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
2428                 return;
2429         
2430         if (debug_level >= DEBUG_LEVEL_INFO)
2431                 printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
2432                          __FILE__,__LINE__, info->device_name, info->count);
2433                          
2434         if (!info->count)
2435                 return;
2436
2437         if (tty_hung_up_p(filp))
2438                 goto cleanup;
2439                         
2440         if ((tty->count == 1) && (info->count != 1)) {
2441                 /*
2442                  * tty->count is 1 and the tty structure will be freed.
2443                  * info->count should be one in this case.
2444                  * if it's not, correct it so that the port is shutdown.
2445                  */
2446                 printk("mgslpc_close: bad refcount; tty->count is 1, "
2447                        "info->count is %d\n", info->count);
2448                 info->count = 1;
2449         }
2450         
2451         info->count--;
2452         
2453         /* if at least one open remaining, leave hardware active */
2454         if (info->count)
2455                 goto cleanup;
2456         
2457         info->flags |= ASYNC_CLOSING;
2458         
2459         /* set tty->closing to notify line discipline to 
2460          * only process XON/XOFF characters. Only the N_TTY
2461          * discipline appears to use this (ppp does not).
2462          */
2463         tty->closing = 1;
2464         
2465         /* wait for transmit data to clear all layers */
2466         
2467         if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE) {
2468                 if (debug_level >= DEBUG_LEVEL_INFO)
2469                         printk("%s(%d):mgslpc_close(%s) calling tty_wait_until_sent\n",
2470                                  __FILE__,__LINE__, info->device_name );
2471                 tty_wait_until_sent(tty, info->closing_wait);
2472         }
2473                 
2474         if (info->flags & ASYNC_INITIALIZED)
2475                 mgslpc_wait_until_sent(tty, info->timeout);
2476
2477         if (tty->driver->flush_buffer)
2478                 tty->driver->flush_buffer(tty);
2479
2480         ldisc_flush_buffer(tty);
2481                 
2482         shutdown(info);
2483         
2484         tty->closing = 0;
2485         info->tty = NULL;
2486         
2487         if (info->blocked_open) {
2488                 if (info->close_delay) {
2489                         msleep_interruptible(jiffies_to_msecs(info->close_delay));
2490                 }
2491                 wake_up_interruptible(&info->open_wait);
2492         }
2493         
2494         info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
2495                          
2496         wake_up_interruptible(&info->close_wait);
2497         
2498 cleanup:                        
2499         if (debug_level >= DEBUG_LEVEL_INFO)
2500                 printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__,__LINE__,
2501                         tty->driver->name, info->count);
2502 }
2503
2504 /* Wait until the transmitter is empty.
2505  */
2506 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
2507 {
2508         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2509         unsigned long orig_jiffies, char_time;
2510
2511         if (!info )
2512                 return;
2513
2514         if (debug_level >= DEBUG_LEVEL_INFO)
2515                 printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
2516                          __FILE__,__LINE__, info->device_name );
2517       
2518         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
2519                 return;
2520
2521         if (!(info->flags & ASYNC_INITIALIZED))
2522                 goto exit;
2523          
2524         orig_jiffies = jiffies;
2525       
2526         /* Set check interval to 1/5 of estimated time to
2527          * send a character, and make it at least 1. The check
2528          * interval should also be less than the timeout.
2529          * Note: use tight timings here to satisfy the NIST-PCTS.
2530          */ 
2531        
2532         if ( info->params.data_rate ) {
2533                 char_time = info->timeout/(32 * 5);
2534                 if (!char_time)
2535                         char_time++;
2536         } else
2537                 char_time = 1;
2538                 
2539         if (timeout)
2540                 char_time = min_t(unsigned long, char_time, timeout);
2541                 
2542         if (info->params.mode == MGSL_MODE_HDLC) {
2543                 while (info->tx_active) {
2544                         msleep_interruptible(jiffies_to_msecs(char_time));
2545                         if (signal_pending(current))
2546                                 break;
2547                         if (timeout && time_after(jiffies, orig_jiffies + timeout))
2548                                 break;
2549                 }
2550         } else {
2551                 while ((info->tx_count || info->tx_active) &&
2552                         info->tx_enabled) {
2553                         msleep_interruptible(jiffies_to_msecs(char_time));
2554                         if (signal_pending(current))
2555                                 break;
2556                         if (timeout && time_after(jiffies, orig_jiffies + timeout))
2557                                 break;
2558                 }
2559         }
2560       
2561 exit:
2562         if (debug_level >= DEBUG_LEVEL_INFO)
2563                 printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
2564                          __FILE__,__LINE__, info->device_name );
2565 }
2566
2567 /* Called by tty_hangup() when a hangup is signaled.
2568  * This is the same as closing all open files for the port.
2569  */
2570 static void mgslpc_hangup(struct tty_struct *tty)
2571 {
2572         MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2573         
2574         if (debug_level >= DEBUG_LEVEL_INFO)
2575                 printk("%s(%d):mgslpc_hangup(%s)\n",
2576                          __FILE__,__LINE__, info->device_name );
2577                          
2578         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
2579                 return;
2580
2581         mgslpc_flush_buffer(tty);
2582         shutdown(info);
2583         
2584         info->count = 0;        
2585         info->flags &= ~ASYNC_NORMAL_ACTIVE;
2586         info->tty = NULL;
2587
2588         wake_up_interruptible(&info->open_wait);
2589 }
2590
2591 /* Block the current process until the specified port
2592  * is ready to be opened.
2593  */
2594 static int block_til_ready(struct tty_struct *tty, struct file *filp,
2595                            MGSLPC_INFO *info)
2596 {
2597         DECLARE_WAITQUEUE(wait, current);
2598         int             retval;
2599         int             do_clocal = 0, extra_count = 0;
2600         unsigned long   flags;
2601         
2602         if (debug_level >= DEBUG_LEVEL_INFO)
2603                 printk("%s(%d):block_til_ready on %s\n",
2604                          __FILE__,__LINE__, tty->driver->name );
2605
2606         if (filp->f_flags & O_NONBLOCK || tty->flags & (1 << TTY_IO_ERROR)){
2607                 /* nonblock mode is set or port is not enabled */
2608                 /* just verify that callout device is not active */
2609                 info->flags |= ASYNC_NORMAL_ACTIVE;
2610                 return 0;
2611         }
2612
2613         if (tty->termios->c_cflag & CLOCAL)
2614                 do_clocal = 1;
2615
2616         /* Wait for carrier detect and the line to become
2617          * free (i.e., not in use by the callout).  While we are in
2618          * this loop, info->count is dropped by one, so that
2619          * mgslpc_close() knows when to free things.  We restore it upon
2620          * exit, either normal or abnormal.
2621          */
2622          
2623         retval = 0;
2624         add_wait_queue(&info->open_wait, &wait);
2625         
2626         if (debug_level >= DEBUG_LEVEL_INFO)
2627                 printk("%s(%d):block_til_ready before block on %s count=%d\n",
2628                          __FILE__,__LINE__, tty->driver->name, info->count );
2629
2630         spin_lock_irqsave(&info->lock, flags);
2631         if (!tty_hung_up_p(filp)) {
2632                 extra_count = 1;
2633                 info->count--;
2634         }
2635         spin_unlock_irqrestore(&info->lock, flags);
2636         info->blocked_open++;
2637         
2638         while (1) {
2639                 if ((tty->termios->c_cflag & CBAUD)) {
2640                         spin_lock_irqsave(&info->lock,flags);
2641                         info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
2642                         set_signals(info);
2643                         spin_unlock_irqrestore(&info->lock,flags);
2644                 }
2645                 
2646                 set_current_state(TASK_INTERRUPTIBLE);
2647                 
2648                 if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)){
2649                         retval = (info->flags & ASYNC_HUP_NOTIFY) ?
2650                                         -EAGAIN : -ERESTARTSYS;
2651                         break;
2652                 }
2653                 
2654                 spin_lock_irqsave(&info->lock,flags);
2655                 get_signals(info);
2656                 spin_unlock_irqrestore(&info->lock,flags);
2657                 
2658                 if (!(info->flags & ASYNC_CLOSING) &&
2659                     (do_clocal || (info->serial_signals & SerialSignal_DCD)) ) {
2660                         break;
2661                 }
2662                         
2663                 if (signal_pending(current)) {
2664                         retval = -ERESTARTSYS;
2665                         break;
2666                 }
2667                 
2668                 if (debug_level >= DEBUG_LEVEL_INFO)
2669                         printk("%s(%d):block_til_ready blocking on %s count=%d\n",
2670                                  __FILE__,__LINE__, tty->driver->name, info->count );
2671                                  
2672                 schedule();
2673         }
2674         
2675         set_current_state(TASK_RUNNING);
2676         remove_wait_queue(&info->open_wait, &wait);
2677         
2678         if (extra_count)
2679                 info->count++;
2680         info->blocked_open--;
2681         
2682         if (debug_level >= DEBUG_LEVEL_INFO)
2683                 printk("%s(%d):block_til_ready after blocking on %s count=%d\n",
2684                          __FILE__,__LINE__, tty->driver->name, info->count );
2685                          
2686         if (!retval)
2687                 info->flags |= ASYNC_NORMAL_ACTIVE;
2688                 
2689         return retval;
2690 }
2691
2692 static int mgslpc_open(struct tty_struct *tty, struct file * filp)
2693 {
2694         MGSLPC_INFO     *info;
2695         int                     retval, line;
2696         unsigned long flags;
2697
2698         /* verify range of specified line number */     
2699         line = tty->index;
2700         if ((line < 0) || (line >= mgslpc_device_count)) {
2701                 printk("%s(%d):mgslpc_open with invalid line #%d.\n",
2702                         __FILE__,__LINE__,line);
2703                 return -ENODEV;
2704         }
2705
2706         /* find the info structure for the specified line */
2707         info = mgslpc_device_list;
2708         while(info && info->line != line)
2709                 info = info->next_device;
2710         if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
2711                 return -ENODEV;
2712         
2713         tty->driver_data = info;
2714         info->tty = tty;
2715                 
2716         if (debug_level >= DEBUG_LEVEL_INFO)
2717                 printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
2718                          __FILE__,__LINE__,tty->driver->name, info->count);
2719
2720         /* If port is closing, signal caller to try again */
2721         if (tty_hung_up_p(filp) || info->flags & ASYNC_CLOSING){
2722                 if (info->flags & ASYNC_CLOSING)
2723                         interruptible_sleep_on(&info->close_wait);
2724                 retval = ((info->flags & ASYNC_HUP_NOTIFY) ?
2725                         -EAGAIN : -ERESTARTSYS);
2726                 goto cleanup;
2727         }
2728         
2729         info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
2730
2731         spin_lock_irqsave(&info->netlock, flags);
2732         if (info->netcount) {
2733                 retval = -EBUSY;
2734                 spin_unlock_irqrestore(&info->netlock, flags);
2735                 goto cleanup;
2736         }
2737         info->count++;
2738         spin_unlock_irqrestore(&info->netlock, flags);
2739
2740         if (info->count == 1) {
2741                 /* 1st open on this device, init hardware */
2742                 retval = startup(info);
2743                 if (retval < 0)
2744                         goto cleanup;
2745         }
2746
2747         retval = block_til_ready(tty, filp, info);
2748         if (retval) {
2749                 if (debug_level >= DEBUG_LEVEL_INFO)
2750                         printk("%s(%d):block_til_ready(%s) returned %d\n",
2751                                  __FILE__,__LINE__, info->device_name, retval);
2752                 goto cleanup;
2753         }
2754
2755         if (debug_level >= DEBUG_LEVEL_INFO)
2756                 printk("%s(%d):mgslpc_open(%s) success\n",
2757                          __FILE__,__LINE__, info->device_name);
2758         retval = 0;
2759         
2760 cleanup:                        
2761         if (retval) {
2762                 if (tty->count == 1)
2763                         info->tty = NULL; /* tty layer will release tty struct */
2764                 if(info->count)
2765                         info->count--;
2766         }
2767         
2768         return retval;
2769 }
2770
2771 /*
2772  * /proc fs routines....
2773  */
2774
2775 static inline int line_info(char *buf, MGSLPC_INFO *info)
2776 {
2777         char    stat_buf[30];
2778         int     ret;
2779         unsigned long flags;
2780
2781         ret = sprintf(buf, "%s:io:%04X irq:%d",
2782                       info->device_name, info->io_base, info->irq_level);
2783
2784         /* output current serial signal states */
2785         spin_lock_irqsave(&info->lock,flags);
2786         get_signals(info);
2787         spin_unlock_irqrestore(&info->lock,flags);
2788         
2789         stat_buf[0] = 0;
2790         stat_buf[1] = 0;
2791         if (info->serial_signals & SerialSignal_RTS)
2792                 strcat(stat_buf, "|RTS");
2793         if (info->serial_signals & SerialSignal_CTS)
2794                 strcat(stat_buf, "|CTS");
2795         if (info->serial_signals & SerialSignal_DTR)
2796                 strcat(stat_buf, "|DTR");
2797         if (info->serial_signals & SerialSignal_DSR)
2798                 strcat(stat_buf, "|DSR");
2799         if (info->serial_signals & SerialSignal_DCD)
2800                 strcat(stat_buf, "|CD");
2801         if (info->serial_signals & SerialSignal_RI)
2802                 strcat(stat_buf, "|RI");
2803
2804         if (info->params.mode == MGSL_MODE_HDLC) {
2805                 ret += sprintf(buf+ret, " HDLC txok:%d rxok:%d",
2806                               info->icount.txok, info->icount.rxok);
2807                 if (info->icount.txunder)
2808                         ret += sprintf(buf+ret, " txunder:%d", info->icount.txunder);
2809                 if (info->icount.txabort)
2810                         ret += sprintf(buf+ret, " txabort:%d", info->icount.txabort);
2811                 if (info->icount.rxshort)
2812                         ret += sprintf(buf+ret, " rxshort:%d", info->icount.rxshort);   
2813                 if (info->icount.rxlong)
2814                         ret += sprintf(buf+ret, " rxlong:%d", info->icount.rxlong);
2815                 if (info->icount.rxover)
2816                         ret += sprintf(buf+ret, " rxover:%d", info->icount.rxover);
2817                 if (info->icount.rxcrc)
2818                         ret += sprintf(buf+ret, " rxcrc:%d", info->icount.rxcrc);
2819         } else {
2820                 ret += sprintf(buf+ret, " ASYNC tx:%d rx:%d",
2821                               info->icount.tx, info->icount.rx);
2822                 if (info->icount.frame)
2823                         ret += sprintf(buf+ret, " fe:%d", info->icount.frame);
2824                 if (info->icount.parity)
2825                         ret += sprintf(buf+ret, " pe:%d", info->icount.parity);
2826                 if (info->icount.brk)
2827                         ret += sprintf(buf+ret, " brk:%d", info->icount.brk);   
2828                 if (info->icount.overrun)
2829                         ret += sprintf(buf+ret, " oe:%d", info->icount.overrun);
2830         }
2831         
2832         /* Append serial signal status to end */
2833         ret += sprintf(buf+ret, " %s\n", stat_buf+1);
2834         
2835         ret += sprintf(buf+ret, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
2836                        info->tx_active,info->bh_requested,info->bh_running,
2837                        info->pending_bh);
2838         
2839         return ret;
2840 }
2841
2842 /* Called to print information about devices
2843  */
2844 static int mgslpc_read_proc(char *page, char **start, off_t off, int count,
2845                  int *eof, void *data)
2846 {
2847         int len = 0, l;
2848         off_t   begin = 0;
2849         MGSLPC_INFO *info;
2850         
2851         len += sprintf(page, "synclink driver:%s\n", driver_version);
2852         
2853         info = mgslpc_device_list;
2854         while( info ) {
2855                 l = line_info(page + len, info);
2856                 len += l;
2857                 if (len+begin > off+count)
2858                         goto done;
2859                 if (len+begin < off) {
2860                         begin += len;
2861                         len = 0;
2862                 }
2863                 info = info->next_device;
2864         }
2865
2866         *eof = 1;
2867 done:
2868         if (off >= len+begin)
2869                 return 0;
2870         *start = page + (off-begin);
2871         return ((count < begin+len-off) ? count : begin+len-off);
2872 }
2873
2874 static int rx_alloc_buffers(MGSLPC_INFO *info)
2875 {
2876         /* each buffer has header and data */
2877         info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
2878
2879         /* calculate total allocation size for 8 buffers */
2880         info->rx_buf_total_size = info->rx_buf_size * 8;
2881
2882         /* limit total allocated memory */
2883         if (info->rx_buf_total_size > 0x10000)
2884                 info->rx_buf_total_size = 0x10000;
2885
2886         /* calculate number of buffers */
2887         info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
2888
2889         info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
2890         if (info->rx_buf == NULL)
2891                 return -ENOMEM;
2892
2893         rx_reset_buffers(info);
2894         return 0;
2895 }
2896
2897 static void rx_free_buffers(MGSLPC_INFO *info)
2898 {
2899         kfree(info->rx_buf);
2900         info->rx_buf = NULL;
2901 }
2902
2903 static int claim_resources(MGSLPC_INFO *info)
2904 {
2905         if (rx_alloc_buffers(info) < 0 ) {
2906                 printk( "Cant allocate rx buffer %s\n", info->device_name);
2907                 release_resources(info);
2908                 return -ENODEV;
2909         }       
2910         return 0;
2911 }
2912
2913 static void release_resources(MGSLPC_INFO *info)
2914 {
2915         if (debug_level >= DEBUG_LEVEL_INFO)
2916                 printk("release_resources(%s)\n", info->device_name);
2917         rx_free_buffers(info);
2918 }
2919
2920 /* Add the specified device instance data structure to the
2921  * global linked list of devices and increment the device count.
2922  *      
2923  * Arguments:           info    pointer to device instance data
2924  */
2925 static void mgslpc_add_device(MGSLPC_INFO *info)
2926 {
2927         info->next_device = NULL;
2928         info->line = mgslpc_device_count;
2929         sprintf(info->device_name,"ttySLP%d",info->line);
2930         
2931         if (info->line < MAX_DEVICE_COUNT) {
2932                 if (maxframe[info->line])
2933                         info->max_frame_size = maxframe[info->line];
2934                 info->dosyncppp = dosyncppp[info->line];
2935         }
2936
2937         mgslpc_device_count++;
2938         
2939         if (!mgslpc_device_list)
2940                 mgslpc_device_list = info;
2941         else {  
2942                 MGSLPC_INFO *current_dev = mgslpc_device_list;
2943                 while( current_dev->next_device )
2944                         current_dev = current_dev->next_device;
2945                 current_dev->next_device = info;
2946         }
2947         
2948         if (info->max_frame_size < 4096)
2949                 info->max_frame_size = 4096;
2950         else if (info->max_frame_size > 65535)
2951                 info->max_frame_size = 65535;
2952         
2953         printk( "SyncLink PC Card %s:IO=%04X IRQ=%d\n",
2954                 info->device_name, info->io_base, info->irq_level);
2955
2956 #if SYNCLINK_GENERIC_HDLC
2957         hdlcdev_init(info);
2958 #endif
2959 }
2960
2961 static void mgslpc_remove_device(MGSLPC_INFO *remove_info)
2962 {
2963         MGSLPC_INFO *info = mgslpc_device_list;
2964         MGSLPC_INFO *last = NULL;
2965
2966         while(info) {
2967                 if (info == remove_info) {
2968                         if (last)
2969                                 last->next_device = info->next_device;
2970                         else
2971                                 mgslpc_device_list = info->next_device;
2972 #if SYNCLINK_GENERIC_HDLC
2973                         hdlcdev_exit(info);
2974 #endif
2975                         release_resources(info);
2976                         kfree(info);
2977                         mgslpc_device_count--;
2978                         return;
2979                 }
2980                 last = info;
2981                 info = info->next_device;
2982         }
2983 }
2984
2985 static struct pcmcia_device_id mgslpc_ids[] = {
2986         PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
2987         PCMCIA_DEVICE_NULL
2988 };
2989 MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
2990
2991 static struct pcmcia_driver mgslpc_driver = {
2992         .owner          = THIS_MODULE,
2993         .drv            = {
2994                 .name   = "synclink_cs",
2995         },
2996         .probe          = mgslpc_probe,
2997         .remove         = mgslpc_detach,
2998         .id_table       = mgslpc_ids,
2999         .suspend        = mgslpc_suspend,
3000         .resume         = mgslpc_resume,
3001 };
3002
3003 static const struct tty_operations mgslpc_ops = {
3004         .open = mgslpc_open,
3005         .close = mgslpc_close,
3006         .write = mgslpc_write,
3007         .put_char = mgslpc_put_char,
3008         .flush_chars = mgslpc_flush_chars,
3009         .write_room = mgslpc_write_room,
3010         .chars_in_buffer = mgslpc_chars_in_buffer,
3011         .flush_buffer = mgslpc_flush_buffer,
3012         .ioctl = mgslpc_ioctl,
3013         .throttle = mgslpc_throttle,
3014         .unthrottle = mgslpc_unthrottle,
3015         .send_xchar = mgslpc_send_xchar,
3016         .break_ctl = mgslpc_break,
3017         .wait_until_sent = mgslpc_wait_until_sent,
3018         .read_proc = mgslpc_read_proc,
3019         .set_termios = mgslpc_set_termios,
3020         .stop = tx_pause,
3021         .start = tx_release,
3022         .hangup = mgslpc_hangup,
3023         .tiocmget = tiocmget,
3024         .tiocmset = tiocmset,
3025 };
3026
3027 static void synclink_cs_cleanup(void)
3028 {
3029         int rc;
3030
3031         printk("Unloading %s: version %s\n", driver_name, driver_version);
3032
3033         while(mgslpc_device_list)
3034                 mgslpc_remove_device(mgslpc_device_list);
3035
3036         if (serial_driver) {
3037                 if ((rc = tty_unregister_driver(serial_driver)))
3038                         printk("%s(%d) failed to unregister tty driver err=%d\n",
3039                                __FILE__,__LINE__,rc);
3040                 put_tty_driver(serial_driver);
3041         }
3042
3043         pcmcia_unregister_driver(&mgslpc_driver);
3044 }
3045
3046 static int __init synclink_cs_init(void)
3047 {
3048     int rc;
3049
3050     if (break_on_load) {
3051             mgslpc_get_text_ptr();
3052             BREAKPOINT();
3053     }
3054
3055     printk("%s %s\n", driver_name, driver_version);
3056
3057     if ((rc = pcmcia_register_driver(&mgslpc_driver)) < 0)
3058             return rc;
3059
3060     serial_driver = alloc_tty_driver(MAX_DEVICE_COUNT);
3061     if (!serial_driver) {
3062             rc = -ENOMEM;
3063             goto error;
3064     }
3065
3066     /* Initialize the tty_driver structure */
3067         
3068     serial_driver->owner = THIS_MODULE;
3069     serial_driver->driver_name = "synclink_cs";
3070     serial_driver->name = "ttySLP";
3071     serial_driver->major = ttymajor;
3072     serial_driver->minor_start = 64;
3073     serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
3074     serial_driver->subtype = SERIAL_TYPE_NORMAL;
3075     serial_driver->init_termios = tty_std_termios;
3076     serial_driver->init_termios.c_cflag =
3077             B9600 | CS8 | CREAD | HUPCL | CLOCAL;
3078     serial_driver->flags = TTY_DRIVER_REAL_RAW;
3079     tty_set_operations(serial_driver, &mgslpc_ops);
3080
3081     if ((rc = tty_register_driver(serial_driver)) < 0) {
3082             printk("%s(%d):Couldn't register serial driver\n",
3083                    __FILE__,__LINE__);
3084             put_tty_driver(serial_driver);
3085             serial_driver = NULL;
3086             goto error;
3087     }
3088                         
3089     printk("%s %s, tty major#%d\n",
3090            driver_name, driver_version,
3091            serial_driver->major);
3092         
3093     return 0;
3094
3095 error:
3096     synclink_cs_cleanup();
3097     return rc;
3098 }
3099
3100 static void __exit synclink_cs_exit(void) 
3101 {
3102         synclink_cs_cleanup();
3103 }
3104
3105 module_init(synclink_cs_init);
3106 module_exit(synclink_cs_exit);
3107
3108 static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
3109 {
3110         unsigned int M, N;
3111         unsigned char val;
3112
3113         /* note:standard BRG mode is broken in V3.2 chip 
3114          * so enhanced mode is always used 
3115          */
3116
3117         if (rate) {
3118                 N = 3686400 / rate;
3119                 if (!N)
3120                         N = 1;
3121                 N >>= 1;
3122                 for (M = 1; N > 64 && M < 16; M++)
3123                         N >>= 1;
3124                 N--;
3125
3126                 /* BGR[5..0] = N
3127                  * BGR[9..6] = M
3128                  * BGR[7..0] contained in BGR register
3129                  * BGR[9..8] contained in CCR2[7..6]
3130                  * divisor = (N+1)*2^M
3131                  *
3132                  * Note: M *must* not be zero (causes asymetric duty cycle)
3133                  */ 
3134                 write_reg(info, (unsigned char) (channel + BGR),
3135                                   (unsigned char) ((M << 6) + N));
3136                 val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
3137                 val |= ((M << 4) & 0xc0);
3138                 write_reg(info, (unsigned char) (channel + CCR2), val);
3139         }
3140 }
3141
3142 /* Enabled the AUX clock output at the specified frequency.
3143  */
3144 static void enable_auxclk(MGSLPC_INFO *info)
3145 {
3146         unsigned char val;
3147         
3148         /* MODE
3149          *
3150          * 07..06  MDS[1..0] 10 = transparent HDLC mode
3151          * 05      ADM Address Mode, 0 = no addr recognition
3152          * 04      TMD Timer Mode, 0 = external
3153          * 03      RAC Receiver Active, 0 = inactive
3154          * 02      RTS 0=RTS active during xmit, 1=RTS always active
3155          * 01      TRS Timer Resolution, 1=512
3156          * 00      TLP Test Loop, 0 = no loop
3157          *
3158          * 1000 0010
3159          */ 
3160         val = 0x82;
3161         
3162         /* channel B RTS is used to enable AUXCLK driver on SP505 */ 
3163         if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3164                 val |= BIT2;
3165         write_reg(info, CHB + MODE, val);
3166         
3167         /* CCR0
3168          *
3169          * 07      PU Power Up, 1=active, 0=power down
3170          * 06      MCE Master Clock Enable, 1=enabled
3171          * 05      Reserved, 0
3172          * 04..02  SC[2..0] Encoding
3173          * 01..00  SM[1..0] Serial Mode, 00=HDLC
3174          *
3175          * 11000000
3176          */ 
3177         write_reg(info, CHB + CCR0, 0xc0);
3178         
3179         /* CCR1
3180          *
3181          * 07      SFLG Shared Flag, 0 = disable shared flags
3182          * 06      GALP Go Active On Loop, 0 = not used
3183          * 05      GLP Go On Loop, 0 = not used
3184          * 04      ODS Output Driver Select, 1=TxD is push-pull output
3185          * 03      ITF Interframe Time Fill, 0=mark, 1=flag
3186          * 02..00  CM[2..0] Clock Mode
3187          *
3188          * 0001 0111
3189          */ 
3190         write_reg(info, CHB + CCR1, 0x17);
3191         
3192         /* CCR2 (Channel B)
3193          *
3194          * 07..06  BGR[9..8] Baud rate bits 9..8
3195          * 05      BDF Baud rate divisor factor, 0=1, 1=BGR value
3196          * 04      SSEL Clock source select, 1=submode b
3197          * 03      TOE 0=TxCLK is input, 1=TxCLK is output
3198          * 02      RWX Read/Write Exchange 0=disabled
3199          * 01      C32, CRC select, 0=CRC-16, 1=CRC-32
3200          * 00      DIV, data inversion 0=disabled, 1=enabled
3201          *
3202          * 0011 1000
3203          */ 
3204         if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3205                 write_reg(info, CHB + CCR2, 0x38);
3206         else
3207                 write_reg(info, CHB + CCR2, 0x30);
3208         
3209         /* CCR4
3210          *
3211          * 07      MCK4 Master Clock Divide by 4, 1=enabled
3212          * 06      EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3213          * 05      TST1 Test Pin, 0=normal operation
3214          * 04      ICD Ivert Carrier Detect, 1=enabled (active low)
3215          * 03..02  Reserved, must be 0
3216          * 01..00  RFT[1..0] RxFIFO Threshold 00=32 bytes
3217          *
3218          * 0101 0000
3219          */ 
3220         write_reg(info, CHB + CCR4, 0x50);
3221         
3222         /* if auxclk not enabled, set internal BRG so
3223          * CTS transitions can be detected (requires TxC)
3224          */ 
3225         if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3226                 mgslpc_set_rate(info, CHB, info->params.clock_speed);
3227         else
3228                 mgslpc_set_rate(info, CHB, 921600);
3229 }
3230
3231 static void loopback_enable(MGSLPC_INFO *info) 
3232 {
3233         unsigned char val;
3234         
3235         /* CCR1:02..00  CM[2..0] Clock Mode = 111 (clock mode 7) */ 
3236         val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
3237         write_reg(info, CHA + CCR1, val);
3238         
3239         /* CCR2:04 SSEL Clock source select, 1=submode b */ 
3240         val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5);
3241         write_reg(info, CHA + CCR2, val);
3242         
3243         /* set LinkSpeed if available, otherwise default to 2Mbps */ 
3244         if (info->params.clock_speed)
3245                 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3246         else
3247                 mgslpc_set_rate(info, CHA, 1843200);
3248         
3249         /* MODE:00 TLP Test Loop, 1=loopback enabled */ 
3250         val = read_reg(info, CHA + MODE) | BIT0;
3251         write_reg(info, CHA + MODE, val);
3252 }
3253
3254 static void hdlc_mode(MGSLPC_INFO *info)
3255 {
3256         unsigned char val;
3257         unsigned char clkmode, clksubmode;
3258
3259         /* disable all interrupts */ 
3260         irq_disable(info, CHA, 0xffff);
3261         irq_disable(info, CHB, 0xffff);
3262         port_irq_disable(info, 0xff);
3263         
3264         /* assume clock mode 0a, rcv=RxC xmt=TxC */ 
3265         clkmode = clksubmode = 0;
3266         if (info->params.flags & HDLC_FLAG_RXC_DPLL
3267             && info->params.flags & HDLC_FLAG_TXC_DPLL) {
3268                 /* clock mode 7a, rcv = DPLL, xmt = DPLL */ 
3269                 clkmode = 7;
3270         } else if (info->params.flags & HDLC_FLAG_RXC_BRG
3271                  && info->params.flags & HDLC_FLAG_TXC_BRG) {
3272                 /* clock mode 7b, rcv = BRG, xmt = BRG */ 
3273                 clkmode = 7;
3274                 clksubmode = 1;
3275         } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
3276                 if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3277                         /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */ 
3278                         clkmode = 6;
3279                         clksubmode = 1;
3280                 } else {
3281                         /* clock mode 6a, rcv = DPLL, xmt = TxC */ 
3282                         clkmode = 6;
3283                 }
3284         } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3285                 /* clock mode 0b, rcv = RxC, xmt = BRG */ 
3286                 clksubmode = 1;
3287         }
3288         
3289         /* MODE
3290          *
3291          * 07..06  MDS[1..0] 10 = transparent HDLC mode
3292          * 05      ADM Address Mode, 0 = no addr recognition
3293          * 04      TMD Timer Mode, 0 = external
3294          * 03      RAC Receiver Active, 0 = inactive
3295          * 02      RTS 0=RTS active during xmit, 1=RTS always active
3296          * 01      TRS Timer Resolution, 1=512
3297          * 00      TLP Test Loop, 0 = no loop
3298          *
3299          * 1000 0010
3300          */ 
3301         val = 0x82;
3302         if (info->params.loopback)
3303                 val |= BIT0;
3304         
3305         /* preserve RTS state */ 
3306         if (info->serial_signals & SerialSignal_RTS)
3307                 val |= BIT2;
3308         write_reg(info, CHA + MODE, val);
3309         
3310         /* CCR0
3311          *
3312          * 07      PU Power Up, 1=active, 0=power down
3313          * 06      MCE Master Clock Enable, 1=enabled
3314          * 05      Reserved, 0
3315          * 04..02  SC[2..0] Encoding
3316          * 01..00  SM[1..0] Serial Mode, 00=HDLC
3317          *
3318          * 11000000
3319          */ 
3320         val = 0xc0;
3321         switch (info->params.encoding)
3322         {
3323         case HDLC_ENCODING_NRZI:
3324                 val |= BIT3;
3325                 break;
3326         case HDLC_ENCODING_BIPHASE_SPACE:
3327                 val |= BIT4;
3328                 break;          // FM0
3329         case HDLC_ENCODING_BIPHASE_MARK:
3330                 val |= BIT4 + BIT2;
3331                 break;          // FM1
3332         case HDLC_ENCODING_BIPHASE_LEVEL:
3333                 val |= BIT4 + BIT3;
3334                 break;          // Manchester
3335         }
3336         write_reg(info, CHA + CCR0, val);
3337         
3338         /* CCR1
3339          *
3340          * 07      SFLG Shared Flag, 0 = disable shared flags
3341          * 06      GALP Go Active On Loop, 0 = not used
3342          * 05      GLP Go On Loop, 0 = not used
3343          * 04      ODS Output Driver Select, 1=TxD is push-pull output
3344          * 03      ITF Interframe Time Fill, 0=mark, 1=flag
3345          * 02..00  CM[2..0] Clock Mode
3346          *
3347          * 0001 0000
3348          */ 
3349         val = 0x10 + clkmode;
3350         write_reg(info, CHA + CCR1, val);
3351         
3352         /* CCR2
3353          *
3354          * 07..06  BGR[9..8] Baud rate bits 9..8
3355          * 05      BDF Baud rate divisor factor, 0=1, 1=BGR value
3356          * 04      SSEL Clock source select, 1=submode b
3357          * 03      TOE 0=TxCLK is input, 0=TxCLK is input
3358          * 02      RWX Read/Write Exchange 0=disabled
3359          * 01      C32, CRC select, 0=CRC-16, 1=CRC-32
3360          * 00      DIV, data inversion 0=disabled, 1=enabled
3361          *
3362          * 0000 0000
3363          */ 
3364         val = 0x00;
3365         if (clkmode == 2 || clkmode == 3 || clkmode == 6
3366             || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
3367                 val |= BIT5;
3368         if (clksubmode)
3369                 val |= BIT4;
3370         if (info->params.crc_type == HDLC_CRC_32_CCITT)
3371                 val |= BIT1;
3372         if (info->params.encoding == HDLC_ENCODING_NRZB)
3373                 val |= BIT0;
3374         write_reg(info, CHA + CCR2, val);
3375         
3376         /* CCR3
3377          *
3378          * 07..06  PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
3379          * 05      EPT Enable preamble transmission, 1=enabled
3380          * 04      RADD Receive address pushed to FIFO, 0=disabled
3381          * 03      CRL CRC Reset Level, 0=FFFF
3382          * 02      RCRC Rx CRC 0=On 1=Off
3383          * 01      TCRC Tx CRC 0=On 1=Off
3384          * 00      PSD DPLL Phase Shift Disable
3385          *
3386          * 0000 0000
3387          */ 
3388         val = 0x00;
3389         if (info->params.crc_type == HDLC_CRC_NONE)
3390                 val |= BIT2 + BIT1;
3391         if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
3392                 val |= BIT5;
3393         switch (info->params.preamble_length)
3394         {
3395         case HDLC_PREAMBLE_LENGTH_16BITS:
3396                 val |= BIT6;
3397                 break;
3398         case HDLC_PREAMBLE_LENGTH_32BITS:
3399                 val |= BIT6;
3400                 break;
3401         case HDLC_PREAMBLE_LENGTH_64BITS:
3402                 val |= BIT7 + BIT6;
3403                 break;
3404         }
3405         write_reg(info, CHA + CCR3, val);
3406         
3407         /* PRE - Preamble pattern */ 
3408         val = 0;
3409         switch (info->params.preamble)
3410         {
3411         case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
3412         case HDLC_PREAMBLE_PATTERN_10:    val = 0xaa; break;
3413         case HDLC_PREAMBLE_PATTERN_01:    val = 0x55; break;
3414         case HDLC_PREAMBLE_PATTERN_ONES:  val = 0xff; break;
3415         }
3416         write_reg(info, CHA + PRE, val);
3417         
3418         /* CCR4
3419          *
3420          * 07      MCK4 Master Clock Divide by 4, 1=enabled
3421          * 06      EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3422          * 05      TST1 Test Pin, 0=normal operation
3423          * 04      ICD Ivert Carrier Detect, 1=enabled (active low)
3424          * 03..02  Reserved, must be 0
3425          * 01..00  RFT[1..0] RxFIFO Threshold 00=32 bytes
3426          *
3427          * 0101 0000
3428          */ 
3429         val = 0x50;
3430         write_reg(info, CHA + CCR4, val);
3431         if (info->params.flags & HDLC_FLAG_RXC_DPLL)
3432                 mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
3433         else
3434                 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3435         
3436         /* RLCR Receive length check register
3437          *
3438          * 7     1=enable receive length check
3439          * 6..0  Max frame length = (RL + 1) * 32
3440          */ 
3441         write_reg(info, CHA + RLCR, 0);
3442         
3443         /* XBCH Transmit Byte Count High
3444          *
3445          * 07      DMA mode, 0 = interrupt driven
3446          * 06      NRM, 0=ABM (ignored)
3447          * 05      CAS Carrier Auto Start
3448          * 04      XC Transmit Continuously (ignored)
3449          * 03..00  XBC[10..8] Transmit byte count bits 10..8
3450          *
3451          * 0000 0000
3452          */ 
3453         val = 0x00;
3454         if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3455                 val |= BIT5;
3456         write_reg(info, CHA + XBCH, val);
3457         enable_auxclk(info);
3458         if (info->params.loopback || info->testing_irq)
3459                 loopback_enable(info);
3460         if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3461         {
3462                 irq_enable(info, CHB, IRQ_CTS);
3463                 /* PVR[3] 1=AUTO CTS active */ 
3464                 set_reg_bits(info, CHA + PVR, BIT3);
3465         } else
3466                 clear_reg_bits(info, CHA + PVR, BIT3);
3467
3468         irq_enable(info, CHA,
3469                          IRQ_RXEOM + IRQ_RXFIFO + IRQ_ALLSENT +
3470                          IRQ_UNDERRUN + IRQ_TXFIFO);
3471         issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3472         wait_command_complete(info, CHA);
3473         read_reg16(info, CHA + ISR);    /* clear pending IRQs */
3474         
3475         /* Master clock mode enabled above to allow reset commands
3476          * to complete even if no data clocks are present.
3477          *
3478          * Disable master clock mode for normal communications because
3479          * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
3480          * IRQ when in master clock mode.
3481          *
3482          * Leave master clock mode enabled for IRQ test because the
3483          * timer IRQ used by the test can only happen in master clock mode.
3484          */ 
3485         if (!info->testing_irq)
3486                 clear_reg_bits(info, CHA + CCR0, BIT6);
3487
3488         tx_set_idle(info);
3489
3490         tx_stop(info);
3491         rx_stop(info);
3492 }
3493
3494 static void rx_stop(MGSLPC_INFO *info)
3495 {
3496         if (debug_level >= DEBUG_LEVEL_ISR)
3497                 printk("%s(%d):rx_stop(%s)\n",
3498                          __FILE__,__LINE__, info->device_name );
3499                          
3500         /* MODE:03 RAC Receiver Active, 0=inactive */ 
3501         clear_reg_bits(info, CHA + MODE, BIT3);
3502
3503         info->rx_enabled = 0;
3504         info->rx_overflow = 0;
3505 }
3506
3507 static void rx_start(MGSLPC_INFO *info)
3508 {
3509         if (debug_level >= DEBUG_LEVEL_ISR)
3510                 printk("%s(%d):rx_start(%s)\n",
3511                          __FILE__,__LINE__, info->device_name );
3512
3513         rx_reset_buffers(info);
3514         info->rx_enabled = 0;
3515         info->rx_overflow = 0;
3516
3517         /* MODE:03 RAC Receiver Active, 1=active */ 
3518         set_reg_bits(info, CHA + MODE, BIT3);
3519
3520         info->rx_enabled = 1;
3521 }
3522
3523 static void tx_start(MGSLPC_INFO *info)
3524 {
3525         if (debug_level >= DEBUG_LEVEL_ISR)
3526                 printk("%s(%d):tx_start(%s)\n",
3527                          __FILE__,__LINE__, info->device_name );
3528                          
3529         if (info->tx_count) {
3530                 /* If auto RTS enabled and RTS is inactive, then assert */
3531                 /* RTS and set a flag indicating that the driver should */
3532                 /* negate RTS when the transmission completes. */
3533                 info->drop_rts_on_tx_done = 0;
3534
3535                 if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
3536                         get_signals(info);
3537                         if (!(info->serial_signals & SerialSignal_RTS)) {
3538                                 info->serial_signals |= SerialSignal_RTS;
3539                                 set_signals(info);
3540                                 info->drop_rts_on_tx_done = 1;
3541                         }
3542                 }
3543
3544                 if (info->params.mode == MGSL_MODE_ASYNC) {
3545                         if (!info->tx_active) {
3546                                 info->tx_active = 1;
3547                                 tx_ready(info);
3548                         }
3549                 } else {
3550                         info->tx_active = 1;
3551                         tx_ready(info);
3552                         info->tx_timer.expires = jiffies + msecs_to_jiffies(5000);
3553                         add_timer(&info->tx_timer);     
3554                 }
3555         }
3556
3557         if (!info->tx_enabled)
3558                 info->tx_enabled = 1;
3559 }
3560
3561 static void tx_stop(MGSLPC_INFO *info)
3562 {
3563         if (debug_level >= DEBUG_LEVEL_ISR)
3564                 printk("%s(%d):tx_stop(%s)\n",
3565                          __FILE__,__LINE__, info->device_name );
3566                          
3567         del_timer(&info->tx_timer);     
3568
3569         info->tx_enabled = 0;
3570         info->tx_active  = 0;
3571 }
3572
3573 /* Reset the adapter to a known state and prepare it for further use.
3574  */
3575 static void reset_device(MGSLPC_INFO *info)
3576 {
3577         /* power up both channels (set BIT7) */ 
3578         write_reg(info, CHA + CCR0, 0x80);
3579         write_reg(info, CHB + CCR0, 0x80);
3580         write_reg(info, CHA + MODE, 0);
3581         write_reg(info, CHB + MODE, 0);
3582         
3583         /* disable all interrupts */ 
3584         irq_disable(info, CHA, 0xffff);
3585         irq_disable(info, CHB, 0xffff);
3586         port_irq_disable(info, 0xff);
3587         
3588         /* PCR Port Configuration Register
3589          *
3590          * 07..04  DEC[3..0] Serial I/F select outputs
3591          * 03      output, 1=AUTO CTS control enabled
3592          * 02      RI Ring Indicator input 0=active
3593          * 01      DSR input 0=active
3594          * 00      DTR output 0=active
3595          *
3596          * 0000 0110
3597          */ 
3598         write_reg(info, PCR, 0x06);
3599         
3600         /* PVR Port Value Register
3601          *
3602          * 07..04  DEC[3..0] Serial I/F select (0000=disabled)
3603          * 03      AUTO CTS output 1=enabled
3604          * 02      RI Ring Indicator input
3605          * 01      DSR input
3606          * 00      DTR output (1=inactive)
3607          *
3608          * 0000 0001
3609          */
3610 //      write_reg(info, PVR, PVR_DTR);
3611         
3612         /* IPC Interrupt Port Configuration
3613          *
3614          * 07      VIS 1=Masked interrupts visible
3615          * 06..05  Reserved, 0
3616          * 04..03  SLA Slave address, 00 ignored
3617          * 02      CASM Cascading Mode, 1=daisy chain
3618          * 01..00  IC[1..0] Interrupt Config, 01=push-pull output, active low
3619          *
3620          * 0000 0101
3621          */ 
3622         write_reg(info, IPC, 0x05);
3623 }
3624
3625 static void async_mode(MGSLPC_INFO *info)
3626 {
3627         unsigned char val;
3628
3629         /* disable all interrupts */ 
3630         irq_disable(info, CHA, 0xffff);
3631         irq_disable(info, CHB, 0xffff);
3632         port_irq_disable(info, 0xff);
3633         
3634         /* MODE
3635          *
3636          * 07      Reserved, 0
3637          * 06      FRTS RTS State, 0=active
3638          * 05      FCTS Flow Control on CTS
3639          * 04      FLON Flow Control Enable
3640          * 03      RAC Receiver Active, 0 = inactive
3641          * 02      RTS 0=Auto RTS, 1=manual RTS
3642          * 01      TRS Timer Resolution, 1=512
3643          * 00      TLP Test Loop, 0 = no loop
3644          *
3645          * 0000 0110
3646          */ 
3647         val = 0x06;
3648         if (info->params.loopback)
3649                 val |= BIT0;
3650         
3651         /* preserve RTS state */ 
3652         if (!(info->serial_signals & SerialSignal_RTS))
3653                 val |= BIT6;
3654         write_reg(info, CHA + MODE, val);
3655         
3656         /* CCR0
3657          *
3658          * 07      PU Power Up, 1=active, 0=power down
3659          * 06      MCE Master Clock Enable, 1=enabled
3660          * 05      Reserved, 0
3661          * 04..02  SC[2..0] Encoding, 000=NRZ
3662          * 01..00  SM[1..0] Serial Mode, 11=Async
3663          *
3664          * 1000 0011
3665          */ 
3666         write_reg(info, CHA + CCR0, 0x83);
3667         
3668         /* CCR1
3669          *
3670          * 07..05  Reserved, 0
3671          * 04      ODS Output Driver Select, 1=TxD is push-pull output
3672          * 03      BCR Bit Clock Rate, 1=16x
3673          * 02..00  CM[2..0] Clock Mode, 111=BRG
3674          *
3675          * 0001 1111
3676          */ 
3677         write_reg(info, CHA + CCR1, 0x1f);
3678         
3679         /* CCR2 (channel A)
3680          *
3681          * 07..06  BGR[9..8] Baud rate bits 9..8
3682          * 05      BDF Baud rate divisor factor, 0=1, 1=BGR value
3683          * 04      SSEL Clock source select, 1=submode b
3684          * 03      TOE 0=TxCLK is input, 0=TxCLK is input
3685          * 02      RWX Read/Write Exchange 0=disabled
3686          * 01      Reserved, 0
3687          * 00      DIV, data inversion 0=disabled, 1=enabled
3688          *
3689          * 0001 0000
3690          */ 
3691         write_reg(info, CHA + CCR2, 0x10);
3692         
3693         /* CCR3
3694          *
3695          * 07..01  Reserved, 0
3696          * 00      PSD DPLL Phase Shift Disable
3697          *
3698          * 0000 0000
3699          */ 
3700         write_reg(info, CHA + CCR3, 0);
3701         
3702         /* CCR4
3703          *
3704          * 07      MCK4 Master Clock Divide by 4, 1=enabled
3705          * 06      EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3706          * 05      TST1 Test Pin, 0=normal operation
3707          * 04      ICD Ivert Carrier Detect, 1=enabled (active low)
3708          * 03..00  Reserved, must be 0
3709          *
3710          * 0101 0000
3711          */ 
3712         write_reg(info, CHA + CCR4, 0x50);
3713         mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
3714         
3715         /* DAFO Data Format
3716          *
3717          * 07      Reserved, 0
3718          * 06      XBRK transmit break, 0=normal operation
3719          * 05      Stop bits (0=1, 1=2)
3720          * 04..03  PAR[1..0] Parity (01=odd, 10=even)
3721          * 02      PAREN Parity Enable
3722          * 01..00  CHL[1..0] Character Length (00=8, 01=7)
3723          *
3724          */ 
3725         val = 0x00;
3726         if (info->params.data_bits != 8)
3727                 val |= BIT0;    /* 7 bits */
3728         if (info->params.stop_bits != 1)
3729                 val |= BIT5;
3730         if (info->params.parity != ASYNC_PARITY_NONE)
3731         {
3732                 val |= BIT2;    /* Parity enable */
3733                 if (info->params.parity == ASYNC_PARITY_ODD)
3734                         val |= BIT3;
3735                 else
3736                         val |= BIT4;
3737         }
3738         write_reg(info, CHA + DAFO, val);
3739         
3740         /* RFC Rx FIFO Control
3741          *
3742          * 07      Reserved, 0
3743          * 06      DPS, 1=parity bit not stored in data byte
3744          * 05      DXS, 0=all data stored in FIFO (including XON/XOFF)
3745          * 04      RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
3746          * 03..02  RFTH[1..0], rx threshold, 11=16 status + 16 data byte
3747          * 01      Reserved, 0
3748          * 00      TCDE Terminate Char Detect Enable, 0=disabled
3749          *
3750          * 0101 1100
3751          */ 
3752         write_reg(info, CHA + RFC, 0x5c);
3753         
3754         /* RLCR Receive length check register
3755          *
3756          * Max frame length = (RL + 1) * 32
3757          */ 
3758         write_reg(info, CHA + RLCR, 0);
3759         
3760         /* XBCH Transmit Byte Count High
3761          *
3762          * 07      DMA mode, 0 = interrupt driven
3763          * 06      NRM, 0=ABM (ignored)
3764          * 05      CAS Carrier Auto Start
3765          * 04      XC Transmit Continuously (ignored)
3766          * 03..00  XBC[10..8] Transmit byte count bits 10..8
3767          *
3768          * 0000 0000
3769          */ 
3770         val = 0x00;
3771         if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3772                 val |= BIT5;
3773         write_reg(info, CHA + XBCH, val);
3774         if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3775                 irq_enable(info, CHA, IRQ_CTS);
3776         
3777         /* MODE:03 RAC Receiver Active, 1=active */ 
3778         set_reg_bits(info, CHA + MODE, BIT3);
3779         enable_auxclk(info);
3780         if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
3781                 irq_enable(info, CHB, IRQ_CTS);
3782                 /* PVR[3] 1=AUTO CTS active */ 
3783                 set_reg_bits(info, CHA + PVR, BIT3);
3784         } else
3785                 clear_reg_bits(info, CHA + PVR, BIT3);
3786         irq_enable(info, CHA,
3787                           IRQ_RXEOM + IRQ_RXFIFO + IRQ_BREAK_ON + IRQ_RXTIME +
3788                           IRQ_ALLSENT + IRQ_TXFIFO);
3789         issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3790         wait_command_complete(info, CHA);
3791         read_reg16(info, CHA + ISR);    /* clear pending IRQs */
3792 }
3793
3794 /* Set the HDLC idle mode for the transmitter.
3795  */
3796 static void tx_set_idle(MGSLPC_INFO *info)
3797 {
3798         /* Note: ESCC2 only supports flags and one idle modes */ 
3799         if (info->idle_mode == HDLC_TXIDLE_FLAGS)
3800                 set_reg_bits(info, CHA + CCR1, BIT3);
3801         else
3802                 clear_reg_bits(info, CHA + CCR1, BIT3);
3803 }
3804
3805 /* get state of the V24 status (input) signals.
3806  */
3807 static void get_signals(MGSLPC_INFO *info)
3808 {
3809         unsigned char status = 0;
3810         
3811         /* preserve DTR and RTS */ 
3812         info->serial_signals &= SerialSignal_DTR + SerialSignal_RTS;
3813
3814         if (read_reg(info, CHB + VSTR) & BIT7)
3815                 info->serial_signals |= SerialSignal_DCD;
3816         if (read_reg(info, CHB + STAR) & BIT1)
3817                 info->serial_signals |= SerialSignal_CTS;
3818
3819         status = read_reg(info, CHA + PVR);
3820         if (!(status & PVR_RI))
3821                 info->serial_signals |= SerialSignal_RI;
3822         if (!(status & PVR_DSR))
3823                 info->serial_signals |= SerialSignal_DSR;
3824 }
3825
3826 /* Set the state of DTR and RTS based on contents of
3827  * serial_signals member of device extension.
3828  */
3829 static void set_signals(MGSLPC_INFO *info)
3830 {
3831         unsigned char val;
3832
3833         val = read_reg(info, CHA + MODE);
3834         if (info->params.mode == MGSL_MODE_ASYNC) {
3835                 if (info->serial_signals & SerialSignal_RTS)
3836                         val &= ~BIT6;
3837                 else
3838                         val |= BIT6;
3839         } else {
3840                 if (info->serial_signals & SerialSignal_RTS)
3841                         val |= BIT2;
3842                 else
3843                         val &= ~BIT2;
3844         }
3845         write_reg(info, CHA + MODE, val);
3846
3847         if (info->serial_signals & SerialSignal_DTR)
3848                 clear_reg_bits(info, CHA + PVR, PVR_DTR);
3849         else
3850                 set_reg_bits(info, CHA + PVR, PVR_DTR);
3851 }
3852
3853 static void rx_reset_buffers(MGSLPC_INFO *info)
3854 {
3855         RXBUF *buf;
3856         int i;
3857
3858         info->rx_put = 0;
3859         info->rx_get = 0;
3860         info->rx_frame_count = 0;
3861         for (i=0 ; i < info->rx_buf_count ; i++) {
3862                 buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
3863                 buf->status = buf->count = 0;
3864         }
3865 }
3866
3867 /* Attempt to return a received HDLC frame
3868  * Only frames received without errors are returned.
3869  *
3870  * Returns 1 if frame returned, otherwise 0
3871  */
3872 static int rx_get_frame(MGSLPC_INFO *info)
3873 {
3874         unsigned short status;
3875         RXBUF *buf;
3876         unsigned int framesize = 0;
3877         unsigned long flags;
3878         struct tty_struct *tty = info->tty;
3879         int return_frame = 0;
3880         
3881         if (info->rx_frame_count == 0)
3882                 return 0;
3883
3884         buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
3885
3886         status = buf->status;
3887
3888         /* 07  VFR  1=valid frame
3889          * 06  RDO  1=data overrun
3890          * 05  CRC  1=OK, 0=error
3891          * 04  RAB  1=frame aborted
3892          */
3893         if ((status & 0xf0) != 0xA0) {
3894                 if (!(status & BIT7) || (status & BIT4))
3895                         info->icount.rxabort++;
3896                 else if (status & BIT6)
3897                         info->icount.rxover++;
3898                 else if (!(status & BIT5)) {
3899                         info->icount.rxcrc++;
3900                         if (info->params.crc_type & HDLC_CRC_RETURN_EX)
3901                                 return_frame = 1;
3902                 }
3903                 framesize = 0;
3904 #if SYNCLINK_GENERIC_HDLC
3905                 {
3906                         struct net_device_stats *stats = hdlc_stats(info->netdev);
3907                         stats->rx_errors++;
3908                         stats->rx_frame_errors++;
3909                 }
3910 #endif
3911         } else
3912                 return_frame = 1;
3913
3914         if (return_frame)
3915                 framesize = buf->count;
3916
3917         if (debug_level >= DEBUG_LEVEL_BH)
3918                 printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
3919                         __FILE__,__LINE__,info->device_name,status,framesize);
3920                         
3921         if (debug_level >= DEBUG_LEVEL_DATA)
3922                 trace_block(info, buf->data, framesize, 0);     
3923                 
3924         if (framesize) {
3925                 if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
3926                       framesize+1 > info->max_frame_size) ||
3927                     framesize > info->max_frame_size)
3928                         info->icount.rxlong++;
3929                 else {
3930                         if (status & BIT5)
3931                                 info->icount.rxok++;
3932
3933                         if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
3934                                 *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
3935                                 ++framesize;
3936                         }
3937
3938 #if SYNCLINK_GENERIC_HDLC
3939                         if (info->netcount)
3940                                 hdlcdev_rx(info, buf->data, framesize);
3941                         else
3942 #endif
3943                                 ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
3944                 }
3945         }
3946
3947         spin_lock_irqsave(&info->lock,flags);
3948         buf->status = buf->count = 0;
3949         info->rx_frame_count--;
3950         info->rx_get++;
3951         if (info->rx_get >= info->rx_buf_count)
3952                 info->rx_get = 0;
3953         spin_unlock_irqrestore(&info->lock,flags);
3954
3955         return 1;
3956 }
3957
3958 static BOOLEAN register_test(MGSLPC_INFO *info)
3959 {
3960         static unsigned char patterns[] = 
3961             { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
3962         static unsigned int count = ARRAY_SIZE(patterns);
3963         unsigned int i;
3964         BOOLEAN rc = TRUE;
3965         unsigned long flags;
3966
3967         spin_lock_irqsave(&info->lock,flags);
3968         reset_device(info);
3969
3970         for (i = 0; i < count; i++) {
3971                 write_reg(info, XAD1, patterns[i]);
3972                 write_reg(info, XAD2, patterns[(i + 1) % count]);
3973                 if ((read_reg(info, XAD1) != patterns[i]) ||
3974                     (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
3975                         rc = FALSE;
3976                         break;
3977                 }
3978         }
3979
3980         spin_unlock_irqrestore(&info->lock,flags);
3981         return rc;
3982 }
3983
3984 static BOOLEAN irq_test(MGSLPC_INFO *info)
3985 {
3986         unsigned long end_time;
3987         unsigned long flags;
3988
3989         spin_lock_irqsave(&info->lock,flags);
3990         reset_device(info);
3991
3992         info->testing_irq = TRUE;
3993         hdlc_mode(info);
3994
3995         info->irq_occurred = FALSE;
3996
3997         /* init hdlc mode */
3998
3999         irq_enable(info, CHA, IRQ_TIMER);
4000         write_reg(info, CHA + TIMR, 0); /* 512 cycles */
4001         issue_command(info, CHA, CMD_START_TIMER);
4002
4003         spin_unlock_irqrestore(&info->lock,flags);
4004
4005         end_time=100;
4006         while(end_time-- && !info->irq_occurred) {
4007                 msleep_interruptible(10);
4008         }
4009         
4010         info->testing_irq = FALSE;
4011
4012         spin_lock_irqsave(&info->lock,flags);
4013         reset_device(info);
4014         spin_unlock_irqrestore(&info->lock,flags);
4015         
4016         return info->irq_occurred ? TRUE : FALSE;
4017 }
4018
4019 static int adapter_test(MGSLPC_INFO *info)
4020 {
4021         if (!register_test(info)) {
4022                 info->init_error = DiagStatus_AddressFailure;
4023                 printk( "%s(%d):Register test failure for device %s Addr=%04X\n",
4024                         __FILE__,__LINE__,info->device_name, (unsigned short)(info->io_base) );
4025                 return -ENODEV;
4026         }
4027
4028         if (!irq_test(info)) {
4029                 info->init_error = DiagStatus_IrqFailure;
4030                 printk( "%s(%d):Interrupt test failure for device %s IRQ=%d\n",
4031                         __FILE__,__LINE__,info->device_name, (unsigned short)(info->irq_level) );
4032                 return -ENODEV;
4033         }
4034
4035         if (debug_level >= DEBUG_LEVEL_INFO)
4036                 printk("%s(%d):device %s passed diagnostics\n",
4037                         __FILE__,__LINE__,info->device_name);
4038         return 0;
4039 }
4040
4041 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
4042 {
4043         int i;
4044         int linecount;
4045         if (xmit)
4046                 printk("%s tx data:\n",info->device_name);
4047         else
4048                 printk("%s rx data:\n",info->device_name);
4049                 
4050         while(count) {
4051                 if (count > 16)
4052                         linecount = 16;
4053                 else
4054                         linecount = count;
4055                         
4056                 for(i=0;i<linecount;i++)
4057                         printk("%02X ",(unsigned char)data[i]);
4058                 for(;i<17;i++)
4059                         printk("   ");
4060                 for(i=0;i<linecount;i++) {
4061                         if (data[i]>=040 && data[i]<=0176)
4062                                 printk("%c",data[i]);
4063                         else
4064                                 printk(".");
4065                 }
4066                 printk("\n");
4067                 
4068                 data  += linecount;
4069                 count -= linecount;
4070         }
4071 }
4072
4073 /* HDLC frame time out
4074  * update stats and do tx completion processing
4075  */
4076 static void tx_timeout(unsigned long context)
4077 {
4078         MGSLPC_INFO *info = (MGSLPC_INFO*)context;
4079         unsigned long flags;
4080         
4081         if ( debug_level >= DEBUG_LEVEL_INFO )
4082                 printk( "%s(%d):tx_timeout(%s)\n",
4083                         __FILE__,__LINE__,info->device_name);
4084         if(info->tx_active &&
4085            info->params.mode == MGSL_MODE_HDLC) {
4086                 info->icount.txtimeout++;
4087         }
4088         spin_lock_irqsave(&info->lock,flags);
4089         info->tx_active = 0;
4090         info->tx_count = info->tx_put = info->tx_get = 0;
4091
4092         spin_unlock_irqrestore(&info->lock,flags);
4093         
4094 #if SYNCLINK_GENERIC_HDLC
4095         if (info->netcount)
4096                 hdlcdev_tx_done(info);
4097         else
4098 #endif
4099                 bh_transmit(info);
4100 }
4101
4102 #if SYNCLINK_GENERIC_HDLC
4103
4104 /**
4105  * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
4106  * set encoding and frame check sequence (FCS) options
4107  *
4108  * dev       pointer to network device structure
4109  * encoding  serial encoding setting
4110  * parity    FCS setting
4111  *
4112  * returns 0 if success, otherwise error code
4113  */
4114 static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
4115                           unsigned short parity)
4116 {
4117         MGSLPC_INFO *info = dev_to_port(dev);
4118         unsigned char  new_encoding;
4119         unsigned short new_crctype;
4120
4121         /* return error if TTY interface open */
4122         if (info->count)
4123                 return -EBUSY;
4124
4125         switch (encoding)
4126         {
4127         case ENCODING_NRZ:        new_encoding = HDLC_ENCODING_NRZ; break;
4128         case ENCODING_NRZI:       new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
4129         case ENCODING_FM_MARK:    new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
4130         case ENCODING_FM_SPACE:   new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
4131         case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
4132         default: return -EINVAL;
4133         }
4134
4135         switch (parity)
4136         {
4137         case PARITY_NONE:            new_crctype = HDLC_CRC_NONE; break;
4138         case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
4139         case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
4140         default: return -EINVAL;
4141         }
4142
4143         info->params.encoding = new_encoding;
4144         info->params.crc_type = new_crctype;
4145
4146         /* if network interface up, reprogram hardware */
4147         if (info->netcount)
4148                 mgslpc_program_hw(info);
4149
4150         return 0;
4151 }
4152
4153 /**
4154  * called by generic HDLC layer to send frame
4155  *
4156  * skb  socket buffer containing HDLC frame
4157  * dev  pointer to network device structure
4158  *
4159  * returns 0 if success, otherwise error code
4160  */
4161 static int hdlcdev_xmit(struct sk_buff *skb, struct net_device *dev)
4162 {
4163         MGSLPC_INFO *info = dev_to_port(dev);
4164         struct net_device_stats *stats = hdlc_stats(dev);
4165         unsigned long flags;
4166
4167         if (debug_level >= DEBUG_LEVEL_INFO)
4168                 printk(KERN_INFO "%s:hdlc_xmit(%s)\n",__FILE__,dev->name);
4169
4170         /* stop sending until this frame completes */
4171         netif_stop_queue(dev);
4172
4173         /* copy data to device buffers */
4174         memcpy(info->tx_buf, skb->data, skb->len);
4175         info->tx_get = 0;
4176         info->tx_put = info->tx_count = skb->len;
4177
4178         /* update network statistics */
4179         stats->tx_packets++;
4180         stats->tx_bytes += skb->len;
4181
4182         /* done with socket buffer, so free it */
4183         dev_kfree_skb(skb);
4184
4185         /* save start time for transmit timeout detection */
4186         dev->trans_start = jiffies;
4187
4188         /* start hardware transmitter if necessary */
4189         spin_lock_irqsave(&info->lock,flags);
4190         if (!info->tx_active)
4191                 tx_start(info);
4192         spin_unlock_irqrestore(&info->lock,flags);
4193
4194         return 0;
4195 }
4196
4197 /**
4198  * called by network layer when interface enabled
4199  * claim resources and initialize hardware
4200  *
4201  * dev  pointer to network device structure
4202  *
4203  * returns 0 if success, otherwise error code
4204  */
4205 static int hdlcdev_open(struct net_device *dev)
4206 {
4207         MGSLPC_INFO *info = dev_to_port(dev);
4208         int rc;
4209         unsigned long flags;
4210
4211         if (debug_level >= DEBUG_LEVEL_INFO)
4212                 printk("%s:hdlcdev_open(%s)\n",__FILE__,dev->name);
4213
4214         /* generic HDLC layer open processing */
4215         if ((rc = hdlc_open(dev)))
4216                 return rc;
4217
4218         /* arbitrate between network and tty opens */
4219         spin_lock_irqsave(&info->netlock, flags);
4220         if (info->count != 0 || info->netcount != 0) {
4221                 printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
4222                 spin_unlock_irqrestore(&info->netlock, flags);
4223                 return -EBUSY;
4224         }
4225         info->netcount=1;
4226         spin_unlock_irqrestore(&info->netlock, flags);
4227
4228         /* claim resources and init adapter */
4229         if ((rc = startup(info)) != 0) {
4230                 spin_lock_irqsave(&info->netlock, flags);
4231                 info->netcount=0;
4232                 spin_unlock_irqrestore(&info->netlock, flags);
4233                 return rc;
4234         }
4235
4236         /* assert DTR and RTS, apply hardware settings */
4237         info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
4238         mgslpc_program_hw(info);
4239
4240         /* enable network layer transmit */
4241         dev->trans_start = jiffies;
4242         netif_start_queue(dev);
4243
4244         /* inform generic HDLC layer of current DCD status */
4245         spin_lock_irqsave(&info->lock, flags);
4246         get_signals(info);
4247         spin_unlock_irqrestore(&info->lock, flags);
4248         if (info->serial_signals & SerialSignal_DCD)
4249                 netif_carrier_on(dev);
4250         else
4251                 netif_carrier_off(dev);
4252         return 0;
4253 }
4254
4255 /**
4256  * called by network layer when interface is disabled
4257  * shutdown hardware and release resources
4258  *
4259  * dev  pointer to network device structure
4260  *
4261  * returns 0 if success, otherwise error code
4262  */
4263 static int hdlcdev_close(struct net_device *dev)
4264 {
4265         MGSLPC_INFO *info = dev_to_port(dev);
4266         unsigned long flags;
4267
4268         if (debug_level >= DEBUG_LEVEL_INFO)
4269                 printk("%s:hdlcdev_close(%s)\n",__FILE__,dev->name);
4270
4271         netif_stop_queue(dev);
4272
4273         /* shutdown adapter and release resources */
4274         shutdown(info);
4275
4276         hdlc_close(dev);
4277
4278         spin_lock_irqsave(&info->netlock, flags);
4279         info->netcount=0;
4280         spin_unlock_irqrestore(&info->netlock, flags);
4281
4282         return 0;
4283 }
4284
4285 /**
4286  * called by network layer to process IOCTL call to network device
4287  *
4288  * dev  pointer to network device structure
4289  * ifr  pointer to network interface request structure
4290  * cmd  IOCTL command code
4291  *
4292  * returns 0 if success, otherwise error code
4293  */
4294 static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
4295 {
4296         const size_t size = sizeof(sync_serial_settings);
4297         sync_serial_settings new_line;
4298         sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
4299         MGSLPC_INFO *info = dev_to_port(dev);
4300         unsigned int flags;
4301
4302         if (debug_level >= DEBUG_LEVEL_INFO)
4303                 printk("%s:hdlcdev_ioctl(%s)\n",__FILE__,dev->name);
4304
4305         /* return error if TTY interface open */
4306         if (info->count)
4307                 return -EBUSY;
4308
4309         if (cmd != SIOCWANDEV)
4310                 return hdlc_ioctl(dev, ifr, cmd);
4311
4312         switch(ifr->ifr_settings.type) {
4313         case IF_GET_IFACE: /* return current sync_serial_settings */
4314
4315                 ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
4316                 if (ifr->ifr_settings.size < size) {
4317                         ifr->ifr_settings.size = size; /* data size wanted */
4318                         return -ENOBUFS;
4319                 }
4320
4321                 flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4322                                               HDLC_FLAG_RXC_BRG    | HDLC_FLAG_RXC_TXCPIN |
4323                                               HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4324                                               HDLC_FLAG_TXC_BRG    | HDLC_FLAG_TXC_RXCPIN);
4325
4326                 switch (flags){
4327                 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
4328                 case (HDLC_FLAG_RXC_BRG    | HDLC_FLAG_TXC_BRG):    new_line.clock_type = CLOCK_INT; break;
4329                 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG):    new_line.clock_type = CLOCK_TXINT; break;
4330                 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
4331                 default: new_line.clock_type = CLOCK_DEFAULT;
4332                 }
4333
4334                 new_line.clock_rate = info->params.clock_speed;
4335                 new_line.loopback   = info->params.loopback ? 1:0;
4336
4337                 if (copy_to_user(line, &new_line, size))
4338                         return -EFAULT;
4339                 return 0;
4340
4341         case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
4342
4343                 if(!capable(CAP_NET_ADMIN))
4344                         return -EPERM;
4345                 if (copy_from_user(&new_line, line, size))
4346                         return -EFAULT;
4347
4348                 switch (new_line.clock_type)
4349                 {
4350                 case CLOCK_EXT:      flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
4351                 case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
4352                 case CLOCK_INT:      flags = HDLC_FLAG_RXC_BRG    | HDLC_FLAG_TXC_BRG;    break;
4353                 case CLOCK_TXINT:    flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG;    break;
4354                 case CLOCK_DEFAULT:  flags = info->params.flags &
4355                                              (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4356                                               HDLC_FLAG_RXC_BRG    | HDLC_FLAG_RXC_TXCPIN |
4357                                               HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4358                                               HDLC_FLAG_TXC_BRG    | HDLC_FLAG_TXC_RXCPIN); break;
4359                 default: return -EINVAL;
4360                 }
4361
4362                 if (new_line.loopback != 0 && new_line.loopback != 1)
4363                         return -EINVAL;
4364
4365                 info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4366                                         HDLC_FLAG_RXC_BRG    | HDLC_FLAG_RXC_TXCPIN |
4367                                         HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4368                                         HDLC_FLAG_TXC_BRG    | HDLC_FLAG_TXC_RXCPIN);
4369                 info->params.flags |= flags;
4370
4371                 info->params.loopback = new_line.loopback;
4372
4373                 if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
4374                         info->params.clock_speed = new_line.clock_rate;
4375                 else
4376                         info->params.clock_speed = 0;
4377
4378                 /* if network interface up, reprogram hardware */
4379                 if (info->netcount)
4380                         mgslpc_program_hw(info);
4381                 return 0;
4382
4383         default:
4384                 return hdlc_ioctl(dev, ifr, cmd);
4385         }
4386 }
4387
4388 /**
4389  * called by network layer when transmit timeout is detected
4390  *
4391  * dev  pointer to network device structure
4392  */
4393 static void hdlcdev_tx_timeout(struct net_device *dev)
4394 {
4395         MGSLPC_INFO *info = dev_to_port(dev);
4396         struct net_device_stats *stats = hdlc_stats(dev);
4397         unsigned long flags;
4398
4399         if (debug_level >= DEBUG_LEVEL_INFO)
4400                 printk("hdlcdev_tx_timeout(%s)\n",dev->name);
4401
4402         stats->tx_errors++;
4403         stats->tx_aborted_errors++;
4404
4405         spin_lock_irqsave(&info->lock,flags);
4406         tx_stop(info);
4407         spin_unlock_irqrestore(&info->lock,flags);
4408
4409         netif_wake_queue(dev);
4410 }
4411
4412 /**
4413  * called by device driver when transmit completes
4414  * reenable network layer transmit if stopped
4415  *
4416  * info  pointer to device instance information
4417  */
4418 static void hdlcdev_tx_done(MGSLPC_INFO *info)
4419 {
4420         if (netif_queue_stopped(info->netdev))
4421                 netif_wake_queue(info->netdev);
4422 }
4423
4424 /**
4425  * called by device driver when frame received
4426  * pass frame to network layer
4427  *
4428  * info  pointer to device instance information
4429  * buf   pointer to buffer contianing frame data
4430  * size  count of data bytes in buf
4431  */
4432 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
4433 {
4434         struct sk_buff *skb = dev_alloc_skb(size);
4435         struct net_device *dev = info->netdev;
4436         struct net_device_stats *stats = hdlc_stats(dev);
4437
4438         if (debug_level >= DEBUG_LEVEL_INFO)
4439                 printk("hdlcdev_rx(%s)\n",dev->name);
4440
4441         if (skb == NULL) {
4442                 printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
4443                 stats->rx_dropped++;
4444                 return;
4445         }
4446
4447         memcpy(skb_put(skb, size),buf,size);
4448
4449         skb->protocol = hdlc_type_trans(skb, info->netdev);
4450
4451         stats->rx_packets++;
4452         stats->rx_bytes += size;
4453
4454         netif_rx(skb);
4455
4456         info->netdev->last_rx = jiffies;
4457 }
4458
4459 /**
4460  * called by device driver when adding device instance
4461  * do generic HDLC initialization
4462  *
4463  * info  pointer to device instance information
4464  *
4465  * returns 0 if success, otherwise error code
4466  */
4467 static int hdlcdev_init(MGSLPC_INFO *info)
4468 {
4469         int rc;
4470         struct net_device *dev;
4471         hdlc_device *hdlc;
4472
4473         /* allocate and initialize network and HDLC layer objects */
4474
4475         if (!(dev = alloc_hdlcdev(info))) {
4476                 printk(KERN_ERR "%s:hdlc device allocation failure\n",__FILE__);
4477                 return -ENOMEM;
4478         }
4479
4480         /* for network layer reporting purposes only */
4481         dev->base_addr = info->io_base;
4482         dev->irq       = info->irq_level;
4483
4484         /* network layer callbacks and settings */
4485         dev->do_ioctl       = hdlcdev_ioctl;
4486         dev->open           = hdlcdev_open;
4487         dev->stop           = hdlcdev_close;
4488         dev->tx_timeout     = hdlcdev_tx_timeout;
4489         dev->watchdog_timeo = 10*HZ;
4490         dev->tx_queue_len   = 50;
4491
4492         /* generic HDLC layer callbacks and settings */
4493         hdlc         = dev_to_hdlc(dev);
4494         hdlc->attach = hdlcdev_attach;
4495         hdlc->xmit   = hdlcdev_xmit;
4496
4497         /* register objects with HDLC layer */
4498         if ((rc = register_hdlc_device(dev))) {
4499                 printk(KERN_WARNING "%s:unable to register hdlc device\n",__FILE__);
4500                 free_netdev(dev);
4501                 return rc;
4502         }
4503
4504         info->netdev = dev;
4505         return 0;
4506 }
4507
4508 /**
4509  * called by device driver when removing device instance
4510  * do generic HDLC cleanup
4511  *
4512  * info  pointer to device instance information
4513  */
4514 static void hdlcdev_exit(MGSLPC_INFO *info)
4515 {
4516         unregister_hdlc_device(info->netdev);
4517         free_netdev(info->netdev);
4518         info->netdev = NULL;
4519 }
4520
4521 #endif /* CONFIG_HDLC */
4522