ACPI: lockdep warning on boot, 2.6.25-rc5
[sfrench/cifs-2.6.git] / drivers / acpi / processor_idle.c
1 /*
2  * processor_idle - idle state submodule to the ACPI processor driver
3  *
4  *  Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5  *  Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6  *  Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
7  *  Copyright (C) 2004  Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8  *                      - Added processor hotplug support
9  *  Copyright (C) 2005  Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10  *                      - Added support for C3 on SMP
11  *
12  * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
13  *
14  *  This program is free software; you can redistribute it and/or modify
15  *  it under the terms of the GNU General Public License as published by
16  *  the Free Software Foundation; either version 2 of the License, or (at
17  *  your option) any later version.
18  *
19  *  This program is distributed in the hope that it will be useful, but
20  *  WITHOUT ANY WARRANTY; without even the implied warranty of
21  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
22  *  General Public License for more details.
23  *
24  *  You should have received a copy of the GNU General Public License along
25  *  with this program; if not, write to the Free Software Foundation, Inc.,
26  *  59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
27  *
28  * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
29  */
30
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/init.h>
34 #include <linux/cpufreq.h>
35 #include <linux/proc_fs.h>
36 #include <linux/seq_file.h>
37 #include <linux/acpi.h>
38 #include <linux/dmi.h>
39 #include <linux/moduleparam.h>
40 #include <linux/sched.h>        /* need_resched() */
41 #include <linux/pm_qos_params.h>
42 #include <linux/clockchips.h>
43 #include <linux/cpuidle.h>
44
45 /*
46  * Include the apic definitions for x86 to have the APIC timer related defines
47  * available also for UP (on SMP it gets magically included via linux/smp.h).
48  * asm/acpi.h is not an option, as it would require more include magic. Also
49  * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
50  */
51 #ifdef CONFIG_X86
52 #include <asm/apic.h>
53 #endif
54
55 #include <asm/io.h>
56 #include <asm/uaccess.h>
57
58 #include <acpi/acpi_bus.h>
59 #include <acpi/processor.h>
60
61 #define ACPI_PROCESSOR_COMPONENT        0x01000000
62 #define ACPI_PROCESSOR_CLASS            "processor"
63 #define _COMPONENT              ACPI_PROCESSOR_COMPONENT
64 ACPI_MODULE_NAME("processor_idle");
65 #define ACPI_PROCESSOR_FILE_POWER       "power"
66 #define US_TO_PM_TIMER_TICKS(t)         ((t * (PM_TIMER_FREQUENCY/1000)) / 1000)
67 #define PM_TIMER_TICK_NS                (1000000000ULL/PM_TIMER_FREQUENCY)
68 #ifndef CONFIG_CPU_IDLE
69 #define C2_OVERHEAD                     4       /* 1us (3.579 ticks per us) */
70 #define C3_OVERHEAD                     4       /* 1us (3.579 ticks per us) */
71 static void (*pm_idle_save) (void) __read_mostly;
72 #else
73 #define C2_OVERHEAD                     1       /* 1us */
74 #define C3_OVERHEAD                     1       /* 1us */
75 #endif
76 #define PM_TIMER_TICKS_TO_US(p)         (((p) * 1000)/(PM_TIMER_FREQUENCY/1000))
77
78 static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
79 #ifdef CONFIG_CPU_IDLE
80 module_param(max_cstate, uint, 0000);
81 #else
82 module_param(max_cstate, uint, 0644);
83 #endif
84 static unsigned int nocst __read_mostly;
85 module_param(nocst, uint, 0000);
86
87 #ifndef CONFIG_CPU_IDLE
88 /*
89  * bm_history -- bit-mask with a bit per jiffy of bus-master activity
90  * 1000 HZ: 0xFFFFFFFF: 32 jiffies = 32ms
91  * 800 HZ: 0xFFFFFFFF: 32 jiffies = 40ms
92  * 100 HZ: 0x0000000F: 4 jiffies = 40ms
93  * reduce history for more aggressive entry into C3
94  */
95 static unsigned int bm_history __read_mostly =
96     (HZ >= 800 ? 0xFFFFFFFF : ((1U << (HZ / 25)) - 1));
97 module_param(bm_history, uint, 0644);
98
99 static int acpi_processor_set_power_policy(struct acpi_processor *pr);
100
101 #else   /* CONFIG_CPU_IDLE */
102 static unsigned int latency_factor __read_mostly = 2;
103 module_param(latency_factor, uint, 0644);
104 #endif
105
106 /*
107  * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
108  * For now disable this. Probably a bug somewhere else.
109  *
110  * To skip this limit, boot/load with a large max_cstate limit.
111  */
112 static int set_max_cstate(const struct dmi_system_id *id)
113 {
114         if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
115                 return 0;
116
117         printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
118                " Override with \"processor.max_cstate=%d\"\n", id->ident,
119                (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
120
121         max_cstate = (long)id->driver_data;
122
123         return 0;
124 }
125
126 /* Actually this shouldn't be __cpuinitdata, would be better to fix the
127    callers to only run once -AK */
128 static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
129         { set_max_cstate, "IBM ThinkPad R40e", {
130           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
131           DMI_MATCH(DMI_BIOS_VERSION,"1SET70WW")}, (void *)1},
132         { set_max_cstate, "IBM ThinkPad R40e", {
133           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
134           DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW")}, (void *)1},
135         { set_max_cstate, "IBM ThinkPad R40e", {
136           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
137           DMI_MATCH(DMI_BIOS_VERSION,"1SET43WW") }, (void*)1},
138         { set_max_cstate, "IBM ThinkPad R40e", {
139           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
140           DMI_MATCH(DMI_BIOS_VERSION,"1SET45WW") }, (void*)1},
141         { set_max_cstate, "IBM ThinkPad R40e", {
142           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
143           DMI_MATCH(DMI_BIOS_VERSION,"1SET47WW") }, (void*)1},
144         { set_max_cstate, "IBM ThinkPad R40e", {
145           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
146           DMI_MATCH(DMI_BIOS_VERSION,"1SET50WW") }, (void*)1},
147         { set_max_cstate, "IBM ThinkPad R40e", {
148           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
149           DMI_MATCH(DMI_BIOS_VERSION,"1SET52WW") }, (void*)1},
150         { set_max_cstate, "IBM ThinkPad R40e", {
151           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
152           DMI_MATCH(DMI_BIOS_VERSION,"1SET55WW") }, (void*)1},
153         { set_max_cstate, "IBM ThinkPad R40e", {
154           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
155           DMI_MATCH(DMI_BIOS_VERSION,"1SET56WW") }, (void*)1},
156         { set_max_cstate, "IBM ThinkPad R40e", {
157           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
158           DMI_MATCH(DMI_BIOS_VERSION,"1SET59WW") }, (void*)1},
159         { set_max_cstate, "IBM ThinkPad R40e", {
160           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
161           DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW") }, (void*)1},
162         { set_max_cstate, "IBM ThinkPad R40e", {
163           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
164           DMI_MATCH(DMI_BIOS_VERSION,"1SET61WW") }, (void*)1},
165         { set_max_cstate, "IBM ThinkPad R40e", {
166           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
167           DMI_MATCH(DMI_BIOS_VERSION,"1SET62WW") }, (void*)1},
168         { set_max_cstate, "IBM ThinkPad R40e", {
169           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
170           DMI_MATCH(DMI_BIOS_VERSION,"1SET64WW") }, (void*)1},
171         { set_max_cstate, "IBM ThinkPad R40e", {
172           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
173           DMI_MATCH(DMI_BIOS_VERSION,"1SET65WW") }, (void*)1},
174         { set_max_cstate, "IBM ThinkPad R40e", {
175           DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
176           DMI_MATCH(DMI_BIOS_VERSION,"1SET68WW") }, (void*)1},
177         { set_max_cstate, "Medion 41700", {
178           DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
179           DMI_MATCH(DMI_BIOS_VERSION,"R01-A1J")}, (void *)1},
180         { set_max_cstate, "Clevo 5600D", {
181           DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
182           DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
183          (void *)2},
184         {},
185 };
186
187 static inline u32 ticks_elapsed(u32 t1, u32 t2)
188 {
189         if (t2 >= t1)
190                 return (t2 - t1);
191         else if (!(acpi_gbl_FADT.flags & ACPI_FADT_32BIT_TIMER))
192                 return (((0x00FFFFFF - t1) + t2) & 0x00FFFFFF);
193         else
194                 return ((0xFFFFFFFF - t1) + t2);
195 }
196
197 static inline u32 ticks_elapsed_in_us(u32 t1, u32 t2)
198 {
199         if (t2 >= t1)
200                 return PM_TIMER_TICKS_TO_US(t2 - t1);
201         else if (!(acpi_gbl_FADT.flags & ACPI_FADT_32BIT_TIMER))
202                 return PM_TIMER_TICKS_TO_US(((0x00FFFFFF - t1) + t2) & 0x00FFFFFF);
203         else
204                 return PM_TIMER_TICKS_TO_US((0xFFFFFFFF - t1) + t2);
205 }
206
207 /*
208  * Callers should disable interrupts before the call and enable
209  * interrupts after return.
210  */
211 static void acpi_safe_halt(void)
212 {
213         current_thread_info()->status &= ~TS_POLLING;
214         /*
215          * TS_POLLING-cleared state must be visible before we
216          * test NEED_RESCHED:
217          */
218         smp_mb();
219         if (!need_resched()) {
220                 safe_halt();
221                 local_irq_disable();
222         }
223         current_thread_info()->status |= TS_POLLING;
224 }
225
226 #ifndef CONFIG_CPU_IDLE
227
228 static void
229 acpi_processor_power_activate(struct acpi_processor *pr,
230                               struct acpi_processor_cx *new)
231 {
232         struct acpi_processor_cx *old;
233
234         if (!pr || !new)
235                 return;
236
237         old = pr->power.state;
238
239         if (old)
240                 old->promotion.count = 0;
241         new->demotion.count = 0;
242
243         /* Cleanup from old state. */
244         if (old) {
245                 switch (old->type) {
246                 case ACPI_STATE_C3:
247                         /* Disable bus master reload */
248                         if (new->type != ACPI_STATE_C3 && pr->flags.bm_check)
249                                 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0);
250                         break;
251                 }
252         }
253
254         /* Prepare to use new state. */
255         switch (new->type) {
256         case ACPI_STATE_C3:
257                 /* Enable bus master reload */
258                 if (old->type != ACPI_STATE_C3 && pr->flags.bm_check)
259                         acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
260                 break;
261         }
262
263         pr->power.state = new;
264
265         return;
266 }
267
268 static atomic_t c3_cpu_count;
269
270 /* Common C-state entry for C2, C3, .. */
271 static void acpi_cstate_enter(struct acpi_processor_cx *cstate)
272 {
273         if (cstate->entry_method == ACPI_CSTATE_FFH) {
274                 /* Call into architectural FFH based C-state */
275                 acpi_processor_ffh_cstate_enter(cstate);
276         } else {
277                 int unused;
278                 /* IO port based C-state */
279                 inb(cstate->address);
280                 /* Dummy wait op - must do something useless after P_LVL2 read
281                    because chipsets cannot guarantee that STPCLK# signal
282                    gets asserted in time to freeze execution properly. */
283                 unused = inl(acpi_gbl_FADT.xpm_timer_block.address);
284         }
285 }
286 #endif /* !CONFIG_CPU_IDLE */
287
288 #ifdef ARCH_APICTIMER_STOPS_ON_C3
289
290 /*
291  * Some BIOS implementations switch to C3 in the published C2 state.
292  * This seems to be a common problem on AMD boxen, but other vendors
293  * are affected too. We pick the most conservative approach: we assume
294  * that the local APIC stops in both C2 and C3.
295  */
296 static void acpi_timer_check_state(int state, struct acpi_processor *pr,
297                                    struct acpi_processor_cx *cx)
298 {
299         struct acpi_processor_power *pwr = &pr->power;
300         u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
301
302         /*
303          * Check, if one of the previous states already marked the lapic
304          * unstable
305          */
306         if (pwr->timer_broadcast_on_state < state)
307                 return;
308
309         if (cx->type >= type)
310                 pr->power.timer_broadcast_on_state = state;
311 }
312
313 static void acpi_propagate_timer_broadcast(struct acpi_processor *pr)
314 {
315         unsigned long reason;
316
317         reason = pr->power.timer_broadcast_on_state < INT_MAX ?
318                 CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;
319
320         clockevents_notify(reason, &pr->id);
321 }
322
323 /* Power(C) State timer broadcast control */
324 static void acpi_state_timer_broadcast(struct acpi_processor *pr,
325                                        struct acpi_processor_cx *cx,
326                                        int broadcast)
327 {
328         int state = cx - pr->power.states;
329
330         if (state >= pr->power.timer_broadcast_on_state) {
331                 unsigned long reason;
332
333                 reason = broadcast ?  CLOCK_EVT_NOTIFY_BROADCAST_ENTER :
334                         CLOCK_EVT_NOTIFY_BROADCAST_EXIT;
335                 clockevents_notify(reason, &pr->id);
336         }
337 }
338
339 #else
340
341 static void acpi_timer_check_state(int state, struct acpi_processor *pr,
342                                    struct acpi_processor_cx *cstate) { }
343 static void acpi_propagate_timer_broadcast(struct acpi_processor *pr) { }
344 static void acpi_state_timer_broadcast(struct acpi_processor *pr,
345                                        struct acpi_processor_cx *cx,
346                                        int broadcast)
347 {
348 }
349
350 #endif
351
352 /*
353  * Suspend / resume control
354  */
355 static int acpi_idle_suspend;
356
357 int acpi_processor_suspend(struct acpi_device * device, pm_message_t state)
358 {
359         acpi_idle_suspend = 1;
360         return 0;
361 }
362
363 int acpi_processor_resume(struct acpi_device * device)
364 {
365         acpi_idle_suspend = 0;
366         return 0;
367 }
368
369 #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86)
370 static int tsc_halts_in_c(int state)
371 {
372         switch (boot_cpu_data.x86_vendor) {
373         case X86_VENDOR_AMD:
374                 /*
375                  * AMD Fam10h TSC will tick in all
376                  * C/P/S0/S1 states when this bit is set.
377                  */
378                 if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
379                         return 0;
380                 /*FALL THROUGH*/
381         case X86_VENDOR_INTEL:
382                 /* Several cases known where TSC halts in C2 too */
383         default:
384                 return state > ACPI_STATE_C1;
385         }
386 }
387 #endif
388
389 #ifndef CONFIG_CPU_IDLE
390 static void acpi_processor_idle(void)
391 {
392         struct acpi_processor *pr = NULL;
393         struct acpi_processor_cx *cx = NULL;
394         struct acpi_processor_cx *next_state = NULL;
395         int sleep_ticks = 0;
396         u32 t1, t2 = 0;
397
398         /*
399          * Interrupts must be disabled during bus mastering calculations and
400          * for C2/C3 transitions.
401          */
402         local_irq_disable();
403
404         pr = processors[smp_processor_id()];
405         if (!pr) {
406                 local_irq_enable();
407                 return;
408         }
409
410         /*
411          * Check whether we truly need to go idle, or should
412          * reschedule:
413          */
414         if (unlikely(need_resched())) {
415                 local_irq_enable();
416                 return;
417         }
418
419         cx = pr->power.state;
420         if (!cx || acpi_idle_suspend) {
421                 if (pm_idle_save)
422                         pm_idle_save();
423                 else
424                         acpi_safe_halt();
425
426                 if (irqs_disabled())
427                         local_irq_enable();
428
429                 return;
430         }
431
432         /*
433          * Check BM Activity
434          * -----------------
435          * Check for bus mastering activity (if required), record, and check
436          * for demotion.
437          */
438         if (pr->flags.bm_check) {
439                 u32 bm_status = 0;
440                 unsigned long diff = jiffies - pr->power.bm_check_timestamp;
441
442                 if (diff > 31)
443                         diff = 31;
444
445                 pr->power.bm_activity <<= diff;
446
447                 acpi_get_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
448                 if (bm_status) {
449                         pr->power.bm_activity |= 0x1;
450                         acpi_set_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
451                 }
452                 /*
453                  * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
454                  * the true state of bus mastering activity; forcing us to
455                  * manually check the BMIDEA bit of each IDE channel.
456                  */
457                 else if (errata.piix4.bmisx) {
458                         if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
459                             || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
460                                 pr->power.bm_activity |= 0x1;
461                 }
462
463                 pr->power.bm_check_timestamp = jiffies;
464
465                 /*
466                  * If bus mastering is or was active this jiffy, demote
467                  * to avoid a faulty transition.  Note that the processor
468                  * won't enter a low-power state during this call (to this
469                  * function) but should upon the next.
470                  *
471                  * TBD: A better policy might be to fallback to the demotion
472                  *      state (use it for this quantum only) istead of
473                  *      demoting -- and rely on duration as our sole demotion
474                  *      qualification.  This may, however, introduce DMA
475                  *      issues (e.g. floppy DMA transfer overrun/underrun).
476                  */
477                 if ((pr->power.bm_activity & 0x1) &&
478                     cx->demotion.threshold.bm) {
479                         local_irq_enable();
480                         next_state = cx->demotion.state;
481                         goto end;
482                 }
483         }
484
485 #ifdef CONFIG_HOTPLUG_CPU
486         /*
487          * Check for P_LVL2_UP flag before entering C2 and above on
488          * an SMP system. We do it here instead of doing it at _CST/P_LVL
489          * detection phase, to work cleanly with logical CPU hotplug.
490          */
491         if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
492             !pr->flags.has_cst && !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
493                 cx = &pr->power.states[ACPI_STATE_C1];
494 #endif
495
496         /*
497          * Sleep:
498          * ------
499          * Invoke the current Cx state to put the processor to sleep.
500          */
501         if (cx->type == ACPI_STATE_C2 || cx->type == ACPI_STATE_C3) {
502                 current_thread_info()->status &= ~TS_POLLING;
503                 /*
504                  * TS_POLLING-cleared state must be visible before we
505                  * test NEED_RESCHED:
506                  */
507                 smp_mb();
508                 if (need_resched()) {
509                         current_thread_info()->status |= TS_POLLING;
510                         local_irq_enable();
511                         return;
512                 }
513         }
514
515         switch (cx->type) {
516
517         case ACPI_STATE_C1:
518                 /*
519                  * Invoke C1.
520                  * Use the appropriate idle routine, the one that would
521                  * be used without acpi C-states.
522                  */
523                 if (pm_idle_save)
524                         pm_idle_save();
525                 else
526                         acpi_safe_halt();
527
528                 /*
529                  * TBD: Can't get time duration while in C1, as resumes
530                  *      go to an ISR rather than here.  Need to instrument
531                  *      base interrupt handler.
532                  *
533                  * Note: the TSC better not stop in C1, sched_clock() will
534                  *       skew otherwise.
535                  */
536                 sleep_ticks = 0xFFFFFFFF;
537                 if (irqs_disabled())
538                         local_irq_enable();
539
540                 break;
541
542         case ACPI_STATE_C2:
543                 /* Get start time (ticks) */
544                 t1 = inl(acpi_gbl_FADT.xpm_timer_block.address);
545                 /* Tell the scheduler that we are going deep-idle: */
546                 sched_clock_idle_sleep_event();
547                 /* Invoke C2 */
548                 acpi_state_timer_broadcast(pr, cx, 1);
549                 acpi_cstate_enter(cx);
550                 /* Get end time (ticks) */
551                 t2 = inl(acpi_gbl_FADT.xpm_timer_block.address);
552
553 #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86)
554                 /* TSC halts in C2, so notify users */
555                 if (tsc_halts_in_c(ACPI_STATE_C2))
556                         mark_tsc_unstable("possible TSC halt in C2");
557 #endif
558                 /* Compute time (ticks) that we were actually asleep */
559                 sleep_ticks = ticks_elapsed(t1, t2);
560
561                 /* Tell the scheduler how much we idled: */
562                 sched_clock_idle_wakeup_event(sleep_ticks*PM_TIMER_TICK_NS);
563
564                 /* Re-enable interrupts */
565                 local_irq_enable();
566                 /* Do not account our idle-switching overhead: */
567                 sleep_ticks -= cx->latency_ticks + C2_OVERHEAD;
568
569                 current_thread_info()->status |= TS_POLLING;
570                 acpi_state_timer_broadcast(pr, cx, 0);
571                 break;
572
573         case ACPI_STATE_C3:
574                 acpi_unlazy_tlb(smp_processor_id());
575                 /*
576                  * Must be done before busmaster disable as we might
577                  * need to access HPET !
578                  */
579                 acpi_state_timer_broadcast(pr, cx, 1);
580                 /*
581                  * disable bus master
582                  * bm_check implies we need ARB_DIS
583                  * !bm_check implies we need cache flush
584                  * bm_control implies whether we can do ARB_DIS
585                  *
586                  * That leaves a case where bm_check is set and bm_control is
587                  * not set. In that case we cannot do much, we enter C3
588                  * without doing anything.
589                  */
590                 if (pr->flags.bm_check && pr->flags.bm_control) {
591                         if (atomic_inc_return(&c3_cpu_count) ==
592                             num_online_cpus()) {
593                                 /*
594                                  * All CPUs are trying to go to C3
595                                  * Disable bus master arbitration
596                                  */
597                                 acpi_set_register(ACPI_BITREG_ARB_DISABLE, 1);
598                         }
599                 } else if (!pr->flags.bm_check) {
600                         /* SMP with no shared cache... Invalidate cache  */
601                         ACPI_FLUSH_CPU_CACHE();
602                 }
603
604                 /* Get start time (ticks) */
605                 t1 = inl(acpi_gbl_FADT.xpm_timer_block.address);
606                 /* Invoke C3 */
607                 /* Tell the scheduler that we are going deep-idle: */
608                 sched_clock_idle_sleep_event();
609                 acpi_cstate_enter(cx);
610                 /* Get end time (ticks) */
611                 t2 = inl(acpi_gbl_FADT.xpm_timer_block.address);
612                 if (pr->flags.bm_check && pr->flags.bm_control) {
613                         /* Enable bus master arbitration */
614                         atomic_dec(&c3_cpu_count);
615                         acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0);
616                 }
617
618 #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86)
619                 /* TSC halts in C3, so notify users */
620                 if (tsc_halts_in_c(ACPI_STATE_C3))
621                         mark_tsc_unstable("TSC halts in C3");
622 #endif
623                 /* Compute time (ticks) that we were actually asleep */
624                 sleep_ticks = ticks_elapsed(t1, t2);
625                 /* Tell the scheduler how much we idled: */
626                 sched_clock_idle_wakeup_event(sleep_ticks*PM_TIMER_TICK_NS);
627
628                 /* Re-enable interrupts */
629                 local_irq_enable();
630                 /* Do not account our idle-switching overhead: */
631                 sleep_ticks -= cx->latency_ticks + C3_OVERHEAD;
632
633                 current_thread_info()->status |= TS_POLLING;
634                 acpi_state_timer_broadcast(pr, cx, 0);
635                 break;
636
637         default:
638                 local_irq_enable();
639                 return;
640         }
641         cx->usage++;
642         if ((cx->type != ACPI_STATE_C1) && (sleep_ticks > 0))
643                 cx->time += sleep_ticks;
644
645         next_state = pr->power.state;
646
647 #ifdef CONFIG_HOTPLUG_CPU
648         /* Don't do promotion/demotion */
649         if ((cx->type == ACPI_STATE_C1) && (num_online_cpus() > 1) &&
650             !pr->flags.has_cst && !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) {
651                 next_state = cx;
652                 goto end;
653         }
654 #endif
655
656         /*
657          * Promotion?
658          * ----------
659          * Track the number of longs (time asleep is greater than threshold)
660          * and promote when the count threshold is reached.  Note that bus
661          * mastering activity may prevent promotions.
662          * Do not promote above max_cstate.
663          */
664         if (cx->promotion.state &&
665             ((cx->promotion.state - pr->power.states) <= max_cstate)) {
666                 if (sleep_ticks > cx->promotion.threshold.ticks &&
667                   cx->promotion.state->latency <=
668                                 pm_qos_requirement(PM_QOS_CPU_DMA_LATENCY)) {
669                         cx->promotion.count++;
670                         cx->demotion.count = 0;
671                         if (cx->promotion.count >=
672                             cx->promotion.threshold.count) {
673                                 if (pr->flags.bm_check) {
674                                         if (!
675                                             (pr->power.bm_activity & cx->
676                                              promotion.threshold.bm)) {
677                                                 next_state =
678                                                     cx->promotion.state;
679                                                 goto end;
680                                         }
681                                 } else {
682                                         next_state = cx->promotion.state;
683                                         goto end;
684                                 }
685                         }
686                 }
687         }
688
689         /*
690          * Demotion?
691          * ---------
692          * Track the number of shorts (time asleep is less than time threshold)
693          * and demote when the usage threshold is reached.
694          */
695         if (cx->demotion.state) {
696                 if (sleep_ticks < cx->demotion.threshold.ticks) {
697                         cx->demotion.count++;
698                         cx->promotion.count = 0;
699                         if (cx->demotion.count >= cx->demotion.threshold.count) {
700                                 next_state = cx->demotion.state;
701                                 goto end;
702                         }
703                 }
704         }
705
706       end:
707         /*
708          * Demote if current state exceeds max_cstate
709          * or if the latency of the current state is unacceptable
710          */
711         if ((pr->power.state - pr->power.states) > max_cstate ||
712                 pr->power.state->latency >
713                                 pm_qos_requirement(PM_QOS_CPU_DMA_LATENCY)) {
714                 if (cx->demotion.state)
715                         next_state = cx->demotion.state;
716         }
717
718         /*
719          * New Cx State?
720          * -------------
721          * If we're going to start using a new Cx state we must clean up
722          * from the previous and prepare to use the new.
723          */
724         if (next_state != pr->power.state)
725                 acpi_processor_power_activate(pr, next_state);
726 }
727
728 static int acpi_processor_set_power_policy(struct acpi_processor *pr)
729 {
730         unsigned int i;
731         unsigned int state_is_set = 0;
732         struct acpi_processor_cx *lower = NULL;
733         struct acpi_processor_cx *higher = NULL;
734         struct acpi_processor_cx *cx;
735
736
737         if (!pr)
738                 return -EINVAL;
739
740         /*
741          * This function sets the default Cx state policy (OS idle handler).
742          * Our scheme is to promote quickly to C2 but more conservatively
743          * to C3.  We're favoring C2  for its characteristics of low latency
744          * (quick response), good power savings, and ability to allow bus
745          * mastering activity.  Note that the Cx state policy is completely
746          * customizable and can be altered dynamically.
747          */
748
749         /* startup state */
750         for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
751                 cx = &pr->power.states[i];
752                 if (!cx->valid)
753                         continue;
754
755                 if (!state_is_set)
756                         pr->power.state = cx;
757                 state_is_set++;
758                 break;
759         }
760
761         if (!state_is_set)
762                 return -ENODEV;
763
764         /* demotion */
765         for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
766                 cx = &pr->power.states[i];
767                 if (!cx->valid)
768                         continue;
769
770                 if (lower) {
771                         cx->demotion.state = lower;
772                         cx->demotion.threshold.ticks = cx->latency_ticks;
773                         cx->demotion.threshold.count = 1;
774                         if (cx->type == ACPI_STATE_C3)
775                                 cx->demotion.threshold.bm = bm_history;
776                 }
777
778                 lower = cx;
779         }
780
781         /* promotion */
782         for (i = (ACPI_PROCESSOR_MAX_POWER - 1); i > 0; i--) {
783                 cx = &pr->power.states[i];
784                 if (!cx->valid)
785                         continue;
786
787                 if (higher) {
788                         cx->promotion.state = higher;
789                         cx->promotion.threshold.ticks = cx->latency_ticks;
790                         if (cx->type >= ACPI_STATE_C2)
791                                 cx->promotion.threshold.count = 4;
792                         else
793                                 cx->promotion.threshold.count = 10;
794                         if (higher->type == ACPI_STATE_C3)
795                                 cx->promotion.threshold.bm = bm_history;
796                 }
797
798                 higher = cx;
799         }
800
801         return 0;
802 }
803 #endif /* !CONFIG_CPU_IDLE */
804
805 static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
806 {
807
808         if (!pr)
809                 return -EINVAL;
810
811         if (!pr->pblk)
812                 return -ENODEV;
813
814         /* if info is obtained from pblk/fadt, type equals state */
815         pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
816         pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
817
818 #ifndef CONFIG_HOTPLUG_CPU
819         /*
820          * Check for P_LVL2_UP flag before entering C2 and above on
821          * an SMP system.
822          */
823         if ((num_online_cpus() > 1) &&
824             !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
825                 return -ENODEV;
826 #endif
827
828         /* determine C2 and C3 address from pblk */
829         pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
830         pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
831
832         /* determine latencies from FADT */
833         pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.C2latency;
834         pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.C3latency;
835
836         ACPI_DEBUG_PRINT((ACPI_DB_INFO,
837                           "lvl2[0x%08x] lvl3[0x%08x]\n",
838                           pr->power.states[ACPI_STATE_C2].address,
839                           pr->power.states[ACPI_STATE_C3].address));
840
841         return 0;
842 }
843
844 static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
845 {
846         if (!pr->power.states[ACPI_STATE_C1].valid) {
847                 /* set the first C-State to C1 */
848                 /* all processors need to support C1 */
849                 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
850                 pr->power.states[ACPI_STATE_C1].valid = 1;
851         }
852         /* the C0 state only exists as a filler in our array */
853         pr->power.states[ACPI_STATE_C0].valid = 1;
854         return 0;
855 }
856
857 static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
858 {
859         acpi_status status = 0;
860         acpi_integer count;
861         int current_count;
862         int i;
863         struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
864         union acpi_object *cst;
865
866
867         if (nocst)
868                 return -ENODEV;
869
870         current_count = 0;
871
872         status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
873         if (ACPI_FAILURE(status)) {
874                 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
875                 return -ENODEV;
876         }
877
878         cst = buffer.pointer;
879
880         /* There must be at least 2 elements */
881         if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
882                 printk(KERN_ERR PREFIX "not enough elements in _CST\n");
883                 status = -EFAULT;
884                 goto end;
885         }
886
887         count = cst->package.elements[0].integer.value;
888
889         /* Validate number of power states. */
890         if (count < 1 || count != cst->package.count - 1) {
891                 printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
892                 status = -EFAULT;
893                 goto end;
894         }
895
896         /* Tell driver that at least _CST is supported. */
897         pr->flags.has_cst = 1;
898
899         for (i = 1; i <= count; i++) {
900                 union acpi_object *element;
901                 union acpi_object *obj;
902                 struct acpi_power_register *reg;
903                 struct acpi_processor_cx cx;
904
905                 memset(&cx, 0, sizeof(cx));
906
907                 element = &(cst->package.elements[i]);
908                 if (element->type != ACPI_TYPE_PACKAGE)
909                         continue;
910
911                 if (element->package.count != 4)
912                         continue;
913
914                 obj = &(element->package.elements[0]);
915
916                 if (obj->type != ACPI_TYPE_BUFFER)
917                         continue;
918
919                 reg = (struct acpi_power_register *)obj->buffer.pointer;
920
921                 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
922                     (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
923                         continue;
924
925                 /* There should be an easy way to extract an integer... */
926                 obj = &(element->package.elements[1]);
927                 if (obj->type != ACPI_TYPE_INTEGER)
928                         continue;
929
930                 cx.type = obj->integer.value;
931                 /*
932                  * Some buggy BIOSes won't list C1 in _CST -
933                  * Let acpi_processor_get_power_info_default() handle them later
934                  */
935                 if (i == 1 && cx.type != ACPI_STATE_C1)
936                         current_count++;
937
938                 cx.address = reg->address;
939                 cx.index = current_count + 1;
940
941                 cx.entry_method = ACPI_CSTATE_SYSTEMIO;
942                 if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
943                         if (acpi_processor_ffh_cstate_probe
944                                         (pr->id, &cx, reg) == 0) {
945                                 cx.entry_method = ACPI_CSTATE_FFH;
946                         } else if (cx.type == ACPI_STATE_C1) {
947                                 /*
948                                  * C1 is a special case where FIXED_HARDWARE
949                                  * can be handled in non-MWAIT way as well.
950                                  * In that case, save this _CST entry info.
951                                  * Otherwise, ignore this info and continue.
952                                  */
953                                 cx.entry_method = ACPI_CSTATE_HALT;
954                                 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
955                         } else {
956                                 continue;
957                         }
958                 } else {
959                         snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x",
960                                  cx.address);
961                 }
962
963
964                 obj = &(element->package.elements[2]);
965                 if (obj->type != ACPI_TYPE_INTEGER)
966                         continue;
967
968                 cx.latency = obj->integer.value;
969
970                 obj = &(element->package.elements[3]);
971                 if (obj->type != ACPI_TYPE_INTEGER)
972                         continue;
973
974                 cx.power = obj->integer.value;
975
976                 current_count++;
977                 memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
978
979                 /*
980                  * We support total ACPI_PROCESSOR_MAX_POWER - 1
981                  * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
982                  */
983                 if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
984                         printk(KERN_WARNING
985                                "Limiting number of power states to max (%d)\n",
986                                ACPI_PROCESSOR_MAX_POWER);
987                         printk(KERN_WARNING
988                                "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
989                         break;
990                 }
991         }
992
993         ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
994                           current_count));
995
996         /* Validate number of power states discovered */
997         if (current_count < 2)
998                 status = -EFAULT;
999
1000       end:
1001         kfree(buffer.pointer);
1002
1003         return status;
1004 }
1005
1006 static void acpi_processor_power_verify_c2(struct acpi_processor_cx *cx)
1007 {
1008
1009         if (!cx->address)
1010                 return;
1011
1012         /*
1013          * C2 latency must be less than or equal to 100
1014          * microseconds.
1015          */
1016         else if (cx->latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
1017                 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1018                                   "latency too large [%d]\n", cx->latency));
1019                 return;
1020         }
1021
1022         /*
1023          * Otherwise we've met all of our C2 requirements.
1024          * Normalize the C2 latency to expidite policy
1025          */
1026         cx->valid = 1;
1027
1028 #ifndef CONFIG_CPU_IDLE
1029         cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency);
1030 #else
1031         cx->latency_ticks = cx->latency;
1032 #endif
1033
1034         return;
1035 }
1036
1037 static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
1038                                            struct acpi_processor_cx *cx)
1039 {
1040         static int bm_check_flag;
1041
1042
1043         if (!cx->address)
1044                 return;
1045
1046         /*
1047          * C3 latency must be less than or equal to 1000
1048          * microseconds.
1049          */
1050         else if (cx->latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
1051                 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1052                                   "latency too large [%d]\n", cx->latency));
1053                 return;
1054         }
1055
1056         /*
1057          * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
1058          * DMA transfers are used by any ISA device to avoid livelock.
1059          * Note that we could disable Type-F DMA (as recommended by
1060          * the erratum), but this is known to disrupt certain ISA
1061          * devices thus we take the conservative approach.
1062          */
1063         else if (errata.piix4.fdma) {
1064                 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1065                                   "C3 not supported on PIIX4 with Type-F DMA\n"));
1066                 return;
1067         }
1068
1069         /* All the logic here assumes flags.bm_check is same across all CPUs */
1070         if (!bm_check_flag) {
1071                 /* Determine whether bm_check is needed based on CPU  */
1072                 acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
1073                 bm_check_flag = pr->flags.bm_check;
1074         } else {
1075                 pr->flags.bm_check = bm_check_flag;
1076         }
1077
1078         if (pr->flags.bm_check) {
1079                 if (!pr->flags.bm_control) {
1080                         if (pr->flags.has_cst != 1) {
1081                                 /* bus mastering control is necessary */
1082                                 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1083                                         "C3 support requires BM control\n"));
1084                                 return;
1085                         } else {
1086                                 /* Here we enter C3 without bus mastering */
1087                                 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1088                                         "C3 support without BM control\n"));
1089                         }
1090                 }
1091         } else {
1092                 /*
1093                  * WBINVD should be set in fadt, for C3 state to be
1094                  * supported on when bm_check is not required.
1095                  */
1096                 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
1097                         ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1098                                           "Cache invalidation should work properly"
1099                                           " for C3 to be enabled on SMP systems\n"));
1100                         return;
1101                 }
1102                 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0);
1103         }
1104
1105         /*
1106          * Otherwise we've met all of our C3 requirements.
1107          * Normalize the C3 latency to expidite policy.  Enable
1108          * checking of bus mastering status (bm_check) so we can
1109          * use this in our C3 policy
1110          */
1111         cx->valid = 1;
1112
1113 #ifndef CONFIG_CPU_IDLE
1114         cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency);
1115 #else
1116         cx->latency_ticks = cx->latency;
1117 #endif
1118
1119         return;
1120 }
1121
1122 static int acpi_processor_power_verify(struct acpi_processor *pr)
1123 {
1124         unsigned int i;
1125         unsigned int working = 0;
1126
1127         pr->power.timer_broadcast_on_state = INT_MAX;
1128
1129         for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
1130                 struct acpi_processor_cx *cx = &pr->power.states[i];
1131
1132                 switch (cx->type) {
1133                 case ACPI_STATE_C1:
1134                         cx->valid = 1;
1135                         break;
1136
1137                 case ACPI_STATE_C2:
1138                         acpi_processor_power_verify_c2(cx);
1139                         if (cx->valid)
1140                                 acpi_timer_check_state(i, pr, cx);
1141                         break;
1142
1143                 case ACPI_STATE_C3:
1144                         acpi_processor_power_verify_c3(pr, cx);
1145                         if (cx->valid)
1146                                 acpi_timer_check_state(i, pr, cx);
1147                         break;
1148                 }
1149
1150                 if (cx->valid)
1151                         working++;
1152         }
1153
1154         acpi_propagate_timer_broadcast(pr);
1155
1156         return (working);
1157 }
1158
1159 static int acpi_processor_get_power_info(struct acpi_processor *pr)
1160 {
1161         unsigned int i;
1162         int result;
1163
1164
1165         /* NOTE: the idle thread may not be running while calling
1166          * this function */
1167
1168         /* Zero initialize all the C-states info. */
1169         memset(pr->power.states, 0, sizeof(pr->power.states));
1170
1171         result = acpi_processor_get_power_info_cst(pr);
1172         if (result == -ENODEV)
1173                 result = acpi_processor_get_power_info_fadt(pr);
1174
1175         if (result)
1176                 return result;
1177
1178         acpi_processor_get_power_info_default(pr);
1179
1180         pr->power.count = acpi_processor_power_verify(pr);
1181
1182 #ifndef CONFIG_CPU_IDLE
1183         /*
1184          * Set Default Policy
1185          * ------------------
1186          * Now that we know which states are supported, set the default
1187          * policy.  Note that this policy can be changed dynamically
1188          * (e.g. encourage deeper sleeps to conserve battery life when
1189          * not on AC).
1190          */
1191         result = acpi_processor_set_power_policy(pr);
1192         if (result)
1193                 return result;
1194 #endif
1195
1196         /*
1197          * if one state of type C2 or C3 is available, mark this
1198          * CPU as being "idle manageable"
1199          */
1200         for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
1201                 if (pr->power.states[i].valid) {
1202                         pr->power.count = i;
1203                         if (pr->power.states[i].type >= ACPI_STATE_C2)
1204                                 pr->flags.power = 1;
1205                 }
1206         }
1207
1208         return 0;
1209 }
1210
1211 static int acpi_processor_power_seq_show(struct seq_file *seq, void *offset)
1212 {
1213         struct acpi_processor *pr = seq->private;
1214         unsigned int i;
1215
1216
1217         if (!pr)
1218                 goto end;
1219
1220         seq_printf(seq, "active state:            C%zd\n"
1221                    "max_cstate:              C%d\n"
1222                    "bus master activity:     %08x\n"
1223                    "maximum allowed latency: %d usec\n",
1224                    pr->power.state ? pr->power.state - pr->power.states : 0,
1225                    max_cstate, (unsigned)pr->power.bm_activity,
1226                    pm_qos_requirement(PM_QOS_CPU_DMA_LATENCY));
1227
1228         seq_puts(seq, "states:\n");
1229
1230         for (i = 1; i <= pr->power.count; i++) {
1231                 seq_printf(seq, "   %cC%d:                  ",
1232                            (&pr->power.states[i] ==
1233                             pr->power.state ? '*' : ' '), i);
1234
1235                 if (!pr->power.states[i].valid) {
1236                         seq_puts(seq, "<not supported>\n");
1237                         continue;
1238                 }
1239
1240                 switch (pr->power.states[i].type) {
1241                 case ACPI_STATE_C1:
1242                         seq_printf(seq, "type[C1] ");
1243                         break;
1244                 case ACPI_STATE_C2:
1245                         seq_printf(seq, "type[C2] ");
1246                         break;
1247                 case ACPI_STATE_C3:
1248                         seq_printf(seq, "type[C3] ");
1249                         break;
1250                 default:
1251                         seq_printf(seq, "type[--] ");
1252                         break;
1253                 }
1254
1255                 if (pr->power.states[i].promotion.state)
1256                         seq_printf(seq, "promotion[C%zd] ",
1257                                    (pr->power.states[i].promotion.state -
1258                                     pr->power.states));
1259                 else
1260                         seq_puts(seq, "promotion[--] ");
1261
1262                 if (pr->power.states[i].demotion.state)
1263                         seq_printf(seq, "demotion[C%zd] ",
1264                                    (pr->power.states[i].demotion.state -
1265                                     pr->power.states));
1266                 else
1267                         seq_puts(seq, "demotion[--] ");
1268
1269                 seq_printf(seq, "latency[%03d] usage[%08d] duration[%020llu]\n",
1270                            pr->power.states[i].latency,
1271                            pr->power.states[i].usage,
1272                            (unsigned long long)pr->power.states[i].time);
1273         }
1274
1275       end:
1276         return 0;
1277 }
1278
1279 static int acpi_processor_power_open_fs(struct inode *inode, struct file *file)
1280 {
1281         return single_open(file, acpi_processor_power_seq_show,
1282                            PDE(inode)->data);
1283 }
1284
1285 static const struct file_operations acpi_processor_power_fops = {
1286         .open = acpi_processor_power_open_fs,
1287         .read = seq_read,
1288         .llseek = seq_lseek,
1289         .release = single_release,
1290 };
1291
1292 #ifndef CONFIG_CPU_IDLE
1293
1294 int acpi_processor_cst_has_changed(struct acpi_processor *pr)
1295 {
1296         int result = 0;
1297
1298
1299         if (!pr)
1300                 return -EINVAL;
1301
1302         if (nocst) {
1303                 return -ENODEV;
1304         }
1305
1306         if (!pr->flags.power_setup_done)
1307                 return -ENODEV;
1308
1309         /* Fall back to the default idle loop */
1310         pm_idle = pm_idle_save;
1311         synchronize_sched();    /* Relies on interrupts forcing exit from idle. */
1312
1313         pr->flags.power = 0;
1314         result = acpi_processor_get_power_info(pr);
1315         if ((pr->flags.power == 1) && (pr->flags.power_setup_done))
1316                 pm_idle = acpi_processor_idle;
1317
1318         return result;
1319 }
1320
1321 #ifdef CONFIG_SMP
1322 static void smp_callback(void *v)
1323 {
1324         /* we already woke the CPU up, nothing more to do */
1325 }
1326
1327 /*
1328  * This function gets called when a part of the kernel has a new latency
1329  * requirement.  This means we need to get all processors out of their C-state,
1330  * and then recalculate a new suitable C-state. Just do a cross-cpu IPI; that
1331  * wakes them all right up.
1332  */
1333 static int acpi_processor_latency_notify(struct notifier_block *b,
1334                 unsigned long l, void *v)
1335 {
1336         smp_call_function(smp_callback, NULL, 0, 1);
1337         return NOTIFY_OK;
1338 }
1339
1340 static struct notifier_block acpi_processor_latency_notifier = {
1341         .notifier_call = acpi_processor_latency_notify,
1342 };
1343
1344 #endif
1345
1346 #else /* CONFIG_CPU_IDLE */
1347
1348 /**
1349  * acpi_idle_bm_check - checks if bus master activity was detected
1350  */
1351 static int acpi_idle_bm_check(void)
1352 {
1353         u32 bm_status = 0;
1354
1355         acpi_get_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
1356         if (bm_status)
1357                 acpi_set_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
1358         /*
1359          * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
1360          * the true state of bus mastering activity; forcing us to
1361          * manually check the BMIDEA bit of each IDE channel.
1362          */
1363         else if (errata.piix4.bmisx) {
1364                 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
1365                     || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
1366                         bm_status = 1;
1367         }
1368         return bm_status;
1369 }
1370
1371 /**
1372  * acpi_idle_update_bm_rld - updates the BM_RLD bit depending on target state
1373  * @pr: the processor
1374  * @target: the new target state
1375  */
1376 static inline void acpi_idle_update_bm_rld(struct acpi_processor *pr,
1377                                            struct acpi_processor_cx *target)
1378 {
1379         if (pr->flags.bm_rld_set && target->type != ACPI_STATE_C3) {
1380                 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0);
1381                 pr->flags.bm_rld_set = 0;
1382         }
1383
1384         if (!pr->flags.bm_rld_set && target->type == ACPI_STATE_C3) {
1385                 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
1386                 pr->flags.bm_rld_set = 1;
1387         }
1388 }
1389
1390 /**
1391  * acpi_idle_do_entry - a helper function that does C2 and C3 type entry
1392  * @cx: cstate data
1393  *
1394  * Caller disables interrupt before call and enables interrupt after return.
1395  */
1396 static inline void acpi_idle_do_entry(struct acpi_processor_cx *cx)
1397 {
1398         if (cx->entry_method == ACPI_CSTATE_FFH) {
1399                 /* Call into architectural FFH based C-state */
1400                 acpi_processor_ffh_cstate_enter(cx);
1401         } else if (cx->entry_method == ACPI_CSTATE_HALT) {
1402                 acpi_safe_halt();
1403         } else {
1404                 int unused;
1405                 /* IO port based C-state */
1406                 inb(cx->address);
1407                 /* Dummy wait op - must do something useless after P_LVL2 read
1408                    because chipsets cannot guarantee that STPCLK# signal
1409                    gets asserted in time to freeze execution properly. */
1410                 unused = inl(acpi_gbl_FADT.xpm_timer_block.address);
1411         }
1412 }
1413
1414 /**
1415  * acpi_idle_enter_c1 - enters an ACPI C1 state-type
1416  * @dev: the target CPU
1417  * @state: the state data
1418  *
1419  * This is equivalent to the HALT instruction.
1420  */
1421 static int acpi_idle_enter_c1(struct cpuidle_device *dev,
1422                               struct cpuidle_state *state)
1423 {
1424         u32 t1, t2;
1425         struct acpi_processor *pr;
1426         struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
1427
1428         pr = processors[smp_processor_id()];
1429
1430         if (unlikely(!pr))
1431                 return 0;
1432
1433         local_irq_disable();
1434
1435         /* Do not access any ACPI IO ports in suspend path */
1436         if (acpi_idle_suspend) {
1437                 acpi_safe_halt();
1438                 local_irq_enable();
1439                 return 0;
1440         }
1441
1442         if (pr->flags.bm_check)
1443                 acpi_idle_update_bm_rld(pr, cx);
1444
1445         t1 = inl(acpi_gbl_FADT.xpm_timer_block.address);
1446         acpi_idle_do_entry(cx);
1447         t2 = inl(acpi_gbl_FADT.xpm_timer_block.address);
1448
1449         local_irq_enable();
1450         cx->usage++;
1451
1452         return ticks_elapsed_in_us(t1, t2);
1453 }
1454
1455 /**
1456  * acpi_idle_enter_simple - enters an ACPI state without BM handling
1457  * @dev: the target CPU
1458  * @state: the state data
1459  */
1460 static int acpi_idle_enter_simple(struct cpuidle_device *dev,
1461                                   struct cpuidle_state *state)
1462 {
1463         struct acpi_processor *pr;
1464         struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
1465         u32 t1, t2;
1466         int sleep_ticks = 0;
1467
1468         pr = processors[smp_processor_id()];
1469
1470         if (unlikely(!pr))
1471                 return 0;
1472
1473         if (acpi_idle_suspend)
1474                 return(acpi_idle_enter_c1(dev, state));
1475
1476         local_irq_disable();
1477         current_thread_info()->status &= ~TS_POLLING;
1478         /*
1479          * TS_POLLING-cleared state must be visible before we test
1480          * NEED_RESCHED:
1481          */
1482         smp_mb();
1483
1484         if (unlikely(need_resched())) {
1485                 current_thread_info()->status |= TS_POLLING;
1486                 local_irq_enable();
1487                 return 0;
1488         }
1489
1490         acpi_unlazy_tlb(smp_processor_id());
1491         /*
1492          * Must be done before busmaster disable as we might need to
1493          * access HPET !
1494          */
1495         acpi_state_timer_broadcast(pr, cx, 1);
1496
1497         if (pr->flags.bm_check)
1498                 acpi_idle_update_bm_rld(pr, cx);
1499
1500         if (cx->type == ACPI_STATE_C3)
1501                 ACPI_FLUSH_CPU_CACHE();
1502
1503         t1 = inl(acpi_gbl_FADT.xpm_timer_block.address);
1504         /* Tell the scheduler that we are going deep-idle: */
1505         sched_clock_idle_sleep_event();
1506         acpi_idle_do_entry(cx);
1507         t2 = inl(acpi_gbl_FADT.xpm_timer_block.address);
1508
1509 #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86)
1510         /* TSC could halt in idle, so notify users */
1511         if (tsc_halts_in_c(cx->type))
1512                 mark_tsc_unstable("TSC halts in idle");;
1513 #endif
1514         sleep_ticks = ticks_elapsed(t1, t2);
1515
1516         /* Tell the scheduler how much we idled: */
1517         sched_clock_idle_wakeup_event(sleep_ticks*PM_TIMER_TICK_NS);
1518
1519         local_irq_enable();
1520         current_thread_info()->status |= TS_POLLING;
1521
1522         cx->usage++;
1523
1524         acpi_state_timer_broadcast(pr, cx, 0);
1525         cx->time += sleep_ticks;
1526         return ticks_elapsed_in_us(t1, t2);
1527 }
1528
1529 static int c3_cpu_count;
1530 static DEFINE_SPINLOCK(c3_lock);
1531
1532 /**
1533  * acpi_idle_enter_bm - enters C3 with proper BM handling
1534  * @dev: the target CPU
1535  * @state: the state data
1536  *
1537  * If BM is detected, the deepest non-C3 idle state is entered instead.
1538  */
1539 static int acpi_idle_enter_bm(struct cpuidle_device *dev,
1540                               struct cpuidle_state *state)
1541 {
1542         struct acpi_processor *pr;
1543         struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
1544         u32 t1, t2;
1545         int sleep_ticks = 0;
1546
1547         pr = processors[smp_processor_id()];
1548
1549         if (unlikely(!pr))
1550                 return 0;
1551
1552         if (acpi_idle_suspend)
1553                 return(acpi_idle_enter_c1(dev, state));
1554
1555         if (acpi_idle_bm_check()) {
1556                 if (dev->safe_state) {
1557                         return dev->safe_state->enter(dev, dev->safe_state);
1558                 } else {
1559                         local_irq_disable();
1560                         acpi_safe_halt();
1561                         local_irq_enable();
1562                         return 0;
1563                 }
1564         }
1565
1566         local_irq_disable();
1567         current_thread_info()->status &= ~TS_POLLING;
1568         /*
1569          * TS_POLLING-cleared state must be visible before we test
1570          * NEED_RESCHED:
1571          */
1572         smp_mb();
1573
1574         if (unlikely(need_resched())) {
1575                 current_thread_info()->status |= TS_POLLING;
1576                 local_irq_enable();
1577                 return 0;
1578         }
1579
1580         /* Tell the scheduler that we are going deep-idle: */
1581         sched_clock_idle_sleep_event();
1582         /*
1583          * Must be done before busmaster disable as we might need to
1584          * access HPET !
1585          */
1586         acpi_state_timer_broadcast(pr, cx, 1);
1587
1588         acpi_idle_update_bm_rld(pr, cx);
1589
1590         /*
1591          * disable bus master
1592          * bm_check implies we need ARB_DIS
1593          * !bm_check implies we need cache flush
1594          * bm_control implies whether we can do ARB_DIS
1595          *
1596          * That leaves a case where bm_check is set and bm_control is
1597          * not set. In that case we cannot do much, we enter C3
1598          * without doing anything.
1599          */
1600         if (pr->flags.bm_check && pr->flags.bm_control) {
1601                 spin_lock(&c3_lock);
1602                 c3_cpu_count++;
1603                 /* Disable bus master arbitration when all CPUs are in C3 */
1604                 if (c3_cpu_count == num_online_cpus())
1605                         acpi_set_register(ACPI_BITREG_ARB_DISABLE, 1);
1606                 spin_unlock(&c3_lock);
1607         } else if (!pr->flags.bm_check) {
1608                 ACPI_FLUSH_CPU_CACHE();
1609         }
1610
1611         t1 = inl(acpi_gbl_FADT.xpm_timer_block.address);
1612         acpi_idle_do_entry(cx);
1613         t2 = inl(acpi_gbl_FADT.xpm_timer_block.address);
1614
1615         /* Re-enable bus master arbitration */
1616         if (pr->flags.bm_check && pr->flags.bm_control) {
1617                 spin_lock(&c3_lock);
1618                 acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0);
1619                 c3_cpu_count--;
1620                 spin_unlock(&c3_lock);
1621         }
1622
1623 #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86)
1624         /* TSC could halt in idle, so notify users */
1625         if (tsc_halts_in_c(ACPI_STATE_C3))
1626                 mark_tsc_unstable("TSC halts in idle");
1627 #endif
1628         sleep_ticks = ticks_elapsed(t1, t2);
1629         /* Tell the scheduler how much we idled: */
1630         sched_clock_idle_wakeup_event(sleep_ticks*PM_TIMER_TICK_NS);
1631
1632         local_irq_enable();
1633         current_thread_info()->status |= TS_POLLING;
1634
1635         cx->usage++;
1636
1637         acpi_state_timer_broadcast(pr, cx, 0);
1638         cx->time += sleep_ticks;
1639         return ticks_elapsed_in_us(t1, t2);
1640 }
1641
1642 struct cpuidle_driver acpi_idle_driver = {
1643         .name =         "acpi_idle",
1644         .owner =        THIS_MODULE,
1645 };
1646
1647 /**
1648  * acpi_processor_setup_cpuidle - prepares and configures CPUIDLE
1649  * @pr: the ACPI processor
1650  */
1651 static int acpi_processor_setup_cpuidle(struct acpi_processor *pr)
1652 {
1653         int i, count = CPUIDLE_DRIVER_STATE_START;
1654         struct acpi_processor_cx *cx;
1655         struct cpuidle_state *state;
1656         struct cpuidle_device *dev = &pr->power.dev;
1657
1658         if (!pr->flags.power_setup_done)
1659                 return -EINVAL;
1660
1661         if (pr->flags.power == 0) {
1662                 return -EINVAL;
1663         }
1664
1665         for (i = 0; i < CPUIDLE_STATE_MAX; i++) {
1666                 dev->states[i].name[0] = '\0';
1667                 dev->states[i].desc[0] = '\0';
1668         }
1669
1670         for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
1671                 cx = &pr->power.states[i];
1672                 state = &dev->states[count];
1673
1674                 if (!cx->valid)
1675                         continue;
1676
1677 #ifdef CONFIG_HOTPLUG_CPU
1678                 if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
1679                     !pr->flags.has_cst &&
1680                     !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
1681                         continue;
1682 #endif
1683                 cpuidle_set_statedata(state, cx);
1684
1685                 snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
1686                 strncpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
1687                 state->exit_latency = cx->latency;
1688                 state->target_residency = cx->latency * latency_factor;
1689                 state->power_usage = cx->power;
1690
1691                 state->flags = 0;
1692                 switch (cx->type) {
1693                         case ACPI_STATE_C1:
1694                         state->flags |= CPUIDLE_FLAG_SHALLOW;
1695                         state->flags |= CPUIDLE_FLAG_TIME_VALID;
1696                         state->enter = acpi_idle_enter_c1;
1697                         dev->safe_state = state;
1698                         break;
1699
1700                         case ACPI_STATE_C2:
1701                         state->flags |= CPUIDLE_FLAG_BALANCED;
1702                         state->flags |= CPUIDLE_FLAG_TIME_VALID;
1703                         state->enter = acpi_idle_enter_simple;
1704                         dev->safe_state = state;
1705                         break;
1706
1707                         case ACPI_STATE_C3:
1708                         state->flags |= CPUIDLE_FLAG_DEEP;
1709                         state->flags |= CPUIDLE_FLAG_TIME_VALID;
1710                         state->flags |= CPUIDLE_FLAG_CHECK_BM;
1711                         state->enter = pr->flags.bm_check ?
1712                                         acpi_idle_enter_bm :
1713                                         acpi_idle_enter_simple;
1714                         break;
1715                 }
1716
1717                 count++;
1718                 if (count == CPUIDLE_STATE_MAX)
1719                         break;
1720         }
1721
1722         dev->state_count = count;
1723
1724         if (!count)
1725                 return -EINVAL;
1726
1727         return 0;
1728 }
1729
1730 int acpi_processor_cst_has_changed(struct acpi_processor *pr)
1731 {
1732         int ret;
1733
1734         if (!pr)
1735                 return -EINVAL;
1736
1737         if (nocst) {
1738                 return -ENODEV;
1739         }
1740
1741         if (!pr->flags.power_setup_done)
1742                 return -ENODEV;
1743
1744         cpuidle_pause_and_lock();
1745         cpuidle_disable_device(&pr->power.dev);
1746         acpi_processor_get_power_info(pr);
1747         acpi_processor_setup_cpuidle(pr);
1748         ret = cpuidle_enable_device(&pr->power.dev);
1749         cpuidle_resume_and_unlock();
1750
1751         return ret;
1752 }
1753
1754 #endif /* CONFIG_CPU_IDLE */
1755
1756 int __cpuinit acpi_processor_power_init(struct acpi_processor *pr,
1757                               struct acpi_device *device)
1758 {
1759         acpi_status status = 0;
1760         static int first_run;
1761         struct proc_dir_entry *entry = NULL;
1762         unsigned int i;
1763
1764
1765         if (!first_run) {
1766                 dmi_check_system(processor_power_dmi_table);
1767                 max_cstate = acpi_processor_cstate_check(max_cstate);
1768                 if (max_cstate < ACPI_C_STATES_MAX)
1769                         printk(KERN_NOTICE
1770                                "ACPI: processor limited to max C-state %d\n",
1771                                max_cstate);
1772                 first_run++;
1773 #if !defined(CONFIG_CPU_IDLE) && defined(CONFIG_SMP)
1774                 pm_qos_add_notifier(PM_QOS_CPU_DMA_LATENCY,
1775                                 &acpi_processor_latency_notifier);
1776 #endif
1777         }
1778
1779         if (!pr)
1780                 return -EINVAL;
1781
1782         if (acpi_gbl_FADT.cst_control && !nocst) {
1783                 status =
1784                     acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8);
1785                 if (ACPI_FAILURE(status)) {
1786                         ACPI_EXCEPTION((AE_INFO, status,
1787                                         "Notifying BIOS of _CST ability failed"));
1788                 }
1789         }
1790
1791         acpi_processor_get_power_info(pr);
1792         pr->flags.power_setup_done = 1;
1793
1794         /*
1795          * Install the idle handler if processor power management is supported.
1796          * Note that we use previously set idle handler will be used on
1797          * platforms that only support C1.
1798          */
1799         if ((pr->flags.power) && (!boot_option_idle_override)) {
1800 #ifdef CONFIG_CPU_IDLE
1801                 acpi_processor_setup_cpuidle(pr);
1802                 pr->power.dev.cpu = pr->id;
1803                 if (cpuidle_register_device(&pr->power.dev))
1804                         return -EIO;
1805 #endif
1806
1807                 printk(KERN_INFO PREFIX "CPU%d (power states:", pr->id);
1808                 for (i = 1; i <= pr->power.count; i++)
1809                         if (pr->power.states[i].valid)
1810                                 printk(" C%d[C%d]", i,
1811                                        pr->power.states[i].type);
1812                 printk(")\n");
1813
1814 #ifndef CONFIG_CPU_IDLE
1815                 if (pr->id == 0) {
1816                         pm_idle_save = pm_idle;
1817                         pm_idle = acpi_processor_idle;
1818                 }
1819 #endif
1820         }
1821
1822         /* 'power' [R] */
1823         entry = create_proc_entry(ACPI_PROCESSOR_FILE_POWER,
1824                                   S_IRUGO, acpi_device_dir(device));
1825         if (!entry)
1826                 return -EIO;
1827         else {
1828                 entry->proc_fops = &acpi_processor_power_fops;
1829                 entry->data = acpi_driver_data(device);
1830                 entry->owner = THIS_MODULE;
1831         }
1832
1833         return 0;
1834 }
1835
1836 int acpi_processor_power_exit(struct acpi_processor *pr,
1837                               struct acpi_device *device)
1838 {
1839 #ifdef CONFIG_CPU_IDLE
1840         if ((pr->flags.power) && (!boot_option_idle_override))
1841                 cpuidle_unregister_device(&pr->power.dev);
1842 #endif
1843         pr->flags.power_setup_done = 0;
1844
1845         if (acpi_device_dir(device))
1846                 remove_proc_entry(ACPI_PROCESSOR_FILE_POWER,
1847                                   acpi_device_dir(device));
1848
1849 #ifndef CONFIG_CPU_IDLE
1850
1851         /* Unregister the idle handler when processor #0 is removed. */
1852         if (pr->id == 0) {
1853                 pm_idle = pm_idle_save;
1854
1855                 /*
1856                  * We are about to unload the current idle thread pm callback
1857                  * (pm_idle), Wait for all processors to update cached/local
1858                  * copies of pm_idle before proceeding.
1859                  */
1860                 cpu_idle_wait();
1861 #ifdef CONFIG_SMP
1862                 pm_qos_remove_notifier(PM_QOS_CPU_DMA_LATENCY,
1863                                 &acpi_processor_latency_notifier);
1864 #endif
1865         }
1866 #endif
1867
1868         return 0;
1869 }