Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
[sfrench/cifs-2.6.git] / drivers / acpi / processor_idle.c
1 /*
2  * processor_idle - idle state submodule to the ACPI processor driver
3  *
4  *  Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5  *  Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6  *  Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
7  *  Copyright (C) 2004  Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8  *                      - Added processor hotplug support
9  *  Copyright (C) 2005  Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10  *                      - Added support for C3 on SMP
11  *
12  * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
13  *
14  *  This program is free software; you can redistribute it and/or modify
15  *  it under the terms of the GNU General Public License as published by
16  *  the Free Software Foundation; either version 2 of the License, or (at
17  *  your option) any later version.
18  *
19  *  This program is distributed in the hope that it will be useful, but
20  *  WITHOUT ANY WARRANTY; without even the implied warranty of
21  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
22  *  General Public License for more details.
23  *
24  *  You should have received a copy of the GNU General Public License along
25  *  with this program; if not, write to the Free Software Foundation, Inc.,
26  *  59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
27  *
28  * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
29  */
30
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/init.h>
34 #include <linux/cpufreq.h>
35 #include <linux/slab.h>
36 #include <linux/proc_fs.h>
37 #include <linux/seq_file.h>
38 #include <linux/acpi.h>
39 #include <linux/dmi.h>
40 #include <linux/moduleparam.h>
41 #include <linux/sched.h>        /* need_resched() */
42 #include <linux/pm_qos_params.h>
43 #include <linux/clockchips.h>
44 #include <linux/cpuidle.h>
45 #include <linux/irqflags.h>
46
47 /*
48  * Include the apic definitions for x86 to have the APIC timer related defines
49  * available also for UP (on SMP it gets magically included via linux/smp.h).
50  * asm/acpi.h is not an option, as it would require more include magic. Also
51  * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
52  */
53 #ifdef CONFIG_X86
54 #include <asm/apic.h>
55 #endif
56
57 #include <asm/io.h>
58 #include <asm/uaccess.h>
59
60 #include <acpi/acpi_bus.h>
61 #include <acpi/processor.h>
62 #include <asm/processor.h>
63
64 #define PREFIX "ACPI: "
65
66 #define ACPI_PROCESSOR_CLASS            "processor"
67 #define _COMPONENT              ACPI_PROCESSOR_COMPONENT
68 ACPI_MODULE_NAME("processor_idle");
69 #define ACPI_PROCESSOR_FILE_POWER       "power"
70 #define PM_TIMER_TICK_NS                (1000000000ULL/PM_TIMER_FREQUENCY)
71 #define C2_OVERHEAD                     1       /* 1us */
72 #define C3_OVERHEAD                     1       /* 1us */
73 #define PM_TIMER_TICKS_TO_US(p)         (((p) * 1000)/(PM_TIMER_FREQUENCY/1000))
74
75 static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
76 module_param(max_cstate, uint, 0000);
77 static unsigned int nocst __read_mostly;
78 module_param(nocst, uint, 0000);
79
80 static unsigned int latency_factor __read_mostly = 2;
81 module_param(latency_factor, uint, 0644);
82
83 static u64 us_to_pm_timer_ticks(s64 t)
84 {
85         return div64_u64(t * PM_TIMER_FREQUENCY, 1000000);
86 }
87 /*
88  * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
89  * For now disable this. Probably a bug somewhere else.
90  *
91  * To skip this limit, boot/load with a large max_cstate limit.
92  */
93 static int set_max_cstate(const struct dmi_system_id *id)
94 {
95         if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
96                 return 0;
97
98         printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
99                " Override with \"processor.max_cstate=%d\"\n", id->ident,
100                (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
101
102         max_cstate = (long)id->driver_data;
103
104         return 0;
105 }
106
107 /* Actually this shouldn't be __cpuinitdata, would be better to fix the
108    callers to only run once -AK */
109 static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
110         { set_max_cstate, "Clevo 5600D", {
111           DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
112           DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
113          (void *)2},
114         { set_max_cstate, "Pavilion zv5000", {
115           DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
116           DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")},
117          (void *)1},
118         { set_max_cstate, "Asus L8400B", {
119           DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
120           DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")},
121          (void *)1},
122         {},
123 };
124
125
126 /*
127  * Callers should disable interrupts before the call and enable
128  * interrupts after return.
129  */
130 static void acpi_safe_halt(void)
131 {
132         current_thread_info()->status &= ~TS_POLLING;
133         /*
134          * TS_POLLING-cleared state must be visible before we
135          * test NEED_RESCHED:
136          */
137         smp_mb();
138         if (!need_resched()) {
139                 safe_halt();
140                 local_irq_disable();
141         }
142         current_thread_info()->status |= TS_POLLING;
143 }
144
145 #ifdef ARCH_APICTIMER_STOPS_ON_C3
146
147 /*
148  * Some BIOS implementations switch to C3 in the published C2 state.
149  * This seems to be a common problem on AMD boxen, but other vendors
150  * are affected too. We pick the most conservative approach: we assume
151  * that the local APIC stops in both C2 and C3.
152  */
153 static void lapic_timer_check_state(int state, struct acpi_processor *pr,
154                                    struct acpi_processor_cx *cx)
155 {
156         struct acpi_processor_power *pwr = &pr->power;
157         u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
158
159         if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT))
160                 return;
161
162         if (boot_cpu_has(X86_FEATURE_AMDC1E))
163                 type = ACPI_STATE_C1;
164
165         /*
166          * Check, if one of the previous states already marked the lapic
167          * unstable
168          */
169         if (pwr->timer_broadcast_on_state < state)
170                 return;
171
172         if (cx->type >= type)
173                 pr->power.timer_broadcast_on_state = state;
174 }
175
176 static void __lapic_timer_propagate_broadcast(void *arg)
177 {
178         struct acpi_processor *pr = (struct acpi_processor *) arg;
179         unsigned long reason;
180
181         reason = pr->power.timer_broadcast_on_state < INT_MAX ?
182                 CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;
183
184         clockevents_notify(reason, &pr->id);
185 }
186
187 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr)
188 {
189         smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast,
190                                  (void *)pr, 1);
191 }
192
193 /* Power(C) State timer broadcast control */
194 static void lapic_timer_state_broadcast(struct acpi_processor *pr,
195                                        struct acpi_processor_cx *cx,
196                                        int broadcast)
197 {
198         int state = cx - pr->power.states;
199
200         if (state >= pr->power.timer_broadcast_on_state) {
201                 unsigned long reason;
202
203                 reason = broadcast ?  CLOCK_EVT_NOTIFY_BROADCAST_ENTER :
204                         CLOCK_EVT_NOTIFY_BROADCAST_EXIT;
205                 clockevents_notify(reason, &pr->id);
206         }
207 }
208
209 #else
210
211 static void lapic_timer_check_state(int state, struct acpi_processor *pr,
212                                    struct acpi_processor_cx *cstate) { }
213 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { }
214 static void lapic_timer_state_broadcast(struct acpi_processor *pr,
215                                        struct acpi_processor_cx *cx,
216                                        int broadcast)
217 {
218 }
219
220 #endif
221
222 /*
223  * Suspend / resume control
224  */
225 static int acpi_idle_suspend;
226 static u32 saved_bm_rld;
227
228 static void acpi_idle_bm_rld_save(void)
229 {
230         acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &saved_bm_rld);
231 }
232 static void acpi_idle_bm_rld_restore(void)
233 {
234         u32 resumed_bm_rld;
235
236         acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &resumed_bm_rld);
237
238         if (resumed_bm_rld != saved_bm_rld)
239                 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, saved_bm_rld);
240 }
241
242 int acpi_processor_suspend(struct acpi_device * device, pm_message_t state)
243 {
244         if (acpi_idle_suspend == 1)
245                 return 0;
246
247         acpi_idle_bm_rld_save();
248         acpi_idle_suspend = 1;
249         return 0;
250 }
251
252 int acpi_processor_resume(struct acpi_device * device)
253 {
254         if (acpi_idle_suspend == 0)
255                 return 0;
256
257         acpi_idle_bm_rld_restore();
258         acpi_idle_suspend = 0;
259         return 0;
260 }
261
262 #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86)
263 static void tsc_check_state(int state)
264 {
265         switch (boot_cpu_data.x86_vendor) {
266         case X86_VENDOR_AMD:
267         case X86_VENDOR_INTEL:
268                 /*
269                  * AMD Fam10h TSC will tick in all
270                  * C/P/S0/S1 states when this bit is set.
271                  */
272                 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
273                         return;
274
275                 /*FALL THROUGH*/
276         default:
277                 /* TSC could halt in idle, so notify users */
278                 if (state > ACPI_STATE_C1)
279                         mark_tsc_unstable("TSC halts in idle");
280         }
281 }
282 #else
283 static void tsc_check_state(int state) { return; }
284 #endif
285
286 static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
287 {
288
289         if (!pr)
290                 return -EINVAL;
291
292         if (!pr->pblk)
293                 return -ENODEV;
294
295         /* if info is obtained from pblk/fadt, type equals state */
296         pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
297         pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
298
299 #ifndef CONFIG_HOTPLUG_CPU
300         /*
301          * Check for P_LVL2_UP flag before entering C2 and above on
302          * an SMP system.
303          */
304         if ((num_online_cpus() > 1) &&
305             !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
306                 return -ENODEV;
307 #endif
308
309         /* determine C2 and C3 address from pblk */
310         pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
311         pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
312
313         /* determine latencies from FADT */
314         pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.C2latency;
315         pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.C3latency;
316
317         /*
318          * FADT specified C2 latency must be less than or equal to
319          * 100 microseconds.
320          */
321         if (acpi_gbl_FADT.C2latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
322                 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
323                         "C2 latency too large [%d]\n", acpi_gbl_FADT.C2latency));
324                 /* invalidate C2 */
325                 pr->power.states[ACPI_STATE_C2].address = 0;
326         }
327
328         /*
329          * FADT supplied C3 latency must be less than or equal to
330          * 1000 microseconds.
331          */
332         if (acpi_gbl_FADT.C3latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
333                 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
334                         "C3 latency too large [%d]\n", acpi_gbl_FADT.C3latency));
335                 /* invalidate C3 */
336                 pr->power.states[ACPI_STATE_C3].address = 0;
337         }
338
339         ACPI_DEBUG_PRINT((ACPI_DB_INFO,
340                           "lvl2[0x%08x] lvl3[0x%08x]\n",
341                           pr->power.states[ACPI_STATE_C2].address,
342                           pr->power.states[ACPI_STATE_C3].address));
343
344         return 0;
345 }
346
347 static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
348 {
349         if (!pr->power.states[ACPI_STATE_C1].valid) {
350                 /* set the first C-State to C1 */
351                 /* all processors need to support C1 */
352                 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
353                 pr->power.states[ACPI_STATE_C1].valid = 1;
354                 pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT;
355         }
356         /* the C0 state only exists as a filler in our array */
357         pr->power.states[ACPI_STATE_C0].valid = 1;
358         return 0;
359 }
360
361 static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
362 {
363         acpi_status status = 0;
364         u64 count;
365         int current_count;
366         int i;
367         struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
368         union acpi_object *cst;
369
370
371         if (nocst)
372                 return -ENODEV;
373
374         current_count = 0;
375
376         status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
377         if (ACPI_FAILURE(status)) {
378                 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
379                 return -ENODEV;
380         }
381
382         cst = buffer.pointer;
383
384         /* There must be at least 2 elements */
385         if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
386                 printk(KERN_ERR PREFIX "not enough elements in _CST\n");
387                 status = -EFAULT;
388                 goto end;
389         }
390
391         count = cst->package.elements[0].integer.value;
392
393         /* Validate number of power states. */
394         if (count < 1 || count != cst->package.count - 1) {
395                 printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
396                 status = -EFAULT;
397                 goto end;
398         }
399
400         /* Tell driver that at least _CST is supported. */
401         pr->flags.has_cst = 1;
402
403         for (i = 1; i <= count; i++) {
404                 union acpi_object *element;
405                 union acpi_object *obj;
406                 struct acpi_power_register *reg;
407                 struct acpi_processor_cx cx;
408
409                 memset(&cx, 0, sizeof(cx));
410
411                 element = &(cst->package.elements[i]);
412                 if (element->type != ACPI_TYPE_PACKAGE)
413                         continue;
414
415                 if (element->package.count != 4)
416                         continue;
417
418                 obj = &(element->package.elements[0]);
419
420                 if (obj->type != ACPI_TYPE_BUFFER)
421                         continue;
422
423                 reg = (struct acpi_power_register *)obj->buffer.pointer;
424
425                 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
426                     (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
427                         continue;
428
429                 /* There should be an easy way to extract an integer... */
430                 obj = &(element->package.elements[1]);
431                 if (obj->type != ACPI_TYPE_INTEGER)
432                         continue;
433
434                 cx.type = obj->integer.value;
435                 /*
436                  * Some buggy BIOSes won't list C1 in _CST -
437                  * Let acpi_processor_get_power_info_default() handle them later
438                  */
439                 if (i == 1 && cx.type != ACPI_STATE_C1)
440                         current_count++;
441
442                 cx.address = reg->address;
443                 cx.index = current_count + 1;
444
445                 cx.entry_method = ACPI_CSTATE_SYSTEMIO;
446                 if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
447                         if (acpi_processor_ffh_cstate_probe
448                                         (pr->id, &cx, reg) == 0) {
449                                 cx.entry_method = ACPI_CSTATE_FFH;
450                         } else if (cx.type == ACPI_STATE_C1) {
451                                 /*
452                                  * C1 is a special case where FIXED_HARDWARE
453                                  * can be handled in non-MWAIT way as well.
454                                  * In that case, save this _CST entry info.
455                                  * Otherwise, ignore this info and continue.
456                                  */
457                                 cx.entry_method = ACPI_CSTATE_HALT;
458                                 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
459                         } else {
460                                 continue;
461                         }
462                         if (cx.type == ACPI_STATE_C1 &&
463                                         (idle_halt || idle_nomwait)) {
464                                 /*
465                                  * In most cases the C1 space_id obtained from
466                                  * _CST object is FIXED_HARDWARE access mode.
467                                  * But when the option of idle=halt is added,
468                                  * the entry_method type should be changed from
469                                  * CSTATE_FFH to CSTATE_HALT.
470                                  * When the option of idle=nomwait is added,
471                                  * the C1 entry_method type should be
472                                  * CSTATE_HALT.
473                                  */
474                                 cx.entry_method = ACPI_CSTATE_HALT;
475                                 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
476                         }
477                 } else {
478                         snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x",
479                                  cx.address);
480                 }
481
482                 if (cx.type == ACPI_STATE_C1) {
483                         cx.valid = 1;
484                 }
485
486                 obj = &(element->package.elements[2]);
487                 if (obj->type != ACPI_TYPE_INTEGER)
488                         continue;
489
490                 cx.latency = obj->integer.value;
491
492                 obj = &(element->package.elements[3]);
493                 if (obj->type != ACPI_TYPE_INTEGER)
494                         continue;
495
496                 cx.power = obj->integer.value;
497
498                 current_count++;
499                 memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
500
501                 /*
502                  * We support total ACPI_PROCESSOR_MAX_POWER - 1
503                  * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
504                  */
505                 if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
506                         printk(KERN_WARNING
507                                "Limiting number of power states to max (%d)\n",
508                                ACPI_PROCESSOR_MAX_POWER);
509                         printk(KERN_WARNING
510                                "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
511                         break;
512                 }
513         }
514
515         ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
516                           current_count));
517
518         /* Validate number of power states discovered */
519         if (current_count < 2)
520                 status = -EFAULT;
521
522       end:
523         kfree(buffer.pointer);
524
525         return status;
526 }
527
528 static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
529                                            struct acpi_processor_cx *cx)
530 {
531         static int bm_check_flag = -1;
532         static int bm_control_flag = -1;
533
534
535         if (!cx->address)
536                 return;
537
538         /*
539          * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
540          * DMA transfers are used by any ISA device to avoid livelock.
541          * Note that we could disable Type-F DMA (as recommended by
542          * the erratum), but this is known to disrupt certain ISA
543          * devices thus we take the conservative approach.
544          */
545         else if (errata.piix4.fdma) {
546                 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
547                                   "C3 not supported on PIIX4 with Type-F DMA\n"));
548                 return;
549         }
550
551         /* All the logic here assumes flags.bm_check is same across all CPUs */
552         if (bm_check_flag == -1) {
553                 /* Determine whether bm_check is needed based on CPU  */
554                 acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
555                 bm_check_flag = pr->flags.bm_check;
556                 bm_control_flag = pr->flags.bm_control;
557         } else {
558                 pr->flags.bm_check = bm_check_flag;
559                 pr->flags.bm_control = bm_control_flag;
560         }
561
562         if (pr->flags.bm_check) {
563                 if (!pr->flags.bm_control) {
564                         if (pr->flags.has_cst != 1) {
565                                 /* bus mastering control is necessary */
566                                 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
567                                         "C3 support requires BM control\n"));
568                                 return;
569                         } else {
570                                 /* Here we enter C3 without bus mastering */
571                                 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
572                                         "C3 support without BM control\n"));
573                         }
574                 }
575         } else {
576                 /*
577                  * WBINVD should be set in fadt, for C3 state to be
578                  * supported on when bm_check is not required.
579                  */
580                 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
581                         ACPI_DEBUG_PRINT((ACPI_DB_INFO,
582                                           "Cache invalidation should work properly"
583                                           " for C3 to be enabled on SMP systems\n"));
584                         return;
585                 }
586         }
587
588         /*
589          * Otherwise we've met all of our C3 requirements.
590          * Normalize the C3 latency to expidite policy.  Enable
591          * checking of bus mastering status (bm_check) so we can
592          * use this in our C3 policy
593          */
594         cx->valid = 1;
595
596         cx->latency_ticks = cx->latency;
597         /*
598          * On older chipsets, BM_RLD needs to be set
599          * in order for Bus Master activity to wake the
600          * system from C3.  Newer chipsets handle DMA
601          * during C3 automatically and BM_RLD is a NOP.
602          * In either case, the proper way to
603          * handle BM_RLD is to set it and leave it set.
604          */
605         acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
606
607         return;
608 }
609
610 static int acpi_processor_power_verify(struct acpi_processor *pr)
611 {
612         unsigned int i;
613         unsigned int working = 0;
614
615         pr->power.timer_broadcast_on_state = INT_MAX;
616
617         for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
618                 struct acpi_processor_cx *cx = &pr->power.states[i];
619
620                 switch (cx->type) {
621                 case ACPI_STATE_C1:
622                         cx->valid = 1;
623                         break;
624
625                 case ACPI_STATE_C2:
626                         if (!cx->address)
627                                 break;
628                         cx->valid = 1; 
629                         cx->latency_ticks = cx->latency; /* Normalize latency */
630                         break;
631
632                 case ACPI_STATE_C3:
633                         acpi_processor_power_verify_c3(pr, cx);
634                         break;
635                 }
636                 if (!cx->valid)
637                         continue;
638
639                 lapic_timer_check_state(i, pr, cx);
640                 tsc_check_state(cx->type);
641                 working++;
642         }
643
644         lapic_timer_propagate_broadcast(pr);
645
646         return (working);
647 }
648
649 static int acpi_processor_get_power_info(struct acpi_processor *pr)
650 {
651         unsigned int i;
652         int result;
653
654
655         /* NOTE: the idle thread may not be running while calling
656          * this function */
657
658         /* Zero initialize all the C-states info. */
659         memset(pr->power.states, 0, sizeof(pr->power.states));
660
661         result = acpi_processor_get_power_info_cst(pr);
662         if (result == -ENODEV)
663                 result = acpi_processor_get_power_info_fadt(pr);
664
665         if (result)
666                 return result;
667
668         acpi_processor_get_power_info_default(pr);
669
670         pr->power.count = acpi_processor_power_verify(pr);
671
672         /*
673          * if one state of type C2 or C3 is available, mark this
674          * CPU as being "idle manageable"
675          */
676         for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
677                 if (pr->power.states[i].valid) {
678                         pr->power.count = i;
679                         if (pr->power.states[i].type >= ACPI_STATE_C2)
680                                 pr->flags.power = 1;
681                 }
682         }
683
684         return 0;
685 }
686
687 #ifdef CONFIG_ACPI_PROCFS
688 static int acpi_processor_power_seq_show(struct seq_file *seq, void *offset)
689 {
690         struct acpi_processor *pr = seq->private;
691         unsigned int i;
692
693
694         if (!pr)
695                 goto end;
696
697         seq_printf(seq, "active state:            C%zd\n"
698                    "max_cstate:              C%d\n"
699                    "maximum allowed latency: %d usec\n",
700                    pr->power.state ? pr->power.state - pr->power.states : 0,
701                    max_cstate, pm_qos_request(PM_QOS_CPU_DMA_LATENCY));
702
703         seq_puts(seq, "states:\n");
704
705         for (i = 1; i <= pr->power.count; i++) {
706                 seq_printf(seq, "   %cC%d:                  ",
707                            (&pr->power.states[i] ==
708                             pr->power.state ? '*' : ' '), i);
709
710                 if (!pr->power.states[i].valid) {
711                         seq_puts(seq, "<not supported>\n");
712                         continue;
713                 }
714
715                 switch (pr->power.states[i].type) {
716                 case ACPI_STATE_C1:
717                         seq_printf(seq, "type[C1] ");
718                         break;
719                 case ACPI_STATE_C2:
720                         seq_printf(seq, "type[C2] ");
721                         break;
722                 case ACPI_STATE_C3:
723                         seq_printf(seq, "type[C3] ");
724                         break;
725                 default:
726                         seq_printf(seq, "type[--] ");
727                         break;
728                 }
729
730                 seq_puts(seq, "promotion[--] ");
731
732                 seq_puts(seq, "demotion[--] ");
733
734                 seq_printf(seq, "latency[%03d] usage[%08d] duration[%020Lu]\n",
735                            pr->power.states[i].latency,
736                            pr->power.states[i].usage,
737                            us_to_pm_timer_ticks(pr->power.states[i].time));
738         }
739
740       end:
741         return 0;
742 }
743
744 static int acpi_processor_power_open_fs(struct inode *inode, struct file *file)
745 {
746         return single_open(file, acpi_processor_power_seq_show,
747                            PDE(inode)->data);
748 }
749
750 static const struct file_operations acpi_processor_power_fops = {
751         .owner = THIS_MODULE,
752         .open = acpi_processor_power_open_fs,
753         .read = seq_read,
754         .llseek = seq_lseek,
755         .release = single_release,
756 };
757 #endif
758
759 /**
760  * acpi_idle_bm_check - checks if bus master activity was detected
761  */
762 static int acpi_idle_bm_check(void)
763 {
764         u32 bm_status = 0;
765
766         acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
767         if (bm_status)
768                 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
769         /*
770          * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
771          * the true state of bus mastering activity; forcing us to
772          * manually check the BMIDEA bit of each IDE channel.
773          */
774         else if (errata.piix4.bmisx) {
775                 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
776                     || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
777                         bm_status = 1;
778         }
779         return bm_status;
780 }
781
782 /**
783  * acpi_idle_do_entry - a helper function that does C2 and C3 type entry
784  * @cx: cstate data
785  *
786  * Caller disables interrupt before call and enables interrupt after return.
787  */
788 static inline void acpi_idle_do_entry(struct acpi_processor_cx *cx)
789 {
790         /* Don't trace irqs off for idle */
791         stop_critical_timings();
792         if (cx->entry_method == ACPI_CSTATE_FFH) {
793                 /* Call into architectural FFH based C-state */
794                 acpi_processor_ffh_cstate_enter(cx);
795         } else if (cx->entry_method == ACPI_CSTATE_HALT) {
796                 acpi_safe_halt();
797         } else {
798                 int unused;
799                 /* IO port based C-state */
800                 inb(cx->address);
801                 /* Dummy wait op - must do something useless after P_LVL2 read
802                    because chipsets cannot guarantee that STPCLK# signal
803                    gets asserted in time to freeze execution properly. */
804                 unused = inl(acpi_gbl_FADT.xpm_timer_block.address);
805         }
806         start_critical_timings();
807 }
808
809 /**
810  * acpi_idle_enter_c1 - enters an ACPI C1 state-type
811  * @dev: the target CPU
812  * @state: the state data
813  *
814  * This is equivalent to the HALT instruction.
815  */
816 static int acpi_idle_enter_c1(struct cpuidle_device *dev,
817                               struct cpuidle_state *state)
818 {
819         ktime_t  kt1, kt2;
820         s64 idle_time;
821         struct acpi_processor *pr;
822         struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
823
824         pr = __get_cpu_var(processors);
825
826         if (unlikely(!pr))
827                 return 0;
828
829         local_irq_disable();
830
831         /* Do not access any ACPI IO ports in suspend path */
832         if (acpi_idle_suspend) {
833                 local_irq_enable();
834                 cpu_relax();
835                 return 0;
836         }
837
838         lapic_timer_state_broadcast(pr, cx, 1);
839         kt1 = ktime_get_real();
840         acpi_idle_do_entry(cx);
841         kt2 = ktime_get_real();
842         idle_time =  ktime_to_us(ktime_sub(kt2, kt1));
843
844         local_irq_enable();
845         cx->usage++;
846         lapic_timer_state_broadcast(pr, cx, 0);
847
848         return idle_time;
849 }
850
851 /**
852  * acpi_idle_enter_simple - enters an ACPI state without BM handling
853  * @dev: the target CPU
854  * @state: the state data
855  */
856 static int acpi_idle_enter_simple(struct cpuidle_device *dev,
857                                   struct cpuidle_state *state)
858 {
859         struct acpi_processor *pr;
860         struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
861         ktime_t  kt1, kt2;
862         s64 idle_time_ns;
863         s64 idle_time;
864
865         pr = __get_cpu_var(processors);
866
867         if (unlikely(!pr))
868                 return 0;
869
870         if (acpi_idle_suspend)
871                 return(acpi_idle_enter_c1(dev, state));
872
873         local_irq_disable();
874
875         if (cx->entry_method != ACPI_CSTATE_FFH) {
876                 current_thread_info()->status &= ~TS_POLLING;
877                 /*
878                  * TS_POLLING-cleared state must be visible before we test
879                  * NEED_RESCHED:
880                  */
881                 smp_mb();
882
883                 if (unlikely(need_resched())) {
884                         current_thread_info()->status |= TS_POLLING;
885                         local_irq_enable();
886                         return 0;
887                 }
888         }
889
890         /*
891          * Must be done before busmaster disable as we might need to
892          * access HPET !
893          */
894         lapic_timer_state_broadcast(pr, cx, 1);
895
896         if (cx->type == ACPI_STATE_C3)
897                 ACPI_FLUSH_CPU_CACHE();
898
899         kt1 = ktime_get_real();
900         /* Tell the scheduler that we are going deep-idle: */
901         sched_clock_idle_sleep_event();
902         acpi_idle_do_entry(cx);
903         kt2 = ktime_get_real();
904         idle_time_ns = ktime_to_ns(ktime_sub(kt2, kt1));
905         idle_time = idle_time_ns;
906         do_div(idle_time, NSEC_PER_USEC);
907
908         /* Tell the scheduler how much we idled: */
909         sched_clock_idle_wakeup_event(idle_time_ns);
910
911         local_irq_enable();
912         if (cx->entry_method != ACPI_CSTATE_FFH)
913                 current_thread_info()->status |= TS_POLLING;
914
915         cx->usage++;
916
917         lapic_timer_state_broadcast(pr, cx, 0);
918         cx->time += idle_time;
919         return idle_time;
920 }
921
922 static int c3_cpu_count;
923 static DEFINE_SPINLOCK(c3_lock);
924
925 /**
926  * acpi_idle_enter_bm - enters C3 with proper BM handling
927  * @dev: the target CPU
928  * @state: the state data
929  *
930  * If BM is detected, the deepest non-C3 idle state is entered instead.
931  */
932 static int acpi_idle_enter_bm(struct cpuidle_device *dev,
933                               struct cpuidle_state *state)
934 {
935         struct acpi_processor *pr;
936         struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
937         ktime_t  kt1, kt2;
938         s64 idle_time_ns;
939         s64 idle_time;
940
941
942         pr = __get_cpu_var(processors);
943
944         if (unlikely(!pr))
945                 return 0;
946
947         if (acpi_idle_suspend)
948                 return(acpi_idle_enter_c1(dev, state));
949
950         if (acpi_idle_bm_check()) {
951                 if (dev->safe_state) {
952                         dev->last_state = dev->safe_state;
953                         return dev->safe_state->enter(dev, dev->safe_state);
954                 } else {
955                         local_irq_disable();
956                         acpi_safe_halt();
957                         local_irq_enable();
958                         return 0;
959                 }
960         }
961
962         local_irq_disable();
963
964         if (cx->entry_method != ACPI_CSTATE_FFH) {
965                 current_thread_info()->status &= ~TS_POLLING;
966                 /*
967                  * TS_POLLING-cleared state must be visible before we test
968                  * NEED_RESCHED:
969                  */
970                 smp_mb();
971
972                 if (unlikely(need_resched())) {
973                         current_thread_info()->status |= TS_POLLING;
974                         local_irq_enable();
975                         return 0;
976                 }
977         }
978
979         acpi_unlazy_tlb(smp_processor_id());
980
981         /* Tell the scheduler that we are going deep-idle: */
982         sched_clock_idle_sleep_event();
983         /*
984          * Must be done before busmaster disable as we might need to
985          * access HPET !
986          */
987         lapic_timer_state_broadcast(pr, cx, 1);
988
989         kt1 = ktime_get_real();
990         /*
991          * disable bus master
992          * bm_check implies we need ARB_DIS
993          * !bm_check implies we need cache flush
994          * bm_control implies whether we can do ARB_DIS
995          *
996          * That leaves a case where bm_check is set and bm_control is
997          * not set. In that case we cannot do much, we enter C3
998          * without doing anything.
999          */
1000         if (pr->flags.bm_check && pr->flags.bm_control) {
1001                 spin_lock(&c3_lock);
1002                 c3_cpu_count++;
1003                 /* Disable bus master arbitration when all CPUs are in C3 */
1004                 if (c3_cpu_count == num_online_cpus())
1005                         acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
1006                 spin_unlock(&c3_lock);
1007         } else if (!pr->flags.bm_check) {
1008                 ACPI_FLUSH_CPU_CACHE();
1009         }
1010
1011         acpi_idle_do_entry(cx);
1012
1013         /* Re-enable bus master arbitration */
1014         if (pr->flags.bm_check && pr->flags.bm_control) {
1015                 spin_lock(&c3_lock);
1016                 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
1017                 c3_cpu_count--;
1018                 spin_unlock(&c3_lock);
1019         }
1020         kt2 = ktime_get_real();
1021         idle_time_ns = ktime_to_ns(ktime_sub(kt2, kt1));
1022         idle_time = idle_time_ns;
1023         do_div(idle_time, NSEC_PER_USEC);
1024
1025         /* Tell the scheduler how much we idled: */
1026         sched_clock_idle_wakeup_event(idle_time_ns);
1027
1028         local_irq_enable();
1029         if (cx->entry_method != ACPI_CSTATE_FFH)
1030                 current_thread_info()->status |= TS_POLLING;
1031
1032         cx->usage++;
1033
1034         lapic_timer_state_broadcast(pr, cx, 0);
1035         cx->time += idle_time;
1036         return idle_time;
1037 }
1038
1039 struct cpuidle_driver acpi_idle_driver = {
1040         .name =         "acpi_idle",
1041         .owner =        THIS_MODULE,
1042 };
1043
1044 /**
1045  * acpi_processor_setup_cpuidle - prepares and configures CPUIDLE
1046  * @pr: the ACPI processor
1047  */
1048 static int acpi_processor_setup_cpuidle(struct acpi_processor *pr)
1049 {
1050         int i, count = CPUIDLE_DRIVER_STATE_START;
1051         struct acpi_processor_cx *cx;
1052         struct cpuidle_state *state;
1053         struct cpuidle_device *dev = &pr->power.dev;
1054
1055         if (!pr->flags.power_setup_done)
1056                 return -EINVAL;
1057
1058         if (pr->flags.power == 0) {
1059                 return -EINVAL;
1060         }
1061
1062         dev->cpu = pr->id;
1063         for (i = 0; i < CPUIDLE_STATE_MAX; i++) {
1064                 dev->states[i].name[0] = '\0';
1065                 dev->states[i].desc[0] = '\0';
1066         }
1067
1068         if (max_cstate == 0)
1069                 max_cstate = 1;
1070
1071         for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
1072                 cx = &pr->power.states[i];
1073                 state = &dev->states[count];
1074
1075                 if (!cx->valid)
1076                         continue;
1077
1078 #ifdef CONFIG_HOTPLUG_CPU
1079                 if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
1080                     !pr->flags.has_cst &&
1081                     !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
1082                         continue;
1083 #endif
1084                 cpuidle_set_statedata(state, cx);
1085
1086                 snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
1087                 strncpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
1088                 state->exit_latency = cx->latency;
1089                 state->target_residency = cx->latency * latency_factor;
1090                 state->power_usage = cx->power;
1091
1092                 state->flags = 0;
1093                 switch (cx->type) {
1094                         case ACPI_STATE_C1:
1095                         state->flags |= CPUIDLE_FLAG_SHALLOW;
1096                         if (cx->entry_method == ACPI_CSTATE_FFH)
1097                                 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1098
1099                         state->enter = acpi_idle_enter_c1;
1100                         dev->safe_state = state;
1101                         break;
1102
1103                         case ACPI_STATE_C2:
1104                         state->flags |= CPUIDLE_FLAG_BALANCED;
1105                         state->flags |= CPUIDLE_FLAG_TIME_VALID;
1106                         state->enter = acpi_idle_enter_simple;
1107                         dev->safe_state = state;
1108                         break;
1109
1110                         case ACPI_STATE_C3:
1111                         state->flags |= CPUIDLE_FLAG_DEEP;
1112                         state->flags |= CPUIDLE_FLAG_TIME_VALID;
1113                         state->flags |= CPUIDLE_FLAG_CHECK_BM;
1114                         state->enter = pr->flags.bm_check ?
1115                                         acpi_idle_enter_bm :
1116                                         acpi_idle_enter_simple;
1117                         break;
1118                 }
1119
1120                 count++;
1121                 if (count == CPUIDLE_STATE_MAX)
1122                         break;
1123         }
1124
1125         dev->state_count = count;
1126
1127         if (!count)
1128                 return -EINVAL;
1129
1130         return 0;
1131 }
1132
1133 int acpi_processor_cst_has_changed(struct acpi_processor *pr)
1134 {
1135         int ret = 0;
1136
1137         if (boot_option_idle_override)
1138                 return 0;
1139
1140         if (!pr)
1141                 return -EINVAL;
1142
1143         if (nocst) {
1144                 return -ENODEV;
1145         }
1146
1147         if (!pr->flags.power_setup_done)
1148                 return -ENODEV;
1149
1150         cpuidle_pause_and_lock();
1151         cpuidle_disable_device(&pr->power.dev);
1152         acpi_processor_get_power_info(pr);
1153         if (pr->flags.power) {
1154                 acpi_processor_setup_cpuidle(pr);
1155                 ret = cpuidle_enable_device(&pr->power.dev);
1156         }
1157         cpuidle_resume_and_unlock();
1158
1159         return ret;
1160 }
1161
1162 int __cpuinit acpi_processor_power_init(struct acpi_processor *pr,
1163                               struct acpi_device *device)
1164 {
1165         acpi_status status = 0;
1166         static int first_run;
1167 #ifdef CONFIG_ACPI_PROCFS
1168         struct proc_dir_entry *entry = NULL;
1169 #endif
1170
1171         if (boot_option_idle_override)
1172                 return 0;
1173
1174         if (!first_run) {
1175                 if (idle_halt) {
1176                         /*
1177                          * When the boot option of "idle=halt" is added, halt
1178                          * is used for CPU IDLE.
1179                          * In such case C2/C3 is meaningless. So the max_cstate
1180                          * is set to one.
1181                          */
1182                         max_cstate = 1;
1183                 }
1184                 dmi_check_system(processor_power_dmi_table);
1185                 max_cstate = acpi_processor_cstate_check(max_cstate);
1186                 if (max_cstate < ACPI_C_STATES_MAX)
1187                         printk(KERN_NOTICE
1188                                "ACPI: processor limited to max C-state %d\n",
1189                                max_cstate);
1190                 first_run++;
1191         }
1192
1193         if (!pr)
1194                 return -EINVAL;
1195
1196         if (acpi_gbl_FADT.cst_control && !nocst) {
1197                 status =
1198                     acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8);
1199                 if (ACPI_FAILURE(status)) {
1200                         ACPI_EXCEPTION((AE_INFO, status,
1201                                         "Notifying BIOS of _CST ability failed"));
1202                 }
1203         }
1204
1205         acpi_processor_get_power_info(pr);
1206         pr->flags.power_setup_done = 1;
1207
1208         /*
1209          * Install the idle handler if processor power management is supported.
1210          * Note that we use previously set idle handler will be used on
1211          * platforms that only support C1.
1212          */
1213         if (pr->flags.power) {
1214                 acpi_processor_setup_cpuidle(pr);
1215                 if (cpuidle_register_device(&pr->power.dev))
1216                         return -EIO;
1217         }
1218 #ifdef CONFIG_ACPI_PROCFS
1219         /* 'power' [R] */
1220         entry = proc_create_data(ACPI_PROCESSOR_FILE_POWER,
1221                                  S_IRUGO, acpi_device_dir(device),
1222                                  &acpi_processor_power_fops,
1223                                  acpi_driver_data(device));
1224         if (!entry)
1225                 return -EIO;
1226 #endif
1227         return 0;
1228 }
1229
1230 int acpi_processor_power_exit(struct acpi_processor *pr,
1231                               struct acpi_device *device)
1232 {
1233         if (boot_option_idle_override)
1234                 return 0;
1235
1236         cpuidle_unregister_device(&pr->power.dev);
1237         pr->flags.power_setup_done = 0;
1238
1239 #ifdef CONFIG_ACPI_PROCFS
1240         if (acpi_device_dir(device))
1241                 remove_proc_entry(ACPI_PROCESSOR_FILE_POWER,
1242                                   acpi_device_dir(device));
1243 #endif
1244
1245         return 0;
1246 }