Merge branch 'perf-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[sfrench/cifs-2.6.git] / drivers / acpi / acpi_lpss.c
1 /*
2  * ACPI support for Intel Lynxpoint LPSS.
3  *
4  * Copyright (C) 2013, Intel Corporation
5  * Authors: Mika Westerberg <mika.westerberg@linux.intel.com>
6  *          Rafael J. Wysocki <rafael.j.wysocki@intel.com>
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  */
12
13 #include <linux/acpi.h>
14 #include <linux/clkdev.h>
15 #include <linux/clk-provider.h>
16 #include <linux/err.h>
17 #include <linux/io.h>
18 #include <linux/mutex.h>
19 #include <linux/pci.h>
20 #include <linux/platform_device.h>
21 #include <linux/platform_data/clk-lpss.h>
22 #include <linux/platform_data/x86/pmc_atom.h>
23 #include <linux/pm_domain.h>
24 #include <linux/pm_runtime.h>
25 #include <linux/pwm.h>
26 #include <linux/suspend.h>
27 #include <linux/delay.h>
28
29 #include "internal.h"
30
31 ACPI_MODULE_NAME("acpi_lpss");
32
33 #ifdef CONFIG_X86_INTEL_LPSS
34
35 #include <asm/cpu_device_id.h>
36 #include <asm/intel-family.h>
37 #include <asm/iosf_mbi.h>
38
39 #define LPSS_ADDR(desc) ((unsigned long)&desc)
40
41 #define LPSS_CLK_SIZE   0x04
42 #define LPSS_LTR_SIZE   0x18
43
44 /* Offsets relative to LPSS_PRIVATE_OFFSET */
45 #define LPSS_CLK_DIVIDER_DEF_MASK       (BIT(1) | BIT(16))
46 #define LPSS_RESETS                     0x04
47 #define LPSS_RESETS_RESET_FUNC          BIT(0)
48 #define LPSS_RESETS_RESET_APB           BIT(1)
49 #define LPSS_GENERAL                    0x08
50 #define LPSS_GENERAL_LTR_MODE_SW        BIT(2)
51 #define LPSS_GENERAL_UART_RTS_OVRD      BIT(3)
52 #define LPSS_SW_LTR                     0x10
53 #define LPSS_AUTO_LTR                   0x14
54 #define LPSS_LTR_SNOOP_REQ              BIT(15)
55 #define LPSS_LTR_SNOOP_MASK             0x0000FFFF
56 #define LPSS_LTR_SNOOP_LAT_1US          0x800
57 #define LPSS_LTR_SNOOP_LAT_32US         0xC00
58 #define LPSS_LTR_SNOOP_LAT_SHIFT        5
59 #define LPSS_LTR_SNOOP_LAT_CUTOFF       3000
60 #define LPSS_LTR_MAX_VAL                0x3FF
61 #define LPSS_TX_INT                     0x20
62 #define LPSS_TX_INT_MASK                BIT(1)
63
64 #define LPSS_PRV_REG_COUNT              9
65
66 /* LPSS Flags */
67 #define LPSS_CLK                        BIT(0)
68 #define LPSS_CLK_GATE                   BIT(1)
69 #define LPSS_CLK_DIVIDER                BIT(2)
70 #define LPSS_LTR                        BIT(3)
71 #define LPSS_SAVE_CTX                   BIT(4)
72 #define LPSS_NO_D3_DELAY                BIT(5)
73
74 /* Crystal Cove PMIC shares same ACPI ID between different platforms */
75 #define BYT_CRC_HRV                     2
76 #define CHT_CRC_HRV                     3
77
78 struct lpss_private_data;
79
80 struct lpss_device_desc {
81         unsigned int flags;
82         const char *clk_con_id;
83         unsigned int prv_offset;
84         size_t prv_size_override;
85         struct property_entry *properties;
86         void (*setup)(struct lpss_private_data *pdata);
87         bool resume_from_noirq;
88 };
89
90 static const struct lpss_device_desc lpss_dma_desc = {
91         .flags = LPSS_CLK,
92 };
93
94 struct lpss_private_data {
95         struct acpi_device *adev;
96         void __iomem *mmio_base;
97         resource_size_t mmio_size;
98         unsigned int fixed_clk_rate;
99         struct clk *clk;
100         const struct lpss_device_desc *dev_desc;
101         u32 prv_reg_ctx[LPSS_PRV_REG_COUNT];
102 };
103
104 /* Devices which need to be in D3 before lpss_iosf_enter_d3_state() proceeds */
105 static u32 pmc_atom_d3_mask = 0xfe000ffe;
106
107 /* LPSS run time quirks */
108 static unsigned int lpss_quirks;
109
110 /*
111  * LPSS_QUIRK_ALWAYS_POWER_ON: override power state for LPSS DMA device.
112  *
113  * The LPSS DMA controller has neither _PS0 nor _PS3 method. Moreover
114  * it can be powered off automatically whenever the last LPSS device goes down.
115  * In case of no power any access to the DMA controller will hang the system.
116  * The behaviour is reproduced on some HP laptops based on Intel BayTrail as
117  * well as on ASuS T100TA transformer.
118  *
119  * This quirk overrides power state of entire LPSS island to keep DMA powered
120  * on whenever we have at least one other device in use.
121  */
122 #define LPSS_QUIRK_ALWAYS_POWER_ON      BIT(0)
123
124 /* UART Component Parameter Register */
125 #define LPSS_UART_CPR                   0xF4
126 #define LPSS_UART_CPR_AFCE              BIT(4)
127
128 static void lpss_uart_setup(struct lpss_private_data *pdata)
129 {
130         unsigned int offset;
131         u32 val;
132
133         offset = pdata->dev_desc->prv_offset + LPSS_TX_INT;
134         val = readl(pdata->mmio_base + offset);
135         writel(val | LPSS_TX_INT_MASK, pdata->mmio_base + offset);
136
137         val = readl(pdata->mmio_base + LPSS_UART_CPR);
138         if (!(val & LPSS_UART_CPR_AFCE)) {
139                 offset = pdata->dev_desc->prv_offset + LPSS_GENERAL;
140                 val = readl(pdata->mmio_base + offset);
141                 val |= LPSS_GENERAL_UART_RTS_OVRD;
142                 writel(val, pdata->mmio_base + offset);
143         }
144 }
145
146 static void lpss_deassert_reset(struct lpss_private_data *pdata)
147 {
148         unsigned int offset;
149         u32 val;
150
151         offset = pdata->dev_desc->prv_offset + LPSS_RESETS;
152         val = readl(pdata->mmio_base + offset);
153         val |= LPSS_RESETS_RESET_APB | LPSS_RESETS_RESET_FUNC;
154         writel(val, pdata->mmio_base + offset);
155 }
156
157 /*
158  * BYT PWM used for backlight control by the i915 driver on systems without
159  * the Crystal Cove PMIC.
160  */
161 static struct pwm_lookup byt_pwm_lookup[] = {
162         PWM_LOOKUP_WITH_MODULE("80860F09:00", 0, "0000:00:02.0",
163                                "pwm_backlight", 0, PWM_POLARITY_NORMAL,
164                                "pwm-lpss-platform"),
165 };
166
167 static void byt_pwm_setup(struct lpss_private_data *pdata)
168 {
169         struct acpi_device *adev = pdata->adev;
170
171         /* Only call pwm_add_table for the first PWM controller */
172         if (!adev->pnp.unique_id || strcmp(adev->pnp.unique_id, "1"))
173                 return;
174
175         if (!acpi_dev_present("INT33FD", NULL, BYT_CRC_HRV))
176                 pwm_add_table(byt_pwm_lookup, ARRAY_SIZE(byt_pwm_lookup));
177 }
178
179 #define LPSS_I2C_ENABLE                 0x6c
180
181 static void byt_i2c_setup(struct lpss_private_data *pdata)
182 {
183         const char *uid_str = acpi_device_uid(pdata->adev);
184         acpi_handle handle = pdata->adev->handle;
185         unsigned long long shared_host = 0;
186         acpi_status status;
187         long uid = 0;
188
189         /* Expected to always be true, but better safe then sorry */
190         if (uid_str)
191                 uid = simple_strtol(uid_str, NULL, 10);
192
193         /* Detect I2C bus shared with PUNIT and ignore its d3 status */
194         status = acpi_evaluate_integer(handle, "_SEM", NULL, &shared_host);
195         if (ACPI_SUCCESS(status) && shared_host && uid)
196                 pmc_atom_d3_mask &= ~(BIT_LPSS2_F1_I2C1 << (uid - 1));
197
198         lpss_deassert_reset(pdata);
199
200         if (readl(pdata->mmio_base + pdata->dev_desc->prv_offset))
201                 pdata->fixed_clk_rate = 133000000;
202
203         writel(0, pdata->mmio_base + LPSS_I2C_ENABLE);
204 }
205
206 /* BSW PWM used for backlight control by the i915 driver */
207 static struct pwm_lookup bsw_pwm_lookup[] = {
208         PWM_LOOKUP_WITH_MODULE("80862288:00", 0, "0000:00:02.0",
209                                "pwm_backlight", 0, PWM_POLARITY_NORMAL,
210                                "pwm-lpss-platform"),
211 };
212
213 static void bsw_pwm_setup(struct lpss_private_data *pdata)
214 {
215         struct acpi_device *adev = pdata->adev;
216
217         /* Only call pwm_add_table for the first PWM controller */
218         if (!adev->pnp.unique_id || strcmp(adev->pnp.unique_id, "1"))
219                 return;
220
221         pwm_add_table(bsw_pwm_lookup, ARRAY_SIZE(bsw_pwm_lookup));
222 }
223
224 static const struct lpss_device_desc lpt_dev_desc = {
225         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_LTR,
226         .prv_offset = 0x800,
227 };
228
229 static const struct lpss_device_desc lpt_i2c_dev_desc = {
230         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_LTR,
231         .prv_offset = 0x800,
232 };
233
234 static struct property_entry uart_properties[] = {
235         PROPERTY_ENTRY_U32("reg-io-width", 4),
236         PROPERTY_ENTRY_U32("reg-shift", 2),
237         PROPERTY_ENTRY_BOOL("snps,uart-16550-compatible"),
238         { },
239 };
240
241 static const struct lpss_device_desc lpt_uart_dev_desc = {
242         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_LTR,
243         .clk_con_id = "baudclk",
244         .prv_offset = 0x800,
245         .setup = lpss_uart_setup,
246         .properties = uart_properties,
247 };
248
249 static const struct lpss_device_desc lpt_sdio_dev_desc = {
250         .flags = LPSS_LTR,
251         .prv_offset = 0x1000,
252         .prv_size_override = 0x1018,
253 };
254
255 static const struct lpss_device_desc byt_pwm_dev_desc = {
256         .flags = LPSS_SAVE_CTX,
257         .prv_offset = 0x800,
258         .setup = byt_pwm_setup,
259 };
260
261 static const struct lpss_device_desc bsw_pwm_dev_desc = {
262         .flags = LPSS_SAVE_CTX | LPSS_NO_D3_DELAY,
263         .prv_offset = 0x800,
264         .setup = bsw_pwm_setup,
265 };
266
267 static const struct lpss_device_desc byt_uart_dev_desc = {
268         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX,
269         .clk_con_id = "baudclk",
270         .prv_offset = 0x800,
271         .setup = lpss_uart_setup,
272         .properties = uart_properties,
273 };
274
275 static const struct lpss_device_desc bsw_uart_dev_desc = {
276         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX
277                         | LPSS_NO_D3_DELAY,
278         .clk_con_id = "baudclk",
279         .prv_offset = 0x800,
280         .setup = lpss_uart_setup,
281         .properties = uart_properties,
282 };
283
284 static const struct lpss_device_desc byt_spi_dev_desc = {
285         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX,
286         .prv_offset = 0x400,
287 };
288
289 static const struct lpss_device_desc byt_sdio_dev_desc = {
290         .flags = LPSS_CLK,
291 };
292
293 static const struct lpss_device_desc byt_i2c_dev_desc = {
294         .flags = LPSS_CLK | LPSS_SAVE_CTX,
295         .prv_offset = 0x800,
296         .setup = byt_i2c_setup,
297         .resume_from_noirq = true,
298 };
299
300 static const struct lpss_device_desc bsw_i2c_dev_desc = {
301         .flags = LPSS_CLK | LPSS_SAVE_CTX | LPSS_NO_D3_DELAY,
302         .prv_offset = 0x800,
303         .setup = byt_i2c_setup,
304         .resume_from_noirq = true,
305 };
306
307 static const struct lpss_device_desc bsw_spi_dev_desc = {
308         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX
309                         | LPSS_NO_D3_DELAY,
310         .prv_offset = 0x400,
311         .setup = lpss_deassert_reset,
312 };
313
314 #define ICPU(model)     { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, }
315
316 static const struct x86_cpu_id lpss_cpu_ids[] = {
317         ICPU(INTEL_FAM6_ATOM_SILVERMONT),       /* Valleyview, Bay Trail */
318         ICPU(INTEL_FAM6_ATOM_AIRMONT),  /* Braswell, Cherry Trail */
319         {}
320 };
321
322 #else
323
324 #define LPSS_ADDR(desc) (0UL)
325
326 #endif /* CONFIG_X86_INTEL_LPSS */
327
328 static const struct acpi_device_id acpi_lpss_device_ids[] = {
329         /* Generic LPSS devices */
330         { "INTL9C60", LPSS_ADDR(lpss_dma_desc) },
331
332         /* Lynxpoint LPSS devices */
333         { "INT33C0", LPSS_ADDR(lpt_dev_desc) },
334         { "INT33C1", LPSS_ADDR(lpt_dev_desc) },
335         { "INT33C2", LPSS_ADDR(lpt_i2c_dev_desc) },
336         { "INT33C3", LPSS_ADDR(lpt_i2c_dev_desc) },
337         { "INT33C4", LPSS_ADDR(lpt_uart_dev_desc) },
338         { "INT33C5", LPSS_ADDR(lpt_uart_dev_desc) },
339         { "INT33C6", LPSS_ADDR(lpt_sdio_dev_desc) },
340         { "INT33C7", },
341
342         /* BayTrail LPSS devices */
343         { "80860F09", LPSS_ADDR(byt_pwm_dev_desc) },
344         { "80860F0A", LPSS_ADDR(byt_uart_dev_desc) },
345         { "80860F0E", LPSS_ADDR(byt_spi_dev_desc) },
346         { "80860F14", LPSS_ADDR(byt_sdio_dev_desc) },
347         { "80860F41", LPSS_ADDR(byt_i2c_dev_desc) },
348         { "INT33B2", },
349         { "INT33FC", },
350
351         /* Braswell LPSS devices */
352         { "80862286", LPSS_ADDR(lpss_dma_desc) },
353         { "80862288", LPSS_ADDR(bsw_pwm_dev_desc) },
354         { "8086228A", LPSS_ADDR(bsw_uart_dev_desc) },
355         { "8086228E", LPSS_ADDR(bsw_spi_dev_desc) },
356         { "808622C0", LPSS_ADDR(lpss_dma_desc) },
357         { "808622C1", LPSS_ADDR(bsw_i2c_dev_desc) },
358
359         /* Broadwell LPSS devices */
360         { "INT3430", LPSS_ADDR(lpt_dev_desc) },
361         { "INT3431", LPSS_ADDR(lpt_dev_desc) },
362         { "INT3432", LPSS_ADDR(lpt_i2c_dev_desc) },
363         { "INT3433", LPSS_ADDR(lpt_i2c_dev_desc) },
364         { "INT3434", LPSS_ADDR(lpt_uart_dev_desc) },
365         { "INT3435", LPSS_ADDR(lpt_uart_dev_desc) },
366         { "INT3436", LPSS_ADDR(lpt_sdio_dev_desc) },
367         { "INT3437", },
368
369         /* Wildcat Point LPSS devices */
370         { "INT3438", LPSS_ADDR(lpt_dev_desc) },
371
372         { }
373 };
374
375 #ifdef CONFIG_X86_INTEL_LPSS
376
377 static int is_memory(struct acpi_resource *res, void *not_used)
378 {
379         struct resource r;
380         return !acpi_dev_resource_memory(res, &r);
381 }
382
383 /* LPSS main clock device. */
384 static struct platform_device *lpss_clk_dev;
385
386 static inline void lpt_register_clock_device(void)
387 {
388         lpss_clk_dev = platform_device_register_simple("clk-lpt", -1, NULL, 0);
389 }
390
391 static int register_device_clock(struct acpi_device *adev,
392                                  struct lpss_private_data *pdata)
393 {
394         const struct lpss_device_desc *dev_desc = pdata->dev_desc;
395         const char *devname = dev_name(&adev->dev);
396         struct clk *clk;
397         struct lpss_clk_data *clk_data;
398         const char *parent, *clk_name;
399         void __iomem *prv_base;
400
401         if (!lpss_clk_dev)
402                 lpt_register_clock_device();
403
404         clk_data = platform_get_drvdata(lpss_clk_dev);
405         if (!clk_data)
406                 return -ENODEV;
407         clk = clk_data->clk;
408
409         if (!pdata->mmio_base
410             || pdata->mmio_size < dev_desc->prv_offset + LPSS_CLK_SIZE)
411                 return -ENODATA;
412
413         parent = clk_data->name;
414         prv_base = pdata->mmio_base + dev_desc->prv_offset;
415
416         if (pdata->fixed_clk_rate) {
417                 clk = clk_register_fixed_rate(NULL, devname, parent, 0,
418                                               pdata->fixed_clk_rate);
419                 goto out;
420         }
421
422         if (dev_desc->flags & LPSS_CLK_GATE) {
423                 clk = clk_register_gate(NULL, devname, parent, 0,
424                                         prv_base, 0, 0, NULL);
425                 parent = devname;
426         }
427
428         if (dev_desc->flags & LPSS_CLK_DIVIDER) {
429                 /* Prevent division by zero */
430                 if (!readl(prv_base))
431                         writel(LPSS_CLK_DIVIDER_DEF_MASK, prv_base);
432
433                 clk_name = kasprintf(GFP_KERNEL, "%s-div", devname);
434                 if (!clk_name)
435                         return -ENOMEM;
436                 clk = clk_register_fractional_divider(NULL, clk_name, parent,
437                                                       0, prv_base,
438                                                       1, 15, 16, 15, 0, NULL);
439                 parent = clk_name;
440
441                 clk_name = kasprintf(GFP_KERNEL, "%s-update", devname);
442                 if (!clk_name) {
443                         kfree(parent);
444                         return -ENOMEM;
445                 }
446                 clk = clk_register_gate(NULL, clk_name, parent,
447                                         CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
448                                         prv_base, 31, 0, NULL);
449                 kfree(parent);
450                 kfree(clk_name);
451         }
452 out:
453         if (IS_ERR(clk))
454                 return PTR_ERR(clk);
455
456         pdata->clk = clk;
457         clk_register_clkdev(clk, dev_desc->clk_con_id, devname);
458         return 0;
459 }
460
461 struct lpss_device_links {
462         const char *supplier_hid;
463         const char *supplier_uid;
464         const char *consumer_hid;
465         const char *consumer_uid;
466         u32 flags;
467 };
468
469 /*
470  * The _DEP method is used to identify dependencies but instead of creating
471  * device links for every handle in _DEP, only links in the following list are
472  * created. That is necessary because, in the general case, _DEP can refer to
473  * devices that might not have drivers, or that are on different buses, or where
474  * the supplier is not enumerated until after the consumer is probed.
475  */
476 static const struct lpss_device_links lpss_device_links[] = {
477         {"808622C1", "7", "80860F14", "3", DL_FLAG_PM_RUNTIME},
478         {"808622C1", "7", "LNXVIDEO", NULL, DL_FLAG_PM_RUNTIME},
479         {"80860F41", "5", "LNXVIDEO", NULL, DL_FLAG_PM_RUNTIME},
480 };
481
482 static bool hid_uid_match(struct acpi_device *adev,
483                           const char *hid2, const char *uid2)
484 {
485         const char *hid1 = acpi_device_hid(adev);
486         const char *uid1 = acpi_device_uid(adev);
487
488         if (strcmp(hid1, hid2))
489                 return false;
490
491         if (!uid2)
492                 return true;
493
494         return uid1 && !strcmp(uid1, uid2);
495 }
496
497 static bool acpi_lpss_is_supplier(struct acpi_device *adev,
498                                   const struct lpss_device_links *link)
499 {
500         return hid_uid_match(adev, link->supplier_hid, link->supplier_uid);
501 }
502
503 static bool acpi_lpss_is_consumer(struct acpi_device *adev,
504                                   const struct lpss_device_links *link)
505 {
506         return hid_uid_match(adev, link->consumer_hid, link->consumer_uid);
507 }
508
509 struct hid_uid {
510         const char *hid;
511         const char *uid;
512 };
513
514 static int match_hid_uid(struct device *dev, void *data)
515 {
516         struct acpi_device *adev = ACPI_COMPANION(dev);
517         struct hid_uid *id = data;
518
519         if (!adev)
520                 return 0;
521
522         return hid_uid_match(adev, id->hid, id->uid);
523 }
524
525 static struct device *acpi_lpss_find_device(const char *hid, const char *uid)
526 {
527         struct device *dev;
528
529         struct hid_uid data = {
530                 .hid = hid,
531                 .uid = uid,
532         };
533
534         dev = bus_find_device(&platform_bus_type, NULL, &data, match_hid_uid);
535         if (dev)
536                 return dev;
537
538         return bus_find_device(&pci_bus_type, NULL, &data, match_hid_uid);
539 }
540
541 static bool acpi_lpss_dep(struct acpi_device *adev, acpi_handle handle)
542 {
543         struct acpi_handle_list dep_devices;
544         acpi_status status;
545         int i;
546
547         if (!acpi_has_method(adev->handle, "_DEP"))
548                 return false;
549
550         status = acpi_evaluate_reference(adev->handle, "_DEP", NULL,
551                                          &dep_devices);
552         if (ACPI_FAILURE(status)) {
553                 dev_dbg(&adev->dev, "Failed to evaluate _DEP.\n");
554                 return false;
555         }
556
557         for (i = 0; i < dep_devices.count; i++) {
558                 if (dep_devices.handles[i] == handle)
559                         return true;
560         }
561
562         return false;
563 }
564
565 static void acpi_lpss_link_consumer(struct device *dev1,
566                                     const struct lpss_device_links *link)
567 {
568         struct device *dev2;
569
570         dev2 = acpi_lpss_find_device(link->consumer_hid, link->consumer_uid);
571         if (!dev2)
572                 return;
573
574         if (acpi_lpss_dep(ACPI_COMPANION(dev2), ACPI_HANDLE(dev1)))
575                 device_link_add(dev2, dev1, link->flags);
576
577         put_device(dev2);
578 }
579
580 static void acpi_lpss_link_supplier(struct device *dev1,
581                                     const struct lpss_device_links *link)
582 {
583         struct device *dev2;
584
585         dev2 = acpi_lpss_find_device(link->supplier_hid, link->supplier_uid);
586         if (!dev2)
587                 return;
588
589         if (acpi_lpss_dep(ACPI_COMPANION(dev1), ACPI_HANDLE(dev2)))
590                 device_link_add(dev1, dev2, link->flags);
591
592         put_device(dev2);
593 }
594
595 static void acpi_lpss_create_device_links(struct acpi_device *adev,
596                                           struct platform_device *pdev)
597 {
598         int i;
599
600         for (i = 0; i < ARRAY_SIZE(lpss_device_links); i++) {
601                 const struct lpss_device_links *link = &lpss_device_links[i];
602
603                 if (acpi_lpss_is_supplier(adev, link))
604                         acpi_lpss_link_consumer(&pdev->dev, link);
605
606                 if (acpi_lpss_is_consumer(adev, link))
607                         acpi_lpss_link_supplier(&pdev->dev, link);
608         }
609 }
610
611 static int acpi_lpss_create_device(struct acpi_device *adev,
612                                    const struct acpi_device_id *id)
613 {
614         const struct lpss_device_desc *dev_desc;
615         struct lpss_private_data *pdata;
616         struct resource_entry *rentry;
617         struct list_head resource_list;
618         struct platform_device *pdev;
619         int ret;
620
621         dev_desc = (const struct lpss_device_desc *)id->driver_data;
622         if (!dev_desc) {
623                 pdev = acpi_create_platform_device(adev, NULL);
624                 return IS_ERR_OR_NULL(pdev) ? PTR_ERR(pdev) : 1;
625         }
626         pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
627         if (!pdata)
628                 return -ENOMEM;
629
630         INIT_LIST_HEAD(&resource_list);
631         ret = acpi_dev_get_resources(adev, &resource_list, is_memory, NULL);
632         if (ret < 0)
633                 goto err_out;
634
635         list_for_each_entry(rentry, &resource_list, node)
636                 if (resource_type(rentry->res) == IORESOURCE_MEM) {
637                         if (dev_desc->prv_size_override)
638                                 pdata->mmio_size = dev_desc->prv_size_override;
639                         else
640                                 pdata->mmio_size = resource_size(rentry->res);
641                         pdata->mmio_base = ioremap(rentry->res->start,
642                                                    pdata->mmio_size);
643                         break;
644                 }
645
646         acpi_dev_free_resource_list(&resource_list);
647
648         if (!pdata->mmio_base) {
649                 /* Avoid acpi_bus_attach() instantiating a pdev for this dev. */
650                 adev->pnp.type.platform_id = 0;
651                 /* Skip the device, but continue the namespace scan. */
652                 ret = 0;
653                 goto err_out;
654         }
655
656         pdata->adev = adev;
657         pdata->dev_desc = dev_desc;
658
659         if (dev_desc->setup)
660                 dev_desc->setup(pdata);
661
662         if (dev_desc->flags & LPSS_CLK) {
663                 ret = register_device_clock(adev, pdata);
664                 if (ret) {
665                         /* Skip the device, but continue the namespace scan. */
666                         ret = 0;
667                         goto err_out;
668                 }
669         }
670
671         /*
672          * This works around a known issue in ACPI tables where LPSS devices
673          * have _PS0 and _PS3 without _PSC (and no power resources), so
674          * acpi_bus_init_power() will assume that the BIOS has put them into D0.
675          */
676         ret = acpi_device_fix_up_power(adev);
677         if (ret) {
678                 /* Skip the device, but continue the namespace scan. */
679                 ret = 0;
680                 goto err_out;
681         }
682
683         adev->driver_data = pdata;
684         pdev = acpi_create_platform_device(adev, dev_desc->properties);
685         if (!IS_ERR_OR_NULL(pdev)) {
686                 acpi_lpss_create_device_links(adev, pdev);
687                 return 1;
688         }
689
690         ret = PTR_ERR(pdev);
691         adev->driver_data = NULL;
692
693  err_out:
694         kfree(pdata);
695         return ret;
696 }
697
698 static u32 __lpss_reg_read(struct lpss_private_data *pdata, unsigned int reg)
699 {
700         return readl(pdata->mmio_base + pdata->dev_desc->prv_offset + reg);
701 }
702
703 static void __lpss_reg_write(u32 val, struct lpss_private_data *pdata,
704                              unsigned int reg)
705 {
706         writel(val, pdata->mmio_base + pdata->dev_desc->prv_offset + reg);
707 }
708
709 static int lpss_reg_read(struct device *dev, unsigned int reg, u32 *val)
710 {
711         struct acpi_device *adev;
712         struct lpss_private_data *pdata;
713         unsigned long flags;
714         int ret;
715
716         ret = acpi_bus_get_device(ACPI_HANDLE(dev), &adev);
717         if (WARN_ON(ret))
718                 return ret;
719
720         spin_lock_irqsave(&dev->power.lock, flags);
721         if (pm_runtime_suspended(dev)) {
722                 ret = -EAGAIN;
723                 goto out;
724         }
725         pdata = acpi_driver_data(adev);
726         if (WARN_ON(!pdata || !pdata->mmio_base)) {
727                 ret = -ENODEV;
728                 goto out;
729         }
730         *val = __lpss_reg_read(pdata, reg);
731
732  out:
733         spin_unlock_irqrestore(&dev->power.lock, flags);
734         return ret;
735 }
736
737 static ssize_t lpss_ltr_show(struct device *dev, struct device_attribute *attr,
738                              char *buf)
739 {
740         u32 ltr_value = 0;
741         unsigned int reg;
742         int ret;
743
744         reg = strcmp(attr->attr.name, "auto_ltr") ? LPSS_SW_LTR : LPSS_AUTO_LTR;
745         ret = lpss_reg_read(dev, reg, &ltr_value);
746         if (ret)
747                 return ret;
748
749         return snprintf(buf, PAGE_SIZE, "%08x\n", ltr_value);
750 }
751
752 static ssize_t lpss_ltr_mode_show(struct device *dev,
753                                   struct device_attribute *attr, char *buf)
754 {
755         u32 ltr_mode = 0;
756         char *outstr;
757         int ret;
758
759         ret = lpss_reg_read(dev, LPSS_GENERAL, &ltr_mode);
760         if (ret)
761                 return ret;
762
763         outstr = (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) ? "sw" : "auto";
764         return sprintf(buf, "%s\n", outstr);
765 }
766
767 static DEVICE_ATTR(auto_ltr, S_IRUSR, lpss_ltr_show, NULL);
768 static DEVICE_ATTR(sw_ltr, S_IRUSR, lpss_ltr_show, NULL);
769 static DEVICE_ATTR(ltr_mode, S_IRUSR, lpss_ltr_mode_show, NULL);
770
771 static struct attribute *lpss_attrs[] = {
772         &dev_attr_auto_ltr.attr,
773         &dev_attr_sw_ltr.attr,
774         &dev_attr_ltr_mode.attr,
775         NULL,
776 };
777
778 static const struct attribute_group lpss_attr_group = {
779         .attrs = lpss_attrs,
780         .name = "lpss_ltr",
781 };
782
783 static void acpi_lpss_set_ltr(struct device *dev, s32 val)
784 {
785         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
786         u32 ltr_mode, ltr_val;
787
788         ltr_mode = __lpss_reg_read(pdata, LPSS_GENERAL);
789         if (val < 0) {
790                 if (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) {
791                         ltr_mode &= ~LPSS_GENERAL_LTR_MODE_SW;
792                         __lpss_reg_write(ltr_mode, pdata, LPSS_GENERAL);
793                 }
794                 return;
795         }
796         ltr_val = __lpss_reg_read(pdata, LPSS_SW_LTR) & ~LPSS_LTR_SNOOP_MASK;
797         if (val >= LPSS_LTR_SNOOP_LAT_CUTOFF) {
798                 ltr_val |= LPSS_LTR_SNOOP_LAT_32US;
799                 val = LPSS_LTR_MAX_VAL;
800         } else if (val > LPSS_LTR_MAX_VAL) {
801                 ltr_val |= LPSS_LTR_SNOOP_LAT_32US | LPSS_LTR_SNOOP_REQ;
802                 val >>= LPSS_LTR_SNOOP_LAT_SHIFT;
803         } else {
804                 ltr_val |= LPSS_LTR_SNOOP_LAT_1US | LPSS_LTR_SNOOP_REQ;
805         }
806         ltr_val |= val;
807         __lpss_reg_write(ltr_val, pdata, LPSS_SW_LTR);
808         if (!(ltr_mode & LPSS_GENERAL_LTR_MODE_SW)) {
809                 ltr_mode |= LPSS_GENERAL_LTR_MODE_SW;
810                 __lpss_reg_write(ltr_mode, pdata, LPSS_GENERAL);
811         }
812 }
813
814 #ifdef CONFIG_PM
815 /**
816  * acpi_lpss_save_ctx() - Save the private registers of LPSS device
817  * @dev: LPSS device
818  * @pdata: pointer to the private data of the LPSS device
819  *
820  * Most LPSS devices have private registers which may loose their context when
821  * the device is powered down. acpi_lpss_save_ctx() saves those registers into
822  * prv_reg_ctx array.
823  */
824 static void acpi_lpss_save_ctx(struct device *dev,
825                                struct lpss_private_data *pdata)
826 {
827         unsigned int i;
828
829         for (i = 0; i < LPSS_PRV_REG_COUNT; i++) {
830                 unsigned long offset = i * sizeof(u32);
831
832                 pdata->prv_reg_ctx[i] = __lpss_reg_read(pdata, offset);
833                 dev_dbg(dev, "saving 0x%08x from LPSS reg at offset 0x%02lx\n",
834                         pdata->prv_reg_ctx[i], offset);
835         }
836 }
837
838 /**
839  * acpi_lpss_restore_ctx() - Restore the private registers of LPSS device
840  * @dev: LPSS device
841  * @pdata: pointer to the private data of the LPSS device
842  *
843  * Restores the registers that were previously stored with acpi_lpss_save_ctx().
844  */
845 static void acpi_lpss_restore_ctx(struct device *dev,
846                                   struct lpss_private_data *pdata)
847 {
848         unsigned int i;
849
850         for (i = 0; i < LPSS_PRV_REG_COUNT; i++) {
851                 unsigned long offset = i * sizeof(u32);
852
853                 __lpss_reg_write(pdata->prv_reg_ctx[i], pdata, offset);
854                 dev_dbg(dev, "restoring 0x%08x to LPSS reg at offset 0x%02lx\n",
855                         pdata->prv_reg_ctx[i], offset);
856         }
857 }
858
859 static void acpi_lpss_d3_to_d0_delay(struct lpss_private_data *pdata)
860 {
861         /*
862          * The following delay is needed or the subsequent write operations may
863          * fail. The LPSS devices are actually PCI devices and the PCI spec
864          * expects 10ms delay before the device can be accessed after D3 to D0
865          * transition. However some platforms like BSW does not need this delay.
866          */
867         unsigned int delay = 10;        /* default 10ms delay */
868
869         if (pdata->dev_desc->flags & LPSS_NO_D3_DELAY)
870                 delay = 0;
871
872         msleep(delay);
873 }
874
875 static int acpi_lpss_activate(struct device *dev)
876 {
877         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
878         int ret;
879
880         ret = acpi_dev_resume(dev);
881         if (ret)
882                 return ret;
883
884         acpi_lpss_d3_to_d0_delay(pdata);
885
886         /*
887          * This is called only on ->probe() stage where a device is either in
888          * known state defined by BIOS or most likely powered off. Due to this
889          * we have to deassert reset line to be sure that ->probe() will
890          * recognize the device.
891          */
892         if (pdata->dev_desc->flags & LPSS_SAVE_CTX)
893                 lpss_deassert_reset(pdata);
894
895         return 0;
896 }
897
898 static void acpi_lpss_dismiss(struct device *dev)
899 {
900         acpi_dev_suspend(dev, false);
901 }
902
903 /* IOSF SB for LPSS island */
904 #define LPSS_IOSF_UNIT_LPIOEP           0xA0
905 #define LPSS_IOSF_UNIT_LPIO1            0xAB
906 #define LPSS_IOSF_UNIT_LPIO2            0xAC
907
908 #define LPSS_IOSF_PMCSR                 0x84
909 #define LPSS_PMCSR_D0                   0
910 #define LPSS_PMCSR_D3hot                3
911 #define LPSS_PMCSR_Dx_MASK              GENMASK(1, 0)
912
913 #define LPSS_IOSF_GPIODEF0              0x154
914 #define LPSS_GPIODEF0_DMA1_D3           BIT(2)
915 #define LPSS_GPIODEF0_DMA2_D3           BIT(3)
916 #define LPSS_GPIODEF0_DMA_D3_MASK       GENMASK(3, 2)
917 #define LPSS_GPIODEF0_DMA_LLP           BIT(13)
918
919 static DEFINE_MUTEX(lpss_iosf_mutex);
920 static bool lpss_iosf_d3_entered = true;
921
922 static void lpss_iosf_enter_d3_state(void)
923 {
924         u32 value1 = 0;
925         u32 mask1 = LPSS_GPIODEF0_DMA_D3_MASK | LPSS_GPIODEF0_DMA_LLP;
926         u32 value2 = LPSS_PMCSR_D3hot;
927         u32 mask2 = LPSS_PMCSR_Dx_MASK;
928         /*
929          * PMC provides an information about actual status of the LPSS devices.
930          * Here we read the values related to LPSS power island, i.e. LPSS
931          * devices, excluding both LPSS DMA controllers, along with SCC domain.
932          */
933         u32 func_dis, d3_sts_0, pmc_status;
934         int ret;
935
936         ret = pmc_atom_read(PMC_FUNC_DIS, &func_dis);
937         if (ret)
938                 return;
939
940         mutex_lock(&lpss_iosf_mutex);
941
942         ret = pmc_atom_read(PMC_D3_STS_0, &d3_sts_0);
943         if (ret)
944                 goto exit;
945
946         /*
947          * Get the status of entire LPSS power island per device basis.
948          * Shutdown both LPSS DMA controllers if and only if all other devices
949          * are already in D3hot.
950          */
951         pmc_status = (~(d3_sts_0 | func_dis)) & pmc_atom_d3_mask;
952         if (pmc_status)
953                 goto exit;
954
955         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO1, MBI_CFG_WRITE,
956                         LPSS_IOSF_PMCSR, value2, mask2);
957
958         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO2, MBI_CFG_WRITE,
959                         LPSS_IOSF_PMCSR, value2, mask2);
960
961         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIOEP, MBI_CR_WRITE,
962                         LPSS_IOSF_GPIODEF0, value1, mask1);
963
964         lpss_iosf_d3_entered = true;
965
966 exit:
967         mutex_unlock(&lpss_iosf_mutex);
968 }
969
970 static void lpss_iosf_exit_d3_state(void)
971 {
972         u32 value1 = LPSS_GPIODEF0_DMA1_D3 | LPSS_GPIODEF0_DMA2_D3 |
973                      LPSS_GPIODEF0_DMA_LLP;
974         u32 mask1 = LPSS_GPIODEF0_DMA_D3_MASK | LPSS_GPIODEF0_DMA_LLP;
975         u32 value2 = LPSS_PMCSR_D0;
976         u32 mask2 = LPSS_PMCSR_Dx_MASK;
977
978         mutex_lock(&lpss_iosf_mutex);
979
980         if (!lpss_iosf_d3_entered)
981                 goto exit;
982
983         lpss_iosf_d3_entered = false;
984
985         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIOEP, MBI_CR_WRITE,
986                         LPSS_IOSF_GPIODEF0, value1, mask1);
987
988         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO2, MBI_CFG_WRITE,
989                         LPSS_IOSF_PMCSR, value2, mask2);
990
991         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO1, MBI_CFG_WRITE,
992                         LPSS_IOSF_PMCSR, value2, mask2);
993
994 exit:
995         mutex_unlock(&lpss_iosf_mutex);
996 }
997
998 static int acpi_lpss_suspend(struct device *dev, bool wakeup)
999 {
1000         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1001         int ret;
1002
1003         if (pdata->dev_desc->flags & LPSS_SAVE_CTX)
1004                 acpi_lpss_save_ctx(dev, pdata);
1005
1006         ret = acpi_dev_suspend(dev, wakeup);
1007
1008         /*
1009          * This call must be last in the sequence, otherwise PMC will return
1010          * wrong status for devices being about to be powered off. See
1011          * lpss_iosf_enter_d3_state() for further information.
1012          */
1013         if (acpi_target_system_state() == ACPI_STATE_S0 &&
1014             lpss_quirks & LPSS_QUIRK_ALWAYS_POWER_ON && iosf_mbi_available())
1015                 lpss_iosf_enter_d3_state();
1016
1017         return ret;
1018 }
1019
1020 static int acpi_lpss_resume(struct device *dev)
1021 {
1022         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1023         int ret;
1024
1025         /*
1026          * This call is kept first to be in symmetry with
1027          * acpi_lpss_runtime_suspend() one.
1028          */
1029         if (lpss_quirks & LPSS_QUIRK_ALWAYS_POWER_ON && iosf_mbi_available())
1030                 lpss_iosf_exit_d3_state();
1031
1032         ret = acpi_dev_resume(dev);
1033         if (ret)
1034                 return ret;
1035
1036         acpi_lpss_d3_to_d0_delay(pdata);
1037
1038         if (pdata->dev_desc->flags & LPSS_SAVE_CTX)
1039                 acpi_lpss_restore_ctx(dev, pdata);
1040
1041         return 0;
1042 }
1043
1044 #ifdef CONFIG_PM_SLEEP
1045 static int acpi_lpss_do_suspend_late(struct device *dev)
1046 {
1047         int ret;
1048
1049         if (dev_pm_smart_suspend_and_suspended(dev))
1050                 return 0;
1051
1052         ret = pm_generic_suspend_late(dev);
1053         return ret ? ret : acpi_lpss_suspend(dev, device_may_wakeup(dev));
1054 }
1055
1056 static int acpi_lpss_suspend_late(struct device *dev)
1057 {
1058         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1059
1060         if (pdata->dev_desc->resume_from_noirq)
1061                 return 0;
1062
1063         return acpi_lpss_do_suspend_late(dev);
1064 }
1065
1066 static int acpi_lpss_suspend_noirq(struct device *dev)
1067 {
1068         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1069         int ret;
1070
1071         if (pdata->dev_desc->resume_from_noirq) {
1072                 ret = acpi_lpss_do_suspend_late(dev);
1073                 if (ret)
1074                         return ret;
1075         }
1076
1077         return acpi_subsys_suspend_noirq(dev);
1078 }
1079
1080 static int acpi_lpss_do_resume_early(struct device *dev)
1081 {
1082         int ret = acpi_lpss_resume(dev);
1083
1084         return ret ? ret : pm_generic_resume_early(dev);
1085 }
1086
1087 static int acpi_lpss_resume_early(struct device *dev)
1088 {
1089         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1090
1091         if (pdata->dev_desc->resume_from_noirq)
1092                 return 0;
1093
1094         return acpi_lpss_do_resume_early(dev);
1095 }
1096
1097 static int acpi_lpss_resume_noirq(struct device *dev)
1098 {
1099         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1100         int ret;
1101
1102         ret = acpi_subsys_resume_noirq(dev);
1103         if (ret)
1104                 return ret;
1105
1106         if (!dev_pm_may_skip_resume(dev) && pdata->dev_desc->resume_from_noirq)
1107                 ret = acpi_lpss_do_resume_early(dev);
1108
1109         return ret;
1110 }
1111
1112 #endif /* CONFIG_PM_SLEEP */
1113
1114 static int acpi_lpss_runtime_suspend(struct device *dev)
1115 {
1116         int ret = pm_generic_runtime_suspend(dev);
1117
1118         return ret ? ret : acpi_lpss_suspend(dev, true);
1119 }
1120
1121 static int acpi_lpss_runtime_resume(struct device *dev)
1122 {
1123         int ret = acpi_lpss_resume(dev);
1124
1125         return ret ? ret : pm_generic_runtime_resume(dev);
1126 }
1127 #endif /* CONFIG_PM */
1128
1129 static struct dev_pm_domain acpi_lpss_pm_domain = {
1130 #ifdef CONFIG_PM
1131         .activate = acpi_lpss_activate,
1132         .dismiss = acpi_lpss_dismiss,
1133 #endif
1134         .ops = {
1135 #ifdef CONFIG_PM
1136 #ifdef CONFIG_PM_SLEEP
1137                 .prepare = acpi_subsys_prepare,
1138                 .complete = acpi_subsys_complete,
1139                 .suspend = acpi_subsys_suspend,
1140                 .suspend_late = acpi_lpss_suspend_late,
1141                 .suspend_noirq = acpi_lpss_suspend_noirq,
1142                 .resume_noirq = acpi_lpss_resume_noirq,
1143                 .resume_early = acpi_lpss_resume_early,
1144                 .freeze = acpi_subsys_freeze,
1145                 .freeze_late = acpi_subsys_freeze_late,
1146                 .freeze_noirq = acpi_subsys_freeze_noirq,
1147                 .thaw_noirq = acpi_subsys_thaw_noirq,
1148                 .poweroff = acpi_subsys_suspend,
1149                 .poweroff_late = acpi_lpss_suspend_late,
1150                 .poweroff_noirq = acpi_subsys_suspend_noirq,
1151                 .restore_noirq = acpi_subsys_resume_noirq,
1152                 .restore_early = acpi_lpss_resume_early,
1153 #endif
1154                 .runtime_suspend = acpi_lpss_runtime_suspend,
1155                 .runtime_resume = acpi_lpss_runtime_resume,
1156 #endif
1157         },
1158 };
1159
1160 static int acpi_lpss_platform_notify(struct notifier_block *nb,
1161                                      unsigned long action, void *data)
1162 {
1163         struct platform_device *pdev = to_platform_device(data);
1164         struct lpss_private_data *pdata;
1165         struct acpi_device *adev;
1166         const struct acpi_device_id *id;
1167
1168         id = acpi_match_device(acpi_lpss_device_ids, &pdev->dev);
1169         if (!id || !id->driver_data)
1170                 return 0;
1171
1172         if (acpi_bus_get_device(ACPI_HANDLE(&pdev->dev), &adev))
1173                 return 0;
1174
1175         pdata = acpi_driver_data(adev);
1176         if (!pdata)
1177                 return 0;
1178
1179         if (pdata->mmio_base &&
1180             pdata->mmio_size < pdata->dev_desc->prv_offset + LPSS_LTR_SIZE) {
1181                 dev_err(&pdev->dev, "MMIO size insufficient to access LTR\n");
1182                 return 0;
1183         }
1184
1185         switch (action) {
1186         case BUS_NOTIFY_BIND_DRIVER:
1187                 dev_pm_domain_set(&pdev->dev, &acpi_lpss_pm_domain);
1188                 break;
1189         case BUS_NOTIFY_DRIVER_NOT_BOUND:
1190         case BUS_NOTIFY_UNBOUND_DRIVER:
1191                 dev_pm_domain_set(&pdev->dev, NULL);
1192                 break;
1193         case BUS_NOTIFY_ADD_DEVICE:
1194                 dev_pm_domain_set(&pdev->dev, &acpi_lpss_pm_domain);
1195                 if (pdata->dev_desc->flags & LPSS_LTR)
1196                         return sysfs_create_group(&pdev->dev.kobj,
1197                                                   &lpss_attr_group);
1198                 break;
1199         case BUS_NOTIFY_DEL_DEVICE:
1200                 if (pdata->dev_desc->flags & LPSS_LTR)
1201                         sysfs_remove_group(&pdev->dev.kobj, &lpss_attr_group);
1202                 dev_pm_domain_set(&pdev->dev, NULL);
1203                 break;
1204         default:
1205                 break;
1206         }
1207
1208         return 0;
1209 }
1210
1211 static struct notifier_block acpi_lpss_nb = {
1212         .notifier_call = acpi_lpss_platform_notify,
1213 };
1214
1215 static void acpi_lpss_bind(struct device *dev)
1216 {
1217         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1218
1219         if (!pdata || !pdata->mmio_base || !(pdata->dev_desc->flags & LPSS_LTR))
1220                 return;
1221
1222         if (pdata->mmio_size >= pdata->dev_desc->prv_offset + LPSS_LTR_SIZE)
1223                 dev->power.set_latency_tolerance = acpi_lpss_set_ltr;
1224         else
1225                 dev_err(dev, "MMIO size insufficient to access LTR\n");
1226 }
1227
1228 static void acpi_lpss_unbind(struct device *dev)
1229 {
1230         dev->power.set_latency_tolerance = NULL;
1231 }
1232
1233 static struct acpi_scan_handler lpss_handler = {
1234         .ids = acpi_lpss_device_ids,
1235         .attach = acpi_lpss_create_device,
1236         .bind = acpi_lpss_bind,
1237         .unbind = acpi_lpss_unbind,
1238 };
1239
1240 void __init acpi_lpss_init(void)
1241 {
1242         const struct x86_cpu_id *id;
1243         int ret;
1244
1245         ret = lpt_clk_init();
1246         if (ret)
1247                 return;
1248
1249         id = x86_match_cpu(lpss_cpu_ids);
1250         if (id)
1251                 lpss_quirks |= LPSS_QUIRK_ALWAYS_POWER_ON;
1252
1253         bus_register_notifier(&platform_bus_type, &acpi_lpss_nb);
1254         acpi_scan_add_handler(&lpss_handler);
1255 }
1256
1257 #else
1258
1259 static struct acpi_scan_handler lpss_handler = {
1260         .ids = acpi_lpss_device_ids,
1261 };
1262
1263 void __init acpi_lpss_init(void)
1264 {
1265         acpi_scan_add_handler(&lpss_handler);
1266 }
1267
1268 #endif /* CONFIG_X86_INTEL_LPSS */