1 # SPDX-License-Identifier: GPL-2.0
4 select ARCH_HAS_SYNC_DMA_FOR_CPU
5 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
6 select ARCH_NO_COHERENT_DMA_MMAP if !MMU
7 select ARCH_WANT_FRAME_POINTERS
8 select ARCH_WANT_IPC_PARSE_VERSION
9 select BUILDTIME_EXTABLE_SORT
10 select CLONE_BACKWARDS
12 select DMA_REMAP if MMU
13 select GENERIC_ATOMIC64
14 select GENERIC_CLOCKEVENTS
15 select GENERIC_IRQ_SHOW
16 select GENERIC_PCI_IOMAP
17 select GENERIC_SCHED_CLOCK
18 select GENERIC_STRNCPY_FROM_USER if KASAN
19 select HAVE_ARCH_JUMP_LABEL
20 select HAVE_ARCH_KASAN if MMU
21 select HAVE_ARCH_TRACEHOOK
22 select HAVE_DEBUG_KMEMLEAK
23 select HAVE_DMA_CONTIGUOUS
24 select HAVE_EXIT_THREAD
25 select HAVE_FUNCTION_TRACER
26 select HAVE_FUTEX_CMPXCHG if !MMU
27 select HAVE_HW_BREAKPOINT if PERF_EVENTS
28 select HAVE_IRQ_TIME_ACCOUNTING
30 select HAVE_PERF_EVENTS
31 select HAVE_STACKPROTECTOR
32 select HAVE_SYSCALL_TRACEPOINTS
34 select MODULES_USE_ELF_RELA
35 select PERF_USE_VMALLOC
38 Xtensa processors are 32-bit RISC machines designed by Tensilica
39 primarily for embedded systems. These processors are both
40 configurable and extensible. The Linux port to the Xtensa
41 architecture supports all processor configurations and extensions,
42 with reasonable minimum requirements. The Xtensa Linux project has
43 a home page at <http://www.linux-xtensa.org/>.
45 config RWSEM_XCHGADD_ALGORITHM
48 config GENERIC_HWEIGHT
51 config ARCH_HAS_ILOG2_U32
54 config ARCH_HAS_ILOG2_U64
64 config LOCKDEP_SUPPORT
67 config STACKTRACE_SUPPORT
70 config TRACE_IRQFLAGS_SUPPORT
76 config HAVE_XTENSA_GPIO32
79 config KASAN_SHADOW_OFFSET
83 menu "Processor type and features"
86 prompt "Xtensa Processor Configuration"
87 default XTENSA_VARIANT_FSF
89 config XTENSA_VARIANT_FSF
90 bool "fsf - default (not generic) configuration"
93 config XTENSA_VARIANT_DC232B
94 bool "dc232b - Diamond 232L Standard Core Rev.B (LE)"
96 select HAVE_XTENSA_GPIO32
98 This variant refers to Tensilica's Diamond 232L Standard core Rev.B (LE).
100 config XTENSA_VARIANT_DC233C
101 bool "dc233c - Diamond 233L Standard Core Rev.C (LE)"
103 select HAVE_XTENSA_GPIO32
105 This variant refers to Tensilica's Diamond 233L Standard core Rev.C (LE).
107 config XTENSA_VARIANT_CUSTOM
108 bool "Custom Xtensa processor configuration"
109 select HAVE_XTENSA_GPIO32
111 Select this variant to use a custom Xtensa processor configuration.
112 You will be prompted for a processor variant CORENAME.
115 config XTENSA_VARIANT_CUSTOM_NAME
116 string "Xtensa Processor Custom Core Variant Name"
117 depends on XTENSA_VARIANT_CUSTOM
119 Provide the name of a custom Xtensa processor variant.
120 This CORENAME selects arch/xtensa/variant/CORENAME.
121 Dont forget you have to select MMU if you have one.
123 config XTENSA_VARIANT_NAME
125 default "dc232b" if XTENSA_VARIANT_DC232B
126 default "dc233c" if XTENSA_VARIANT_DC233C
127 default "fsf" if XTENSA_VARIANT_FSF
128 default XTENSA_VARIANT_CUSTOM_NAME if XTENSA_VARIANT_CUSTOM
130 config XTENSA_VARIANT_MMU
131 bool "Core variant has a Full MMU (TLB, Pages, Protection, etc)"
132 depends on XTENSA_VARIANT_CUSTOM
136 Build a Conventional Kernel with full MMU support,
137 ie: it supports a TLB with auto-loading, page protection.
139 config XTENSA_VARIANT_HAVE_PERF_EVENTS
140 bool "Core variant has Performance Monitor Module"
141 depends on XTENSA_VARIANT_CUSTOM
144 Enable if core variant has Performance Monitor Module with
145 External Registers Interface.
149 config XTENSA_FAKE_NMI
150 bool "Treat PMM IRQ as NMI"
151 depends on XTENSA_VARIANT_HAVE_PERF_EVENTS
154 If PMM IRQ is the only IRQ at EXCM level it is safe to
155 treat it as NMI, which improves accuracy of profiling.
157 If there are other interrupts at or above PMM IRQ priority level
158 but not above the EXCM level, PMM IRQ still may be treated as NMI,
159 but only if these IRQs are not used. There will be a build warning
160 saying that this is not safe, and a bugcheck if one of these IRQs
165 config XTENSA_UNALIGNED_USER
166 bool "Unaligned memory access in use space"
168 The Xtensa architecture currently does not handle unaligned
169 memory accesses in hardware but through an exception handler.
170 Per default, unaligned memory accesses are disabled in user space.
172 Say Y here to enable unaligned memory access in user space.
175 bool "System Supports SMP (MX)"
176 depends on XTENSA_VARIANT_CUSTOM
179 This option is use to indicate that the system-on-a-chip (SOC)
180 supports Multiprocessing. Multiprocessor support implemented above
181 the CPU core definition and currently needs to be selected manually.
183 Multiprocessor support in implemented with external cache and
184 interrupt controllers.
186 The MX interrupt distributer adds Interprocessor Interrupts
187 and causes the IRQ numbers to be increased by 4 for devices
188 like the open cores ethernet driver and the serial interface.
190 You still have to select "Enable SMP" to enable SMP on this SOC.
193 bool "Enable Symmetric multi-processing support"
195 select GENERIC_SMP_IDLE_THREAD
197 Enabled SMP Software; allows more than one CPU/CORE
198 to be activated during startup.
202 int "Maximum number of CPUs (2-32)"
207 bool "Enable CPU hotplug support"
210 Say Y here to allow turning CPUs off and on. CPUs can be
211 controlled through /sys/devices/system/cpu.
213 Say N if you want to disable CPU hotplug.
215 config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
216 bool "Initialize Xtensa MMU inside the Linux kernel code"
217 depends on !XTENSA_VARIANT_FSF && !XTENSA_VARIANT_DC232B
218 default y if XTENSA_VARIANT_DC233C || XTENSA_VARIANT_CUSTOM
220 Earlier version initialized the MMU in the exception vector
221 before jumping to _startup in head.S and had an advantage that
222 it was possible to place a software breakpoint at 'reset' and
223 then enter your normal kernel breakpoints once the MMU was mapped
224 to the kernel mappings (0XC0000000).
226 This unfortunately won't work for U-Boot and likely also wont
227 work for using KEXEC to have a hot kernel ready for doing a
230 So now the MMU is initialized in head.S but it's necessary to
231 use hardware breakpoints (gdb 'hbreak' cmd) to break at _startup.
232 xt-gdb can't place a Software Breakpoint in the 0XD region prior
233 to mapping the MMU and after mapping even if the area of low memory
234 was mapped gdb wouldn't remove the breakpoint on hitting it as the
235 PC wouldn't match. Since Hardware Breakpoints are recommended for
236 Linux configurations it seems reasonable to just assume they exist
237 and leave this older mechanism for unfortunate souls that choose
238 not to follow Tensilica's recommendation.
240 Selecting this will cause U-Boot to set the KERNEL Load and Entry
241 address at 0x00003000 instead of the mapped std of 0xD0003000.
245 config MEMMAP_CACHEATTR
246 hex "Cache attributes for the memory address space"
250 These cache attributes are set up for noMMU systems. Each hex digit
251 specifies cache attributes for the corresponding 512MB memory
252 region: bits 0..3 -- for addresses 0x00000000..0x1fffffff,
253 bits 4..7 -- for addresses 0x20000000..0x3fffffff, and so on.
255 Cache attribute values are specific for the MMU type, so e.g.
256 for region protection MMUs: 2 is cache bypass, 4 is WB cached,
257 1 is WT cached, f is illegal. For ful MMU: bit 0 makes it executable,
258 bit 1 makes it writable, bits 2..3 meaning is 0: cache bypass,
259 1: WB cache, 2: WT cache, 3: special (c and e are illegal, f is
263 hex "Physical address of the KSEG mapping"
264 depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX && MMU
267 This is the physical address where KSEG is mapped. Please refer to
268 the chosen KSEG layout help for the required address alignment.
269 Unpacked kernel image (including vectors) must be located completely
271 Physical memory below this address is not available to linux.
273 If unsure, leave the default value here.
275 config KERNEL_LOAD_ADDRESS
276 hex "Kernel load address"
277 default 0x60003000 if !MMU
278 default 0x00003000 if MMU && INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
279 default 0xd0003000 if MMU && !INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
281 This is the address where the kernel is loaded.
282 It is virtual address for MMUv2 configurations and physical address
283 for all other configurations.
285 If unsure, leave the default value here.
287 config VECTORS_OFFSET
288 hex "Kernel vectors offset"
291 This is the offset of the kernel image from the relocatable vectors
294 If unsure, leave the default value here.
299 default XTENSA_KSEG_MMU_V2
301 config XTENSA_KSEG_MMU_V2
302 bool "MMUv2: 128MB cached + 128MB uncached"
304 MMUv2 compatible kernel memory map: TLB way 5 maps 128MB starting
305 at KSEG_PADDR to 0xd0000000 with cache and to 0xd8000000
307 KSEG_PADDR must be aligned to 128MB.
309 config XTENSA_KSEG_256M
310 bool "256MB cached + 256MB uncached"
311 depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
313 TLB way 6 maps 256MB starting at KSEG_PADDR to 0xb0000000
314 with cache and to 0xc0000000 without cache.
315 KSEG_PADDR must be aligned to 256MB.
317 config XTENSA_KSEG_512M
318 bool "512MB cached + 512MB uncached"
319 depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
321 TLB way 6 maps 512MB starting at KSEG_PADDR to 0xa0000000
322 with cache and to 0xc0000000 without cache.
323 KSEG_PADDR must be aligned to 256MB.
328 bool "High Memory Support"
331 Linux can use the full amount of RAM in the system by
332 default. However, the default MMUv2 setup only maps the
333 lowermost 128 MB of memory linearly to the areas starting
334 at 0xd0000000 (cached) and 0xd8000000 (uncached).
335 When there are more than 128 MB memory in the system not
336 all of it can be "permanently mapped" by the kernel.
337 The physical memory that's not permanently mapped is called
340 If you are compiling a kernel which will never run on a
341 machine with more than 128 MB total physical RAM, answer
346 config FAST_SYSCALL_XTENSA
347 bool "Enable fast atomic syscalls"
350 fast_syscall_xtensa is a syscall that can make atomic operations
351 on UP kernel when processor has no s32c1i support.
353 This syscall is deprecated. It may have issues when called with
354 invalid arguments. It is provided only for backwards compatibility.
355 Only enable it if your userspace software requires it.
359 config FAST_SYSCALL_SPILL_REGISTERS
360 bool "Enable spill registers syscall"
363 fast_syscall_spill_registers is a syscall that spills all active
364 register windows of a calling userspace task onto its stack.
366 This syscall is deprecated. It may have issues when called with
367 invalid arguments. It is provided only for backwards compatibility.
368 Only enable it if your userspace software requires it.
374 config XTENSA_CALIBRATE_CCOUNT
377 On some platforms (XT2000, for example), the CPU clock rate can
378 vary. The frequency can be determined, however, by measuring
379 against a well known, fixed frequency, such as an UART oscillator.
381 config SERIAL_CONSOLE
390 Find out whether you have a PCI motherboard. PCI is the name of a
391 bus system, i.e. the way the CPU talks to the other stuff inside
392 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
393 VESA. If you have PCI, say Y, otherwise N.
395 source "drivers/pci/Kconfig"
399 menu "Platform options"
402 prompt "Xtensa System Type"
403 default XTENSA_PLATFORM_ISS
405 config XTENSA_PLATFORM_ISS
407 select XTENSA_CALIBRATE_CCOUNT
408 select SERIAL_CONSOLE
410 ISS is an acronym for Tensilica's Instruction Set Simulator.
412 config XTENSA_PLATFORM_XT2000
416 XT2000 is the name of Tensilica's feature-rich emulation platform.
417 This hardware is capable of running a full Linux distribution.
419 config XTENSA_PLATFORM_XTFPGA
421 select ETHOC if ETHERNET
422 select PLATFORM_WANT_DEFAULT_MEM if !MMU
423 select SERIAL_CONSOLE
424 select XTENSA_CALIBRATE_CCOUNT
426 XTFPGA is the name of Tensilica board family (LX60, LX110, LX200, ML605).
427 This hardware is capable of running a full Linux distribution.
431 config PLATFORM_NR_IRQS
433 default 3 if XTENSA_PLATFORM_XT2000
436 config XTENSA_CPU_CLOCK
437 int "CPU clock rate [MHz]"
438 depends on !XTENSA_CALIBRATE_CCOUNT
441 config GENERIC_CALIBRATE_DELAY
442 bool "Auto calibration of the BogoMIPS value"
444 The BogoMIPS value can easily be derived from the CPU frequency.
447 bool "Default bootloader kernel arguments"
450 string "Initial kernel command string"
451 depends on CMDLINE_BOOL
452 default "console=ttyS0,38400 root=/dev/ram"
454 On some architectures (EBSA110 and CATS), there is currently no way
455 for the boot loader to pass arguments to the kernel. For these
456 architectures, you should supply some command-line options at build
457 time by entering them here. As a minimum, you should specify the
458 memory size and the root device (e.g., mem=64M root=/dev/nfs).
461 bool "Flattened Device Tree support"
463 select OF_EARLY_FLATTREE
464 select OF_RESERVED_MEM
466 Include support for flattened device tree machine descriptions.
469 string "DTB to build into the kernel image"
472 config PARSE_BOOTPARAM
473 bool "Parse bootparam block"
476 Parse parameters passed to the kernel from the bootloader. It may
477 be disabled if the kernel is known to run without the bootloader.
481 config BLK_DEV_SIMDISK
482 tristate "Host file-based simulated block device support"
484 depends on XTENSA_PLATFORM_ISS && BLOCK
486 Create block devices that map to files in the host file system.
487 Device binding to host file may be changed at runtime via proc
488 interface provided the device is not in use.
490 config BLK_DEV_SIMDISK_COUNT
491 int "Number of host file-based simulated block devices"
493 depends on BLK_DEV_SIMDISK
496 This is the default minimal number of created block devices.
497 Kernel/module parameter 'simdisk_count' may be used to change this
498 value at runtime. More file names (but no more than 10) may be
499 specified as parameters, simdisk_count grows accordingly.
501 config SIMDISK0_FILENAME
502 string "Host filename for the first simulated device"
503 depends on BLK_DEV_SIMDISK = y
506 Attach a first simdisk to a host file. Conventionally, this file
507 contains a root file system.
509 config SIMDISK1_FILENAME
510 string "Host filename for the second simulated device"
511 depends on BLK_DEV_SIMDISK = y && BLK_DEV_SIMDISK_COUNT != 1
514 Another simulated disk in a host file for a buildroot-independent
517 config FORCE_MAX_ZONEORDER
518 int "Maximum zone order"
521 The kernel memory allocator divides physically contiguous memory
522 blocks into "zones", where each zone is a power of two number of
523 pages. This option selects the largest power of two that the kernel
524 keeps in the memory allocator. If you need to allocate very large
525 blocks of physically contiguous memory, then you may need to
528 This config option is actually maximum order plus one. For example,
529 a value of 11 means that the largest free memory block is 2^10 pages.
531 source "drivers/pcmcia/Kconfig"
533 config PLATFORM_WANT_DEFAULT_MEM
536 config DEFAULT_MEM_START
538 prompt "PAGE_OFFSET/PHYS_OFFSET" if !MMU && PLATFORM_WANT_DEFAULT_MEM
539 default 0x60000000 if PLATFORM_WANT_DEFAULT_MEM
542 This is the base address used for both PAGE_OFFSET and PHYS_OFFSET
543 in noMMU configurations.
545 If unsure, leave the default value here.
548 bool "Enable XTFPGA LCD driver"
549 depends on XTENSA_PLATFORM_XTFPGA
552 There's a 2x16 LCD on most of XTFPGA boards, kernel may output
553 progress messages there during bootup/shutdown. It may be useful
554 during board bringup.
558 config XTFPGA_LCD_BASE_ADDR
559 hex "XTFPGA LCD base address"
560 depends on XTFPGA_LCD
563 Base address of the LCD controller inside KIO region.
564 Different boards from XTFPGA family have LCD controller at different
565 addresses. Please consult prototyping user guide for your board for
566 the correct address. Wrong address here may lead to hardware lockup.
568 config XTFPGA_LCD_8BIT_ACCESS
569 bool "Use 8-bit access to XTFPGA LCD"
570 depends on XTFPGA_LCD
573 LCD may be connected with 4- or 8-bit interface, 8-bit access may
574 only be used with 8-bit interface. Please consult prototyping user
575 guide for your board for the correct interface width.
579 menu "Power management options"
581 source "kernel/power/Kconfig"