2 * linux/arch/x86-64/kernel/setup.c
4 * Copyright (C) 1995 Linus Torvalds
6 * Nov 2001 Dave Jones <davej@suse.de>
7 * Forked from i386 setup code.
11 * This file handles the architecture-dependent parts of initialization
14 #include <linux/errno.h>
15 #include <linux/sched.h>
16 #include <linux/kernel.h>
18 #include <linux/stddef.h>
19 #include <linux/unistd.h>
20 #include <linux/ptrace.h>
21 #include <linux/slab.h>
22 #include <linux/user.h>
23 #include <linux/a.out.h>
24 #include <linux/screen_info.h>
25 #include <linux/ioport.h>
26 #include <linux/delay.h>
27 #include <linux/init.h>
28 #include <linux/initrd.h>
29 #include <linux/highmem.h>
30 #include <linux/bootmem.h>
31 #include <linux/module.h>
32 #include <asm/processor.h>
33 #include <linux/console.h>
34 #include <linux/seq_file.h>
35 #include <linux/crash_dump.h>
36 #include <linux/root_dev.h>
37 #include <linux/pci.h>
38 #include <linux/acpi.h>
39 #include <linux/kallsyms.h>
40 #include <linux/edd.h>
41 #include <linux/mmzone.h>
42 #include <linux/kexec.h>
43 #include <linux/cpufreq.h>
44 #include <linux/dmi.h>
45 #include <linux/dma-mapping.h>
46 #include <linux/ctype.h>
49 #include <asm/uaccess.h>
50 #include <asm/system.h>
55 #include <video/edid.h>
58 #include <asm/mpspec.h>
59 #include <asm/mmu_context.h>
60 #include <asm/bootsetup.h>
61 #include <asm/proto.h>
62 #include <asm/setup.h>
63 #include <asm/mach_apic.h>
65 #include <asm/sections.h>
72 struct cpuinfo_x86 boot_cpu_data __read_mostly;
73 EXPORT_SYMBOL(boot_cpu_data);
75 unsigned long mmu_cr4_features;
77 /* Boot loader ID as an integer, for the benefit of proc_dointvec */
80 unsigned long saved_video_mode;
86 char dmi_alloc_data[DMI_MAX_DATA];
91 struct screen_info screen_info;
92 EXPORT_SYMBOL(screen_info);
93 struct sys_desc_table_struct {
94 unsigned short length;
95 unsigned char table[0];
98 struct edid_info edid_info;
99 EXPORT_SYMBOL_GPL(edid_info);
101 extern int root_mountflags;
103 char command_line[COMMAND_LINE_SIZE];
105 struct resource standard_io_resources[] = {
106 { .name = "dma1", .start = 0x00, .end = 0x1f,
107 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
108 { .name = "pic1", .start = 0x20, .end = 0x21,
109 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
110 { .name = "timer0", .start = 0x40, .end = 0x43,
111 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
112 { .name = "timer1", .start = 0x50, .end = 0x53,
113 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
114 { .name = "keyboard", .start = 0x60, .end = 0x6f,
115 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
116 { .name = "dma page reg", .start = 0x80, .end = 0x8f,
117 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
118 { .name = "pic2", .start = 0xa0, .end = 0xa1,
119 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
120 { .name = "dma2", .start = 0xc0, .end = 0xdf,
121 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
122 { .name = "fpu", .start = 0xf0, .end = 0xff,
123 .flags = IORESOURCE_BUSY | IORESOURCE_IO }
126 #define STANDARD_IO_RESOURCES \
127 (sizeof standard_io_resources / sizeof standard_io_resources[0])
129 #define IORESOURCE_RAM (IORESOURCE_BUSY | IORESOURCE_MEM)
131 struct resource data_resource = {
132 .name = "Kernel data",
135 .flags = IORESOURCE_RAM,
137 struct resource code_resource = {
138 .name = "Kernel code",
141 .flags = IORESOURCE_RAM,
144 #define IORESOURCE_ROM (IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM)
146 static struct resource system_rom_resource = {
147 .name = "System ROM",
150 .flags = IORESOURCE_ROM,
153 static struct resource extension_rom_resource = {
154 .name = "Extension ROM",
157 .flags = IORESOURCE_ROM,
160 static struct resource adapter_rom_resources[] = {
161 { .name = "Adapter ROM", .start = 0xc8000, .end = 0,
162 .flags = IORESOURCE_ROM },
163 { .name = "Adapter ROM", .start = 0, .end = 0,
164 .flags = IORESOURCE_ROM },
165 { .name = "Adapter ROM", .start = 0, .end = 0,
166 .flags = IORESOURCE_ROM },
167 { .name = "Adapter ROM", .start = 0, .end = 0,
168 .flags = IORESOURCE_ROM },
169 { .name = "Adapter ROM", .start = 0, .end = 0,
170 .flags = IORESOURCE_ROM },
171 { .name = "Adapter ROM", .start = 0, .end = 0,
172 .flags = IORESOURCE_ROM }
175 #define ADAPTER_ROM_RESOURCES \
176 (sizeof adapter_rom_resources / sizeof adapter_rom_resources[0])
178 static struct resource video_rom_resource = {
182 .flags = IORESOURCE_ROM,
185 static struct resource video_ram_resource = {
186 .name = "Video RAM area",
189 .flags = IORESOURCE_RAM,
192 #define romsignature(x) (*(unsigned short *)(x) == 0xaa55)
194 static int __init romchecksum(unsigned char *rom, unsigned long length)
196 unsigned char *p, sum = 0;
198 for (p = rom; p < rom + length; p++)
203 static void __init probe_roms(void)
205 unsigned long start, length, upper;
210 upper = adapter_rom_resources[0].start;
211 for (start = video_rom_resource.start; start < upper; start += 2048) {
212 rom = isa_bus_to_virt(start);
213 if (!romsignature(rom))
216 video_rom_resource.start = start;
218 /* 0 < length <= 0x7f * 512, historically */
219 length = rom[2] * 512;
221 /* if checksum okay, trust length byte */
222 if (length && romchecksum(rom, length))
223 video_rom_resource.end = start + length - 1;
225 request_resource(&iomem_resource, &video_rom_resource);
229 start = (video_rom_resource.end + 1 + 2047) & ~2047UL;
234 request_resource(&iomem_resource, &system_rom_resource);
235 upper = system_rom_resource.start;
237 /* check for extension rom (ignore length byte!) */
238 rom = isa_bus_to_virt(extension_rom_resource.start);
239 if (romsignature(rom)) {
240 length = extension_rom_resource.end - extension_rom_resource.start + 1;
241 if (romchecksum(rom, length)) {
242 request_resource(&iomem_resource, &extension_rom_resource);
243 upper = extension_rom_resource.start;
247 /* check for adapter roms on 2k boundaries */
248 for (i = 0; i < ADAPTER_ROM_RESOURCES && start < upper; start += 2048) {
249 rom = isa_bus_to_virt(start);
250 if (!romsignature(rom))
253 /* 0 < length <= 0x7f * 512, historically */
254 length = rom[2] * 512;
256 /* but accept any length that fits if checksum okay */
257 if (!length || start + length > upper || !romchecksum(rom, length))
260 adapter_rom_resources[i].start = start;
261 adapter_rom_resources[i].end = start + length - 1;
262 request_resource(&iomem_resource, &adapter_rom_resources[i]);
264 start = adapter_rom_resources[i++].end & ~2047UL;
268 #ifdef CONFIG_PROC_VMCORE
269 /* elfcorehdr= specifies the location of elf core header
270 * stored by the crashed kernel. This option will be passed
271 * by kexec loader to the capture kernel.
273 static int __init setup_elfcorehdr(char *arg)
278 elfcorehdr_addr = memparse(arg, &end);
279 return end > arg ? 0 : -EINVAL;
281 early_param("elfcorehdr", setup_elfcorehdr);
286 contig_initmem_init(unsigned long start_pfn, unsigned long end_pfn)
288 unsigned long bootmap_size, bootmap;
290 bootmap_size = bootmem_bootmap_pages(end_pfn)<<PAGE_SHIFT;
291 bootmap = find_e820_area(0, end_pfn<<PAGE_SHIFT, bootmap_size);
293 panic("Cannot find bootmem map of size %ld\n",bootmap_size);
294 bootmap_size = init_bootmem(bootmap >> PAGE_SHIFT, end_pfn);
295 e820_bootmem_free(NODE_DATA(0), 0, end_pfn << PAGE_SHIFT);
296 reserve_bootmem(bootmap, bootmap_size);
300 #if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE)
302 #ifdef CONFIG_EDD_MODULE
306 * copy_edd() - Copy the BIOS EDD information
307 * from boot_params into a safe place.
310 static inline void copy_edd(void)
312 memcpy(edd.mbr_signature, EDD_MBR_SIGNATURE, sizeof(edd.mbr_signature));
313 memcpy(edd.edd_info, EDD_BUF, sizeof(edd.edd_info));
314 edd.mbr_signature_nr = EDD_MBR_SIG_NR;
315 edd.edd_info_nr = EDD_NR;
318 static inline void copy_edd(void)
323 #define EBDA_ADDR_POINTER 0x40E
325 unsigned __initdata ebda_addr;
326 unsigned __initdata ebda_size;
328 static void discover_ebda(void)
331 * there is a real-mode segmented pointer pointing to the
332 * 4K EBDA area at 0x40E
334 ebda_addr = *(unsigned short *)EBDA_ADDR_POINTER;
337 ebda_size = *(unsigned short *)(unsigned long)ebda_addr;
339 /* Round EBDA up to pages */
343 ebda_size = round_up(ebda_size + (ebda_addr & ~PAGE_MASK), PAGE_SIZE);
344 if (ebda_size > 64*1024)
348 void __init setup_arch(char **cmdline_p)
350 printk(KERN_INFO "Command line: %s\n", saved_command_line);
352 ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
353 screen_info = SCREEN_INFO;
354 edid_info = EDID_INFO;
355 saved_video_mode = SAVED_VIDEO_MODE;
356 bootloader_type = LOADER_TYPE;
358 #ifdef CONFIG_BLK_DEV_RAM
359 rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
360 rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
361 rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
363 setup_memory_region();
366 if (!MOUNT_ROOT_RDONLY)
367 root_mountflags &= ~MS_RDONLY;
368 init_mm.start_code = (unsigned long) &_text;
369 init_mm.end_code = (unsigned long) &_etext;
370 init_mm.end_data = (unsigned long) &_edata;
371 init_mm.brk = (unsigned long) &_end;
373 code_resource.start = virt_to_phys(&_text);
374 code_resource.end = virt_to_phys(&_etext)-1;
375 data_resource.start = virt_to_phys(&_etext);
376 data_resource.end = virt_to_phys(&_edata)-1;
378 early_identify_cpu(&boot_cpu_data);
380 strlcpy(command_line, saved_command_line, COMMAND_LINE_SIZE);
381 *cmdline_p = command_line;
385 finish_e820_parsing();
388 * partially used pages are not usable - thus
389 * we are rounding upwards:
391 end_pfn = e820_end_of_ram();
392 num_physpages = end_pfn;
398 init_memory_mapping(0, (end_pfn_map << PAGE_SHIFT));
406 * Initialize the ACPI boot-time table parser (gets the RSDP and SDT).
407 * Call this early for SRAT node setup.
409 acpi_boot_table_init();
412 /* How many end-of-memory variables you have, grandma! */
413 max_low_pfn = end_pfn;
415 high_memory = (void *)__va(end_pfn * PAGE_SIZE - 1) + 1;
417 #ifdef CONFIG_ACPI_NUMA
419 * Parse SRAT to discover nodes.
425 numa_initmem_init(0, end_pfn);
427 contig_initmem_init(0, end_pfn);
430 /* Reserve direct mapping */
431 reserve_bootmem_generic(table_start << PAGE_SHIFT,
432 (table_end - table_start) << PAGE_SHIFT);
435 reserve_bootmem_generic(__pa_symbol(&_text),
436 __pa_symbol(&_end) - __pa_symbol(&_text));
439 * reserve physical page 0 - it's a special BIOS page on many boxes,
440 * enabling clean reboots, SMP operation, laptop functions.
442 reserve_bootmem_generic(0, PAGE_SIZE);
444 /* reserve ebda region */
446 reserve_bootmem_generic(ebda_addr, ebda_size);
450 * But first pinch a few for the stack/trampoline stuff
451 * FIXME: Don't need the extra page at 4K, but need to fix
452 * trampoline before removing it. (see the GDT stuff)
454 reserve_bootmem_generic(PAGE_SIZE, PAGE_SIZE);
456 /* Reserve SMP trampoline */
457 reserve_bootmem_generic(SMP_TRAMPOLINE_BASE, PAGE_SIZE);
460 #ifdef CONFIG_ACPI_SLEEP
462 * Reserve low memory region for sleep support.
464 acpi_reserve_bootmem();
467 * Find and reserve possible boot-time SMP configuration:
470 #ifdef CONFIG_BLK_DEV_INITRD
471 if (LOADER_TYPE && INITRD_START) {
472 if (INITRD_START + INITRD_SIZE <= (end_pfn << PAGE_SHIFT)) {
473 reserve_bootmem_generic(INITRD_START, INITRD_SIZE);
475 INITRD_START ? INITRD_START + PAGE_OFFSET : 0;
476 initrd_end = initrd_start+INITRD_SIZE;
479 printk(KERN_ERR "initrd extends beyond end of memory "
480 "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
481 (unsigned long)(INITRD_START + INITRD_SIZE),
482 (unsigned long)(end_pfn << PAGE_SHIFT));
488 if (crashk_res.start != crashk_res.end) {
489 reserve_bootmem_generic(crashk_res.start,
490 crashk_res.end - crashk_res.start + 1);
501 * set this early, so we dont allocate cpu0
502 * if MADT list doesnt list BSP first
503 * mpparse.c/MP_processor_info() allocates logical cpu numbers.
505 cpu_set(0, cpu_present_map);
508 * Read APIC and some other early information from ACPI tables.
516 * get boot-time SMP configuration:
518 if (smp_found_config)
520 init_apic_mappings();
523 * Request address space for all standard RAM and ROM resources
524 * and also for regions reported as reserved by the e820.
527 e820_reserve_resources();
529 request_resource(&iomem_resource, &video_ram_resource);
533 /* request I/O space for devices used on all i[345]86 PCs */
534 for (i = 0; i < STANDARD_IO_RESOURCES; i++)
535 request_resource(&ioport_resource, &standard_io_resources[i]);
541 #if defined(CONFIG_VGA_CONSOLE)
542 conswitchp = &vga_con;
543 #elif defined(CONFIG_DUMMY_CONSOLE)
544 conswitchp = &dummy_con;
549 static int __cpuinit get_model_name(struct cpuinfo_x86 *c)
553 if (c->extended_cpuid_level < 0x80000004)
556 v = (unsigned int *) c->x86_model_id;
557 cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]);
558 cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]);
559 cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]);
560 c->x86_model_id[48] = 0;
565 static void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c)
567 unsigned int n, dummy, eax, ebx, ecx, edx;
569 n = c->extended_cpuid_level;
571 if (n >= 0x80000005) {
572 cpuid(0x80000005, &dummy, &ebx, &ecx, &edx);
573 printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
574 edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);
575 c->x86_cache_size=(ecx>>24)+(edx>>24);
576 /* On K8 L1 TLB is inclusive, so don't count it */
580 if (n >= 0x80000006) {
581 cpuid(0x80000006, &dummy, &ebx, &ecx, &edx);
582 ecx = cpuid_ecx(0x80000006);
583 c->x86_cache_size = ecx >> 16;
584 c->x86_tlbsize += ((ebx >> 16) & 0xfff) + (ebx & 0xfff);
586 printk(KERN_INFO "CPU: L2 Cache: %dK (%d bytes/line)\n",
587 c->x86_cache_size, ecx & 0xFF);
591 cpuid(0x80000007, &dummy, &dummy, &dummy, &c->x86_power);
592 if (n >= 0x80000008) {
593 cpuid(0x80000008, &eax, &dummy, &dummy, &dummy);
594 c->x86_virt_bits = (eax >> 8) & 0xff;
595 c->x86_phys_bits = eax & 0xff;
600 static int nearby_node(int apicid)
603 for (i = apicid - 1; i >= 0; i--) {
604 int node = apicid_to_node[i];
605 if (node != NUMA_NO_NODE && node_online(node))
608 for (i = apicid + 1; i < MAX_LOCAL_APIC; i++) {
609 int node = apicid_to_node[i];
610 if (node != NUMA_NO_NODE && node_online(node))
613 return first_node(node_online_map); /* Shouldn't happen */
618 * On a AMD dual core setup the lower bits of the APIC id distingush the cores.
619 * Assumes number of cores is a power of two.
621 static void __init amd_detect_cmp(struct cpuinfo_x86 *c)
626 int cpu = smp_processor_id();
628 unsigned apicid = hard_smp_processor_id();
630 unsigned ecx = cpuid_ecx(0x80000008);
632 c->x86_max_cores = (ecx & 0xff) + 1;
634 /* CPU telling us the core id bits shift? */
635 bits = (ecx >> 12) & 0xF;
637 /* Otherwise recompute */
639 while ((1 << bits) < c->x86_max_cores)
643 /* Low order bits define the core id (index of core in socket) */
644 c->cpu_core_id = c->phys_proc_id & ((1 << bits)-1);
645 /* Convert the APIC ID into the socket ID */
646 c->phys_proc_id = phys_pkg_id(bits);
649 node = c->phys_proc_id;
650 if (apicid_to_node[apicid] != NUMA_NO_NODE)
651 node = apicid_to_node[apicid];
652 if (!node_online(node)) {
653 /* Two possibilities here:
654 - The CPU is missing memory and no node was created.
655 In that case try picking one from a nearby CPU
656 - The APIC IDs differ from the HyperTransport node IDs
657 which the K8 northbridge parsing fills in.
658 Assume they are all increased by a constant offset,
659 but in the same order as the HT nodeids.
660 If that doesn't result in a usable node fall back to the
661 path for the previous case. */
662 int ht_nodeid = apicid - (cpu_data[0].phys_proc_id << bits);
663 if (ht_nodeid >= 0 &&
664 apicid_to_node[ht_nodeid] != NUMA_NO_NODE)
665 node = apicid_to_node[ht_nodeid];
666 /* Pick a nearby node */
667 if (!node_online(node))
668 node = nearby_node(apicid);
670 numa_set_node(cpu, node);
672 printk(KERN_INFO "CPU %d/%x -> Node %d\n", cpu, apicid, node);
677 static void __cpuinit init_amd(struct cpuinfo_x86 *c)
685 * Disable TLB flush filter by setting HWCR.FFDIS on K8
686 * bit 6 of msr C001_0015
688 * Errata 63 for SH-B3 steppings
689 * Errata 122 for all steppings (F+ have it disabled by default)
692 rdmsrl(MSR_K8_HWCR, value);
694 wrmsrl(MSR_K8_HWCR, value);
698 /* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
699 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
700 clear_bit(0*32+31, &c->x86_capability);
702 /* On C+ stepping K8 rep microcode works well for copy/memset */
703 level = cpuid_eax(1);
704 if (c->x86 == 15 && ((level >= 0x0f48 && level < 0x0f50) || level >= 0x0f58))
705 set_bit(X86_FEATURE_REP_GOOD, &c->x86_capability);
707 /* Enable workaround for FXSAVE leak */
709 set_bit(X86_FEATURE_FXSAVE_LEAK, &c->x86_capability);
711 level = get_model_name(c);
715 /* Should distinguish Models here, but this is only
716 a fallback anyways. */
717 strcpy(c->x86_model_id, "Hammer");
721 display_cacheinfo(c);
723 /* c->x86_power is 8000_0007 edx. Bit 8 is constant TSC */
724 if (c->x86_power & (1<<8))
725 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
727 /* Multi core CPU? */
728 if (c->extended_cpuid_level >= 0x80000008)
731 /* Fix cpuid4 emulation for more */
732 num_cache_leaves = 3;
734 /* When there is only one core no need to synchronize RDTSC */
735 if (num_possible_cpus() == 1)
736 set_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability);
738 clear_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability);
741 static void __cpuinit detect_ht(struct cpuinfo_x86 *c)
744 u32 eax, ebx, ecx, edx;
745 int index_msb, core_bits;
747 cpuid(1, &eax, &ebx, &ecx, &edx);
750 if (!cpu_has(c, X86_FEATURE_HT))
752 if (cpu_has(c, X86_FEATURE_CMP_LEGACY))
755 smp_num_siblings = (ebx & 0xff0000) >> 16;
757 if (smp_num_siblings == 1) {
758 printk(KERN_INFO "CPU: Hyper-Threading is disabled\n");
759 } else if (smp_num_siblings > 1 ) {
761 if (smp_num_siblings > NR_CPUS) {
762 printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings);
763 smp_num_siblings = 1;
767 index_msb = get_count_order(smp_num_siblings);
768 c->phys_proc_id = phys_pkg_id(index_msb);
770 smp_num_siblings = smp_num_siblings / c->x86_max_cores;
772 index_msb = get_count_order(smp_num_siblings) ;
774 core_bits = get_count_order(c->x86_max_cores);
776 c->cpu_core_id = phys_pkg_id(index_msb) &
777 ((1 << core_bits) - 1);
780 if ((c->x86_max_cores * smp_num_siblings) > 1) {
781 printk(KERN_INFO "CPU: Physical Processor ID: %d\n", c->phys_proc_id);
782 printk(KERN_INFO "CPU: Processor Core ID: %d\n", c->cpu_core_id);
789 * find out the number of processor cores on the die
791 static int __cpuinit intel_num_cpu_cores(struct cpuinfo_x86 *c)
795 if (c->cpuid_level < 4)
798 cpuid_count(4, 0, &eax, &t, &t, &t);
801 return ((eax >> 26) + 1);
806 static void srat_detect_node(void)
810 int cpu = smp_processor_id();
811 int apicid = hard_smp_processor_id();
813 /* Don't do the funky fallback heuristics the AMD version employs
815 node = apicid_to_node[apicid];
816 if (node == NUMA_NO_NODE)
817 node = first_node(node_online_map);
818 numa_set_node(cpu, node);
820 printk(KERN_INFO "CPU %d/%x -> Node %d\n", cpu, apicid, node);
824 static void __cpuinit init_intel(struct cpuinfo_x86 *c)
829 init_intel_cacheinfo(c);
830 if (c->cpuid_level > 9 ) {
831 unsigned eax = cpuid_eax(10);
832 /* Check for version and the number of counters */
833 if ((eax & 0xff) && (((eax>>8) & 0xff) > 1))
834 set_bit(X86_FEATURE_ARCH_PERFMON, &c->x86_capability);
837 n = c->extended_cpuid_level;
838 if (n >= 0x80000008) {
839 unsigned eax = cpuid_eax(0x80000008);
840 c->x86_virt_bits = (eax >> 8) & 0xff;
841 c->x86_phys_bits = eax & 0xff;
842 /* CPUID workaround for Intel 0F34 CPU */
843 if (c->x86_vendor == X86_VENDOR_INTEL &&
844 c->x86 == 0xF && c->x86_model == 0x3 &&
846 c->x86_phys_bits = 36;
850 c->x86_cache_alignment = c->x86_clflush_size * 2;
851 if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
852 (c->x86 == 0x6 && c->x86_model >= 0x0e))
853 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
855 set_bit(X86_FEATURE_REP_GOOD, &c->x86_capability);
856 set_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability);
857 c->x86_max_cores = intel_num_cpu_cores(c);
862 static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c)
864 char *v = c->x86_vendor_id;
866 if (!strcmp(v, "AuthenticAMD"))
867 c->x86_vendor = X86_VENDOR_AMD;
868 else if (!strcmp(v, "GenuineIntel"))
869 c->x86_vendor = X86_VENDOR_INTEL;
871 c->x86_vendor = X86_VENDOR_UNKNOWN;
874 struct cpu_model_info {
877 char *model_names[16];
880 /* Do some early cpuid on the boot CPU to get some parameter that are
881 needed before check_bugs. Everything advanced is in identify_cpu
883 void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
887 c->loops_per_jiffy = loops_per_jiffy;
888 c->x86_cache_size = -1;
889 c->x86_vendor = X86_VENDOR_UNKNOWN;
890 c->x86_model = c->x86_mask = 0; /* So far unknown... */
891 c->x86_vendor_id[0] = '\0'; /* Unset */
892 c->x86_model_id[0] = '\0'; /* Unset */
893 c->x86_clflush_size = 64;
894 c->x86_cache_alignment = c->x86_clflush_size;
895 c->x86_max_cores = 1;
896 c->extended_cpuid_level = 0;
897 memset(&c->x86_capability, 0, sizeof c->x86_capability);
899 /* Get vendor name */
900 cpuid(0x00000000, (unsigned int *)&c->cpuid_level,
901 (unsigned int *)&c->x86_vendor_id[0],
902 (unsigned int *)&c->x86_vendor_id[8],
903 (unsigned int *)&c->x86_vendor_id[4]);
907 /* Initialize the standard set of capabilities */
908 /* Note that the vendor-specific code below might override */
910 /* Intel-defined flags: level 0x00000001 */
911 if (c->cpuid_level >= 0x00000001) {
913 cpuid(0x00000001, &tfms, &misc, &c->x86_capability[4],
914 &c->x86_capability[0]);
915 c->x86 = (tfms >> 8) & 0xf;
916 c->x86_model = (tfms >> 4) & 0xf;
917 c->x86_mask = tfms & 0xf;
919 c->x86 += (tfms >> 20) & 0xff;
921 c->x86_model += ((tfms >> 16) & 0xF) << 4;
922 if (c->x86_capability[0] & (1<<19))
923 c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
925 /* Have CPUID level 0 only - unheard of */
930 c->phys_proc_id = (cpuid_ebx(1) >> 24) & 0xff;
935 * This does the hard work of actually picking apart the CPU stuff...
937 void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
942 early_identify_cpu(c);
944 /* AMD-defined flags: level 0x80000001 */
945 xlvl = cpuid_eax(0x80000000);
946 c->extended_cpuid_level = xlvl;
947 if ((xlvl & 0xffff0000) == 0x80000000) {
948 if (xlvl >= 0x80000001) {
949 c->x86_capability[1] = cpuid_edx(0x80000001);
950 c->x86_capability[6] = cpuid_ecx(0x80000001);
952 if (xlvl >= 0x80000004)
953 get_model_name(c); /* Default name */
956 /* Transmeta-defined flags: level 0x80860001 */
957 xlvl = cpuid_eax(0x80860000);
958 if ((xlvl & 0xffff0000) == 0x80860000) {
959 /* Don't set x86_cpuid_level here for now to not confuse. */
960 if (xlvl >= 0x80860001)
961 c->x86_capability[2] = cpuid_edx(0x80860001);
964 c->apicid = phys_pkg_id(0);
967 * Vendor-specific initialization. In this section we
968 * canonicalize the feature flags, meaning if there are
969 * features a certain CPU supports which CPUID doesn't
970 * tell us, CPUID claiming incorrect flags, or other bugs,
971 * we handle them here.
973 * At the end of this section, c->x86_capability better
974 * indicate the features this CPU genuinely supports!
976 switch (c->x86_vendor) {
981 case X86_VENDOR_INTEL:
985 case X86_VENDOR_UNKNOWN:
987 display_cacheinfo(c);
991 select_idle_routine(c);
995 * On SMP, boot_cpu_data holds the common feature set between
996 * all CPUs; so make sure that we indicate which features are
997 * common between the CPUs. The first time this routine gets
998 * executed, c == &boot_cpu_data.
1000 if (c != &boot_cpu_data) {
1001 /* AND the already accumulated flags with these */
1002 for (i = 0 ; i < NCAPINTS ; i++)
1003 boot_cpu_data.x86_capability[i] &= c->x86_capability[i];
1006 #ifdef CONFIG_X86_MCE
1009 if (c == &boot_cpu_data)
1014 numa_add_cpu(smp_processor_id());
1019 void __cpuinit print_cpu_info(struct cpuinfo_x86 *c)
1021 if (c->x86_model_id[0])
1022 printk("%s", c->x86_model_id);
1024 if (c->x86_mask || c->cpuid_level >= 0)
1025 printk(" stepping %02x\n", c->x86_mask);
1031 * Get CPU information for use by the procfs.
1034 static int show_cpuinfo(struct seq_file *m, void *v)
1036 struct cpuinfo_x86 *c = v;
1039 * These flag bits must match the definitions in <asm/cpufeature.h>.
1040 * NULL means this bit is undefined or reserved; either way it doesn't
1041 * have meaning as far as Linux is concerned. Note that it's important
1042 * to realize there is a difference between this table and CPUID -- if
1043 * applications want to get the raw CPUID data, they should access
1044 * /dev/cpu/<cpu_nr>/cpuid instead.
1046 static char *x86_cap_flags[] = {
1048 "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
1049 "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
1050 "pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
1051 "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", NULL,
1054 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1055 NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,
1056 NULL, NULL, NULL, NULL, "nx", NULL, "mmxext", NULL,
1057 NULL, "fxsr_opt", NULL, "rdtscp", NULL, "lm", "3dnowext", "3dnow",
1059 /* Transmeta-defined */
1060 "recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,
1061 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1062 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1063 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1065 /* Other (Linux-defined) */
1066 "cxmmx", NULL, "cyrix_arr", "centaur_mcr", NULL,
1067 "constant_tsc", NULL, NULL,
1068 "up", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1069 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1070 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1072 /* Intel-defined (#2) */
1073 "pni", NULL, NULL, "monitor", "ds_cpl", "vmx", "smx", "est",
1074 "tm2", "ssse3", "cid", NULL, NULL, "cx16", "xtpr", NULL,
1075 NULL, NULL, "dca", NULL, NULL, NULL, NULL, NULL,
1076 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1078 /* VIA/Cyrix/Centaur-defined */
1079 NULL, NULL, "rng", "rng_en", NULL, NULL, "ace", "ace_en",
1080 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1081 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1082 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1084 /* AMD-defined (#2) */
1085 "lahf_lm", "cmp_legacy", "svm", NULL, "cr8_legacy", NULL, NULL, NULL,
1086 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1087 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1088 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1090 static char *x86_power_flags[] = {
1091 "ts", /* temperature sensor */
1092 "fid", /* frequency id control */
1093 "vid", /* voltage id control */
1094 "ttp", /* thermal trip */
1098 /* nothing */ /* constant_tsc - moved to flags */
1103 if (!cpu_online(c-cpu_data))
1107 seq_printf(m,"processor\t: %u\n"
1109 "cpu family\t: %d\n"
1111 "model name\t: %s\n",
1112 (unsigned)(c-cpu_data),
1113 c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
1116 c->x86_model_id[0] ? c->x86_model_id : "unknown");
1118 if (c->x86_mask || c->cpuid_level >= 0)
1119 seq_printf(m, "stepping\t: %d\n", c->x86_mask);
1121 seq_printf(m, "stepping\t: unknown\n");
1123 if (cpu_has(c,X86_FEATURE_TSC)) {
1124 unsigned int freq = cpufreq_quick_get((unsigned)(c-cpu_data));
1127 seq_printf(m, "cpu MHz\t\t: %u.%03u\n",
1128 freq / 1000, (freq % 1000));
1132 if (c->x86_cache_size >= 0)
1133 seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
1136 if (smp_num_siblings * c->x86_max_cores > 1) {
1137 int cpu = c - cpu_data;
1138 seq_printf(m, "physical id\t: %d\n", c->phys_proc_id);
1139 seq_printf(m, "siblings\t: %d\n", cpus_weight(cpu_core_map[cpu]));
1140 seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id);
1141 seq_printf(m, "cpu cores\t: %d\n", c->booted_cores);
1147 "fpu_exception\t: yes\n"
1148 "cpuid level\t: %d\n"
1155 for ( i = 0 ; i < 32*NCAPINTS ; i++ )
1156 if (cpu_has(c, i) && x86_cap_flags[i] != NULL)
1157 seq_printf(m, " %s", x86_cap_flags[i]);
1160 seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
1161 c->loops_per_jiffy/(500000/HZ),
1162 (c->loops_per_jiffy/(5000/HZ)) % 100);
1164 if (c->x86_tlbsize > 0)
1165 seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);
1166 seq_printf(m, "clflush size\t: %d\n", c->x86_clflush_size);
1167 seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);
1169 seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",
1170 c->x86_phys_bits, c->x86_virt_bits);
1172 seq_printf(m, "power management:");
1175 for (i = 0; i < 32; i++)
1176 if (c->x86_power & (1 << i)) {
1177 if (i < ARRAY_SIZE(x86_power_flags) &&
1179 seq_printf(m, "%s%s",
1180 x86_power_flags[i][0]?" ":"",
1181 x86_power_flags[i]);
1183 seq_printf(m, " [%d]", i);
1187 seq_printf(m, "\n\n");
1192 static void *c_start(struct seq_file *m, loff_t *pos)
1194 return *pos < NR_CPUS ? cpu_data + *pos : NULL;
1197 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1200 return c_start(m, pos);
1203 static void c_stop(struct seq_file *m, void *v)
1207 struct seq_operations cpuinfo_op = {
1211 .show = show_cpuinfo,
1214 #if defined(CONFIG_INPUT_PCSPKR) || defined(CONFIG_INPUT_PCSPKR_MODULE)
1215 #include <linux/platform_device.h>
1216 static __init int add_pcspkr(void)
1218 struct platform_device *pd;
1221 pd = platform_device_alloc("pcspkr", -1);
1225 ret = platform_device_add(pd);
1227 platform_device_put(pd);
1231 device_initcall(add_pcspkr);