arch/x86/mach-voyager/setup.c

   1 /*
   2  *      Machine specific setup for generic
   3  */
   4
   5 #include <linux/init.h>
   6 #include <linux/interrupt.h>
   7 #include <asm/arch_hooks.h>
   8 #include <asm/voyager.h>
   9 #include <asm/e820.h>
  10 #include <asm/io.h>
  11 #include <asm/setup.h>
  12
  13 void __init pre_intr_init_hook(void)
  14 {
  15         init_ISA_irqs();
  16 }
  17
  18 /*
  19  * IRQ2 is cascade interrupt to second interrupt controller
  20  */
  21 static struct irqaction irq2 = {
  22         .handler = no_action,
  23         .mask = CPU_MASK_NONE,
  24         .name = "cascade",
  25 };
  26
  27 void __init intr_init_hook(void)
  28 {
  29 #ifdef CONFIG_SMP
  30         voyager_smp_intr_init();
  31 #endif
  32
  33         setup_irq(2, &irq2);
  34 }
  35
  36 static void voyager_disable_tsc(void)
  37 {
  38         /* Voyagers run their CPUs from independent clocks, so disable
  39          * the TSC code because we can't sync them */
  40         setup_clear_cpu_cap(X86_FEATURE_TSC);
  41 }
  42
  43 void __init pre_setup_arch_hook(void)
  44 {
  45         voyager_disable_tsc();
  46 }
  47
  48 void __init pre_time_init_hook(void)
  49 {
  50         voyager_disable_tsc();
  51 }
  52
  53 void __init trap_init_hook(void)
  54 {
  55 }
  56
  57 static struct irqaction irq0 = {
  58         .handler = timer_interrupt,
  59         .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL,
  60         .mask = CPU_MASK_NONE,
  61         .name = "timer"
  62 };
  63
  64 void __init time_init_hook(void)
  65 {
  66         irq0.mask = cpumask_of_cpu(safe_smp_processor_id());
  67         setup_irq(0, &irq0);
  68 }
  69
  70 /* Hook for machine specific memory setup. */
  71
  72 char *__init machine_specific_memory_setup(void)
  73 {
  74         char *who;
  75         int new_nr;
  76
  77         who = "NOT VOYAGER";
  78
  79         if (voyager_level == 5) {
  80                 __u32 addr, length;
  81                 int i;
  82
  83                 who = "Voyager-SUS";
  84
  85                 e820.nr_map = 0;
  86                 for (i = 0; voyager_memory_detect(i, &addr, &length); i++) {
  87                         e820_add_region(addr, length, E820_RAM);
  88                 }
  89                 return who;
  90         } else if (voyager_level == 4) {
  91                 __u32 tom;
  92                 __u16 catbase = inb(VOYAGER_SSPB_RELOCATION_PORT) << 8;
  93                 /* select the DINO config space */
  94                 outb(VOYAGER_DINO, VOYAGER_CAT_CONFIG_PORT);
  95                 /* Read DINO top of memory register */
  96                 tom = ((inb(catbase + 0x4) & 0xf0) << 16)
  97                     + ((inb(catbase + 0x5) & 0x7f) << 24);
  98
  99                 if (inb(catbase) != VOYAGER_DINO) {
 100                         printk(KERN_ERR
 101                                "Voyager: Failed to get DINO for L4, setting tom to EXT_MEM_K\n");
 102                         tom = (boot_params.screen_info.ext_mem_k) << 10;
 103                 }
 104                 who = "Voyager-TOM";
 105                 e820_add_region(0, 0x9f000, E820_RAM);
 106                 /* map from 1M to top of memory */
 107                 e820_add_region(1 * 1024 * 1024, tom - 1 * 1024 * 1024,
 108                                   E820_RAM);
 109                 /* FIXME: Should check the ASICs to see if I need to
 110                  * take out the 8M window.  Just do it at the moment
 111                  * */
 112                 e820_add_region(8 * 1024 * 1024, 8 * 1024 * 1024,
 113                                   E820_RESERVED);
 114                 return who;
 115         }
 116
 117         return default_machine_specific_memory_setup();
 118 }