arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "pmu.h"
  31 #include "hyperv.h"
  32
  33 #include <linux/clocksource.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/kvm.h>
  36 #include <linux/fs.h>
  37 #include <linux/vmalloc.h>
  38 #include <linux/export.h>
  39 #include <linux/moduleparam.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <linux/sched/stat.h>
  57 #include <linux/mem_encrypt.h>
  58
  59 #include <trace/events/kvm.h>
  60
  61 #include <asm/debugreg.h>
  62 #include <asm/msr.h>
  63 #include <asm/desc.h>
  64 #include <asm/mce.h>
  65 #include <linux/kernel_stat.h>
  66 #include <asm/fpu/internal.h> /* Ugh! */
  67 #include <asm/pvclock.h>
  68 #include <asm/div64.h>
  69 #include <asm/irq_remapping.h>
  70
  71 #define CREATE_TRACE_POINTS
  72 #include "trace.h"
  73
  74 #define MAX_IO_MSRS 256
  75 #define KVM_MAX_MCE_BANKS 32
  76 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  77 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  78
  79 #define emul_to_vcpu(ctxt) \
  80         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  81
  82 /* EFER defaults:
  83  * - enable syscall per default because its emulated by KVM
  84  * - enable LME and LMA per default on 64 bit KVM
  85  */
  86 #ifdef CONFIG_X86_64
  87 static
  88 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  89 #else
  90 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  91 #endif
  92
  93 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  94 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  95
  96 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
  97                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
  98
  99 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 100 static void process_nmi(struct kvm_vcpu *vcpu);
 101 static void enter_smm(struct kvm_vcpu *vcpu);
 102 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 103
 104 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
 105 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 106
 107 static bool __read_mostly ignore_msrs = 0;
 108 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 109
 110 unsigned int min_timer_period_us = 500;
 111 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 112
 113 static bool __read_mostly kvmclock_periodic_sync = true;
 114 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 115
 116 bool __read_mostly kvm_has_tsc_control;
 117 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 118 u32  __read_mostly kvm_max_guest_tsc_khz;
 119 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 120 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 121 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 122 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 123 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 124 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 125 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 126
 127 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 128 static u32 __read_mostly tsc_tolerance_ppm = 250;
 129 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 130
 131 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 132 unsigned int __read_mostly lapic_timer_advance_ns = 0;
 133 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 134
 135 static bool __read_mostly vector_hashing = true;
 136 module_param(vector_hashing, bool, S_IRUGO);
 137
 138 #define KVM_NR_SHARED_MSRS 16
 139
 140 struct kvm_shared_msrs_global {
 141         int nr;
 142         u32 msrs[KVM_NR_SHARED_MSRS];
 143 };
 144
 145 struct kvm_shared_msrs {
 146         struct user_return_notifier urn;
 147         bool registered;
 148         struct kvm_shared_msr_values {
 149                 u64 host;
 150                 u64 curr;
 151         } values[KVM_NR_SHARED_MSRS];
 152 };
 153
 154 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 155 static struct kvm_shared_msrs __percpu *shared_msrs;
 156
 157 struct kvm_stats_debugfs_item debugfs_entries[] = {
 158         { "pf_fixed", VCPU_STAT(pf_fixed) },
 159         { "pf_guest", VCPU_STAT(pf_guest) },
 160         { "tlb_flush", VCPU_STAT(tlb_flush) },
 161         { "invlpg", VCPU_STAT(invlpg) },
 162         { "exits", VCPU_STAT(exits) },
 163         { "io_exits", VCPU_STAT(io_exits) },
 164         { "mmio_exits", VCPU_STAT(mmio_exits) },
 165         { "signal_exits", VCPU_STAT(signal_exits) },
 166         { "irq_window", VCPU_STAT(irq_window_exits) },
 167         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 168         { "halt_exits", VCPU_STAT(halt_exits) },
 169         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 170         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 171         { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
 172         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 173         { "hypercalls", VCPU_STAT(hypercalls) },
 174         { "request_irq", VCPU_STAT(request_irq_exits) },
 175         { "irq_exits", VCPU_STAT(irq_exits) },
 176         { "host_state_reload", VCPU_STAT(host_state_reload) },
 177         { "efer_reload", VCPU_STAT(efer_reload) },
 178         { "fpu_reload", VCPU_STAT(fpu_reload) },
 179         { "insn_emulation", VCPU_STAT(insn_emulation) },
 180         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 181         { "irq_injections", VCPU_STAT(irq_injections) },
 182         { "nmi_injections", VCPU_STAT(nmi_injections) },
 183         { "req_event", VCPU_STAT(req_event) },
 184         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 185         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 186         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 187         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 188         { "mmu_flooded", VM_STAT(mmu_flooded) },
 189         { "mmu_recycled", VM_STAT(mmu_recycled) },
 190         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 191         { "mmu_unsync", VM_STAT(mmu_unsync) },
 192         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 193         { "largepages", VM_STAT(lpages) },
 194         { "max_mmu_page_hash_collisions",
 195                 VM_STAT(max_mmu_page_hash_collisions) },
 196         { NULL }
 197 };
 198
 199 u64 __read_mostly host_xcr0;
 200
 201 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 202
 203 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 204 {
 205         int i;
 206         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 207                 vcpu->arch.apf.gfns[i] = ~0;
 208 }
 209
 210 static void kvm_on_user_return(struct user_return_notifier *urn)
 211 {
 212         unsigned slot;
 213         struct kvm_shared_msrs *locals
 214                 = container_of(urn, struct kvm_shared_msrs, urn);
 215         struct kvm_shared_msr_values *values;
 216         unsigned long flags;
 217
 218         /*
 219          * Disabling irqs at this point since the following code could be
 220          * interrupted and executed through kvm_arch_hardware_disable()
 221          */
 222         local_irq_save(flags);
 223         if (locals->registered) {
 224                 locals->registered = false;
 225                 user_return_notifier_unregister(urn);
 226         }
 227         local_irq_restore(flags);
 228         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 229                 values = &locals->values[slot];
 230                 if (values->host != values->curr) {
 231                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 232                         values->curr = values->host;
 233                 }
 234         }
 235 }
 236
 237 static void shared_msr_update(unsigned slot, u32 msr)
 238 {
 239         u64 value;
 240         unsigned int cpu = smp_processor_id();
 241         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 242
 243         /* only read, and nobody should modify it at this time,
 244          * so don't need lock */
 245         if (slot >= shared_msrs_global.nr) {
 246                 printk(KERN_ERR "kvm: invalid MSR slot!");
 247                 return;
 248         }
 249         rdmsrl_safe(msr, &value);
 250         smsr->values[slot].host = value;
 251         smsr->values[slot].curr = value;
 252 }
 253
 254 void kvm_define_shared_msr(unsigned slot, u32 msr)
 255 {
 256         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 257         shared_msrs_global.msrs[slot] = msr;
 258         if (slot >= shared_msrs_global.nr)
 259                 shared_msrs_global.nr = slot + 1;
 260 }
 261 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 262
 263 static void kvm_shared_msr_cpu_online(void)
 264 {
 265         unsigned i;
 266
 267         for (i = 0; i < shared_msrs_global.nr; ++i)
 268                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 269 }
 270
 271 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 272 {
 273         unsigned int cpu = smp_processor_id();
 274         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 275         int err;
 276
 277         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 278                 return 0;
 279         smsr->values[slot].curr = value;
 280         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 281         if (err)
 282                 return 1;
 283
 284         if (!smsr->registered) {
 285                 smsr->urn.on_user_return = kvm_on_user_return;
 286                 user_return_notifier_register(&smsr->urn);
 287                 smsr->registered = true;
 288         }
 289         return 0;
 290 }
 291 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 292
 293 static void drop_user_return_notifiers(void)
 294 {
 295         unsigned int cpu = smp_processor_id();
 296         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 297
 298         if (smsr->registered)
 299                 kvm_on_user_return(&smsr->urn);
 300 }
 301
 302 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 303 {
 304         return vcpu->arch.apic_base;
 305 }
 306 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 307
 308 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 309 {
 310         u64 old_state = vcpu->arch.apic_base &
 311                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 312         u64 new_state = msr_info->data &
 313                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 314         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
 315                 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
 316
 317         if (!msr_info->host_initiated &&
 318             ((msr_info->data & reserved_bits) != 0 ||
 319              new_state == X2APIC_ENABLE ||
 320              (new_state == MSR_IA32_APICBASE_ENABLE &&
 321               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 322              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 323               old_state == 0)))
 324                 return 1;
 325
 326         kvm_lapic_set_base(vcpu, msr_info->data);
 327         return 0;
 328 }
 329 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 330
 331 asmlinkage __visible void kvm_spurious_fault(void)
 332 {
 333         /* Fault while not rebooting.  We want the trace. */
 334         BUG();
 335 }
 336 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 337
 338 #define EXCPT_BENIGN            0
 339 #define EXCPT_CONTRIBUTORY      1
 340 #define EXCPT_PF                2
 341
 342 static int exception_class(int vector)
 343 {
 344         switch (vector) {
 345         case PF_VECTOR:
 346                 return EXCPT_PF;
 347         case DE_VECTOR:
 348         case TS_VECTOR:
 349         case NP_VECTOR:
 350         case SS_VECTOR:
 351         case GP_VECTOR:
 352                 return EXCPT_CONTRIBUTORY;
 353         default:
 354                 break;
 355         }
 356         return EXCPT_BENIGN;
 357 }
 358
 359 #define EXCPT_FAULT             0
 360 #define EXCPT_TRAP              1
 361 #define EXCPT_ABORT             2
 362 #define EXCPT_INTERRUPT         3
 363
 364 static int exception_type(int vector)
 365 {
 366         unsigned int mask;
 367
 368         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 369                 return EXCPT_INTERRUPT;
 370
 371         mask = 1 << vector;
 372
 373         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 374         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 375                 return EXCPT_TRAP;
 376
 377         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 378                 return EXCPT_ABORT;
 379
 380         /* Reserved exceptions will result in fault */
 381         return EXCPT_FAULT;
 382 }
 383
 384 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 385                 unsigned nr, bool has_error, u32 error_code,
 386                 bool reinject)
 387 {
 388         u32 prev_nr;
 389         int class1, class2;
 390
 391         kvm_make_request(KVM_REQ_EVENT, vcpu);
 392
 393         if (!vcpu->arch.exception.pending) {
 394         queue:
 395                 if (has_error && !is_protmode(vcpu))
 396                         has_error = false;
 397                 vcpu->arch.exception.pending = true;
 398                 vcpu->arch.exception.has_error_code = has_error;
 399                 vcpu->arch.exception.nr = nr;
 400                 vcpu->arch.exception.error_code = error_code;
 401                 vcpu->arch.exception.reinject = reinject;
 402                 return;
 403         }
 404
 405         /* to check exception */
 406         prev_nr = vcpu->arch.exception.nr;
 407         if (prev_nr == DF_VECTOR) {
 408                 /* triple fault -> shutdown */
 409                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 410                 return;
 411         }
 412         class1 = exception_class(prev_nr);
 413         class2 = exception_class(nr);
 414         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 415                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 416                 /* generate double fault per SDM Table 5-5 */
 417                 vcpu->arch.exception.pending = true;
 418                 vcpu->arch.exception.has_error_code = true;
 419                 vcpu->arch.exception.nr = DF_VECTOR;
 420                 vcpu->arch.exception.error_code = 0;
 421         } else
 422                 /* replace previous exception with a new one in a hope
 423                    that instruction re-execution will regenerate lost
 424                    exception */
 425                 goto queue;
 426 }
 427
 428 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 429 {
 430         kvm_multiple_exception(vcpu, nr, false, 0, false);
 431 }
 432 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 433
 434 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 435 {
 436         kvm_multiple_exception(vcpu, nr, false, 0, true);
 437 }
 438 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 439
 440 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 441 {
 442         if (err)
 443                 kvm_inject_gp(vcpu, 0);
 444         else
 445                 return kvm_skip_emulated_instruction(vcpu);
 446
 447         return 1;
 448 }
 449 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 450
 451 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 452 {
 453         ++vcpu->stat.pf_guest;
 454         vcpu->arch.exception.nested_apf =
 455                 is_guest_mode(vcpu) && fault->async_page_fault;
 456         if (vcpu->arch.exception.nested_apf)
 457                 vcpu->arch.apf.nested_apf_token = fault->address;
 458         else
 459                 vcpu->arch.cr2 = fault->address;
 460         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 461 }
 462 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 463
 464 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 465 {
 466         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 467                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 468         else
 469                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 470
 471         return fault->nested_page_fault;
 472 }
 473
 474 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 475 {
 476         atomic_inc(&vcpu->arch.nmi_queued);
 477         kvm_make_request(KVM_REQ_NMI, vcpu);
 478 }
 479 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 480
 481 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 482 {
 483         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 484 }
 485 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 486
 487 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 488 {
 489         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 490 }
 491 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 492
 493 /*
 494  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 495  * a #GP and return false.
 496  */
 497 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 498 {
 499         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 500                 return true;
 501         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 502         return false;
 503 }
 504 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 505
 506 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 507 {
 508         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 509                 return true;
 510
 511         kvm_queue_exception(vcpu, UD_VECTOR);
 512         return false;
 513 }
 514 EXPORT_SYMBOL_GPL(kvm_require_dr);
 515
 516 /*
 517  * This function will be used to read from the physical memory of the currently
 518  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 519  * can read from guest physical or from the guest's guest physical memory.
 520  */
 521 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 522                             gfn_t ngfn, void *data, int offset, int len,
 523                             u32 access)
 524 {
 525         struct x86_exception exception;
 526         gfn_t real_gfn;
 527         gpa_t ngpa;
 528
 529         ngpa     = gfn_to_gpa(ngfn);
 530         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 531         if (real_gfn == UNMAPPED_GVA)
 532                 return -EFAULT;
 533
 534         real_gfn = gpa_to_gfn(real_gfn);
 535
 536         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 537 }
 538 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 539
 540 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 541                                void *data, int offset, int len, u32 access)
 542 {
 543         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 544                                        data, offset, len, access);
 545 }
 546
 547 /*
 548  * Load the pae pdptrs.  Return true is they are all valid.
 549  */
 550 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 551 {
 552         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 553         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 554         int i;
 555         int ret;
 556         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 557
 558         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 559                                       offset * sizeof(u64), sizeof(pdpte),
 560                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 561         if (ret < 0) {
 562                 ret = 0;
 563                 goto out;
 564         }
 565         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 566                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 567                     (pdpte[i] &
 568                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
 569                         ret = 0;
 570                         goto out;
 571                 }
 572         }
 573         ret = 1;
 574
 575         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 576         __set_bit(VCPU_EXREG_PDPTR,
 577                   (unsigned long *)&vcpu->arch.regs_avail);
 578         __set_bit(VCPU_EXREG_PDPTR,
 579                   (unsigned long *)&vcpu->arch.regs_dirty);
 580 out:
 581
 582         return ret;
 583 }
 584 EXPORT_SYMBOL_GPL(load_pdptrs);
 585
 586 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 587 {
 588         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 589         bool changed = true;
 590         int offset;
 591         gfn_t gfn;
 592         int r;
 593
 594         if (is_long_mode(vcpu) || !is_pae(vcpu))
 595                 return false;
 596
 597         if (!test_bit(VCPU_EXREG_PDPTR,
 598                       (unsigned long *)&vcpu->arch.regs_avail))
 599                 return true;
 600
 601         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 602         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 603         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 604                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 605         if (r < 0)
 606                 goto out;
 607         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 608 out:
 609
 610         return changed;
 611 }
 612 EXPORT_SYMBOL_GPL(pdptrs_changed);
 613
 614 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 615 {
 616         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 617         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 618
 619         cr0 |= X86_CR0_ET;
 620
 621 #ifdef CONFIG_X86_64
 622         if (cr0 & 0xffffffff00000000UL)
 623                 return 1;
 624 #endif
 625
 626         cr0 &= ~CR0_RESERVED_BITS;
 627
 628         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 629                 return 1;
 630
 631         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 632                 return 1;
 633
 634         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 635 #ifdef CONFIG_X86_64
 636                 if ((vcpu->arch.efer & EFER_LME)) {
 637                         int cs_db, cs_l;
 638
 639                         if (!is_pae(vcpu))
 640                                 return 1;
 641                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 642                         if (cs_l)
 643                                 return 1;
 644                 } else
 645 #endif
 646                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 647                                                  kvm_read_cr3(vcpu)))
 648                         return 1;
 649         }
 650
 651         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 652                 return 1;
 653
 654         kvm_x86_ops->set_cr0(vcpu, cr0);
 655
 656         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 657                 kvm_clear_async_pf_completion_queue(vcpu);
 658                 kvm_async_pf_hash_reset(vcpu);
 659         }
 660
 661         if ((cr0 ^ old_cr0) & update_bits)
 662                 kvm_mmu_reset_context(vcpu);
 663
 664         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 665             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 666             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 667                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 668
 669         return 0;
 670 }
 671 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 672
 673 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 674 {
 675         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 676 }
 677 EXPORT_SYMBOL_GPL(kvm_lmsw);
 678
 679 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 680 {
 681         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 682                         !vcpu->guest_xcr0_loaded) {
 683                 /* kvm_set_xcr() also depends on this */
 684                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 685                 vcpu->guest_xcr0_loaded = 1;
 686         }
 687 }
 688
 689 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 690 {
 691         if (vcpu->guest_xcr0_loaded) {
 692                 if (vcpu->arch.xcr0 != host_xcr0)
 693                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 694                 vcpu->guest_xcr0_loaded = 0;
 695         }
 696 }
 697
 698 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 699 {
 700         u64 xcr0 = xcr;
 701         u64 old_xcr0 = vcpu->arch.xcr0;
 702         u64 valid_bits;
 703
 704         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 705         if (index != XCR_XFEATURE_ENABLED_MASK)
 706                 return 1;
 707         if (!(xcr0 & XFEATURE_MASK_FP))
 708                 return 1;
 709         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 710                 return 1;
 711
 712         /*
 713          * Do not allow the guest to set bits that we do not support
 714          * saving.  However, xcr0 bit 0 is always set, even if the
 715          * emulated CPU does not support XSAVE (see fx_init).
 716          */
 717         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 718         if (xcr0 & ~valid_bits)
 719                 return 1;
 720
 721         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 722             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 723                 return 1;
 724
 725         if (xcr0 & XFEATURE_MASK_AVX512) {
 726                 if (!(xcr0 & XFEATURE_MASK_YMM))
 727                         return 1;
 728                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 729                         return 1;
 730         }
 731         vcpu->arch.xcr0 = xcr0;
 732
 733         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 734                 kvm_update_cpuid(vcpu);
 735         return 0;
 736 }
 737
 738 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 739 {
 740         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 741             __kvm_set_xcr(vcpu, index, xcr)) {
 742                 kvm_inject_gp(vcpu, 0);
 743                 return 1;
 744         }
 745         return 0;
 746 }
 747 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 748
 749 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 750 {
 751         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 752         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 753                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 754
 755         if (cr4 & CR4_RESERVED_BITS)
 756                 return 1;
 757
 758         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 759                 return 1;
 760
 761         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 762                 return 1;
 763
 764         if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
 765                 return 1;
 766
 767         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 768                 return 1;
 769
 770         if (!guest_cpuid_has_pku(vcpu) && (cr4 & X86_CR4_PKE))
 771                 return 1;
 772
 773         if (is_long_mode(vcpu)) {
 774                 if (!(cr4 & X86_CR4_PAE))
 775                         return 1;
 776         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 777                    && ((cr4 ^ old_cr4) & pdptr_bits)
 778                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 779                                    kvm_read_cr3(vcpu)))
 780                 return 1;
 781
 782         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 783                 if (!guest_cpuid_has_pcid(vcpu))
 784                         return 1;
 785
 786                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 787                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 788                         return 1;
 789         }
 790
 791         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 792                 return 1;
 793
 794         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 795             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 796                 kvm_mmu_reset_context(vcpu);
 797
 798         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 799                 kvm_update_cpuid(vcpu);
 800
 801         return 0;
 802 }
 803 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 804
 805 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 806 {
 807 #ifdef CONFIG_X86_64
 808         cr3 &= ~CR3_PCID_INVD;
 809 #endif
 810
 811         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 812                 kvm_mmu_sync_roots(vcpu);
 813                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 814                 return 0;
 815         }
 816
 817         if (is_long_mode(vcpu)) {
 818                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 819                         return 1;
 820         } else if (is_pae(vcpu) && is_paging(vcpu) &&
 821                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 822                 return 1;
 823
 824         vcpu->arch.cr3 = cr3;
 825         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 826         kvm_mmu_new_cr3(vcpu);
 827         return 0;
 828 }
 829 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 830
 831 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 832 {
 833         if (cr8 & CR8_RESERVED_BITS)
 834                 return 1;
 835         if (lapic_in_kernel(vcpu))
 836                 kvm_lapic_set_tpr(vcpu, cr8);
 837         else
 838                 vcpu->arch.cr8 = cr8;
 839         return 0;
 840 }
 841 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 842
 843 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 844 {
 845         if (lapic_in_kernel(vcpu))
 846                 return kvm_lapic_get_cr8(vcpu);
 847         else
 848                 return vcpu->arch.cr8;
 849 }
 850 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 851
 852 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 853 {
 854         int i;
 855
 856         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 857                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 858                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 859                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 860         }
 861 }
 862
 863 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 864 {
 865         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 866                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 867 }
 868
 869 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 870 {
 871         unsigned long dr7;
 872
 873         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 874                 dr7 = vcpu->arch.guest_debug_dr7;
 875         else
 876                 dr7 = vcpu->arch.dr7;
 877         kvm_x86_ops->set_dr7(vcpu, dr7);
 878         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 879         if (dr7 & DR7_BP_EN_MASK)
 880                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 881 }
 882
 883 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 884 {
 885         u64 fixed = DR6_FIXED_1;
 886
 887         if (!guest_cpuid_has_rtm(vcpu))
 888                 fixed |= DR6_RTM;
 889         return fixed;
 890 }
 891
 892 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 893 {
 894         switch (dr) {
 895         case 0 ... 3:
 896                 vcpu->arch.db[dr] = val;
 897                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 898                         vcpu->arch.eff_db[dr] = val;
 899                 break;
 900         case 4:
 901                 /* fall through */
 902         case 6:
 903                 if (val & 0xffffffff00000000ULL)
 904                         return -1; /* #GP */
 905                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 906                 kvm_update_dr6(vcpu);
 907                 break;
 908         case 5:
 909                 /* fall through */
 910         default: /* 7 */
 911                 if (val & 0xffffffff00000000ULL)
 912                         return -1; /* #GP */
 913                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 914                 kvm_update_dr7(vcpu);
 915                 break;
 916         }
 917
 918         return 0;
 919 }
 920
 921 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 922 {
 923         if (__kvm_set_dr(vcpu, dr, val)) {
 924                 kvm_inject_gp(vcpu, 0);
 925                 return 1;
 926         }
 927         return 0;
 928 }
 929 EXPORT_SYMBOL_GPL(kvm_set_dr);
 930
 931 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 932 {
 933         switch (dr) {
 934         case 0 ... 3:
 935                 *val = vcpu->arch.db[dr];
 936                 break;
 937         case 4:
 938                 /* fall through */
 939         case 6:
 940                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 941                         *val = vcpu->arch.dr6;
 942                 else
 943                         *val = kvm_x86_ops->get_dr6(vcpu);
 944                 break;
 945         case 5:
 946                 /* fall through */
 947         default: /* 7 */
 948                 *val = vcpu->arch.dr7;
 949                 break;
 950         }
 951         return 0;
 952 }
 953 EXPORT_SYMBOL_GPL(kvm_get_dr);
 954
 955 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 956 {
 957         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 958         u64 data;
 959         int err;
 960
 961         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
 962         if (err)
 963                 return err;
 964         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 965         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 966         return err;
 967 }
 968 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 969
 970 /*
 971  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 972  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 973  *
 974  * This list is modified at module load time to reflect the
 975  * capabilities of the host cpu. This capabilities test skips MSRs that are
 976  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
 977  * may depend on host virtualization features rather than host cpu features.
 978  */
 979
 980 static u32 msrs_to_save[] = {
 981         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 982         MSR_STAR,
 983 #ifdef CONFIG_X86_64
 984         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 985 #endif
 986         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 987         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
 988 };
 989
 990 static unsigned num_msrs_to_save;
 991
 992 static u32 emulated_msrs[] = {
 993         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 994         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 995         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 996         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
 997         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
 998         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
 999         HV_X64_MSR_RESET,
1000         HV_X64_MSR_VP_INDEX,
1001         HV_X64_MSR_VP_RUNTIME,
1002         HV_X64_MSR_SCONTROL,
1003         HV_X64_MSR_STIMER0_CONFIG,
1004         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1005         MSR_KVM_PV_EOI_EN,
1006
1007         MSR_IA32_TSC_ADJUST,
1008         MSR_IA32_TSCDEADLINE,
1009         MSR_IA32_MISC_ENABLE,
1010         MSR_IA32_MCG_STATUS,
1011         MSR_IA32_MCG_CTL,
1012         MSR_IA32_MCG_EXT_CTL,
1013         MSR_IA32_SMBASE,
1014         MSR_PLATFORM_INFO,
1015         MSR_MISC_FEATURES_ENABLES,
1016 };
1017
1018 static unsigned num_emulated_msrs;
1019
1020 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1021 {
1022         if (efer & efer_reserved_bits)
1023                 return false;
1024
1025         if (efer & EFER_FFXSR) {
1026                 struct kvm_cpuid_entry2 *feat;
1027
1028                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
1029                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
1030                         return false;
1031         }
1032
1033         if (efer & EFER_SVME) {
1034                 struct kvm_cpuid_entry2 *feat;
1035
1036                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
1037                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
1038                         return false;
1039         }
1040
1041         return true;
1042 }
1043 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1044
1045 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1046 {
1047         u64 old_efer = vcpu->arch.efer;
1048
1049         if (!kvm_valid_efer(vcpu, efer))
1050                 return 1;
1051
1052         if (is_paging(vcpu)
1053             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1054                 return 1;
1055
1056         efer &= ~EFER_LMA;
1057         efer |= vcpu->arch.efer & EFER_LMA;
1058
1059         kvm_x86_ops->set_efer(vcpu, efer);
1060
1061         /* Update reserved bits */
1062         if ((efer ^ old_efer) & EFER_NX)
1063                 kvm_mmu_reset_context(vcpu);
1064
1065         return 0;
1066 }
1067
1068 void kvm_enable_efer_bits(u64 mask)
1069 {
1070        efer_reserved_bits &= ~mask;
1071 }
1072 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1073
1074 /*
1075  * Writes msr value into into the appropriate "register".
1076  * Returns 0 on success, non-0 otherwise.
1077  * Assumes vcpu_load() was already called.
1078  */
1079 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1080 {
1081         switch (msr->index) {
1082         case MSR_FS_BASE:
1083         case MSR_GS_BASE:
1084         case MSR_KERNEL_GS_BASE:
1085         case MSR_CSTAR:
1086         case MSR_LSTAR:
1087                 if (is_noncanonical_address(msr->data))
1088                         return 1;
1089                 break;
1090         case MSR_IA32_SYSENTER_EIP:
1091         case MSR_IA32_SYSENTER_ESP:
1092                 /*
1093                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1094                  * non-canonical address is written on Intel but not on
1095                  * AMD (which ignores the top 32-bits, because it does
1096                  * not implement 64-bit SYSENTER).
1097                  *
1098                  * 64-bit code should hence be able to write a non-canonical
1099                  * value on AMD.  Making the address canonical ensures that
1100                  * vmentry does not fail on Intel after writing a non-canonical
1101                  * value, and that something deterministic happens if the guest
1102                  * invokes 64-bit SYSENTER.
1103                  */
1104                 msr->data = get_canonical(msr->data);
1105         }
1106         return kvm_x86_ops->set_msr(vcpu, msr);
1107 }
1108 EXPORT_SYMBOL_GPL(kvm_set_msr);
1109
1110 /*
1111  * Adapt set_msr() to msr_io()'s calling convention
1112  */
1113 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1114 {
1115         struct msr_data msr;
1116         int r;
1117
1118         msr.index = index;
1119         msr.host_initiated = true;
1120         r = kvm_get_msr(vcpu, &msr);
1121         if (r)
1122                 return r;
1123
1124         *data = msr.data;
1125         return 0;
1126 }
1127
1128 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1129 {
1130         struct msr_data msr;
1131
1132         msr.data = *data;
1133         msr.index = index;
1134         msr.host_initiated = true;
1135         return kvm_set_msr(vcpu, &msr);
1136 }
1137
1138 #ifdef CONFIG_X86_64
1139 struct pvclock_gtod_data {
1140         seqcount_t      seq;
1141
1142         struct { /* extract of a clocksource struct */
1143                 int vclock_mode;
1144                 u64     cycle_last;
1145                 u64     mask;
1146                 u32     mult;
1147                 u32     shift;
1148         } clock;
1149
1150         u64             boot_ns;
1151         u64             nsec_base;
1152         u64             wall_time_sec;
1153 };
1154
1155 static struct pvclock_gtod_data pvclock_gtod_data;
1156
1157 static void update_pvclock_gtod(struct timekeeper *tk)
1158 {
1159         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1160         u64 boot_ns;
1161
1162         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1163
1164         write_seqcount_begin(&vdata->seq);
1165
1166         /* copy pvclock gtod data */
1167         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1168         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1169         vdata->clock.mask               = tk->tkr_mono.mask;
1170         vdata->clock.mult               = tk->tkr_mono.mult;
1171         vdata->clock.shift              = tk->tkr_mono.shift;
1172
1173         vdata->boot_ns                  = boot_ns;
1174         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1175
1176         vdata->wall_time_sec            = tk->xtime_sec;
1177
1178         write_seqcount_end(&vdata->seq);
1179 }
1180 #endif
1181
1182 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1183 {
1184         /*
1185          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1186          * vcpu_enter_guest.  This function is only called from
1187          * the physical CPU that is running vcpu.
1188          */
1189         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1190 }
1191
1192 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1193 {
1194         int version;
1195         int r;
1196         struct pvclock_wall_clock wc;
1197         struct timespec64 boot;
1198
1199         if (!wall_clock)
1200                 return;
1201
1202         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1203         if (r)
1204                 return;
1205
1206         if (version & 1)
1207                 ++version;  /* first time write, random junk */
1208
1209         ++version;
1210
1211         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1212                 return;
1213
1214         /*
1215          * The guest calculates current wall clock time by adding
1216          * system time (updated by kvm_guest_time_update below) to the
1217          * wall clock specified here.  guest system time equals host
1218          * system time for us, thus we must fill in host boot time here.
1219          */
1220         getboottime64(&boot);
1221
1222         if (kvm->arch.kvmclock_offset) {
1223                 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1224                 boot = timespec64_sub(boot, ts);
1225         }
1226         wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1227         wc.nsec = boot.tv_nsec;
1228         wc.version = version;
1229
1230         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1231
1232         version++;
1233         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1234 }
1235
1236 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1237 {
1238         do_shl32_div32(dividend, divisor);
1239         return dividend;
1240 }
1241
1242 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1243                                s8 *pshift, u32 *pmultiplier)
1244 {
1245         uint64_t scaled64;
1246         int32_t  shift = 0;
1247         uint64_t tps64;
1248         uint32_t tps32;
1249
1250         tps64 = base_hz;
1251         scaled64 = scaled_hz;
1252         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1253                 tps64 >>= 1;
1254                 shift--;
1255         }
1256
1257         tps32 = (uint32_t)tps64;
1258         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1259                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1260                         scaled64 >>= 1;
1261                 else
1262                         tps32 <<= 1;
1263                 shift++;
1264         }
1265
1266         *pshift = shift;
1267         *pmultiplier = div_frac(scaled64, tps32);
1268
1269         pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1270                  __func__, base_hz, scaled_hz, shift, *pmultiplier);
1271 }
1272
1273 #ifdef CONFIG_X86_64
1274 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1275 #endif
1276
1277 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1278 static unsigned long max_tsc_khz;
1279
1280 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1281 {
1282         u64 v = (u64)khz * (1000000 + ppm);
1283         do_div(v, 1000000);
1284         return v;
1285 }
1286
1287 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1288 {
1289         u64 ratio;
1290
1291         /* Guest TSC same frequency as host TSC? */
1292         if (!scale) {
1293                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1294                 return 0;
1295         }
1296
1297         /* TSC scaling supported? */
1298         if (!kvm_has_tsc_control) {
1299                 if (user_tsc_khz > tsc_khz) {
1300                         vcpu->arch.tsc_catchup = 1;
1301                         vcpu->arch.tsc_always_catchup = 1;
1302                         return 0;
1303                 } else {
1304                         WARN(1, "user requested TSC rate below hardware speed\n");
1305                         return -1;
1306                 }
1307         }
1308
1309         /* TSC scaling required  - calculate ratio */
1310         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1311                                 user_tsc_khz, tsc_khz);
1312
1313         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1314                 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1315                           user_tsc_khz);
1316                 return -1;
1317         }
1318
1319         vcpu->arch.tsc_scaling_ratio = ratio;
1320         return 0;
1321 }
1322
1323 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1324 {
1325         u32 thresh_lo, thresh_hi;
1326         int use_scaling = 0;
1327
1328         /* tsc_khz can be zero if TSC calibration fails */
1329         if (user_tsc_khz == 0) {
1330                 /* set tsc_scaling_ratio to a safe value */
1331                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1332                 return -1;
1333         }
1334
1335         /* Compute a scale to convert nanoseconds in TSC cycles */
1336         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1337                            &vcpu->arch.virtual_tsc_shift,
1338                            &vcpu->arch.virtual_tsc_mult);
1339         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1340
1341         /*
1342          * Compute the variation in TSC rate which is acceptable
1343          * within the range of tolerance and decide if the
1344          * rate being applied is within that bounds of the hardware
1345          * rate.  If so, no scaling or compensation need be done.
1346          */
1347         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1348         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1349         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1350                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1351                 use_scaling = 1;
1352         }
1353         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1354 }
1355
1356 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1357 {
1358         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1359                                       vcpu->arch.virtual_tsc_mult,
1360                                       vcpu->arch.virtual_tsc_shift);
1361         tsc += vcpu->arch.this_tsc_write;
1362         return tsc;
1363 }
1364
1365 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1366 {
1367 #ifdef CONFIG_X86_64
1368         bool vcpus_matched;
1369         struct kvm_arch *ka = &vcpu->kvm->arch;
1370         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1371
1372         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1373                          atomic_read(&vcpu->kvm->online_vcpus));
1374
1375         /*
1376          * Once the masterclock is enabled, always perform request in
1377          * order to update it.
1378          *
1379          * In order to enable masterclock, the host clocksource must be TSC
1380          * and the vcpus need to have matched TSCs.  When that happens,
1381          * perform request to enable masterclock.
1382          */
1383         if (ka->use_master_clock ||
1384             (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1385                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1386
1387         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1388                             atomic_read(&vcpu->kvm->online_vcpus),
1389                             ka->use_master_clock, gtod->clock.vclock_mode);
1390 #endif
1391 }
1392
1393 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1394 {
1395         u64 curr_offset = vcpu->arch.tsc_offset;
1396         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1397 }
1398
1399 /*
1400  * Multiply tsc by a fixed point number represented by ratio.
1401  *
1402  * The most significant 64-N bits (mult) of ratio represent the
1403  * integral part of the fixed point number; the remaining N bits
1404  * (frac) represent the fractional part, ie. ratio represents a fixed
1405  * point number (mult + frac * 2^(-N)).
1406  *
1407  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1408  */
1409 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1410 {
1411         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1412 }
1413
1414 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1415 {
1416         u64 _tsc = tsc;
1417         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1418
1419         if (ratio != kvm_default_tsc_scaling_ratio)
1420                 _tsc = __scale_tsc(ratio, tsc);
1421
1422         return _tsc;
1423 }
1424 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1425
1426 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1427 {
1428         u64 tsc;
1429
1430         tsc = kvm_scale_tsc(vcpu, rdtsc());
1431
1432         return target_tsc - tsc;
1433 }
1434
1435 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1436 {
1437         return vcpu->arch.tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
1438 }
1439 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1440
1441 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
1442 {
1443         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1444         vcpu->arch.tsc_offset = offset;
1445 }
1446
1447 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1448 {
1449         struct kvm *kvm = vcpu->kvm;
1450         u64 offset, ns, elapsed;
1451         unsigned long flags;
1452         bool matched;
1453         bool already_matched;
1454         u64 data = msr->data;
1455         bool synchronizing = false;
1456
1457         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1458         offset = kvm_compute_tsc_offset(vcpu, data);
1459         ns = ktime_get_boot_ns();
1460         elapsed = ns - kvm->arch.last_tsc_nsec;
1461
1462         if (vcpu->arch.virtual_tsc_khz) {
1463                 if (data == 0 && msr->host_initiated) {
1464                         /*
1465                          * detection of vcpu initialization -- need to sync
1466                          * with other vCPUs. This particularly helps to keep
1467                          * kvm_clock stable after CPU hotplug
1468                          */
1469                         synchronizing = true;
1470                 } else {
1471                         u64 tsc_exp = kvm->arch.last_tsc_write +
1472                                                 nsec_to_cycles(vcpu, elapsed);
1473                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
1474                         /*
1475                          * Special case: TSC write with a small delta (1 second)
1476                          * of virtual cycle time against real time is
1477                          * interpreted as an attempt to synchronize the CPU.
1478                          */
1479                         synchronizing = data < tsc_exp + tsc_hz &&
1480                                         data + tsc_hz > tsc_exp;
1481                 }
1482         }
1483
1484         /*
1485          * For a reliable TSC, we can match TSC offsets, and for an unstable
1486          * TSC, we add elapsed time in this computation.  We could let the
1487          * compensation code attempt to catch up if we fall behind, but
1488          * it's better to try to match offsets from the beginning.
1489          */
1490         if (synchronizing &&
1491             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1492                 if (!check_tsc_unstable()) {
1493                         offset = kvm->arch.cur_tsc_offset;
1494                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1495                 } else {
1496                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1497                         data += delta;
1498                         offset = kvm_compute_tsc_offset(vcpu, data);
1499                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1500                 }
1501                 matched = true;
1502                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1503         } else {
1504                 /*
1505                  * We split periods of matched TSC writes into generations.
1506                  * For each generation, we track the original measured
1507                  * nanosecond time, offset, and write, so if TSCs are in
1508                  * sync, we can match exact offset, and if not, we can match
1509                  * exact software computation in compute_guest_tsc()
1510                  *
1511                  * These values are tracked in kvm->arch.cur_xxx variables.
1512                  */
1513                 kvm->arch.cur_tsc_generation++;
1514                 kvm->arch.cur_tsc_nsec = ns;
1515                 kvm->arch.cur_tsc_write = data;
1516                 kvm->arch.cur_tsc_offset = offset;
1517                 matched = false;
1518                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1519                          kvm->arch.cur_tsc_generation, data);
1520         }
1521
1522         /*
1523          * We also track th most recent recorded KHZ, write and time to
1524          * allow the matching interval to be extended at each write.
1525          */
1526         kvm->arch.last_tsc_nsec = ns;
1527         kvm->arch.last_tsc_write = data;
1528         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1529
1530         vcpu->arch.last_guest_tsc = data;
1531
1532         /* Keep track of which generation this VCPU has synchronized to */
1533         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1534         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1535         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1536
1537         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1538                 update_ia32_tsc_adjust_msr(vcpu, offset);
1539         kvm_vcpu_write_tsc_offset(vcpu, offset);
1540         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1541
1542         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1543         if (!matched) {
1544                 kvm->arch.nr_vcpus_matched_tsc = 0;
1545         } else if (!already_matched) {
1546                 kvm->arch.nr_vcpus_matched_tsc++;
1547         }
1548
1549         kvm_track_tsc_matching(vcpu);
1550         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1551 }
1552
1553 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1554
1555 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1556                                            s64 adjustment)
1557 {
1558         kvm_vcpu_write_tsc_offset(vcpu, vcpu->arch.tsc_offset + adjustment);
1559 }
1560
1561 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1562 {
1563         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1564                 WARN_ON(adjustment < 0);
1565         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1566         adjust_tsc_offset_guest(vcpu, adjustment);
1567 }
1568
1569 #ifdef CONFIG_X86_64
1570
1571 static u64 read_tsc(void)
1572 {
1573         u64 ret = (u64)rdtsc_ordered();
1574         u64 last = pvclock_gtod_data.clock.cycle_last;
1575
1576         if (likely(ret >= last))
1577                 return ret;
1578
1579         /*
1580          * GCC likes to generate cmov here, but this branch is extremely
1581          * predictable (it's just a function of time and the likely is
1582          * very likely) and there's a data dependence, so force GCC
1583          * to generate a branch instead.  I don't barrier() because
1584          * we don't actually need a barrier, and if this function
1585          * ever gets inlined it will generate worse code.
1586          */
1587         asm volatile ("");
1588         return last;
1589 }
1590
1591 static inline u64 vgettsc(u64 *cycle_now)
1592 {
1593         long v;
1594         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1595
1596         *cycle_now = read_tsc();
1597
1598         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1599         return v * gtod->clock.mult;
1600 }
1601
1602 static int do_monotonic_boot(s64 *t, u64 *cycle_now)
1603 {
1604         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1605         unsigned long seq;
1606         int mode;
1607         u64 ns;
1608
1609         do {
1610                 seq = read_seqcount_begin(&gtod->seq);
1611                 mode = gtod->clock.vclock_mode;
1612                 ns = gtod->nsec_base;
1613                 ns += vgettsc(cycle_now);
1614                 ns >>= gtod->clock.shift;
1615                 ns += gtod->boot_ns;
1616         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1617         *t = ns;
1618
1619         return mode;
1620 }
1621
1622 static int do_realtime(struct timespec *ts, u64 *cycle_now)
1623 {
1624         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1625         unsigned long seq;
1626         int mode;
1627         u64 ns;
1628
1629         do {
1630                 seq = read_seqcount_begin(&gtod->seq);
1631                 mode = gtod->clock.vclock_mode;
1632                 ts->tv_sec = gtod->wall_time_sec;
1633                 ns = gtod->nsec_base;
1634                 ns += vgettsc(cycle_now);
1635                 ns >>= gtod->clock.shift;
1636         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1637
1638         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
1639         ts->tv_nsec = ns;
1640
1641         return mode;
1642 }
1643
1644 /* returns true if host is using tsc clocksource */
1645 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *cycle_now)
1646 {
1647         /* checked again under seqlock below */
1648         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1649                 return false;
1650
1651         return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1652 }
1653
1654 /* returns true if host is using tsc clocksource */
1655 static bool kvm_get_walltime_and_clockread(struct timespec *ts,
1656                                            u64 *cycle_now)
1657 {
1658         /* checked again under seqlock below */
1659         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1660                 return false;
1661
1662         return do_realtime(ts, cycle_now) == VCLOCK_TSC;
1663 }
1664 #endif
1665
1666 /*
1667  *
1668  * Assuming a stable TSC across physical CPUS, and a stable TSC
1669  * across virtual CPUs, the following condition is possible.
1670  * Each numbered line represents an event visible to both
1671  * CPUs at the next numbered event.
1672  *
1673  * "timespecX" represents host monotonic time. "tscX" represents
1674  * RDTSC value.
1675  *
1676  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1677  *
1678  * 1.  read timespec0,tsc0
1679  * 2.                                   | timespec1 = timespec0 + N
1680  *                                      | tsc1 = tsc0 + M
1681  * 3. transition to guest               | transition to guest
1682  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1683  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1684  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1685  *
1686  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1687  *
1688  *      - ret0 < ret1
1689  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1690  *              ...
1691  *      - 0 < N - M => M < N
1692  *
1693  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1694  * always the case (the difference between two distinct xtime instances
1695  * might be smaller then the difference between corresponding TSC reads,
1696  * when updating guest vcpus pvclock areas).
1697  *
1698  * To avoid that problem, do not allow visibility of distinct
1699  * system_timestamp/tsc_timestamp values simultaneously: use a master
1700  * copy of host monotonic time values. Update that master copy
1701  * in lockstep.
1702  *
1703  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1704  *
1705  */
1706
1707 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1708 {
1709 #ifdef CONFIG_X86_64
1710         struct kvm_arch *ka = &kvm->arch;
1711         int vclock_mode;
1712         bool host_tsc_clocksource, vcpus_matched;
1713
1714         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1715                         atomic_read(&kvm->online_vcpus));
1716
1717         /*
1718          * If the host uses TSC clock, then passthrough TSC as stable
1719          * to the guest.
1720          */
1721         host_tsc_clocksource = kvm_get_time_and_clockread(
1722                                         &ka->master_kernel_ns,
1723                                         &ka->master_cycle_now);
1724
1725         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1726                                 && !ka->backwards_tsc_observed
1727                                 && !ka->boot_vcpu_runs_old_kvmclock;
1728
1729         if (ka->use_master_clock)
1730                 atomic_set(&kvm_guest_has_master_clock, 1);
1731
1732         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1733         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1734                                         vcpus_matched);
1735 #endif
1736 }
1737
1738 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
1739 {
1740         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
1741 }
1742
1743 static void kvm_gen_update_masterclock(struct kvm *kvm)
1744 {
1745 #ifdef CONFIG_X86_64
1746         int i;
1747         struct kvm_vcpu *vcpu;
1748         struct kvm_arch *ka = &kvm->arch;
1749
1750         spin_lock(&ka->pvclock_gtod_sync_lock);
1751         kvm_make_mclock_inprogress_request(kvm);
1752         /* no guest entries from this point */
1753         pvclock_update_vm_gtod_copy(kvm);
1754
1755         kvm_for_each_vcpu(i, vcpu, kvm)
1756                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1757
1758         /* guest entries allowed */
1759         kvm_for_each_vcpu(i, vcpu, kvm)
1760                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
1761
1762         spin_unlock(&ka->pvclock_gtod_sync_lock);
1763 #endif
1764 }
1765
1766 u64 get_kvmclock_ns(struct kvm *kvm)
1767 {
1768         struct kvm_arch *ka = &kvm->arch;
1769         struct pvclock_vcpu_time_info hv_clock;
1770         u64 ret;
1771
1772         spin_lock(&ka->pvclock_gtod_sync_lock);
1773         if (!ka->use_master_clock) {
1774                 spin_unlock(&ka->pvclock_gtod_sync_lock);
1775                 return ktime_get_boot_ns() + ka->kvmclock_offset;
1776         }
1777
1778         hv_clock.tsc_timestamp = ka->master_cycle_now;
1779         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
1780         spin_unlock(&ka->pvclock_gtod_sync_lock);
1781
1782         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
1783         get_cpu();
1784
1785         kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
1786                            &hv_clock.tsc_shift,
1787                            &hv_clock.tsc_to_system_mul);
1788         ret = __pvclock_read_cycles(&hv_clock, rdtsc());
1789
1790         put_cpu();
1791
1792         return ret;
1793 }
1794
1795 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
1796 {
1797         struct kvm_vcpu_arch *vcpu = &v->arch;
1798         struct pvclock_vcpu_time_info guest_hv_clock;
1799
1800         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1801                 &guest_hv_clock, sizeof(guest_hv_clock))))
1802                 return;
1803
1804         /* This VCPU is paused, but it's legal for a guest to read another
1805          * VCPU's kvmclock, so we really have to follow the specification where
1806          * it says that version is odd if data is being modified, and even after
1807          * it is consistent.
1808          *
1809          * Version field updates must be kept separate.  This is because
1810          * kvm_write_guest_cached might use a "rep movs" instruction, and
1811          * writes within a string instruction are weakly ordered.  So there
1812          * are three writes overall.
1813          *
1814          * As a small optimization, only write the version field in the first
1815          * and third write.  The vcpu->pv_time cache is still valid, because the
1816          * version field is the first in the struct.
1817          */
1818         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1819
1820         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1821         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1822                                 &vcpu->hv_clock,
1823                                 sizeof(vcpu->hv_clock.version));
1824
1825         smp_wmb();
1826
1827         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1828         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1829
1830         if (vcpu->pvclock_set_guest_stopped_request) {
1831                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
1832                 vcpu->pvclock_set_guest_stopped_request = false;
1833         }
1834
1835         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1836
1837         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1838                                 &vcpu->hv_clock,
1839                                 sizeof(vcpu->hv_clock));
1840
1841         smp_wmb();
1842
1843         vcpu->hv_clock.version++;
1844         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1845                                 &vcpu->hv_clock,
1846                                 sizeof(vcpu->hv_clock.version));
1847 }
1848
1849 static int kvm_guest_time_update(struct kvm_vcpu *v)
1850 {
1851         unsigned long flags, tgt_tsc_khz;
1852         struct kvm_vcpu_arch *vcpu = &v->arch;
1853         struct kvm_arch *ka = &v->kvm->arch;
1854         s64 kernel_ns;
1855         u64 tsc_timestamp, host_tsc;
1856         u8 pvclock_flags;
1857         bool use_master_clock;
1858
1859         kernel_ns = 0;
1860         host_tsc = 0;
1861
1862         /*
1863          * If the host uses TSC clock, then passthrough TSC as stable
1864          * to the guest.
1865          */
1866         spin_lock(&ka->pvclock_gtod_sync_lock);
1867         use_master_clock = ka->use_master_clock;
1868         if (use_master_clock) {
1869                 host_tsc = ka->master_cycle_now;
1870                 kernel_ns = ka->master_kernel_ns;
1871         }
1872         spin_unlock(&ka->pvclock_gtod_sync_lock);
1873
1874         /* Keep irq disabled to prevent changes to the clock */
1875         local_irq_save(flags);
1876         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1877         if (unlikely(tgt_tsc_khz == 0)) {
1878                 local_irq_restore(flags);
1879                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1880                 return 1;
1881         }
1882         if (!use_master_clock) {
1883                 host_tsc = rdtsc();
1884                 kernel_ns = ktime_get_boot_ns();
1885         }
1886
1887         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
1888
1889         /*
1890          * We may have to catch up the TSC to match elapsed wall clock
1891          * time for two reasons, even if kvmclock is used.
1892          *   1) CPU could have been running below the maximum TSC rate
1893          *   2) Broken TSC compensation resets the base at each VCPU
1894          *      entry to avoid unknown leaps of TSC even when running
1895          *      again on the same CPU.  This may cause apparent elapsed
1896          *      time to disappear, and the guest to stand still or run
1897          *      very slowly.
1898          */
1899         if (vcpu->tsc_catchup) {
1900                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1901                 if (tsc > tsc_timestamp) {
1902                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1903                         tsc_timestamp = tsc;
1904                 }
1905         }
1906
1907         local_irq_restore(flags);
1908
1909         /* With all the info we got, fill in the values */
1910
1911         if (kvm_has_tsc_control)
1912                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
1913
1914         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
1915                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
1916                                    &vcpu->hv_clock.tsc_shift,
1917                                    &vcpu->hv_clock.tsc_to_system_mul);
1918                 vcpu->hw_tsc_khz = tgt_tsc_khz;
1919         }
1920
1921         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1922         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1923         vcpu->last_guest_tsc = tsc_timestamp;
1924
1925         /* If the host uses TSC clocksource, then it is stable */
1926         pvclock_flags = 0;
1927         if (use_master_clock)
1928                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1929
1930         vcpu->hv_clock.flags = pvclock_flags;
1931
1932         if (vcpu->pv_time_enabled)
1933                 kvm_setup_pvclock_page(v);
1934         if (v == kvm_get_vcpu(v->kvm, 0))
1935                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
1936         return 0;
1937 }
1938
1939 /*
1940  * kvmclock updates which are isolated to a given vcpu, such as
1941  * vcpu->cpu migration, should not allow system_timestamp from
1942  * the rest of the vcpus to remain static. Otherwise ntp frequency
1943  * correction applies to one vcpu's system_timestamp but not
1944  * the others.
1945  *
1946  * So in those cases, request a kvmclock update for all vcpus.
1947  * We need to rate-limit these requests though, as they can
1948  * considerably slow guests that have a large number of vcpus.
1949  * The time for a remote vcpu to update its kvmclock is bound
1950  * by the delay we use to rate-limit the updates.
1951  */
1952
1953 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1954
1955 static void kvmclock_update_fn(struct work_struct *work)
1956 {
1957         int i;
1958         struct delayed_work *dwork = to_delayed_work(work);
1959         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1960                                            kvmclock_update_work);
1961         struct kvm *kvm = container_of(ka, struct kvm, arch);
1962         struct kvm_vcpu *vcpu;
1963
1964         kvm_for_each_vcpu(i, vcpu, kvm) {
1965                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1966                 kvm_vcpu_kick(vcpu);
1967         }
1968 }
1969
1970 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1971 {
1972         struct kvm *kvm = v->kvm;
1973
1974         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1975         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1976                                         KVMCLOCK_UPDATE_DELAY);
1977 }
1978
1979 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1980
1981 static void kvmclock_sync_fn(struct work_struct *work)
1982 {
1983         struct delayed_work *dwork = to_delayed_work(work);
1984         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1985                                            kvmclock_sync_work);
1986         struct kvm *kvm = container_of(ka, struct kvm, arch);
1987
1988         if (!kvmclock_periodic_sync)
1989                 return;
1990
1991         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
1992         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
1993                                         KVMCLOCK_SYNC_PERIOD);
1994 }
1995
1996 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1997 {
1998         u64 mcg_cap = vcpu->arch.mcg_cap;
1999         unsigned bank_num = mcg_cap & 0xff;
2000
2001         switch (msr) {
2002         case MSR_IA32_MCG_STATUS:
2003                 vcpu->arch.mcg_status = data;
2004                 break;
2005         case MSR_IA32_MCG_CTL:
2006                 if (!(mcg_cap & MCG_CTL_P))
2007                         return 1;
2008                 if (data != 0 && data != ~(u64)0)
2009                         return -1;
2010                 vcpu->arch.mcg_ctl = data;
2011                 break;
2012         default:
2013                 if (msr >= MSR_IA32_MC0_CTL &&
2014                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2015                         u32 offset = msr - MSR_IA32_MC0_CTL;
2016                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2017                          * some Linux kernels though clear bit 10 in bank 4 to
2018                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2019                          * this to avoid an uncatched #GP in the guest
2020                          */
2021                         if ((offset & 0x3) == 0 &&
2022                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2023                                 return -1;
2024                         vcpu->arch.mce_banks[offset] = data;
2025                         break;
2026                 }
2027                 return 1;
2028         }
2029         return 0;
2030 }
2031
2032 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2033 {
2034         struct kvm *kvm = vcpu->kvm;
2035         int lm = is_long_mode(vcpu);
2036         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2037                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2038         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2039                 : kvm->arch.xen_hvm_config.blob_size_32;
2040         u32 page_num = data & ~PAGE_MASK;
2041         u64 page_addr = data & PAGE_MASK;
2042         u8 *page;
2043         int r;
2044
2045         r = -E2BIG;
2046         if (page_num >= blob_size)
2047                 goto out;
2048         r = -ENOMEM;
2049         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2050         if (IS_ERR(page)) {
2051                 r = PTR_ERR(page);
2052                 goto out;
2053         }
2054         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2055                 goto out_free;
2056         r = 0;
2057 out_free:
2058         kfree(page);
2059 out:
2060         return r;
2061 }
2062
2063 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2064 {
2065         gpa_t gpa = data & ~0x3f;
2066
2067         /* Bits 3:5 are reserved, Should be zero */
2068         if (data & 0x38)
2069                 return 1;
2070
2071         vcpu->arch.apf.msr_val = data;
2072
2073         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2074                 kvm_clear_async_pf_completion_queue(vcpu);
2075                 kvm_async_pf_hash_reset(vcpu);
2076                 return 0;
2077         }
2078
2079         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2080                                         sizeof(u32)))
2081                 return 1;
2082
2083         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2084         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2085         kvm_async_pf_wakeup_all(vcpu);
2086         return 0;
2087 }
2088
2089 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2090 {
2091         vcpu->arch.pv_time_enabled = false;
2092 }
2093
2094 static void record_steal_time(struct kvm_vcpu *vcpu)
2095 {
2096         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2097                 return;
2098
2099         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2100                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2101                 return;
2102
2103         vcpu->arch.st.steal.preempted = 0;
2104
2105         if (vcpu->arch.st.steal.version & 1)
2106                 vcpu->arch.st.steal.version += 1;  /* first time write, random junk */
2107
2108         vcpu->arch.st.steal.version += 1;
2109
2110         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2111                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2112
2113         smp_wmb();
2114
2115         vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2116                 vcpu->arch.st.last_steal;
2117         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2118
2119         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2120                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2121
2122         smp_wmb();
2123
2124         vcpu->arch.st.steal.version += 1;
2125
2126         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2127                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2128 }
2129
2130 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2131 {
2132         bool pr = false;
2133         u32 msr = msr_info->index;
2134         u64 data = msr_info->data;
2135
2136         switch (msr) {
2137         case MSR_AMD64_NB_CFG:
2138         case MSR_IA32_UCODE_REV:
2139         case MSR_IA32_UCODE_WRITE:
2140         case MSR_VM_HSAVE_PA:
2141         case MSR_AMD64_PATCH_LOADER:
2142         case MSR_AMD64_BU_CFG2:
2143         case MSR_AMD64_DC_CFG:
2144                 break;
2145
2146         case MSR_EFER:
2147                 return set_efer(vcpu, data);
2148         case MSR_K7_HWCR:
2149                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2150                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2151                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2152                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2153                 if (data != 0) {
2154                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2155                                     data);
2156                         return 1;
2157                 }
2158                 break;
2159         case MSR_FAM10H_MMIO_CONF_BASE:
2160                 if (data != 0) {
2161                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2162                                     "0x%llx\n", data);
2163                         return 1;
2164                 }
2165                 break;
2166         case MSR_IA32_DEBUGCTLMSR:
2167                 if (!data) {
2168                         /* We support the non-activated case already */
2169                         break;
2170                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2171                         /* Values other than LBR and BTF are vendor-specific,
2172                            thus reserved and should throw a #GP */
2173                         return 1;
2174                 }
2175                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2176                             __func__, data);
2177                 break;
2178         case 0x200 ... 0x2ff:
2179                 return kvm_mtrr_set_msr(vcpu, msr, data);
2180         case MSR_IA32_APICBASE:
2181                 return kvm_set_apic_base(vcpu, msr_info);
2182         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2183                 return kvm_x2apic_msr_write(vcpu, msr, data);
2184         case MSR_IA32_TSCDEADLINE:
2185                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2186                 break;
2187         case MSR_IA32_TSC_ADJUST:
2188                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2189                         if (!msr_info->host_initiated) {
2190                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2191                                 adjust_tsc_offset_guest(vcpu, adj);
2192                         }
2193                         vcpu->arch.ia32_tsc_adjust_msr = data;
2194                 }
2195                 break;
2196         case MSR_IA32_MISC_ENABLE:
2197                 vcpu->arch.ia32_misc_enable_msr = data;
2198                 break;
2199         case MSR_IA32_SMBASE:
2200                 if (!msr_info->host_initiated)
2201                         return 1;
2202                 vcpu->arch.smbase = data;
2203                 break;
2204         case MSR_KVM_WALL_CLOCK_NEW:
2205         case MSR_KVM_WALL_CLOCK:
2206                 vcpu->kvm->arch.wall_clock = data;
2207                 kvm_write_wall_clock(vcpu->kvm, data);
2208                 break;
2209         case MSR_KVM_SYSTEM_TIME_NEW:
2210         case MSR_KVM_SYSTEM_TIME: {
2211                 struct kvm_arch *ka = &vcpu->kvm->arch;
2212
2213                 kvmclock_reset(vcpu);
2214
2215                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2216                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2217
2218                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2219                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2220
2221                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2222                 }
2223
2224                 vcpu->arch.time = data;
2225                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2226
2227                 /* we verify if the enable bit is set... */
2228                 if (!(data & 1))
2229                         break;
2230
2231                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2232                      &vcpu->arch.pv_time, data & ~1ULL,
2233                      sizeof(struct pvclock_vcpu_time_info)))
2234                         vcpu->arch.pv_time_enabled = false;
2235                 else
2236                         vcpu->arch.pv_time_enabled = true;
2237
2238                 break;
2239         }
2240         case MSR_KVM_ASYNC_PF_EN:
2241                 if (kvm_pv_enable_async_pf(vcpu, data))
2242                         return 1;
2243                 break;
2244         case MSR_KVM_STEAL_TIME:
2245
2246                 if (unlikely(!sched_info_on()))
2247                         return 1;
2248
2249                 if (data & KVM_STEAL_RESERVED_MASK)
2250                         return 1;
2251
2252                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2253                                                 data & KVM_STEAL_VALID_BITS,
2254                                                 sizeof(struct kvm_steal_time)))
2255                         return 1;
2256
2257                 vcpu->arch.st.msr_val = data;
2258
2259                 if (!(data & KVM_MSR_ENABLED))
2260                         break;
2261
2262                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2263
2264                 break;
2265         case MSR_KVM_PV_EOI_EN:
2266                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2267                         return 1;
2268                 break;
2269
2270         case MSR_IA32_MCG_CTL:
2271         case MSR_IA32_MCG_STATUS:
2272         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2273                 return set_msr_mce(vcpu, msr, data);
2274
2275         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2276         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2277                 pr = true; /* fall through */
2278         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2279         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2280                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2281                         return kvm_pmu_set_msr(vcpu, msr_info);
2282
2283                 if (pr || data != 0)
2284                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2285                                     "0x%x data 0x%llx\n", msr, data);
2286                 break;
2287         case MSR_K7_CLK_CTL:
2288                 /*
2289                  * Ignore all writes to this no longer documented MSR.
2290                  * Writes are only relevant for old K7 processors,
2291                  * all pre-dating SVM, but a recommended workaround from
2292                  * AMD for these chips. It is possible to specify the
2293                  * affected processor models on the command line, hence
2294                  * the need to ignore the workaround.
2295                  */
2296                 break;
2297         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2298         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2299         case HV_X64_MSR_CRASH_CTL:
2300         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2301                 return kvm_hv_set_msr_common(vcpu, msr, data,
2302                                              msr_info->host_initiated);
2303         case MSR_IA32_BBL_CR_CTL3:
2304                 /* Drop writes to this legacy MSR -- see rdmsr
2305                  * counterpart for further detail.
2306                  */
2307                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n", msr, data);
2308                 break;
2309         case MSR_AMD64_OSVW_ID_LENGTH:
2310                 if (!guest_cpuid_has_osvw(vcpu))
2311                         return 1;
2312                 vcpu->arch.osvw.length = data;
2313                 break;
2314         case MSR_AMD64_OSVW_STATUS:
2315                 if (!guest_cpuid_has_osvw(vcpu))
2316                         return 1;
2317                 vcpu->arch.osvw.status = data;
2318                 break;
2319         case MSR_PLATFORM_INFO:
2320                 if (!msr_info->host_initiated ||
2321                     data & ~MSR_PLATFORM_INFO_CPUID_FAULT ||
2322                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
2323                      cpuid_fault_enabled(vcpu)))
2324                         return 1;
2325                 vcpu->arch.msr_platform_info = data;
2326                 break;
2327         case MSR_MISC_FEATURES_ENABLES:
2328                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
2329                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
2330                      !supports_cpuid_fault(vcpu)))
2331                         return 1;
2332                 vcpu->arch.msr_misc_features_enables = data;
2333                 break;
2334         default:
2335                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2336                         return xen_hvm_config(vcpu, data);
2337                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2338                         return kvm_pmu_set_msr(vcpu, msr_info);
2339                 if (!ignore_msrs) {
2340                         vcpu_debug_ratelimited(vcpu, "unhandled wrmsr: 0x%x data 0x%llx\n",
2341                                     msr, data);
2342                         return 1;
2343                 } else {
2344                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
2345                                     msr, data);
2346                         break;
2347                 }
2348         }
2349         return 0;
2350 }
2351 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2352
2353
2354 /*
2355  * Reads an msr value (of 'msr_index') into 'pdata'.
2356  * Returns 0 on success, non-0 otherwise.
2357  * Assumes vcpu_load() was already called.
2358  */
2359 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2360 {
2361         return kvm_x86_ops->get_msr(vcpu, msr);
2362 }
2363 EXPORT_SYMBOL_GPL(kvm_get_msr);
2364
2365 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2366 {
2367         u64 data;
2368         u64 mcg_cap = vcpu->arch.mcg_cap;
2369         unsigned bank_num = mcg_cap & 0xff;
2370
2371         switch (msr) {
2372         case MSR_IA32_P5_MC_ADDR:
2373         case MSR_IA32_P5_MC_TYPE:
2374                 data = 0;
2375                 break;
2376         case MSR_IA32_MCG_CAP:
2377                 data = vcpu->arch.mcg_cap;
2378                 break;
2379         case MSR_IA32_MCG_CTL:
2380                 if (!(mcg_cap & MCG_CTL_P))
2381                         return 1;
2382                 data = vcpu->arch.mcg_ctl;
2383                 break;
2384         case MSR_IA32_MCG_STATUS:
2385                 data = vcpu->arch.mcg_status;
2386                 break;
2387         default:
2388                 if (msr >= MSR_IA32_MC0_CTL &&
2389                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2390                         u32 offset = msr - MSR_IA32_MC0_CTL;
2391                         data = vcpu->arch.mce_banks[offset];
2392                         break;
2393                 }
2394                 return 1;
2395         }
2396         *pdata = data;
2397         return 0;
2398 }
2399
2400 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2401 {
2402         switch (msr_info->index) {
2403         case MSR_IA32_PLATFORM_ID:
2404         case MSR_IA32_EBL_CR_POWERON:
2405         case MSR_IA32_DEBUGCTLMSR:
2406         case MSR_IA32_LASTBRANCHFROMIP:
2407         case MSR_IA32_LASTBRANCHTOIP:
2408         case MSR_IA32_LASTINTFROMIP:
2409         case MSR_IA32_LASTINTTOIP:
2410         case MSR_K8_SYSCFG:
2411         case MSR_K8_TSEG_ADDR:
2412         case MSR_K8_TSEG_MASK:
2413         case MSR_K7_HWCR:
2414         case MSR_VM_HSAVE_PA:
2415         case MSR_K8_INT_PENDING_MSG:
2416         case MSR_AMD64_NB_CFG:
2417         case MSR_FAM10H_MMIO_CONF_BASE:
2418         case MSR_AMD64_BU_CFG2:
2419         case MSR_IA32_PERF_CTL:
2420         case MSR_AMD64_DC_CFG:
2421                 msr_info->data = 0;
2422                 break;
2423         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2424         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2425         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2426         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2427                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2428                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2429                 msr_info->data = 0;
2430                 break;
2431         case MSR_IA32_UCODE_REV:
2432                 msr_info->data = 0x100000000ULL;
2433                 break;
2434         case MSR_MTRRcap:
2435         case 0x200 ... 0x2ff:
2436                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2437         case 0xcd: /* fsb frequency */
2438                 msr_info->data = 3;
2439                 break;
2440                 /*
2441                  * MSR_EBC_FREQUENCY_ID
2442                  * Conservative value valid for even the basic CPU models.
2443                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2444                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2445                  * and 266MHz for model 3, or 4. Set Core Clock
2446                  * Frequency to System Bus Frequency Ratio to 1 (bits
2447                  * 31:24) even though these are only valid for CPU
2448                  * models > 2, however guests may end up dividing or
2449                  * multiplying by zero otherwise.
2450                  */
2451         case MSR_EBC_FREQUENCY_ID:
2452                 msr_info->data = 1 << 24;
2453                 break;
2454         case MSR_IA32_APICBASE:
2455                 msr_info->data = kvm_get_apic_base(vcpu);
2456                 break;
2457         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2458                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2459                 break;
2460         case MSR_IA32_TSCDEADLINE:
2461                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2462                 break;
2463         case MSR_IA32_TSC_ADJUST:
2464                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2465                 break;
2466         case MSR_IA32_MISC_ENABLE:
2467                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2468                 break;
2469         case MSR_IA32_SMBASE:
2470                 if (!msr_info->host_initiated)
2471                         return 1;
2472                 msr_info->data = vcpu->arch.smbase;
2473                 break;
2474         case MSR_IA32_PERF_STATUS:
2475                 /* TSC increment by tick */
2476                 msr_info->data = 1000ULL;
2477                 /* CPU multiplier */
2478                 msr_info->data |= (((uint64_t)4ULL) << 40);
2479                 break;
2480         case MSR_EFER:
2481                 msr_info->data = vcpu->arch.efer;
2482                 break;
2483         case MSR_KVM_WALL_CLOCK:
2484         case MSR_KVM_WALL_CLOCK_NEW:
2485                 msr_info->data = vcpu->kvm->arch.wall_clock;
2486                 break;
2487         case MSR_KVM_SYSTEM_TIME:
2488         case MSR_KVM_SYSTEM_TIME_NEW:
2489                 msr_info->data = vcpu->arch.time;
2490                 break;
2491         case MSR_KVM_ASYNC_PF_EN:
2492                 msr_info->data = vcpu->arch.apf.msr_val;
2493                 break;
2494         case MSR_KVM_STEAL_TIME:
2495                 msr_info->data = vcpu->arch.st.msr_val;
2496                 break;
2497         case MSR_KVM_PV_EOI_EN:
2498                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2499                 break;
2500         case MSR_IA32_P5_MC_ADDR:
2501         case MSR_IA32_P5_MC_TYPE:
2502         case MSR_IA32_MCG_CAP:
2503         case MSR_IA32_MCG_CTL:
2504         case MSR_IA32_MCG_STATUS:
2505         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2506                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2507         case MSR_K7_CLK_CTL:
2508                 /*
2509                  * Provide expected ramp-up count for K7. All other
2510                  * are set to zero, indicating minimum divisors for
2511                  * every field.
2512                  *
2513                  * This prevents guest kernels on AMD host with CPU
2514                  * type 6, model 8 and higher from exploding due to
2515                  * the rdmsr failing.
2516                  */
2517                 msr_info->data = 0x20000000;
2518                 break;
2519         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2520         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2521         case HV_X64_MSR_CRASH_CTL:
2522         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2523                 return kvm_hv_get_msr_common(vcpu,
2524                                              msr_info->index, &msr_info->data);
2525                 break;
2526         case MSR_IA32_BBL_CR_CTL3:
2527                 /* This legacy MSR exists but isn't fully documented in current
2528                  * silicon.  It is however accessed by winxp in very narrow
2529                  * scenarios where it sets bit #19, itself documented as
2530                  * a "reserved" bit.  Best effort attempt to source coherent
2531                  * read data here should the balance of the register be
2532                  * interpreted by the guest:
2533                  *
2534                  * L2 cache control register 3: 64GB range, 256KB size,
2535                  * enabled, latency 0x1, configured
2536                  */
2537                 msr_info->data = 0xbe702111;
2538                 break;
2539         case MSR_AMD64_OSVW_ID_LENGTH:
2540                 if (!guest_cpuid_has_osvw(vcpu))
2541                         return 1;
2542                 msr_info->data = vcpu->arch.osvw.length;
2543                 break;
2544         case MSR_AMD64_OSVW_STATUS:
2545                 if (!guest_cpuid_has_osvw(vcpu))
2546                         return 1;
2547                 msr_info->data = vcpu->arch.osvw.status;
2548                 break;
2549         case MSR_PLATFORM_INFO:
2550                 msr_info->data = vcpu->arch.msr_platform_info;
2551                 break;
2552         case MSR_MISC_FEATURES_ENABLES:
2553                 msr_info->data = vcpu->arch.msr_misc_features_enables;
2554                 break;
2555         default:
2556                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2557                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2558                 if (!ignore_msrs) {
2559                         vcpu_debug_ratelimited(vcpu, "unhandled rdmsr: 0x%x\n",
2560                                                msr_info->index);
2561                         return 1;
2562                 } else {
2563                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);
2564                         msr_info->data = 0;
2565                 }
2566                 break;
2567         }
2568         return 0;
2569 }
2570 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2571
2572 /*
2573  * Read or write a bunch of msrs. All parameters are kernel addresses.
2574  *
2575  * @return number of msrs set successfully.
2576  */
2577 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2578                     struct kvm_msr_entry *entries,
2579                     int (*do_msr)(struct kvm_vcpu *vcpu,
2580                                   unsigned index, u64 *data))
2581 {
2582         int i, idx;
2583
2584         idx = srcu_read_lock(&vcpu->kvm->srcu);
2585         for (i = 0; i < msrs->nmsrs; ++i)
2586                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2587                         break;
2588         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2589
2590         return i;
2591 }
2592
2593 /*
2594  * Read or write a bunch of msrs. Parameters are user addresses.
2595  *
2596  * @return number of msrs set successfully.
2597  */
2598 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2599                   int (*do_msr)(struct kvm_vcpu *vcpu,
2600                                 unsigned index, u64 *data),
2601                   int writeback)
2602 {
2603         struct kvm_msrs msrs;
2604         struct kvm_msr_entry *entries;
2605         int r, n;
2606         unsigned size;
2607
2608         r = -EFAULT;
2609         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2610                 goto out;
2611
2612         r = -E2BIG;
2613         if (msrs.nmsrs >= MAX_IO_MSRS)
2614                 goto out;
2615
2616         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2617         entries = memdup_user(user_msrs->entries, size);
2618         if (IS_ERR(entries)) {
2619                 r = PTR_ERR(entries);
2620                 goto out;
2621         }
2622
2623         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2624         if (r < 0)
2625                 goto out_free;
2626
2627         r = -EFAULT;
2628         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2629                 goto out_free;
2630
2631         r = n;
2632
2633 out_free:
2634         kfree(entries);
2635 out:
2636         return r;
2637 }
2638
2639 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2640 {
2641         int r;
2642
2643         switch (ext) {
2644         case KVM_CAP_IRQCHIP:
2645         case KVM_CAP_HLT:
2646         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2647         case KVM_CAP_SET_TSS_ADDR:
2648         case KVM_CAP_EXT_CPUID:
2649         case KVM_CAP_EXT_EMUL_CPUID:
2650         case KVM_CAP_CLOCKSOURCE:
2651         case KVM_CAP_PIT:
2652         case KVM_CAP_NOP_IO_DELAY:
2653         case KVM_CAP_MP_STATE:
2654         case KVM_CAP_SYNC_MMU:
2655         case KVM_CAP_USER_NMI:
2656         case KVM_CAP_REINJECT_CONTROL:
2657         case KVM_CAP_IRQ_INJECT_STATUS:
2658         case KVM_CAP_IOEVENTFD:
2659         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2660         case KVM_CAP_PIT2:
2661         case KVM_CAP_PIT_STATE2:
2662         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2663         case KVM_CAP_XEN_HVM:
2664         case KVM_CAP_VCPU_EVENTS:
2665         case KVM_CAP_HYPERV:
2666         case KVM_CAP_HYPERV_VAPIC:
2667         case KVM_CAP_HYPERV_SPIN:
2668         case KVM_CAP_HYPERV_SYNIC:
2669         case KVM_CAP_HYPERV_SYNIC2:
2670         case KVM_CAP_HYPERV_VP_INDEX:
2671         case KVM_CAP_PCI_SEGMENT:
2672         case KVM_CAP_DEBUGREGS:
2673         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2674         case KVM_CAP_XSAVE:
2675         case KVM_CAP_ASYNC_PF:
2676         case KVM_CAP_GET_TSC_KHZ:
2677         case KVM_CAP_KVMCLOCK_CTRL:
2678         case KVM_CAP_READONLY_MEM:
2679         case KVM_CAP_HYPERV_TIME:
2680         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2681         case KVM_CAP_TSC_DEADLINE_TIMER:
2682         case KVM_CAP_ENABLE_CAP_VM:
2683         case KVM_CAP_DISABLE_QUIRKS:
2684         case KVM_CAP_SET_BOOT_CPU_ID:
2685         case KVM_CAP_SPLIT_IRQCHIP:
2686         case KVM_CAP_IMMEDIATE_EXIT:
2687                 r = 1;
2688                 break;
2689         case KVM_CAP_ADJUST_CLOCK:
2690                 r = KVM_CLOCK_TSC_STABLE;
2691                 break;
2692         case KVM_CAP_X86_GUEST_MWAIT:
2693                 r = kvm_mwait_in_guest();
2694                 break;
2695         case KVM_CAP_X86_SMM:
2696                 /* SMBASE is usually relocated above 1M on modern chipsets,
2697                  * and SMM handlers might indeed rely on 4G segment limits,
2698                  * so do not report SMM to be available if real mode is
2699                  * emulated via vm86 mode.  Still, do not go to great lengths
2700                  * to avoid userspace's usage of the feature, because it is a
2701                  * fringe case that is not enabled except via specific settings
2702                  * of the module parameters.
2703                  */
2704                 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2705                 break;
2706         case KVM_CAP_VAPIC:
2707                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2708                 break;
2709         case KVM_CAP_NR_VCPUS:
2710                 r = KVM_SOFT_MAX_VCPUS;
2711                 break;
2712         case KVM_CAP_MAX_VCPUS:
2713                 r = KVM_MAX_VCPUS;
2714                 break;
2715         case KVM_CAP_NR_MEMSLOTS:
2716                 r = KVM_USER_MEM_SLOTS;
2717                 break;
2718         case KVM_CAP_PV_MMU:    /* obsolete */
2719                 r = 0;
2720                 break;
2721         case KVM_CAP_MCE:
2722                 r = KVM_MAX_MCE_BANKS;
2723                 break;
2724         case KVM_CAP_XCRS:
2725                 r = boot_cpu_has(X86_FEATURE_XSAVE);
2726                 break;
2727         case KVM_CAP_TSC_CONTROL:
2728                 r = kvm_has_tsc_control;
2729                 break;
2730         case KVM_CAP_X2APIC_API:
2731                 r = KVM_X2APIC_API_VALID_FLAGS;
2732                 break;
2733         default:
2734                 r = 0;
2735                 break;
2736         }
2737         return r;
2738
2739 }
2740
2741 long kvm_arch_dev_ioctl(struct file *filp,
2742                         unsigned int ioctl, unsigned long arg)
2743 {
2744         void __user *argp = (void __user *)arg;
2745         long r;
2746
2747         switch (ioctl) {
2748         case KVM_GET_MSR_INDEX_LIST: {
2749                 struct kvm_msr_list __user *user_msr_list = argp;
2750                 struct kvm_msr_list msr_list;
2751                 unsigned n;
2752
2753                 r = -EFAULT;
2754                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2755                         goto out;
2756                 n = msr_list.nmsrs;
2757                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2758                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2759                         goto out;
2760                 r = -E2BIG;
2761                 if (n < msr_list.nmsrs)
2762                         goto out;
2763                 r = -EFAULT;
2764                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2765                                  num_msrs_to_save * sizeof(u32)))
2766                         goto out;
2767                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2768                                  &emulated_msrs,
2769                                  num_emulated_msrs * sizeof(u32)))
2770                         goto out;
2771                 r = 0;
2772                 break;
2773         }
2774         case KVM_GET_SUPPORTED_CPUID:
2775         case KVM_GET_EMULATED_CPUID: {
2776                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2777                 struct kvm_cpuid2 cpuid;
2778
2779                 r = -EFAULT;
2780                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2781                         goto out;
2782
2783                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2784                                             ioctl);
2785                 if (r)
2786                         goto out;
2787
2788                 r = -EFAULT;
2789                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2790                         goto out;
2791                 r = 0;
2792                 break;
2793         }
2794         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2795                 r = -EFAULT;
2796                 if (copy_to_user(argp, &kvm_mce_cap_supported,
2797                                  sizeof(kvm_mce_cap_supported)))
2798                         goto out;
2799                 r = 0;
2800                 break;
2801         }
2802         default:
2803                 r = -EINVAL;
2804         }
2805 out:
2806         return r;
2807 }
2808
2809 static void wbinvd_ipi(void *garbage)
2810 {
2811         wbinvd();
2812 }
2813
2814 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2815 {
2816         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2817 }
2818
2819 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2820 {
2821         /* Address WBINVD may be executed by guest */
2822         if (need_emulate_wbinvd(vcpu)) {
2823                 if (kvm_x86_ops->has_wbinvd_exit())
2824                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2825                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2826                         smp_call_function_single(vcpu->cpu,
2827                                         wbinvd_ipi, NULL, 1);
2828         }
2829
2830         kvm_x86_ops->vcpu_load(vcpu, cpu);
2831
2832         /* Apply any externally detected TSC adjustments (due to suspend) */
2833         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2834                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2835                 vcpu->arch.tsc_offset_adjustment = 0;
2836                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2837         }
2838
2839         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2840                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2841                                 rdtsc() - vcpu->arch.last_host_tsc;
2842                 if (tsc_delta < 0)
2843                         mark_tsc_unstable("KVM discovered backwards TSC");
2844
2845                 if (check_tsc_unstable()) {
2846                         u64 offset = kvm_compute_tsc_offset(vcpu,
2847                                                 vcpu->arch.last_guest_tsc);
2848                         kvm_vcpu_write_tsc_offset(vcpu, offset);
2849                         vcpu->arch.tsc_catchup = 1;
2850                 }
2851
2852                 if (kvm_lapic_hv_timer_in_use(vcpu))
2853                         kvm_lapic_restart_hv_timer(vcpu);
2854
2855                 /*
2856                  * On a host with synchronized TSC, there is no need to update
2857                  * kvmclock on vcpu->cpu migration
2858                  */
2859                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2860                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2861                 if (vcpu->cpu != cpu)
2862                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
2863                 vcpu->cpu = cpu;
2864         }
2865
2866         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2867 }
2868
2869 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
2870 {
2871         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2872                 return;
2873
2874         vcpu->arch.st.steal.preempted = 1;
2875
2876         kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.st.stime,
2877                         &vcpu->arch.st.steal.preempted,
2878                         offsetof(struct kvm_steal_time, preempted),
2879                         sizeof(vcpu->arch.st.steal.preempted));
2880 }
2881
2882 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2883 {
2884         int idx;
2885         /*
2886          * Disable page faults because we're in atomic context here.
2887          * kvm_write_guest_offset_cached() would call might_fault()
2888          * that relies on pagefault_disable() to tell if there's a
2889          * bug. NOTE: the write to guest memory may not go through if
2890          * during postcopy live migration or if there's heavy guest
2891          * paging.
2892          */
2893         pagefault_disable();
2894         /*
2895          * kvm_memslots() will be called by
2896          * kvm_write_guest_offset_cached() so take the srcu lock.
2897          */
2898         idx = srcu_read_lock(&vcpu->kvm->srcu);
2899         kvm_steal_time_set_preempted(vcpu);
2900         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2901         pagefault_enable();
2902         kvm_x86_ops->vcpu_put(vcpu);
2903         kvm_put_guest_fpu(vcpu);
2904         vcpu->arch.last_host_tsc = rdtsc();
2905 }
2906
2907 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2908                                     struct kvm_lapic_state *s)
2909 {
2910         if (kvm_x86_ops->sync_pir_to_irr && vcpu->arch.apicv_active)
2911                 kvm_x86_ops->sync_pir_to_irr(vcpu);
2912
2913         return kvm_apic_get_state(vcpu, s);
2914 }
2915
2916 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2917                                     struct kvm_lapic_state *s)
2918 {
2919         int r;
2920
2921         r = kvm_apic_set_state(vcpu, s);
2922         if (r)
2923                 return r;
2924         update_cr8_intercept(vcpu);
2925
2926         return 0;
2927 }
2928
2929 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
2930 {
2931         return (!lapic_in_kernel(vcpu) ||
2932                 kvm_apic_accept_pic_intr(vcpu));
2933 }
2934
2935 /*
2936  * if userspace requested an interrupt window, check that the
2937  * interrupt window is open.
2938  *
2939  * No need to exit to userspace if we already have an interrupt queued.
2940  */
2941 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
2942 {
2943         return kvm_arch_interrupt_allowed(vcpu) &&
2944                 !kvm_cpu_has_interrupt(vcpu) &&
2945                 !kvm_event_needs_reinjection(vcpu) &&
2946                 kvm_cpu_accept_dm_intr(vcpu);
2947 }
2948
2949 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2950                                     struct kvm_interrupt *irq)
2951 {
2952         if (irq->irq >= KVM_NR_INTERRUPTS)
2953                 return -EINVAL;
2954
2955         if (!irqchip_in_kernel(vcpu->kvm)) {
2956                 kvm_queue_interrupt(vcpu, irq->irq, false);
2957                 kvm_make_request(KVM_REQ_EVENT, vcpu);
2958                 return 0;
2959         }
2960
2961         /*
2962          * With in-kernel LAPIC, we only use this to inject EXTINT, so
2963          * fail for in-kernel 8259.
2964          */
2965         if (pic_in_kernel(vcpu->kvm))
2966                 return -ENXIO;
2967
2968         if (vcpu->arch.pending_external_vector != -1)
2969                 return -EEXIST;
2970
2971         vcpu->arch.pending_external_vector = irq->irq;
2972         kvm_make_request(KVM_REQ_EVENT, vcpu);
2973         return 0;
2974 }
2975
2976 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2977 {
2978         kvm_inject_nmi(vcpu);
2979
2980         return 0;
2981 }
2982
2983 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
2984 {
2985         kvm_make_request(KVM_REQ_SMI, vcpu);
2986
2987         return 0;
2988 }
2989
2990 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2991                                            struct kvm_tpr_access_ctl *tac)
2992 {
2993         if (tac->flags)
2994                 return -EINVAL;
2995         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2996         return 0;
2997 }
2998
2999 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
3000                                         u64 mcg_cap)
3001 {
3002         int r;
3003         unsigned bank_num = mcg_cap & 0xff, bank;
3004
3005         r = -EINVAL;
3006         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
3007                 goto out;
3008         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
3009                 goto out;
3010         r = 0;
3011         vcpu->arch.mcg_cap = mcg_cap;
3012         /* Init IA32_MCG_CTL to all 1s */
3013         if (mcg_cap & MCG_CTL_P)
3014                 vcpu->arch.mcg_ctl = ~(u64)0;
3015         /* Init IA32_MCi_CTL to all 1s */
3016         for (bank = 0; bank < bank_num; bank++)
3017                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3018
3019         if (kvm_x86_ops->setup_mce)
3020                 kvm_x86_ops->setup_mce(vcpu);
3021 out:
3022         return r;
3023 }
3024
3025 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3026                                       struct kvm_x86_mce *mce)
3027 {
3028         u64 mcg_cap = vcpu->arch.mcg_cap;
3029         unsigned bank_num = mcg_cap & 0xff;
3030         u64 *banks = vcpu->arch.mce_banks;
3031
3032         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3033                 return -EINVAL;
3034         /*
3035          * if IA32_MCG_CTL is not all 1s, the uncorrected error
3036          * reporting is disabled
3037          */
3038         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3039             vcpu->arch.mcg_ctl != ~(u64)0)
3040                 return 0;
3041         banks += 4 * mce->bank;
3042         /*
3043          * if IA32_MCi_CTL is not all 1s, the uncorrected error
3044          * reporting is disabled for the bank
3045          */
3046         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3047                 return 0;
3048         if (mce->status & MCI_STATUS_UC) {
3049                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3050                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3051                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3052                         return 0;
3053                 }
3054                 if (banks[1] & MCI_STATUS_VAL)
3055                         mce->status |= MCI_STATUS_OVER;
3056                 banks[2] = mce->addr;
3057                 banks[3] = mce->misc;
3058                 vcpu->arch.mcg_status = mce->mcg_status;
3059                 banks[1] = mce->status;
3060                 kvm_queue_exception(vcpu, MC_VECTOR);
3061         } else if (!(banks[1] & MCI_STATUS_VAL)
3062                    || !(banks[1] & MCI_STATUS_UC)) {
3063                 if (banks[1] & MCI_STATUS_VAL)
3064                         mce->status |= MCI_STATUS_OVER;
3065                 banks[2] = mce->addr;
3066                 banks[3] = mce->misc;
3067                 banks[1] = mce->status;
3068         } else
3069                 banks[1] |= MCI_STATUS_OVER;
3070         return 0;
3071 }
3072
3073 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3074                                                struct kvm_vcpu_events *events)
3075 {
3076         process_nmi(vcpu);
3077         events->exception.injected =
3078                 vcpu->arch.exception.pending &&
3079                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
3080         events->exception.nr = vcpu->arch.exception.nr;
3081         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3082         events->exception.pad = 0;
3083         events->exception.error_code = vcpu->arch.exception.error_code;
3084
3085         events->interrupt.injected =
3086                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
3087         events->interrupt.nr = vcpu->arch.interrupt.nr;
3088         events->interrupt.soft = 0;
3089         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3090
3091         events->nmi.injected = vcpu->arch.nmi_injected;
3092         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3093         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3094         events->nmi.pad = 0;
3095
3096         events->sipi_vector = 0; /* never valid when reporting to user space */
3097
3098         events->smi.smm = is_smm(vcpu);
3099         events->smi.pending = vcpu->arch.smi_pending;
3100         events->smi.smm_inside_nmi =
3101                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3102         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3103
3104         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3105                          | KVM_VCPUEVENT_VALID_SHADOW
3106                          | KVM_VCPUEVENT_VALID_SMM);
3107         memset(&events->reserved, 0, sizeof(events->reserved));
3108 }
3109
3110 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags);
3111
3112 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3113                                               struct kvm_vcpu_events *events)
3114 {
3115         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3116                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3117                               | KVM_VCPUEVENT_VALID_SHADOW
3118                               | KVM_VCPUEVENT_VALID_SMM))
3119                 return -EINVAL;
3120
3121         if (events->exception.injected &&
3122             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR ||
3123              is_guest_mode(vcpu)))
3124                 return -EINVAL;
3125
3126         /* INITs are latched while in SMM */
3127         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
3128             (events->smi.smm || events->smi.pending) &&
3129             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
3130                 return -EINVAL;
3131
3132         process_nmi(vcpu);
3133         vcpu->arch.exception.pending = events->exception.injected;
3134         vcpu->arch.exception.nr = events->exception.nr;
3135         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3136         vcpu->arch.exception.error_code = events->exception.error_code;
3137
3138         vcpu->arch.interrupt.pending = events->interrupt.injected;
3139         vcpu->arch.interrupt.nr = events->interrupt.nr;
3140         vcpu->arch.interrupt.soft = events->interrupt.soft;
3141         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3142                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3143                                                   events->interrupt.shadow);
3144
3145         vcpu->arch.nmi_injected = events->nmi.injected;
3146         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3147                 vcpu->arch.nmi_pending = events->nmi.pending;
3148         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3149
3150         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3151             lapic_in_kernel(vcpu))
3152                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3153
3154         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3155                 u32 hflags = vcpu->arch.hflags;
3156                 if (events->smi.smm)
3157                         hflags |= HF_SMM_MASK;
3158                 else
3159                         hflags &= ~HF_SMM_MASK;
3160                 kvm_set_hflags(vcpu, hflags);
3161
3162                 vcpu->arch.smi_pending = events->smi.pending;
3163
3164                 if (events->smi.smm) {
3165                         if (events->smi.smm_inside_nmi)
3166                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3167                         else
3168                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3169                         if (lapic_in_kernel(vcpu)) {
3170                                 if (events->smi.latched_init)
3171                                         set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3172                                 else
3173                                         clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3174                         }
3175                 }
3176         }
3177
3178         kvm_make_request(KVM_REQ_EVENT, vcpu);
3179
3180         return 0;
3181 }
3182
3183 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3184                                              struct kvm_debugregs *dbgregs)
3185 {
3186         unsigned long val;
3187
3188         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3189         kvm_get_dr(vcpu, 6, &val);
3190         dbgregs->dr6 = val;
3191         dbgregs->dr7 = vcpu->arch.dr7;
3192         dbgregs->flags = 0;
3193         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3194 }
3195
3196 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3197                                             struct kvm_debugregs *dbgregs)
3198 {
3199         if (dbgregs->flags)
3200                 return -EINVAL;
3201
3202         if (dbgregs->dr6 & ~0xffffffffull)
3203                 return -EINVAL;
3204         if (dbgregs->dr7 & ~0xffffffffull)
3205                 return -EINVAL;
3206
3207         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3208         kvm_update_dr0123(vcpu);
3209         vcpu->arch.dr6 = dbgregs->dr6;
3210         kvm_update_dr6(vcpu);
3211         vcpu->arch.dr7 = dbgregs->dr7;
3212         kvm_update_dr7(vcpu);
3213
3214         return 0;
3215 }
3216
3217 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3218
3219 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3220 {
3221         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3222         u64 xstate_bv = xsave->header.xfeatures;
3223         u64 valid;
3224
3225         /*
3226          * Copy legacy XSAVE area, to avoid complications with CPUID
3227          * leaves 0 and 1 in the loop below.
3228          */
3229         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3230
3231         /* Set XSTATE_BV */
3232         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
3233         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3234
3235         /*
3236          * Copy each region from the possibly compacted offset to the
3237          * non-compacted offset.
3238          */
3239         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3240         while (valid) {
3241                 u64 feature = valid & -valid;
3242                 int index = fls64(feature) - 1;
3243                 void *src = get_xsave_addr(xsave, feature);
3244
3245                 if (src) {
3246                         u32 size, offset, ecx, edx;
3247                         cpuid_count(XSTATE_CPUID, index,
3248                                     &size, &offset, &ecx, &edx);
3249                         if (feature == XFEATURE_MASK_PKRU)
3250                                 memcpy(dest + offset, &vcpu->arch.pkru,
3251                                        sizeof(vcpu->arch.pkru));
3252                         else
3253                                 memcpy(dest + offset, src, size);
3254
3255                 }
3256
3257                 valid -= feature;
3258         }
3259 }
3260
3261 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3262 {
3263         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3264         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3265         u64 valid;
3266
3267         /*
3268          * Copy legacy XSAVE area, to avoid complications with CPUID
3269          * leaves 0 and 1 in the loop below.
3270          */
3271         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3272
3273         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3274         xsave->header.xfeatures = xstate_bv;
3275         if (boot_cpu_has(X86_FEATURE_XSAVES))
3276                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3277
3278         /*
3279          * Copy each region from the non-compacted offset to the
3280          * possibly compacted offset.
3281          */
3282         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3283         while (valid) {
3284                 u64 feature = valid & -valid;
3285                 int index = fls64(feature) - 1;
3286                 void *dest = get_xsave_addr(xsave, feature);
3287
3288                 if (dest) {
3289                         u32 size, offset, ecx, edx;
3290                         cpuid_count(XSTATE_CPUID, index,
3291                                     &size, &offset, &ecx, &edx);
3292                         if (feature == XFEATURE_MASK_PKRU)
3293                                 memcpy(&vcpu->arch.pkru, src + offset,
3294                                        sizeof(vcpu->arch.pkru));
3295                         else
3296                                 memcpy(dest, src + offset, size);
3297                 }
3298
3299                 valid -= feature;
3300         }
3301 }
3302
3303 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3304                                          struct kvm_xsave *guest_xsave)
3305 {
3306         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3307                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3308                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3309         } else {
3310                 memcpy(guest_xsave->region,
3311                         &vcpu->arch.guest_fpu.state.fxsave,
3312                         sizeof(struct fxregs_state));
3313                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3314                         XFEATURE_MASK_FPSSE;
3315         }
3316 }
3317
3318 #define XSAVE_MXCSR_OFFSET 24
3319
3320 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3321                                         struct kvm_xsave *guest_xsave)
3322 {
3323         u64 xstate_bv =
3324                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3325         u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
3326
3327         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3328                 /*
3329                  * Here we allow setting states that are not present in
3330                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3331                  * with old userspace.
3332                  */
3333                 if (xstate_bv & ~kvm_supported_xcr0() ||
3334                         mxcsr & ~mxcsr_feature_mask)
3335                         return -EINVAL;
3336                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3337         } else {
3338                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
3339                         mxcsr & ~mxcsr_feature_mask)
3340                         return -EINVAL;
3341                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3342                         guest_xsave->region, sizeof(struct fxregs_state));
3343         }
3344         return 0;
3345 }
3346
3347 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3348                                         struct kvm_xcrs *guest_xcrs)
3349 {
3350         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3351                 guest_xcrs->nr_xcrs = 0;
3352                 return;
3353         }
3354
3355         guest_xcrs->nr_xcrs = 1;
3356         guest_xcrs->flags = 0;
3357         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3358         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3359 }
3360
3361 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3362                                        struct kvm_xcrs *guest_xcrs)
3363 {
3364         int i, r = 0;
3365
3366         if (!boot_cpu_has(X86_FEATURE_XSAVE))
3367                 return -EINVAL;
3368
3369         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3370                 return -EINVAL;
3371
3372         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3373                 /* Only support XCR0 currently */
3374                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3375                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3376                                 guest_xcrs->xcrs[i].value);
3377                         break;
3378                 }
3379         if (r)
3380                 r = -EINVAL;
3381         return r;
3382 }
3383
3384 /*
3385  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3386  * stopped by the hypervisor.  This function will be called from the host only.
3387  * EINVAL is returned when the host attempts to set the flag for a guest that
3388  * does not support pv clocks.
3389  */
3390 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3391 {
3392         if (!vcpu->arch.pv_time_enabled)
3393                 return -EINVAL;
3394         vcpu->arch.pvclock_set_guest_stopped_request = true;
3395         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3396         return 0;
3397 }
3398
3399 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
3400                                      struct kvm_enable_cap *cap)
3401 {
3402         if (cap->flags)
3403                 return -EINVAL;
3404
3405         switch (cap->cap) {
3406         case KVM_CAP_HYPERV_SYNIC2:
3407                 if (cap->args[0])
3408                         return -EINVAL;
3409         case KVM_CAP_HYPERV_SYNIC:
3410                 if (!irqchip_in_kernel(vcpu->kvm))
3411                         return -EINVAL;
3412                 return kvm_hv_activate_synic(vcpu, cap->cap ==
3413                                              KVM_CAP_HYPERV_SYNIC2);
3414         default:
3415                 return -EINVAL;
3416         }
3417 }
3418
3419 long kvm_arch_vcpu_ioctl(struct file *filp,
3420                          unsigned int ioctl, unsigned long arg)
3421 {
3422         struct kvm_vcpu *vcpu = filp->private_data;
3423         void __user *argp = (void __user *)arg;
3424         int r;
3425         union {
3426                 struct kvm_lapic_state *lapic;
3427                 struct kvm_xsave *xsave;
3428                 struct kvm_xcrs *xcrs;
3429                 void *buffer;
3430         } u;
3431
3432         u.buffer = NULL;
3433         switch (ioctl) {
3434         case KVM_GET_LAPIC: {
3435                 r = -EINVAL;
3436                 if (!lapic_in_kernel(vcpu))
3437                         goto out;
3438                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3439
3440                 r = -ENOMEM;
3441                 if (!u.lapic)
3442                         goto out;
3443                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3444                 if (r)
3445                         goto out;
3446                 r = -EFAULT;
3447                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3448                         goto out;
3449                 r = 0;
3450                 break;
3451         }
3452         case KVM_SET_LAPIC: {
3453                 r = -EINVAL;
3454                 if (!lapic_in_kernel(vcpu))
3455                         goto out;
3456                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3457                 if (IS_ERR(u.lapic))
3458                         return PTR_ERR(u.lapic);
3459
3460                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3461                 break;
3462         }
3463         case KVM_INTERRUPT: {
3464                 struct kvm_interrupt irq;
3465
3466                 r = -EFAULT;
3467                 if (copy_from_user(&irq, argp, sizeof irq))
3468                         goto out;
3469                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3470                 break;
3471         }
3472         case KVM_NMI: {
3473                 r = kvm_vcpu_ioctl_nmi(vcpu);
3474                 break;
3475         }
3476         case KVM_SMI: {
3477                 r = kvm_vcpu_ioctl_smi(vcpu);
3478                 break;
3479         }
3480         case KVM_SET_CPUID: {
3481                 struct kvm_cpuid __user *cpuid_arg = argp;
3482                 struct kvm_cpuid cpuid;
3483
3484                 r = -EFAULT;
3485                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3486                         goto out;
3487                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3488                 break;
3489         }
3490         case KVM_SET_CPUID2: {
3491                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3492                 struct kvm_cpuid2 cpuid;
3493
3494                 r = -EFAULT;
3495                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3496                         goto out;
3497                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3498                                               cpuid_arg->entries);
3499                 break;
3500         }
3501         case KVM_GET_CPUID2: {
3502                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3503                 struct kvm_cpuid2 cpuid;
3504
3505                 r = -EFAULT;
3506                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3507                         goto out;
3508                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3509                                               cpuid_arg->entries);
3510                 if (r)
3511                         goto out;
3512                 r = -EFAULT;
3513                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3514                         goto out;
3515                 r = 0;
3516                 break;
3517         }
3518         case KVM_GET_MSRS:
3519                 r = msr_io(vcpu, argp, do_get_msr, 1);
3520                 break;
3521         case KVM_SET_MSRS:
3522                 r = msr_io(vcpu, argp, do_set_msr, 0);
3523                 break;
3524         case KVM_TPR_ACCESS_REPORTING: {
3525                 struct kvm_tpr_access_ctl tac;
3526
3527                 r = -EFAULT;
3528                 if (copy_from_user(&tac, argp, sizeof tac))
3529                         goto out;
3530                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3531                 if (r)
3532                         goto out;
3533                 r = -EFAULT;
3534                 if (copy_to_user(argp, &tac, sizeof tac))
3535                         goto out;
3536                 r = 0;
3537                 break;
3538         };
3539         case KVM_SET_VAPIC_ADDR: {
3540                 struct kvm_vapic_addr va;
3541                 int idx;
3542
3543                 r = -EINVAL;
3544                 if (!lapic_in_kernel(vcpu))
3545                         goto out;
3546                 r = -EFAULT;
3547                 if (copy_from_user(&va, argp, sizeof va))
3548                         goto out;
3549                 idx = srcu_read_lock(&vcpu->kvm->srcu);
3550                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3551                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3552                 break;
3553         }
3554         case KVM_X86_SETUP_MCE: {
3555                 u64 mcg_cap;
3556
3557                 r = -EFAULT;
3558                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3559                         goto out;
3560                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3561                 break;
3562         }
3563         case KVM_X86_SET_MCE: {
3564                 struct kvm_x86_mce mce;
3565
3566                 r = -EFAULT;
3567                 if (copy_from_user(&mce, argp, sizeof mce))
3568                         goto out;
3569                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3570                 break;
3571         }
3572         case KVM_GET_VCPU_EVENTS: {
3573                 struct kvm_vcpu_events events;
3574
3575                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3576
3577                 r = -EFAULT;
3578                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3579                         break;
3580                 r = 0;
3581                 break;
3582         }
3583         case KVM_SET_VCPU_EVENTS: {
3584                 struct kvm_vcpu_events events;
3585
3586                 r = -EFAULT;
3587                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3588                         break;
3589
3590                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3591                 break;
3592         }
3593         case KVM_GET_DEBUGREGS: {
3594                 struct kvm_debugregs dbgregs;
3595
3596                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3597
3598                 r = -EFAULT;
3599                 if (copy_to_user(argp, &dbgregs,
3600                                  sizeof(struct kvm_debugregs)))
3601                         break;
3602                 r = 0;
3603                 break;
3604         }
3605         case KVM_SET_DEBUGREGS: {
3606                 struct kvm_debugregs dbgregs;
3607
3608                 r = -EFAULT;
3609                 if (copy_from_user(&dbgregs, argp,
3610                                    sizeof(struct kvm_debugregs)))
3611                         break;
3612
3613                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3614                 break;
3615         }
3616         case KVM_GET_XSAVE: {
3617                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3618                 r = -ENOMEM;
3619                 if (!u.xsave)
3620                         break;
3621
3622                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3623
3624                 r = -EFAULT;
3625                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3626                         break;
3627                 r = 0;
3628                 break;
3629         }
3630         case KVM_SET_XSAVE: {
3631                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3632                 if (IS_ERR(u.xsave))
3633                         return PTR_ERR(u.xsave);
3634
3635                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3636                 break;
3637         }
3638         case KVM_GET_XCRS: {
3639                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3640                 r = -ENOMEM;
3641                 if (!u.xcrs)
3642                         break;
3643
3644                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3645
3646                 r = -EFAULT;
3647                 if (copy_to_user(argp, u.xcrs,
3648                                  sizeof(struct kvm_xcrs)))
3649                         break;
3650                 r = 0;
3651                 break;
3652         }
3653         case KVM_SET_XCRS: {
3654                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3655                 if (IS_ERR(u.xcrs))
3656                         return PTR_ERR(u.xcrs);
3657
3658                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3659                 break;
3660         }
3661         case KVM_SET_TSC_KHZ: {
3662                 u32 user_tsc_khz;
3663
3664                 r = -EINVAL;
3665                 user_tsc_khz = (u32)arg;
3666
3667                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3668                         goto out;
3669
3670                 if (user_tsc_khz == 0)
3671                         user_tsc_khz = tsc_khz;
3672
3673                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
3674                         r = 0;
3675
3676                 goto out;
3677         }
3678         case KVM_GET_TSC_KHZ: {
3679                 r = vcpu->arch.virtual_tsc_khz;
3680                 goto out;
3681         }
3682         case KVM_KVMCLOCK_CTRL: {
3683                 r = kvm_set_guest_paused(vcpu);
3684                 goto out;
3685         }
3686         case KVM_ENABLE_CAP: {
3687                 struct kvm_enable_cap cap;
3688
3689                 r = -EFAULT;
3690                 if (copy_from_user(&cap, argp, sizeof(cap)))
3691                         goto out;
3692                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
3693                 break;
3694         }
3695         default:
3696                 r = -EINVAL;
3697         }
3698 out:
3699         kfree(u.buffer);
3700         return r;
3701 }
3702
3703 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3704 {
3705         return VM_FAULT_SIGBUS;
3706 }
3707
3708 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3709 {
3710         int ret;
3711
3712         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3713                 return -EINVAL;
3714         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3715         return ret;
3716 }
3717
3718 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3719                                               u64 ident_addr)
3720 {
3721         kvm->arch.ept_identity_map_addr = ident_addr;
3722         return 0;
3723 }
3724
3725 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3726                                           u32 kvm_nr_mmu_pages)
3727 {
3728         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3729                 return -EINVAL;
3730
3731         mutex_lock(&kvm->slots_lock);
3732
3733         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3734         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3735
3736         mutex_unlock(&kvm->slots_lock);
3737         return 0;
3738 }
3739
3740 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3741 {
3742         return kvm->arch.n_max_mmu_pages;
3743 }
3744
3745 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3746 {
3747         struct kvm_pic *pic = kvm->arch.vpic;
3748         int r;
3749
3750         r = 0;
3751         switch (chip->chip_id) {
3752         case KVM_IRQCHIP_PIC_MASTER:
3753                 memcpy(&chip->chip.pic, &pic->pics[0],
3754                         sizeof(struct kvm_pic_state));
3755                 break;
3756         case KVM_IRQCHIP_PIC_SLAVE:
3757                 memcpy(&chip->chip.pic, &pic->pics[1],
3758                         sizeof(struct kvm_pic_state));
3759                 break;
3760         case KVM_IRQCHIP_IOAPIC:
3761                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
3762                 break;
3763         default:
3764                 r = -EINVAL;
3765                 break;
3766         }
3767         return r;
3768 }
3769
3770 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3771 {
3772         struct kvm_pic *pic = kvm->arch.vpic;
3773         int r;
3774
3775         r = 0;
3776         switch (chip->chip_id) {
3777         case KVM_IRQCHIP_PIC_MASTER:
3778                 spin_lock(&pic->lock);
3779                 memcpy(&pic->pics[0], &chip->chip.pic,
3780                         sizeof(struct kvm_pic_state));
3781                 spin_unlock(&pic->lock);
3782                 break;
3783         case KVM_IRQCHIP_PIC_SLAVE:
3784                 spin_lock(&pic->lock);
3785                 memcpy(&pic->pics[1], &chip->chip.pic,
3786                         sizeof(struct kvm_pic_state));
3787                 spin_unlock(&pic->lock);
3788                 break;
3789         case KVM_IRQCHIP_IOAPIC:
3790                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
3791                 break;
3792         default:
3793                 r = -EINVAL;
3794                 break;
3795         }
3796         kvm_pic_update_irq(pic);
3797         return r;
3798 }
3799
3800 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3801 {
3802         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
3803
3804         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
3805
3806         mutex_lock(&kps->lock);
3807         memcpy(ps, &kps->channels, sizeof(*ps));
3808         mutex_unlock(&kps->lock);
3809         return 0;
3810 }
3811
3812 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3813 {
3814         int i;
3815         struct kvm_pit *pit = kvm->arch.vpit;
3816
3817         mutex_lock(&pit->pit_state.lock);
3818         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
3819         for (i = 0; i < 3; i++)
3820                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
3821         mutex_unlock(&pit->pit_state.lock);
3822         return 0;
3823 }
3824
3825 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3826 {
3827         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3828         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3829                 sizeof(ps->channels));
3830         ps->flags = kvm->arch.vpit->pit_state.flags;
3831         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3832         memset(&ps->reserved, 0, sizeof(ps->reserved));
3833         return 0;
3834 }
3835
3836 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3837 {
3838         int start = 0;
3839         int i;
3840         u32 prev_legacy, cur_legacy;
3841         struct kvm_pit *pit = kvm->arch.vpit;
3842
3843         mutex_lock(&pit->pit_state.lock);
3844         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3845         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3846         if (!prev_legacy && cur_legacy)
3847                 start = 1;
3848         memcpy(&pit->pit_state.channels, &ps->channels,
3849                sizeof(pit->pit_state.channels));
3850         pit->pit_state.flags = ps->flags;
3851         for (i = 0; i < 3; i++)
3852                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
3853                                    start && i == 0);
3854         mutex_unlock(&pit->pit_state.lock);
3855         return 0;
3856 }
3857
3858 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3859                                  struct kvm_reinject_control *control)
3860 {
3861         struct kvm_pit *pit = kvm->arch.vpit;
3862
3863         if (!pit)
3864                 return -ENXIO;
3865
3866         /* pit->pit_state.lock was overloaded to prevent userspace from getting
3867          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
3868          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
3869          */
3870         mutex_lock(&pit->pit_state.lock);
3871         kvm_pit_set_reinject(pit, control->pit_reinject);
3872         mutex_unlock(&pit->pit_state.lock);
3873
3874         return 0;
3875 }
3876
3877 /**
3878  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3879  * @kvm: kvm instance
3880  * @log: slot id and address to which we copy the log
3881  *
3882  * Steps 1-4 below provide general overview of dirty page logging. See
3883  * kvm_get_dirty_log_protect() function description for additional details.
3884  *
3885  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3886  * always flush the TLB (step 4) even if previous step failed  and the dirty
3887  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3888  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3889  * writes will be marked dirty for next log read.
3890  *
3891  *   1. Take a snapshot of the bit and clear it if needed.
3892  *   2. Write protect the corresponding page.
3893  *   3. Copy the snapshot to the userspace.
3894  *   4. Flush TLB's if needed.
3895  */
3896 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3897 {
3898         bool is_dirty = false;
3899         int r;
3900
3901         mutex_lock(&kvm->slots_lock);
3902
3903         /*
3904          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3905          */
3906         if (kvm_x86_ops->flush_log_dirty)
3907                 kvm_x86_ops->flush_log_dirty(kvm);
3908
3909         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3910
3911         /*
3912          * All the TLBs can be flushed out of mmu lock, see the comments in
3913          * kvm_mmu_slot_remove_write_access().
3914          */
3915         lockdep_assert_held(&kvm->slots_lock);
3916         if (is_dirty)
3917                 kvm_flush_remote_tlbs(kvm);
3918
3919         mutex_unlock(&kvm->slots_lock);
3920         return r;
3921 }
3922
3923 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3924                         bool line_status)
3925 {
3926         if (!irqchip_in_kernel(kvm))
3927                 return -ENXIO;
3928
3929         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3930                                         irq_event->irq, irq_event->level,
3931                                         line_status);
3932         return 0;
3933 }
3934
3935 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
3936                                    struct kvm_enable_cap *cap)
3937 {
3938         int r;
3939
3940         if (cap->flags)
3941                 return -EINVAL;
3942
3943         switch (cap->cap) {
3944         case KVM_CAP_DISABLE_QUIRKS:
3945                 kvm->arch.disabled_quirks = cap->args[0];
3946                 r = 0;
3947                 break;
3948         case KVM_CAP_SPLIT_IRQCHIP: {
3949                 mutex_lock(&kvm->lock);
3950                 r = -EINVAL;
3951                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
3952                         goto split_irqchip_unlock;
3953                 r = -EEXIST;
3954                 if (irqchip_in_kernel(kvm))
3955                         goto split_irqchip_unlock;
3956                 if (kvm->created_vcpus)
3957                         goto split_irqchip_unlock;
3958                 r = kvm_setup_empty_irq_routing(kvm);
3959                 if (r)
3960                         goto split_irqchip_unlock;
3961                 /* Pairs with irqchip_in_kernel. */
3962                 smp_wmb();
3963                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
3964                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
3965                 r = 0;
3966 split_irqchip_unlock:
3967                 mutex_unlock(&kvm->lock);
3968                 break;
3969         }
3970         case KVM_CAP_X2APIC_API:
3971                 r = -EINVAL;
3972                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
3973                         break;
3974
3975                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
3976                         kvm->arch.x2apic_format = true;
3977                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
3978                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
3979
3980                 r = 0;
3981                 break;
3982         default:
3983                 r = -EINVAL;
3984                 break;
3985         }
3986         return r;
3987 }
3988
3989 long kvm_arch_vm_ioctl(struct file *filp,
3990                        unsigned int ioctl, unsigned long arg)
3991 {
3992         struct kvm *kvm = filp->private_data;
3993         void __user *argp = (void __user *)arg;
3994         int r = -ENOTTY;
3995         /*
3996          * This union makes it completely explicit to gcc-3.x
3997          * that these two variables' stack usage should be
3998          * combined, not added together.
3999          */
4000         union {
4001                 struct kvm_pit_state ps;
4002                 struct kvm_pit_state2 ps2;
4003                 struct kvm_pit_config pit_config;
4004         } u;
4005
4006         switch (ioctl) {
4007         case KVM_SET_TSS_ADDR:
4008                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
4009                 break;
4010         case KVM_SET_IDENTITY_MAP_ADDR: {
4011                 u64 ident_addr;
4012
4013                 r = -EFAULT;
4014                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
4015                         goto out;
4016                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
4017                 break;
4018         }
4019         case KVM_SET_NR_MMU_PAGES:
4020                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
4021                 break;
4022         case KVM_GET_NR_MMU_PAGES:
4023                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
4024                 break;
4025         case KVM_CREATE_IRQCHIP: {
4026                 mutex_lock(&kvm->lock);
4027
4028                 r = -EEXIST;
4029                 if (irqchip_in_kernel(kvm))
4030                         goto create_irqchip_unlock;
4031
4032                 r = -EINVAL;
4033                 if (kvm->created_vcpus)
4034                         goto create_irqchip_unlock;
4035
4036                 r = kvm_pic_init(kvm);
4037                 if (r)
4038                         goto create_irqchip_unlock;
4039
4040                 r = kvm_ioapic_init(kvm);
4041                 if (r) {
4042                         kvm_pic_destroy(kvm);
4043                         goto create_irqchip_unlock;
4044                 }
4045
4046                 r = kvm_setup_default_irq_routing(kvm);
4047                 if (r) {
4048                         kvm_ioapic_destroy(kvm);
4049                         kvm_pic_destroy(kvm);
4050                         goto create_irqchip_unlock;
4051                 }
4052                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4053                 smp_wmb();
4054                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
4055         create_irqchip_unlock:
4056                 mutex_unlock(&kvm->lock);
4057                 break;
4058         }
4059         case KVM_CREATE_PIT:
4060                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
4061                 goto create_pit;
4062         case KVM_CREATE_PIT2:
4063                 r = -EFAULT;
4064                 if (copy_from_user(&u.pit_config, argp,
4065                                    sizeof(struct kvm_pit_config)))
4066                         goto out;
4067         create_pit:
4068                 mutex_lock(&kvm->lock);
4069                 r = -EEXIST;
4070                 if (kvm->arch.vpit)
4071                         goto create_pit_unlock;
4072                 r = -ENOMEM;
4073                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
4074                 if (kvm->arch.vpit)
4075                         r = 0;
4076         create_pit_unlock:
4077                 mutex_unlock(&kvm->lock);
4078                 break;
4079         case KVM_GET_IRQCHIP: {
4080                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4081                 struct kvm_irqchip *chip;
4082
4083                 chip = memdup_user(argp, sizeof(*chip));
4084                 if (IS_ERR(chip)) {
4085                         r = PTR_ERR(chip);
4086                         goto out;
4087                 }
4088
4089                 r = -ENXIO;
4090                 if (!irqchip_kernel(kvm))
4091                         goto get_irqchip_out;
4092                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
4093                 if (r)
4094                         goto get_irqchip_out;
4095                 r = -EFAULT;
4096                 if (copy_to_user(argp, chip, sizeof *chip))
4097                         goto get_irqchip_out;
4098                 r = 0;
4099         get_irqchip_out:
4100                 kfree(chip);
4101                 break;
4102         }
4103         case KVM_SET_IRQCHIP: {
4104                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4105                 struct kvm_irqchip *chip;
4106
4107                 chip = memdup_user(argp, sizeof(*chip));
4108                 if (IS_ERR(chip)) {
4109                         r = PTR_ERR(chip);
4110                         goto out;
4111                 }
4112
4113                 r = -ENXIO;
4114                 if (!irqchip_kernel(kvm))
4115                         goto set_irqchip_out;
4116                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4117                 if (r)
4118                         goto set_irqchip_out;
4119                 r = 0;
4120         set_irqchip_out:
4121                 kfree(chip);
4122                 break;
4123         }
4124         case KVM_GET_PIT: {
4125                 r = -EFAULT;
4126                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4127                         goto out;
4128                 r = -ENXIO;
4129                 if (!kvm->arch.vpit)
4130                         goto out;
4131                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4132                 if (r)
4133                         goto out;
4134                 r = -EFAULT;
4135                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4136                         goto out;
4137                 r = 0;
4138                 break;
4139         }
4140         case KVM_SET_PIT: {
4141                 r = -EFAULT;
4142                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
4143                         goto out;
4144                 r = -ENXIO;
4145                 if (!kvm->arch.vpit)
4146                         goto out;
4147                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4148                 break;
4149         }
4150         case KVM_GET_PIT2: {
4151                 r = -ENXIO;
4152                 if (!kvm->arch.vpit)
4153                         goto out;
4154                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4155                 if (r)
4156                         goto out;
4157                 r = -EFAULT;
4158                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4159                         goto out;
4160                 r = 0;
4161                 break;
4162         }
4163         case KVM_SET_PIT2: {
4164                 r = -EFAULT;
4165                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4166                         goto out;
4167                 r = -ENXIO;
4168                 if (!kvm->arch.vpit)
4169                         goto out;
4170                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4171                 break;
4172         }
4173         case KVM_REINJECT_CONTROL: {
4174                 struct kvm_reinject_control control;
4175                 r =  -EFAULT;
4176                 if (copy_from_user(&control, argp, sizeof(control)))
4177                         goto out;
4178                 r = kvm_vm_ioctl_reinject(kvm, &control);
4179                 break;
4180         }
4181         case KVM_SET_BOOT_CPU_ID:
4182                 r = 0;
4183                 mutex_lock(&kvm->lock);
4184                 if (kvm->created_vcpus)
4185                         r = -EBUSY;
4186                 else
4187                         kvm->arch.bsp_vcpu_id = arg;
4188                 mutex_unlock(&kvm->lock);
4189                 break;
4190         case KVM_XEN_HVM_CONFIG: {
4191                 r = -EFAULT;
4192                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
4193                                    sizeof(struct kvm_xen_hvm_config)))
4194                         goto out;
4195                 r = -EINVAL;
4196                 if (kvm->arch.xen_hvm_config.flags)
4197                         goto out;
4198                 r = 0;
4199                 break;
4200         }
4201         case KVM_SET_CLOCK: {
4202                 struct kvm_clock_data user_ns;
4203                 u64 now_ns;
4204
4205                 r = -EFAULT;
4206                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4207                         goto out;
4208
4209                 r = -EINVAL;
4210                 if (user_ns.flags)
4211                         goto out;
4212
4213                 r = 0;
4214                 /*
4215                  * TODO: userspace has to take care of races with VCPU_RUN, so
4216                  * kvm_gen_update_masterclock() can be cut down to locked
4217                  * pvclock_update_vm_gtod_copy().
4218                  */
4219                 kvm_gen_update_masterclock(kvm);
4220                 now_ns = get_kvmclock_ns(kvm);
4221                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
4222                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
4223                 break;
4224         }
4225         case KVM_GET_CLOCK: {
4226                 struct kvm_clock_data user_ns;
4227                 u64 now_ns;
4228
4229                 now_ns = get_kvmclock_ns(kvm);
4230                 user_ns.clock = now_ns;
4231                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
4232                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4233
4234                 r = -EFAULT;
4235                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4236                         goto out;
4237                 r = 0;
4238                 break;
4239         }
4240         case KVM_ENABLE_CAP: {
4241                 struct kvm_enable_cap cap;
4242
4243                 r = -EFAULT;
4244                 if (copy_from_user(&cap, argp, sizeof(cap)))
4245                         goto out;
4246                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
4247                 break;
4248         }
4249         default:
4250                 r = -ENOTTY;
4251         }
4252 out:
4253         return r;
4254 }
4255
4256 static void kvm_init_msr_list(void)
4257 {
4258         u32 dummy[2];
4259         unsigned i, j;
4260
4261         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4262                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4263                         continue;
4264
4265                 /*
4266                  * Even MSRs that are valid in the host may not be exposed
4267                  * to the guests in some cases.
4268                  */
4269                 switch (msrs_to_save[i]) {
4270                 case MSR_IA32_BNDCFGS:
4271                         if (!kvm_x86_ops->mpx_supported())
4272                                 continue;
4273                         break;
4274                 case MSR_TSC_AUX:
4275                         if (!kvm_x86_ops->rdtscp_supported())
4276                                 continue;
4277                         break;
4278                 default:
4279                         break;
4280                 }
4281
4282                 if (j < i)
4283                         msrs_to_save[j] = msrs_to_save[i];
4284                 j++;
4285         }
4286         num_msrs_to_save = j;
4287
4288         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4289                 switch (emulated_msrs[i]) {
4290                 case MSR_IA32_SMBASE:
4291                         if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
4292                                 continue;
4293                         break;
4294                 default:
4295                         break;
4296                 }
4297
4298                 if (j < i)
4299                         emulated_msrs[j] = emulated_msrs[i];
4300                 j++;
4301         }
4302         num_emulated_msrs = j;
4303 }
4304
4305 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4306                            const void *v)
4307 {
4308         int handled = 0;
4309         int n;
4310
4311         do {
4312                 n = min(len, 8);
4313                 if (!(lapic_in_kernel(vcpu) &&
4314                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4315                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4316                         break;
4317                 handled += n;
4318                 addr += n;
4319                 len -= n;
4320                 v += n;
4321         } while (len);
4322
4323         return handled;
4324 }
4325
4326 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4327 {
4328         int handled = 0;
4329         int n;
4330
4331         do {
4332                 n = min(len, 8);
4333                 if (!(lapic_in_kernel(vcpu) &&
4334                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4335                                          addr, n, v))
4336                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4337                         break;
4338                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
4339                 handled += n;
4340                 addr += n;
4341                 len -= n;
4342                 v += n;
4343         } while (len);
4344
4345         return handled;
4346 }
4347
4348 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4349                         struct kvm_segment *var, int seg)
4350 {
4351         kvm_x86_ops->set_segment(vcpu, var, seg);
4352 }
4353
4354 void kvm_get_segment(struct kvm_vcpu *vcpu,
4355                      struct kvm_segment *var, int seg)
4356 {
4357         kvm_x86_ops->get_segment(vcpu, var, seg);
4358 }
4359
4360 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4361                            struct x86_exception *exception)
4362 {
4363         gpa_t t_gpa;
4364
4365         BUG_ON(!mmu_is_nested(vcpu));
4366
4367         /* NPT walks are always user-walks */
4368         access |= PFERR_USER_MASK;
4369         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4370
4371         return t_gpa;
4372 }
4373
4374 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4375                               struct x86_exception *exception)
4376 {
4377         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4378         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4379 }
4380
4381  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4382                                 struct x86_exception *exception)
4383 {
4384         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4385         access |= PFERR_FETCH_MASK;
4386         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4387 }
4388
4389 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4390                                struct x86_exception *exception)
4391 {
4392         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4393         access |= PFERR_WRITE_MASK;
4394         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4395 }
4396
4397 /* uses this to access any guest's mapped memory without checking CPL */
4398 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4399                                 struct x86_exception *exception)
4400 {
4401         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4402 }
4403
4404 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4405                                       struct kvm_vcpu *vcpu, u32 access,
4406                                       struct x86_exception *exception)
4407 {
4408         void *data = val;
4409         int r = X86EMUL_CONTINUE;
4410
4411         while (bytes) {
4412                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4413                                                             exception);
4414                 unsigned offset = addr & (PAGE_SIZE-1);
4415                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4416                 int ret;
4417
4418                 if (gpa == UNMAPPED_GVA)
4419                         return X86EMUL_PROPAGATE_FAULT;
4420                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4421                                                offset, toread);
4422                 if (ret < 0) {
4423                         r = X86EMUL_IO_NEEDED;
4424                         goto out;
4425                 }
4426
4427                 bytes -= toread;
4428                 data += toread;
4429                 addr += toread;
4430         }
4431 out:
4432         return r;
4433 }
4434
4435 /* used for instruction fetching */
4436 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4437                                 gva_t addr, void *val, unsigned int bytes,
4438                                 struct x86_exception *exception)
4439 {
4440         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4441         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4442         unsigned offset;
4443         int ret;
4444
4445         /* Inline kvm_read_guest_virt_helper for speed.  */
4446         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4447                                                     exception);
4448         if (unlikely(gpa == UNMAPPED_GVA))
4449                 return X86EMUL_PROPAGATE_FAULT;
4450
4451         offset = addr & (PAGE_SIZE-1);
4452         if (WARN_ON(offset + bytes > PAGE_SIZE))
4453                 bytes = (unsigned)PAGE_SIZE - offset;
4454         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4455                                        offset, bytes);
4456         if (unlikely(ret < 0))
4457                 return X86EMUL_IO_NEEDED;
4458
4459         return X86EMUL_CONTINUE;
4460 }
4461
4462 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4463                                gva_t addr, void *val, unsigned int bytes,
4464                                struct x86_exception *exception)
4465 {
4466         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4467         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4468
4469         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4470                                           exception);
4471 }
4472 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4473
4474 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4475                                       gva_t addr, void *val, unsigned int bytes,
4476                                       struct x86_exception *exception)
4477 {
4478         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4479         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4480 }
4481
4482 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
4483                 unsigned long addr, void *val, unsigned int bytes)
4484 {
4485         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4486         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
4487
4488         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
4489 }
4490
4491 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4492                                        gva_t addr, void *val,
4493                                        unsigned int bytes,
4494                                        struct x86_exception *exception)
4495 {
4496         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4497         void *data = val;
4498         int r = X86EMUL_CONTINUE;
4499
4500         while (bytes) {
4501                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4502                                                              PFERR_WRITE_MASK,
4503                                                              exception);
4504                 unsigned offset = addr & (PAGE_SIZE-1);
4505                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4506                 int ret;
4507
4508                 if (gpa == UNMAPPED_GVA)
4509                         return X86EMUL_PROPAGATE_FAULT;
4510                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4511                 if (ret < 0) {
4512                         r = X86EMUL_IO_NEEDED;
4513                         goto out;
4514                 }
4515
4516                 bytes -= towrite;
4517                 data += towrite;
4518                 addr += towrite;
4519         }
4520 out:
4521         return r;
4522 }
4523 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4524
4525 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4526                             gpa_t gpa, bool write)
4527 {
4528         /* For APIC access vmexit */
4529         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4530                 return 1;
4531
4532         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
4533                 trace_vcpu_match_mmio(gva, gpa, write, true);
4534                 return 1;
4535         }
4536
4537         return 0;
4538 }
4539
4540 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4541                                 gpa_t *gpa, struct x86_exception *exception,
4542                                 bool write)
4543 {
4544         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4545                 | (write ? PFERR_WRITE_MASK : 0);
4546
4547         /*
4548          * currently PKRU is only applied to ept enabled guest so
4549          * there is no pkey in EPT page table for L1 guest or EPT
4550          * shadow page table for L2 guest.
4551          */
4552         if (vcpu_match_mmio_gva(vcpu, gva)
4553             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4554                                  vcpu->arch.access, 0, access)) {
4555                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4556                                         (gva & (PAGE_SIZE - 1));
4557                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4558                 return 1;
4559         }
4560
4561         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4562
4563         if (*gpa == UNMAPPED_GVA)
4564                 return -1;
4565
4566         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
4567 }
4568
4569 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4570                         const void *val, int bytes)
4571 {
4572         int ret;
4573
4574         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4575         if (ret < 0)
4576                 return 0;
4577         kvm_page_track_write(vcpu, gpa, val, bytes);
4578         return 1;
4579 }
4580
4581 struct read_write_emulator_ops {
4582         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4583                                   int bytes);
4584         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4585                                   void *val, int bytes);
4586         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4587                                int bytes, void *val);
4588         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4589                                     void *val, int bytes);
4590         bool write;
4591 };
4592
4593 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4594 {
4595         if (vcpu->mmio_read_completed) {
4596                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4597                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4598                 vcpu->mmio_read_completed = 0;
4599                 return 1;
4600         }
4601
4602         return 0;
4603 }
4604
4605 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4606                         void *val, int bytes)
4607 {
4608         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4609 }
4610
4611 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4612                          void *val, int bytes)
4613 {
4614         return emulator_write_phys(vcpu, gpa, val, bytes);
4615 }
4616
4617 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4618 {
4619         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4620         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4621 }
4622
4623 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4624                           void *val, int bytes)
4625 {
4626         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4627         return X86EMUL_IO_NEEDED;
4628 }
4629
4630 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4631                            void *val, int bytes)
4632 {
4633         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4634
4635         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4636         return X86EMUL_CONTINUE;
4637 }
4638
4639 static const struct read_write_emulator_ops read_emultor = {
4640         .read_write_prepare = read_prepare,
4641         .read_write_emulate = read_emulate,
4642         .read_write_mmio = vcpu_mmio_read,
4643         .read_write_exit_mmio = read_exit_mmio,
4644 };
4645
4646 static const struct read_write_emulator_ops write_emultor = {
4647         .read_write_emulate = write_emulate,
4648         .read_write_mmio = write_mmio,
4649         .read_write_exit_mmio = write_exit_mmio,
4650         .write = true,
4651 };
4652
4653 static int emulator_read_write_onepage(unsigned long addr, void *val,
4654                                        unsigned int bytes,
4655                                        struct x86_exception *exception,
4656                                        struct kvm_vcpu *vcpu,
4657                                        const struct read_write_emulator_ops *ops)
4658 {
4659         gpa_t gpa;
4660         int handled, ret;
4661         bool write = ops->write;
4662         struct kvm_mmio_fragment *frag;
4663         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4664
4665         /*
4666          * If the exit was due to a NPF we may already have a GPA.
4667          * If the GPA is present, use it to avoid the GVA to GPA table walk.
4668          * Note, this cannot be used on string operations since string
4669          * operation using rep will only have the initial GPA from the NPF
4670          * occurred.
4671          */
4672         if (vcpu->arch.gpa_available &&
4673             emulator_can_use_gpa(ctxt) &&
4674             vcpu_is_mmio_gpa(vcpu, addr, exception->address, write) &&
4675             (addr & ~PAGE_MASK) == (exception->address & ~PAGE_MASK)) {
4676                 gpa = exception->address;
4677                 goto mmio;
4678         }
4679
4680         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4681
4682         if (ret < 0)
4683                 return X86EMUL_PROPAGATE_FAULT;
4684
4685         /* For APIC access vmexit */
4686         if (ret)
4687                 goto mmio;
4688
4689         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4690                 return X86EMUL_CONTINUE;
4691
4692 mmio:
4693         /*
4694          * Is this MMIO handled locally?
4695          */
4696         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4697         if (handled == bytes)
4698                 return X86EMUL_CONTINUE;
4699
4700         gpa += handled;
4701         bytes -= handled;
4702         val += handled;
4703
4704         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4705         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4706         frag->gpa = gpa;
4707         frag->data = val;
4708         frag->len = bytes;
4709         return X86EMUL_CONTINUE;
4710 }
4711
4712 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4713                         unsigned long addr,
4714                         void *val, unsigned int bytes,
4715                         struct x86_exception *exception,
4716                         const struct read_write_emulator_ops *ops)
4717 {
4718         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4719         gpa_t gpa;
4720         int rc;
4721
4722         if (ops->read_write_prepare &&
4723                   ops->read_write_prepare(vcpu, val, bytes))
4724                 return X86EMUL_CONTINUE;
4725
4726         vcpu->mmio_nr_fragments = 0;
4727
4728         /* Crossing a page boundary? */
4729         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4730                 int now;
4731
4732                 now = -addr & ~PAGE_MASK;
4733                 rc = emulator_read_write_onepage(addr, val, now, exception,
4734                                                  vcpu, ops);
4735
4736                 if (rc != X86EMUL_CONTINUE)
4737                         return rc;
4738                 addr += now;
4739                 if (ctxt->mode != X86EMUL_MODE_PROT64)
4740                         addr = (u32)addr;
4741                 val += now;
4742                 bytes -= now;
4743         }
4744
4745         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4746                                          vcpu, ops);
4747         if (rc != X86EMUL_CONTINUE)
4748                 return rc;
4749
4750         if (!vcpu->mmio_nr_fragments)
4751                 return rc;
4752
4753         gpa = vcpu->mmio_fragments[0].gpa;
4754
4755         vcpu->mmio_needed = 1;
4756         vcpu->mmio_cur_fragment = 0;
4757
4758         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4759         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4760         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4761         vcpu->run->mmio.phys_addr = gpa;
4762
4763         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4764 }
4765
4766 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4767                                   unsigned long addr,
4768                                   void *val,
4769                                   unsigned int bytes,
4770                                   struct x86_exception *exception)
4771 {
4772         return emulator_read_write(ctxt, addr, val, bytes,
4773                                    exception, &read_emultor);
4774 }
4775
4776 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4777                             unsigned long addr,
4778                             const void *val,
4779                             unsigned int bytes,
4780                             struct x86_exception *exception)
4781 {
4782         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4783                                    exception, &write_emultor);
4784 }
4785
4786 #define CMPXCHG_TYPE(t, ptr, old, new) \
4787         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4788
4789 #ifdef CONFIG_X86_64
4790 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4791 #else
4792 #  define CMPXCHG64(ptr, old, new) \
4793         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4794 #endif
4795
4796 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4797                                      unsigned long addr,
4798                                      const void *old,
4799                                      const void *new,
4800                                      unsigned int bytes,
4801                                      struct x86_exception *exception)
4802 {
4803         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4804         gpa_t gpa;
4805         struct page *page;
4806         char *kaddr;
4807         bool exchanged;
4808
4809         /* guests cmpxchg8b have to be emulated atomically */
4810         if (bytes > 8 || (bytes & (bytes - 1)))
4811                 goto emul_write;
4812
4813         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4814
4815         if (gpa == UNMAPPED_GVA ||
4816             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4817                 goto emul_write;
4818
4819         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4820                 goto emul_write;
4821
4822         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4823         if (is_error_page(page))
4824                 goto emul_write;
4825
4826         kaddr = kmap_atomic(page);
4827         kaddr += offset_in_page(gpa);
4828         switch (bytes) {
4829         case 1:
4830                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4831                 break;
4832         case 2:
4833                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4834                 break;
4835         case 4:
4836                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4837                 break;
4838         case 8:
4839                 exchanged = CMPXCHG64(kaddr, old, new);
4840                 break;
4841         default:
4842                 BUG();
4843         }
4844         kunmap_atomic(kaddr);
4845         kvm_release_page_dirty(page);
4846
4847         if (!exchanged)
4848                 return X86EMUL_CMPXCHG_FAILED;
4849
4850         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
4851         kvm_page_track_write(vcpu, gpa, new, bytes);
4852
4853         return X86EMUL_CONTINUE;
4854
4855 emul_write:
4856         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4857
4858         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4859 }
4860
4861 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4862 {
4863         int r = 0, i;
4864
4865         for (i = 0; i < vcpu->arch.pio.count; i++) {
4866                 if (vcpu->arch.pio.in)
4867                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4868                                             vcpu->arch.pio.size, pd);
4869                 else
4870                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4871                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
4872                                              pd);
4873                 if (r)
4874                         break;
4875                 pd += vcpu->arch.pio.size;
4876         }
4877         return r;
4878 }
4879
4880 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4881                                unsigned short port, void *val,
4882                                unsigned int count, bool in)
4883 {
4884         vcpu->arch.pio.port = port;
4885         vcpu->arch.pio.in = in;
4886         vcpu->arch.pio.count  = count;
4887         vcpu->arch.pio.size = size;
4888
4889         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4890                 vcpu->arch.pio.count = 0;
4891                 return 1;
4892         }
4893
4894         vcpu->run->exit_reason = KVM_EXIT_IO;
4895         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4896         vcpu->run->io.size = size;
4897         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4898         vcpu->run->io.count = count;
4899         vcpu->run->io.port = port;
4900
4901         return 0;
4902 }
4903
4904 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4905                                     int size, unsigned short port, void *val,
4906                                     unsigned int count)
4907 {
4908         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4909         int ret;
4910
4911         if (vcpu->arch.pio.count)
4912                 goto data_avail;
4913
4914         memset(vcpu->arch.pio_data, 0, size * count);
4915
4916         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4917         if (ret) {
4918 data_avail:
4919                 memcpy(val, vcpu->arch.pio_data, size * count);
4920                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4921                 vcpu->arch.pio.count = 0;
4922                 return 1;
4923         }
4924
4925         return 0;
4926 }
4927
4928 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4929                                      int size, unsigned short port,
4930                                      const void *val, unsigned int count)
4931 {
4932         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4933
4934         memcpy(vcpu->arch.pio_data, val, size * count);
4935         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4936         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4937 }
4938
4939 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4940 {
4941         return kvm_x86_ops->get_segment_base(vcpu, seg);
4942 }
4943
4944 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4945 {
4946         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4947 }
4948
4949 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4950 {
4951         if (!need_emulate_wbinvd(vcpu))
4952                 return X86EMUL_CONTINUE;
4953
4954         if (kvm_x86_ops->has_wbinvd_exit()) {
4955                 int cpu = get_cpu();
4956
4957                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4958                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4959                                 wbinvd_ipi, NULL, 1);
4960                 put_cpu();
4961                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4962         } else
4963                 wbinvd();
4964         return X86EMUL_CONTINUE;
4965 }
4966
4967 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4968 {
4969         kvm_emulate_wbinvd_noskip(vcpu);
4970         return kvm_skip_emulated_instruction(vcpu);
4971 }
4972 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4973
4974
4975
4976 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4977 {
4978         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
4979 }
4980
4981 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
4982                            unsigned long *dest)
4983 {
4984         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4985 }
4986
4987 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
4988                            unsigned long value)
4989 {
4990
4991         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4992 }
4993
4994 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4995 {
4996         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4997 }
4998
4999 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
5000 {
5001         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5002         unsigned long value;
5003
5004         switch (cr) {
5005         case 0:
5006                 value = kvm_read_cr0(vcpu);
5007                 break;
5008         case 2:
5009                 value = vcpu->arch.cr2;
5010                 break;
5011         case 3:
5012                 value = kvm_read_cr3(vcpu);
5013                 break;
5014         case 4:
5015                 value = kvm_read_cr4(vcpu);
5016                 break;
5017         case 8:
5018                 value = kvm_get_cr8(vcpu);
5019                 break;
5020         default:
5021                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5022                 return 0;
5023         }
5024
5025         return value;
5026 }
5027
5028 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
5029 {
5030         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5031         int res = 0;
5032
5033         switch (cr) {
5034         case 0:
5035                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
5036                 break;
5037         case 2:
5038                 vcpu->arch.cr2 = val;
5039                 break;
5040         case 3:
5041                 res = kvm_set_cr3(vcpu, val);
5042                 break;
5043         case 4:
5044                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
5045                 break;
5046         case 8:
5047                 res = kvm_set_cr8(vcpu, val);
5048                 break;
5049         default:
5050                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5051                 res = -1;
5052         }
5053
5054         return res;
5055 }
5056
5057 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
5058 {
5059         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
5060 }
5061
5062 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5063 {
5064         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
5065 }
5066
5067 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5068 {
5069         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
5070 }
5071
5072 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5073 {
5074         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
5075 }
5076
5077 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5078 {
5079         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
5080 }
5081
5082 static unsigned long emulator_get_cached_segment_base(
5083         struct x86_emulate_ctxt *ctxt, int seg)
5084 {
5085         return get_segment_base(emul_to_vcpu(ctxt), seg);
5086 }
5087
5088 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
5089                                  struct desc_struct *desc, u32 *base3,
5090                                  int seg)
5091 {
5092         struct kvm_segment var;
5093
5094         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
5095         *selector = var.selector;
5096
5097         if (var.unusable) {
5098                 memset(desc, 0, sizeof(*desc));
5099                 if (base3)
5100                         *base3 = 0;
5101                 return false;
5102         }
5103
5104         if (var.g)
5105                 var.limit >>= 12;
5106         set_desc_limit(desc, var.limit);
5107         set_desc_base(desc, (unsigned long)var.base);
5108 #ifdef CONFIG_X86_64
5109         if (base3)
5110                 *base3 = var.base >> 32;
5111 #endif
5112         desc->type = var.type;
5113         desc->s = var.s;
5114         desc->dpl = var.dpl;
5115         desc->p = var.present;
5116         desc->avl = var.avl;
5117         desc->l = var.l;
5118         desc->d = var.db;
5119         desc->g = var.g;
5120
5121         return true;
5122 }
5123
5124 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
5125                                  struct desc_struct *desc, u32 base3,
5126                                  int seg)
5127 {
5128         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5129         struct kvm_segment var;
5130
5131         var.selector = selector;
5132         var.base = get_desc_base(desc);
5133 #ifdef CONFIG_X86_64
5134         var.base |= ((u64)base3) << 32;
5135 #endif
5136         var.limit = get_desc_limit(desc);
5137         if (desc->g)
5138                 var.limit = (var.limit << 12) | 0xfff;
5139         var.type = desc->type;
5140         var.dpl = desc->dpl;
5141         var.db = desc->d;
5142         var.s = desc->s;
5143         var.l = desc->l;
5144         var.g = desc->g;
5145         var.avl = desc->avl;
5146         var.present = desc->p;
5147         var.unusable = !var.present;
5148         var.padding = 0;
5149
5150         kvm_set_segment(vcpu, &var, seg);
5151         return;
5152 }
5153
5154 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
5155                             u32 msr_index, u64 *pdata)
5156 {
5157         struct msr_data msr;
5158         int r;
5159
5160         msr.index = msr_index;
5161         msr.host_initiated = false;
5162         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
5163         if (r)
5164                 return r;
5165
5166         *pdata = msr.data;
5167         return 0;
5168 }
5169
5170 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
5171                             u32 msr_index, u64 data)
5172 {
5173         struct msr_data msr;
5174
5175         msr.data = data;
5176         msr.index = msr_index;
5177         msr.host_initiated = false;
5178         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
5179 }
5180
5181 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
5182 {
5183         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5184
5185         return vcpu->arch.smbase;
5186 }
5187
5188 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
5189 {
5190         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5191
5192         vcpu->arch.smbase = smbase;
5193 }
5194
5195 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
5196                               u32 pmc)
5197 {
5198         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
5199 }
5200
5201 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
5202                              u32 pmc, u64 *pdata)
5203 {
5204         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
5205 }
5206
5207 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
5208 {
5209         emul_to_vcpu(ctxt)->arch.halt_request = 1;
5210 }
5211
5212 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
5213 {
5214         preempt_disable();
5215         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
5216 }
5217
5218 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
5219 {
5220         preempt_enable();
5221 }
5222
5223 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
5224                               struct x86_instruction_info *info,
5225                               enum x86_intercept_stage stage)
5226 {
5227         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
5228 }
5229
5230 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
5231                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
5232 {
5233         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
5234 }
5235
5236 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
5237 {
5238         return kvm_register_read(emul_to_vcpu(ctxt), reg);
5239 }
5240
5241 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
5242 {
5243         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
5244 }
5245
5246 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
5247 {
5248         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
5249 }
5250
5251 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
5252 {
5253         return emul_to_vcpu(ctxt)->arch.hflags;
5254 }
5255
5256 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
5257 {
5258         kvm_set_hflags(emul_to_vcpu(ctxt), emul_flags);
5259 }
5260
5261 static const struct x86_emulate_ops emulate_ops = {
5262         .read_gpr            = emulator_read_gpr,
5263         .write_gpr           = emulator_write_gpr,
5264         .read_std            = kvm_read_guest_virt_system,
5265         .write_std           = kvm_write_guest_virt_system,
5266         .read_phys           = kvm_read_guest_phys_system,
5267         .fetch               = kvm_fetch_guest_virt,
5268         .read_emulated       = emulator_read_emulated,
5269         .write_emulated      = emulator_write_emulated,
5270         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
5271         .invlpg              = emulator_invlpg,
5272         .pio_in_emulated     = emulator_pio_in_emulated,
5273         .pio_out_emulated    = emulator_pio_out_emulated,
5274         .get_segment         = emulator_get_segment,
5275         .set_segment         = emulator_set_segment,
5276         .get_cached_segment_base = emulator_get_cached_segment_base,
5277         .get_gdt             = emulator_get_gdt,
5278         .get_idt             = emulator_get_idt,
5279         .set_gdt             = emulator_set_gdt,
5280         .set_idt             = emulator_set_idt,
5281         .get_cr              = emulator_get_cr,
5282         .set_cr              = emulator_set_cr,
5283         .cpl                 = emulator_get_cpl,
5284         .get_dr              = emulator_get_dr,
5285         .set_dr              = emulator_set_dr,
5286         .get_smbase          = emulator_get_smbase,
5287         .set_smbase          = emulator_set_smbase,
5288         .set_msr             = emulator_set_msr,
5289         .get_msr             = emulator_get_msr,
5290         .check_pmc           = emulator_check_pmc,
5291         .read_pmc            = emulator_read_pmc,
5292         .halt                = emulator_halt,
5293         .wbinvd              = emulator_wbinvd,
5294         .fix_hypercall       = emulator_fix_hypercall,
5295         .get_fpu             = emulator_get_fpu,
5296         .put_fpu             = emulator_put_fpu,
5297         .intercept           = emulator_intercept,
5298         .get_cpuid           = emulator_get_cpuid,
5299         .set_nmi_mask        = emulator_set_nmi_mask,
5300         .get_hflags          = emulator_get_hflags,
5301         .set_hflags          = emulator_set_hflags,
5302 };
5303
5304 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5305 {
5306         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5307         /*
5308          * an sti; sti; sequence only disable interrupts for the first
5309          * instruction. So, if the last instruction, be it emulated or
5310          * not, left the system with the INT_STI flag enabled, it
5311          * means that the last instruction is an sti. We should not
5312          * leave the flag on in this case. The same goes for mov ss
5313          */
5314         if (int_shadow & mask)
5315                 mask = 0;
5316         if (unlikely(int_shadow || mask)) {
5317                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5318                 if (!mask)
5319                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5320         }
5321 }
5322
5323 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5324 {
5325         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5326         if (ctxt->exception.vector == PF_VECTOR)
5327                 return kvm_propagate_fault(vcpu, &ctxt->exception);
5328
5329         if (ctxt->exception.error_code_valid)
5330                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5331                                       ctxt->exception.error_code);
5332         else
5333                 kvm_queue_exception(vcpu, ctxt->exception.vector);
5334         return false;
5335 }
5336
5337 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5338 {
5339         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5340         int cs_db, cs_l;
5341
5342         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5343
5344         ctxt->eflags = kvm_get_rflags(vcpu);
5345         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
5346
5347         ctxt->eip = kvm_rip_read(vcpu);
5348         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5349                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5350                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5351                      cs_db                              ? X86EMUL_MODE_PROT32 :
5352                                                           X86EMUL_MODE_PROT16;
5353         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5354         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5355         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5356
5357         init_decode_cache(ctxt);
5358         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5359 }
5360
5361 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5362 {
5363         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5364         int ret;
5365
5366         init_emulate_ctxt(vcpu);
5367
5368         ctxt->op_bytes = 2;
5369         ctxt->ad_bytes = 2;
5370         ctxt->_eip = ctxt->eip + inc_eip;
5371         ret = emulate_int_real(ctxt, irq);
5372
5373         if (ret != X86EMUL_CONTINUE)
5374                 return EMULATE_FAIL;
5375
5376         ctxt->eip = ctxt->_eip;
5377         kvm_rip_write(vcpu, ctxt->eip);
5378         kvm_set_rflags(vcpu, ctxt->eflags);
5379
5380         if (irq == NMI_VECTOR)
5381                 vcpu->arch.nmi_pending = 0;
5382         else
5383                 vcpu->arch.interrupt.pending = false;
5384
5385         return EMULATE_DONE;
5386 }
5387 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5388
5389 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
5390 {
5391         int r = EMULATE_DONE;
5392
5393         ++vcpu->stat.insn_emulation_fail;
5394         trace_kvm_emulate_insn_failed(vcpu);
5395         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5396                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5397                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5398                 vcpu->run->internal.ndata = 0;
5399                 r = EMULATE_FAIL;
5400         }
5401         kvm_queue_exception(vcpu, UD_VECTOR);
5402
5403         return r;
5404 }
5405
5406 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5407                                   bool write_fault_to_shadow_pgtable,
5408                                   int emulation_type)
5409 {
5410         gpa_t gpa = cr2;
5411         kvm_pfn_t pfn;
5412
5413         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5414                 return false;
5415
5416         if (!vcpu->arch.mmu.direct_map) {
5417                 /*
5418                  * Write permission should be allowed since only
5419                  * write access need to be emulated.
5420                  */
5421                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5422
5423                 /*
5424                  * If the mapping is invalid in guest, let cpu retry
5425                  * it to generate fault.
5426                  */
5427                 if (gpa == UNMAPPED_GVA)
5428                         return true;
5429         }
5430
5431         /*
5432          * Do not retry the unhandleable instruction if it faults on the
5433          * readonly host memory, otherwise it will goto a infinite loop:
5434          * retry instruction -> write #PF -> emulation fail -> retry
5435          * instruction -> ...
5436          */
5437         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5438
5439         /*
5440          * If the instruction failed on the error pfn, it can not be fixed,
5441          * report the error to userspace.
5442          */
5443         if (is_error_noslot_pfn(pfn))
5444                 return false;
5445
5446         kvm_release_pfn_clean(pfn);
5447
5448         /* The instructions are well-emulated on direct mmu. */
5449         if (vcpu->arch.mmu.direct_map) {
5450                 unsigned int indirect_shadow_pages;
5451
5452                 spin_lock(&vcpu->kvm->mmu_lock);
5453                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5454                 spin_unlock(&vcpu->kvm->mmu_lock);
5455
5456                 if (indirect_shadow_pages)
5457                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5458
5459                 return true;
5460         }
5461
5462         /*
5463          * if emulation was due to access to shadowed page table
5464          * and it failed try to unshadow page and re-enter the
5465          * guest to let CPU execute the instruction.
5466          */
5467         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5468
5469         /*
5470          * If the access faults on its page table, it can not
5471          * be fixed by unprotecting shadow page and it should
5472          * be reported to userspace.
5473          */
5474         return !write_fault_to_shadow_pgtable;
5475 }
5476
5477 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5478                               unsigned long cr2,  int emulation_type)
5479 {
5480         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5481         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5482
5483         last_retry_eip = vcpu->arch.last_retry_eip;
5484         last_retry_addr = vcpu->arch.last_retry_addr;
5485
5486         /*
5487          * If the emulation is caused by #PF and it is non-page_table
5488          * writing instruction, it means the VM-EXIT is caused by shadow
5489          * page protected, we can zap the shadow page and retry this
5490          * instruction directly.
5491          *
5492          * Note: if the guest uses a non-page-table modifying instruction
5493          * on the PDE that points to the instruction, then we will unmap
5494          * the instruction and go to an infinite loop. So, we cache the
5495          * last retried eip and the last fault address, if we meet the eip
5496          * and the address again, we can break out of the potential infinite
5497          * loop.
5498          */
5499         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5500
5501         if (!(emulation_type & EMULTYPE_RETRY))
5502                 return false;
5503
5504         if (x86_page_table_writing_insn(ctxt))
5505                 return false;
5506
5507         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5508                 return false;
5509
5510         vcpu->arch.last_retry_eip = ctxt->eip;
5511         vcpu->arch.last_retry_addr = cr2;
5512
5513         if (!vcpu->arch.mmu.direct_map)
5514                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5515
5516         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5517
5518         return true;
5519 }
5520
5521 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5522 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5523
5524 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5525 {
5526         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5527                 /* This is a good place to trace that we are exiting SMM.  */
5528                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5529
5530                 /* Process a latched INIT or SMI, if any.  */
5531                 kvm_make_request(KVM_REQ_EVENT, vcpu);
5532         }
5533
5534         kvm_mmu_reset_context(vcpu);
5535 }
5536
5537 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5538 {
5539         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5540
5541         vcpu->arch.hflags = emul_flags;
5542
5543         if (changed & HF_SMM_MASK)
5544                 kvm_smm_changed(vcpu);
5545 }
5546
5547 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5548                                 unsigned long *db)
5549 {
5550         u32 dr6 = 0;
5551         int i;
5552         u32 enable, rwlen;
5553
5554         enable = dr7;
5555         rwlen = dr7 >> 16;
5556         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5557                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5558                         dr6 |= (1 << i);
5559         return dr6;
5560 }
5561
5562 static void kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu, int *r)
5563 {
5564         struct kvm_run *kvm_run = vcpu->run;
5565
5566         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5567                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
5568                 kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5569                 kvm_run->debug.arch.exception = DB_VECTOR;
5570                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
5571                 *r = EMULATE_USER_EXIT;
5572         } else {
5573                 /*
5574                  * "Certain debug exceptions may clear bit 0-3.  The
5575                  * remaining contents of the DR6 register are never
5576                  * cleared by the processor".
5577                  */
5578                 vcpu->arch.dr6 &= ~15;
5579                 vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5580                 kvm_queue_exception(vcpu, DB_VECTOR);
5581         }
5582 }
5583
5584 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
5585 {
5586         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5587         int r = EMULATE_DONE;
5588
5589         kvm_x86_ops->skip_emulated_instruction(vcpu);
5590
5591         /*
5592          * rflags is the old, "raw" value of the flags.  The new value has
5593          * not been saved yet.
5594          *
5595          * This is correct even for TF set by the guest, because "the
5596          * processor will not generate this exception after the instruction
5597          * that sets the TF flag".
5598          */
5599         if (unlikely(rflags & X86_EFLAGS_TF))
5600                 kvm_vcpu_do_singlestep(vcpu, &r);
5601         return r == EMULATE_DONE;
5602 }
5603 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
5604
5605 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5606 {
5607         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5608             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5609                 struct kvm_run *kvm_run = vcpu->run;
5610                 unsigned long eip = kvm_get_linear_rip(vcpu);
5611                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5612                                            vcpu->arch.guest_debug_dr7,
5613                                            vcpu->arch.eff_db);
5614
5615                 if (dr6 != 0) {
5616                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5617                         kvm_run->debug.arch.pc = eip;
5618                         kvm_run->debug.arch.exception = DB_VECTOR;
5619                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5620                         *r = EMULATE_USER_EXIT;
5621                         return true;
5622                 }
5623         }
5624
5625         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5626             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5627                 unsigned long eip = kvm_get_linear_rip(vcpu);
5628                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5629                                            vcpu->arch.dr7,
5630                                            vcpu->arch.db);
5631
5632                 if (dr6 != 0) {
5633                         vcpu->arch.dr6 &= ~15;
5634                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5635                         kvm_queue_exception(vcpu, DB_VECTOR);
5636                         *r = EMULATE_DONE;
5637                         return true;
5638                 }
5639         }
5640
5641         return false;
5642 }
5643
5644 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5645                             unsigned long cr2,
5646                             int emulation_type,
5647                             void *insn,
5648                             int insn_len)
5649 {
5650         int r;
5651         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5652         bool writeback = true;
5653         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5654
5655         /*
5656          * Clear write_fault_to_shadow_pgtable here to ensure it is
5657          * never reused.
5658          */
5659         vcpu->arch.write_fault_to_shadow_pgtable = false;
5660         kvm_clear_exception_queue(vcpu);
5661
5662         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5663                 init_emulate_ctxt(vcpu);
5664
5665                 /*
5666                  * We will reenter on the same instruction since
5667                  * we do not set complete_userspace_io.  This does not
5668                  * handle watchpoints yet, those would be handled in
5669                  * the emulate_ops.
5670                  */
5671                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5672                         return r;
5673
5674                 ctxt->interruptibility = 0;
5675                 ctxt->have_exception = false;
5676                 ctxt->exception.vector = -1;
5677                 ctxt->perm_ok = false;
5678
5679                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5680
5681                 r = x86_decode_insn(ctxt, insn, insn_len);
5682
5683                 trace_kvm_emulate_insn_start(vcpu);
5684                 ++vcpu->stat.insn_emulation;
5685                 if (r != EMULATION_OK)  {
5686                         if (emulation_type & EMULTYPE_TRAP_UD)
5687                                 return EMULATE_FAIL;
5688                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5689                                                 emulation_type))
5690                                 return EMULATE_DONE;
5691                         if (emulation_type & EMULTYPE_SKIP)
5692                                 return EMULATE_FAIL;
5693                         return handle_emulation_failure(vcpu);
5694                 }
5695         }
5696
5697         if (emulation_type & EMULTYPE_SKIP) {
5698                 kvm_rip_write(vcpu, ctxt->_eip);
5699                 if (ctxt->eflags & X86_EFLAGS_RF)
5700                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5701                 return EMULATE_DONE;
5702         }
5703
5704         if (retry_instruction(ctxt, cr2, emulation_type))
5705                 return EMULATE_DONE;
5706
5707         /* this is needed for vmware backdoor interface to work since it
5708            changes registers values  during IO operation */
5709         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5710                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5711                 emulator_invalidate_register_cache(ctxt);
5712         }
5713
5714 restart:
5715         /* Save the faulting GPA (cr2) in the address field */
5716         ctxt->exception.address = cr2;
5717
5718         r = x86_emulate_insn(ctxt);
5719
5720         if (r == EMULATION_INTERCEPTED)
5721                 return EMULATE_DONE;
5722
5723         if (r == EMULATION_FAILED) {
5724                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5725                                         emulation_type))
5726                         return EMULATE_DONE;
5727
5728                 return handle_emulation_failure(vcpu);
5729         }
5730
5731         if (ctxt->have_exception) {
5732                 r = EMULATE_DONE;
5733                 if (inject_emulated_exception(vcpu))
5734                         return r;
5735         } else if (vcpu->arch.pio.count) {
5736                 if (!vcpu->arch.pio.in) {
5737                         /* FIXME: return into emulator if single-stepping.  */
5738                         vcpu->arch.pio.count = 0;
5739                 } else {
5740                         writeback = false;
5741                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5742                 }
5743                 r = EMULATE_USER_EXIT;
5744         } else if (vcpu->mmio_needed) {
5745                 if (!vcpu->mmio_is_write)
5746                         writeback = false;
5747                 r = EMULATE_USER_EXIT;
5748                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5749         } else if (r == EMULATION_RESTART)
5750                 goto restart;
5751         else
5752                 r = EMULATE_DONE;
5753
5754         if (writeback) {
5755                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5756                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5757                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5758                 kvm_rip_write(vcpu, ctxt->eip);
5759                 if (r == EMULATE_DONE &&
5760                     (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
5761                         kvm_vcpu_do_singlestep(vcpu, &r);
5762                 if (!ctxt->have_exception ||
5763                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5764                         __kvm_set_rflags(vcpu, ctxt->eflags);
5765
5766                 /*
5767                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5768                  * do nothing, and it will be requested again as soon as
5769                  * the shadow expires.  But we still need to check here,
5770                  * because POPF has no interrupt shadow.
5771                  */
5772                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5773                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5774         } else
5775                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5776
5777         return r;
5778 }
5779 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5780
5781 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5782 {
5783         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5784         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5785                                             size, port, &val, 1);
5786         /* do not return to emulator after return from userspace */
5787         vcpu->arch.pio.count = 0;
5788         return ret;
5789 }
5790 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5791
5792 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
5793 {
5794         unsigned long val;
5795
5796         /* We should only ever be called with arch.pio.count equal to 1 */
5797         BUG_ON(vcpu->arch.pio.count != 1);
5798
5799         /* For size less than 4 we merge, else we zero extend */
5800         val = (vcpu->arch.pio.size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX)
5801                                         : 0;
5802
5803         /*
5804          * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
5805          * the copy and tracing
5806          */
5807         emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, vcpu->arch.pio.size,
5808                                  vcpu->arch.pio.port, &val, 1);
5809         kvm_register_write(vcpu, VCPU_REGS_RAX, val);
5810
5811         return 1;
5812 }
5813
5814 int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size, unsigned short port)
5815 {
5816         unsigned long val;
5817         int ret;
5818
5819         /* For size less than 4 we merge, else we zero extend */
5820         val = (size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX) : 0;
5821
5822         ret = emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, size, port,
5823                                        &val, 1);
5824         if (ret) {
5825                 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
5826                 return ret;
5827         }
5828
5829         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
5830
5831         return 0;
5832 }
5833 EXPORT_SYMBOL_GPL(kvm_fast_pio_in);
5834
5835 static int kvmclock_cpu_down_prep(unsigned int cpu)
5836 {
5837         __this_cpu_write(cpu_tsc_khz, 0);
5838         return 0;
5839 }
5840
5841 static void tsc_khz_changed(void *data)
5842 {
5843         struct cpufreq_freqs *freq = data;
5844         unsigned long khz = 0;
5845
5846         if (data)
5847                 khz = freq->new;
5848         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5849                 khz = cpufreq_quick_get(raw_smp_processor_id());
5850         if (!khz)
5851                 khz = tsc_khz;
5852         __this_cpu_write(cpu_tsc_khz, khz);
5853 }
5854
5855 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5856                                      void *data)
5857 {
5858         struct cpufreq_freqs *freq = data;
5859         struct kvm *kvm;
5860         struct kvm_vcpu *vcpu;
5861         int i, send_ipi = 0;
5862
5863         /*
5864          * We allow guests to temporarily run on slowing clocks,
5865          * provided we notify them after, or to run on accelerating
5866          * clocks, provided we notify them before.  Thus time never
5867          * goes backwards.
5868          *
5869          * However, we have a problem.  We can't atomically update
5870          * the frequency of a given CPU from this function; it is
5871          * merely a notifier, which can be called from any CPU.
5872          * Changing the TSC frequency at arbitrary points in time
5873          * requires a recomputation of local variables related to
5874          * the TSC for each VCPU.  We must flag these local variables
5875          * to be updated and be sure the update takes place with the
5876          * new frequency before any guests proceed.
5877          *
5878          * Unfortunately, the combination of hotplug CPU and frequency
5879          * change creates an intractable locking scenario; the order
5880          * of when these callouts happen is undefined with respect to
5881          * CPU hotplug, and they can race with each other.  As such,
5882          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5883          * undefined; you can actually have a CPU frequency change take
5884          * place in between the computation of X and the setting of the
5885          * variable.  To protect against this problem, all updates of
5886          * the per_cpu tsc_khz variable are done in an interrupt
5887          * protected IPI, and all callers wishing to update the value
5888          * must wait for a synchronous IPI to complete (which is trivial
5889          * if the caller is on the CPU already).  This establishes the
5890          * necessary total order on variable updates.
5891          *
5892          * Note that because a guest time update may take place
5893          * anytime after the setting of the VCPU's request bit, the
5894          * correct TSC value must be set before the request.  However,
5895          * to ensure the update actually makes it to any guest which
5896          * starts running in hardware virtualization between the set
5897          * and the acquisition of the spinlock, we must also ping the
5898          * CPU after setting the request bit.
5899          *
5900          */
5901
5902         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5903                 return 0;
5904         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5905                 return 0;
5906
5907         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5908
5909         spin_lock(&kvm_lock);
5910         list_for_each_entry(kvm, &vm_list, vm_list) {
5911                 kvm_for_each_vcpu(i, vcpu, kvm) {
5912                         if (vcpu->cpu != freq->cpu)
5913                                 continue;
5914                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5915                         if (vcpu->cpu != smp_processor_id())
5916                                 send_ipi = 1;
5917                 }
5918         }
5919         spin_unlock(&kvm_lock);
5920
5921         if (freq->old < freq->new && send_ipi) {
5922                 /*
5923                  * We upscale the frequency.  Must make the guest
5924                  * doesn't see old kvmclock values while running with
5925                  * the new frequency, otherwise we risk the guest sees
5926                  * time go backwards.
5927                  *
5928                  * In case we update the frequency for another cpu
5929                  * (which might be in guest context) send an interrupt
5930                  * to kick the cpu out of guest context.  Next time
5931                  * guest context is entered kvmclock will be updated,
5932                  * so the guest will not see stale values.
5933                  */
5934                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5935         }
5936         return 0;
5937 }
5938
5939 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5940         .notifier_call  = kvmclock_cpufreq_notifier
5941 };
5942
5943 static int kvmclock_cpu_online(unsigned int cpu)
5944 {
5945         tsc_khz_changed(NULL);
5946         return 0;
5947 }
5948
5949 static void kvm_timer_init(void)
5950 {
5951         max_tsc_khz = tsc_khz;
5952
5953         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5954 #ifdef CONFIG_CPU_FREQ
5955                 struct cpufreq_policy policy;
5956                 int cpu;
5957
5958                 memset(&policy, 0, sizeof(policy));
5959                 cpu = get_cpu();
5960                 cpufreq_get_policy(&policy, cpu);
5961                 if (policy.cpuinfo.max_freq)
5962                         max_tsc_khz = policy.cpuinfo.max_freq;
5963                 put_cpu();
5964 #endif
5965                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5966                                           CPUFREQ_TRANSITION_NOTIFIER);
5967         }
5968         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5969
5970         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
5971                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
5972 }
5973
5974 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5975
5976 int kvm_is_in_guest(void)
5977 {
5978         return __this_cpu_read(current_vcpu) != NULL;
5979 }
5980
5981 static int kvm_is_user_mode(void)
5982 {
5983         int user_mode = 3;
5984
5985         if (__this_cpu_read(current_vcpu))
5986                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5987
5988         return user_mode != 0;
5989 }
5990
5991 static unsigned long kvm_get_guest_ip(void)
5992 {
5993         unsigned long ip = 0;
5994
5995         if (__this_cpu_read(current_vcpu))
5996                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5997
5998         return ip;
5999 }
6000
6001 static struct perf_guest_info_callbacks kvm_guest_cbs = {
6002         .is_in_guest            = kvm_is_in_guest,
6003         .is_user_mode           = kvm_is_user_mode,
6004         .get_guest_ip           = kvm_get_guest_ip,
6005 };
6006
6007 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
6008 {
6009         __this_cpu_write(current_vcpu, vcpu);
6010 }
6011 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
6012
6013 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
6014 {
6015         __this_cpu_write(current_vcpu, NULL);
6016 }
6017 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
6018
6019 static void kvm_set_mmio_spte_mask(void)
6020 {
6021         u64 mask;
6022         int maxphyaddr = boot_cpu_data.x86_phys_bits;
6023
6024         /*
6025          * Set the reserved bits and the present bit of an paging-structure
6026          * entry to generate page fault with PFER.RSV = 1.
6027          */
6028          /* Mask the reserved physical address bits. */
6029         mask = rsvd_bits(maxphyaddr, 51);
6030
6031         /* Set the present bit. */
6032         mask |= 1ull;
6033
6034 #ifdef CONFIG_X86_64
6035         /*
6036          * If reserved bit is not supported, clear the present bit to disable
6037          * mmio page fault.
6038          */
6039         if (maxphyaddr == 52)
6040                 mask &= ~1ull;
6041 #endif
6042
6043         kvm_mmu_set_mmio_spte_mask(mask, mask);
6044 }
6045
6046 #ifdef CONFIG_X86_64
6047 static void pvclock_gtod_update_fn(struct work_struct *work)
6048 {
6049         struct kvm *kvm;
6050
6051         struct kvm_vcpu *vcpu;
6052         int i;
6053
6054         spin_lock(&kvm_lock);
6055         list_for_each_entry(kvm, &vm_list, vm_list)
6056                 kvm_for_each_vcpu(i, vcpu, kvm)
6057                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
6058         atomic_set(&kvm_guest_has_master_clock, 0);
6059         spin_unlock(&kvm_lock);
6060 }
6061
6062 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
6063
6064 /*
6065  * Notification about pvclock gtod data update.
6066  */
6067 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
6068                                void *priv)
6069 {
6070         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
6071         struct timekeeper *tk = priv;
6072
6073         update_pvclock_gtod(tk);
6074
6075         /* disable master clock if host does not trust, or does not
6076          * use, TSC clocksource
6077          */
6078         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
6079             atomic_read(&kvm_guest_has_master_clock) != 0)
6080                 queue_work(system_long_wq, &pvclock_gtod_work);
6081
6082         return 0;
6083 }
6084
6085 static struct notifier_block pvclock_gtod_notifier = {
6086         .notifier_call = pvclock_gtod_notify,
6087 };
6088 #endif
6089
6090 int kvm_arch_init(void *opaque)
6091 {
6092         int r;
6093         struct kvm_x86_ops *ops = opaque;
6094
6095         if (kvm_x86_ops) {
6096                 printk(KERN_ERR "kvm: already loaded the other module\n");
6097                 r = -EEXIST;
6098                 goto out;
6099         }
6100
6101         if (!ops->cpu_has_kvm_support()) {
6102                 printk(KERN_ERR "kvm: no hardware support\n");
6103                 r = -EOPNOTSUPP;
6104                 goto out;
6105         }
6106         if (ops->disabled_by_bios()) {
6107                 printk(KERN_ERR "kvm: disabled by bios\n");
6108                 r = -EOPNOTSUPP;
6109                 goto out;
6110         }
6111
6112         r = -ENOMEM;
6113         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
6114         if (!shared_msrs) {
6115                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
6116                 goto out;
6117         }
6118
6119         r = kvm_mmu_module_init();
6120         if (r)
6121                 goto out_free_percpu;
6122
6123         kvm_set_mmio_spte_mask();
6124
6125         kvm_x86_ops = ops;
6126
6127         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
6128                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
6129                         PT_PRESENT_MASK, 0, sme_me_mask);
6130         kvm_timer_init();
6131
6132         perf_register_guest_info_callbacks(&kvm_guest_cbs);
6133
6134         if (boot_cpu_has(X86_FEATURE_XSAVE))
6135                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
6136
6137         kvm_lapic_init();
6138 #ifdef CONFIG_X86_64
6139         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
6140 #endif
6141
6142         return 0;
6143
6144 out_free_percpu:
6145         free_percpu(shared_msrs);
6146 out:
6147         return r;
6148 }
6149
6150 void kvm_arch_exit(void)
6151 {
6152         kvm_lapic_exit();
6153         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
6154
6155         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6156                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
6157                                             CPUFREQ_TRANSITION_NOTIFIER);
6158         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
6159 #ifdef CONFIG_X86_64
6160         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
6161 #endif
6162         kvm_x86_ops = NULL;
6163         kvm_mmu_module_exit();
6164         free_percpu(shared_msrs);
6165 }
6166
6167 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
6168 {
6169         ++vcpu->stat.halt_exits;
6170         if (lapic_in_kernel(vcpu)) {
6171                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
6172                 return 1;
6173         } else {
6174                 vcpu->run->exit_reason = KVM_EXIT_HLT;
6175                 return 0;
6176         }
6177 }
6178 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
6179
6180 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
6181 {
6182         int ret = kvm_skip_emulated_instruction(vcpu);
6183         /*
6184          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6185          * KVM_EXIT_DEBUG here.
6186          */
6187         return kvm_vcpu_halt(vcpu) && ret;
6188 }
6189 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
6190
6191 #ifdef CONFIG_X86_64
6192 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
6193                                 unsigned long clock_type)
6194 {
6195         struct kvm_clock_pairing clock_pairing;
6196         struct timespec ts;
6197         u64 cycle;
6198         int ret;
6199
6200         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
6201                 return -KVM_EOPNOTSUPP;
6202
6203         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
6204                 return -KVM_EOPNOTSUPP;
6205
6206         clock_pairing.sec = ts.tv_sec;
6207         clock_pairing.nsec = ts.tv_nsec;
6208         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
6209         clock_pairing.flags = 0;
6210
6211         ret = 0;
6212         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
6213                             sizeof(struct kvm_clock_pairing)))
6214                 ret = -KVM_EFAULT;
6215
6216         return ret;
6217 }
6218 #endif
6219
6220 /*
6221  * kvm_pv_kick_cpu_op:  Kick a vcpu.
6222  *
6223  * @apicid - apicid of vcpu to be kicked.
6224  */
6225 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
6226 {
6227         struct kvm_lapic_irq lapic_irq;
6228
6229         lapic_irq.shorthand = 0;
6230         lapic_irq.dest_mode = 0;
6231         lapic_irq.level = 0;
6232         lapic_irq.dest_id = apicid;
6233         lapic_irq.msi_redir_hint = false;
6234
6235         lapic_irq.delivery_mode = APIC_DM_REMRD;
6236         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
6237 }
6238
6239 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
6240 {
6241         vcpu->arch.apicv_active = false;
6242         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
6243 }
6244
6245 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
6246 {
6247         unsigned long nr, a0, a1, a2, a3, ret;
6248         int op_64_bit, r;
6249
6250         r = kvm_skip_emulated_instruction(vcpu);
6251
6252         if (kvm_hv_hypercall_enabled(vcpu->kvm))
6253                 return kvm_hv_hypercall(vcpu);
6254
6255         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
6256         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
6257         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
6258         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
6259         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
6260
6261         trace_kvm_hypercall(nr, a0, a1, a2, a3);
6262
6263         op_64_bit = is_64_bit_mode(vcpu);
6264         if (!op_64_bit) {
6265                 nr &= 0xFFFFFFFF;
6266                 a0 &= 0xFFFFFFFF;
6267                 a1 &= 0xFFFFFFFF;
6268                 a2 &= 0xFFFFFFFF;
6269                 a3 &= 0xFFFFFFFF;
6270         }
6271
6272         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
6273                 ret = -KVM_EPERM;
6274                 goto out;
6275         }
6276
6277         switch (nr) {
6278         case KVM_HC_VAPIC_POLL_IRQ:
6279                 ret = 0;
6280                 break;
6281         case KVM_HC_KICK_CPU:
6282                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
6283                 ret = 0;
6284                 break;
6285 #ifdef CONFIG_X86_64
6286         case KVM_HC_CLOCK_PAIRING:
6287                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
6288                 break;
6289 #endif
6290         default:
6291                 ret = -KVM_ENOSYS;
6292                 break;
6293         }
6294 out:
6295         if (!op_64_bit)
6296                 ret = (u32)ret;
6297         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
6298         ++vcpu->stat.hypercalls;
6299         return r;
6300 }
6301 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
6302
6303 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
6304 {
6305         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6306         char instruction[3];
6307         unsigned long rip = kvm_rip_read(vcpu);
6308
6309         kvm_x86_ops->patch_hypercall(vcpu, instruction);
6310
6311         return emulator_write_emulated(ctxt, rip, instruction, 3,
6312                 &ctxt->exception);
6313 }
6314
6315 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
6316 {
6317         return vcpu->run->request_interrupt_window &&
6318                 likely(!pic_in_kernel(vcpu->kvm));
6319 }
6320
6321 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
6322 {
6323         struct kvm_run *kvm_run = vcpu->run;
6324
6325         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
6326         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
6327         kvm_run->cr8 = kvm_get_cr8(vcpu);
6328         kvm_run->apic_base = kvm_get_apic_base(vcpu);
6329         kvm_run->ready_for_interrupt_injection =
6330                 pic_in_kernel(vcpu->kvm) ||
6331                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
6332 }
6333
6334 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
6335 {
6336         int max_irr, tpr;
6337
6338         if (!kvm_x86_ops->update_cr8_intercept)
6339                 return;
6340
6341         if (!lapic_in_kernel(vcpu))
6342                 return;
6343
6344         if (vcpu->arch.apicv_active)
6345                 return;
6346
6347         if (!vcpu->arch.apic->vapic_addr)
6348                 max_irr = kvm_lapic_find_highest_irr(vcpu);
6349         else
6350                 max_irr = -1;
6351
6352         if (max_irr != -1)
6353                 max_irr >>= 4;
6354
6355         tpr = kvm_lapic_get_cr8(vcpu);
6356
6357         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
6358 }
6359
6360 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
6361 {
6362         int r;
6363
6364         /* try to reinject previous events if any */
6365         if (vcpu->arch.exception.pending) {
6366                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
6367                                         vcpu->arch.exception.has_error_code,
6368                                         vcpu->arch.exception.error_code);
6369
6370                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
6371                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
6372                                              X86_EFLAGS_RF);
6373
6374                 if (vcpu->arch.exception.nr == DB_VECTOR &&
6375                     (vcpu->arch.dr7 & DR7_GD)) {
6376                         vcpu->arch.dr7 &= ~DR7_GD;
6377                         kvm_update_dr7(vcpu);
6378                 }
6379
6380                 kvm_x86_ops->queue_exception(vcpu);
6381                 return 0;
6382         }
6383
6384         if (vcpu->arch.nmi_injected) {
6385                 kvm_x86_ops->set_nmi(vcpu);
6386                 return 0;
6387         }
6388
6389         if (vcpu->arch.interrupt.pending) {
6390                 kvm_x86_ops->set_irq(vcpu);
6391                 return 0;
6392         }
6393
6394         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6395                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6396                 if (r != 0)
6397                         return r;
6398         }
6399
6400         /* try to inject new event if pending */
6401         if (vcpu->arch.smi_pending && !is_smm(vcpu)) {
6402                 vcpu->arch.smi_pending = false;
6403                 enter_smm(vcpu);
6404         } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
6405                 --vcpu->arch.nmi_pending;
6406                 vcpu->arch.nmi_injected = true;
6407                 kvm_x86_ops->set_nmi(vcpu);
6408         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6409                 /*
6410                  * Because interrupts can be injected asynchronously, we are
6411                  * calling check_nested_events again here to avoid a race condition.
6412                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6413                  * proposal and current concerns.  Perhaps we should be setting
6414                  * KVM_REQ_EVENT only on certain events and not unconditionally?
6415                  */
6416                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6417                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6418                         if (r != 0)
6419                                 return r;
6420                 }
6421                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6422                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6423                                             false);
6424                         kvm_x86_ops->set_irq(vcpu);
6425                 }
6426         }
6427
6428         return 0;
6429 }
6430
6431 static void process_nmi(struct kvm_vcpu *vcpu)
6432 {
6433         unsigned limit = 2;
6434
6435         /*
6436          * x86 is limited to one NMI running, and one NMI pending after it.
6437          * If an NMI is already in progress, limit further NMIs to just one.
6438          * Otherwise, allow two (and we'll inject the first one immediately).
6439          */
6440         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6441                 limit = 1;
6442
6443         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6444         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6445         kvm_make_request(KVM_REQ_EVENT, vcpu);
6446 }
6447
6448 #define put_smstate(type, buf, offset, val)                       \
6449         *(type *)((buf) + (offset) - 0x7e00) = val
6450
6451 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
6452 {
6453         u32 flags = 0;
6454         flags |= seg->g       << 23;
6455         flags |= seg->db      << 22;
6456         flags |= seg->l       << 21;
6457         flags |= seg->avl     << 20;
6458         flags |= seg->present << 15;
6459         flags |= seg->dpl     << 13;
6460         flags |= seg->s       << 12;
6461         flags |= seg->type    << 8;
6462         return flags;
6463 }
6464
6465 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
6466 {
6467         struct kvm_segment seg;
6468         int offset;
6469
6470         kvm_get_segment(vcpu, &seg, n);
6471         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
6472
6473         if (n < 3)
6474                 offset = 0x7f84 + n * 12;
6475         else
6476                 offset = 0x7f2c + (n - 3) * 12;
6477
6478         put_smstate(u32, buf, offset + 8, seg.base);
6479         put_smstate(u32, buf, offset + 4, seg.limit);
6480         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
6481 }
6482
6483 #ifdef CONFIG_X86_64
6484 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
6485 {
6486         struct kvm_segment seg;
6487         int offset;
6488         u16 flags;
6489
6490         kvm_get_segment(vcpu, &seg, n);
6491         offset = 0x7e00 + n * 16;
6492
6493         flags = enter_smm_get_segment_flags(&seg) >> 8;
6494         put_smstate(u16, buf, offset, seg.selector);
6495         put_smstate(u16, buf, offset + 2, flags);
6496         put_smstate(u32, buf, offset + 4, seg.limit);
6497         put_smstate(u64, buf, offset + 8, seg.base);
6498 }
6499 #endif
6500
6501 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6502 {
6503         struct desc_ptr dt;
6504         struct kvm_segment seg;
6505         unsigned long val;
6506         int i;
6507
6508         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6509         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6510         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6511         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6512
6513         for (i = 0; i < 8; i++)
6514                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6515
6516         kvm_get_dr(vcpu, 6, &val);
6517         put_smstate(u32, buf, 0x7fcc, (u32)val);
6518         kvm_get_dr(vcpu, 7, &val);
6519         put_smstate(u32, buf, 0x7fc8, (u32)val);
6520
6521         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6522         put_smstate(u32, buf, 0x7fc4, seg.selector);
6523         put_smstate(u32, buf, 0x7f64, seg.base);
6524         put_smstate(u32, buf, 0x7f60, seg.limit);
6525         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
6526
6527         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6528         put_smstate(u32, buf, 0x7fc0, seg.selector);
6529         put_smstate(u32, buf, 0x7f80, seg.base);
6530         put_smstate(u32, buf, 0x7f7c, seg.limit);
6531         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
6532
6533         kvm_x86_ops->get_gdt(vcpu, &dt);
6534         put_smstate(u32, buf, 0x7f74, dt.address);
6535         put_smstate(u32, buf, 0x7f70, dt.size);
6536
6537         kvm_x86_ops->get_idt(vcpu, &dt);
6538         put_smstate(u32, buf, 0x7f58, dt.address);
6539         put_smstate(u32, buf, 0x7f54, dt.size);
6540
6541         for (i = 0; i < 6; i++)
6542                 enter_smm_save_seg_32(vcpu, buf, i);
6543
6544         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6545
6546         /* revision id */
6547         put_smstate(u32, buf, 0x7efc, 0x00020000);
6548         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6549 }
6550
6551 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6552 {
6553 #ifdef CONFIG_X86_64
6554         struct desc_ptr dt;
6555         struct kvm_segment seg;
6556         unsigned long val;
6557         int i;
6558
6559         for (i = 0; i < 16; i++)
6560                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6561
6562         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6563         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6564
6565         kvm_get_dr(vcpu, 6, &val);
6566         put_smstate(u64, buf, 0x7f68, val);
6567         kvm_get_dr(vcpu, 7, &val);
6568         put_smstate(u64, buf, 0x7f60, val);
6569
6570         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6571         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6572         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6573
6574         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6575
6576         /* revision id */
6577         put_smstate(u32, buf, 0x7efc, 0x00020064);
6578
6579         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6580
6581         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6582         put_smstate(u16, buf, 0x7e90, seg.selector);
6583         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
6584         put_smstate(u32, buf, 0x7e94, seg.limit);
6585         put_smstate(u64, buf, 0x7e98, seg.base);
6586
6587         kvm_x86_ops->get_idt(vcpu, &dt);
6588         put_smstate(u32, buf, 0x7e84, dt.size);
6589         put_smstate(u64, buf, 0x7e88, dt.address);
6590
6591         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6592         put_smstate(u16, buf, 0x7e70, seg.selector);
6593         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
6594         put_smstate(u32, buf, 0x7e74, seg.limit);
6595         put_smstate(u64, buf, 0x7e78, seg.base);
6596
6597         kvm_x86_ops->get_gdt(vcpu, &dt);
6598         put_smstate(u32, buf, 0x7e64, dt.size);
6599         put_smstate(u64, buf, 0x7e68, dt.address);
6600
6601         for (i = 0; i < 6; i++)
6602                 enter_smm_save_seg_64(vcpu, buf, i);
6603 #else
6604         WARN_ON_ONCE(1);
6605 #endif
6606 }
6607
6608 static void enter_smm(struct kvm_vcpu *vcpu)
6609 {
6610         struct kvm_segment cs, ds;
6611         struct desc_ptr dt;
6612         char buf[512];
6613         u32 cr0;
6614
6615         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6616         vcpu->arch.hflags |= HF_SMM_MASK;
6617         memset(buf, 0, 512);
6618         if (guest_cpuid_has_longmode(vcpu))
6619                 enter_smm_save_state_64(vcpu, buf);
6620         else
6621                 enter_smm_save_state_32(vcpu, buf);
6622
6623         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6624
6625         if (kvm_x86_ops->get_nmi_mask(vcpu))
6626                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6627         else
6628                 kvm_x86_ops->set_nmi_mask(vcpu, true);
6629
6630         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6631         kvm_rip_write(vcpu, 0x8000);
6632
6633         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6634         kvm_x86_ops->set_cr0(vcpu, cr0);
6635         vcpu->arch.cr0 = cr0;
6636
6637         kvm_x86_ops->set_cr4(vcpu, 0);
6638
6639         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
6640         dt.address = dt.size = 0;
6641         kvm_x86_ops->set_idt(vcpu, &dt);
6642
6643         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6644
6645         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6646         cs.base = vcpu->arch.smbase;
6647
6648         ds.selector = 0;
6649         ds.base = 0;
6650
6651         cs.limit    = ds.limit = 0xffffffff;
6652         cs.type     = ds.type = 0x3;
6653         cs.dpl      = ds.dpl = 0;
6654         cs.db       = ds.db = 0;
6655         cs.s        = ds.s = 1;
6656         cs.l        = ds.l = 0;
6657         cs.g        = ds.g = 1;
6658         cs.avl      = ds.avl = 0;
6659         cs.present  = ds.present = 1;
6660         cs.unusable = ds.unusable = 0;
6661         cs.padding  = ds.padding = 0;
6662
6663         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6664         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6665         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6666         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
6667         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
6668         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
6669
6670         if (guest_cpuid_has_longmode(vcpu))
6671                 kvm_x86_ops->set_efer(vcpu, 0);
6672
6673         kvm_update_cpuid(vcpu);
6674         kvm_mmu_reset_context(vcpu);
6675 }
6676
6677 static void process_smi(struct kvm_vcpu *vcpu)
6678 {
6679         vcpu->arch.smi_pending = true;
6680         kvm_make_request(KVM_REQ_EVENT, vcpu);
6681 }
6682
6683 void kvm_make_scan_ioapic_request(struct kvm *kvm)
6684 {
6685         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
6686 }
6687
6688 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6689 {
6690         u64 eoi_exit_bitmap[4];
6691
6692         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6693                 return;
6694
6695         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
6696
6697         if (irqchip_split(vcpu->kvm))
6698                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
6699         else {
6700                 if (kvm_x86_ops->sync_pir_to_irr && vcpu->arch.apicv_active)
6701                         kvm_x86_ops->sync_pir_to_irr(vcpu);
6702                 kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
6703         }
6704         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
6705                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
6706         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
6707 }
6708
6709 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6710 {
6711         ++vcpu->stat.tlb_flush;
6712         kvm_x86_ops->tlb_flush(vcpu);
6713 }
6714
6715 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6716 {
6717         struct page *page = NULL;
6718
6719         if (!lapic_in_kernel(vcpu))
6720                 return;
6721
6722         if (!kvm_x86_ops->set_apic_access_page_addr)
6723                 return;
6724
6725         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6726         if (is_error_page(page))
6727                 return;
6728         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6729
6730         /*
6731          * Do not pin apic access page in memory, the MMU notifier
6732          * will call us again if it is migrated or swapped out.
6733          */
6734         put_page(page);
6735 }
6736 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6737
6738 /*
6739  * Returns 1 to let vcpu_run() continue the guest execution loop without
6740  * exiting to the userspace.  Otherwise, the value will be returned to the
6741  * userspace.
6742  */
6743 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6744 {
6745         int r;
6746         bool req_int_win =
6747                 dm_request_for_irq_injection(vcpu) &&
6748                 kvm_cpu_accept_dm_intr(vcpu);
6749
6750         bool req_immediate_exit = false;
6751
6752         if (kvm_request_pending(vcpu)) {
6753                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6754                         kvm_mmu_unload(vcpu);
6755                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6756                         __kvm_migrate_timers(vcpu);
6757                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6758                         kvm_gen_update_masterclock(vcpu->kvm);
6759                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6760                         kvm_gen_kvmclock_update(vcpu);
6761                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6762                         r = kvm_guest_time_update(vcpu);
6763                         if (unlikely(r))
6764                                 goto out;
6765                 }
6766                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6767                         kvm_mmu_sync_roots(vcpu);
6768                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6769                         kvm_vcpu_flush_tlb(vcpu);
6770                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6771                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6772                         r = 0;
6773                         goto out;
6774                 }
6775                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6776                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6777                         r = 0;
6778                         goto out;
6779                 }
6780                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6781                         /* Page is swapped out. Do synthetic halt */
6782                         vcpu->arch.apf.halted = true;
6783                         r = 1;
6784                         goto out;
6785                 }
6786                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6787                         record_steal_time(vcpu);
6788                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
6789                         process_smi(vcpu);
6790                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6791                         process_nmi(vcpu);
6792                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6793                         kvm_pmu_handle_event(vcpu);
6794                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6795                         kvm_pmu_deliver_pmi(vcpu);
6796                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
6797                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
6798                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
6799                                      vcpu->arch.ioapic_handled_vectors)) {
6800                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
6801                                 vcpu->run->eoi.vector =
6802                                                 vcpu->arch.pending_ioapic_eoi;
6803                                 r = 0;
6804                                 goto out;
6805                         }
6806                 }
6807                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6808                         vcpu_scan_ioapic(vcpu);
6809                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6810                         kvm_vcpu_reload_apic_access_page(vcpu);
6811                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
6812                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6813                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
6814                         r = 0;
6815                         goto out;
6816                 }
6817                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
6818                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6819                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
6820                         r = 0;
6821                         goto out;
6822                 }
6823                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
6824                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
6825                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
6826                         r = 0;
6827                         goto out;
6828                 }
6829
6830                 /*
6831                  * KVM_REQ_HV_STIMER has to be processed after
6832                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
6833                  * depend on the guest clock being up-to-date
6834                  */
6835                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
6836                         kvm_hv_process_stimers(vcpu);
6837         }
6838
6839         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6840                 ++vcpu->stat.req_event;
6841                 kvm_apic_accept_events(vcpu);
6842                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6843                         r = 1;
6844                         goto out;
6845                 }
6846
6847                 if (inject_pending_event(vcpu, req_int_win) != 0)
6848                         req_immediate_exit = true;
6849                 else {
6850                         /* Enable NMI/IRQ window open exits if needed.
6851                          *
6852                          * SMIs have two cases: 1) they can be nested, and
6853                          * then there is nothing to do here because RSM will
6854                          * cause a vmexit anyway; 2) or the SMI can be pending
6855                          * because inject_pending_event has completed the
6856                          * injection of an IRQ or NMI from the previous vmexit,
6857                          * and then we request an immediate exit to inject the SMI.
6858                          */
6859                         if (vcpu->arch.smi_pending && !is_smm(vcpu))
6860                                 req_immediate_exit = true;
6861                         if (vcpu->arch.nmi_pending)
6862                                 kvm_x86_ops->enable_nmi_window(vcpu);
6863                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6864                                 kvm_x86_ops->enable_irq_window(vcpu);
6865                 }
6866
6867                 if (kvm_lapic_enabled(vcpu)) {
6868                         update_cr8_intercept(vcpu);
6869                         kvm_lapic_sync_to_vapic(vcpu);
6870                 }
6871         }
6872
6873         r = kvm_mmu_reload(vcpu);
6874         if (unlikely(r)) {
6875                 goto cancel_injection;
6876         }
6877
6878         preempt_disable();
6879
6880         kvm_x86_ops->prepare_guest_switch(vcpu);
6881         kvm_load_guest_fpu(vcpu);
6882
6883         /*
6884          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
6885          * IPI are then delayed after guest entry, which ensures that they
6886          * result in virtual interrupt delivery.
6887          */
6888         local_irq_disable();
6889         vcpu->mode = IN_GUEST_MODE;
6890
6891         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6892
6893         /*
6894          * 1) We should set ->mode before checking ->requests.  Please see
6895          * the comment in kvm_vcpu_exiting_guest_mode().
6896          *
6897          * 2) For APICv, we should set ->mode before checking PIR.ON.  This
6898          * pairs with the memory barrier implicit in pi_test_and_set_on
6899          * (see vmx_deliver_posted_interrupt).
6900          *
6901          * 3) This also orders the write to mode from any reads to the page
6902          * tables done while the VCPU is running.  Please see the comment
6903          * in kvm_flush_remote_tlbs.
6904          */
6905         smp_mb__after_srcu_read_unlock();
6906
6907         /*
6908          * This handles the case where a posted interrupt was
6909          * notified with kvm_vcpu_kick.
6910          */
6911         if (kvm_lapic_enabled(vcpu)) {
6912                 if (kvm_x86_ops->sync_pir_to_irr && vcpu->arch.apicv_active)
6913                         kvm_x86_ops->sync_pir_to_irr(vcpu);
6914         }
6915
6916         if (vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu)
6917             || need_resched() || signal_pending(current)) {
6918                 vcpu->mode = OUTSIDE_GUEST_MODE;
6919                 smp_wmb();
6920                 local_irq_enable();
6921                 preempt_enable();
6922                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6923                 r = 1;
6924                 goto cancel_injection;
6925         }
6926
6927         kvm_load_guest_xcr0(vcpu);
6928
6929         if (req_immediate_exit) {
6930                 kvm_make_request(KVM_REQ_EVENT, vcpu);
6931                 smp_send_reschedule(vcpu->cpu);
6932         }
6933
6934         trace_kvm_entry(vcpu->vcpu_id);
6935         wait_lapic_expire(vcpu);
6936         guest_enter_irqoff();
6937
6938         if (unlikely(vcpu->arch.switch_db_regs)) {
6939                 set_debugreg(0, 7);
6940                 set_debugreg(vcpu->arch.eff_db[0], 0);
6941                 set_debugreg(vcpu->arch.eff_db[1], 1);
6942                 set_debugreg(vcpu->arch.eff_db[2], 2);
6943                 set_debugreg(vcpu->arch.eff_db[3], 3);
6944                 set_debugreg(vcpu->arch.dr6, 6);
6945                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6946         }
6947
6948         kvm_x86_ops->run(vcpu);
6949
6950         /*
6951          * Do this here before restoring debug registers on the host.  And
6952          * since we do this before handling the vmexit, a DR access vmexit
6953          * can (a) read the correct value of the debug registers, (b) set
6954          * KVM_DEBUGREG_WONT_EXIT again.
6955          */
6956         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6957                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6958                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6959                 kvm_update_dr0123(vcpu);
6960                 kvm_update_dr6(vcpu);
6961                 kvm_update_dr7(vcpu);
6962                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6963         }
6964
6965         /*
6966          * If the guest has used debug registers, at least dr7
6967          * will be disabled while returning to the host.
6968          * If we don't have active breakpoints in the host, we don't
6969          * care about the messed up debug address registers. But if
6970          * we have some of them active, restore the old state.
6971          */
6972         if (hw_breakpoint_active())
6973                 hw_breakpoint_restore();
6974
6975         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
6976
6977         vcpu->mode = OUTSIDE_GUEST_MODE;
6978         smp_wmb();
6979
6980         kvm_put_guest_xcr0(vcpu);
6981
6982         kvm_x86_ops->handle_external_intr(vcpu);
6983
6984         ++vcpu->stat.exits;
6985
6986         guest_exit_irqoff();
6987
6988         local_irq_enable();
6989         preempt_enable();
6990
6991         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6992
6993         /*
6994          * Profile KVM exit RIPs:
6995          */
6996         if (unlikely(prof_on == KVM_PROFILING)) {
6997                 unsigned long rip = kvm_rip_read(vcpu);
6998                 profile_hit(KVM_PROFILING, (void *)rip);
6999         }
7000
7001         if (unlikely(vcpu->arch.tsc_always_catchup))
7002                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7003
7004         if (vcpu->arch.apic_attention)
7005                 kvm_lapic_sync_from_vapic(vcpu);
7006
7007         r = kvm_x86_ops->handle_exit(vcpu);
7008         return r;
7009
7010 cancel_injection:
7011         kvm_x86_ops->cancel_injection(vcpu);
7012         if (unlikely(vcpu->arch.apic_attention))
7013                 kvm_lapic_sync_from_vapic(vcpu);
7014 out:
7015         return r;
7016 }
7017
7018 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
7019 {
7020         if (!kvm_arch_vcpu_runnable(vcpu) &&
7021             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
7022                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7023                 kvm_vcpu_block(vcpu);
7024                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7025
7026                 if (kvm_x86_ops->post_block)
7027                         kvm_x86_ops->post_block(vcpu);
7028
7029                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
7030                         return 1;
7031         }
7032
7033         kvm_apic_accept_events(vcpu);
7034         switch(vcpu->arch.mp_state) {
7035         case KVM_MP_STATE_HALTED:
7036                 vcpu->arch.pv.pv_unhalted = false;
7037                 vcpu->arch.mp_state =
7038                         KVM_MP_STATE_RUNNABLE;
7039         case KVM_MP_STATE_RUNNABLE:
7040                 vcpu->arch.apf.halted = false;
7041                 break;
7042         case KVM_MP_STATE_INIT_RECEIVED:
7043                 break;
7044         default:
7045                 return -EINTR;
7046                 break;
7047         }
7048         return 1;
7049 }
7050
7051 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
7052 {
7053         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
7054                 kvm_x86_ops->check_nested_events(vcpu, false);
7055
7056         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7057                 !vcpu->arch.apf.halted);
7058 }
7059
7060 static int vcpu_run(struct kvm_vcpu *vcpu)
7061 {
7062         int r;
7063         struct kvm *kvm = vcpu->kvm;
7064
7065         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7066
7067         for (;;) {
7068                 if (kvm_vcpu_running(vcpu)) {
7069                         r = vcpu_enter_guest(vcpu);
7070                 } else {
7071                         r = vcpu_block(kvm, vcpu);
7072                 }
7073
7074                 if (r <= 0)
7075                         break;
7076
7077                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
7078                 if (kvm_cpu_has_pending_timer(vcpu))
7079                         kvm_inject_pending_timer_irqs(vcpu);
7080
7081                 if (dm_request_for_irq_injection(vcpu) &&
7082                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
7083                         r = 0;
7084                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
7085                         ++vcpu->stat.request_irq_exits;
7086                         break;
7087                 }
7088
7089                 kvm_check_async_pf_completion(vcpu);
7090
7091                 if (signal_pending(current)) {
7092                         r = -EINTR;
7093                         vcpu->run->exit_reason = KVM_EXIT_INTR;
7094                         ++vcpu->stat.signal_exits;
7095                         break;
7096                 }
7097                 if (need_resched()) {
7098                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7099                         cond_resched();
7100                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7101                 }
7102         }
7103
7104         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7105
7106         return r;
7107 }
7108
7109 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
7110 {
7111         int r;
7112         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7113         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
7114         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
7115         if (r != EMULATE_DONE)
7116                 return 0;
7117         return 1;
7118 }
7119
7120 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
7121 {
7122         BUG_ON(!vcpu->arch.pio.count);
7123
7124         return complete_emulated_io(vcpu);
7125 }
7126
7127 /*
7128  * Implements the following, as a state machine:
7129  *
7130  * read:
7131  *   for each fragment
7132  *     for each mmio piece in the fragment
7133  *       write gpa, len
7134  *       exit
7135  *       copy data
7136  *   execute insn
7137  *
7138  * write:
7139  *   for each fragment
7140  *     for each mmio piece in the fragment
7141  *       write gpa, len
7142  *       copy data
7143  *       exit
7144  */
7145 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
7146 {
7147         struct kvm_run *run = vcpu->run;
7148         struct kvm_mmio_fragment *frag;
7149         unsigned len;
7150
7151         BUG_ON(!vcpu->mmio_needed);
7152
7153         /* Complete previous fragment */
7154         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
7155         len = min(8u, frag->len);
7156         if (!vcpu->mmio_is_write)
7157                 memcpy(frag->data, run->mmio.data, len);
7158
7159         if (frag->len <= 8) {
7160                 /* Switch to the next fragment. */
7161                 frag++;
7162                 vcpu->mmio_cur_fragment++;
7163         } else {
7164                 /* Go forward to the next mmio piece. */
7165                 frag->data += len;
7166                 frag->gpa += len;
7167                 frag->len -= len;
7168         }
7169
7170         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
7171                 vcpu->mmio_needed = 0;
7172
7173                 /* FIXME: return into emulator if single-stepping.  */
7174                 if (vcpu->mmio_is_write)
7175                         return 1;
7176                 vcpu->mmio_read_completed = 1;
7177                 return complete_emulated_io(vcpu);
7178         }
7179
7180         run->exit_reason = KVM_EXIT_MMIO;
7181         run->mmio.phys_addr = frag->gpa;
7182         if (vcpu->mmio_is_write)
7183                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
7184         run->mmio.len = min(8u, frag->len);
7185         run->mmio.is_write = vcpu->mmio_is_write;
7186         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7187         return 0;
7188 }
7189
7190
7191 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
7192 {
7193         struct fpu *fpu = &current->thread.fpu;
7194         int r;
7195         sigset_t sigsaved;
7196
7197         fpu__activate_curr(fpu);
7198
7199         if (vcpu->sigset_active)
7200                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
7201
7202         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
7203                 kvm_vcpu_block(vcpu);
7204                 kvm_apic_accept_events(vcpu);
7205                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
7206                 r = -EAGAIN;
7207                 goto out;
7208         }
7209
7210         /* re-sync apic's tpr */
7211         if (!lapic_in_kernel(vcpu)) {
7212                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
7213                         r = -EINVAL;
7214                         goto out;
7215                 }
7216         }
7217
7218         if (unlikely(vcpu->arch.complete_userspace_io)) {
7219                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
7220                 vcpu->arch.complete_userspace_io = NULL;
7221                 r = cui(vcpu);
7222                 if (r <= 0)
7223                         goto out;
7224         } else
7225                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
7226
7227         if (kvm_run->immediate_exit)
7228                 r = -EINTR;
7229         else
7230                 r = vcpu_run(vcpu);
7231
7232 out:
7233         post_kvm_run_save(vcpu);
7234         if (vcpu->sigset_active)
7235                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
7236
7237         return r;
7238 }
7239
7240 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7241 {
7242         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
7243                 /*
7244                  * We are here if userspace calls get_regs() in the middle of
7245                  * instruction emulation. Registers state needs to be copied
7246                  * back from emulation context to vcpu. Userspace shouldn't do
7247                  * that usually, but some bad designed PV devices (vmware
7248                  * backdoor interface) need this to work
7249                  */
7250                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
7251                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7252         }
7253         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
7254         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
7255         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
7256         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
7257         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
7258         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
7259         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
7260         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
7261 #ifdef CONFIG_X86_64
7262         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
7263         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
7264         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
7265         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
7266         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
7267         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
7268         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
7269         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
7270 #endif
7271
7272         regs->rip = kvm_rip_read(vcpu);
7273         regs->rflags = kvm_get_rflags(vcpu);
7274
7275         return 0;
7276 }
7277
7278 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7279 {
7280         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
7281         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7282
7283         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
7284         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
7285         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
7286         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
7287         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
7288         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
7289         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
7290         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
7291 #ifdef CONFIG_X86_64
7292         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
7293         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
7294         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
7295         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
7296         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
7297         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
7298         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
7299         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
7300 #endif
7301
7302         kvm_rip_write(vcpu, regs->rip);
7303         kvm_set_rflags(vcpu, regs->rflags);
7304
7305         vcpu->arch.exception.pending = false;
7306
7307         kvm_make_request(KVM_REQ_EVENT, vcpu);
7308
7309         return 0;
7310 }
7311
7312 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
7313 {
7314         struct kvm_segment cs;
7315
7316         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7317         *db = cs.db;
7318         *l = cs.l;
7319 }
7320 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
7321
7322 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
7323                                   struct kvm_sregs *sregs)
7324 {
7325         struct desc_ptr dt;
7326
7327         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7328         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7329         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7330         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7331         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7332         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7333
7334         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7335         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7336
7337         kvm_x86_ops->get_idt(vcpu, &dt);
7338         sregs->idt.limit = dt.size;
7339         sregs->idt.base = dt.address;
7340         kvm_x86_ops->get_gdt(vcpu, &dt);
7341         sregs->gdt.limit = dt.size;
7342         sregs->gdt.base = dt.address;
7343
7344         sregs->cr0 = kvm_read_cr0(vcpu);
7345         sregs->cr2 = vcpu->arch.cr2;
7346         sregs->cr3 = kvm_read_cr3(vcpu);
7347         sregs->cr4 = kvm_read_cr4(vcpu);
7348         sregs->cr8 = kvm_get_cr8(vcpu);
7349         sregs->efer = vcpu->arch.efer;
7350         sregs->apic_base = kvm_get_apic_base(vcpu);
7351
7352         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
7353
7354         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
7355                 set_bit(vcpu->arch.interrupt.nr,
7356                         (unsigned long *)sregs->interrupt_bitmap);
7357
7358         return 0;
7359 }
7360
7361 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
7362                                     struct kvm_mp_state *mp_state)
7363 {
7364         kvm_apic_accept_events(vcpu);
7365         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
7366                                         vcpu->arch.pv.pv_unhalted)
7367                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
7368         else
7369                 mp_state->mp_state = vcpu->arch.mp_state;
7370
7371         return 0;
7372 }
7373
7374 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
7375                                     struct kvm_mp_state *mp_state)
7376 {
7377         if (!lapic_in_kernel(vcpu) &&
7378             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
7379                 return -EINVAL;
7380
7381         /* INITs are latched while in SMM */
7382         if ((is_smm(vcpu) || vcpu->arch.smi_pending) &&
7383             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
7384              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
7385                 return -EINVAL;
7386
7387         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
7388                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
7389                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
7390         } else
7391                 vcpu->arch.mp_state = mp_state->mp_state;
7392         kvm_make_request(KVM_REQ_EVENT, vcpu);
7393         return 0;
7394 }
7395
7396 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
7397                     int reason, bool has_error_code, u32 error_code)
7398 {
7399         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
7400         int ret;
7401
7402         init_emulate_ctxt(vcpu);
7403
7404         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
7405                                    has_error_code, error_code);
7406
7407         if (ret)
7408                 return EMULATE_FAIL;
7409
7410         kvm_rip_write(vcpu, ctxt->eip);
7411         kvm_set_rflags(vcpu, ctxt->eflags);
7412         kvm_make_request(KVM_REQ_EVENT, vcpu);
7413         return EMULATE_DONE;
7414 }
7415 EXPORT_SYMBOL_GPL(kvm_task_switch);
7416
7417 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
7418                                   struct kvm_sregs *sregs)
7419 {
7420         struct msr_data apic_base_msr;
7421         int mmu_reset_needed = 0;
7422         int pending_vec, max_bits, idx;
7423         struct desc_ptr dt;
7424
7425         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
7426                 return -EINVAL;
7427
7428         dt.size = sregs->idt.limit;
7429         dt.address = sregs->idt.base;
7430         kvm_x86_ops->set_idt(vcpu, &dt);
7431         dt.size = sregs->gdt.limit;
7432         dt.address = sregs->gdt.base;
7433         kvm_x86_ops->set_gdt(vcpu, &dt);
7434
7435         vcpu->arch.cr2 = sregs->cr2;
7436         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
7437         vcpu->arch.cr3 = sregs->cr3;
7438         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
7439
7440         kvm_set_cr8(vcpu, sregs->cr8);
7441
7442         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
7443         kvm_x86_ops->set_efer(vcpu, sregs->efer);
7444         apic_base_msr.data = sregs->apic_base;
7445         apic_base_msr.host_initiated = true;
7446         kvm_set_apic_base(vcpu, &apic_base_msr);
7447
7448         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
7449         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
7450         vcpu->arch.cr0 = sregs->cr0;
7451
7452         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
7453         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
7454         if (sregs->cr4 & (X86_CR4_OSXSAVE | X86_CR4_PKE))
7455                 kvm_update_cpuid(vcpu);
7456
7457         idx = srcu_read_lock(&vcpu->kvm->srcu);
7458         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
7459                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
7460                 mmu_reset_needed = 1;
7461         }
7462         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7463
7464         if (mmu_reset_needed)
7465                 kvm_mmu_reset_context(vcpu);
7466
7467         max_bits = KVM_NR_INTERRUPTS;
7468         pending_vec = find_first_bit(
7469                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
7470         if (pending_vec < max_bits) {
7471                 kvm_queue_interrupt(vcpu, pending_vec, false);
7472                 pr_debug("Set back pending irq %d\n", pending_vec);
7473         }
7474
7475         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7476         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7477         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7478         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7479         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7480         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7481
7482         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7483         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7484
7485         update_cr8_intercept(vcpu);
7486
7487         /* Older userspace won't unhalt the vcpu on reset. */
7488         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
7489             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
7490             !is_protmode(vcpu))
7491                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7492
7493         kvm_make_request(KVM_REQ_EVENT, vcpu);
7494
7495         return 0;
7496 }
7497
7498 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
7499                                         struct kvm_guest_debug *dbg)
7500 {
7501         unsigned long rflags;
7502         int i, r;
7503
7504         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
7505                 r = -EBUSY;
7506                 if (vcpu->arch.exception.pending)
7507                         goto out;
7508                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
7509                         kvm_queue_exception(vcpu, DB_VECTOR);
7510                 else
7511                         kvm_queue_exception(vcpu, BP_VECTOR);
7512         }
7513
7514         /*
7515          * Read rflags as long as potentially injected trace flags are still
7516          * filtered out.
7517          */
7518         rflags = kvm_get_rflags(vcpu);
7519
7520         vcpu->guest_debug = dbg->control;
7521         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
7522                 vcpu->guest_debug = 0;
7523
7524         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
7525                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
7526                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
7527                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
7528         } else {
7529                 for (i = 0; i < KVM_NR_DB_REGS; i++)
7530                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
7531         }
7532         kvm_update_dr7(vcpu);
7533
7534         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7535                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
7536                         get_segment_base(vcpu, VCPU_SREG_CS);
7537
7538         /*
7539          * Trigger an rflags update that will inject or remove the trace
7540          * flags.
7541          */
7542         kvm_set_rflags(vcpu, rflags);
7543
7544         kvm_x86_ops->update_bp_intercept(vcpu);
7545
7546         r = 0;
7547
7548 out:
7549
7550         return r;
7551 }
7552
7553 /*
7554  * Translate a guest virtual address to a guest physical address.
7555  */
7556 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
7557                                     struct kvm_translation *tr)
7558 {
7559         unsigned long vaddr = tr->linear_address;
7560         gpa_t gpa;
7561         int idx;
7562
7563         idx = srcu_read_lock(&vcpu->kvm->srcu);
7564         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
7565         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7566         tr->physical_address = gpa;
7567         tr->valid = gpa != UNMAPPED_GVA;
7568         tr->writeable = 1;
7569         tr->usermode = 0;
7570
7571         return 0;
7572 }
7573
7574 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7575 {
7576         struct fxregs_state *fxsave =
7577                         &vcpu->arch.guest_fpu.state.fxsave;
7578
7579         memcpy(fpu->fpr, fxsave->st_space, 128);
7580         fpu->fcw = fxsave->cwd;
7581         fpu->fsw = fxsave->swd;
7582         fpu->ftwx = fxsave->twd;
7583         fpu->last_opcode = fxsave->fop;
7584         fpu->last_ip = fxsave->rip;
7585         fpu->last_dp = fxsave->rdp;
7586         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
7587
7588         return 0;
7589 }
7590
7591 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7592 {
7593         struct fxregs_state *fxsave =
7594                         &vcpu->arch.guest_fpu.state.fxsave;
7595
7596         memcpy(fxsave->st_space, fpu->fpr, 128);
7597         fxsave->cwd = fpu->fcw;
7598         fxsave->swd = fpu->fsw;
7599         fxsave->twd = fpu->ftwx;
7600         fxsave->fop = fpu->last_opcode;
7601         fxsave->rip = fpu->last_ip;
7602         fxsave->rdp = fpu->last_dp;
7603         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
7604
7605         return 0;
7606 }
7607
7608 static void fx_init(struct kvm_vcpu *vcpu)
7609 {
7610         fpstate_init(&vcpu->arch.guest_fpu.state);
7611         if (boot_cpu_has(X86_FEATURE_XSAVES))
7612                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
7613                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
7614
7615         /*
7616          * Ensure guest xcr0 is valid for loading
7617          */
7618         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
7619
7620         vcpu->arch.cr0 |= X86_CR0_ET;
7621 }
7622
7623 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7624 {
7625         if (vcpu->guest_fpu_loaded)
7626                 return;
7627
7628         /*
7629          * Restore all possible states in the guest,
7630          * and assume host would use all available bits.
7631          * Guest xcr0 would be loaded later.
7632          */
7633         vcpu->guest_fpu_loaded = 1;
7634         __kernel_fpu_begin();
7635         /* PKRU is separately restored in kvm_x86_ops->run.  */
7636         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state,
7637                                 ~XFEATURE_MASK_PKRU);
7638         trace_kvm_fpu(1);
7639 }
7640
7641 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7642 {
7643         if (!vcpu->guest_fpu_loaded)
7644                 return;
7645
7646         vcpu->guest_fpu_loaded = 0;
7647         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
7648         __kernel_fpu_end();
7649         ++vcpu->stat.fpu_reload;
7650         trace_kvm_fpu(0);
7651 }
7652
7653 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7654 {
7655         void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
7656
7657         kvmclock_reset(vcpu);
7658
7659         kvm_x86_ops->vcpu_free(vcpu);
7660         free_cpumask_var(wbinvd_dirty_mask);
7661 }
7662
7663 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7664                                                 unsigned int id)
7665 {
7666         struct kvm_vcpu *vcpu;
7667
7668         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7669                 printk_once(KERN_WARNING
7670                 "kvm: SMP vm created on host with unstable TSC; "
7671                 "guest TSC will not be reliable\n");
7672
7673         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
7674
7675         return vcpu;
7676 }
7677
7678 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7679 {
7680         int r;
7681
7682         kvm_vcpu_mtrr_init(vcpu);
7683         r = vcpu_load(vcpu);
7684         if (r)
7685                 return r;
7686         kvm_vcpu_reset(vcpu, false);
7687         kvm_mmu_setup(vcpu);
7688         vcpu_put(vcpu);
7689         return r;
7690 }
7691
7692 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7693 {
7694         struct msr_data msr;
7695         struct kvm *kvm = vcpu->kvm;
7696
7697         kvm_hv_vcpu_postcreate(vcpu);
7698
7699         if (vcpu_load(vcpu))
7700                 return;
7701         msr.data = 0x0;
7702         msr.index = MSR_IA32_TSC;
7703         msr.host_initiated = true;
7704         kvm_write_tsc(vcpu, &msr);
7705         vcpu_put(vcpu);
7706
7707         if (!kvmclock_periodic_sync)
7708                 return;
7709
7710         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7711                                         KVMCLOCK_SYNC_PERIOD);
7712 }
7713
7714 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7715 {
7716         int r;
7717         vcpu->arch.apf.msr_val = 0;
7718
7719         r = vcpu_load(vcpu);
7720         BUG_ON(r);
7721         kvm_mmu_unload(vcpu);
7722         vcpu_put(vcpu);
7723
7724         kvm_x86_ops->vcpu_free(vcpu);
7725 }
7726
7727 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
7728 {
7729         vcpu->arch.hflags = 0;
7730
7731         vcpu->arch.smi_pending = 0;
7732         atomic_set(&vcpu->arch.nmi_queued, 0);
7733         vcpu->arch.nmi_pending = 0;
7734         vcpu->arch.nmi_injected = false;
7735         kvm_clear_interrupt_queue(vcpu);
7736         kvm_clear_exception_queue(vcpu);
7737
7738         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7739         kvm_update_dr0123(vcpu);
7740         vcpu->arch.dr6 = DR6_INIT;
7741         kvm_update_dr6(vcpu);
7742         vcpu->arch.dr7 = DR7_FIXED_1;
7743         kvm_update_dr7(vcpu);
7744
7745         vcpu->arch.cr2 = 0;
7746
7747         kvm_make_request(KVM_REQ_EVENT, vcpu);
7748         vcpu->arch.apf.msr_val = 0;
7749         vcpu->arch.st.msr_val = 0;
7750
7751         kvmclock_reset(vcpu);
7752
7753         kvm_clear_async_pf_completion_queue(vcpu);
7754         kvm_async_pf_hash_reset(vcpu);
7755         vcpu->arch.apf.halted = false;
7756
7757         if (!init_event) {
7758                 kvm_pmu_reset(vcpu);
7759                 vcpu->arch.smbase = 0x30000;
7760
7761                 vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
7762                 vcpu->arch.msr_misc_features_enables = 0;
7763         }
7764
7765         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7766         vcpu->arch.regs_avail = ~0;
7767         vcpu->arch.regs_dirty = ~0;
7768
7769         kvm_x86_ops->vcpu_reset(vcpu, init_event);
7770 }
7771
7772 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7773 {
7774         struct kvm_segment cs;
7775
7776         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7777         cs.selector = vector << 8;
7778         cs.base = vector << 12;
7779         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7780         kvm_rip_write(vcpu, 0);
7781 }
7782
7783 int kvm_arch_hardware_enable(void)
7784 {
7785         struct kvm *kvm;
7786         struct kvm_vcpu *vcpu;
7787         int i;
7788         int ret;
7789         u64 local_tsc;
7790         u64 max_tsc = 0;
7791         bool stable, backwards_tsc = false;
7792
7793         kvm_shared_msr_cpu_online();
7794         ret = kvm_x86_ops->hardware_enable();
7795         if (ret != 0)
7796                 return ret;
7797
7798         local_tsc = rdtsc();
7799         stable = !check_tsc_unstable();
7800         list_for_each_entry(kvm, &vm_list, vm_list) {
7801                 kvm_for_each_vcpu(i, vcpu, kvm) {
7802                         if (!stable && vcpu->cpu == smp_processor_id())
7803                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7804                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7805                                 backwards_tsc = true;
7806                                 if (vcpu->arch.last_host_tsc > max_tsc)
7807                                         max_tsc = vcpu->arch.last_host_tsc;
7808                         }
7809                 }
7810         }
7811
7812         /*
7813          * Sometimes, even reliable TSCs go backwards.  This happens on
7814          * platforms that reset TSC during suspend or hibernate actions, but
7815          * maintain synchronization.  We must compensate.  Fortunately, we can
7816          * detect that condition here, which happens early in CPU bringup,
7817          * before any KVM threads can be running.  Unfortunately, we can't
7818          * bring the TSCs fully up to date with real time, as we aren't yet far
7819          * enough into CPU bringup that we know how much real time has actually
7820          * elapsed; our helper function, ktime_get_boot_ns() will be using boot
7821          * variables that haven't been updated yet.
7822          *
7823          * So we simply find the maximum observed TSC above, then record the
7824          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
7825          * the adjustment will be applied.  Note that we accumulate
7826          * adjustments, in case multiple suspend cycles happen before some VCPU
7827          * gets a chance to run again.  In the event that no KVM threads get a
7828          * chance to run, we will miss the entire elapsed period, as we'll have
7829          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7830          * loose cycle time.  This isn't too big a deal, since the loss will be
7831          * uniform across all VCPUs (not to mention the scenario is extremely
7832          * unlikely). It is possible that a second hibernate recovery happens
7833          * much faster than a first, causing the observed TSC here to be
7834          * smaller; this would require additional padding adjustment, which is
7835          * why we set last_host_tsc to the local tsc observed here.
7836          *
7837          * N.B. - this code below runs only on platforms with reliable TSC,
7838          * as that is the only way backwards_tsc is set above.  Also note
7839          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7840          * have the same delta_cyc adjustment applied if backwards_tsc
7841          * is detected.  Note further, this adjustment is only done once,
7842          * as we reset last_host_tsc on all VCPUs to stop this from being
7843          * called multiple times (one for each physical CPU bringup).
7844          *
7845          * Platforms with unreliable TSCs don't have to deal with this, they
7846          * will be compensated by the logic in vcpu_load, which sets the TSC to
7847          * catchup mode.  This will catchup all VCPUs to real time, but cannot
7848          * guarantee that they stay in perfect synchronization.
7849          */
7850         if (backwards_tsc) {
7851                 u64 delta_cyc = max_tsc - local_tsc;
7852                 list_for_each_entry(kvm, &vm_list, vm_list) {
7853                         kvm->arch.backwards_tsc_observed = true;
7854                         kvm_for_each_vcpu(i, vcpu, kvm) {
7855                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7856                                 vcpu->arch.last_host_tsc = local_tsc;
7857                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7858                         }
7859
7860                         /*
7861                          * We have to disable TSC offset matching.. if you were
7862                          * booting a VM while issuing an S4 host suspend....
7863                          * you may have some problem.  Solving this issue is
7864                          * left as an exercise to the reader.
7865                          */
7866                         kvm->arch.last_tsc_nsec = 0;
7867                         kvm->arch.last_tsc_write = 0;
7868                 }
7869
7870         }
7871         return 0;
7872 }
7873
7874 void kvm_arch_hardware_disable(void)
7875 {
7876         kvm_x86_ops->hardware_disable();
7877         drop_user_return_notifiers();
7878 }
7879
7880 int kvm_arch_hardware_setup(void)
7881 {
7882         int r;
7883
7884         r = kvm_x86_ops->hardware_setup();
7885         if (r != 0)
7886                 return r;
7887
7888         if (kvm_has_tsc_control) {
7889                 /*
7890                  * Make sure the user can only configure tsc_khz values that
7891                  * fit into a signed integer.
7892                  * A min value is not calculated needed because it will always
7893                  * be 1 on all machines.
7894                  */
7895                 u64 max = min(0x7fffffffULL,
7896                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
7897                 kvm_max_guest_tsc_khz = max;
7898
7899                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
7900         }
7901
7902         kvm_init_msr_list();
7903         return 0;
7904 }
7905
7906 void kvm_arch_hardware_unsetup(void)
7907 {
7908         kvm_x86_ops->hardware_unsetup();
7909 }
7910
7911 void kvm_arch_check_processor_compat(void *rtn)
7912 {
7913         kvm_x86_ops->check_processor_compatibility(rtn);
7914 }
7915
7916 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
7917 {
7918         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
7919 }
7920 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
7921
7922 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
7923 {
7924         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
7925 }
7926
7927 struct static_key kvm_no_apic_vcpu __read_mostly;
7928 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
7929
7930 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7931 {
7932         struct page *page;
7933         struct kvm *kvm;
7934         int r;
7935
7936         BUG_ON(vcpu->kvm == NULL);
7937         kvm = vcpu->kvm;
7938
7939         vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv();
7940         vcpu->arch.pv.pv_unhalted = false;
7941         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7942         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_reset_bsp(vcpu))
7943                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7944         else
7945                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7946
7947         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7948         if (!page) {
7949                 r = -ENOMEM;
7950                 goto fail;
7951         }
7952         vcpu->arch.pio_data = page_address(page);
7953
7954         kvm_set_tsc_khz(vcpu, max_tsc_khz);
7955
7956         r = kvm_mmu_create(vcpu);
7957         if (r < 0)
7958                 goto fail_free_pio_data;
7959
7960         if (irqchip_in_kernel(kvm)) {
7961                 r = kvm_create_lapic(vcpu);
7962                 if (r < 0)
7963                         goto fail_mmu_destroy;
7964         } else
7965                 static_key_slow_inc(&kvm_no_apic_vcpu);
7966
7967         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7968                                        GFP_KERNEL);
7969         if (!vcpu->arch.mce_banks) {
7970                 r = -ENOMEM;
7971                 goto fail_free_lapic;
7972         }
7973         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7974
7975         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7976                 r = -ENOMEM;
7977                 goto fail_free_mce_banks;
7978         }
7979
7980         fx_init(vcpu);
7981
7982         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7983         vcpu->arch.pv_time_enabled = false;
7984
7985         vcpu->arch.guest_supported_xcr0 = 0;
7986         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7987
7988         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
7989
7990         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
7991
7992         kvm_async_pf_hash_reset(vcpu);
7993         kvm_pmu_init(vcpu);
7994
7995         vcpu->arch.pending_external_vector = -1;
7996
7997         kvm_hv_vcpu_init(vcpu);
7998
7999         return 0;
8000
8001 fail_free_mce_banks:
8002         kfree(vcpu->arch.mce_banks);
8003 fail_free_lapic:
8004         kvm_free_lapic(vcpu);
8005 fail_mmu_destroy:
8006         kvm_mmu_destroy(vcpu);
8007 fail_free_pio_data:
8008         free_page((unsigned long)vcpu->arch.pio_data);
8009 fail:
8010         return r;
8011 }
8012
8013 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
8014 {
8015         int idx;
8016
8017         kvm_hv_vcpu_uninit(vcpu);
8018         kvm_pmu_destroy(vcpu);
8019         kfree(vcpu->arch.mce_banks);
8020         kvm_free_lapic(vcpu);
8021         idx = srcu_read_lock(&vcpu->kvm->srcu);
8022         kvm_mmu_destroy(vcpu);
8023         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8024         free_page((unsigned long)vcpu->arch.pio_data);
8025         if (!lapic_in_kernel(vcpu))
8026                 static_key_slow_dec(&kvm_no_apic_vcpu);
8027 }
8028
8029 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
8030 {
8031         kvm_x86_ops->sched_in(vcpu, cpu);
8032 }
8033
8034 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
8035 {
8036         if (type)
8037                 return -EINVAL;
8038
8039         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
8040         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
8041         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
8042         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
8043         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
8044
8045         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
8046         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
8047         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
8048         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
8049                 &kvm->arch.irq_sources_bitmap);
8050
8051         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
8052         mutex_init(&kvm->arch.apic_map_lock);
8053         mutex_init(&kvm->arch.hyperv.hv_lock);
8054         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
8055
8056         kvm->arch.kvmclock_offset = -ktime_get_boot_ns();
8057         pvclock_update_vm_gtod_copy(kvm);
8058
8059         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
8060         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
8061
8062         kvm_page_track_init(kvm);
8063         kvm_mmu_init_vm(kvm);
8064
8065         if (kvm_x86_ops->vm_init)
8066                 return kvm_x86_ops->vm_init(kvm);
8067
8068         return 0;
8069 }
8070
8071 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
8072 {
8073         int r;
8074         r = vcpu_load(vcpu);
8075         BUG_ON(r);
8076         kvm_mmu_unload(vcpu);
8077         vcpu_put(vcpu);
8078 }
8079
8080 static void kvm_free_vcpus(struct kvm *kvm)
8081 {
8082         unsigned int i;
8083         struct kvm_vcpu *vcpu;
8084
8085         /*
8086          * Unpin any mmu pages first.
8087          */
8088         kvm_for_each_vcpu(i, vcpu, kvm) {
8089                 kvm_clear_async_pf_completion_queue(vcpu);
8090                 kvm_unload_vcpu_mmu(vcpu);
8091         }
8092         kvm_for_each_vcpu(i, vcpu, kvm)
8093                 kvm_arch_vcpu_free(vcpu);
8094
8095         mutex_lock(&kvm->lock);
8096         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
8097                 kvm->vcpus[i] = NULL;
8098
8099         atomic_set(&kvm->online_vcpus, 0);
8100         mutex_unlock(&kvm->lock);
8101 }
8102
8103 void kvm_arch_sync_events(struct kvm *kvm)
8104 {
8105         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
8106         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
8107         kvm_free_pit(kvm);
8108 }
8109
8110 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
8111 {
8112         int i, r;
8113         unsigned long hva;
8114         struct kvm_memslots *slots = kvm_memslots(kvm);
8115         struct kvm_memory_slot *slot, old;
8116
8117         /* Called with kvm->slots_lock held.  */
8118         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
8119                 return -EINVAL;
8120
8121         slot = id_to_memslot(slots, id);
8122         if (size) {
8123                 if (slot->npages)
8124                         return -EEXIST;
8125
8126                 /*
8127                  * MAP_SHARED to prevent internal slot pages from being moved
8128                  * by fork()/COW.
8129                  */
8130                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
8131                               MAP_SHARED | MAP_ANONYMOUS, 0);
8132                 if (IS_ERR((void *)hva))
8133                         return PTR_ERR((void *)hva);
8134         } else {
8135                 if (!slot->npages)
8136                         return 0;
8137
8138                 hva = 0;
8139         }
8140
8141         old = *slot;
8142         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
8143                 struct kvm_userspace_memory_region m;
8144
8145                 m.slot = id | (i << 16);
8146                 m.flags = 0;
8147                 m.guest_phys_addr = gpa;
8148                 m.userspace_addr = hva;
8149                 m.memory_size = size;
8150                 r = __kvm_set_memory_region(kvm, &m);
8151                 if (r < 0)
8152                         return r;
8153         }
8154
8155         if (!size) {
8156                 r = vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
8157                 WARN_ON(r < 0);
8158         }
8159
8160         return 0;
8161 }
8162 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
8163
8164 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
8165 {
8166         int r;
8167
8168         mutex_lock(&kvm->slots_lock);
8169         r = __x86_set_memory_region(kvm, id, gpa, size);
8170         mutex_unlock(&kvm->slots_lock);
8171
8172         return r;
8173 }
8174 EXPORT_SYMBOL_GPL(x86_set_memory_region);
8175
8176 void kvm_arch_destroy_vm(struct kvm *kvm)
8177 {
8178         if (current->mm == kvm->mm) {
8179                 /*
8180                  * Free memory regions allocated on behalf of userspace,
8181                  * unless the the memory map has changed due to process exit
8182                  * or fd copying.
8183                  */
8184                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
8185                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
8186                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
8187         }
8188         if (kvm_x86_ops->vm_destroy)
8189                 kvm_x86_ops->vm_destroy(kvm);
8190         kvm_pic_destroy(kvm);
8191         kvm_ioapic_destroy(kvm);
8192         kvm_free_vcpus(kvm);
8193         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
8194         kvm_mmu_uninit_vm(kvm);
8195         kvm_page_track_cleanup(kvm);
8196 }
8197
8198 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
8199                            struct kvm_memory_slot *dont)
8200 {
8201         int i;
8202
8203         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8204                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
8205                         kvfree(free->arch.rmap[i]);
8206                         free->arch.rmap[i] = NULL;
8207                 }
8208                 if (i == 0)
8209                         continue;
8210
8211                 if (!dont || free->arch.lpage_info[i - 1] !=
8212                              dont->arch.lpage_info[i - 1]) {
8213                         kvfree(free->arch.lpage_info[i - 1]);
8214                         free->arch.lpage_info[i - 1] = NULL;
8215                 }
8216         }
8217
8218         kvm_page_track_free_memslot(free, dont);
8219 }
8220
8221 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
8222                             unsigned long npages)
8223 {
8224         int i;
8225
8226         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8227                 struct kvm_lpage_info *linfo;
8228                 unsigned long ugfn;
8229                 int lpages;
8230                 int level = i + 1;
8231
8232                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
8233                                       slot->base_gfn, level) + 1;
8234
8235                 slot->arch.rmap[i] =
8236                         kvzalloc(lpages * sizeof(*slot->arch.rmap[i]), GFP_KERNEL);
8237                 if (!slot->arch.rmap[i])
8238                         goto out_free;
8239                 if (i == 0)
8240                         continue;
8241
8242                 linfo = kvzalloc(lpages * sizeof(*linfo), GFP_KERNEL);
8243                 if (!linfo)
8244                         goto out_free;
8245
8246                 slot->arch.lpage_info[i - 1] = linfo;
8247
8248                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
8249                         linfo[0].disallow_lpage = 1;
8250                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
8251                         linfo[lpages - 1].disallow_lpage = 1;
8252                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
8253                 /*
8254                  * If the gfn and userspace address are not aligned wrt each
8255                  * other, or if explicitly asked to, disable large page
8256                  * support for this slot
8257                  */
8258                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
8259                     !kvm_largepages_enabled()) {
8260                         unsigned long j;
8261
8262                         for (j = 0; j < lpages; ++j)
8263                                 linfo[j].disallow_lpage = 1;
8264                 }
8265         }
8266
8267         if (kvm_page_track_create_memslot(slot, npages))
8268                 goto out_free;
8269
8270         return 0;
8271
8272 out_free:
8273         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8274                 kvfree(slot->arch.rmap[i]);
8275                 slot->arch.rmap[i] = NULL;
8276                 if (i == 0)
8277                         continue;
8278
8279                 kvfree(slot->arch.lpage_info[i - 1]);
8280                 slot->arch.lpage_info[i - 1] = NULL;
8281         }
8282         return -ENOMEM;
8283 }
8284
8285 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
8286 {
8287         /*
8288          * memslots->generation has been incremented.
8289          * mmio generation may have reached its maximum value.
8290          */
8291         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
8292 }
8293
8294 int kvm_arch_prepare_memory_region(struct kvm *kvm,
8295                                 struct kvm_memory_slot *memslot,
8296                                 const struct kvm_userspace_memory_region *mem,
8297                                 enum kvm_mr_change change)
8298 {
8299         return 0;
8300 }
8301
8302 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
8303                                      struct kvm_memory_slot *new)
8304 {
8305         /* Still write protect RO slot */
8306         if (new->flags & KVM_MEM_READONLY) {
8307                 kvm_mmu_slot_remove_write_access(kvm, new);
8308                 return;
8309         }
8310
8311         /*
8312          * Call kvm_x86_ops dirty logging hooks when they are valid.
8313          *
8314          * kvm_x86_ops->slot_disable_log_dirty is called when:
8315          *
8316          *  - KVM_MR_CREATE with dirty logging is disabled
8317          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8318          *
8319          * The reason is, in case of PML, we need to set D-bit for any slots
8320          * with dirty logging disabled in order to eliminate unnecessary GPA
8321          * logging in PML buffer (and potential PML buffer full VMEXT). This
8322          * guarantees leaving PML enabled during guest's lifetime won't have
8323          * any additonal overhead from PML when guest is running with dirty
8324          * logging disabled for memory slots.
8325          *
8326          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8327          * to dirty logging mode.
8328          *
8329          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8330          *
8331          * In case of write protect:
8332          *
8333          * Write protect all pages for dirty logging.
8334          *
8335          * All the sptes including the large sptes which point to this
8336          * slot are set to readonly. We can not create any new large
8337          * spte on this slot until the end of the logging.
8338          *
8339          * See the comments in fast_page_fault().
8340          */
8341         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
8342                 if (kvm_x86_ops->slot_enable_log_dirty)
8343                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
8344                 else
8345                         kvm_mmu_slot_remove_write_access(kvm, new);
8346         } else {
8347                 if (kvm_x86_ops->slot_disable_log_dirty)
8348                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
8349         }
8350 }
8351
8352 void kvm_arch_commit_memory_region(struct kvm *kvm,
8353                                 const struct kvm_userspace_memory_region *mem,
8354                                 const struct kvm_memory_slot *old,
8355                                 const struct kvm_memory_slot *new,
8356                                 enum kvm_mr_change change)
8357 {
8358         int nr_mmu_pages = 0;
8359
8360         if (!kvm->arch.n_requested_mmu_pages)
8361                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
8362
8363         if (nr_mmu_pages)
8364                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
8365
8366         /*
8367          * Dirty logging tracks sptes in 4k granularity, meaning that large
8368          * sptes have to be split.  If live migration is successful, the guest
8369          * in the source machine will be destroyed and large sptes will be
8370          * created in the destination. However, if the guest continues to run
8371          * in the source machine (for example if live migration fails), small
8372          * sptes will remain around and cause bad performance.
8373          *
8374          * Scan sptes if dirty logging has been stopped, dropping those
8375          * which can be collapsed into a single large-page spte.  Later
8376          * page faults will create the large-page sptes.
8377          */
8378         if ((change != KVM_MR_DELETE) &&
8379                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
8380                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
8381                 kvm_mmu_zap_collapsible_sptes(kvm, new);
8382
8383         /*
8384          * Set up write protection and/or dirty logging for the new slot.
8385          *
8386          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8387          * been zapped so no dirty logging staff is needed for old slot. For
8388          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8389          * new and it's also covered when dealing with the new slot.
8390          *
8391          * FIXME: const-ify all uses of struct kvm_memory_slot.
8392          */
8393         if (change != KVM_MR_DELETE)
8394                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
8395 }
8396
8397 void kvm_arch_flush_shadow_all(struct kvm *kvm)
8398 {
8399         kvm_mmu_invalidate_zap_all_pages(kvm);
8400 }
8401
8402 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
8403                                    struct kvm_memory_slot *slot)
8404 {
8405         kvm_page_track_flush_slot(kvm, slot);
8406 }
8407
8408 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
8409 {
8410         if (!list_empty_careful(&vcpu->async_pf.done))
8411                 return true;
8412
8413         if (kvm_apic_has_events(vcpu))
8414                 return true;
8415
8416         if (vcpu->arch.pv.pv_unhalted)
8417                 return true;
8418
8419         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
8420             (vcpu->arch.nmi_pending &&
8421              kvm_x86_ops->nmi_allowed(vcpu)))
8422                 return true;
8423
8424         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
8425             (vcpu->arch.smi_pending && !is_smm(vcpu)))
8426                 return true;
8427
8428         if (kvm_arch_interrupt_allowed(vcpu) &&
8429             kvm_cpu_has_interrupt(vcpu))
8430                 return true;
8431
8432         if (kvm_hv_has_stimer_pending(vcpu))
8433                 return true;
8434
8435         return false;
8436 }
8437
8438 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
8439 {
8440         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
8441 }
8442
8443 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
8444 {
8445         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
8446 }
8447
8448 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
8449 {
8450         return kvm_x86_ops->interrupt_allowed(vcpu);
8451 }
8452
8453 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
8454 {
8455         if (is_64_bit_mode(vcpu))
8456                 return kvm_rip_read(vcpu);
8457         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
8458                      kvm_rip_read(vcpu));
8459 }
8460 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
8461
8462 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
8463 {
8464         return kvm_get_linear_rip(vcpu) == linear_rip;
8465 }
8466 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
8467
8468 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
8469 {
8470         unsigned long rflags;
8471
8472         rflags = kvm_x86_ops->get_rflags(vcpu);
8473         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8474                 rflags &= ~X86_EFLAGS_TF;
8475         return rflags;
8476 }
8477 EXPORT_SYMBOL_GPL(kvm_get_rflags);
8478
8479 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8480 {
8481         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
8482             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
8483                 rflags |= X86_EFLAGS_TF;
8484         kvm_x86_ops->set_rflags(vcpu, rflags);
8485 }
8486
8487 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8488 {
8489         __kvm_set_rflags(vcpu, rflags);
8490         kvm_make_request(KVM_REQ_EVENT, vcpu);
8491 }
8492 EXPORT_SYMBOL_GPL(kvm_set_rflags);
8493
8494 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
8495 {
8496         int r;
8497
8498         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
8499               work->wakeup_all)
8500                 return;
8501
8502         r = kvm_mmu_reload(vcpu);
8503         if (unlikely(r))
8504                 return;
8505
8506         if (!vcpu->arch.mmu.direct_map &&
8507               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
8508                 return;
8509
8510         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
8511 }
8512
8513 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
8514 {
8515         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
8516 }
8517
8518 static inline u32 kvm_async_pf_next_probe(u32 key)
8519 {
8520         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
8521 }
8522
8523 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8524 {
8525         u32 key = kvm_async_pf_hash_fn(gfn);
8526
8527         while (vcpu->arch.apf.gfns[key] != ~0)
8528                 key = kvm_async_pf_next_probe(key);
8529
8530         vcpu->arch.apf.gfns[key] = gfn;
8531 }
8532
8533 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
8534 {
8535         int i;
8536         u32 key = kvm_async_pf_hash_fn(gfn);
8537
8538         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
8539                      (vcpu->arch.apf.gfns[key] != gfn &&
8540                       vcpu->arch.apf.gfns[key] != ~0); i++)
8541                 key = kvm_async_pf_next_probe(key);
8542
8543         return key;
8544 }
8545
8546 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8547 {
8548         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
8549 }
8550
8551 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8552 {
8553         u32 i, j, k;
8554
8555         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
8556         while (true) {
8557                 vcpu->arch.apf.gfns[i] = ~0;
8558                 do {
8559                         j = kvm_async_pf_next_probe(j);
8560                         if (vcpu->arch.apf.gfns[j] == ~0)
8561                                 return;
8562                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
8563                         /*
8564                          * k lies cyclically in ]i,j]
8565                          * |    i.k.j |
8566                          * |....j i.k.| or  |.k..j i...|
8567                          */
8568                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
8569                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
8570                 i = j;
8571         }
8572 }
8573
8574 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
8575 {
8576
8577         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
8578                                       sizeof(val));
8579 }
8580
8581 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
8582                                      struct kvm_async_pf *work)
8583 {
8584         struct x86_exception fault;
8585
8586         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
8587         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
8588
8589         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
8590             (vcpu->arch.apf.send_user_only &&
8591              kvm_x86_ops->get_cpl(vcpu) == 0))
8592                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
8593         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
8594                 fault.vector = PF_VECTOR;
8595                 fault.error_code_valid = true;
8596                 fault.error_code = 0;
8597                 fault.nested_page_fault = false;
8598                 fault.address = work->arch.token;
8599                 fault.async_page_fault = true;
8600                 kvm_inject_page_fault(vcpu, &fault);
8601         }
8602 }
8603
8604 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
8605                                  struct kvm_async_pf *work)
8606 {
8607         struct x86_exception fault;
8608
8609         if (work->wakeup_all)
8610                 work->arch.token = ~0; /* broadcast wakeup */
8611         else
8612                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
8613         trace_kvm_async_pf_ready(work->arch.token, work->gva);
8614
8615         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
8616             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
8617                 fault.vector = PF_VECTOR;
8618                 fault.error_code_valid = true;
8619                 fault.error_code = 0;
8620                 fault.nested_page_fault = false;
8621                 fault.address = work->arch.token;
8622                 fault.async_page_fault = true;
8623                 kvm_inject_page_fault(vcpu, &fault);
8624         }
8625         vcpu->arch.apf.halted = false;
8626         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8627 }
8628
8629 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
8630 {
8631         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
8632                 return true;
8633         else
8634                 return kvm_can_do_async_pf(vcpu);
8635 }
8636
8637 void kvm_arch_start_assignment(struct kvm *kvm)
8638 {
8639         atomic_inc(&kvm->arch.assigned_device_count);
8640 }
8641 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
8642
8643 void kvm_arch_end_assignment(struct kvm *kvm)
8644 {
8645         atomic_dec(&kvm->arch.assigned_device_count);
8646 }
8647 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
8648
8649 bool kvm_arch_has_assigned_device(struct kvm *kvm)
8650 {
8651         return atomic_read(&kvm->arch.assigned_device_count);
8652 }
8653 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
8654
8655 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
8656 {
8657         atomic_inc(&kvm->arch.noncoherent_dma_count);
8658 }
8659 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
8660
8661 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
8662 {
8663         atomic_dec(&kvm->arch.noncoherent_dma_count);
8664 }
8665 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
8666
8667 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
8668 {
8669         return atomic_read(&kvm->arch.noncoherent_dma_count);
8670 }
8671 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
8672
8673 bool kvm_arch_has_irq_bypass(void)
8674 {
8675         return kvm_x86_ops->update_pi_irte != NULL;
8676 }
8677
8678 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
8679                                       struct irq_bypass_producer *prod)
8680 {
8681         struct kvm_kernel_irqfd *irqfd =
8682                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8683
8684         irqfd->producer = prod;
8685
8686         return kvm_x86_ops->update_pi_irte(irqfd->kvm,
8687                                            prod->irq, irqfd->gsi, 1);
8688 }
8689
8690 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
8691                                       struct irq_bypass_producer *prod)
8692 {
8693         int ret;
8694         struct kvm_kernel_irqfd *irqfd =
8695                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8696
8697         WARN_ON(irqfd->producer != prod);
8698         irqfd->producer = NULL;
8699
8700         /*
8701          * When producer of consumer is unregistered, we change back to
8702          * remapped mode, so we can re-use the current implementation
8703          * when the irq is masked/disabled or the consumer side (KVM
8704          * int this case doesn't want to receive the interrupts.
8705         */
8706         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
8707         if (ret)
8708                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
8709                        " fails: %d\n", irqfd->consumer.token, ret);
8710 }
8711
8712 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
8713                                    uint32_t guest_irq, bool set)
8714 {
8715         if (!kvm_x86_ops->update_pi_irte)
8716                 return -EINVAL;
8717
8718         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
8719 }
8720
8721 bool kvm_vector_hashing_enabled(void)
8722 {
8723         return vector_hashing;
8724 }
8725 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
8726
8727 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
8728 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
8729 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
8730 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
8731 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
8732 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
8733 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
8734 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
8735 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
8736 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
8737 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
8738 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
8739 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
8740 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
8741 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
8742 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
8743 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
8744 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
8745 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);