arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30
  31 #include <linux/clocksource.h>
  32 #include <linux/interrupt.h>
  33 #include <linux/kvm.h>
  34 #include <linux/fs.h>
  35 #include <linux/vmalloc.h>
  36 #include <linux/module.h>
  37 #include <linux/mman.h>
  38 #include <linux/highmem.h>
  39 #include <linux/iommu.h>
  40 #include <linux/intel-iommu.h>
  41 #include <linux/cpufreq.h>
  42 #include <linux/user-return-notifier.h>
  43 #include <linux/srcu.h>
  44 #include <linux/slab.h>
  45 #include <linux/perf_event.h>
  46 #include <linux/uaccess.h>
  47 #include <linux/hash.h>
  48 #include <linux/pci.h>
  49 #include <linux/timekeeper_internal.h>
  50 #include <linux/pvclock_gtod.h>
  51 #include <trace/events/kvm.h>
  52
  53 #define CREATE_TRACE_POINTS
  54 #include "trace.h"
  55
  56 #include <asm/debugreg.h>
  57 #include <asm/msr.h>
  58 #include <asm/desc.h>
  59 #include <asm/mtrr.h>
  60 #include <asm/mce.h>
  61 #include <asm/i387.h>
  62 #include <asm/fpu-internal.h> /* Ugh! */
  63 #include <asm/xcr.h>
  64 #include <asm/pvclock.h>
  65 #include <asm/div64.h>
  66
  67 #define MAX_IO_MSRS 256
  68 #define KVM_MAX_MCE_BANKS 32
  69 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  70
  71 #define emul_to_vcpu(ctxt) \
  72         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  73
  74 /* EFER defaults:
  75  * - enable syscall per default because its emulated by KVM
  76  * - enable LME and LMA per default on 64 bit KVM
  77  */
  78 #ifdef CONFIG_X86_64
  79 static
  80 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  81 #else
  82 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  83 #endif
  84
  85 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  86 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  87
  88 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  89 static void process_nmi(struct kvm_vcpu *vcpu);
  90
  91 struct kvm_x86_ops *kvm_x86_ops;
  92 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  93
  94 static bool ignore_msrs = 0;
  95 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
  96
  97 unsigned int min_timer_period_us = 500;
  98 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
  99
 100 bool kvm_has_tsc_control;
 101 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 102 u32  kvm_max_guest_tsc_khz;
 103 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 104
 105 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 106 static u32 tsc_tolerance_ppm = 250;
 107 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 108
 109 static bool backwards_tsc_observed = false;
 110
 111 #define KVM_NR_SHARED_MSRS 16
 112
 113 struct kvm_shared_msrs_global {
 114         int nr;
 115         u32 msrs[KVM_NR_SHARED_MSRS];
 116 };
 117
 118 struct kvm_shared_msrs {
 119         struct user_return_notifier urn;
 120         bool registered;
 121         struct kvm_shared_msr_values {
 122                 u64 host;
 123                 u64 curr;
 124         } values[KVM_NR_SHARED_MSRS];
 125 };
 126
 127 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 128 static struct kvm_shared_msrs __percpu *shared_msrs;
 129
 130 struct kvm_stats_debugfs_item debugfs_entries[] = {
 131         { "pf_fixed", VCPU_STAT(pf_fixed) },
 132         { "pf_guest", VCPU_STAT(pf_guest) },
 133         { "tlb_flush", VCPU_STAT(tlb_flush) },
 134         { "invlpg", VCPU_STAT(invlpg) },
 135         { "exits", VCPU_STAT(exits) },
 136         { "io_exits", VCPU_STAT(io_exits) },
 137         { "mmio_exits", VCPU_STAT(mmio_exits) },
 138         { "signal_exits", VCPU_STAT(signal_exits) },
 139         { "irq_window", VCPU_STAT(irq_window_exits) },
 140         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 141         { "halt_exits", VCPU_STAT(halt_exits) },
 142         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 143         { "hypercalls", VCPU_STAT(hypercalls) },
 144         { "request_irq", VCPU_STAT(request_irq_exits) },
 145         { "irq_exits", VCPU_STAT(irq_exits) },
 146         { "host_state_reload", VCPU_STAT(host_state_reload) },
 147         { "efer_reload", VCPU_STAT(efer_reload) },
 148         { "fpu_reload", VCPU_STAT(fpu_reload) },
 149         { "insn_emulation", VCPU_STAT(insn_emulation) },
 150         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 151         { "irq_injections", VCPU_STAT(irq_injections) },
 152         { "nmi_injections", VCPU_STAT(nmi_injections) },
 153         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 154         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 155         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 156         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 157         { "mmu_flooded", VM_STAT(mmu_flooded) },
 158         { "mmu_recycled", VM_STAT(mmu_recycled) },
 159         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 160         { "mmu_unsync", VM_STAT(mmu_unsync) },
 161         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 162         { "largepages", VM_STAT(lpages) },
 163         { NULL }
 164 };
 165
 166 u64 __read_mostly host_xcr0;
 167
 168 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 169
 170 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 171 {
 172         int i;
 173         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 174                 vcpu->arch.apf.gfns[i] = ~0;
 175 }
 176
 177 static void kvm_on_user_return(struct user_return_notifier *urn)
 178 {
 179         unsigned slot;
 180         struct kvm_shared_msrs *locals
 181                 = container_of(urn, struct kvm_shared_msrs, urn);
 182         struct kvm_shared_msr_values *values;
 183
 184         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 185                 values = &locals->values[slot];
 186                 if (values->host != values->curr) {
 187                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 188                         values->curr = values->host;
 189                 }
 190         }
 191         locals->registered = false;
 192         user_return_notifier_unregister(urn);
 193 }
 194
 195 static void shared_msr_update(unsigned slot, u32 msr)
 196 {
 197         u64 value;
 198         unsigned int cpu = smp_processor_id();
 199         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 200
 201         /* only read, and nobody should modify it at this time,
 202          * so don't need lock */
 203         if (slot >= shared_msrs_global.nr) {
 204                 printk(KERN_ERR "kvm: invalid MSR slot!");
 205                 return;
 206         }
 207         rdmsrl_safe(msr, &value);
 208         smsr->values[slot].host = value;
 209         smsr->values[slot].curr = value;
 210 }
 211
 212 void kvm_define_shared_msr(unsigned slot, u32 msr)
 213 {
 214         if (slot >= shared_msrs_global.nr)
 215                 shared_msrs_global.nr = slot + 1;
 216         shared_msrs_global.msrs[slot] = msr;
 217         /* we need ensured the shared_msr_global have been updated */
 218         smp_wmb();
 219 }
 220 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 221
 222 static void kvm_shared_msr_cpu_online(void)
 223 {
 224         unsigned i;
 225
 226         for (i = 0; i < shared_msrs_global.nr; ++i)
 227                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 228 }
 229
 230 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 231 {
 232         unsigned int cpu = smp_processor_id();
 233         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 234
 235         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 236                 return;
 237         smsr->values[slot].curr = value;
 238         wrmsrl(shared_msrs_global.msrs[slot], value);
 239         if (!smsr->registered) {
 240                 smsr->urn.on_user_return = kvm_on_user_return;
 241                 user_return_notifier_register(&smsr->urn);
 242                 smsr->registered = true;
 243         }
 244 }
 245 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 246
 247 static void drop_user_return_notifiers(void *ignore)
 248 {
 249         unsigned int cpu = smp_processor_id();
 250         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 251
 252         if (smsr->registered)
 253                 kvm_on_user_return(&smsr->urn);
 254 }
 255
 256 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 257 {
 258         return vcpu->arch.apic_base;
 259 }
 260 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 261
 262 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 263 {
 264         u64 old_state = vcpu->arch.apic_base &
 265                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 266         u64 new_state = msr_info->data &
 267                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 268         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
 269                 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
 270
 271         if (!msr_info->host_initiated &&
 272             ((msr_info->data & reserved_bits) != 0 ||
 273              new_state == X2APIC_ENABLE ||
 274              (new_state == MSR_IA32_APICBASE_ENABLE &&
 275               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 276              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 277               old_state == 0)))
 278                 return 1;
 279
 280         kvm_lapic_set_base(vcpu, msr_info->data);
 281         return 0;
 282 }
 283 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 284
 285 asmlinkage __visible void kvm_spurious_fault(void)
 286 {
 287         /* Fault while not rebooting.  We want the trace. */
 288         BUG();
 289 }
 290 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 291
 292 #define EXCPT_BENIGN            0
 293 #define EXCPT_CONTRIBUTORY      1
 294 #define EXCPT_PF                2
 295
 296 static int exception_class(int vector)
 297 {
 298         switch (vector) {
 299         case PF_VECTOR:
 300                 return EXCPT_PF;
 301         case DE_VECTOR:
 302         case TS_VECTOR:
 303         case NP_VECTOR:
 304         case SS_VECTOR:
 305         case GP_VECTOR:
 306                 return EXCPT_CONTRIBUTORY;
 307         default:
 308                 break;
 309         }
 310         return EXCPT_BENIGN;
 311 }
 312
 313 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 314                 unsigned nr, bool has_error, u32 error_code,
 315                 bool reinject)
 316 {
 317         u32 prev_nr;
 318         int class1, class2;
 319
 320         kvm_make_request(KVM_REQ_EVENT, vcpu);
 321
 322         if (!vcpu->arch.exception.pending) {
 323         queue:
 324                 vcpu->arch.exception.pending = true;
 325                 vcpu->arch.exception.has_error_code = has_error;
 326                 vcpu->arch.exception.nr = nr;
 327                 vcpu->arch.exception.error_code = error_code;
 328                 vcpu->arch.exception.reinject = reinject;
 329                 return;
 330         }
 331
 332         /* to check exception */
 333         prev_nr = vcpu->arch.exception.nr;
 334         if (prev_nr == DF_VECTOR) {
 335                 /* triple fault -> shutdown */
 336                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 337                 return;
 338         }
 339         class1 = exception_class(prev_nr);
 340         class2 = exception_class(nr);
 341         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 342                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 343                 /* generate double fault per SDM Table 5-5 */
 344                 vcpu->arch.exception.pending = true;
 345                 vcpu->arch.exception.has_error_code = true;
 346                 vcpu->arch.exception.nr = DF_VECTOR;
 347                 vcpu->arch.exception.error_code = 0;
 348         } else
 349                 /* replace previous exception with a new one in a hope
 350                    that instruction re-execution will regenerate lost
 351                    exception */
 352                 goto queue;
 353 }
 354
 355 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 356 {
 357         kvm_multiple_exception(vcpu, nr, false, 0, false);
 358 }
 359 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 360
 361 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 362 {
 363         kvm_multiple_exception(vcpu, nr, false, 0, true);
 364 }
 365 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 366
 367 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 368 {
 369         if (err)
 370                 kvm_inject_gp(vcpu, 0);
 371         else
 372                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 373 }
 374 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 375
 376 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 377 {
 378         ++vcpu->stat.pf_guest;
 379         vcpu->arch.cr2 = fault->address;
 380         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 381 }
 382 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 383
 384 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 385 {
 386         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 387                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 388         else
 389                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 390 }
 391
 392 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 393 {
 394         atomic_inc(&vcpu->arch.nmi_queued);
 395         kvm_make_request(KVM_REQ_NMI, vcpu);
 396 }
 397 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 398
 399 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 400 {
 401         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 402 }
 403 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 404
 405 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 406 {
 407         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 408 }
 409 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 410
 411 /*
 412  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 413  * a #GP and return false.
 414  */
 415 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 416 {
 417         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 418                 return true;
 419         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 420         return false;
 421 }
 422 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 423
 424 /*
 425  * This function will be used to read from the physical memory of the currently
 426  * running guest. The difference to kvm_read_guest_page is that this function
 427  * can read from guest physical or from the guest's guest physical memory.
 428  */
 429 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 430                             gfn_t ngfn, void *data, int offset, int len,
 431                             u32 access)
 432 {
 433         gfn_t real_gfn;
 434         gpa_t ngpa;
 435
 436         ngpa     = gfn_to_gpa(ngfn);
 437         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 438         if (real_gfn == UNMAPPED_GVA)
 439                 return -EFAULT;
 440
 441         real_gfn = gpa_to_gfn(real_gfn);
 442
 443         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 444 }
 445 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 446
 447 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 448                                void *data, int offset, int len, u32 access)
 449 {
 450         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 451                                        data, offset, len, access);
 452 }
 453
 454 /*
 455  * Load the pae pdptrs.  Return true is they are all valid.
 456  */
 457 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 458 {
 459         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 460         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 461         int i;
 462         int ret;
 463         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 464
 465         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 466                                       offset * sizeof(u64), sizeof(pdpte),
 467                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 468         if (ret < 0) {
 469                 ret = 0;
 470                 goto out;
 471         }
 472         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 473                 if (is_present_gpte(pdpte[i]) &&
 474                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 475                         ret = 0;
 476                         goto out;
 477                 }
 478         }
 479         ret = 1;
 480
 481         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 482         __set_bit(VCPU_EXREG_PDPTR,
 483                   (unsigned long *)&vcpu->arch.regs_avail);
 484         __set_bit(VCPU_EXREG_PDPTR,
 485                   (unsigned long *)&vcpu->arch.regs_dirty);
 486 out:
 487
 488         return ret;
 489 }
 490 EXPORT_SYMBOL_GPL(load_pdptrs);
 491
 492 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 493 {
 494         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 495         bool changed = true;
 496         int offset;
 497         gfn_t gfn;
 498         int r;
 499
 500         if (is_long_mode(vcpu) || !is_pae(vcpu))
 501                 return false;
 502
 503         if (!test_bit(VCPU_EXREG_PDPTR,
 504                       (unsigned long *)&vcpu->arch.regs_avail))
 505                 return true;
 506
 507         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 508         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 509         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 510                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 511         if (r < 0)
 512                 goto out;
 513         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 514 out:
 515
 516         return changed;
 517 }
 518
 519 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 520 {
 521         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 522         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 523                                     X86_CR0_CD | X86_CR0_NW;
 524
 525         cr0 |= X86_CR0_ET;
 526
 527 #ifdef CONFIG_X86_64
 528         if (cr0 & 0xffffffff00000000UL)
 529                 return 1;
 530 #endif
 531
 532         cr0 &= ~CR0_RESERVED_BITS;
 533
 534         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 535                 return 1;
 536
 537         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 538                 return 1;
 539
 540         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 541 #ifdef CONFIG_X86_64
 542                 if ((vcpu->arch.efer & EFER_LME)) {
 543                         int cs_db, cs_l;
 544
 545                         if (!is_pae(vcpu))
 546                                 return 1;
 547                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 548                         if (cs_l)
 549                                 return 1;
 550                 } else
 551 #endif
 552                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 553                                                  kvm_read_cr3(vcpu)))
 554                         return 1;
 555         }
 556
 557         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 558                 return 1;
 559
 560         kvm_x86_ops->set_cr0(vcpu, cr0);
 561
 562         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 563                 kvm_clear_async_pf_completion_queue(vcpu);
 564                 kvm_async_pf_hash_reset(vcpu);
 565         }
 566
 567         if ((cr0 ^ old_cr0) & update_bits)
 568                 kvm_mmu_reset_context(vcpu);
 569         return 0;
 570 }
 571 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 572
 573 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 574 {
 575         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 576 }
 577 EXPORT_SYMBOL_GPL(kvm_lmsw);
 578
 579 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 580 {
 581         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 582                         !vcpu->guest_xcr0_loaded) {
 583                 /* kvm_set_xcr() also depends on this */
 584                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 585                 vcpu->guest_xcr0_loaded = 1;
 586         }
 587 }
 588
 589 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 590 {
 591         if (vcpu->guest_xcr0_loaded) {
 592                 if (vcpu->arch.xcr0 != host_xcr0)
 593                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 594                 vcpu->guest_xcr0_loaded = 0;
 595         }
 596 }
 597
 598 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 599 {
 600         u64 xcr0 = xcr;
 601         u64 old_xcr0 = vcpu->arch.xcr0;
 602         u64 valid_bits;
 603
 604         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 605         if (index != XCR_XFEATURE_ENABLED_MASK)
 606                 return 1;
 607         if (!(xcr0 & XSTATE_FP))
 608                 return 1;
 609         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 610                 return 1;
 611
 612         /*
 613          * Do not allow the guest to set bits that we do not support
 614          * saving.  However, xcr0 bit 0 is always set, even if the
 615          * emulated CPU does not support XSAVE (see fx_init).
 616          */
 617         valid_bits = vcpu->arch.guest_supported_xcr0 | XSTATE_FP;
 618         if (xcr0 & ~valid_bits)
 619                 return 1;
 620
 621         if ((!(xcr0 & XSTATE_BNDREGS)) != (!(xcr0 & XSTATE_BNDCSR)))
 622                 return 1;
 623
 624         kvm_put_guest_xcr0(vcpu);
 625         vcpu->arch.xcr0 = xcr0;
 626
 627         if ((xcr0 ^ old_xcr0) & XSTATE_EXTEND_MASK)
 628                 kvm_update_cpuid(vcpu);
 629         return 0;
 630 }
 631
 632 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 633 {
 634         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 635             __kvm_set_xcr(vcpu, index, xcr)) {
 636                 kvm_inject_gp(vcpu, 0);
 637                 return 1;
 638         }
 639         return 0;
 640 }
 641 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 642
 643 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 644 {
 645         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 646         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
 647                                    X86_CR4_PAE | X86_CR4_SMEP;
 648         if (cr4 & CR4_RESERVED_BITS)
 649                 return 1;
 650
 651         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 652                 return 1;
 653
 654         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 655                 return 1;
 656
 657         if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
 658                 return 1;
 659
 660         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 661                 return 1;
 662
 663         if (is_long_mode(vcpu)) {
 664                 if (!(cr4 & X86_CR4_PAE))
 665                         return 1;
 666         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 667                    && ((cr4 ^ old_cr4) & pdptr_bits)
 668                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 669                                    kvm_read_cr3(vcpu)))
 670                 return 1;
 671
 672         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 673                 if (!guest_cpuid_has_pcid(vcpu))
 674                         return 1;
 675
 676                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 677                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 678                         return 1;
 679         }
 680
 681         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 682                 return 1;
 683
 684         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 685             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 686                 kvm_mmu_reset_context(vcpu);
 687
 688         if ((cr4 ^ old_cr4) & X86_CR4_SMAP)
 689                 update_permission_bitmask(vcpu, vcpu->arch.walk_mmu, false);
 690
 691         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 692                 kvm_update_cpuid(vcpu);
 693
 694         return 0;
 695 }
 696 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 697
 698 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 699 {
 700         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 701                 kvm_mmu_sync_roots(vcpu);
 702                 kvm_mmu_flush_tlb(vcpu);
 703                 return 0;
 704         }
 705
 706         if (is_long_mode(vcpu)) {
 707                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 708                         return 1;
 709         } else if (is_pae(vcpu) && is_paging(vcpu) &&
 710                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 711                 return 1;
 712
 713         vcpu->arch.cr3 = cr3;
 714         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 715         kvm_mmu_new_cr3(vcpu);
 716         return 0;
 717 }
 718 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 719
 720 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 721 {
 722         if (cr8 & CR8_RESERVED_BITS)
 723                 return 1;
 724         if (irqchip_in_kernel(vcpu->kvm))
 725                 kvm_lapic_set_tpr(vcpu, cr8);
 726         else
 727                 vcpu->arch.cr8 = cr8;
 728         return 0;
 729 }
 730 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 731
 732 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 733 {
 734         if (irqchip_in_kernel(vcpu->kvm))
 735                 return kvm_lapic_get_cr8(vcpu);
 736         else
 737                 return vcpu->arch.cr8;
 738 }
 739 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 740
 741 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 742 {
 743         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 744                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 745 }
 746
 747 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 748 {
 749         unsigned long dr7;
 750
 751         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 752                 dr7 = vcpu->arch.guest_debug_dr7;
 753         else
 754                 dr7 = vcpu->arch.dr7;
 755         kvm_x86_ops->set_dr7(vcpu, dr7);
 756         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 757         if (dr7 & DR7_BP_EN_MASK)
 758                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 759 }
 760
 761 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 762 {
 763         switch (dr) {
 764         case 0 ... 3:
 765                 vcpu->arch.db[dr] = val;
 766                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 767                         vcpu->arch.eff_db[dr] = val;
 768                 break;
 769         case 4:
 770                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 771                         return 1; /* #UD */
 772                 /* fall through */
 773         case 6:
 774                 if (val & 0xffffffff00000000ULL)
 775                         return -1; /* #GP */
 776                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 777                 kvm_update_dr6(vcpu);
 778                 break;
 779         case 5:
 780                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 781                         return 1; /* #UD */
 782                 /* fall through */
 783         default: /* 7 */
 784                 if (val & 0xffffffff00000000ULL)
 785                         return -1; /* #GP */
 786                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 787                 kvm_update_dr7(vcpu);
 788                 break;
 789         }
 790
 791         return 0;
 792 }
 793
 794 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 795 {
 796         int res;
 797
 798         res = __kvm_set_dr(vcpu, dr, val);
 799         if (res > 0)
 800                 kvm_queue_exception(vcpu, UD_VECTOR);
 801         else if (res < 0)
 802                 kvm_inject_gp(vcpu, 0);
 803
 804         return res;
 805 }
 806 EXPORT_SYMBOL_GPL(kvm_set_dr);
 807
 808 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 809 {
 810         switch (dr) {
 811         case 0 ... 3:
 812                 *val = vcpu->arch.db[dr];
 813                 break;
 814         case 4:
 815                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 816                         return 1;
 817                 /* fall through */
 818         case 6:
 819                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 820                         *val = vcpu->arch.dr6;
 821                 else
 822                         *val = kvm_x86_ops->get_dr6(vcpu);
 823                 break;
 824         case 5:
 825                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 826                         return 1;
 827                 /* fall through */
 828         default: /* 7 */
 829                 *val = vcpu->arch.dr7;
 830                 break;
 831         }
 832
 833         return 0;
 834 }
 835
 836 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 837 {
 838         if (_kvm_get_dr(vcpu, dr, val)) {
 839                 kvm_queue_exception(vcpu, UD_VECTOR);
 840                 return 1;
 841         }
 842         return 0;
 843 }
 844 EXPORT_SYMBOL_GPL(kvm_get_dr);
 845
 846 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 847 {
 848         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 849         u64 data;
 850         int err;
 851
 852         err = kvm_pmu_read_pmc(vcpu, ecx, &data);
 853         if (err)
 854                 return err;
 855         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 856         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 857         return err;
 858 }
 859 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 860
 861 /*
 862  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 863  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 864  *
 865  * This list is modified at module load time to reflect the
 866  * capabilities of the host cpu. This capabilities test skips MSRs that are
 867  * kvm-specific. Those are put in the beginning of the list.
 868  */
 869
 870 #define KVM_SAVE_MSRS_BEGIN     12
 871 static u32 msrs_to_save[] = {
 872         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 873         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 874         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 875         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
 876         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 877         MSR_KVM_PV_EOI_EN,
 878         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 879         MSR_STAR,
 880 #ifdef CONFIG_X86_64
 881         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 882 #endif
 883         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 884         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS
 885 };
 886
 887 static unsigned num_msrs_to_save;
 888
 889 static const u32 emulated_msrs[] = {
 890         MSR_IA32_TSC_ADJUST,
 891         MSR_IA32_TSCDEADLINE,
 892         MSR_IA32_MISC_ENABLE,
 893         MSR_IA32_MCG_STATUS,
 894         MSR_IA32_MCG_CTL,
 895 };
 896
 897 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
 898 {
 899         if (efer & efer_reserved_bits)
 900                 return false;
 901
 902         if (efer & EFER_FFXSR) {
 903                 struct kvm_cpuid_entry2 *feat;
 904
 905                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 906                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 907                         return false;
 908         }
 909
 910         if (efer & EFER_SVME) {
 911                 struct kvm_cpuid_entry2 *feat;
 912
 913                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 914                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 915                         return false;
 916         }
 917
 918         return true;
 919 }
 920 EXPORT_SYMBOL_GPL(kvm_valid_efer);
 921
 922 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 923 {
 924         u64 old_efer = vcpu->arch.efer;
 925
 926         if (!kvm_valid_efer(vcpu, efer))
 927                 return 1;
 928
 929         if (is_paging(vcpu)
 930             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 931                 return 1;
 932
 933         efer &= ~EFER_LMA;
 934         efer |= vcpu->arch.efer & EFER_LMA;
 935
 936         kvm_x86_ops->set_efer(vcpu, efer);
 937
 938         /* Update reserved bits */
 939         if ((efer ^ old_efer) & EFER_NX)
 940                 kvm_mmu_reset_context(vcpu);
 941
 942         return 0;
 943 }
 944
 945 void kvm_enable_efer_bits(u64 mask)
 946 {
 947        efer_reserved_bits &= ~mask;
 948 }
 949 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 950
 951
 952 /*
 953  * Writes msr value into into the appropriate "register".
 954  * Returns 0 on success, non-0 otherwise.
 955  * Assumes vcpu_load() was already called.
 956  */
 957 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
 958 {
 959         return kvm_x86_ops->set_msr(vcpu, msr);
 960 }
 961
 962 /*
 963  * Adapt set_msr() to msr_io()'s calling convention
 964  */
 965 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 966 {
 967         struct msr_data msr;
 968
 969         msr.data = *data;
 970         msr.index = index;
 971         msr.host_initiated = true;
 972         return kvm_set_msr(vcpu, &msr);
 973 }
 974
 975 #ifdef CONFIG_X86_64
 976 struct pvclock_gtod_data {
 977         seqcount_t      seq;
 978
 979         struct { /* extract of a clocksource struct */
 980                 int vclock_mode;
 981                 cycle_t cycle_last;
 982                 cycle_t mask;
 983                 u32     mult;
 984                 u32     shift;
 985         } clock;
 986
 987         /* open coded 'struct timespec' */
 988         u64             monotonic_time_snsec;
 989         time_t          monotonic_time_sec;
 990 };
 991
 992 static struct pvclock_gtod_data pvclock_gtod_data;
 993
 994 static void update_pvclock_gtod(struct timekeeper *tk)
 995 {
 996         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
 997
 998         write_seqcount_begin(&vdata->seq);
 999
1000         /* copy pvclock gtod data */
1001         vdata->clock.vclock_mode        = tk->clock->archdata.vclock_mode;
1002         vdata->clock.cycle_last         = tk->clock->cycle_last;
1003         vdata->clock.mask               = tk->clock->mask;
1004         vdata->clock.mult               = tk->mult;
1005         vdata->clock.shift              = tk->shift;
1006
1007         vdata->monotonic_time_sec       = tk->xtime_sec
1008                                         + tk->wall_to_monotonic.tv_sec;
1009         vdata->monotonic_time_snsec     = tk->xtime_nsec
1010                                         + (tk->wall_to_monotonic.tv_nsec
1011                                                 << tk->shift);
1012         while (vdata->monotonic_time_snsec >=
1013                                         (((u64)NSEC_PER_SEC) << tk->shift)) {
1014                 vdata->monotonic_time_snsec -=
1015                                         ((u64)NSEC_PER_SEC) << tk->shift;
1016                 vdata->monotonic_time_sec++;
1017         }
1018
1019         write_seqcount_end(&vdata->seq);
1020 }
1021 #endif
1022
1023
1024 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1025 {
1026         int version;
1027         int r;
1028         struct pvclock_wall_clock wc;
1029         struct timespec boot;
1030
1031         if (!wall_clock)
1032                 return;
1033
1034         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1035         if (r)
1036                 return;
1037
1038         if (version & 1)
1039                 ++version;  /* first time write, random junk */
1040
1041         ++version;
1042
1043         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1044
1045         /*
1046          * The guest calculates current wall clock time by adding
1047          * system time (updated by kvm_guest_time_update below) to the
1048          * wall clock specified here.  guest system time equals host
1049          * system time for us, thus we must fill in host boot time here.
1050          */
1051         getboottime(&boot);
1052
1053         if (kvm->arch.kvmclock_offset) {
1054                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1055                 boot = timespec_sub(boot, ts);
1056         }
1057         wc.sec = boot.tv_sec;
1058         wc.nsec = boot.tv_nsec;
1059         wc.version = version;
1060
1061         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1062
1063         version++;
1064         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1065 }
1066
1067 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1068 {
1069         uint32_t quotient, remainder;
1070
1071         /* Don't try to replace with do_div(), this one calculates
1072          * "(dividend << 32) / divisor" */
1073         __asm__ ( "divl %4"
1074                   : "=a" (quotient), "=d" (remainder)
1075                   : "0" (0), "1" (dividend), "r" (divisor) );
1076         return quotient;
1077 }
1078
1079 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1080                                s8 *pshift, u32 *pmultiplier)
1081 {
1082         uint64_t scaled64;
1083         int32_t  shift = 0;
1084         uint64_t tps64;
1085         uint32_t tps32;
1086
1087         tps64 = base_khz * 1000LL;
1088         scaled64 = scaled_khz * 1000LL;
1089         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1090                 tps64 >>= 1;
1091                 shift--;
1092         }
1093
1094         tps32 = (uint32_t)tps64;
1095         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1096                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1097                         scaled64 >>= 1;
1098                 else
1099                         tps32 <<= 1;
1100                 shift++;
1101         }
1102
1103         *pshift = shift;
1104         *pmultiplier = div_frac(scaled64, tps32);
1105
1106         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1107                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
1108 }
1109
1110 static inline u64 get_kernel_ns(void)
1111 {
1112         struct timespec ts;
1113
1114         ktime_get_ts(&ts);
1115         monotonic_to_bootbased(&ts);
1116         return timespec_to_ns(&ts);
1117 }
1118
1119 #ifdef CONFIG_X86_64
1120 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1121 #endif
1122
1123 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1124 unsigned long max_tsc_khz;
1125
1126 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1127 {
1128         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1129                                    vcpu->arch.virtual_tsc_shift);
1130 }
1131
1132 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1133 {
1134         u64 v = (u64)khz * (1000000 + ppm);
1135         do_div(v, 1000000);
1136         return v;
1137 }
1138
1139 static void kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1140 {
1141         u32 thresh_lo, thresh_hi;
1142         int use_scaling = 0;
1143
1144         /* tsc_khz can be zero if TSC calibration fails */
1145         if (this_tsc_khz == 0)
1146                 return;
1147
1148         /* Compute a scale to convert nanoseconds in TSC cycles */
1149         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1150                            &vcpu->arch.virtual_tsc_shift,
1151                            &vcpu->arch.virtual_tsc_mult);
1152         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1153
1154         /*
1155          * Compute the variation in TSC rate which is acceptable
1156          * within the range of tolerance and decide if the
1157          * rate being applied is within that bounds of the hardware
1158          * rate.  If so, no scaling or compensation need be done.
1159          */
1160         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1161         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1162         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1163                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1164                 use_scaling = 1;
1165         }
1166         kvm_x86_ops->set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1167 }
1168
1169 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1170 {
1171         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1172                                       vcpu->arch.virtual_tsc_mult,
1173                                       vcpu->arch.virtual_tsc_shift);
1174         tsc += vcpu->arch.this_tsc_write;
1175         return tsc;
1176 }
1177
1178 void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1179 {
1180 #ifdef CONFIG_X86_64
1181         bool vcpus_matched;
1182         bool do_request = false;
1183         struct kvm_arch *ka = &vcpu->kvm->arch;
1184         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1185
1186         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1187                          atomic_read(&vcpu->kvm->online_vcpus));
1188
1189         if (vcpus_matched && gtod->clock.vclock_mode == VCLOCK_TSC)
1190                 if (!ka->use_master_clock)
1191                         do_request = 1;
1192
1193         if (!vcpus_matched && ka->use_master_clock)
1194                         do_request = 1;
1195
1196         if (do_request)
1197                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1198
1199         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1200                             atomic_read(&vcpu->kvm->online_vcpus),
1201                             ka->use_master_clock, gtod->clock.vclock_mode);
1202 #endif
1203 }
1204
1205 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1206 {
1207         u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1208         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1209 }
1210
1211 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1212 {
1213         struct kvm *kvm = vcpu->kvm;
1214         u64 offset, ns, elapsed;
1215         unsigned long flags;
1216         s64 usdiff;
1217         bool matched;
1218         u64 data = msr->data;
1219
1220         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1221         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1222         ns = get_kernel_ns();
1223         elapsed = ns - kvm->arch.last_tsc_nsec;
1224
1225         if (vcpu->arch.virtual_tsc_khz) {
1226                 int faulted = 0;
1227
1228                 /* n.b - signed multiplication and division required */
1229                 usdiff = data - kvm->arch.last_tsc_write;
1230 #ifdef CONFIG_X86_64
1231                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1232 #else
1233                 /* do_div() only does unsigned */
1234                 asm("1: idivl %[divisor]\n"
1235                     "2: xor %%edx, %%edx\n"
1236                     "   movl $0, %[faulted]\n"
1237                     "3:\n"
1238                     ".section .fixup,\"ax\"\n"
1239                     "4: movl $1, %[faulted]\n"
1240                     "   jmp  3b\n"
1241                     ".previous\n"
1242
1243                 _ASM_EXTABLE(1b, 4b)
1244
1245                 : "=A"(usdiff), [faulted] "=r" (faulted)
1246                 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1247
1248 #endif
1249                 do_div(elapsed, 1000);
1250                 usdiff -= elapsed;
1251                 if (usdiff < 0)
1252                         usdiff = -usdiff;
1253
1254                 /* idivl overflow => difference is larger than USEC_PER_SEC */
1255                 if (faulted)
1256                         usdiff = USEC_PER_SEC;
1257         } else
1258                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1259
1260         /*
1261          * Special case: TSC write with a small delta (1 second) of virtual
1262          * cycle time against real time is interpreted as an attempt to
1263          * synchronize the CPU.
1264          *
1265          * For a reliable TSC, we can match TSC offsets, and for an unstable
1266          * TSC, we add elapsed time in this computation.  We could let the
1267          * compensation code attempt to catch up if we fall behind, but
1268          * it's better to try to match offsets from the beginning.
1269          */
1270         if (usdiff < USEC_PER_SEC &&
1271             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1272                 if (!check_tsc_unstable()) {
1273                         offset = kvm->arch.cur_tsc_offset;
1274                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1275                 } else {
1276                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1277                         data += delta;
1278                         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1279                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1280                 }
1281                 matched = true;
1282         } else {
1283                 /*
1284                  * We split periods of matched TSC writes into generations.
1285                  * For each generation, we track the original measured
1286                  * nanosecond time, offset, and write, so if TSCs are in
1287                  * sync, we can match exact offset, and if not, we can match
1288                  * exact software computation in compute_guest_tsc()
1289                  *
1290                  * These values are tracked in kvm->arch.cur_xxx variables.
1291                  */
1292                 kvm->arch.cur_tsc_generation++;
1293                 kvm->arch.cur_tsc_nsec = ns;
1294                 kvm->arch.cur_tsc_write = data;
1295                 kvm->arch.cur_tsc_offset = offset;
1296                 matched = false;
1297                 pr_debug("kvm: new tsc generation %u, clock %llu\n",
1298                          kvm->arch.cur_tsc_generation, data);
1299         }
1300
1301         /*
1302          * We also track th most recent recorded KHZ, write and time to
1303          * allow the matching interval to be extended at each write.
1304          */
1305         kvm->arch.last_tsc_nsec = ns;
1306         kvm->arch.last_tsc_write = data;
1307         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1308
1309         vcpu->arch.last_guest_tsc = data;
1310
1311         /* Keep track of which generation this VCPU has synchronized to */
1312         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1313         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1314         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1315
1316         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1317                 update_ia32_tsc_adjust_msr(vcpu, offset);
1318         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1319         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1320
1321         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1322         if (matched)
1323                 kvm->arch.nr_vcpus_matched_tsc++;
1324         else
1325                 kvm->arch.nr_vcpus_matched_tsc = 0;
1326
1327         kvm_track_tsc_matching(vcpu);
1328         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1329 }
1330
1331 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1332
1333 #ifdef CONFIG_X86_64
1334
1335 static cycle_t read_tsc(void)
1336 {
1337         cycle_t ret;
1338         u64 last;
1339
1340         /*
1341          * Empirically, a fence (of type that depends on the CPU)
1342          * before rdtsc is enough to ensure that rdtsc is ordered
1343          * with respect to loads.  The various CPU manuals are unclear
1344          * as to whether rdtsc can be reordered with later loads,
1345          * but no one has ever seen it happen.
1346          */
1347         rdtsc_barrier();
1348         ret = (cycle_t)vget_cycles();
1349
1350         last = pvclock_gtod_data.clock.cycle_last;
1351
1352         if (likely(ret >= last))
1353                 return ret;
1354
1355         /*
1356          * GCC likes to generate cmov here, but this branch is extremely
1357          * predictable (it's just a funciton of time and the likely is
1358          * very likely) and there's a data dependence, so force GCC
1359          * to generate a branch instead.  I don't barrier() because
1360          * we don't actually need a barrier, and if this function
1361          * ever gets inlined it will generate worse code.
1362          */
1363         asm volatile ("");
1364         return last;
1365 }
1366
1367 static inline u64 vgettsc(cycle_t *cycle_now)
1368 {
1369         long v;
1370         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1371
1372         *cycle_now = read_tsc();
1373
1374         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1375         return v * gtod->clock.mult;
1376 }
1377
1378 static int do_monotonic(struct timespec *ts, cycle_t *cycle_now)
1379 {
1380         unsigned long seq;
1381         u64 ns;
1382         int mode;
1383         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1384
1385         ts->tv_nsec = 0;
1386         do {
1387                 seq = read_seqcount_begin(&gtod->seq);
1388                 mode = gtod->clock.vclock_mode;
1389                 ts->tv_sec = gtod->monotonic_time_sec;
1390                 ns = gtod->monotonic_time_snsec;
1391                 ns += vgettsc(cycle_now);
1392                 ns >>= gtod->clock.shift;
1393         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1394         timespec_add_ns(ts, ns);
1395
1396         return mode;
1397 }
1398
1399 /* returns true if host is using tsc clocksource */
1400 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1401 {
1402         struct timespec ts;
1403
1404         /* checked again under seqlock below */
1405         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1406                 return false;
1407
1408         if (do_monotonic(&ts, cycle_now) != VCLOCK_TSC)
1409                 return false;
1410
1411         monotonic_to_bootbased(&ts);
1412         *kernel_ns = timespec_to_ns(&ts);
1413
1414         return true;
1415 }
1416 #endif
1417
1418 /*
1419  *
1420  * Assuming a stable TSC across physical CPUS, and a stable TSC
1421  * across virtual CPUs, the following condition is possible.
1422  * Each numbered line represents an event visible to both
1423  * CPUs at the next numbered event.
1424  *
1425  * "timespecX" represents host monotonic time. "tscX" represents
1426  * RDTSC value.
1427  *
1428  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1429  *
1430  * 1.  read timespec0,tsc0
1431  * 2.                                   | timespec1 = timespec0 + N
1432  *                                      | tsc1 = tsc0 + M
1433  * 3. transition to guest               | transition to guest
1434  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1435  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1436  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1437  *
1438  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1439  *
1440  *      - ret0 < ret1
1441  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1442  *              ...
1443  *      - 0 < N - M => M < N
1444  *
1445  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1446  * always the case (the difference between two distinct xtime instances
1447  * might be smaller then the difference between corresponding TSC reads,
1448  * when updating guest vcpus pvclock areas).
1449  *
1450  * To avoid that problem, do not allow visibility of distinct
1451  * system_timestamp/tsc_timestamp values simultaneously: use a master
1452  * copy of host monotonic time values. Update that master copy
1453  * in lockstep.
1454  *
1455  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1456  *
1457  */
1458
1459 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1460 {
1461 #ifdef CONFIG_X86_64
1462         struct kvm_arch *ka = &kvm->arch;
1463         int vclock_mode;
1464         bool host_tsc_clocksource, vcpus_matched;
1465
1466         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1467                         atomic_read(&kvm->online_vcpus));
1468
1469         /*
1470          * If the host uses TSC clock, then passthrough TSC as stable
1471          * to the guest.
1472          */
1473         host_tsc_clocksource = kvm_get_time_and_clockread(
1474                                         &ka->master_kernel_ns,
1475                                         &ka->master_cycle_now);
1476
1477         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1478                                 && !backwards_tsc_observed;
1479
1480         if (ka->use_master_clock)
1481                 atomic_set(&kvm_guest_has_master_clock, 1);
1482
1483         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1484         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1485                                         vcpus_matched);
1486 #endif
1487 }
1488
1489 static void kvm_gen_update_masterclock(struct kvm *kvm)
1490 {
1491 #ifdef CONFIG_X86_64
1492         int i;
1493         struct kvm_vcpu *vcpu;
1494         struct kvm_arch *ka = &kvm->arch;
1495
1496         spin_lock(&ka->pvclock_gtod_sync_lock);
1497         kvm_make_mclock_inprogress_request(kvm);
1498         /* no guest entries from this point */
1499         pvclock_update_vm_gtod_copy(kvm);
1500
1501         kvm_for_each_vcpu(i, vcpu, kvm)
1502                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
1503
1504         /* guest entries allowed */
1505         kvm_for_each_vcpu(i, vcpu, kvm)
1506                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1507
1508         spin_unlock(&ka->pvclock_gtod_sync_lock);
1509 #endif
1510 }
1511
1512 static int kvm_guest_time_update(struct kvm_vcpu *v)
1513 {
1514         unsigned long flags, this_tsc_khz;
1515         struct kvm_vcpu_arch *vcpu = &v->arch;
1516         struct kvm_arch *ka = &v->kvm->arch;
1517         s64 kernel_ns;
1518         u64 tsc_timestamp, host_tsc;
1519         struct pvclock_vcpu_time_info guest_hv_clock;
1520         u8 pvclock_flags;
1521         bool use_master_clock;
1522
1523         kernel_ns = 0;
1524         host_tsc = 0;
1525
1526         /*
1527          * If the host uses TSC clock, then passthrough TSC as stable
1528          * to the guest.
1529          */
1530         spin_lock(&ka->pvclock_gtod_sync_lock);
1531         use_master_clock = ka->use_master_clock;
1532         if (use_master_clock) {
1533                 host_tsc = ka->master_cycle_now;
1534                 kernel_ns = ka->master_kernel_ns;
1535         }
1536         spin_unlock(&ka->pvclock_gtod_sync_lock);
1537
1538         /* Keep irq disabled to prevent changes to the clock */
1539         local_irq_save(flags);
1540         this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1541         if (unlikely(this_tsc_khz == 0)) {
1542                 local_irq_restore(flags);
1543                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1544                 return 1;
1545         }
1546         if (!use_master_clock) {
1547                 host_tsc = native_read_tsc();
1548                 kernel_ns = get_kernel_ns();
1549         }
1550
1551         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v, host_tsc);
1552
1553         /*
1554          * We may have to catch up the TSC to match elapsed wall clock
1555          * time for two reasons, even if kvmclock is used.
1556          *   1) CPU could have been running below the maximum TSC rate
1557          *   2) Broken TSC compensation resets the base at each VCPU
1558          *      entry to avoid unknown leaps of TSC even when running
1559          *      again on the same CPU.  This may cause apparent elapsed
1560          *      time to disappear, and the guest to stand still or run
1561          *      very slowly.
1562          */
1563         if (vcpu->tsc_catchup) {
1564                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1565                 if (tsc > tsc_timestamp) {
1566                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1567                         tsc_timestamp = tsc;
1568                 }
1569         }
1570
1571         local_irq_restore(flags);
1572
1573         if (!vcpu->pv_time_enabled)
1574                 return 0;
1575
1576         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1577                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1578                                    &vcpu->hv_clock.tsc_shift,
1579                                    &vcpu->hv_clock.tsc_to_system_mul);
1580                 vcpu->hw_tsc_khz = this_tsc_khz;
1581         }
1582
1583         /* With all the info we got, fill in the values */
1584         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1585         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1586         vcpu->last_guest_tsc = tsc_timestamp;
1587
1588         /*
1589          * The interface expects us to write an even number signaling that the
1590          * update is finished. Since the guest won't see the intermediate
1591          * state, we just increase by 2 at the end.
1592          */
1593         vcpu->hv_clock.version += 2;
1594
1595         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1596                 &guest_hv_clock, sizeof(guest_hv_clock))))
1597                 return 0;
1598
1599         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1600         pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1601
1602         if (vcpu->pvclock_set_guest_stopped_request) {
1603                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1604                 vcpu->pvclock_set_guest_stopped_request = false;
1605         }
1606
1607         /* If the host uses TSC clocksource, then it is stable */
1608         if (use_master_clock)
1609                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1610
1611         vcpu->hv_clock.flags = pvclock_flags;
1612
1613         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1614                                 &vcpu->hv_clock,
1615                                 sizeof(vcpu->hv_clock));
1616         return 0;
1617 }
1618
1619 /*
1620  * kvmclock updates which are isolated to a given vcpu, such as
1621  * vcpu->cpu migration, should not allow system_timestamp from
1622  * the rest of the vcpus to remain static. Otherwise ntp frequency
1623  * correction applies to one vcpu's system_timestamp but not
1624  * the others.
1625  *
1626  * So in those cases, request a kvmclock update for all vcpus.
1627  * We need to rate-limit these requests though, as they can
1628  * considerably slow guests that have a large number of vcpus.
1629  * The time for a remote vcpu to update its kvmclock is bound
1630  * by the delay we use to rate-limit the updates.
1631  */
1632
1633 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1634
1635 static void kvmclock_update_fn(struct work_struct *work)
1636 {
1637         int i;
1638         struct delayed_work *dwork = to_delayed_work(work);
1639         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1640                                            kvmclock_update_work);
1641         struct kvm *kvm = container_of(ka, struct kvm, arch);
1642         struct kvm_vcpu *vcpu;
1643
1644         kvm_for_each_vcpu(i, vcpu, kvm) {
1645                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
1646                 kvm_vcpu_kick(vcpu);
1647         }
1648 }
1649
1650 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1651 {
1652         struct kvm *kvm = v->kvm;
1653
1654         set_bit(KVM_REQ_CLOCK_UPDATE, &v->requests);
1655         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1656                                         KVMCLOCK_UPDATE_DELAY);
1657 }
1658
1659 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1660
1661 static void kvmclock_sync_fn(struct work_struct *work)
1662 {
1663         struct delayed_work *dwork = to_delayed_work(work);
1664         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1665                                            kvmclock_sync_work);
1666         struct kvm *kvm = container_of(ka, struct kvm, arch);
1667
1668         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
1669         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
1670                                         KVMCLOCK_SYNC_PERIOD);
1671 }
1672
1673 static bool msr_mtrr_valid(unsigned msr)
1674 {
1675         switch (msr) {
1676         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1677         case MSR_MTRRfix64K_00000:
1678         case MSR_MTRRfix16K_80000:
1679         case MSR_MTRRfix16K_A0000:
1680         case MSR_MTRRfix4K_C0000:
1681         case MSR_MTRRfix4K_C8000:
1682         case MSR_MTRRfix4K_D0000:
1683         case MSR_MTRRfix4K_D8000:
1684         case MSR_MTRRfix4K_E0000:
1685         case MSR_MTRRfix4K_E8000:
1686         case MSR_MTRRfix4K_F0000:
1687         case MSR_MTRRfix4K_F8000:
1688         case MSR_MTRRdefType:
1689         case MSR_IA32_CR_PAT:
1690                 return true;
1691         case 0x2f8:
1692                 return true;
1693         }
1694         return false;
1695 }
1696
1697 static bool valid_pat_type(unsigned t)
1698 {
1699         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1700 }
1701
1702 static bool valid_mtrr_type(unsigned t)
1703 {
1704         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1705 }
1706
1707 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1708 {
1709         int i;
1710
1711         if (!msr_mtrr_valid(msr))
1712                 return false;
1713
1714         if (msr == MSR_IA32_CR_PAT) {
1715                 for (i = 0; i < 8; i++)
1716                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1717                                 return false;
1718                 return true;
1719         } else if (msr == MSR_MTRRdefType) {
1720                 if (data & ~0xcff)
1721                         return false;
1722                 return valid_mtrr_type(data & 0xff);
1723         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1724                 for (i = 0; i < 8 ; i++)
1725                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1726                                 return false;
1727                 return true;
1728         }
1729
1730         /* variable MTRRs */
1731         return valid_mtrr_type(data & 0xff);
1732 }
1733
1734 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1735 {
1736         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1737
1738         if (!mtrr_valid(vcpu, msr, data))
1739                 return 1;
1740
1741         if (msr == MSR_MTRRdefType) {
1742                 vcpu->arch.mtrr_state.def_type = data;
1743                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1744         } else if (msr == MSR_MTRRfix64K_00000)
1745                 p[0] = data;
1746         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1747                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1748         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1749                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1750         else if (msr == MSR_IA32_CR_PAT)
1751                 vcpu->arch.pat = data;
1752         else {  /* Variable MTRRs */
1753                 int idx, is_mtrr_mask;
1754                 u64 *pt;
1755
1756                 idx = (msr - 0x200) / 2;
1757                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1758                 if (!is_mtrr_mask)
1759                         pt =
1760                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1761                 else
1762                         pt =
1763                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1764                 *pt = data;
1765         }
1766
1767         kvm_mmu_reset_context(vcpu);
1768         return 0;
1769 }
1770
1771 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1772 {
1773         u64 mcg_cap = vcpu->arch.mcg_cap;
1774         unsigned bank_num = mcg_cap & 0xff;
1775
1776         switch (msr) {
1777         case MSR_IA32_MCG_STATUS:
1778                 vcpu->arch.mcg_status = data;
1779                 break;
1780         case MSR_IA32_MCG_CTL:
1781                 if (!(mcg_cap & MCG_CTL_P))
1782                         return 1;
1783                 if (data != 0 && data != ~(u64)0)
1784                         return -1;
1785                 vcpu->arch.mcg_ctl = data;
1786                 break;
1787         default:
1788                 if (msr >= MSR_IA32_MC0_CTL &&
1789                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1790                         u32 offset = msr - MSR_IA32_MC0_CTL;
1791                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1792                          * some Linux kernels though clear bit 10 in bank 4 to
1793                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1794                          * this to avoid an uncatched #GP in the guest
1795                          */
1796                         if ((offset & 0x3) == 0 &&
1797                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1798                                 return -1;
1799                         vcpu->arch.mce_banks[offset] = data;
1800                         break;
1801                 }
1802                 return 1;
1803         }
1804         return 0;
1805 }
1806
1807 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1808 {
1809         struct kvm *kvm = vcpu->kvm;
1810         int lm = is_long_mode(vcpu);
1811         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1812                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1813         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1814                 : kvm->arch.xen_hvm_config.blob_size_32;
1815         u32 page_num = data & ~PAGE_MASK;
1816         u64 page_addr = data & PAGE_MASK;
1817         u8 *page;
1818         int r;
1819
1820         r = -E2BIG;
1821         if (page_num >= blob_size)
1822                 goto out;
1823         r = -ENOMEM;
1824         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1825         if (IS_ERR(page)) {
1826                 r = PTR_ERR(page);
1827                 goto out;
1828         }
1829         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1830                 goto out_free;
1831         r = 0;
1832 out_free:
1833         kfree(page);
1834 out:
1835         return r;
1836 }
1837
1838 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1839 {
1840         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1841 }
1842
1843 static bool kvm_hv_msr_partition_wide(u32 msr)
1844 {
1845         bool r = false;
1846         switch (msr) {
1847         case HV_X64_MSR_GUEST_OS_ID:
1848         case HV_X64_MSR_HYPERCALL:
1849         case HV_X64_MSR_REFERENCE_TSC:
1850         case HV_X64_MSR_TIME_REF_COUNT:
1851                 r = true;
1852                 break;
1853         }
1854
1855         return r;
1856 }
1857
1858 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1859 {
1860         struct kvm *kvm = vcpu->kvm;
1861
1862         switch (msr) {
1863         case HV_X64_MSR_GUEST_OS_ID:
1864                 kvm->arch.hv_guest_os_id = data;
1865                 /* setting guest os id to zero disables hypercall page */
1866                 if (!kvm->arch.hv_guest_os_id)
1867                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1868                 break;
1869         case HV_X64_MSR_HYPERCALL: {
1870                 u64 gfn;
1871                 unsigned long addr;
1872                 u8 instructions[4];
1873
1874                 /* if guest os id is not set hypercall should remain disabled */
1875                 if (!kvm->arch.hv_guest_os_id)
1876                         break;
1877                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1878                         kvm->arch.hv_hypercall = data;
1879                         break;
1880                 }
1881                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1882                 addr = gfn_to_hva(kvm, gfn);
1883                 if (kvm_is_error_hva(addr))
1884                         return 1;
1885                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1886                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1887                 if (__copy_to_user((void __user *)addr, instructions, 4))
1888                         return 1;
1889                 kvm->arch.hv_hypercall = data;
1890                 mark_page_dirty(kvm, gfn);
1891                 break;
1892         }
1893         case HV_X64_MSR_REFERENCE_TSC: {
1894                 u64 gfn;
1895                 HV_REFERENCE_TSC_PAGE tsc_ref;
1896                 memset(&tsc_ref, 0, sizeof(tsc_ref));
1897                 kvm->arch.hv_tsc_page = data;
1898                 if (!(data & HV_X64_MSR_TSC_REFERENCE_ENABLE))
1899                         break;
1900                 gfn = data >> HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT;
1901                 if (kvm_write_guest(kvm, gfn << HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT,
1902                         &tsc_ref, sizeof(tsc_ref)))
1903                         return 1;
1904                 mark_page_dirty(kvm, gfn);
1905                 break;
1906         }
1907         default:
1908                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1909                             "data 0x%llx\n", msr, data);
1910                 return 1;
1911         }
1912         return 0;
1913 }
1914
1915 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1916 {
1917         switch (msr) {
1918         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1919                 u64 gfn;
1920                 unsigned long addr;
1921
1922                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1923                         vcpu->arch.hv_vapic = data;
1924                         if (kvm_lapic_enable_pv_eoi(vcpu, 0))
1925                                 return 1;
1926                         break;
1927                 }
1928                 gfn = data >> HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT;
1929                 addr = gfn_to_hva(vcpu->kvm, gfn);
1930                 if (kvm_is_error_hva(addr))
1931                         return 1;
1932                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1933                         return 1;
1934                 vcpu->arch.hv_vapic = data;
1935                 mark_page_dirty(vcpu->kvm, gfn);
1936                 if (kvm_lapic_enable_pv_eoi(vcpu, gfn_to_gpa(gfn) | KVM_MSR_ENABLED))
1937                         return 1;
1938                 break;
1939         }
1940         case HV_X64_MSR_EOI:
1941                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1942         case HV_X64_MSR_ICR:
1943                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1944         case HV_X64_MSR_TPR:
1945                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1946         default:
1947                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1948                             "data 0x%llx\n", msr, data);
1949                 return 1;
1950         }
1951
1952         return 0;
1953 }
1954
1955 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1956 {
1957         gpa_t gpa = data & ~0x3f;
1958
1959         /* Bits 2:5 are reserved, Should be zero */
1960         if (data & 0x3c)
1961                 return 1;
1962
1963         vcpu->arch.apf.msr_val = data;
1964
1965         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1966                 kvm_clear_async_pf_completion_queue(vcpu);
1967                 kvm_async_pf_hash_reset(vcpu);
1968                 return 0;
1969         }
1970
1971         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1972                                         sizeof(u32)))
1973                 return 1;
1974
1975         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1976         kvm_async_pf_wakeup_all(vcpu);
1977         return 0;
1978 }
1979
1980 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1981 {
1982         vcpu->arch.pv_time_enabled = false;
1983 }
1984
1985 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1986 {
1987         u64 delta;
1988
1989         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1990                 return;
1991
1992         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1993         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1994         vcpu->arch.st.accum_steal = delta;
1995 }
1996
1997 static void record_steal_time(struct kvm_vcpu *vcpu)
1998 {
1999         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2000                 return;
2001
2002         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2003                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2004                 return;
2005
2006         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
2007         vcpu->arch.st.steal.version += 2;
2008         vcpu->arch.st.accum_steal = 0;
2009
2010         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2011                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2012 }
2013
2014 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2015 {
2016         bool pr = false;
2017         u32 msr = msr_info->index;
2018         u64 data = msr_info->data;
2019
2020         switch (msr) {
2021         case MSR_AMD64_NB_CFG:
2022         case MSR_IA32_UCODE_REV:
2023         case MSR_IA32_UCODE_WRITE:
2024         case MSR_VM_HSAVE_PA:
2025         case MSR_AMD64_PATCH_LOADER:
2026         case MSR_AMD64_BU_CFG2:
2027                 break;
2028
2029         case MSR_EFER:
2030                 return set_efer(vcpu, data);
2031         case MSR_K7_HWCR:
2032                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2033                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2034                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2035                 if (data != 0) {
2036                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2037                                     data);
2038                         return 1;
2039                 }
2040                 break;
2041         case MSR_FAM10H_MMIO_CONF_BASE:
2042                 if (data != 0) {
2043                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2044                                     "0x%llx\n", data);
2045                         return 1;
2046                 }
2047                 break;
2048         case MSR_IA32_DEBUGCTLMSR:
2049                 if (!data) {
2050                         /* We support the non-activated case already */
2051                         break;
2052                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2053                         /* Values other than LBR and BTF are vendor-specific,
2054                            thus reserved and should throw a #GP */
2055                         return 1;
2056                 }
2057                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2058                             __func__, data);
2059                 break;
2060         case 0x200 ... 0x2ff:
2061                 return set_msr_mtrr(vcpu, msr, data);
2062         case MSR_IA32_APICBASE:
2063                 return kvm_set_apic_base(vcpu, msr_info);
2064         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2065                 return kvm_x2apic_msr_write(vcpu, msr, data);
2066         case MSR_IA32_TSCDEADLINE:
2067                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2068                 break;
2069         case MSR_IA32_TSC_ADJUST:
2070                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2071                         if (!msr_info->host_initiated) {
2072                                 u64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2073                                 kvm_x86_ops->adjust_tsc_offset(vcpu, adj, true);
2074                         }
2075                         vcpu->arch.ia32_tsc_adjust_msr = data;
2076                 }
2077                 break;
2078         case MSR_IA32_MISC_ENABLE:
2079                 vcpu->arch.ia32_misc_enable_msr = data;
2080                 break;
2081         case MSR_KVM_WALL_CLOCK_NEW:
2082         case MSR_KVM_WALL_CLOCK:
2083                 vcpu->kvm->arch.wall_clock = data;
2084                 kvm_write_wall_clock(vcpu->kvm, data);
2085                 break;
2086         case MSR_KVM_SYSTEM_TIME_NEW:
2087         case MSR_KVM_SYSTEM_TIME: {
2088                 u64 gpa_offset;
2089                 kvmclock_reset(vcpu);
2090
2091                 vcpu->arch.time = data;
2092                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2093
2094                 /* we verify if the enable bit is set... */
2095                 if (!(data & 1))
2096                         break;
2097
2098                 gpa_offset = data & ~(PAGE_MASK | 1);
2099
2100                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2101                      &vcpu->arch.pv_time, data & ~1ULL,
2102                      sizeof(struct pvclock_vcpu_time_info)))
2103                         vcpu->arch.pv_time_enabled = false;
2104                 else
2105                         vcpu->arch.pv_time_enabled = true;
2106
2107                 break;
2108         }
2109         case MSR_KVM_ASYNC_PF_EN:
2110                 if (kvm_pv_enable_async_pf(vcpu, data))
2111                         return 1;
2112                 break;
2113         case MSR_KVM_STEAL_TIME:
2114
2115                 if (unlikely(!sched_info_on()))
2116                         return 1;
2117
2118                 if (data & KVM_STEAL_RESERVED_MASK)
2119                         return 1;
2120
2121                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2122                                                 data & KVM_STEAL_VALID_BITS,
2123                                                 sizeof(struct kvm_steal_time)))
2124                         return 1;
2125
2126                 vcpu->arch.st.msr_val = data;
2127
2128                 if (!(data & KVM_MSR_ENABLED))
2129                         break;
2130
2131                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
2132
2133                 preempt_disable();
2134                 accumulate_steal_time(vcpu);
2135                 preempt_enable();
2136
2137                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2138
2139                 break;
2140         case MSR_KVM_PV_EOI_EN:
2141                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2142                         return 1;
2143                 break;
2144
2145         case MSR_IA32_MCG_CTL:
2146         case MSR_IA32_MCG_STATUS:
2147         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
2148                 return set_msr_mce(vcpu, msr, data);
2149
2150         /* Performance counters are not protected by a CPUID bit,
2151          * so we should check all of them in the generic path for the sake of
2152          * cross vendor migration.
2153          * Writing a zero into the event select MSRs disables them,
2154          * which we perfectly emulate ;-). Any other value should be at least
2155          * reported, some guests depend on them.
2156          */
2157         case MSR_K7_EVNTSEL0:
2158         case MSR_K7_EVNTSEL1:
2159         case MSR_K7_EVNTSEL2:
2160         case MSR_K7_EVNTSEL3:
2161                 if (data != 0)
2162                         vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2163                                     "0x%x data 0x%llx\n", msr, data);
2164                 break;
2165         /* at least RHEL 4 unconditionally writes to the perfctr registers,
2166          * so we ignore writes to make it happy.
2167          */
2168         case MSR_K7_PERFCTR0:
2169         case MSR_K7_PERFCTR1:
2170         case MSR_K7_PERFCTR2:
2171         case MSR_K7_PERFCTR3:
2172                 vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2173                             "0x%x data 0x%llx\n", msr, data);
2174                 break;
2175         case MSR_P6_PERFCTR0:
2176         case MSR_P6_PERFCTR1:
2177                 pr = true;
2178         case MSR_P6_EVNTSEL0:
2179         case MSR_P6_EVNTSEL1:
2180                 if (kvm_pmu_msr(vcpu, msr))
2181                         return kvm_pmu_set_msr(vcpu, msr_info);
2182
2183                 if (pr || data != 0)
2184                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2185                                     "0x%x data 0x%llx\n", msr, data);
2186                 break;
2187         case MSR_K7_CLK_CTL:
2188                 /*
2189                  * Ignore all writes to this no longer documented MSR.
2190                  * Writes are only relevant for old K7 processors,
2191                  * all pre-dating SVM, but a recommended workaround from
2192                  * AMD for these chips. It is possible to specify the
2193                  * affected processor models on the command line, hence
2194                  * the need to ignore the workaround.
2195                  */
2196                 break;
2197         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2198                 if (kvm_hv_msr_partition_wide(msr)) {
2199                         int r;
2200                         mutex_lock(&vcpu->kvm->lock);
2201                         r = set_msr_hyperv_pw(vcpu, msr, data);
2202                         mutex_unlock(&vcpu->kvm->lock);
2203                         return r;
2204                 } else
2205                         return set_msr_hyperv(vcpu, msr, data);
2206                 break;
2207         case MSR_IA32_BBL_CR_CTL3:
2208                 /* Drop writes to this legacy MSR -- see rdmsr
2209                  * counterpart for further detail.
2210                  */
2211                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2212                 break;
2213         case MSR_AMD64_OSVW_ID_LENGTH:
2214                 if (!guest_cpuid_has_osvw(vcpu))
2215                         return 1;
2216                 vcpu->arch.osvw.length = data;
2217                 break;
2218         case MSR_AMD64_OSVW_STATUS:
2219                 if (!guest_cpuid_has_osvw(vcpu))
2220                         return 1;
2221                 vcpu->arch.osvw.status = data;
2222                 break;
2223         default:
2224                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2225                         return xen_hvm_config(vcpu, data);
2226                 if (kvm_pmu_msr(vcpu, msr))
2227                         return kvm_pmu_set_msr(vcpu, msr_info);
2228                 if (!ignore_msrs) {
2229                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2230                                     msr, data);
2231                         return 1;
2232                 } else {
2233                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2234                                     msr, data);
2235                         break;
2236                 }
2237         }
2238         return 0;
2239 }
2240 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2241
2242
2243 /*
2244  * Reads an msr value (of 'msr_index') into 'pdata'.
2245  * Returns 0 on success, non-0 otherwise.
2246  * Assumes vcpu_load() was already called.
2247  */
2248 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
2249 {
2250         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
2251 }
2252
2253 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2254 {
2255         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
2256
2257         if (!msr_mtrr_valid(msr))
2258                 return 1;
2259
2260         if (msr == MSR_MTRRdefType)
2261                 *pdata = vcpu->arch.mtrr_state.def_type +
2262                          (vcpu->arch.mtrr_state.enabled << 10);
2263         else if (msr == MSR_MTRRfix64K_00000)
2264                 *pdata = p[0];
2265         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
2266                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
2267         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
2268                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
2269         else if (msr == MSR_IA32_CR_PAT)
2270                 *pdata = vcpu->arch.pat;
2271         else {  /* Variable MTRRs */
2272                 int idx, is_mtrr_mask;
2273                 u64 *pt;
2274
2275                 idx = (msr - 0x200) / 2;
2276                 is_mtrr_mask = msr - 0x200 - 2 * idx;
2277                 if (!is_mtrr_mask)
2278                         pt =
2279                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
2280                 else
2281                         pt =
2282                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
2283                 *pdata = *pt;
2284         }
2285
2286         return 0;
2287 }
2288
2289 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2290 {
2291         u64 data;
2292         u64 mcg_cap = vcpu->arch.mcg_cap;
2293         unsigned bank_num = mcg_cap & 0xff;
2294
2295         switch (msr) {
2296         case MSR_IA32_P5_MC_ADDR:
2297         case MSR_IA32_P5_MC_TYPE:
2298                 data = 0;
2299                 break;
2300         case MSR_IA32_MCG_CAP:
2301                 data = vcpu->arch.mcg_cap;
2302                 break;
2303         case MSR_IA32_MCG_CTL:
2304                 if (!(mcg_cap & MCG_CTL_P))
2305                         return 1;
2306                 data = vcpu->arch.mcg_ctl;
2307                 break;
2308         case MSR_IA32_MCG_STATUS:
2309                 data = vcpu->arch.mcg_status;
2310                 break;
2311         default:
2312                 if (msr >= MSR_IA32_MC0_CTL &&
2313                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
2314                         u32 offset = msr - MSR_IA32_MC0_CTL;
2315                         data = vcpu->arch.mce_banks[offset];
2316                         break;
2317                 }
2318                 return 1;
2319         }
2320         *pdata = data;
2321         return 0;
2322 }
2323
2324 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2325 {
2326         u64 data = 0;
2327         struct kvm *kvm = vcpu->kvm;
2328
2329         switch (msr) {
2330         case HV_X64_MSR_GUEST_OS_ID:
2331                 data = kvm->arch.hv_guest_os_id;
2332                 break;
2333         case HV_X64_MSR_HYPERCALL:
2334                 data = kvm->arch.hv_hypercall;
2335                 break;
2336         case HV_X64_MSR_TIME_REF_COUNT: {
2337                 data =
2338                      div_u64(get_kernel_ns() + kvm->arch.kvmclock_offset, 100);
2339                 break;
2340         }
2341         case HV_X64_MSR_REFERENCE_TSC:
2342                 data = kvm->arch.hv_tsc_page;
2343                 break;
2344         default:
2345                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2346                 return 1;
2347         }
2348
2349         *pdata = data;
2350         return 0;
2351 }
2352
2353 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2354 {
2355         u64 data = 0;
2356
2357         switch (msr) {
2358         case HV_X64_MSR_VP_INDEX: {
2359                 int r;
2360                 struct kvm_vcpu *v;
2361                 kvm_for_each_vcpu(r, v, vcpu->kvm) {
2362                         if (v == vcpu) {
2363                                 data = r;
2364                                 break;
2365                         }
2366                 }
2367                 break;
2368         }
2369         case HV_X64_MSR_EOI:
2370                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
2371         case HV_X64_MSR_ICR:
2372                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
2373         case HV_X64_MSR_TPR:
2374                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
2375         case HV_X64_MSR_APIC_ASSIST_PAGE:
2376                 data = vcpu->arch.hv_vapic;
2377                 break;
2378         default:
2379                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2380                 return 1;
2381         }
2382         *pdata = data;
2383         return 0;
2384 }
2385
2386 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2387 {
2388         u64 data;
2389
2390         switch (msr) {
2391         case MSR_IA32_PLATFORM_ID:
2392         case MSR_IA32_EBL_CR_POWERON:
2393         case MSR_IA32_DEBUGCTLMSR:
2394         case MSR_IA32_LASTBRANCHFROMIP:
2395         case MSR_IA32_LASTBRANCHTOIP:
2396         case MSR_IA32_LASTINTFROMIP:
2397         case MSR_IA32_LASTINTTOIP:
2398         case MSR_K8_SYSCFG:
2399         case MSR_K7_HWCR:
2400         case MSR_VM_HSAVE_PA:
2401         case MSR_K7_EVNTSEL0:
2402         case MSR_K7_PERFCTR0:
2403         case MSR_K8_INT_PENDING_MSG:
2404         case MSR_AMD64_NB_CFG:
2405         case MSR_FAM10H_MMIO_CONF_BASE:
2406         case MSR_AMD64_BU_CFG2:
2407                 data = 0;
2408                 break;
2409         case MSR_P6_PERFCTR0:
2410         case MSR_P6_PERFCTR1:
2411         case MSR_P6_EVNTSEL0:
2412         case MSR_P6_EVNTSEL1:
2413                 if (kvm_pmu_msr(vcpu, msr))
2414                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2415                 data = 0;
2416                 break;
2417         case MSR_IA32_UCODE_REV:
2418                 data = 0x100000000ULL;
2419                 break;
2420         case MSR_MTRRcap:
2421                 data = 0x500 | KVM_NR_VAR_MTRR;
2422                 break;
2423         case 0x200 ... 0x2ff:
2424                 return get_msr_mtrr(vcpu, msr, pdata);
2425         case 0xcd: /* fsb frequency */
2426                 data = 3;
2427                 break;
2428                 /*
2429                  * MSR_EBC_FREQUENCY_ID
2430                  * Conservative value valid for even the basic CPU models.
2431                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2432                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2433                  * and 266MHz for model 3, or 4. Set Core Clock
2434                  * Frequency to System Bus Frequency Ratio to 1 (bits
2435                  * 31:24) even though these are only valid for CPU
2436                  * models > 2, however guests may end up dividing or
2437                  * multiplying by zero otherwise.
2438                  */
2439         case MSR_EBC_FREQUENCY_ID:
2440                 data = 1 << 24;
2441                 break;
2442         case MSR_IA32_APICBASE:
2443                 data = kvm_get_apic_base(vcpu);
2444                 break;
2445         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2446                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
2447                 break;
2448         case MSR_IA32_TSCDEADLINE:
2449                 data = kvm_get_lapic_tscdeadline_msr(vcpu);
2450                 break;
2451         case MSR_IA32_TSC_ADJUST:
2452                 data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2453                 break;
2454         case MSR_IA32_MISC_ENABLE:
2455                 data = vcpu->arch.ia32_misc_enable_msr;
2456                 break;
2457         case MSR_IA32_PERF_STATUS:
2458                 /* TSC increment by tick */
2459                 data = 1000ULL;
2460                 /* CPU multiplier */
2461                 data |= (((uint64_t)4ULL) << 40);
2462                 break;
2463         case MSR_EFER:
2464                 data = vcpu->arch.efer;
2465                 break;
2466         case MSR_KVM_WALL_CLOCK:
2467         case MSR_KVM_WALL_CLOCK_NEW:
2468                 data = vcpu->kvm->arch.wall_clock;
2469                 break;
2470         case MSR_KVM_SYSTEM_TIME:
2471         case MSR_KVM_SYSTEM_TIME_NEW:
2472                 data = vcpu->arch.time;
2473                 break;
2474         case MSR_KVM_ASYNC_PF_EN:
2475                 data = vcpu->arch.apf.msr_val;
2476                 break;
2477         case MSR_KVM_STEAL_TIME:
2478                 data = vcpu->arch.st.msr_val;
2479                 break;
2480         case MSR_KVM_PV_EOI_EN:
2481                 data = vcpu->arch.pv_eoi.msr_val;
2482                 break;
2483         case MSR_IA32_P5_MC_ADDR:
2484         case MSR_IA32_P5_MC_TYPE:
2485         case MSR_IA32_MCG_CAP:
2486         case MSR_IA32_MCG_CTL:
2487         case MSR_IA32_MCG_STATUS:
2488         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
2489                 return get_msr_mce(vcpu, msr, pdata);
2490         case MSR_K7_CLK_CTL:
2491                 /*
2492                  * Provide expected ramp-up count for K7. All other
2493                  * are set to zero, indicating minimum divisors for
2494                  * every field.
2495                  *
2496                  * This prevents guest kernels on AMD host with CPU
2497                  * type 6, model 8 and higher from exploding due to
2498                  * the rdmsr failing.
2499                  */
2500                 data = 0x20000000;
2501                 break;
2502         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2503                 if (kvm_hv_msr_partition_wide(msr)) {
2504                         int r;
2505                         mutex_lock(&vcpu->kvm->lock);
2506                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
2507                         mutex_unlock(&vcpu->kvm->lock);
2508                         return r;
2509                 } else
2510                         return get_msr_hyperv(vcpu, msr, pdata);
2511                 break;
2512         case MSR_IA32_BBL_CR_CTL3:
2513                 /* This legacy MSR exists but isn't fully documented in current
2514                  * silicon.  It is however accessed by winxp in very narrow
2515                  * scenarios where it sets bit #19, itself documented as
2516                  * a "reserved" bit.  Best effort attempt to source coherent
2517                  * read data here should the balance of the register be
2518                  * interpreted by the guest:
2519                  *
2520                  * L2 cache control register 3: 64GB range, 256KB size,
2521                  * enabled, latency 0x1, configured
2522                  */
2523                 data = 0xbe702111;
2524                 break;
2525         case MSR_AMD64_OSVW_ID_LENGTH:
2526                 if (!guest_cpuid_has_osvw(vcpu))
2527                         return 1;
2528                 data = vcpu->arch.osvw.length;
2529                 break;
2530         case MSR_AMD64_OSVW_STATUS:
2531                 if (!guest_cpuid_has_osvw(vcpu))
2532                         return 1;
2533                 data = vcpu->arch.osvw.status;
2534                 break;
2535         default:
2536                 if (kvm_pmu_msr(vcpu, msr))
2537                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2538                 if (!ignore_msrs) {
2539                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
2540                         return 1;
2541                 } else {
2542                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
2543                         data = 0;
2544                 }
2545                 break;
2546         }
2547         *pdata = data;
2548         return 0;
2549 }
2550 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2551
2552 /*
2553  * Read or write a bunch of msrs. All parameters are kernel addresses.
2554  *
2555  * @return number of msrs set successfully.
2556  */
2557 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2558                     struct kvm_msr_entry *entries,
2559                     int (*do_msr)(struct kvm_vcpu *vcpu,
2560                                   unsigned index, u64 *data))
2561 {
2562         int i, idx;
2563
2564         idx = srcu_read_lock(&vcpu->kvm->srcu);
2565         for (i = 0; i < msrs->nmsrs; ++i)
2566                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2567                         break;
2568         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2569
2570         return i;
2571 }
2572
2573 /*
2574  * Read or write a bunch of msrs. Parameters are user addresses.
2575  *
2576  * @return number of msrs set successfully.
2577  */
2578 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2579                   int (*do_msr)(struct kvm_vcpu *vcpu,
2580                                 unsigned index, u64 *data),
2581                   int writeback)
2582 {
2583         struct kvm_msrs msrs;
2584         struct kvm_msr_entry *entries;
2585         int r, n;
2586         unsigned size;
2587
2588         r = -EFAULT;
2589         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2590                 goto out;
2591
2592         r = -E2BIG;
2593         if (msrs.nmsrs >= MAX_IO_MSRS)
2594                 goto out;
2595
2596         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2597         entries = memdup_user(user_msrs->entries, size);
2598         if (IS_ERR(entries)) {
2599                 r = PTR_ERR(entries);
2600                 goto out;
2601         }
2602
2603         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2604         if (r < 0)
2605                 goto out_free;
2606
2607         r = -EFAULT;
2608         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2609                 goto out_free;
2610
2611         r = n;
2612
2613 out_free:
2614         kfree(entries);
2615 out:
2616         return r;
2617 }
2618
2619 int kvm_dev_ioctl_check_extension(long ext)
2620 {
2621         int r;
2622
2623         switch (ext) {
2624         case KVM_CAP_IRQCHIP:
2625         case KVM_CAP_HLT:
2626         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2627         case KVM_CAP_SET_TSS_ADDR:
2628         case KVM_CAP_EXT_CPUID:
2629         case KVM_CAP_EXT_EMUL_CPUID:
2630         case KVM_CAP_CLOCKSOURCE:
2631         case KVM_CAP_PIT:
2632         case KVM_CAP_NOP_IO_DELAY:
2633         case KVM_CAP_MP_STATE:
2634         case KVM_CAP_SYNC_MMU:
2635         case KVM_CAP_USER_NMI:
2636         case KVM_CAP_REINJECT_CONTROL:
2637         case KVM_CAP_IRQ_INJECT_STATUS:
2638         case KVM_CAP_IRQFD:
2639         case KVM_CAP_IOEVENTFD:
2640         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2641         case KVM_CAP_PIT2:
2642         case KVM_CAP_PIT_STATE2:
2643         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2644         case KVM_CAP_XEN_HVM:
2645         case KVM_CAP_ADJUST_CLOCK:
2646         case KVM_CAP_VCPU_EVENTS:
2647         case KVM_CAP_HYPERV:
2648         case KVM_CAP_HYPERV_VAPIC:
2649         case KVM_CAP_HYPERV_SPIN:
2650         case KVM_CAP_PCI_SEGMENT:
2651         case KVM_CAP_DEBUGREGS:
2652         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2653         case KVM_CAP_XSAVE:
2654         case KVM_CAP_ASYNC_PF:
2655         case KVM_CAP_GET_TSC_KHZ:
2656         case KVM_CAP_KVMCLOCK_CTRL:
2657         case KVM_CAP_READONLY_MEM:
2658         case KVM_CAP_HYPERV_TIME:
2659         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2660 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2661         case KVM_CAP_ASSIGN_DEV_IRQ:
2662         case KVM_CAP_PCI_2_3:
2663 #endif
2664                 r = 1;
2665                 break;
2666         case KVM_CAP_COALESCED_MMIO:
2667                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2668                 break;
2669         case KVM_CAP_VAPIC:
2670                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2671                 break;
2672         case KVM_CAP_NR_VCPUS:
2673                 r = KVM_SOFT_MAX_VCPUS;
2674                 break;
2675         case KVM_CAP_MAX_VCPUS:
2676                 r = KVM_MAX_VCPUS;
2677                 break;
2678         case KVM_CAP_NR_MEMSLOTS:
2679                 r = KVM_USER_MEM_SLOTS;
2680                 break;
2681         case KVM_CAP_PV_MMU:    /* obsolete */
2682                 r = 0;
2683                 break;
2684 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2685         case KVM_CAP_IOMMU:
2686                 r = iommu_present(&pci_bus_type);
2687                 break;
2688 #endif
2689         case KVM_CAP_MCE:
2690                 r = KVM_MAX_MCE_BANKS;
2691                 break;
2692         case KVM_CAP_XCRS:
2693                 r = cpu_has_xsave;
2694                 break;
2695         case KVM_CAP_TSC_CONTROL:
2696                 r = kvm_has_tsc_control;
2697                 break;
2698         case KVM_CAP_TSC_DEADLINE_TIMER:
2699                 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2700                 break;
2701         default:
2702                 r = 0;
2703                 break;
2704         }
2705         return r;
2706
2707 }
2708
2709 long kvm_arch_dev_ioctl(struct file *filp,
2710                         unsigned int ioctl, unsigned long arg)
2711 {
2712         void __user *argp = (void __user *)arg;
2713         long r;
2714
2715         switch (ioctl) {
2716         case KVM_GET_MSR_INDEX_LIST: {
2717                 struct kvm_msr_list __user *user_msr_list = argp;
2718                 struct kvm_msr_list msr_list;
2719                 unsigned n;
2720
2721                 r = -EFAULT;
2722                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2723                         goto out;
2724                 n = msr_list.nmsrs;
2725                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2726                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2727                         goto out;
2728                 r = -E2BIG;
2729                 if (n < msr_list.nmsrs)
2730                         goto out;
2731                 r = -EFAULT;
2732                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2733                                  num_msrs_to_save * sizeof(u32)))
2734                         goto out;
2735                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2736                                  &emulated_msrs,
2737                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2738                         goto out;
2739                 r = 0;
2740                 break;
2741         }
2742         case KVM_GET_SUPPORTED_CPUID:
2743         case KVM_GET_EMULATED_CPUID: {
2744                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2745                 struct kvm_cpuid2 cpuid;
2746
2747                 r = -EFAULT;
2748                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2749                         goto out;
2750
2751                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2752                                             ioctl);
2753                 if (r)
2754                         goto out;
2755
2756                 r = -EFAULT;
2757                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2758                         goto out;
2759                 r = 0;
2760                 break;
2761         }
2762         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2763                 u64 mce_cap;
2764
2765                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2766                 r = -EFAULT;
2767                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2768                         goto out;
2769                 r = 0;
2770                 break;
2771         }
2772         default:
2773                 r = -EINVAL;
2774         }
2775 out:
2776         return r;
2777 }
2778
2779 static void wbinvd_ipi(void *garbage)
2780 {
2781         wbinvd();
2782 }
2783
2784 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2785 {
2786         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2787 }
2788
2789 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2790 {
2791         /* Address WBINVD may be executed by guest */
2792         if (need_emulate_wbinvd(vcpu)) {
2793                 if (kvm_x86_ops->has_wbinvd_exit())
2794                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2795                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2796                         smp_call_function_single(vcpu->cpu,
2797                                         wbinvd_ipi, NULL, 1);
2798         }
2799
2800         kvm_x86_ops->vcpu_load(vcpu, cpu);
2801
2802         /* Apply any externally detected TSC adjustments (due to suspend) */
2803         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2804                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2805                 vcpu->arch.tsc_offset_adjustment = 0;
2806                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
2807         }
2808
2809         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2810                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2811                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2812                 if (tsc_delta < 0)
2813                         mark_tsc_unstable("KVM discovered backwards TSC");
2814                 if (check_tsc_unstable()) {
2815                         u64 offset = kvm_x86_ops->compute_tsc_offset(vcpu,
2816                                                 vcpu->arch.last_guest_tsc);
2817                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2818                         vcpu->arch.tsc_catchup = 1;
2819                 }
2820                 /*
2821                  * On a host with synchronized TSC, there is no need to update
2822                  * kvmclock on vcpu->cpu migration
2823                  */
2824                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2825                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2826                 if (vcpu->cpu != cpu)
2827                         kvm_migrate_timers(vcpu);
2828                 vcpu->cpu = cpu;
2829         }
2830
2831         accumulate_steal_time(vcpu);
2832         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2833 }
2834
2835 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2836 {
2837         kvm_x86_ops->vcpu_put(vcpu);
2838         kvm_put_guest_fpu(vcpu);
2839         vcpu->arch.last_host_tsc = native_read_tsc();
2840 }
2841
2842 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2843                                     struct kvm_lapic_state *s)
2844 {
2845         kvm_x86_ops->sync_pir_to_irr(vcpu);
2846         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2847
2848         return 0;
2849 }
2850
2851 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2852                                     struct kvm_lapic_state *s)
2853 {
2854         kvm_apic_post_state_restore(vcpu, s);
2855         update_cr8_intercept(vcpu);
2856
2857         return 0;
2858 }
2859
2860 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2861                                     struct kvm_interrupt *irq)
2862 {
2863         if (irq->irq >= KVM_NR_INTERRUPTS)
2864                 return -EINVAL;
2865         if (irqchip_in_kernel(vcpu->kvm))
2866                 return -ENXIO;
2867
2868         kvm_queue_interrupt(vcpu, irq->irq, false);
2869         kvm_make_request(KVM_REQ_EVENT, vcpu);
2870
2871         return 0;
2872 }
2873
2874 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2875 {
2876         kvm_inject_nmi(vcpu);
2877
2878         return 0;
2879 }
2880
2881 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2882                                            struct kvm_tpr_access_ctl *tac)
2883 {
2884         if (tac->flags)
2885                 return -EINVAL;
2886         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2887         return 0;
2888 }
2889
2890 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2891                                         u64 mcg_cap)
2892 {
2893         int r;
2894         unsigned bank_num = mcg_cap & 0xff, bank;
2895
2896         r = -EINVAL;
2897         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2898                 goto out;
2899         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2900                 goto out;
2901         r = 0;
2902         vcpu->arch.mcg_cap = mcg_cap;
2903         /* Init IA32_MCG_CTL to all 1s */
2904         if (mcg_cap & MCG_CTL_P)
2905                 vcpu->arch.mcg_ctl = ~(u64)0;
2906         /* Init IA32_MCi_CTL to all 1s */
2907         for (bank = 0; bank < bank_num; bank++)
2908                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2909 out:
2910         return r;
2911 }
2912
2913 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2914                                       struct kvm_x86_mce *mce)
2915 {
2916         u64 mcg_cap = vcpu->arch.mcg_cap;
2917         unsigned bank_num = mcg_cap & 0xff;
2918         u64 *banks = vcpu->arch.mce_banks;
2919
2920         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2921                 return -EINVAL;
2922         /*
2923          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2924          * reporting is disabled
2925          */
2926         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2927             vcpu->arch.mcg_ctl != ~(u64)0)
2928                 return 0;
2929         banks += 4 * mce->bank;
2930         /*
2931          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2932          * reporting is disabled for the bank
2933          */
2934         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2935                 return 0;
2936         if (mce->status & MCI_STATUS_UC) {
2937                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2938                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2939                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2940                         return 0;
2941                 }
2942                 if (banks[1] & MCI_STATUS_VAL)
2943                         mce->status |= MCI_STATUS_OVER;
2944                 banks[2] = mce->addr;
2945                 banks[3] = mce->misc;
2946                 vcpu->arch.mcg_status = mce->mcg_status;
2947                 banks[1] = mce->status;
2948                 kvm_queue_exception(vcpu, MC_VECTOR);
2949         } else if (!(banks[1] & MCI_STATUS_VAL)
2950                    || !(banks[1] & MCI_STATUS_UC)) {
2951                 if (banks[1] & MCI_STATUS_VAL)
2952                         mce->status |= MCI_STATUS_OVER;
2953                 banks[2] = mce->addr;
2954                 banks[3] = mce->misc;
2955                 banks[1] = mce->status;
2956         } else
2957                 banks[1] |= MCI_STATUS_OVER;
2958         return 0;
2959 }
2960
2961 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2962                                                struct kvm_vcpu_events *events)
2963 {
2964         process_nmi(vcpu);
2965         events->exception.injected =
2966                 vcpu->arch.exception.pending &&
2967                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2968         events->exception.nr = vcpu->arch.exception.nr;
2969         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2970         events->exception.pad = 0;
2971         events->exception.error_code = vcpu->arch.exception.error_code;
2972
2973         events->interrupt.injected =
2974                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2975         events->interrupt.nr = vcpu->arch.interrupt.nr;
2976         events->interrupt.soft = 0;
2977         events->interrupt.shadow =
2978                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2979                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2980
2981         events->nmi.injected = vcpu->arch.nmi_injected;
2982         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2983         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2984         events->nmi.pad = 0;
2985
2986         events->sipi_vector = 0; /* never valid when reporting to user space */
2987
2988         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2989                          | KVM_VCPUEVENT_VALID_SHADOW);
2990         memset(&events->reserved, 0, sizeof(events->reserved));
2991 }
2992
2993 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2994                                               struct kvm_vcpu_events *events)
2995 {
2996         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2997                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2998                               | KVM_VCPUEVENT_VALID_SHADOW))
2999                 return -EINVAL;
3000
3001         process_nmi(vcpu);
3002         vcpu->arch.exception.pending = events->exception.injected;
3003         vcpu->arch.exception.nr = events->exception.nr;
3004         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3005         vcpu->arch.exception.error_code = events->exception.error_code;
3006
3007         vcpu->arch.interrupt.pending = events->interrupt.injected;
3008         vcpu->arch.interrupt.nr = events->interrupt.nr;
3009         vcpu->arch.interrupt.soft = events->interrupt.soft;
3010         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3011                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3012                                                   events->interrupt.shadow);
3013
3014         vcpu->arch.nmi_injected = events->nmi.injected;
3015         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3016                 vcpu->arch.nmi_pending = events->nmi.pending;
3017         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3018
3019         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3020             kvm_vcpu_has_lapic(vcpu))
3021                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3022
3023         kvm_make_request(KVM_REQ_EVENT, vcpu);
3024
3025         return 0;
3026 }
3027
3028 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3029                                              struct kvm_debugregs *dbgregs)
3030 {
3031         unsigned long val;
3032
3033         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3034         _kvm_get_dr(vcpu, 6, &val);
3035         dbgregs->dr6 = val;
3036         dbgregs->dr7 = vcpu->arch.dr7;
3037         dbgregs->flags = 0;
3038         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3039 }
3040
3041 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3042                                             struct kvm_debugregs *dbgregs)
3043 {
3044         if (dbgregs->flags)
3045                 return -EINVAL;
3046
3047         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3048         vcpu->arch.dr6 = dbgregs->dr6;
3049         kvm_update_dr6(vcpu);
3050         vcpu->arch.dr7 = dbgregs->dr7;
3051         kvm_update_dr7(vcpu);
3052
3053         return 0;
3054 }
3055
3056 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3057                                          struct kvm_xsave *guest_xsave)
3058 {
3059         if (cpu_has_xsave) {
3060                 memcpy(guest_xsave->region,
3061                         &vcpu->arch.guest_fpu.state->xsave,
3062                         vcpu->arch.guest_xstate_size);
3063                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] &=
3064                         vcpu->arch.guest_supported_xcr0 | XSTATE_FPSSE;
3065         } else {
3066                 memcpy(guest_xsave->region,
3067                         &vcpu->arch.guest_fpu.state->fxsave,
3068                         sizeof(struct i387_fxsave_struct));
3069                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3070                         XSTATE_FPSSE;
3071         }
3072 }
3073
3074 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3075                                         struct kvm_xsave *guest_xsave)
3076 {
3077         u64 xstate_bv =
3078                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3079
3080         if (cpu_has_xsave) {
3081                 /*
3082                  * Here we allow setting states that are not present in
3083                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3084                  * with old userspace.
3085                  */
3086                 if (xstate_bv & ~kvm_supported_xcr0())
3087                         return -EINVAL;
3088                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
3089                         guest_xsave->region, vcpu->arch.guest_xstate_size);
3090         } else {
3091                 if (xstate_bv & ~XSTATE_FPSSE)
3092                         return -EINVAL;
3093                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
3094                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
3095         }
3096         return 0;
3097 }
3098
3099 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3100                                         struct kvm_xcrs *guest_xcrs)
3101 {
3102         if (!cpu_has_xsave) {
3103                 guest_xcrs->nr_xcrs = 0;
3104                 return;
3105         }
3106
3107         guest_xcrs->nr_xcrs = 1;
3108         guest_xcrs->flags = 0;
3109         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3110         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3111 }
3112
3113 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3114                                        struct kvm_xcrs *guest_xcrs)
3115 {
3116         int i, r = 0;
3117
3118         if (!cpu_has_xsave)
3119                 return -EINVAL;
3120
3121         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3122                 return -EINVAL;
3123
3124         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3125                 /* Only support XCR0 currently */
3126                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3127                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3128                                 guest_xcrs->xcrs[i].value);
3129                         break;
3130                 }
3131         if (r)
3132                 r = -EINVAL;
3133         return r;
3134 }
3135
3136 /*
3137  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3138  * stopped by the hypervisor.  This function will be called from the host only.
3139  * EINVAL is returned when the host attempts to set the flag for a guest that
3140  * does not support pv clocks.
3141  */
3142 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3143 {
3144         if (!vcpu->arch.pv_time_enabled)
3145                 return -EINVAL;
3146         vcpu->arch.pvclock_set_guest_stopped_request = true;
3147         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3148         return 0;
3149 }
3150
3151 long kvm_arch_vcpu_ioctl(struct file *filp,
3152                          unsigned int ioctl, unsigned long arg)
3153 {
3154         struct kvm_vcpu *vcpu = filp->private_data;
3155         void __user *argp = (void __user *)arg;
3156         int r;
3157         union {
3158                 struct kvm_lapic_state *lapic;
3159                 struct kvm_xsave *xsave;
3160                 struct kvm_xcrs *xcrs;
3161                 void *buffer;
3162         } u;
3163
3164         u.buffer = NULL;
3165         switch (ioctl) {
3166         case KVM_GET_LAPIC: {
3167                 r = -EINVAL;
3168                 if (!vcpu->arch.apic)
3169                         goto out;
3170                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3171
3172                 r = -ENOMEM;
3173                 if (!u.lapic)
3174                         goto out;
3175                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3176                 if (r)
3177                         goto out;
3178                 r = -EFAULT;
3179                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3180                         goto out;
3181                 r = 0;
3182                 break;
3183         }
3184         case KVM_SET_LAPIC: {
3185                 r = -EINVAL;
3186                 if (!vcpu->arch.apic)
3187                         goto out;
3188                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3189                 if (IS_ERR(u.lapic))
3190                         return PTR_ERR(u.lapic);
3191
3192                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3193                 break;
3194         }
3195         case KVM_INTERRUPT: {
3196                 struct kvm_interrupt irq;
3197
3198                 r = -EFAULT;
3199                 if (copy_from_user(&irq, argp, sizeof irq))
3200                         goto out;
3201                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3202                 break;
3203         }
3204         case KVM_NMI: {
3205                 r = kvm_vcpu_ioctl_nmi(vcpu);
3206                 break;
3207         }
3208         case KVM_SET_CPUID: {
3209                 struct kvm_cpuid __user *cpuid_arg = argp;
3210                 struct kvm_cpuid cpuid;
3211
3212                 r = -EFAULT;
3213                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3214                         goto out;
3215                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3216                 break;
3217         }
3218         case KVM_SET_CPUID2: {
3219                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3220                 struct kvm_cpuid2 cpuid;
3221
3222                 r = -EFAULT;
3223                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3224                         goto out;
3225                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3226                                               cpuid_arg->entries);
3227                 break;
3228         }
3229         case KVM_GET_CPUID2: {
3230                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3231                 struct kvm_cpuid2 cpuid;
3232
3233                 r = -EFAULT;
3234                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3235                         goto out;
3236                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3237                                               cpuid_arg->entries);
3238                 if (r)
3239                         goto out;
3240                 r = -EFAULT;
3241                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3242                         goto out;
3243                 r = 0;
3244                 break;
3245         }
3246         case KVM_GET_MSRS:
3247                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
3248                 break;
3249         case KVM_SET_MSRS:
3250                 r = msr_io(vcpu, argp, do_set_msr, 0);
3251                 break;
3252         case KVM_TPR_ACCESS_REPORTING: {
3253                 struct kvm_tpr_access_ctl tac;
3254
3255                 r = -EFAULT;
3256                 if (copy_from_user(&tac, argp, sizeof tac))
3257                         goto out;
3258                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3259                 if (r)
3260                         goto out;
3261                 r = -EFAULT;
3262                 if (copy_to_user(argp, &tac, sizeof tac))
3263                         goto out;
3264                 r = 0;
3265                 break;
3266         };
3267         case KVM_SET_VAPIC_ADDR: {
3268                 struct kvm_vapic_addr va;
3269
3270                 r = -EINVAL;
3271                 if (!irqchip_in_kernel(vcpu->kvm))
3272                         goto out;
3273                 r = -EFAULT;
3274                 if (copy_from_user(&va, argp, sizeof va))
3275                         goto out;
3276                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3277                 break;
3278         }
3279         case KVM_X86_SETUP_MCE: {
3280                 u64 mcg_cap;
3281
3282                 r = -EFAULT;
3283                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3284                         goto out;
3285                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3286                 break;
3287         }
3288         case KVM_X86_SET_MCE: {
3289                 struct kvm_x86_mce mce;
3290
3291                 r = -EFAULT;
3292                 if (copy_from_user(&mce, argp, sizeof mce))
3293                         goto out;
3294                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3295                 break;
3296         }
3297         case KVM_GET_VCPU_EVENTS: {
3298                 struct kvm_vcpu_events events;
3299
3300                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3301
3302                 r = -EFAULT;
3303                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3304                         break;
3305                 r = 0;
3306                 break;
3307         }
3308         case KVM_SET_VCPU_EVENTS: {
3309                 struct kvm_vcpu_events events;
3310
3311                 r = -EFAULT;
3312                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3313                         break;
3314
3315                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3316                 break;
3317         }
3318         case KVM_GET_DEBUGREGS: {
3319                 struct kvm_debugregs dbgregs;
3320
3321                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3322
3323                 r = -EFAULT;
3324                 if (copy_to_user(argp, &dbgregs,
3325                                  sizeof(struct kvm_debugregs)))
3326                         break;
3327                 r = 0;
3328                 break;
3329         }
3330         case KVM_SET_DEBUGREGS: {
3331                 struct kvm_debugregs dbgregs;
3332
3333                 r = -EFAULT;
3334                 if (copy_from_user(&dbgregs, argp,
3335                                    sizeof(struct kvm_debugregs)))
3336                         break;
3337
3338                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3339                 break;
3340         }
3341         case KVM_GET_XSAVE: {
3342                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3343                 r = -ENOMEM;
3344                 if (!u.xsave)
3345                         break;
3346
3347                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3348
3349                 r = -EFAULT;
3350                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3351                         break;
3352                 r = 0;
3353                 break;
3354         }
3355         case KVM_SET_XSAVE: {
3356                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3357                 if (IS_ERR(u.xsave))
3358                         return PTR_ERR(u.xsave);
3359
3360                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3361                 break;
3362         }
3363         case KVM_GET_XCRS: {
3364                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3365                 r = -ENOMEM;
3366                 if (!u.xcrs)
3367                         break;
3368
3369                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3370
3371                 r = -EFAULT;
3372                 if (copy_to_user(argp, u.xcrs,
3373                                  sizeof(struct kvm_xcrs)))
3374                         break;
3375                 r = 0;
3376                 break;
3377         }
3378         case KVM_SET_XCRS: {
3379                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3380                 if (IS_ERR(u.xcrs))
3381                         return PTR_ERR(u.xcrs);
3382
3383                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3384                 break;
3385         }
3386         case KVM_SET_TSC_KHZ: {
3387                 u32 user_tsc_khz;
3388
3389                 r = -EINVAL;
3390                 user_tsc_khz = (u32)arg;
3391
3392                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3393                         goto out;
3394
3395                 if (user_tsc_khz == 0)
3396                         user_tsc_khz = tsc_khz;
3397
3398                 kvm_set_tsc_khz(vcpu, user_tsc_khz);
3399
3400                 r = 0;
3401                 goto out;
3402         }
3403         case KVM_GET_TSC_KHZ: {
3404                 r = vcpu->arch.virtual_tsc_khz;
3405                 goto out;
3406         }
3407         case KVM_KVMCLOCK_CTRL: {
3408                 r = kvm_set_guest_paused(vcpu);
3409                 goto out;
3410         }
3411         default:
3412                 r = -EINVAL;
3413         }
3414 out:
3415         kfree(u.buffer);
3416         return r;
3417 }
3418
3419 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3420 {
3421         return VM_FAULT_SIGBUS;
3422 }
3423
3424 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3425 {
3426         int ret;
3427
3428         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3429                 return -EINVAL;
3430         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3431         return ret;
3432 }
3433
3434 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3435                                               u64 ident_addr)
3436 {
3437         kvm->arch.ept_identity_map_addr = ident_addr;
3438         return 0;
3439 }
3440
3441 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3442                                           u32 kvm_nr_mmu_pages)
3443 {
3444         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3445                 return -EINVAL;
3446
3447         mutex_lock(&kvm->slots_lock);
3448
3449         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3450         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3451
3452         mutex_unlock(&kvm->slots_lock);
3453         return 0;
3454 }
3455
3456 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3457 {
3458         return kvm->arch.n_max_mmu_pages;
3459 }
3460
3461 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3462 {
3463         int r;
3464
3465         r = 0;
3466         switch (chip->chip_id) {
3467         case KVM_IRQCHIP_PIC_MASTER:
3468                 memcpy(&chip->chip.pic,
3469                         &pic_irqchip(kvm)->pics[0],
3470                         sizeof(struct kvm_pic_state));
3471                 break;
3472         case KVM_IRQCHIP_PIC_SLAVE:
3473                 memcpy(&chip->chip.pic,
3474                         &pic_irqchip(kvm)->pics[1],
3475                         sizeof(struct kvm_pic_state));
3476                 break;
3477         case KVM_IRQCHIP_IOAPIC:
3478                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3479                 break;
3480         default:
3481                 r = -EINVAL;
3482                 break;
3483         }
3484         return r;
3485 }
3486
3487 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3488 {
3489         int r;
3490
3491         r = 0;
3492         switch (chip->chip_id) {
3493         case KVM_IRQCHIP_PIC_MASTER:
3494                 spin_lock(&pic_irqchip(kvm)->lock);
3495                 memcpy(&pic_irqchip(kvm)->pics[0],
3496                         &chip->chip.pic,
3497                         sizeof(struct kvm_pic_state));
3498                 spin_unlock(&pic_irqchip(kvm)->lock);
3499                 break;
3500         case KVM_IRQCHIP_PIC_SLAVE:
3501                 spin_lock(&pic_irqchip(kvm)->lock);
3502                 memcpy(&pic_irqchip(kvm)->pics[1],
3503                         &chip->chip.pic,
3504                         sizeof(struct kvm_pic_state));
3505                 spin_unlock(&pic_irqchip(kvm)->lock);
3506                 break;
3507         case KVM_IRQCHIP_IOAPIC:
3508                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3509                 break;
3510         default:
3511                 r = -EINVAL;
3512                 break;
3513         }
3514         kvm_pic_update_irq(pic_irqchip(kvm));
3515         return r;
3516 }
3517
3518 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3519 {
3520         int r = 0;
3521
3522         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3523         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3524         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3525         return r;
3526 }
3527
3528 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3529 {
3530         int r = 0;
3531
3532         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3533         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3534         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3535         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3536         return r;
3537 }
3538
3539 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3540 {
3541         int r = 0;
3542
3543         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3544         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3545                 sizeof(ps->channels));
3546         ps->flags = kvm->arch.vpit->pit_state.flags;
3547         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3548         memset(&ps->reserved, 0, sizeof(ps->reserved));
3549         return r;
3550 }
3551
3552 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3553 {
3554         int r = 0, start = 0;
3555         u32 prev_legacy, cur_legacy;
3556         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3557         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3558         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3559         if (!prev_legacy && cur_legacy)
3560                 start = 1;
3561         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3562                sizeof(kvm->arch.vpit->pit_state.channels));
3563         kvm->arch.vpit->pit_state.flags = ps->flags;
3564         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3565         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3566         return r;
3567 }
3568
3569 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3570                                  struct kvm_reinject_control *control)
3571 {
3572         if (!kvm->arch.vpit)
3573                 return -ENXIO;
3574         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3575         kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3576         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3577         return 0;
3578 }
3579
3580 /**
3581  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3582  * @kvm: kvm instance
3583  * @log: slot id and address to which we copy the log
3584  *
3585  * We need to keep it in mind that VCPU threads can write to the bitmap
3586  * concurrently.  So, to avoid losing data, we keep the following order for
3587  * each bit:
3588  *
3589  *   1. Take a snapshot of the bit and clear it if needed.
3590  *   2. Write protect the corresponding page.
3591  *   3. Flush TLB's if needed.
3592  *   4. Copy the snapshot to the userspace.
3593  *
3594  * Between 2 and 3, the guest may write to the page using the remaining TLB
3595  * entry.  This is not a problem because the page will be reported dirty at
3596  * step 4 using the snapshot taken before and step 3 ensures that successive
3597  * writes will be logged for the next call.
3598  */
3599 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3600 {
3601         int r;
3602         struct kvm_memory_slot *memslot;
3603         unsigned long n, i;
3604         unsigned long *dirty_bitmap;
3605         unsigned long *dirty_bitmap_buffer;
3606         bool is_dirty = false;
3607
3608         mutex_lock(&kvm->slots_lock);
3609
3610         r = -EINVAL;
3611         if (log->slot >= KVM_USER_MEM_SLOTS)
3612                 goto out;
3613
3614         memslot = id_to_memslot(kvm->memslots, log->slot);
3615
3616         dirty_bitmap = memslot->dirty_bitmap;
3617         r = -ENOENT;
3618         if (!dirty_bitmap)
3619                 goto out;
3620
3621         n = kvm_dirty_bitmap_bytes(memslot);
3622
3623         dirty_bitmap_buffer = dirty_bitmap + n / sizeof(long);
3624         memset(dirty_bitmap_buffer, 0, n);
3625
3626         spin_lock(&kvm->mmu_lock);
3627
3628         for (i = 0; i < n / sizeof(long); i++) {
3629                 unsigned long mask;
3630                 gfn_t offset;
3631
3632                 if (!dirty_bitmap[i])
3633                         continue;
3634
3635                 is_dirty = true;
3636
3637                 mask = xchg(&dirty_bitmap[i], 0);
3638                 dirty_bitmap_buffer[i] = mask;
3639
3640                 offset = i * BITS_PER_LONG;
3641                 kvm_mmu_write_protect_pt_masked(kvm, memslot, offset, mask);
3642         }
3643
3644         spin_unlock(&kvm->mmu_lock);
3645
3646         /* See the comments in kvm_mmu_slot_remove_write_access(). */
3647         lockdep_assert_held(&kvm->slots_lock);
3648
3649         /*
3650          * All the TLBs can be flushed out of mmu lock, see the comments in
3651          * kvm_mmu_slot_remove_write_access().
3652          */
3653         if (is_dirty)
3654                 kvm_flush_remote_tlbs(kvm);
3655
3656         r = -EFAULT;
3657         if (copy_to_user(log->dirty_bitmap, dirty_bitmap_buffer, n))
3658                 goto out;
3659
3660         r = 0;
3661 out:
3662         mutex_unlock(&kvm->slots_lock);
3663         return r;
3664 }
3665
3666 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3667                         bool line_status)
3668 {
3669         if (!irqchip_in_kernel(kvm))
3670                 return -ENXIO;
3671
3672         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3673                                         irq_event->irq, irq_event->level,
3674                                         line_status);
3675         return 0;
3676 }
3677
3678 long kvm_arch_vm_ioctl(struct file *filp,
3679                        unsigned int ioctl, unsigned long arg)
3680 {
3681         struct kvm *kvm = filp->private_data;
3682         void __user *argp = (void __user *)arg;
3683         int r = -ENOTTY;
3684         /*
3685          * This union makes it completely explicit to gcc-3.x
3686          * that these two variables' stack usage should be
3687          * combined, not added together.
3688          */
3689         union {
3690                 struct kvm_pit_state ps;
3691                 struct kvm_pit_state2 ps2;
3692                 struct kvm_pit_config pit_config;
3693         } u;
3694
3695         switch (ioctl) {
3696         case KVM_SET_TSS_ADDR:
3697                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3698                 break;
3699         case KVM_SET_IDENTITY_MAP_ADDR: {
3700                 u64 ident_addr;
3701
3702                 r = -EFAULT;
3703                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3704                         goto out;
3705                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3706                 break;
3707         }
3708         case KVM_SET_NR_MMU_PAGES:
3709                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3710                 break;
3711         case KVM_GET_NR_MMU_PAGES:
3712                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3713                 break;
3714         case KVM_CREATE_IRQCHIP: {
3715                 struct kvm_pic *vpic;
3716
3717                 mutex_lock(&kvm->lock);
3718                 r = -EEXIST;
3719                 if (kvm->arch.vpic)
3720                         goto create_irqchip_unlock;
3721                 r = -EINVAL;
3722                 if (atomic_read(&kvm->online_vcpus))
3723                         goto create_irqchip_unlock;
3724                 r = -ENOMEM;
3725                 vpic = kvm_create_pic(kvm);
3726                 if (vpic) {
3727                         r = kvm_ioapic_init(kvm);
3728                         if (r) {
3729                                 mutex_lock(&kvm->slots_lock);
3730                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3731                                                           &vpic->dev_master);
3732                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3733                                                           &vpic->dev_slave);
3734                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3735                                                           &vpic->dev_eclr);
3736                                 mutex_unlock(&kvm->slots_lock);
3737                                 kfree(vpic);
3738                                 goto create_irqchip_unlock;
3739                         }
3740                 } else
3741                         goto create_irqchip_unlock;
3742                 smp_wmb();
3743                 kvm->arch.vpic = vpic;
3744                 smp_wmb();
3745                 r = kvm_setup_default_irq_routing(kvm);
3746                 if (r) {
3747                         mutex_lock(&kvm->slots_lock);
3748                         mutex_lock(&kvm->irq_lock);
3749                         kvm_ioapic_destroy(kvm);
3750                         kvm_destroy_pic(kvm);
3751                         mutex_unlock(&kvm->irq_lock);
3752                         mutex_unlock(&kvm->slots_lock);
3753                 }
3754         create_irqchip_unlock:
3755                 mutex_unlock(&kvm->lock);
3756                 break;
3757         }
3758         case KVM_CREATE_PIT:
3759                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3760                 goto create_pit;
3761         case KVM_CREATE_PIT2:
3762                 r = -EFAULT;
3763                 if (copy_from_user(&u.pit_config, argp,
3764                                    sizeof(struct kvm_pit_config)))
3765                         goto out;
3766         create_pit:
3767                 mutex_lock(&kvm->slots_lock);
3768                 r = -EEXIST;
3769                 if (kvm->arch.vpit)
3770                         goto create_pit_unlock;
3771                 r = -ENOMEM;
3772                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3773                 if (kvm->arch.vpit)
3774                         r = 0;
3775         create_pit_unlock:
3776                 mutex_unlock(&kvm->slots_lock);
3777                 break;
3778         case KVM_GET_IRQCHIP: {
3779                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3780                 struct kvm_irqchip *chip;
3781
3782                 chip = memdup_user(argp, sizeof(*chip));
3783                 if (IS_ERR(chip)) {
3784                         r = PTR_ERR(chip);
3785                         goto out;
3786                 }
3787
3788                 r = -ENXIO;
3789                 if (!irqchip_in_kernel(kvm))
3790                         goto get_irqchip_out;
3791                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3792                 if (r)
3793                         goto get_irqchip_out;
3794                 r = -EFAULT;
3795                 if (copy_to_user(argp, chip, sizeof *chip))
3796                         goto get_irqchip_out;
3797                 r = 0;
3798         get_irqchip_out:
3799                 kfree(chip);
3800                 break;
3801         }
3802         case KVM_SET_IRQCHIP: {
3803                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3804                 struct kvm_irqchip *chip;
3805
3806                 chip = memdup_user(argp, sizeof(*chip));
3807                 if (IS_ERR(chip)) {
3808                         r = PTR_ERR(chip);
3809                         goto out;
3810                 }
3811
3812                 r = -ENXIO;
3813                 if (!irqchip_in_kernel(kvm))
3814                         goto set_irqchip_out;
3815                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3816                 if (r)
3817                         goto set_irqchip_out;
3818                 r = 0;
3819         set_irqchip_out:
3820                 kfree(chip);
3821                 break;
3822         }
3823         case KVM_GET_PIT: {
3824                 r = -EFAULT;
3825                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3826                         goto out;
3827                 r = -ENXIO;
3828                 if (!kvm->arch.vpit)
3829                         goto out;
3830                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3831                 if (r)
3832                         goto out;
3833                 r = -EFAULT;
3834                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3835                         goto out;
3836                 r = 0;
3837                 break;
3838         }
3839         case KVM_SET_PIT: {
3840                 r = -EFAULT;
3841                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3842                         goto out;
3843                 r = -ENXIO;
3844                 if (!kvm->arch.vpit)
3845                         goto out;
3846                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3847                 break;
3848         }
3849         case KVM_GET_PIT2: {
3850                 r = -ENXIO;
3851                 if (!kvm->arch.vpit)
3852                         goto out;
3853                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3854                 if (r)
3855                         goto out;
3856                 r = -EFAULT;
3857                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3858                         goto out;
3859                 r = 0;
3860                 break;
3861         }
3862         case KVM_SET_PIT2: {
3863                 r = -EFAULT;
3864                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3865                         goto out;
3866                 r = -ENXIO;
3867                 if (!kvm->arch.vpit)
3868                         goto out;
3869                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3870                 break;
3871         }
3872         case KVM_REINJECT_CONTROL: {
3873                 struct kvm_reinject_control control;
3874                 r =  -EFAULT;
3875                 if (copy_from_user(&control, argp, sizeof(control)))
3876                         goto out;
3877                 r = kvm_vm_ioctl_reinject(kvm, &control);
3878                 break;
3879         }
3880         case KVM_XEN_HVM_CONFIG: {
3881                 r = -EFAULT;
3882                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3883                                    sizeof(struct kvm_xen_hvm_config)))
3884                         goto out;
3885                 r = -EINVAL;
3886                 if (kvm->arch.xen_hvm_config.flags)
3887                         goto out;
3888                 r = 0;
3889                 break;
3890         }
3891         case KVM_SET_CLOCK: {
3892                 struct kvm_clock_data user_ns;
3893                 u64 now_ns;
3894                 s64 delta;
3895
3896                 r = -EFAULT;
3897                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3898                         goto out;
3899
3900                 r = -EINVAL;
3901                 if (user_ns.flags)
3902                         goto out;
3903
3904                 r = 0;
3905                 local_irq_disable();
3906                 now_ns = get_kernel_ns();
3907                 delta = user_ns.clock - now_ns;
3908                 local_irq_enable();
3909                 kvm->arch.kvmclock_offset = delta;
3910                 kvm_gen_update_masterclock(kvm);
3911                 break;
3912         }
3913         case KVM_GET_CLOCK: {
3914                 struct kvm_clock_data user_ns;
3915                 u64 now_ns;
3916
3917                 local_irq_disable();
3918                 now_ns = get_kernel_ns();
3919                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3920                 local_irq_enable();
3921                 user_ns.flags = 0;
3922                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3923
3924                 r = -EFAULT;
3925                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3926                         goto out;
3927                 r = 0;
3928                 break;
3929         }
3930
3931         default:
3932                 ;
3933         }
3934 out:
3935         return r;
3936 }
3937
3938 static void kvm_init_msr_list(void)
3939 {
3940         u32 dummy[2];
3941         unsigned i, j;
3942
3943         /* skip the first msrs in the list. KVM-specific */
3944         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3945                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3946                         continue;
3947
3948                 /*
3949                  * Even MSRs that are valid in the host may not be exposed
3950                  * to the guests in some cases.  We could work around this
3951                  * in VMX with the generic MSR save/load machinery, but it
3952                  * is not really worthwhile since it will really only
3953                  * happen with nested virtualization.
3954                  */
3955                 switch (msrs_to_save[i]) {
3956                 case MSR_IA32_BNDCFGS:
3957                         if (!kvm_x86_ops->mpx_supported())
3958                                 continue;
3959                         break;
3960                 default:
3961                         break;
3962                 }
3963
3964                 if (j < i)
3965                         msrs_to_save[j] = msrs_to_save[i];
3966                 j++;
3967         }
3968         num_msrs_to_save = j;
3969 }
3970
3971 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3972                            const void *v)
3973 {
3974         int handled = 0;
3975         int n;
3976
3977         do {
3978                 n = min(len, 8);
3979                 if (!(vcpu->arch.apic &&
3980                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3981                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3982                         break;
3983                 handled += n;
3984                 addr += n;
3985                 len -= n;
3986                 v += n;
3987         } while (len);
3988
3989         return handled;
3990 }
3991
3992 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3993 {
3994         int handled = 0;
3995         int n;
3996
3997         do {
3998                 n = min(len, 8);
3999                 if (!(vcpu->arch.apic &&
4000                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
4001                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
4002                         break;
4003                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
4004                 handled += n;
4005                 addr += n;
4006                 len -= n;
4007                 v += n;
4008         } while (len);
4009
4010         return handled;
4011 }
4012
4013 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4014                         struct kvm_segment *var, int seg)
4015 {
4016         kvm_x86_ops->set_segment(vcpu, var, seg);
4017 }
4018
4019 void kvm_get_segment(struct kvm_vcpu *vcpu,
4020                      struct kvm_segment *var, int seg)
4021 {
4022         kvm_x86_ops->get_segment(vcpu, var, seg);
4023 }
4024
4025 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
4026 {
4027         gpa_t t_gpa;
4028         struct x86_exception exception;
4029
4030         BUG_ON(!mmu_is_nested(vcpu));
4031
4032         /* NPT walks are always user-walks */
4033         access |= PFERR_USER_MASK;
4034         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
4035
4036         return t_gpa;
4037 }
4038
4039 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4040                               struct x86_exception *exception)
4041 {
4042         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4043         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4044 }
4045
4046  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4047                                 struct x86_exception *exception)
4048 {
4049         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4050         access |= PFERR_FETCH_MASK;
4051         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4052 }
4053
4054 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4055                                struct x86_exception *exception)
4056 {
4057         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4058         access |= PFERR_WRITE_MASK;
4059         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4060 }
4061
4062 /* uses this to access any guest's mapped memory without checking CPL */
4063 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4064                                 struct x86_exception *exception)
4065 {
4066         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4067 }
4068
4069 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4070                                       struct kvm_vcpu *vcpu, u32 access,
4071                                       struct x86_exception *exception)
4072 {
4073         void *data = val;
4074         int r = X86EMUL_CONTINUE;
4075
4076         while (bytes) {
4077                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4078                                                             exception);
4079                 unsigned offset = addr & (PAGE_SIZE-1);
4080                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4081                 int ret;
4082
4083                 if (gpa == UNMAPPED_GVA)
4084                         return X86EMUL_PROPAGATE_FAULT;
4085                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
4086                 if (ret < 0) {
4087                         r = X86EMUL_IO_NEEDED;
4088                         goto out;
4089                 }
4090
4091                 bytes -= toread;
4092                 data += toread;
4093                 addr += toread;
4094         }
4095 out:
4096         return r;
4097 }
4098
4099 /* used for instruction fetching */
4100 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4101                                 gva_t addr, void *val, unsigned int bytes,
4102                                 struct x86_exception *exception)
4103 {
4104         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4105         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4106
4107         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
4108                                           access | PFERR_FETCH_MASK,
4109                                           exception);
4110 }
4111
4112 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4113                                gva_t addr, void *val, unsigned int bytes,
4114                                struct x86_exception *exception)
4115 {
4116         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4117         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4118
4119         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4120                                           exception);
4121 }
4122 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4123
4124 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4125                                       gva_t addr, void *val, unsigned int bytes,
4126                                       struct x86_exception *exception)
4127 {
4128         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4129         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4130 }
4131
4132 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4133                                        gva_t addr, void *val,
4134                                        unsigned int bytes,
4135                                        struct x86_exception *exception)
4136 {
4137         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4138         void *data = val;
4139         int r = X86EMUL_CONTINUE;
4140
4141         while (bytes) {
4142                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4143                                                              PFERR_WRITE_MASK,
4144                                                              exception);
4145                 unsigned offset = addr & (PAGE_SIZE-1);
4146                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4147                 int ret;
4148
4149                 if (gpa == UNMAPPED_GVA)
4150                         return X86EMUL_PROPAGATE_FAULT;
4151                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
4152                 if (ret < 0) {
4153                         r = X86EMUL_IO_NEEDED;
4154                         goto out;
4155                 }
4156
4157                 bytes -= towrite;
4158                 data += towrite;
4159                 addr += towrite;
4160         }
4161 out:
4162         return r;
4163 }
4164 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4165
4166 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4167                                 gpa_t *gpa, struct x86_exception *exception,
4168                                 bool write)
4169 {
4170         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4171                 | (write ? PFERR_WRITE_MASK : 0);
4172
4173         if (vcpu_match_mmio_gva(vcpu, gva)
4174             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4175                                  vcpu->arch.access, access)) {
4176                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4177                                         (gva & (PAGE_SIZE - 1));
4178                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4179                 return 1;
4180         }
4181
4182         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4183
4184         if (*gpa == UNMAPPED_GVA)
4185                 return -1;
4186
4187         /* For APIC access vmexit */
4188         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4189                 return 1;
4190
4191         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4192                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4193                 return 1;
4194         }
4195
4196         return 0;
4197 }
4198
4199 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4200                         const void *val, int bytes)
4201 {
4202         int ret;
4203
4204         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
4205         if (ret < 0)
4206                 return 0;
4207         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4208         return 1;
4209 }
4210
4211 struct read_write_emulator_ops {
4212         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4213                                   int bytes);
4214         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4215                                   void *val, int bytes);
4216         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4217                                int bytes, void *val);
4218         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4219                                     void *val, int bytes);
4220         bool write;
4221 };
4222
4223 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4224 {
4225         if (vcpu->mmio_read_completed) {
4226                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4227                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4228                 vcpu->mmio_read_completed = 0;
4229                 return 1;
4230         }
4231
4232         return 0;
4233 }
4234
4235 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4236                         void *val, int bytes)
4237 {
4238         return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
4239 }
4240
4241 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4242                          void *val, int bytes)
4243 {
4244         return emulator_write_phys(vcpu, gpa, val, bytes);
4245 }
4246
4247 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4248 {
4249         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4250         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4251 }
4252
4253 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4254                           void *val, int bytes)
4255 {
4256         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4257         return X86EMUL_IO_NEEDED;
4258 }
4259
4260 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4261                            void *val, int bytes)
4262 {
4263         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4264
4265         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4266         return X86EMUL_CONTINUE;
4267 }
4268
4269 static const struct read_write_emulator_ops read_emultor = {
4270         .read_write_prepare = read_prepare,
4271         .read_write_emulate = read_emulate,
4272         .read_write_mmio = vcpu_mmio_read,
4273         .read_write_exit_mmio = read_exit_mmio,
4274 };
4275
4276 static const struct read_write_emulator_ops write_emultor = {
4277         .read_write_emulate = write_emulate,
4278         .read_write_mmio = write_mmio,
4279         .read_write_exit_mmio = write_exit_mmio,
4280         .write = true,
4281 };
4282
4283 static int emulator_read_write_onepage(unsigned long addr, void *val,
4284                                        unsigned int bytes,
4285                                        struct x86_exception *exception,
4286                                        struct kvm_vcpu *vcpu,
4287                                        const struct read_write_emulator_ops *ops)
4288 {
4289         gpa_t gpa;
4290         int handled, ret;
4291         bool write = ops->write;
4292         struct kvm_mmio_fragment *frag;
4293
4294         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4295
4296         if (ret < 0)
4297                 return X86EMUL_PROPAGATE_FAULT;
4298
4299         /* For APIC access vmexit */
4300         if (ret)
4301                 goto mmio;
4302
4303         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4304                 return X86EMUL_CONTINUE;
4305
4306 mmio:
4307         /*
4308          * Is this MMIO handled locally?
4309          */
4310         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4311         if (handled == bytes)
4312                 return X86EMUL_CONTINUE;
4313
4314         gpa += handled;
4315         bytes -= handled;
4316         val += handled;
4317
4318         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4319         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4320         frag->gpa = gpa;
4321         frag->data = val;
4322         frag->len = bytes;
4323         return X86EMUL_CONTINUE;
4324 }
4325
4326 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
4327                         void *val, unsigned int bytes,
4328                         struct x86_exception *exception,
4329                         const struct read_write_emulator_ops *ops)
4330 {
4331         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4332         gpa_t gpa;
4333         int rc;
4334
4335         if (ops->read_write_prepare &&
4336                   ops->read_write_prepare(vcpu, val, bytes))
4337                 return X86EMUL_CONTINUE;
4338
4339         vcpu->mmio_nr_fragments = 0;
4340
4341         /* Crossing a page boundary? */
4342         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4343                 int now;
4344
4345                 now = -addr & ~PAGE_MASK;
4346                 rc = emulator_read_write_onepage(addr, val, now, exception,
4347                                                  vcpu, ops);
4348
4349                 if (rc != X86EMUL_CONTINUE)
4350                         return rc;
4351                 addr += now;
4352                 val += now;
4353                 bytes -= now;
4354         }
4355
4356         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4357                                          vcpu, ops);
4358         if (rc != X86EMUL_CONTINUE)
4359                 return rc;
4360
4361         if (!vcpu->mmio_nr_fragments)
4362                 return rc;
4363
4364         gpa = vcpu->mmio_fragments[0].gpa;
4365
4366         vcpu->mmio_needed = 1;
4367         vcpu->mmio_cur_fragment = 0;
4368
4369         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4370         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4371         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4372         vcpu->run->mmio.phys_addr = gpa;
4373
4374         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4375 }
4376
4377 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4378                                   unsigned long addr,
4379                                   void *val,
4380                                   unsigned int bytes,
4381                                   struct x86_exception *exception)
4382 {
4383         return emulator_read_write(ctxt, addr, val, bytes,
4384                                    exception, &read_emultor);
4385 }
4386
4387 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4388                             unsigned long addr,
4389                             const void *val,
4390                             unsigned int bytes,
4391                             struct x86_exception *exception)
4392 {
4393         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4394                                    exception, &write_emultor);
4395 }
4396
4397 #define CMPXCHG_TYPE(t, ptr, old, new) \
4398         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4399
4400 #ifdef CONFIG_X86_64
4401 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4402 #else
4403 #  define CMPXCHG64(ptr, old, new) \
4404         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4405 #endif
4406
4407 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4408                                      unsigned long addr,
4409                                      const void *old,
4410                                      const void *new,
4411                                      unsigned int bytes,
4412                                      struct x86_exception *exception)
4413 {
4414         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4415         gpa_t gpa;
4416         struct page *page;
4417         char *kaddr;
4418         bool exchanged;
4419
4420         /* guests cmpxchg8b have to be emulated atomically */
4421         if (bytes > 8 || (bytes & (bytes - 1)))
4422                 goto emul_write;
4423
4424         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4425
4426         if (gpa == UNMAPPED_GVA ||
4427             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4428                 goto emul_write;
4429
4430         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4431                 goto emul_write;
4432
4433         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4434         if (is_error_page(page))
4435                 goto emul_write;
4436
4437         kaddr = kmap_atomic(page);
4438         kaddr += offset_in_page(gpa);
4439         switch (bytes) {
4440         case 1:
4441                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4442                 break;
4443         case 2:
4444                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4445                 break;
4446         case 4:
4447                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4448                 break;
4449         case 8:
4450                 exchanged = CMPXCHG64(kaddr, old, new);
4451                 break;
4452         default:
4453                 BUG();
4454         }
4455         kunmap_atomic(kaddr);
4456         kvm_release_page_dirty(page);
4457
4458         if (!exchanged)
4459                 return X86EMUL_CMPXCHG_FAILED;
4460
4461         mark_page_dirty(vcpu->kvm, gpa >> PAGE_SHIFT);
4462         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4463
4464         return X86EMUL_CONTINUE;
4465
4466 emul_write:
4467         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4468
4469         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4470 }
4471
4472 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4473 {
4474         /* TODO: String I/O for in kernel device */
4475         int r;
4476
4477         if (vcpu->arch.pio.in)
4478                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4479                                     vcpu->arch.pio.size, pd);
4480         else
4481                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4482                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4483                                      pd);
4484         return r;
4485 }
4486
4487 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4488                                unsigned short port, void *val,
4489                                unsigned int count, bool in)
4490 {
4491         vcpu->arch.pio.port = port;
4492         vcpu->arch.pio.in = in;
4493         vcpu->arch.pio.count  = count;
4494         vcpu->arch.pio.size = size;
4495
4496         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4497                 vcpu->arch.pio.count = 0;
4498                 return 1;
4499         }
4500
4501         vcpu->run->exit_reason = KVM_EXIT_IO;
4502         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4503         vcpu->run->io.size = size;
4504         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4505         vcpu->run->io.count = count;
4506         vcpu->run->io.port = port;
4507
4508         return 0;
4509 }
4510
4511 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4512                                     int size, unsigned short port, void *val,
4513                                     unsigned int count)
4514 {
4515         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4516         int ret;
4517
4518         if (vcpu->arch.pio.count)
4519                 goto data_avail;
4520
4521         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4522         if (ret) {
4523 data_avail:
4524                 memcpy(val, vcpu->arch.pio_data, size * count);
4525                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4526                 vcpu->arch.pio.count = 0;
4527                 return 1;
4528         }
4529
4530         return 0;
4531 }
4532
4533 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4534                                      int size, unsigned short port,
4535                                      const void *val, unsigned int count)
4536 {
4537         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4538
4539         memcpy(vcpu->arch.pio_data, val, size * count);
4540         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4541         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4542 }
4543
4544 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4545 {
4546         return kvm_x86_ops->get_segment_base(vcpu, seg);
4547 }
4548
4549 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4550 {
4551         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4552 }
4553
4554 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4555 {
4556         if (!need_emulate_wbinvd(vcpu))
4557                 return X86EMUL_CONTINUE;
4558
4559         if (kvm_x86_ops->has_wbinvd_exit()) {
4560                 int cpu = get_cpu();
4561
4562                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4563                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4564                                 wbinvd_ipi, NULL, 1);
4565                 put_cpu();
4566                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4567         } else
4568                 wbinvd();
4569         return X86EMUL_CONTINUE;
4570 }
4571 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4572
4573 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4574 {
4575         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4576 }
4577
4578 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4579 {
4580         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4581 }
4582
4583 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4584 {
4585
4586         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4587 }
4588
4589 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4590 {
4591         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4592 }
4593
4594 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4595 {
4596         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4597         unsigned long value;
4598
4599         switch (cr) {
4600         case 0:
4601                 value = kvm_read_cr0(vcpu);
4602                 break;
4603         case 2:
4604                 value = vcpu->arch.cr2;
4605                 break;
4606         case 3:
4607                 value = kvm_read_cr3(vcpu);
4608                 break;
4609         case 4:
4610                 value = kvm_read_cr4(vcpu);
4611                 break;
4612         case 8:
4613                 value = kvm_get_cr8(vcpu);
4614                 break;
4615         default:
4616                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4617                 return 0;
4618         }
4619
4620         return value;
4621 }
4622
4623 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4624 {
4625         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4626         int res = 0;
4627
4628         switch (cr) {
4629         case 0:
4630                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4631                 break;
4632         case 2:
4633                 vcpu->arch.cr2 = val;
4634                 break;
4635         case 3:
4636                 res = kvm_set_cr3(vcpu, val);
4637                 break;
4638         case 4:
4639                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4640                 break;
4641         case 8:
4642                 res = kvm_set_cr8(vcpu, val);
4643                 break;
4644         default:
4645                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4646                 res = -1;
4647         }
4648
4649         return res;
4650 }
4651
4652 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4653 {
4654         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4655 }
4656
4657 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4658 {
4659         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4660 }
4661
4662 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4663 {
4664         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4665 }
4666
4667 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4668 {
4669         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4670 }
4671
4672 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4673 {
4674         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4675 }
4676
4677 static unsigned long emulator_get_cached_segment_base(
4678         struct x86_emulate_ctxt *ctxt, int seg)
4679 {
4680         return get_segment_base(emul_to_vcpu(ctxt), seg);
4681 }
4682
4683 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4684                                  struct desc_struct *desc, u32 *base3,
4685                                  int seg)
4686 {
4687         struct kvm_segment var;
4688
4689         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4690         *selector = var.selector;
4691
4692         if (var.unusable) {
4693                 memset(desc, 0, sizeof(*desc));
4694                 return false;
4695         }
4696
4697         if (var.g)
4698                 var.limit >>= 12;
4699         set_desc_limit(desc, var.limit);
4700         set_desc_base(desc, (unsigned long)var.base);
4701 #ifdef CONFIG_X86_64
4702         if (base3)
4703                 *base3 = var.base >> 32;
4704 #endif
4705         desc->type = var.type;
4706         desc->s = var.s;
4707         desc->dpl = var.dpl;
4708         desc->p = var.present;
4709         desc->avl = var.avl;
4710         desc->l = var.l;
4711         desc->d = var.db;
4712         desc->g = var.g;
4713
4714         return true;
4715 }
4716
4717 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4718                                  struct desc_struct *desc, u32 base3,
4719                                  int seg)
4720 {
4721         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4722         struct kvm_segment var;
4723
4724         var.selector = selector;
4725         var.base = get_desc_base(desc);
4726 #ifdef CONFIG_X86_64
4727         var.base |= ((u64)base3) << 32;
4728 #endif
4729         var.limit = get_desc_limit(desc);
4730         if (desc->g)
4731                 var.limit = (var.limit << 12) | 0xfff;
4732         var.type = desc->type;
4733         var.present = desc->p;
4734         var.dpl = desc->dpl;
4735         var.db = desc->d;
4736         var.s = desc->s;
4737         var.l = desc->l;
4738         var.g = desc->g;
4739         var.avl = desc->avl;
4740         var.present = desc->p;
4741         var.unusable = !var.present;
4742         var.padding = 0;
4743
4744         kvm_set_segment(vcpu, &var, seg);
4745         return;
4746 }
4747
4748 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4749                             u32 msr_index, u64 *pdata)
4750 {
4751         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4752 }
4753
4754 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4755                             u32 msr_index, u64 data)
4756 {
4757         struct msr_data msr;
4758
4759         msr.data = data;
4760         msr.index = msr_index;
4761         msr.host_initiated = false;
4762         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4763 }
4764
4765 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4766                              u32 pmc, u64 *pdata)
4767 {
4768         return kvm_pmu_read_pmc(emul_to_vcpu(ctxt), pmc, pdata);
4769 }
4770
4771 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4772 {
4773         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4774 }
4775
4776 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4777 {
4778         preempt_disable();
4779         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4780         /*
4781          * CR0.TS may reference the host fpu state, not the guest fpu state,
4782          * so it may be clear at this point.
4783          */
4784         clts();
4785 }
4786
4787 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4788 {
4789         preempt_enable();
4790 }
4791
4792 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4793                               struct x86_instruction_info *info,
4794                               enum x86_intercept_stage stage)
4795 {
4796         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4797 }
4798
4799 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4800                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4801 {
4802         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4803 }
4804
4805 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
4806 {
4807         return kvm_register_read(emul_to_vcpu(ctxt), reg);
4808 }
4809
4810 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
4811 {
4812         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
4813 }
4814
4815 static const struct x86_emulate_ops emulate_ops = {
4816         .read_gpr            = emulator_read_gpr,
4817         .write_gpr           = emulator_write_gpr,
4818         .read_std            = kvm_read_guest_virt_system,
4819         .write_std           = kvm_write_guest_virt_system,
4820         .fetch               = kvm_fetch_guest_virt,
4821         .read_emulated       = emulator_read_emulated,
4822         .write_emulated      = emulator_write_emulated,
4823         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4824         .invlpg              = emulator_invlpg,
4825         .pio_in_emulated     = emulator_pio_in_emulated,
4826         .pio_out_emulated    = emulator_pio_out_emulated,
4827         .get_segment         = emulator_get_segment,
4828         .set_segment         = emulator_set_segment,
4829         .get_cached_segment_base = emulator_get_cached_segment_base,
4830         .get_gdt             = emulator_get_gdt,
4831         .get_idt             = emulator_get_idt,
4832         .set_gdt             = emulator_set_gdt,
4833         .set_idt             = emulator_set_idt,
4834         .get_cr              = emulator_get_cr,
4835         .set_cr              = emulator_set_cr,
4836         .cpl                 = emulator_get_cpl,
4837         .get_dr              = emulator_get_dr,
4838         .set_dr              = emulator_set_dr,
4839         .set_msr             = emulator_set_msr,
4840         .get_msr             = emulator_get_msr,
4841         .read_pmc            = emulator_read_pmc,
4842         .halt                = emulator_halt,
4843         .wbinvd              = emulator_wbinvd,
4844         .fix_hypercall       = emulator_fix_hypercall,
4845         .get_fpu             = emulator_get_fpu,
4846         .put_fpu             = emulator_put_fpu,
4847         .intercept           = emulator_intercept,
4848         .get_cpuid           = emulator_get_cpuid,
4849 };
4850
4851 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4852 {
4853         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4854         /*
4855          * an sti; sti; sequence only disable interrupts for the first
4856          * instruction. So, if the last instruction, be it emulated or
4857          * not, left the system with the INT_STI flag enabled, it
4858          * means that the last instruction is an sti. We should not
4859          * leave the flag on in this case. The same goes for mov ss
4860          */
4861         if (!(int_shadow & mask))
4862                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4863 }
4864
4865 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4866 {
4867         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4868         if (ctxt->exception.vector == PF_VECTOR)
4869                 kvm_propagate_fault(vcpu, &ctxt->exception);
4870         else if (ctxt->exception.error_code_valid)
4871                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4872                                       ctxt->exception.error_code);
4873         else
4874                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4875 }
4876
4877 static void init_decode_cache(struct x86_emulate_ctxt *ctxt)
4878 {
4879         memset(&ctxt->opcode_len, 0,
4880                (void *)&ctxt->_regs - (void *)&ctxt->opcode_len);
4881
4882         ctxt->fetch.start = 0;
4883         ctxt->fetch.end = 0;
4884         ctxt->io_read.pos = 0;
4885         ctxt->io_read.end = 0;
4886         ctxt->mem_read.pos = 0;
4887         ctxt->mem_read.end = 0;
4888 }
4889
4890 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4891 {
4892         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4893         int cs_db, cs_l;
4894
4895         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4896
4897         ctxt->eflags = kvm_get_rflags(vcpu);
4898         ctxt->eip = kvm_rip_read(vcpu);
4899         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4900                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4901                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
4902                      cs_db                              ? X86EMUL_MODE_PROT32 :
4903                                                           X86EMUL_MODE_PROT16;
4904         ctxt->guest_mode = is_guest_mode(vcpu);
4905
4906         init_decode_cache(ctxt);
4907         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4908 }
4909
4910 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4911 {
4912         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4913         int ret;
4914
4915         init_emulate_ctxt(vcpu);
4916
4917         ctxt->op_bytes = 2;
4918         ctxt->ad_bytes = 2;
4919         ctxt->_eip = ctxt->eip + inc_eip;
4920         ret = emulate_int_real(ctxt, irq);
4921
4922         if (ret != X86EMUL_CONTINUE)
4923                 return EMULATE_FAIL;
4924
4925         ctxt->eip = ctxt->_eip;
4926         kvm_rip_write(vcpu, ctxt->eip);
4927         kvm_set_rflags(vcpu, ctxt->eflags);
4928
4929         if (irq == NMI_VECTOR)
4930                 vcpu->arch.nmi_pending = 0;
4931         else
4932                 vcpu->arch.interrupt.pending = false;
4933
4934         return EMULATE_DONE;
4935 }
4936 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4937
4938 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4939 {
4940         int r = EMULATE_DONE;
4941
4942         ++vcpu->stat.insn_emulation_fail;
4943         trace_kvm_emulate_insn_failed(vcpu);
4944         if (!is_guest_mode(vcpu)) {
4945                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4946                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4947                 vcpu->run->internal.ndata = 0;
4948                 r = EMULATE_FAIL;
4949         }
4950         kvm_queue_exception(vcpu, UD_VECTOR);
4951
4952         return r;
4953 }
4954
4955 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
4956                                   bool write_fault_to_shadow_pgtable,
4957                                   int emulation_type)
4958 {
4959         gpa_t gpa = cr2;
4960         pfn_t pfn;
4961
4962         if (emulation_type & EMULTYPE_NO_REEXECUTE)
4963                 return false;
4964
4965         if (!vcpu->arch.mmu.direct_map) {
4966                 /*
4967                  * Write permission should be allowed since only
4968                  * write access need to be emulated.
4969                  */
4970                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4971
4972                 /*
4973                  * If the mapping is invalid in guest, let cpu retry
4974                  * it to generate fault.
4975                  */
4976                 if (gpa == UNMAPPED_GVA)
4977                         return true;
4978         }
4979
4980         /*
4981          * Do not retry the unhandleable instruction if it faults on the
4982          * readonly host memory, otherwise it will goto a infinite loop:
4983          * retry instruction -> write #PF -> emulation fail -> retry
4984          * instruction -> ...
4985          */
4986         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
4987
4988         /*
4989          * If the instruction failed on the error pfn, it can not be fixed,
4990          * report the error to userspace.
4991          */
4992         if (is_error_noslot_pfn(pfn))
4993                 return false;
4994
4995         kvm_release_pfn_clean(pfn);
4996
4997         /* The instructions are well-emulated on direct mmu. */
4998         if (vcpu->arch.mmu.direct_map) {
4999                 unsigned int indirect_shadow_pages;
5000
5001                 spin_lock(&vcpu->kvm->mmu_lock);
5002                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5003                 spin_unlock(&vcpu->kvm->mmu_lock);
5004
5005                 if (indirect_shadow_pages)
5006                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5007
5008                 return true;
5009         }
5010
5011         /*
5012          * if emulation was due to access to shadowed page table
5013          * and it failed try to unshadow page and re-enter the
5014          * guest to let CPU execute the instruction.
5015          */
5016         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5017
5018         /*
5019          * If the access faults on its page table, it can not
5020          * be fixed by unprotecting shadow page and it should
5021          * be reported to userspace.
5022          */
5023         return !write_fault_to_shadow_pgtable;
5024 }
5025
5026 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5027                               unsigned long cr2,  int emulation_type)
5028 {
5029         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5030         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5031
5032         last_retry_eip = vcpu->arch.last_retry_eip;
5033         last_retry_addr = vcpu->arch.last_retry_addr;
5034
5035         /*
5036          * If the emulation is caused by #PF and it is non-page_table
5037          * writing instruction, it means the VM-EXIT is caused by shadow
5038          * page protected, we can zap the shadow page and retry this
5039          * instruction directly.
5040          *
5041          * Note: if the guest uses a non-page-table modifying instruction
5042          * on the PDE that points to the instruction, then we will unmap
5043          * the instruction and go to an infinite loop. So, we cache the
5044          * last retried eip and the last fault address, if we meet the eip
5045          * and the address again, we can break out of the potential infinite
5046          * loop.
5047          */
5048         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5049
5050         if (!(emulation_type & EMULTYPE_RETRY))
5051                 return false;
5052
5053         if (x86_page_table_writing_insn(ctxt))
5054                 return false;
5055
5056         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5057                 return false;
5058
5059         vcpu->arch.last_retry_eip = ctxt->eip;
5060         vcpu->arch.last_retry_addr = cr2;
5061
5062         if (!vcpu->arch.mmu.direct_map)
5063                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5064
5065         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5066
5067         return true;
5068 }
5069
5070 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5071 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5072
5073 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5074                                 unsigned long *db)
5075 {
5076         u32 dr6 = 0;
5077         int i;
5078         u32 enable, rwlen;
5079
5080         enable = dr7;
5081         rwlen = dr7 >> 16;
5082         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5083                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5084                         dr6 |= (1 << i);
5085         return dr6;
5086 }
5087
5088 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, int *r)
5089 {
5090         struct kvm_run *kvm_run = vcpu->run;
5091
5092         /*
5093          * Use the "raw" value to see if TF was passed to the processor.
5094          * Note that the new value of the flags has not been saved yet.
5095          *
5096          * This is correct even for TF set by the guest, because "the
5097          * processor will not generate this exception after the instruction
5098          * that sets the TF flag".
5099          */
5100         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5101
5102         if (unlikely(rflags & X86_EFLAGS_TF)) {
5103                 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5104                         kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1;
5105                         kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5106                         kvm_run->debug.arch.exception = DB_VECTOR;
5107                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5108                         *r = EMULATE_USER_EXIT;
5109                 } else {
5110                         vcpu->arch.emulate_ctxt.eflags &= ~X86_EFLAGS_TF;
5111                         /*
5112                          * "Certain debug exceptions may clear bit 0-3.  The
5113                          * remaining contents of the DR6 register are never
5114                          * cleared by the processor".
5115                          */
5116                         vcpu->arch.dr6 &= ~15;
5117                         vcpu->arch.dr6 |= DR6_BS;
5118                         kvm_queue_exception(vcpu, DB_VECTOR);
5119                 }
5120         }
5121 }
5122
5123 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5124 {
5125         struct kvm_run *kvm_run = vcpu->run;
5126         unsigned long eip = vcpu->arch.emulate_ctxt.eip;
5127         u32 dr6 = 0;
5128
5129         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5130             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5131                 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5132                                            vcpu->arch.guest_debug_dr7,
5133                                            vcpu->arch.eff_db);
5134
5135                 if (dr6 != 0) {
5136                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1;
5137                         kvm_run->debug.arch.pc = kvm_rip_read(vcpu) +
5138                                 get_segment_base(vcpu, VCPU_SREG_CS);
5139
5140                         kvm_run->debug.arch.exception = DB_VECTOR;
5141                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5142                         *r = EMULATE_USER_EXIT;
5143                         return true;
5144                 }
5145         }
5146
5147         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK)) {
5148                 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5149                                            vcpu->arch.dr7,
5150                                            vcpu->arch.db);
5151
5152                 if (dr6 != 0) {
5153                         vcpu->arch.dr6 &= ~15;
5154                         vcpu->arch.dr6 |= dr6;
5155                         kvm_queue_exception(vcpu, DB_VECTOR);
5156                         *r = EMULATE_DONE;
5157                         return true;
5158                 }
5159         }
5160
5161         return false;
5162 }
5163
5164 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5165                             unsigned long cr2,
5166                             int emulation_type,
5167                             void *insn,
5168                             int insn_len)
5169 {
5170         int r;
5171         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5172         bool writeback = true;
5173         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5174
5175         /*
5176          * Clear write_fault_to_shadow_pgtable here to ensure it is
5177          * never reused.
5178          */
5179         vcpu->arch.write_fault_to_shadow_pgtable = false;
5180         kvm_clear_exception_queue(vcpu);
5181
5182         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5183                 init_emulate_ctxt(vcpu);
5184
5185                 /*
5186                  * We will reenter on the same instruction since
5187                  * we do not set complete_userspace_io.  This does not
5188                  * handle watchpoints yet, those would be handled in
5189                  * the emulate_ops.
5190                  */
5191                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5192                         return r;
5193
5194                 ctxt->interruptibility = 0;
5195                 ctxt->have_exception = false;
5196                 ctxt->perm_ok = false;
5197
5198                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5199
5200                 r = x86_decode_insn(ctxt, insn, insn_len);
5201
5202                 trace_kvm_emulate_insn_start(vcpu);
5203                 ++vcpu->stat.insn_emulation;
5204                 if (r != EMULATION_OK)  {
5205                         if (emulation_type & EMULTYPE_TRAP_UD)
5206                                 return EMULATE_FAIL;
5207                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5208                                                 emulation_type))
5209                                 return EMULATE_DONE;
5210                         if (emulation_type & EMULTYPE_SKIP)
5211                                 return EMULATE_FAIL;
5212                         return handle_emulation_failure(vcpu);
5213                 }
5214         }
5215
5216         if (emulation_type & EMULTYPE_SKIP) {
5217                 kvm_rip_write(vcpu, ctxt->_eip);
5218                 return EMULATE_DONE;
5219         }
5220
5221         if (retry_instruction(ctxt, cr2, emulation_type))
5222                 return EMULATE_DONE;
5223
5224         /* this is needed for vmware backdoor interface to work since it
5225            changes registers values  during IO operation */
5226         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5227                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5228                 emulator_invalidate_register_cache(ctxt);
5229         }
5230
5231 restart:
5232         r = x86_emulate_insn(ctxt);
5233
5234         if (r == EMULATION_INTERCEPTED)
5235                 return EMULATE_DONE;
5236
5237         if (r == EMULATION_FAILED) {
5238                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5239                                         emulation_type))
5240                         return EMULATE_DONE;
5241
5242                 return handle_emulation_failure(vcpu);
5243         }
5244
5245         if (ctxt->have_exception) {
5246                 inject_emulated_exception(vcpu);
5247                 r = EMULATE_DONE;
5248         } else if (vcpu->arch.pio.count) {
5249                 if (!vcpu->arch.pio.in) {
5250                         /* FIXME: return into emulator if single-stepping.  */
5251                         vcpu->arch.pio.count = 0;
5252                 } else {
5253                         writeback = false;
5254                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5255                 }
5256                 r = EMULATE_USER_EXIT;
5257         } else if (vcpu->mmio_needed) {
5258                 if (!vcpu->mmio_is_write)
5259                         writeback = false;
5260                 r = EMULATE_USER_EXIT;
5261                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5262         } else if (r == EMULATION_RESTART)
5263                 goto restart;
5264         else
5265                 r = EMULATE_DONE;
5266
5267         if (writeback) {
5268                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5269                 kvm_make_request(KVM_REQ_EVENT, vcpu);
5270                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5271                 kvm_rip_write(vcpu, ctxt->eip);
5272                 if (r == EMULATE_DONE)
5273                         kvm_vcpu_check_singlestep(vcpu, &r);
5274                 kvm_set_rflags(vcpu, ctxt->eflags);
5275         } else
5276                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5277
5278         return r;
5279 }
5280 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5281
5282 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5283 {
5284         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5285         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5286                                             size, port, &val, 1);
5287         /* do not return to emulator after return from userspace */
5288         vcpu->arch.pio.count = 0;
5289         return ret;
5290 }
5291 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5292
5293 static void tsc_bad(void *info)
5294 {
5295         __this_cpu_write(cpu_tsc_khz, 0);
5296 }
5297
5298 static void tsc_khz_changed(void *data)
5299 {
5300         struct cpufreq_freqs *freq = data;
5301         unsigned long khz = 0;
5302
5303         if (data)
5304                 khz = freq->new;
5305         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5306                 khz = cpufreq_quick_get(raw_smp_processor_id());
5307         if (!khz)
5308                 khz = tsc_khz;
5309         __this_cpu_write(cpu_tsc_khz, khz);
5310 }
5311
5312 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5313                                      void *data)
5314 {
5315         struct cpufreq_freqs *freq = data;
5316         struct kvm *kvm;
5317         struct kvm_vcpu *vcpu;
5318         int i, send_ipi = 0;
5319
5320         /*
5321          * We allow guests to temporarily run on slowing clocks,
5322          * provided we notify them after, or to run on accelerating
5323          * clocks, provided we notify them before.  Thus time never
5324          * goes backwards.
5325          *
5326          * However, we have a problem.  We can't atomically update
5327          * the frequency of a given CPU from this function; it is
5328          * merely a notifier, which can be called from any CPU.
5329          * Changing the TSC frequency at arbitrary points in time
5330          * requires a recomputation of local variables related to
5331          * the TSC for each VCPU.  We must flag these local variables
5332          * to be updated and be sure the update takes place with the
5333          * new frequency before any guests proceed.
5334          *
5335          * Unfortunately, the combination of hotplug CPU and frequency
5336          * change creates an intractable locking scenario; the order
5337          * of when these callouts happen is undefined with respect to
5338          * CPU hotplug, and they can race with each other.  As such,
5339          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5340          * undefined; you can actually have a CPU frequency change take
5341          * place in between the computation of X and the setting of the
5342          * variable.  To protect against this problem, all updates of
5343          * the per_cpu tsc_khz variable are done in an interrupt
5344          * protected IPI, and all callers wishing to update the value
5345          * must wait for a synchronous IPI to complete (which is trivial
5346          * if the caller is on the CPU already).  This establishes the
5347          * necessary total order on variable updates.
5348          *
5349          * Note that because a guest time update may take place
5350          * anytime after the setting of the VCPU's request bit, the
5351          * correct TSC value must be set before the request.  However,
5352          * to ensure the update actually makes it to any guest which
5353          * starts running in hardware virtualization between the set
5354          * and the acquisition of the spinlock, we must also ping the
5355          * CPU after setting the request bit.
5356          *
5357          */
5358
5359         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5360                 return 0;
5361         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5362                 return 0;
5363
5364         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5365
5366         spin_lock(&kvm_lock);
5367         list_for_each_entry(kvm, &vm_list, vm_list) {
5368                 kvm_for_each_vcpu(i, vcpu, kvm) {
5369                         if (vcpu->cpu != freq->cpu)
5370                                 continue;
5371                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5372                         if (vcpu->cpu != smp_processor_id())
5373                                 send_ipi = 1;
5374                 }
5375         }
5376         spin_unlock(&kvm_lock);
5377
5378         if (freq->old < freq->new && send_ipi) {
5379                 /*
5380                  * We upscale the frequency.  Must make the guest
5381                  * doesn't see old kvmclock values while running with
5382                  * the new frequency, otherwise we risk the guest sees
5383                  * time go backwards.
5384                  *
5385                  * In case we update the frequency for another cpu
5386                  * (which might be in guest context) send an interrupt
5387                  * to kick the cpu out of guest context.  Next time
5388                  * guest context is entered kvmclock will be updated,
5389                  * so the guest will not see stale values.
5390                  */
5391                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5392         }
5393         return 0;
5394 }
5395
5396 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5397         .notifier_call  = kvmclock_cpufreq_notifier
5398 };
5399
5400 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5401                                         unsigned long action, void *hcpu)
5402 {
5403         unsigned int cpu = (unsigned long)hcpu;
5404
5405         switch (action) {
5406                 case CPU_ONLINE:
5407                 case CPU_DOWN_FAILED:
5408                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5409                         break;
5410                 case CPU_DOWN_PREPARE:
5411                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5412                         break;
5413         }
5414         return NOTIFY_OK;
5415 }
5416
5417 static struct notifier_block kvmclock_cpu_notifier_block = {
5418         .notifier_call  = kvmclock_cpu_notifier,
5419         .priority = -INT_MAX
5420 };
5421
5422 static void kvm_timer_init(void)
5423 {
5424         int cpu;
5425
5426         max_tsc_khz = tsc_khz;
5427
5428         cpu_notifier_register_begin();
5429         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5430 #ifdef CONFIG_CPU_FREQ
5431                 struct cpufreq_policy policy;
5432                 memset(&policy, 0, sizeof(policy));
5433                 cpu = get_cpu();
5434                 cpufreq_get_policy(&policy, cpu);
5435                 if (policy.cpuinfo.max_freq)
5436                         max_tsc_khz = policy.cpuinfo.max_freq;
5437                 put_cpu();
5438 #endif
5439                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5440                                           CPUFREQ_TRANSITION_NOTIFIER);
5441         }
5442         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5443         for_each_online_cpu(cpu)
5444                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5445
5446         __register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5447         cpu_notifier_register_done();
5448
5449 }
5450
5451 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5452
5453 int kvm_is_in_guest(void)
5454 {
5455         return __this_cpu_read(current_vcpu) != NULL;
5456 }
5457
5458 static int kvm_is_user_mode(void)
5459 {
5460         int user_mode = 3;
5461
5462         if (__this_cpu_read(current_vcpu))
5463                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5464
5465         return user_mode != 0;
5466 }
5467
5468 static unsigned long kvm_get_guest_ip(void)
5469 {
5470         unsigned long ip = 0;
5471
5472         if (__this_cpu_read(current_vcpu))
5473                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5474
5475         return ip;
5476 }
5477
5478 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5479         .is_in_guest            = kvm_is_in_guest,
5480         .is_user_mode           = kvm_is_user_mode,
5481         .get_guest_ip           = kvm_get_guest_ip,
5482 };
5483
5484 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5485 {
5486         __this_cpu_write(current_vcpu, vcpu);
5487 }
5488 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5489
5490 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5491 {
5492         __this_cpu_write(current_vcpu, NULL);
5493 }
5494 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5495
5496 static void kvm_set_mmio_spte_mask(void)
5497 {
5498         u64 mask;
5499         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5500
5501         /*
5502          * Set the reserved bits and the present bit of an paging-structure
5503          * entry to generate page fault with PFER.RSV = 1.
5504          */
5505          /* Mask the reserved physical address bits. */
5506         mask = ((1ull << (51 - maxphyaddr + 1)) - 1) << maxphyaddr;
5507
5508         /* Bit 62 is always reserved for 32bit host. */
5509         mask |= 0x3ull << 62;
5510
5511         /* Set the present bit. */
5512         mask |= 1ull;
5513
5514 #ifdef CONFIG_X86_64
5515         /*
5516          * If reserved bit is not supported, clear the present bit to disable
5517          * mmio page fault.
5518          */
5519         if (maxphyaddr == 52)
5520                 mask &= ~1ull;
5521 #endif
5522
5523         kvm_mmu_set_mmio_spte_mask(mask);
5524 }
5525
5526 #ifdef CONFIG_X86_64
5527 static void pvclock_gtod_update_fn(struct work_struct *work)
5528 {
5529         struct kvm *kvm;
5530
5531         struct kvm_vcpu *vcpu;
5532         int i;
5533
5534         spin_lock(&kvm_lock);
5535         list_for_each_entry(kvm, &vm_list, vm_list)
5536                 kvm_for_each_vcpu(i, vcpu, kvm)
5537                         set_bit(KVM_REQ_MASTERCLOCK_UPDATE, &vcpu->requests);
5538         atomic_set(&kvm_guest_has_master_clock, 0);
5539         spin_unlock(&kvm_lock);
5540 }
5541
5542 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5543
5544 /*
5545  * Notification about pvclock gtod data update.
5546  */
5547 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5548                                void *priv)
5549 {
5550         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5551         struct timekeeper *tk = priv;
5552
5553         update_pvclock_gtod(tk);
5554
5555         /* disable master clock if host does not trust, or does not
5556          * use, TSC clocksource
5557          */
5558         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5559             atomic_read(&kvm_guest_has_master_clock) != 0)
5560                 queue_work(system_long_wq, &pvclock_gtod_work);
5561
5562         return 0;
5563 }
5564
5565 static struct notifier_block pvclock_gtod_notifier = {
5566         .notifier_call = pvclock_gtod_notify,
5567 };
5568 #endif
5569
5570 int kvm_arch_init(void *opaque)
5571 {
5572         int r;
5573         struct kvm_x86_ops *ops = opaque;
5574
5575         if (kvm_x86_ops) {
5576                 printk(KERN_ERR "kvm: already loaded the other module\n");
5577                 r = -EEXIST;
5578                 goto out;
5579         }
5580
5581         if (!ops->cpu_has_kvm_support()) {
5582                 printk(KERN_ERR "kvm: no hardware support\n");
5583                 r = -EOPNOTSUPP;
5584                 goto out;
5585         }
5586         if (ops->disabled_by_bios()) {
5587                 printk(KERN_ERR "kvm: disabled by bios\n");
5588                 r = -EOPNOTSUPP;
5589                 goto out;
5590         }
5591
5592         r = -ENOMEM;
5593         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5594         if (!shared_msrs) {
5595                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5596                 goto out;
5597         }
5598
5599         r = kvm_mmu_module_init();
5600         if (r)
5601                 goto out_free_percpu;
5602
5603         kvm_set_mmio_spte_mask();
5604
5605         kvm_x86_ops = ops;
5606         kvm_init_msr_list();
5607
5608         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5609                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5610
5611         kvm_timer_init();
5612
5613         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5614
5615         if (cpu_has_xsave)
5616                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5617
5618         kvm_lapic_init();
5619 #ifdef CONFIG_X86_64
5620         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5621 #endif
5622
5623         return 0;
5624
5625 out_free_percpu:
5626         free_percpu(shared_msrs);
5627 out:
5628         return r;
5629 }
5630
5631 void kvm_arch_exit(void)
5632 {
5633         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5634
5635         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5636                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5637                                             CPUFREQ_TRANSITION_NOTIFIER);
5638         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5639 #ifdef CONFIG_X86_64
5640         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5641 #endif
5642         kvm_x86_ops = NULL;
5643         kvm_mmu_module_exit();
5644         free_percpu(shared_msrs);
5645 }
5646
5647 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5648 {
5649         ++vcpu->stat.halt_exits;
5650         if (irqchip_in_kernel(vcpu->kvm)) {
5651                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5652                 return 1;
5653         } else {
5654                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5655                 return 0;
5656         }
5657 }
5658 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5659
5660 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
5661 {
5662         u64 param, ingpa, outgpa, ret;
5663         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
5664         bool fast, longmode;
5665         int cs_db, cs_l;
5666
5667         /*
5668          * hypercall generates UD from non zero cpl and real mode
5669          * per HYPER-V spec
5670          */
5671         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
5672                 kvm_queue_exception(vcpu, UD_VECTOR);
5673                 return 0;
5674         }
5675
5676         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5677         longmode = is_long_mode(vcpu) && cs_l == 1;
5678
5679         if (!longmode) {
5680                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
5681                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
5682                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
5683                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
5684                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
5685                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
5686         }
5687 #ifdef CONFIG_X86_64
5688         else {
5689                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
5690                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
5691                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
5692         }
5693 #endif
5694
5695         code = param & 0xffff;
5696         fast = (param >> 16) & 0x1;
5697         rep_cnt = (param >> 32) & 0xfff;
5698         rep_idx = (param >> 48) & 0xfff;
5699
5700         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5701
5702         switch (code) {
5703         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5704                 kvm_vcpu_on_spin(vcpu);
5705                 break;
5706         default:
5707                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5708                 break;
5709         }
5710
5711         ret = res | (((u64)rep_done & 0xfff) << 32);
5712         if (longmode) {
5713                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5714         } else {
5715                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5716                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5717         }
5718
5719         return 1;
5720 }
5721
5722 /*
5723  * kvm_pv_kick_cpu_op:  Kick a vcpu.
5724  *
5725  * @apicid - apicid of vcpu to be kicked.
5726  */
5727 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
5728 {
5729         struct kvm_lapic_irq lapic_irq;
5730
5731         lapic_irq.shorthand = 0;
5732         lapic_irq.dest_mode = 0;
5733         lapic_irq.dest_id = apicid;
5734
5735         lapic_irq.delivery_mode = APIC_DM_REMRD;
5736         kvm_irq_delivery_to_apic(kvm, 0, &lapic_irq, NULL);
5737 }
5738
5739 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5740 {
5741         unsigned long nr, a0, a1, a2, a3, ret;
5742         int r = 1;
5743
5744         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5745                 return kvm_hv_hypercall(vcpu);
5746
5747         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5748         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5749         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5750         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5751         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5752
5753         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5754
5755         if (!is_long_mode(vcpu)) {
5756                 nr &= 0xFFFFFFFF;
5757                 a0 &= 0xFFFFFFFF;
5758                 a1 &= 0xFFFFFFFF;
5759                 a2 &= 0xFFFFFFFF;
5760                 a3 &= 0xFFFFFFFF;
5761         }
5762
5763         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5764                 ret = -KVM_EPERM;
5765                 goto out;
5766         }
5767
5768         switch (nr) {
5769         case KVM_HC_VAPIC_POLL_IRQ:
5770                 ret = 0;
5771                 break;
5772         case KVM_HC_KICK_CPU:
5773                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
5774                 ret = 0;
5775                 break;
5776         default:
5777                 ret = -KVM_ENOSYS;
5778                 break;
5779         }
5780 out:
5781         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5782         ++vcpu->stat.hypercalls;
5783         return r;
5784 }
5785 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5786
5787 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5788 {
5789         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5790         char instruction[3];
5791         unsigned long rip = kvm_rip_read(vcpu);
5792
5793         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5794
5795         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5796 }
5797
5798 /*
5799  * Check if userspace requested an interrupt window, and that the
5800  * interrupt window is open.
5801  *
5802  * No need to exit to userspace if we already have an interrupt queued.
5803  */
5804 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5805 {
5806         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5807                 vcpu->run->request_interrupt_window &&
5808                 kvm_arch_interrupt_allowed(vcpu));
5809 }
5810
5811 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5812 {
5813         struct kvm_run *kvm_run = vcpu->run;
5814
5815         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5816         kvm_run->cr8 = kvm_get_cr8(vcpu);
5817         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5818         if (irqchip_in_kernel(vcpu->kvm))
5819                 kvm_run->ready_for_interrupt_injection = 1;
5820         else
5821                 kvm_run->ready_for_interrupt_injection =
5822                         kvm_arch_interrupt_allowed(vcpu) &&
5823                         !kvm_cpu_has_interrupt(vcpu) &&
5824                         !kvm_event_needs_reinjection(vcpu);
5825 }
5826
5827 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5828 {
5829         int max_irr, tpr;
5830
5831         if (!kvm_x86_ops->update_cr8_intercept)
5832                 return;
5833
5834         if (!vcpu->arch.apic)
5835                 return;
5836
5837         if (!vcpu->arch.apic->vapic_addr)
5838                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5839         else
5840                 max_irr = -1;
5841
5842         if (max_irr != -1)
5843                 max_irr >>= 4;
5844
5845         tpr = kvm_lapic_get_cr8(vcpu);
5846
5847         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5848 }
5849
5850 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
5851 {
5852         int r;
5853
5854         /* try to reinject previous events if any */
5855         if (vcpu->arch.exception.pending) {
5856                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5857                                         vcpu->arch.exception.has_error_code,
5858                                         vcpu->arch.exception.error_code);
5859                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5860                                           vcpu->arch.exception.has_error_code,
5861                                           vcpu->arch.exception.error_code,
5862                                           vcpu->arch.exception.reinject);
5863                 return 0;
5864         }
5865
5866         if (vcpu->arch.nmi_injected) {
5867                 kvm_x86_ops->set_nmi(vcpu);
5868                 return 0;
5869         }
5870
5871         if (vcpu->arch.interrupt.pending) {
5872                 kvm_x86_ops->set_irq(vcpu);
5873                 return 0;
5874         }
5875
5876         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
5877                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
5878                 if (r != 0)
5879                         return r;
5880         }
5881
5882         /* try to inject new event if pending */
5883         if (vcpu->arch.nmi_pending) {
5884                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5885                         --vcpu->arch.nmi_pending;
5886                         vcpu->arch.nmi_injected = true;
5887                         kvm_x86_ops->set_nmi(vcpu);
5888                 }
5889         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
5890                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5891                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5892                                             false);
5893                         kvm_x86_ops->set_irq(vcpu);
5894                 }
5895         }
5896         return 0;
5897 }
5898
5899 static void process_nmi(struct kvm_vcpu *vcpu)
5900 {
5901         unsigned limit = 2;
5902
5903         /*
5904          * x86 is limited to one NMI running, and one NMI pending after it.
5905          * If an NMI is already in progress, limit further NMIs to just one.
5906          * Otherwise, allow two (and we'll inject the first one immediately).
5907          */
5908         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5909                 limit = 1;
5910
5911         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5912         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5913         kvm_make_request(KVM_REQ_EVENT, vcpu);
5914 }
5915
5916 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
5917 {
5918         u64 eoi_exit_bitmap[4];
5919         u32 tmr[8];
5920
5921         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
5922                 return;
5923
5924         memset(eoi_exit_bitmap, 0, 32);
5925         memset(tmr, 0, 32);
5926
5927         kvm_ioapic_scan_entry(vcpu, eoi_exit_bitmap, tmr);
5928         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
5929         kvm_apic_update_tmr(vcpu, tmr);
5930 }
5931
5932 /*
5933  * Returns 1 to let __vcpu_run() continue the guest execution loop without
5934  * exiting to the userspace.  Otherwise, the value will be returned to the
5935  * userspace.
5936  */
5937 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5938 {
5939         int r;
5940         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5941                 vcpu->run->request_interrupt_window;
5942         bool req_immediate_exit = false;
5943
5944         if (vcpu->requests) {
5945                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5946                         kvm_mmu_unload(vcpu);
5947                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5948                         __kvm_migrate_timers(vcpu);
5949                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
5950                         kvm_gen_update_masterclock(vcpu->kvm);
5951                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
5952                         kvm_gen_kvmclock_update(vcpu);
5953                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5954                         r = kvm_guest_time_update(vcpu);
5955                         if (unlikely(r))
5956                                 goto out;
5957                 }
5958                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5959                         kvm_mmu_sync_roots(vcpu);
5960                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5961                         kvm_x86_ops->tlb_flush(vcpu);
5962                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5963                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5964                         r = 0;
5965                         goto out;
5966                 }
5967                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5968                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5969                         r = 0;
5970                         goto out;
5971                 }
5972                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5973                         vcpu->fpu_active = 0;
5974                         kvm_x86_ops->fpu_deactivate(vcpu);
5975                 }
5976                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5977                         /* Page is swapped out. Do synthetic halt */
5978                         vcpu->arch.apf.halted = true;
5979                         r = 1;
5980                         goto out;
5981                 }
5982                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5983                         record_steal_time(vcpu);
5984                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5985                         process_nmi(vcpu);
5986                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
5987                         kvm_handle_pmu_event(vcpu);
5988                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
5989                         kvm_deliver_pmi(vcpu);
5990                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
5991                         vcpu_scan_ioapic(vcpu);
5992         }
5993
5994         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5995                 kvm_apic_accept_events(vcpu);
5996                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
5997                         r = 1;
5998                         goto out;
5999                 }
6000
6001                 if (inject_pending_event(vcpu, req_int_win) != 0)
6002                         req_immediate_exit = true;
6003                 /* enable NMI/IRQ window open exits if needed */
6004                 else if (vcpu->arch.nmi_pending)
6005                         kvm_x86_ops->enable_nmi_window(vcpu);
6006                 else if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6007                         kvm_x86_ops->enable_irq_window(vcpu);
6008
6009                 if (kvm_lapic_enabled(vcpu)) {
6010                         /*
6011                          * Update architecture specific hints for APIC
6012                          * virtual interrupt delivery.
6013                          */
6014                         if (kvm_x86_ops->hwapic_irr_update)
6015                                 kvm_x86_ops->hwapic_irr_update(vcpu,
6016                                         kvm_lapic_find_highest_irr(vcpu));
6017                         update_cr8_intercept(vcpu);
6018                         kvm_lapic_sync_to_vapic(vcpu);
6019                 }
6020         }
6021
6022         r = kvm_mmu_reload(vcpu);
6023         if (unlikely(r)) {
6024                 goto cancel_injection;
6025         }
6026
6027         preempt_disable();
6028
6029         kvm_x86_ops->prepare_guest_switch(vcpu);
6030         if (vcpu->fpu_active)
6031                 kvm_load_guest_fpu(vcpu);
6032         kvm_load_guest_xcr0(vcpu);
6033
6034         vcpu->mode = IN_GUEST_MODE;
6035
6036         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6037
6038         /* We should set ->mode before check ->requests,
6039          * see the comment in make_all_cpus_request.
6040          */
6041         smp_mb__after_srcu_read_unlock();
6042
6043         local_irq_disable();
6044
6045         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
6046             || need_resched() || signal_pending(current)) {
6047                 vcpu->mode = OUTSIDE_GUEST_MODE;
6048                 smp_wmb();
6049                 local_irq_enable();
6050                 preempt_enable();
6051                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6052                 r = 1;
6053                 goto cancel_injection;
6054         }
6055
6056         if (req_immediate_exit)
6057                 smp_send_reschedule(vcpu->cpu);
6058
6059         kvm_guest_enter();
6060
6061         if (unlikely(vcpu->arch.switch_db_regs)) {
6062                 set_debugreg(0, 7);
6063                 set_debugreg(vcpu->arch.eff_db[0], 0);
6064                 set_debugreg(vcpu->arch.eff_db[1], 1);
6065                 set_debugreg(vcpu->arch.eff_db[2], 2);
6066                 set_debugreg(vcpu->arch.eff_db[3], 3);
6067                 set_debugreg(vcpu->arch.dr6, 6);
6068         }
6069
6070         trace_kvm_entry(vcpu->vcpu_id);
6071         kvm_x86_ops->run(vcpu);
6072
6073         /*
6074          * Do this here before restoring debug registers on the host.  And
6075          * since we do this before handling the vmexit, a DR access vmexit
6076          * can (a) read the correct value of the debug registers, (b) set
6077          * KVM_DEBUGREG_WONT_EXIT again.
6078          */
6079         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6080                 int i;
6081
6082                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6083                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6084                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6085                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6086         }
6087
6088         /*
6089          * If the guest has used debug registers, at least dr7
6090          * will be disabled while returning to the host.
6091          * If we don't have active breakpoints in the host, we don't
6092          * care about the messed up debug address registers. But if
6093          * we have some of them active, restore the old state.
6094          */
6095         if (hw_breakpoint_active())
6096                 hw_breakpoint_restore();
6097
6098         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu,
6099                                                            native_read_tsc());
6100
6101         vcpu->mode = OUTSIDE_GUEST_MODE;
6102         smp_wmb();
6103
6104         /* Interrupt is enabled by handle_external_intr() */
6105         kvm_x86_ops->handle_external_intr(vcpu);
6106
6107         ++vcpu->stat.exits;
6108
6109         /*
6110          * We must have an instruction between local_irq_enable() and
6111          * kvm_guest_exit(), so the timer interrupt isn't delayed by
6112          * the interrupt shadow.  The stat.exits increment will do nicely.
6113          * But we need to prevent reordering, hence this barrier():
6114          */
6115         barrier();
6116
6117         kvm_guest_exit();
6118
6119         preempt_enable();
6120
6121         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6122
6123         /*
6124          * Profile KVM exit RIPs:
6125          */
6126         if (unlikely(prof_on == KVM_PROFILING)) {
6127                 unsigned long rip = kvm_rip_read(vcpu);
6128                 profile_hit(KVM_PROFILING, (void *)rip);
6129         }
6130
6131         if (unlikely(vcpu->arch.tsc_always_catchup))
6132                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6133
6134         if (vcpu->arch.apic_attention)
6135                 kvm_lapic_sync_from_vapic(vcpu);
6136
6137         r = kvm_x86_ops->handle_exit(vcpu);
6138         return r;
6139
6140 cancel_injection:
6141         kvm_x86_ops->cancel_injection(vcpu);
6142         if (unlikely(vcpu->arch.apic_attention))
6143                 kvm_lapic_sync_from_vapic(vcpu);
6144 out:
6145         return r;
6146 }
6147
6148
6149 static int __vcpu_run(struct kvm_vcpu *vcpu)
6150 {
6151         int r;
6152         struct kvm *kvm = vcpu->kvm;
6153
6154         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6155
6156         r = 1;
6157         while (r > 0) {
6158                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6159                     !vcpu->arch.apf.halted)
6160                         r = vcpu_enter_guest(vcpu);
6161                 else {
6162                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6163                         kvm_vcpu_block(vcpu);
6164                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6165                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu)) {
6166                                 kvm_apic_accept_events(vcpu);
6167                                 switch(vcpu->arch.mp_state) {
6168                                 case KVM_MP_STATE_HALTED:
6169                                         vcpu->arch.pv.pv_unhalted = false;
6170                                         vcpu->arch.mp_state =
6171                                                 KVM_MP_STATE_RUNNABLE;
6172                                 case KVM_MP_STATE_RUNNABLE:
6173                                         vcpu->arch.apf.halted = false;
6174                                         break;
6175                                 case KVM_MP_STATE_INIT_RECEIVED:
6176                                         break;
6177                                 default:
6178                                         r = -EINTR;
6179                                         break;
6180                                 }
6181                         }
6182                 }
6183
6184                 if (r <= 0)
6185                         break;
6186
6187                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
6188                 if (kvm_cpu_has_pending_timer(vcpu))
6189                         kvm_inject_pending_timer_irqs(vcpu);
6190
6191                 if (dm_request_for_irq_injection(vcpu)) {
6192                         r = -EINTR;
6193                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6194                         ++vcpu->stat.request_irq_exits;
6195                 }
6196
6197                 kvm_check_async_pf_completion(vcpu);
6198
6199                 if (signal_pending(current)) {
6200                         r = -EINTR;
6201                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6202                         ++vcpu->stat.signal_exits;
6203                 }
6204                 if (need_resched()) {
6205                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6206                         cond_resched();
6207                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6208                 }
6209         }
6210
6211         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6212
6213         return r;
6214 }
6215
6216 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6217 {
6218         int r;
6219         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6220         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6221         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6222         if (r != EMULATE_DONE)
6223                 return 0;
6224         return 1;
6225 }
6226
6227 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6228 {
6229         BUG_ON(!vcpu->arch.pio.count);
6230
6231         return complete_emulated_io(vcpu);
6232 }
6233
6234 /*
6235  * Implements the following, as a state machine:
6236  *
6237  * read:
6238  *   for each fragment
6239  *     for each mmio piece in the fragment
6240  *       write gpa, len
6241  *       exit
6242  *       copy data
6243  *   execute insn
6244  *
6245  * write:
6246  *   for each fragment
6247  *     for each mmio piece in the fragment
6248  *       write gpa, len
6249  *       copy data
6250  *       exit
6251  */
6252 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6253 {
6254         struct kvm_run *run = vcpu->run;
6255         struct kvm_mmio_fragment *frag;
6256         unsigned len;
6257
6258         BUG_ON(!vcpu->mmio_needed);
6259
6260         /* Complete previous fragment */
6261         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6262         len = min(8u, frag->len);
6263         if (!vcpu->mmio_is_write)
6264                 memcpy(frag->data, run->mmio.data, len);
6265
6266         if (frag->len <= 8) {
6267                 /* Switch to the next fragment. */
6268                 frag++;
6269                 vcpu->mmio_cur_fragment++;
6270         } else {
6271                 /* Go forward to the next mmio piece. */
6272                 frag->data += len;
6273                 frag->gpa += len;
6274                 frag->len -= len;
6275         }
6276
6277         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
6278                 vcpu->mmio_needed = 0;
6279
6280                 /* FIXME: return into emulator if single-stepping.  */
6281                 if (vcpu->mmio_is_write)
6282                         return 1;
6283                 vcpu->mmio_read_completed = 1;
6284                 return complete_emulated_io(vcpu);
6285         }
6286
6287         run->exit_reason = KVM_EXIT_MMIO;
6288         run->mmio.phys_addr = frag->gpa;
6289         if (vcpu->mmio_is_write)
6290                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6291         run->mmio.len = min(8u, frag->len);
6292         run->mmio.is_write = vcpu->mmio_is_write;
6293         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6294         return 0;
6295 }
6296
6297
6298 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6299 {
6300         int r;
6301         sigset_t sigsaved;
6302
6303         if (!tsk_used_math(current) && init_fpu(current))
6304                 return -ENOMEM;
6305
6306         if (vcpu->sigset_active)
6307                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6308
6309         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6310                 kvm_vcpu_block(vcpu);
6311                 kvm_apic_accept_events(vcpu);
6312                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6313                 r = -EAGAIN;
6314                 goto out;
6315         }
6316
6317         /* re-sync apic's tpr */
6318         if (!irqchip_in_kernel(vcpu->kvm)) {
6319                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6320                         r = -EINVAL;
6321                         goto out;
6322                 }
6323         }
6324
6325         if (unlikely(vcpu->arch.complete_userspace_io)) {
6326                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6327                 vcpu->arch.complete_userspace_io = NULL;
6328                 r = cui(vcpu);
6329                 if (r <= 0)
6330                         goto out;
6331         } else
6332                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6333
6334         r = __vcpu_run(vcpu);
6335
6336 out:
6337         post_kvm_run_save(vcpu);
6338         if (vcpu->sigset_active)
6339                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6340
6341         return r;
6342 }
6343
6344 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6345 {
6346         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6347                 /*
6348                  * We are here if userspace calls get_regs() in the middle of
6349                  * instruction emulation. Registers state needs to be copied
6350                  * back from emulation context to vcpu. Userspace shouldn't do
6351                  * that usually, but some bad designed PV devices (vmware
6352                  * backdoor interface) need this to work
6353                  */
6354                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6355                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6356         }
6357         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6358         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6359         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6360         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6361         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6362         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6363         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6364         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6365 #ifdef CONFIG_X86_64
6366         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6367         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6368         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6369         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6370         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6371         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6372         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6373         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6374 #endif
6375
6376         regs->rip = kvm_rip_read(vcpu);
6377         regs->rflags = kvm_get_rflags(vcpu);
6378
6379         return 0;
6380 }
6381
6382 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6383 {
6384         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6385         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6386
6387         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6388         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6389         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6390         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6391         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6392         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6393         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6394         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6395 #ifdef CONFIG_X86_64
6396         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6397         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6398         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6399         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6400         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6401         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6402         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6403         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6404 #endif
6405
6406         kvm_rip_write(vcpu, regs->rip);
6407         kvm_set_rflags(vcpu, regs->rflags);
6408
6409         vcpu->arch.exception.pending = false;
6410
6411         kvm_make_request(KVM_REQ_EVENT, vcpu);
6412
6413         return 0;
6414 }
6415
6416 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6417 {
6418         struct kvm_segment cs;
6419
6420         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6421         *db = cs.db;
6422         *l = cs.l;
6423 }
6424 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6425
6426 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6427                                   struct kvm_sregs *sregs)
6428 {
6429         struct desc_ptr dt;
6430
6431         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6432         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6433         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6434         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6435         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6436         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6437
6438         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6439         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6440
6441         kvm_x86_ops->get_idt(vcpu, &dt);
6442         sregs->idt.limit = dt.size;
6443         sregs->idt.base = dt.address;
6444         kvm_x86_ops->get_gdt(vcpu, &dt);
6445         sregs->gdt.limit = dt.size;
6446         sregs->gdt.base = dt.address;
6447
6448         sregs->cr0 = kvm_read_cr0(vcpu);
6449         sregs->cr2 = vcpu->arch.cr2;
6450         sregs->cr3 = kvm_read_cr3(vcpu);
6451         sregs->cr4 = kvm_read_cr4(vcpu);
6452         sregs->cr8 = kvm_get_cr8(vcpu);
6453         sregs->efer = vcpu->arch.efer;
6454         sregs->apic_base = kvm_get_apic_base(vcpu);
6455
6456         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6457
6458         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6459                 set_bit(vcpu->arch.interrupt.nr,
6460                         (unsigned long *)sregs->interrupt_bitmap);
6461
6462         return 0;
6463 }
6464
6465 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6466                                     struct kvm_mp_state *mp_state)
6467 {
6468         kvm_apic_accept_events(vcpu);
6469         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
6470                                         vcpu->arch.pv.pv_unhalted)
6471                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
6472         else
6473                 mp_state->mp_state = vcpu->arch.mp_state;
6474
6475         return 0;
6476 }
6477
6478 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6479                                     struct kvm_mp_state *mp_state)
6480 {
6481         if (!kvm_vcpu_has_lapic(vcpu) &&
6482             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
6483                 return -EINVAL;
6484
6485         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
6486                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
6487                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
6488         } else
6489                 vcpu->arch.mp_state = mp_state->mp_state;
6490         kvm_make_request(KVM_REQ_EVENT, vcpu);
6491         return 0;
6492 }
6493
6494 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
6495                     int reason, bool has_error_code, u32 error_code)
6496 {
6497         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6498         int ret;
6499
6500         init_emulate_ctxt(vcpu);
6501
6502         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
6503                                    has_error_code, error_code);
6504
6505         if (ret)
6506                 return EMULATE_FAIL;
6507
6508         kvm_rip_write(vcpu, ctxt->eip);
6509         kvm_set_rflags(vcpu, ctxt->eflags);
6510         kvm_make_request(KVM_REQ_EVENT, vcpu);
6511         return EMULATE_DONE;
6512 }
6513 EXPORT_SYMBOL_GPL(kvm_task_switch);
6514
6515 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6516                                   struct kvm_sregs *sregs)
6517 {
6518         struct msr_data apic_base_msr;
6519         int mmu_reset_needed = 0;
6520         int pending_vec, max_bits, idx;
6521         struct desc_ptr dt;
6522
6523         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
6524                 return -EINVAL;
6525
6526         dt.size = sregs->idt.limit;
6527         dt.address = sregs->idt.base;
6528         kvm_x86_ops->set_idt(vcpu, &dt);
6529         dt.size = sregs->gdt.limit;
6530         dt.address = sregs->gdt.base;
6531         kvm_x86_ops->set_gdt(vcpu, &dt);
6532
6533         vcpu->arch.cr2 = sregs->cr2;
6534         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6535         vcpu->arch.cr3 = sregs->cr3;
6536         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6537
6538         kvm_set_cr8(vcpu, sregs->cr8);
6539
6540         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6541         kvm_x86_ops->set_efer(vcpu, sregs->efer);
6542         apic_base_msr.data = sregs->apic_base;
6543         apic_base_msr.host_initiated = true;
6544         kvm_set_apic_base(vcpu, &apic_base_msr);
6545
6546         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6547         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6548         vcpu->arch.cr0 = sregs->cr0;
6549
6550         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6551         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6552         if (sregs->cr4 & X86_CR4_OSXSAVE)
6553                 kvm_update_cpuid(vcpu);
6554
6555         idx = srcu_read_lock(&vcpu->kvm->srcu);
6556         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6557                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6558                 mmu_reset_needed = 1;
6559         }
6560         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6561
6562         if (mmu_reset_needed)
6563                 kvm_mmu_reset_context(vcpu);
6564
6565         max_bits = KVM_NR_INTERRUPTS;
6566         pending_vec = find_first_bit(
6567                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6568         if (pending_vec < max_bits) {
6569                 kvm_queue_interrupt(vcpu, pending_vec, false);
6570                 pr_debug("Set back pending irq %d\n", pending_vec);
6571         }
6572
6573         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6574         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6575         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6576         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6577         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6578         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6579
6580         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6581         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6582
6583         update_cr8_intercept(vcpu);
6584
6585         /* Older userspace won't unhalt the vcpu on reset. */
6586         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6587             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6588             !is_protmode(vcpu))
6589                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6590
6591         kvm_make_request(KVM_REQ_EVENT, vcpu);
6592
6593         return 0;
6594 }
6595
6596 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6597                                         struct kvm_guest_debug *dbg)
6598 {
6599         unsigned long rflags;
6600         int i, r;
6601
6602         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6603                 r = -EBUSY;
6604                 if (vcpu->arch.exception.pending)
6605                         goto out;
6606                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6607                         kvm_queue_exception(vcpu, DB_VECTOR);
6608                 else
6609                         kvm_queue_exception(vcpu, BP_VECTOR);
6610         }
6611
6612         /*
6613          * Read rflags as long as potentially injected trace flags are still
6614          * filtered out.
6615          */
6616         rflags = kvm_get_rflags(vcpu);
6617
6618         vcpu->guest_debug = dbg->control;
6619         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6620                 vcpu->guest_debug = 0;
6621
6622         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6623                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6624                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6625                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
6626         } else {
6627                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6628                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6629         }
6630         kvm_update_dr7(vcpu);
6631
6632         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6633                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
6634                         get_segment_base(vcpu, VCPU_SREG_CS);
6635
6636         /*
6637          * Trigger an rflags update that will inject or remove the trace
6638          * flags.
6639          */
6640         kvm_set_rflags(vcpu, rflags);
6641
6642         kvm_x86_ops->update_db_bp_intercept(vcpu);
6643
6644         r = 0;
6645
6646 out:
6647
6648         return r;
6649 }
6650
6651 /*
6652  * Translate a guest virtual address to a guest physical address.
6653  */
6654 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6655                                     struct kvm_translation *tr)
6656 {
6657         unsigned long vaddr = tr->linear_address;
6658         gpa_t gpa;
6659         int idx;
6660
6661         idx = srcu_read_lock(&vcpu->kvm->srcu);
6662         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6663         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6664         tr->physical_address = gpa;
6665         tr->valid = gpa != UNMAPPED_GVA;
6666         tr->writeable = 1;
6667         tr->usermode = 0;
6668
6669         return 0;
6670 }
6671
6672 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6673 {
6674         struct i387_fxsave_struct *fxsave =
6675                         &vcpu->arch.guest_fpu.state->fxsave;
6676
6677         memcpy(fpu->fpr, fxsave->st_space, 128);
6678         fpu->fcw = fxsave->cwd;
6679         fpu->fsw = fxsave->swd;
6680         fpu->ftwx = fxsave->twd;
6681         fpu->last_opcode = fxsave->fop;
6682         fpu->last_ip = fxsave->rip;
6683         fpu->last_dp = fxsave->rdp;
6684         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6685
6686         return 0;
6687 }
6688
6689 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6690 {
6691         struct i387_fxsave_struct *fxsave =
6692                         &vcpu->arch.guest_fpu.state->fxsave;
6693
6694         memcpy(fxsave->st_space, fpu->fpr, 128);
6695         fxsave->cwd = fpu->fcw;
6696         fxsave->swd = fpu->fsw;
6697         fxsave->twd = fpu->ftwx;
6698         fxsave->fop = fpu->last_opcode;
6699         fxsave->rip = fpu->last_ip;
6700         fxsave->rdp = fpu->last_dp;
6701         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6702
6703         return 0;
6704 }
6705
6706 int fx_init(struct kvm_vcpu *vcpu)
6707 {
6708         int err;
6709
6710         err = fpu_alloc(&vcpu->arch.guest_fpu);
6711         if (err)
6712                 return err;
6713
6714         fpu_finit(&vcpu->arch.guest_fpu);
6715
6716         /*
6717          * Ensure guest xcr0 is valid for loading
6718          */
6719         vcpu->arch.xcr0 = XSTATE_FP;
6720
6721         vcpu->arch.cr0 |= X86_CR0_ET;
6722
6723         return 0;
6724 }
6725 EXPORT_SYMBOL_GPL(fx_init);
6726
6727 static void fx_free(struct kvm_vcpu *vcpu)
6728 {
6729         fpu_free(&vcpu->arch.guest_fpu);
6730 }
6731
6732 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
6733 {
6734         if (vcpu->guest_fpu_loaded)
6735                 return;
6736
6737         /*
6738          * Restore all possible states in the guest,
6739          * and assume host would use all available bits.
6740          * Guest xcr0 would be loaded later.
6741          */
6742         kvm_put_guest_xcr0(vcpu);
6743         vcpu->guest_fpu_loaded = 1;
6744         __kernel_fpu_begin();
6745         fpu_restore_checking(&vcpu->arch.guest_fpu);
6746         trace_kvm_fpu(1);
6747 }
6748
6749 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
6750 {
6751         kvm_put_guest_xcr0(vcpu);
6752
6753         if (!vcpu->guest_fpu_loaded)
6754                 return;
6755
6756         vcpu->guest_fpu_loaded = 0;
6757         fpu_save_init(&vcpu->arch.guest_fpu);
6758         __kernel_fpu_end();
6759         ++vcpu->stat.fpu_reload;
6760         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
6761         trace_kvm_fpu(0);
6762 }
6763
6764 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
6765 {
6766         kvmclock_reset(vcpu);
6767
6768         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6769         fx_free(vcpu);
6770         kvm_x86_ops->vcpu_free(vcpu);
6771 }
6772
6773 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
6774                                                 unsigned int id)
6775 {
6776         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
6777                 printk_once(KERN_WARNING
6778                 "kvm: SMP vm created on host with unstable TSC; "
6779                 "guest TSC will not be reliable\n");
6780         return kvm_x86_ops->vcpu_create(kvm, id);
6781 }
6782
6783 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
6784 {
6785         int r;
6786
6787         vcpu->arch.mtrr_state.have_fixed = 1;
6788         r = vcpu_load(vcpu);
6789         if (r)
6790                 return r;
6791         kvm_vcpu_reset(vcpu);
6792         kvm_mmu_setup(vcpu);
6793         vcpu_put(vcpu);
6794
6795         return r;
6796 }
6797
6798 int kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
6799 {
6800         int r;
6801         struct msr_data msr;
6802         struct kvm *kvm = vcpu->kvm;
6803
6804         r = vcpu_load(vcpu);
6805         if (r)
6806                 return r;
6807         msr.data = 0x0;
6808         msr.index = MSR_IA32_TSC;
6809         msr.host_initiated = true;
6810         kvm_write_tsc(vcpu, &msr);
6811         vcpu_put(vcpu);
6812
6813         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
6814                                         KVMCLOCK_SYNC_PERIOD);
6815
6816         return r;
6817 }
6818
6819 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6820 {
6821         int r;
6822         vcpu->arch.apf.msr_val = 0;
6823
6824         r = vcpu_load(vcpu);
6825         BUG_ON(r);
6826         kvm_mmu_unload(vcpu);
6827         vcpu_put(vcpu);
6828
6829         fx_free(vcpu);
6830         kvm_x86_ops->vcpu_free(vcpu);
6831 }
6832
6833 void kvm_vcpu_reset(struct kvm_vcpu *vcpu)
6834 {
6835         atomic_set(&vcpu->arch.nmi_queued, 0);
6836         vcpu->arch.nmi_pending = 0;
6837         vcpu->arch.nmi_injected = false;
6838
6839         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
6840         vcpu->arch.dr6 = DR6_FIXED_1;
6841         kvm_update_dr6(vcpu);
6842         vcpu->arch.dr7 = DR7_FIXED_1;
6843         kvm_update_dr7(vcpu);
6844
6845         kvm_make_request(KVM_REQ_EVENT, vcpu);
6846         vcpu->arch.apf.msr_val = 0;
6847         vcpu->arch.st.msr_val = 0;
6848
6849         kvmclock_reset(vcpu);
6850
6851         kvm_clear_async_pf_completion_queue(vcpu);
6852         kvm_async_pf_hash_reset(vcpu);
6853         vcpu->arch.apf.halted = false;
6854
6855         kvm_pmu_reset(vcpu);
6856
6857         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
6858         vcpu->arch.regs_avail = ~0;
6859         vcpu->arch.regs_dirty = ~0;
6860
6861         kvm_x86_ops->vcpu_reset(vcpu);
6862 }
6863
6864 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, unsigned int vector)
6865 {
6866         struct kvm_segment cs;
6867
6868         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6869         cs.selector = vector << 8;
6870         cs.base = vector << 12;
6871         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6872         kvm_rip_write(vcpu, 0);
6873 }
6874
6875 int kvm_arch_hardware_enable(void *garbage)
6876 {
6877         struct kvm *kvm;
6878         struct kvm_vcpu *vcpu;
6879         int i;
6880         int ret;
6881         u64 local_tsc;
6882         u64 max_tsc = 0;
6883         bool stable, backwards_tsc = false;
6884
6885         kvm_shared_msr_cpu_online();
6886         ret = kvm_x86_ops->hardware_enable(garbage);
6887         if (ret != 0)
6888                 return ret;
6889
6890         local_tsc = native_read_tsc();
6891         stable = !check_tsc_unstable();
6892         list_for_each_entry(kvm, &vm_list, vm_list) {
6893                 kvm_for_each_vcpu(i, vcpu, kvm) {
6894                         if (!stable && vcpu->cpu == smp_processor_id())
6895                                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
6896                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
6897                                 backwards_tsc = true;
6898                                 if (vcpu->arch.last_host_tsc > max_tsc)
6899                                         max_tsc = vcpu->arch.last_host_tsc;
6900                         }
6901                 }
6902         }
6903
6904         /*
6905          * Sometimes, even reliable TSCs go backwards.  This happens on
6906          * platforms that reset TSC during suspend or hibernate actions, but
6907          * maintain synchronization.  We must compensate.  Fortunately, we can
6908          * detect that condition here, which happens early in CPU bringup,
6909          * before any KVM threads can be running.  Unfortunately, we can't
6910          * bring the TSCs fully up to date with real time, as we aren't yet far
6911          * enough into CPU bringup that we know how much real time has actually
6912          * elapsed; our helper function, get_kernel_ns() will be using boot
6913          * variables that haven't been updated yet.
6914          *
6915          * So we simply find the maximum observed TSC above, then record the
6916          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
6917          * the adjustment will be applied.  Note that we accumulate
6918          * adjustments, in case multiple suspend cycles happen before some VCPU
6919          * gets a chance to run again.  In the event that no KVM threads get a
6920          * chance to run, we will miss the entire elapsed period, as we'll have
6921          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
6922          * loose cycle time.  This isn't too big a deal, since the loss will be
6923          * uniform across all VCPUs (not to mention the scenario is extremely
6924          * unlikely). It is possible that a second hibernate recovery happens
6925          * much faster than a first, causing the observed TSC here to be
6926          * smaller; this would require additional padding adjustment, which is
6927          * why we set last_host_tsc to the local tsc observed here.
6928          *
6929          * N.B. - this code below runs only on platforms with reliable TSC,
6930          * as that is the only way backwards_tsc is set above.  Also note
6931          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
6932          * have the same delta_cyc adjustment applied if backwards_tsc
6933          * is detected.  Note further, this adjustment is only done once,
6934          * as we reset last_host_tsc on all VCPUs to stop this from being
6935          * called multiple times (one for each physical CPU bringup).
6936          *
6937          * Platforms with unreliable TSCs don't have to deal with this, they
6938          * will be compensated by the logic in vcpu_load, which sets the TSC to
6939          * catchup mode.  This will catchup all VCPUs to real time, but cannot
6940          * guarantee that they stay in perfect synchronization.
6941          */
6942         if (backwards_tsc) {
6943                 u64 delta_cyc = max_tsc - local_tsc;
6944                 backwards_tsc_observed = true;
6945                 list_for_each_entry(kvm, &vm_list, vm_list) {
6946                         kvm_for_each_vcpu(i, vcpu, kvm) {
6947                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
6948                                 vcpu->arch.last_host_tsc = local_tsc;
6949                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
6950                                         &vcpu->requests);
6951                         }
6952
6953                         /*
6954                          * We have to disable TSC offset matching.. if you were
6955                          * booting a VM while issuing an S4 host suspend....
6956                          * you may have some problem.  Solving this issue is
6957                          * left as an exercise to the reader.
6958                          */
6959                         kvm->arch.last_tsc_nsec = 0;
6960                         kvm->arch.last_tsc_write = 0;
6961                 }
6962
6963         }
6964         return 0;
6965 }
6966
6967 void kvm_arch_hardware_disable(void *garbage)
6968 {
6969         kvm_x86_ops->hardware_disable(garbage);
6970         drop_user_return_notifiers(garbage);
6971 }
6972
6973 int kvm_arch_hardware_setup(void)
6974 {
6975         return kvm_x86_ops->hardware_setup();
6976 }
6977
6978 void kvm_arch_hardware_unsetup(void)
6979 {
6980         kvm_x86_ops->hardware_unsetup();
6981 }
6982
6983 void kvm_arch_check_processor_compat(void *rtn)
6984 {
6985         kvm_x86_ops->check_processor_compatibility(rtn);
6986 }
6987
6988 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
6989 {
6990         return irqchip_in_kernel(vcpu->kvm) == (vcpu->arch.apic != NULL);
6991 }
6992
6993 struct static_key kvm_no_apic_vcpu __read_mostly;
6994
6995 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6996 {
6997         struct page *page;
6998         struct kvm *kvm;
6999         int r;
7000
7001         BUG_ON(vcpu->kvm == NULL);
7002         kvm = vcpu->kvm;
7003
7004         vcpu->arch.pv.pv_unhalted = false;
7005         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7006         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
7007                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7008         else
7009                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7010
7011         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7012         if (!page) {
7013                 r = -ENOMEM;
7014                 goto fail;
7015         }
7016         vcpu->arch.pio_data = page_address(page);
7017
7018         kvm_set_tsc_khz(vcpu, max_tsc_khz);
7019
7020         r = kvm_mmu_create(vcpu);
7021         if (r < 0)
7022                 goto fail_free_pio_data;
7023
7024         if (irqchip_in_kernel(kvm)) {
7025                 r = kvm_create_lapic(vcpu);
7026                 if (r < 0)
7027                         goto fail_mmu_destroy;
7028         } else
7029                 static_key_slow_inc(&kvm_no_apic_vcpu);
7030
7031         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7032                                        GFP_KERNEL);
7033         if (!vcpu->arch.mce_banks) {
7034                 r = -ENOMEM;
7035                 goto fail_free_lapic;
7036         }
7037         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7038
7039         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7040                 r = -ENOMEM;
7041                 goto fail_free_mce_banks;
7042         }
7043
7044         r = fx_init(vcpu);
7045         if (r)
7046                 goto fail_free_wbinvd_dirty_mask;
7047
7048         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7049         vcpu->arch.pv_time_enabled = false;
7050
7051         vcpu->arch.guest_supported_xcr0 = 0;
7052         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7053
7054         kvm_async_pf_hash_reset(vcpu);
7055         kvm_pmu_init(vcpu);
7056
7057         return 0;
7058 fail_free_wbinvd_dirty_mask:
7059         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
7060 fail_free_mce_banks:
7061         kfree(vcpu->arch.mce_banks);
7062 fail_free_lapic:
7063         kvm_free_lapic(vcpu);
7064 fail_mmu_destroy:
7065         kvm_mmu_destroy(vcpu);
7066 fail_free_pio_data:
7067         free_page((unsigned long)vcpu->arch.pio_data);
7068 fail:
7069         return r;
7070 }
7071
7072 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
7073 {
7074         int idx;
7075
7076         kvm_pmu_destroy(vcpu);
7077         kfree(vcpu->arch.mce_banks);
7078         kvm_free_lapic(vcpu);
7079         idx = srcu_read_lock(&vcpu->kvm->srcu);
7080         kvm_mmu_destroy(vcpu);
7081         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7082         free_page((unsigned long)vcpu->arch.pio_data);
7083         if (!irqchip_in_kernel(vcpu->kvm))
7084                 static_key_slow_dec(&kvm_no_apic_vcpu);
7085 }
7086
7087 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
7088 {
7089         if (type)
7090                 return -EINVAL;
7091
7092         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
7093         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
7094         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
7095         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
7096
7097         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7098         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
7099         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7100         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
7101                 &kvm->arch.irq_sources_bitmap);
7102
7103         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
7104         mutex_init(&kvm->arch.apic_map_lock);
7105         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
7106
7107         pvclock_update_vm_gtod_copy(kvm);
7108
7109         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
7110         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
7111
7112         return 0;
7113 }
7114
7115 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
7116 {
7117         int r;
7118         r = vcpu_load(vcpu);
7119         BUG_ON(r);
7120         kvm_mmu_unload(vcpu);
7121         vcpu_put(vcpu);
7122 }
7123
7124 static void kvm_free_vcpus(struct kvm *kvm)
7125 {
7126         unsigned int i;
7127         struct kvm_vcpu *vcpu;
7128
7129         /*
7130          * Unpin any mmu pages first.
7131          */
7132         kvm_for_each_vcpu(i, vcpu, kvm) {
7133                 kvm_clear_async_pf_completion_queue(vcpu);
7134                 kvm_unload_vcpu_mmu(vcpu);
7135         }
7136         kvm_for_each_vcpu(i, vcpu, kvm)
7137                 kvm_arch_vcpu_free(vcpu);
7138
7139         mutex_lock(&kvm->lock);
7140         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
7141                 kvm->vcpus[i] = NULL;
7142
7143         atomic_set(&kvm->online_vcpus, 0);
7144         mutex_unlock(&kvm->lock);
7145 }
7146
7147 void kvm_arch_sync_events(struct kvm *kvm)
7148 {
7149         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
7150         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
7151         kvm_free_all_assigned_devices(kvm);
7152         kvm_free_pit(kvm);
7153 }
7154
7155 void kvm_arch_destroy_vm(struct kvm *kvm)
7156 {
7157         if (current->mm == kvm->mm) {
7158                 /*
7159                  * Free memory regions allocated on behalf of userspace,
7160                  * unless the the memory map has changed due to process exit
7161                  * or fd copying.
7162                  */
7163                 struct kvm_userspace_memory_region mem;
7164                 memset(&mem, 0, sizeof(mem));
7165                 mem.slot = APIC_ACCESS_PAGE_PRIVATE_MEMSLOT;
7166                 kvm_set_memory_region(kvm, &mem);
7167
7168                 mem.slot = IDENTITY_PAGETABLE_PRIVATE_MEMSLOT;
7169                 kvm_set_memory_region(kvm, &mem);
7170
7171                 mem.slot = TSS_PRIVATE_MEMSLOT;
7172                 kvm_set_memory_region(kvm, &mem);
7173         }
7174         kvm_iommu_unmap_guest(kvm);
7175         kfree(kvm->arch.vpic);
7176         kfree(kvm->arch.vioapic);
7177         kvm_free_vcpus(kvm);
7178         if (kvm->arch.apic_access_page)
7179                 put_page(kvm->arch.apic_access_page);
7180         if (kvm->arch.ept_identity_pagetable)
7181                 put_page(kvm->arch.ept_identity_pagetable);
7182         kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
7183 }
7184
7185 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
7186                            struct kvm_memory_slot *dont)
7187 {
7188         int i;
7189
7190         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7191                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
7192                         kvm_kvfree(free->arch.rmap[i]);
7193                         free->arch.rmap[i] = NULL;
7194                 }
7195                 if (i == 0)
7196                         continue;
7197
7198                 if (!dont || free->arch.lpage_info[i - 1] !=
7199                              dont->arch.lpage_info[i - 1]) {
7200                         kvm_kvfree(free->arch.lpage_info[i - 1]);
7201                         free->arch.lpage_info[i - 1] = NULL;
7202                 }
7203         }
7204 }
7205
7206 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
7207                             unsigned long npages)
7208 {
7209         int i;
7210
7211         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7212                 unsigned long ugfn;
7213                 int lpages;
7214                 int level = i + 1;
7215
7216                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
7217                                       slot->base_gfn, level) + 1;
7218
7219                 slot->arch.rmap[i] =
7220                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
7221                 if (!slot->arch.rmap[i])
7222                         goto out_free;
7223                 if (i == 0)
7224                         continue;
7225
7226                 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
7227                                         sizeof(*slot->arch.lpage_info[i - 1]));
7228                 if (!slot->arch.lpage_info[i - 1])
7229                         goto out_free;
7230
7231                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
7232                         slot->arch.lpage_info[i - 1][0].write_count = 1;
7233                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
7234                         slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
7235                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
7236                 /*
7237                  * If the gfn and userspace address are not aligned wrt each
7238                  * other, or if explicitly asked to, disable large page
7239                  * support for this slot
7240                  */
7241                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
7242                     !kvm_largepages_enabled()) {
7243                         unsigned long j;
7244
7245                         for (j = 0; j < lpages; ++j)
7246                                 slot->arch.lpage_info[i - 1][j].write_count = 1;
7247                 }
7248         }
7249
7250         return 0;
7251
7252 out_free:
7253         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7254                 kvm_kvfree(slot->arch.rmap[i]);
7255                 slot->arch.rmap[i] = NULL;
7256                 if (i == 0)
7257                         continue;
7258
7259                 kvm_kvfree(slot->arch.lpage_info[i - 1]);
7260                 slot->arch.lpage_info[i - 1] = NULL;
7261         }
7262         return -ENOMEM;
7263 }
7264
7265 void kvm_arch_memslots_updated(struct kvm *kvm)
7266 {
7267         /*
7268          * memslots->generation has been incremented.
7269          * mmio generation may have reached its maximum value.
7270          */
7271         kvm_mmu_invalidate_mmio_sptes(kvm);
7272 }
7273
7274 int kvm_arch_prepare_memory_region(struct kvm *kvm,
7275                                 struct kvm_memory_slot *memslot,
7276                                 struct kvm_userspace_memory_region *mem,
7277                                 enum kvm_mr_change change)
7278 {
7279         /*
7280          * Only private memory slots need to be mapped here since
7281          * KVM_SET_MEMORY_REGION ioctl is no longer supported.
7282          */
7283         if ((memslot->id >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_CREATE)) {
7284                 unsigned long userspace_addr;
7285
7286                 /*
7287                  * MAP_SHARED to prevent internal slot pages from being moved
7288                  * by fork()/COW.
7289                  */
7290                 userspace_addr = vm_mmap(NULL, 0, memslot->npages * PAGE_SIZE,
7291                                          PROT_READ | PROT_WRITE,
7292                                          MAP_SHARED | MAP_ANONYMOUS, 0);
7293
7294                 if (IS_ERR((void *)userspace_addr))
7295                         return PTR_ERR((void *)userspace_addr);
7296
7297                 memslot->userspace_addr = userspace_addr;
7298         }
7299
7300         return 0;
7301 }
7302
7303 void kvm_arch_commit_memory_region(struct kvm *kvm,
7304                                 struct kvm_userspace_memory_region *mem,
7305                                 const struct kvm_memory_slot *old,
7306                                 enum kvm_mr_change change)
7307 {
7308
7309         int nr_mmu_pages = 0;
7310
7311         if ((mem->slot >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_DELETE)) {
7312                 int ret;
7313
7314                 ret = vm_munmap(old->userspace_addr,
7315                                 old->npages * PAGE_SIZE);
7316                 if (ret < 0)
7317                         printk(KERN_WARNING
7318                                "kvm_vm_ioctl_set_memory_region: "
7319                                "failed to munmap memory\n");
7320         }
7321
7322         if (!kvm->arch.n_requested_mmu_pages)
7323                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
7324
7325         if (nr_mmu_pages)
7326                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
7327         /*
7328          * Write protect all pages for dirty logging.
7329          *
7330          * All the sptes including the large sptes which point to this
7331          * slot are set to readonly. We can not create any new large
7332          * spte on this slot until the end of the logging.
7333          *
7334          * See the comments in fast_page_fault().
7335          */
7336         if ((change != KVM_MR_DELETE) && (mem->flags & KVM_MEM_LOG_DIRTY_PAGES))
7337                 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
7338 }
7339
7340 void kvm_arch_flush_shadow_all(struct kvm *kvm)
7341 {
7342         kvm_mmu_invalidate_zap_all_pages(kvm);
7343 }
7344
7345 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
7346                                    struct kvm_memory_slot *slot)
7347 {
7348         kvm_mmu_invalidate_zap_all_pages(kvm);
7349 }
7350
7351 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
7352 {
7353         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
7354                 kvm_x86_ops->check_nested_events(vcpu, false);
7355
7356         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7357                 !vcpu->arch.apf.halted)
7358                 || !list_empty_careful(&vcpu->async_pf.done)
7359                 || kvm_apic_has_events(vcpu)
7360                 || vcpu->arch.pv.pv_unhalted
7361                 || atomic_read(&vcpu->arch.nmi_queued) ||
7362                 (kvm_arch_interrupt_allowed(vcpu) &&
7363                  kvm_cpu_has_interrupt(vcpu));
7364 }
7365
7366 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
7367 {
7368         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
7369 }
7370
7371 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
7372 {
7373         return kvm_x86_ops->interrupt_allowed(vcpu);
7374 }
7375
7376 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
7377 {
7378         unsigned long current_rip = kvm_rip_read(vcpu) +
7379                 get_segment_base(vcpu, VCPU_SREG_CS);
7380
7381         return current_rip == linear_rip;
7382 }
7383 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
7384
7385 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
7386 {
7387         unsigned long rflags;
7388
7389         rflags = kvm_x86_ops->get_rflags(vcpu);
7390         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7391                 rflags &= ~X86_EFLAGS_TF;
7392         return rflags;
7393 }
7394 EXPORT_SYMBOL_GPL(kvm_get_rflags);
7395
7396 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
7397 {
7398         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
7399             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
7400                 rflags |= X86_EFLAGS_TF;
7401         kvm_x86_ops->set_rflags(vcpu, rflags);
7402         kvm_make_request(KVM_REQ_EVENT, vcpu);
7403 }
7404 EXPORT_SYMBOL_GPL(kvm_set_rflags);
7405
7406 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
7407 {
7408         int r;
7409
7410         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
7411               work->wakeup_all)
7412                 return;
7413
7414         r = kvm_mmu_reload(vcpu);
7415         if (unlikely(r))
7416                 return;
7417
7418         if (!vcpu->arch.mmu.direct_map &&
7419               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
7420                 return;
7421
7422         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
7423 }
7424
7425 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
7426 {
7427         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
7428 }
7429
7430 static inline u32 kvm_async_pf_next_probe(u32 key)
7431 {
7432         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
7433 }
7434
7435 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7436 {
7437         u32 key = kvm_async_pf_hash_fn(gfn);
7438
7439         while (vcpu->arch.apf.gfns[key] != ~0)
7440                 key = kvm_async_pf_next_probe(key);
7441
7442         vcpu->arch.apf.gfns[key] = gfn;
7443 }
7444
7445 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
7446 {
7447         int i;
7448         u32 key = kvm_async_pf_hash_fn(gfn);
7449
7450         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
7451                      (vcpu->arch.apf.gfns[key] != gfn &&
7452                       vcpu->arch.apf.gfns[key] != ~0); i++)
7453                 key = kvm_async_pf_next_probe(key);
7454
7455         return key;
7456 }
7457
7458 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7459 {
7460         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
7461 }
7462
7463 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7464 {
7465         u32 i, j, k;
7466
7467         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
7468         while (true) {
7469                 vcpu->arch.apf.gfns[i] = ~0;
7470                 do {
7471                         j = kvm_async_pf_next_probe(j);
7472                         if (vcpu->arch.apf.gfns[j] == ~0)
7473                                 return;
7474                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
7475                         /*
7476                          * k lies cyclically in ]i,j]
7477                          * |    i.k.j |
7478                          * |....j i.k.| or  |.k..j i...|
7479                          */
7480                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
7481                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
7482                 i = j;
7483         }
7484 }
7485
7486 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
7487 {
7488
7489         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
7490                                       sizeof(val));
7491 }
7492
7493 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
7494                                      struct kvm_async_pf *work)
7495 {
7496         struct x86_exception fault;
7497
7498         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
7499         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
7500
7501         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
7502             (vcpu->arch.apf.send_user_only &&
7503              kvm_x86_ops->get_cpl(vcpu) == 0))
7504                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
7505         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
7506                 fault.vector = PF_VECTOR;
7507                 fault.error_code_valid = true;
7508                 fault.error_code = 0;
7509                 fault.nested_page_fault = false;
7510                 fault.address = work->arch.token;
7511                 kvm_inject_page_fault(vcpu, &fault);
7512         }
7513 }
7514
7515 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
7516                                  struct kvm_async_pf *work)
7517 {
7518         struct x86_exception fault;
7519
7520         trace_kvm_async_pf_ready(work->arch.token, work->gva);
7521         if (work->wakeup_all)
7522                 work->arch.token = ~0; /* broadcast wakeup */
7523         else
7524                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
7525
7526         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
7527             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
7528                 fault.vector = PF_VECTOR;
7529                 fault.error_code_valid = true;
7530                 fault.error_code = 0;
7531                 fault.nested_page_fault = false;
7532                 fault.address = work->arch.token;
7533                 kvm_inject_page_fault(vcpu, &fault);
7534         }
7535         vcpu->arch.apf.halted = false;
7536         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7537 }
7538
7539 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
7540 {
7541         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
7542                 return true;
7543         else
7544                 return !kvm_event_needs_reinjection(vcpu) &&
7545                         kvm_x86_ops->interrupt_allowed(vcpu);
7546 }
7547
7548 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
7549 {
7550         atomic_inc(&kvm->arch.noncoherent_dma_count);
7551 }
7552 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
7553
7554 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
7555 {
7556         atomic_dec(&kvm->arch.noncoherent_dma_count);
7557 }
7558 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
7559
7560 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
7561 {
7562         return atomic_read(&kvm->arch.noncoherent_dma_count);
7563 }
7564 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
7565
7566 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
7567 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
7568 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
7569 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
7570 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
7571 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
7572 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
7573 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
7574 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
7575 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
7576 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
7577 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
7578 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);