arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "pmu.h"
  31 #include "hyperv.h"
  32
  33 #include <linux/clocksource.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/kvm.h>
  36 #include <linux/fs.h>
  37 #include <linux/vmalloc.h>
  38 #include <linux/export.h>
  39 #include <linux/moduleparam.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <linux/sched/stat.h>
  57 #include <linux/mem_encrypt.h>
  58
  59 #include <trace/events/kvm.h>
  60
  61 #include <asm/debugreg.h>
  62 #include <asm/msr.h>
  63 #include <asm/desc.h>
  64 #include <asm/mce.h>
  65 #include <linux/kernel_stat.h>
  66 #include <asm/fpu/internal.h> /* Ugh! */
  67 #include <asm/pvclock.h>
  68 #include <asm/div64.h>
  69 #include <asm/irq_remapping.h>
  70 #include <asm/mshyperv.h>
  71 #include <asm/hypervisor.h>
  72
  73 #define CREATE_TRACE_POINTS
  74 #include "trace.h"
  75
  76 #define MAX_IO_MSRS 256
  77 #define KVM_MAX_MCE_BANKS 32
  78 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  79 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  80
  81 #define emul_to_vcpu(ctxt) \
  82         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  83
  84 /* EFER defaults:
  85  * - enable syscall per default because its emulated by KVM
  86  * - enable LME and LMA per default on 64 bit KVM
  87  */
  88 #ifdef CONFIG_X86_64
  89 static
  90 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  91 #else
  92 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  93 #endif
  94
  95 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  96 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  97
  98 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
  99                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 100
 101 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 102 static void process_nmi(struct kvm_vcpu *vcpu);
 103 static void enter_smm(struct kvm_vcpu *vcpu);
 104 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 105 static void store_regs(struct kvm_vcpu *vcpu);
 106 static int sync_regs(struct kvm_vcpu *vcpu);
 107
 108 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
 109 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 110
 111 static bool __read_mostly ignore_msrs = 0;
 112 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 113
 114 static bool __read_mostly report_ignored_msrs = true;
 115 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 116
 117 unsigned int min_timer_period_us = 200;
 118 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 119
 120 static bool __read_mostly kvmclock_periodic_sync = true;
 121 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 122
 123 bool __read_mostly kvm_has_tsc_control;
 124 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 125 u32  __read_mostly kvm_max_guest_tsc_khz;
 126 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 127 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 128 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 129 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 130 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 131 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 132 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 133
 134 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 135 static u32 __read_mostly tsc_tolerance_ppm = 250;
 136 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 137
 138 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 139 unsigned int __read_mostly lapic_timer_advance_ns = 1000;
 140 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 141 EXPORT_SYMBOL_GPL(lapic_timer_advance_ns);
 142
 143 static bool __read_mostly vector_hashing = true;
 144 module_param(vector_hashing, bool, S_IRUGO);
 145
 146 bool __read_mostly enable_vmware_backdoor = false;
 147 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 148 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 149
 150 static bool __read_mostly force_emulation_prefix = false;
 151 module_param(force_emulation_prefix, bool, S_IRUGO);
 152
 153 #define KVM_NR_SHARED_MSRS 16
 154
 155 struct kvm_shared_msrs_global {
 156         int nr;
 157         u32 msrs[KVM_NR_SHARED_MSRS];
 158 };
 159
 160 struct kvm_shared_msrs {
 161         struct user_return_notifier urn;
 162         bool registered;
 163         struct kvm_shared_msr_values {
 164                 u64 host;
 165                 u64 curr;
 166         } values[KVM_NR_SHARED_MSRS];
 167 };
 168
 169 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 170 static struct kvm_shared_msrs __percpu *shared_msrs;
 171
 172 struct kvm_stats_debugfs_item debugfs_entries[] = {
 173         { "pf_fixed", VCPU_STAT(pf_fixed) },
 174         { "pf_guest", VCPU_STAT(pf_guest) },
 175         { "tlb_flush", VCPU_STAT(tlb_flush) },
 176         { "invlpg", VCPU_STAT(invlpg) },
 177         { "exits", VCPU_STAT(exits) },
 178         { "io_exits", VCPU_STAT(io_exits) },
 179         { "mmio_exits", VCPU_STAT(mmio_exits) },
 180         { "signal_exits", VCPU_STAT(signal_exits) },
 181         { "irq_window", VCPU_STAT(irq_window_exits) },
 182         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 183         { "halt_exits", VCPU_STAT(halt_exits) },
 184         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 185         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 186         { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
 187         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 188         { "hypercalls", VCPU_STAT(hypercalls) },
 189         { "request_irq", VCPU_STAT(request_irq_exits) },
 190         { "irq_exits", VCPU_STAT(irq_exits) },
 191         { "host_state_reload", VCPU_STAT(host_state_reload) },
 192         { "fpu_reload", VCPU_STAT(fpu_reload) },
 193         { "insn_emulation", VCPU_STAT(insn_emulation) },
 194         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 195         { "irq_injections", VCPU_STAT(irq_injections) },
 196         { "nmi_injections", VCPU_STAT(nmi_injections) },
 197         { "req_event", VCPU_STAT(req_event) },
 198         { "l1d_flush", VCPU_STAT(l1d_flush) },
 199         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 200         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 201         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 202         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 203         { "mmu_flooded", VM_STAT(mmu_flooded) },
 204         { "mmu_recycled", VM_STAT(mmu_recycled) },
 205         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 206         { "mmu_unsync", VM_STAT(mmu_unsync) },
 207         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 208         { "largepages", VM_STAT(lpages) },
 209         { "max_mmu_page_hash_collisions",
 210                 VM_STAT(max_mmu_page_hash_collisions) },
 211         { NULL }
 212 };
 213
 214 u64 __read_mostly host_xcr0;
 215
 216 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 217
 218 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 219 {
 220         int i;
 221         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 222                 vcpu->arch.apf.gfns[i] = ~0;
 223 }
 224
 225 static void kvm_on_user_return(struct user_return_notifier *urn)
 226 {
 227         unsigned slot;
 228         struct kvm_shared_msrs *locals
 229                 = container_of(urn, struct kvm_shared_msrs, urn);
 230         struct kvm_shared_msr_values *values;
 231         unsigned long flags;
 232
 233         /*
 234          * Disabling irqs at this point since the following code could be
 235          * interrupted and executed through kvm_arch_hardware_disable()
 236          */
 237         local_irq_save(flags);
 238         if (locals->registered) {
 239                 locals->registered = false;
 240                 user_return_notifier_unregister(urn);
 241         }
 242         local_irq_restore(flags);
 243         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 244                 values = &locals->values[slot];
 245                 if (values->host != values->curr) {
 246                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 247                         values->curr = values->host;
 248                 }
 249         }
 250 }
 251
 252 static void shared_msr_update(unsigned slot, u32 msr)
 253 {
 254         u64 value;
 255         unsigned int cpu = smp_processor_id();
 256         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 257
 258         /* only read, and nobody should modify it at this time,
 259          * so don't need lock */
 260         if (slot >= shared_msrs_global.nr) {
 261                 printk(KERN_ERR "kvm: invalid MSR slot!");
 262                 return;
 263         }
 264         rdmsrl_safe(msr, &value);
 265         smsr->values[slot].host = value;
 266         smsr->values[slot].curr = value;
 267 }
 268
 269 void kvm_define_shared_msr(unsigned slot, u32 msr)
 270 {
 271         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 272         shared_msrs_global.msrs[slot] = msr;
 273         if (slot >= shared_msrs_global.nr)
 274                 shared_msrs_global.nr = slot + 1;
 275 }
 276 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 277
 278 static void kvm_shared_msr_cpu_online(void)
 279 {
 280         unsigned i;
 281
 282         for (i = 0; i < shared_msrs_global.nr; ++i)
 283                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 284 }
 285
 286 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 287 {
 288         unsigned int cpu = smp_processor_id();
 289         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 290         int err;
 291
 292         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 293                 return 0;
 294         smsr->values[slot].curr = value;
 295         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 296         if (err)
 297                 return 1;
 298
 299         if (!smsr->registered) {
 300                 smsr->urn.on_user_return = kvm_on_user_return;
 301                 user_return_notifier_register(&smsr->urn);
 302                 smsr->registered = true;
 303         }
 304         return 0;
 305 }
 306 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 307
 308 static void drop_user_return_notifiers(void)
 309 {
 310         unsigned int cpu = smp_processor_id();
 311         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 312
 313         if (smsr->registered)
 314                 kvm_on_user_return(&smsr->urn);
 315 }
 316
 317 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 318 {
 319         return vcpu->arch.apic_base;
 320 }
 321 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 322
 323 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 324 {
 325         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 326 }
 327 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 328
 329 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 330 {
 331         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 332         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 333         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |
 334                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 335
 336         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 337                 return 1;
 338         if (!msr_info->host_initiated) {
 339                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 340                         return 1;
 341                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 342                         return 1;
 343         }
 344
 345         kvm_lapic_set_base(vcpu, msr_info->data);
 346         return 0;
 347 }
 348 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 349
 350 asmlinkage __visible void kvm_spurious_fault(void)
 351 {
 352         /* Fault while not rebooting.  We want the trace. */
 353         BUG();
 354 }
 355 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 356
 357 #define EXCPT_BENIGN            0
 358 #define EXCPT_CONTRIBUTORY      1
 359 #define EXCPT_PF                2
 360
 361 static int exception_class(int vector)
 362 {
 363         switch (vector) {
 364         case PF_VECTOR:
 365                 return EXCPT_PF;
 366         case DE_VECTOR:
 367         case TS_VECTOR:
 368         case NP_VECTOR:
 369         case SS_VECTOR:
 370         case GP_VECTOR:
 371                 return EXCPT_CONTRIBUTORY;
 372         default:
 373                 break;
 374         }
 375         return EXCPT_BENIGN;
 376 }
 377
 378 #define EXCPT_FAULT             0
 379 #define EXCPT_TRAP              1
 380 #define EXCPT_ABORT             2
 381 #define EXCPT_INTERRUPT         3
 382
 383 static int exception_type(int vector)
 384 {
 385         unsigned int mask;
 386
 387         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 388                 return EXCPT_INTERRUPT;
 389
 390         mask = 1 << vector;
 391
 392         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 393         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 394                 return EXCPT_TRAP;
 395
 396         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 397                 return EXCPT_ABORT;
 398
 399         /* Reserved exceptions will result in fault */
 400         return EXCPT_FAULT;
 401 }
 402
 403 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 404 {
 405         unsigned nr = vcpu->arch.exception.nr;
 406         bool has_payload = vcpu->arch.exception.has_payload;
 407         unsigned long payload = vcpu->arch.exception.payload;
 408
 409         if (!has_payload)
 410                 return;
 411
 412         switch (nr) {
 413         case DB_VECTOR:
 414                 /*
 415                  * "Certain debug exceptions may clear bit 0-3.  The
 416                  * remaining contents of the DR6 register are never
 417                  * cleared by the processor".
 418                  */
 419                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 420                 /*
 421                  * DR6.RTM is set by all #DB exceptions that don't clear it.
 422                  */
 423                 vcpu->arch.dr6 |= DR6_RTM;
 424                 vcpu->arch.dr6 |= payload;
 425                 /*
 426                  * Bit 16 should be set in the payload whenever the #DB
 427                  * exception should clear DR6.RTM. This makes the payload
 428                  * compatible with the pending debug exceptions under VMX.
 429                  * Though not currently documented in the SDM, this also
 430                  * makes the payload compatible with the exit qualification
 431                  * for #DB exceptions under VMX.
 432                  */
 433                 vcpu->arch.dr6 ^= payload & DR6_RTM;
 434                 break;
 435         case PF_VECTOR:
 436                 vcpu->arch.cr2 = payload;
 437                 break;
 438         }
 439
 440         vcpu->arch.exception.has_payload = false;
 441         vcpu->arch.exception.payload = 0;
 442 }
 443 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 444
 445 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 446                 unsigned nr, bool has_error, u32 error_code,
 447                 bool has_payload, unsigned long payload, bool reinject)
 448 {
 449         u32 prev_nr;
 450         int class1, class2;
 451
 452         kvm_make_request(KVM_REQ_EVENT, vcpu);
 453
 454         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 455         queue:
 456                 if (has_error && !is_protmode(vcpu))
 457                         has_error = false;
 458                 if (reinject) {
 459                         /*
 460                          * On vmentry, vcpu->arch.exception.pending is only
 461                          * true if an event injection was blocked by
 462                          * nested_run_pending.  In that case, however,
 463                          * vcpu_enter_guest requests an immediate exit,
 464                          * and the guest shouldn't proceed far enough to
 465                          * need reinjection.
 466                          */
 467                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 468                         vcpu->arch.exception.injected = true;
 469                         if (WARN_ON_ONCE(has_payload)) {
 470                                 /*
 471                                  * A reinjected event has already
 472                                  * delivered its payload.
 473                                  */
 474                                 has_payload = false;
 475                                 payload = 0;
 476                         }
 477                 } else {
 478                         vcpu->arch.exception.pending = true;
 479                         vcpu->arch.exception.injected = false;
 480                 }
 481                 vcpu->arch.exception.has_error_code = has_error;
 482                 vcpu->arch.exception.nr = nr;
 483                 vcpu->arch.exception.error_code = error_code;
 484                 vcpu->arch.exception.has_payload = has_payload;
 485                 vcpu->arch.exception.payload = payload;
 486                 /*
 487                  * In guest mode, payload delivery should be deferred,
 488                  * so that the L1 hypervisor can intercept #PF before
 489                  * CR2 is modified (or intercept #DB before DR6 is
 490                  * modified under nVMX).  However, for ABI
 491                  * compatibility with KVM_GET_VCPU_EVENTS and
 492                  * KVM_SET_VCPU_EVENTS, we can't delay payload
 493                  * delivery unless userspace has enabled this
 494                  * functionality via the per-VM capability,
 495                  * KVM_CAP_EXCEPTION_PAYLOAD.
 496                  */
 497                 if (!vcpu->kvm->arch.exception_payload_enabled ||
 498                     !is_guest_mode(vcpu))
 499                         kvm_deliver_exception_payload(vcpu);
 500                 return;
 501         }
 502
 503         /* to check exception */
 504         prev_nr = vcpu->arch.exception.nr;
 505         if (prev_nr == DF_VECTOR) {
 506                 /* triple fault -> shutdown */
 507                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 508                 return;
 509         }
 510         class1 = exception_class(prev_nr);
 511         class2 = exception_class(nr);
 512         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 513                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 514                 /*
 515                  * Generate double fault per SDM Table 5-5.  Set
 516                  * exception.pending = true so that the double fault
 517                  * can trigger a nested vmexit.
 518                  */
 519                 vcpu->arch.exception.pending = true;
 520                 vcpu->arch.exception.injected = false;
 521                 vcpu->arch.exception.has_error_code = true;
 522                 vcpu->arch.exception.nr = DF_VECTOR;
 523                 vcpu->arch.exception.error_code = 0;
 524                 vcpu->arch.exception.has_payload = false;
 525                 vcpu->arch.exception.payload = 0;
 526         } else
 527                 /* replace previous exception with a new one in a hope
 528                    that instruction re-execution will regenerate lost
 529                    exception */
 530                 goto queue;
 531 }
 532
 533 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 534 {
 535         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 536 }
 537 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 538
 539 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 540 {
 541         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 542 }
 543 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 544
 545 static void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 546                                   unsigned long payload)
 547 {
 548         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 549 }
 550
 551 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 552                                     u32 error_code, unsigned long payload)
 553 {
 554         kvm_multiple_exception(vcpu, nr, true, error_code,
 555                                true, payload, false);
 556 }
 557
 558 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 559 {
 560         if (err)
 561                 kvm_inject_gp(vcpu, 0);
 562         else
 563                 return kvm_skip_emulated_instruction(vcpu);
 564
 565         return 1;
 566 }
 567 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 568
 569 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 570 {
 571         ++vcpu->stat.pf_guest;
 572         vcpu->arch.exception.nested_apf =
 573                 is_guest_mode(vcpu) && fault->async_page_fault;
 574         if (vcpu->arch.exception.nested_apf) {
 575                 vcpu->arch.apf.nested_apf_token = fault->address;
 576                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 577         } else {
 578                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 579                                         fault->address);
 580         }
 581 }
 582 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 583
 584 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 585 {
 586         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 587                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 588         else
 589                 vcpu->arch.mmu->inject_page_fault(vcpu, fault);
 590
 591         return fault->nested_page_fault;
 592 }
 593
 594 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 595 {
 596         atomic_inc(&vcpu->arch.nmi_queued);
 597         kvm_make_request(KVM_REQ_NMI, vcpu);
 598 }
 599 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 600
 601 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 602 {
 603         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 604 }
 605 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 606
 607 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 608 {
 609         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 610 }
 611 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 612
 613 /*
 614  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 615  * a #GP and return false.
 616  */
 617 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 618 {
 619         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 620                 return true;
 621         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 622         return false;
 623 }
 624 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 625
 626 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 627 {
 628         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 629                 return true;
 630
 631         kvm_queue_exception(vcpu, UD_VECTOR);
 632         return false;
 633 }
 634 EXPORT_SYMBOL_GPL(kvm_require_dr);
 635
 636 /*
 637  * This function will be used to read from the physical memory of the currently
 638  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 639  * can read from guest physical or from the guest's guest physical memory.
 640  */
 641 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 642                             gfn_t ngfn, void *data, int offset, int len,
 643                             u32 access)
 644 {
 645         struct x86_exception exception;
 646         gfn_t real_gfn;
 647         gpa_t ngpa;
 648
 649         ngpa     = gfn_to_gpa(ngfn);
 650         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 651         if (real_gfn == UNMAPPED_GVA)
 652                 return -EFAULT;
 653
 654         real_gfn = gpa_to_gfn(real_gfn);
 655
 656         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 657 }
 658 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 659
 660 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 661                                void *data, int offset, int len, u32 access)
 662 {
 663         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 664                                        data, offset, len, access);
 665 }
 666
 667 /*
 668  * Load the pae pdptrs.  Return true is they are all valid.
 669  */
 670 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 671 {
 672         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 673         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 674         int i;
 675         int ret;
 676         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 677
 678         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 679                                       offset * sizeof(u64), sizeof(pdpte),
 680                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 681         if (ret < 0) {
 682                 ret = 0;
 683                 goto out;
 684         }
 685         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 686                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 687                     (pdpte[i] &
 688                      vcpu->arch.mmu->guest_rsvd_check.rsvd_bits_mask[0][2])) {
 689                         ret = 0;
 690                         goto out;
 691                 }
 692         }
 693         ret = 1;
 694
 695         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 696         __set_bit(VCPU_EXREG_PDPTR,
 697                   (unsigned long *)&vcpu->arch.regs_avail);
 698         __set_bit(VCPU_EXREG_PDPTR,
 699                   (unsigned long *)&vcpu->arch.regs_dirty);
 700 out:
 701
 702         return ret;
 703 }
 704 EXPORT_SYMBOL_GPL(load_pdptrs);
 705
 706 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 707 {
 708         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 709         bool changed = true;
 710         int offset;
 711         gfn_t gfn;
 712         int r;
 713
 714         if (is_long_mode(vcpu) || !is_pae(vcpu) || !is_paging(vcpu))
 715                 return false;
 716
 717         if (!test_bit(VCPU_EXREG_PDPTR,
 718                       (unsigned long *)&vcpu->arch.regs_avail))
 719                 return true;
 720
 721         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 722         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 723         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 724                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 725         if (r < 0)
 726                 goto out;
 727         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 728 out:
 729
 730         return changed;
 731 }
 732 EXPORT_SYMBOL_GPL(pdptrs_changed);
 733
 734 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 735 {
 736         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 737         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 738
 739         cr0 |= X86_CR0_ET;
 740
 741 #ifdef CONFIG_X86_64
 742         if (cr0 & 0xffffffff00000000UL)
 743                 return 1;
 744 #endif
 745
 746         cr0 &= ~CR0_RESERVED_BITS;
 747
 748         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 749                 return 1;
 750
 751         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 752                 return 1;
 753
 754         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 755 #ifdef CONFIG_X86_64
 756                 if ((vcpu->arch.efer & EFER_LME)) {
 757                         int cs_db, cs_l;
 758
 759                         if (!is_pae(vcpu))
 760                                 return 1;
 761                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 762                         if (cs_l)
 763                                 return 1;
 764                 } else
 765 #endif
 766                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 767                                                  kvm_read_cr3(vcpu)))
 768                         return 1;
 769         }
 770
 771         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 772                 return 1;
 773
 774         kvm_x86_ops->set_cr0(vcpu, cr0);
 775
 776         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 777                 kvm_clear_async_pf_completion_queue(vcpu);
 778                 kvm_async_pf_hash_reset(vcpu);
 779         }
 780
 781         if ((cr0 ^ old_cr0) & update_bits)
 782                 kvm_mmu_reset_context(vcpu);
 783
 784         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 785             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 786             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 787                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 788
 789         return 0;
 790 }
 791 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 792
 793 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 794 {
 795         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 796 }
 797 EXPORT_SYMBOL_GPL(kvm_lmsw);
 798
 799 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 800 {
 801         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 802                         !vcpu->guest_xcr0_loaded) {
 803                 /* kvm_set_xcr() also depends on this */
 804                 if (vcpu->arch.xcr0 != host_xcr0)
 805                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 806                 vcpu->guest_xcr0_loaded = 1;
 807         }
 808 }
 809
 810 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 811 {
 812         if (vcpu->guest_xcr0_loaded) {
 813                 if (vcpu->arch.xcr0 != host_xcr0)
 814                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 815                 vcpu->guest_xcr0_loaded = 0;
 816         }
 817 }
 818
 819 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 820 {
 821         u64 xcr0 = xcr;
 822         u64 old_xcr0 = vcpu->arch.xcr0;
 823         u64 valid_bits;
 824
 825         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 826         if (index != XCR_XFEATURE_ENABLED_MASK)
 827                 return 1;
 828         if (!(xcr0 & XFEATURE_MASK_FP))
 829                 return 1;
 830         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 831                 return 1;
 832
 833         /*
 834          * Do not allow the guest to set bits that we do not support
 835          * saving.  However, xcr0 bit 0 is always set, even if the
 836          * emulated CPU does not support XSAVE (see fx_init).
 837          */
 838         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 839         if (xcr0 & ~valid_bits)
 840                 return 1;
 841
 842         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 843             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 844                 return 1;
 845
 846         if (xcr0 & XFEATURE_MASK_AVX512) {
 847                 if (!(xcr0 & XFEATURE_MASK_YMM))
 848                         return 1;
 849                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 850                         return 1;
 851         }
 852         vcpu->arch.xcr0 = xcr0;
 853
 854         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 855                 kvm_update_cpuid(vcpu);
 856         return 0;
 857 }
 858
 859 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 860 {
 861         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 862             __kvm_set_xcr(vcpu, index, xcr)) {
 863                 kvm_inject_gp(vcpu, 0);
 864                 return 1;
 865         }
 866         return 0;
 867 }
 868 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 869
 870 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 871 {
 872         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 873         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 874                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 875
 876         if (cr4 & CR4_RESERVED_BITS)
 877                 return 1;
 878
 879         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) && (cr4 & X86_CR4_OSXSAVE))
 880                 return 1;
 881
 882         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMEP) && (cr4 & X86_CR4_SMEP))
 883                 return 1;
 884
 885         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMAP) && (cr4 & X86_CR4_SMAP))
 886                 return 1;
 887
 888         if (!guest_cpuid_has(vcpu, X86_FEATURE_FSGSBASE) && (cr4 & X86_CR4_FSGSBASE))
 889                 return 1;
 890
 891         if (!guest_cpuid_has(vcpu, X86_FEATURE_PKU) && (cr4 & X86_CR4_PKE))
 892                 return 1;
 893
 894         if (!guest_cpuid_has(vcpu, X86_FEATURE_LA57) && (cr4 & X86_CR4_LA57))
 895                 return 1;
 896
 897         if (!guest_cpuid_has(vcpu, X86_FEATURE_UMIP) && (cr4 & X86_CR4_UMIP))
 898                 return 1;
 899
 900         if (is_long_mode(vcpu)) {
 901                 if (!(cr4 & X86_CR4_PAE))
 902                         return 1;
 903         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 904                    && ((cr4 ^ old_cr4) & pdptr_bits)
 905                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 906                                    kvm_read_cr3(vcpu)))
 907                 return 1;
 908
 909         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 910                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
 911                         return 1;
 912
 913                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 914                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 915                         return 1;
 916         }
 917
 918         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 919                 return 1;
 920
 921         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 922             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 923                 kvm_mmu_reset_context(vcpu);
 924
 925         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 926                 kvm_update_cpuid(vcpu);
 927
 928         return 0;
 929 }
 930 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 931
 932 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 933 {
 934         bool skip_tlb_flush = false;
 935 #ifdef CONFIG_X86_64
 936         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
 937
 938         if (pcid_enabled) {
 939                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
 940                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
 941         }
 942 #endif
 943
 944         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 945                 if (!skip_tlb_flush) {
 946                         kvm_mmu_sync_roots(vcpu);
 947                         kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 948                 }
 949                 return 0;
 950         }
 951
 952         if (is_long_mode(vcpu) &&
 953             (cr3 & rsvd_bits(cpuid_maxphyaddr(vcpu), 63)))
 954                 return 1;
 955         else if (is_pae(vcpu) && is_paging(vcpu) &&
 956                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 957                 return 1;
 958
 959         kvm_mmu_new_cr3(vcpu, cr3, skip_tlb_flush);
 960         vcpu->arch.cr3 = cr3;
 961         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 962
 963         return 0;
 964 }
 965 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 966
 967 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 968 {
 969         if (cr8 & CR8_RESERVED_BITS)
 970                 return 1;
 971         if (lapic_in_kernel(vcpu))
 972                 kvm_lapic_set_tpr(vcpu, cr8);
 973         else
 974                 vcpu->arch.cr8 = cr8;
 975         return 0;
 976 }
 977 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 978
 979 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 980 {
 981         if (lapic_in_kernel(vcpu))
 982                 return kvm_lapic_get_cr8(vcpu);
 983         else
 984                 return vcpu->arch.cr8;
 985 }
 986 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 987
 988 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 989 {
 990         int i;
 991
 992         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 993                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 994                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 995                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 996         }
 997 }
 998
 999 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
1000 {
1001         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1002                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
1003 }
1004
1005 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
1006 {
1007         unsigned long dr7;
1008
1009         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1010                 dr7 = vcpu->arch.guest_debug_dr7;
1011         else
1012                 dr7 = vcpu->arch.dr7;
1013         kvm_x86_ops->set_dr7(vcpu, dr7);
1014         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1015         if (dr7 & DR7_BP_EN_MASK)
1016                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1017 }
1018
1019 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1020 {
1021         u64 fixed = DR6_FIXED_1;
1022
1023         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1024                 fixed |= DR6_RTM;
1025         return fixed;
1026 }
1027
1028 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1029 {
1030         switch (dr) {
1031         case 0 ... 3:
1032                 vcpu->arch.db[dr] = val;
1033                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1034                         vcpu->arch.eff_db[dr] = val;
1035                 break;
1036         case 4:
1037                 /* fall through */
1038         case 6:
1039                 if (val & 0xffffffff00000000ULL)
1040                         return -1; /* #GP */
1041                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1042                 kvm_update_dr6(vcpu);
1043                 break;
1044         case 5:
1045                 /* fall through */
1046         default: /* 7 */
1047                 if (val & 0xffffffff00000000ULL)
1048                         return -1; /* #GP */
1049                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1050                 kvm_update_dr7(vcpu);
1051                 break;
1052         }
1053
1054         return 0;
1055 }
1056
1057 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1058 {
1059         if (__kvm_set_dr(vcpu, dr, val)) {
1060                 kvm_inject_gp(vcpu, 0);
1061                 return 1;
1062         }
1063         return 0;
1064 }
1065 EXPORT_SYMBOL_GPL(kvm_set_dr);
1066
1067 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1068 {
1069         switch (dr) {
1070         case 0 ... 3:
1071                 *val = vcpu->arch.db[dr];
1072                 break;
1073         case 4:
1074                 /* fall through */
1075         case 6:
1076                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1077                         *val = vcpu->arch.dr6;
1078                 else
1079                         *val = kvm_x86_ops->get_dr6(vcpu);
1080                 break;
1081         case 5:
1082                 /* fall through */
1083         default: /* 7 */
1084                 *val = vcpu->arch.dr7;
1085                 break;
1086         }
1087         return 0;
1088 }
1089 EXPORT_SYMBOL_GPL(kvm_get_dr);
1090
1091 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
1092 {
1093         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
1094         u64 data;
1095         int err;
1096
1097         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
1098         if (err)
1099                 return err;
1100         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
1101         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
1102         return err;
1103 }
1104 EXPORT_SYMBOL_GPL(kvm_rdpmc);
1105
1106 /*
1107  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1108  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1109  *
1110  * This list is modified at module load time to reflect the
1111  * capabilities of the host cpu. This capabilities test skips MSRs that are
1112  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
1113  * may depend on host virtualization features rather than host cpu features.
1114  */
1115
1116 static u32 msrs_to_save[] = {
1117         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1118         MSR_STAR,
1119 #ifdef CONFIG_X86_64
1120         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1121 #endif
1122         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1123         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1124         MSR_IA32_SPEC_CTRL, MSR_IA32_ARCH_CAPABILITIES
1125 };
1126
1127 static unsigned num_msrs_to_save;
1128
1129 static u32 emulated_msrs[] = {
1130         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1131         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1132         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1133         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1134         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1135         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1136         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1137         HV_X64_MSR_RESET,
1138         HV_X64_MSR_VP_INDEX,
1139         HV_X64_MSR_VP_RUNTIME,
1140         HV_X64_MSR_SCONTROL,
1141         HV_X64_MSR_STIMER0_CONFIG,
1142         HV_X64_MSR_VP_ASSIST_PAGE,
1143         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1144         HV_X64_MSR_TSC_EMULATION_STATUS,
1145
1146         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1147         MSR_KVM_PV_EOI_EN,
1148
1149         MSR_IA32_TSC_ADJUST,
1150         MSR_IA32_TSCDEADLINE,
1151         MSR_IA32_MISC_ENABLE,
1152         MSR_IA32_MCG_STATUS,
1153         MSR_IA32_MCG_CTL,
1154         MSR_IA32_MCG_EXT_CTL,
1155         MSR_IA32_SMBASE,
1156         MSR_SMI_COUNT,
1157         MSR_PLATFORM_INFO,
1158         MSR_MISC_FEATURES_ENABLES,
1159         MSR_AMD64_VIRT_SPEC_CTRL,
1160 };
1161
1162 static unsigned num_emulated_msrs;
1163
1164 /*
1165  * List of msr numbers which are used to expose MSR-based features that
1166  * can be used by a hypervisor to validate requested CPU features.
1167  */
1168 static u32 msr_based_features[] = {
1169         MSR_IA32_VMX_BASIC,
1170         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1171         MSR_IA32_VMX_PINBASED_CTLS,
1172         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1173         MSR_IA32_VMX_PROCBASED_CTLS,
1174         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1175         MSR_IA32_VMX_EXIT_CTLS,
1176         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1177         MSR_IA32_VMX_ENTRY_CTLS,
1178         MSR_IA32_VMX_MISC,
1179         MSR_IA32_VMX_CR0_FIXED0,
1180         MSR_IA32_VMX_CR0_FIXED1,
1181         MSR_IA32_VMX_CR4_FIXED0,
1182         MSR_IA32_VMX_CR4_FIXED1,
1183         MSR_IA32_VMX_VMCS_ENUM,
1184         MSR_IA32_VMX_PROCBASED_CTLS2,
1185         MSR_IA32_VMX_EPT_VPID_CAP,
1186         MSR_IA32_VMX_VMFUNC,
1187
1188         MSR_F10H_DECFG,
1189         MSR_IA32_UCODE_REV,
1190         MSR_IA32_ARCH_CAPABILITIES,
1191 };
1192
1193 static unsigned int num_msr_based_features;
1194
1195 u64 kvm_get_arch_capabilities(void)
1196 {
1197         u64 data;
1198
1199         rdmsrl_safe(MSR_IA32_ARCH_CAPABILITIES, &data);
1200
1201         /*
1202          * If we're doing cache flushes (either "always" or "cond")
1203          * we will do one whenever the guest does a vmlaunch/vmresume.
1204          * If an outer hypervisor is doing the cache flush for us
1205          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1206          * capability to the guest too, and if EPT is disabled we're not
1207          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1208          * require a nested hypervisor to do a flush of its own.
1209          */
1210         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1211                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1212
1213         return data;
1214 }
1215 EXPORT_SYMBOL_GPL(kvm_get_arch_capabilities);
1216
1217 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1218 {
1219         switch (msr->index) {
1220         case MSR_IA32_ARCH_CAPABILITIES:
1221                 msr->data = kvm_get_arch_capabilities();
1222                 break;
1223         case MSR_IA32_UCODE_REV:
1224                 rdmsrl_safe(msr->index, &msr->data);
1225                 break;
1226         default:
1227                 if (kvm_x86_ops->get_msr_feature(msr))
1228                         return 1;
1229         }
1230         return 0;
1231 }
1232
1233 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1234 {
1235         struct kvm_msr_entry msr;
1236         int r;
1237
1238         msr.index = index;
1239         r = kvm_get_msr_feature(&msr);
1240         if (r)
1241                 return r;
1242
1243         *data = msr.data;
1244
1245         return 0;
1246 }
1247
1248 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1249 {
1250         if (efer & efer_reserved_bits)
1251                 return false;
1252
1253         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1254                         return false;
1255
1256         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1257                         return false;
1258
1259         return true;
1260 }
1261 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1262
1263 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1264 {
1265         u64 old_efer = vcpu->arch.efer;
1266
1267         if (!kvm_valid_efer(vcpu, efer))
1268                 return 1;
1269
1270         if (is_paging(vcpu)
1271             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1272                 return 1;
1273
1274         efer &= ~EFER_LMA;
1275         efer |= vcpu->arch.efer & EFER_LMA;
1276
1277         kvm_x86_ops->set_efer(vcpu, efer);
1278
1279         /* Update reserved bits */
1280         if ((efer ^ old_efer) & EFER_NX)
1281                 kvm_mmu_reset_context(vcpu);
1282
1283         return 0;
1284 }
1285
1286 void kvm_enable_efer_bits(u64 mask)
1287 {
1288        efer_reserved_bits &= ~mask;
1289 }
1290 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1291
1292 /*
1293  * Writes msr value into into the appropriate "register".
1294  * Returns 0 on success, non-0 otherwise.
1295  * Assumes vcpu_load() was already called.
1296  */
1297 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1298 {
1299         switch (msr->index) {
1300         case MSR_FS_BASE:
1301         case MSR_GS_BASE:
1302         case MSR_KERNEL_GS_BASE:
1303         case MSR_CSTAR:
1304         case MSR_LSTAR:
1305                 if (is_noncanonical_address(msr->data, vcpu))
1306                         return 1;
1307                 break;
1308         case MSR_IA32_SYSENTER_EIP:
1309         case MSR_IA32_SYSENTER_ESP:
1310                 /*
1311                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1312                  * non-canonical address is written on Intel but not on
1313                  * AMD (which ignores the top 32-bits, because it does
1314                  * not implement 64-bit SYSENTER).
1315                  *
1316                  * 64-bit code should hence be able to write a non-canonical
1317                  * value on AMD.  Making the address canonical ensures that
1318                  * vmentry does not fail on Intel after writing a non-canonical
1319                  * value, and that something deterministic happens if the guest
1320                  * invokes 64-bit SYSENTER.
1321                  */
1322                 msr->data = get_canonical(msr->data, vcpu_virt_addr_bits(vcpu));
1323         }
1324         return kvm_x86_ops->set_msr(vcpu, msr);
1325 }
1326 EXPORT_SYMBOL_GPL(kvm_set_msr);
1327
1328 /*
1329  * Adapt set_msr() to msr_io()'s calling convention
1330  */
1331 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1332 {
1333         struct msr_data msr;
1334         int r;
1335
1336         msr.index = index;
1337         msr.host_initiated = true;
1338         r = kvm_get_msr(vcpu, &msr);
1339         if (r)
1340                 return r;
1341
1342         *data = msr.data;
1343         return 0;
1344 }
1345
1346 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1347 {
1348         struct msr_data msr;
1349
1350         msr.data = *data;
1351         msr.index = index;
1352         msr.host_initiated = true;
1353         return kvm_set_msr(vcpu, &msr);
1354 }
1355
1356 #ifdef CONFIG_X86_64
1357 struct pvclock_gtod_data {
1358         seqcount_t      seq;
1359
1360         struct { /* extract of a clocksource struct */
1361                 int vclock_mode;
1362                 u64     cycle_last;
1363                 u64     mask;
1364                 u32     mult;
1365                 u32     shift;
1366         } clock;
1367
1368         u64             boot_ns;
1369         u64             nsec_base;
1370         u64             wall_time_sec;
1371 };
1372
1373 static struct pvclock_gtod_data pvclock_gtod_data;
1374
1375 static void update_pvclock_gtod(struct timekeeper *tk)
1376 {
1377         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1378         u64 boot_ns;
1379
1380         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1381
1382         write_seqcount_begin(&vdata->seq);
1383
1384         /* copy pvclock gtod data */
1385         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1386         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1387         vdata->clock.mask               = tk->tkr_mono.mask;
1388         vdata->clock.mult               = tk->tkr_mono.mult;
1389         vdata->clock.shift              = tk->tkr_mono.shift;
1390
1391         vdata->boot_ns                  = boot_ns;
1392         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1393
1394         vdata->wall_time_sec            = tk->xtime_sec;
1395
1396         write_seqcount_end(&vdata->seq);
1397 }
1398 #endif
1399
1400 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1401 {
1402         /*
1403          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1404          * vcpu_enter_guest.  This function is only called from
1405          * the physical CPU that is running vcpu.
1406          */
1407         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1408 }
1409
1410 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1411 {
1412         int version;
1413         int r;
1414         struct pvclock_wall_clock wc;
1415         struct timespec64 boot;
1416
1417         if (!wall_clock)
1418                 return;
1419
1420         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1421         if (r)
1422                 return;
1423
1424         if (version & 1)
1425                 ++version;  /* first time write, random junk */
1426
1427         ++version;
1428
1429         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1430                 return;
1431
1432         /*
1433          * The guest calculates current wall clock time by adding
1434          * system time (updated by kvm_guest_time_update below) to the
1435          * wall clock specified here.  guest system time equals host
1436          * system time for us, thus we must fill in host boot time here.
1437          */
1438         getboottime64(&boot);
1439
1440         if (kvm->arch.kvmclock_offset) {
1441                 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1442                 boot = timespec64_sub(boot, ts);
1443         }
1444         wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1445         wc.nsec = boot.tv_nsec;
1446         wc.version = version;
1447
1448         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1449
1450         version++;
1451         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1452 }
1453
1454 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1455 {
1456         do_shl32_div32(dividend, divisor);
1457         return dividend;
1458 }
1459
1460 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1461                                s8 *pshift, u32 *pmultiplier)
1462 {
1463         uint64_t scaled64;
1464         int32_t  shift = 0;
1465         uint64_t tps64;
1466         uint32_t tps32;
1467
1468         tps64 = base_hz;
1469         scaled64 = scaled_hz;
1470         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1471                 tps64 >>= 1;
1472                 shift--;
1473         }
1474
1475         tps32 = (uint32_t)tps64;
1476         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1477                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1478                         scaled64 >>= 1;
1479                 else
1480                         tps32 <<= 1;
1481                 shift++;
1482         }
1483
1484         *pshift = shift;
1485         *pmultiplier = div_frac(scaled64, tps32);
1486
1487         pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1488                  __func__, base_hz, scaled_hz, shift, *pmultiplier);
1489 }
1490
1491 #ifdef CONFIG_X86_64
1492 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1493 #endif
1494
1495 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1496 static unsigned long max_tsc_khz;
1497
1498 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1499 {
1500         u64 v = (u64)khz * (1000000 + ppm);
1501         do_div(v, 1000000);
1502         return v;
1503 }
1504
1505 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1506 {
1507         u64 ratio;
1508
1509         /* Guest TSC same frequency as host TSC? */
1510         if (!scale) {
1511                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1512                 return 0;
1513         }
1514
1515         /* TSC scaling supported? */
1516         if (!kvm_has_tsc_control) {
1517                 if (user_tsc_khz > tsc_khz) {
1518                         vcpu->arch.tsc_catchup = 1;
1519                         vcpu->arch.tsc_always_catchup = 1;
1520                         return 0;
1521                 } else {
1522                         WARN(1, "user requested TSC rate below hardware speed\n");
1523                         return -1;
1524                 }
1525         }
1526
1527         /* TSC scaling required  - calculate ratio */
1528         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1529                                 user_tsc_khz, tsc_khz);
1530
1531         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1532                 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1533                           user_tsc_khz);
1534                 return -1;
1535         }
1536
1537         vcpu->arch.tsc_scaling_ratio = ratio;
1538         return 0;
1539 }
1540
1541 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1542 {
1543         u32 thresh_lo, thresh_hi;
1544         int use_scaling = 0;
1545
1546         /* tsc_khz can be zero if TSC calibration fails */
1547         if (user_tsc_khz == 0) {
1548                 /* set tsc_scaling_ratio to a safe value */
1549                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1550                 return -1;
1551         }
1552
1553         /* Compute a scale to convert nanoseconds in TSC cycles */
1554         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1555                            &vcpu->arch.virtual_tsc_shift,
1556                            &vcpu->arch.virtual_tsc_mult);
1557         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1558
1559         /*
1560          * Compute the variation in TSC rate which is acceptable
1561          * within the range of tolerance and decide if the
1562          * rate being applied is within that bounds of the hardware
1563          * rate.  If so, no scaling or compensation need be done.
1564          */
1565         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1566         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1567         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1568                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1569                 use_scaling = 1;
1570         }
1571         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1572 }
1573
1574 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1575 {
1576         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1577                                       vcpu->arch.virtual_tsc_mult,
1578                                       vcpu->arch.virtual_tsc_shift);
1579         tsc += vcpu->arch.this_tsc_write;
1580         return tsc;
1581 }
1582
1583 static inline int gtod_is_based_on_tsc(int mode)
1584 {
1585         return mode == VCLOCK_TSC || mode == VCLOCK_HVCLOCK;
1586 }
1587
1588 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1589 {
1590 #ifdef CONFIG_X86_64
1591         bool vcpus_matched;
1592         struct kvm_arch *ka = &vcpu->kvm->arch;
1593         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1594
1595         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1596                          atomic_read(&vcpu->kvm->online_vcpus));
1597
1598         /*
1599          * Once the masterclock is enabled, always perform request in
1600          * order to update it.
1601          *
1602          * In order to enable masterclock, the host clocksource must be TSC
1603          * and the vcpus need to have matched TSCs.  When that happens,
1604          * perform request to enable masterclock.
1605          */
1606         if (ka->use_master_clock ||
1607             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
1608                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1609
1610         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1611                             atomic_read(&vcpu->kvm->online_vcpus),
1612                             ka->use_master_clock, gtod->clock.vclock_mode);
1613 #endif
1614 }
1615
1616 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1617 {
1618         u64 curr_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1619         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1620 }
1621
1622 /*
1623  * Multiply tsc by a fixed point number represented by ratio.
1624  *
1625  * The most significant 64-N bits (mult) of ratio represent the
1626  * integral part of the fixed point number; the remaining N bits
1627  * (frac) represent the fractional part, ie. ratio represents a fixed
1628  * point number (mult + frac * 2^(-N)).
1629  *
1630  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1631  */
1632 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1633 {
1634         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1635 }
1636
1637 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1638 {
1639         u64 _tsc = tsc;
1640         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1641
1642         if (ratio != kvm_default_tsc_scaling_ratio)
1643                 _tsc = __scale_tsc(ratio, tsc);
1644
1645         return _tsc;
1646 }
1647 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1648
1649 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1650 {
1651         u64 tsc;
1652
1653         tsc = kvm_scale_tsc(vcpu, rdtsc());
1654
1655         return target_tsc - tsc;
1656 }
1657
1658 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1659 {
1660         u64 tsc_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1661
1662         return tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
1663 }
1664 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1665
1666 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
1667 {
1668         vcpu->arch.tsc_offset = kvm_x86_ops->write_l1_tsc_offset(vcpu, offset);
1669 }
1670
1671 static inline bool kvm_check_tsc_unstable(void)
1672 {
1673 #ifdef CONFIG_X86_64
1674         /*
1675          * TSC is marked unstable when we're running on Hyper-V,
1676          * 'TSC page' clocksource is good.
1677          */
1678         if (pvclock_gtod_data.clock.vclock_mode == VCLOCK_HVCLOCK)
1679                 return false;
1680 #endif
1681         return check_tsc_unstable();
1682 }
1683
1684 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1685 {
1686         struct kvm *kvm = vcpu->kvm;
1687         u64 offset, ns, elapsed;
1688         unsigned long flags;
1689         bool matched;
1690         bool already_matched;
1691         u64 data = msr->data;
1692         bool synchronizing = false;
1693
1694         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1695         offset = kvm_compute_tsc_offset(vcpu, data);
1696         ns = ktime_get_boot_ns();
1697         elapsed = ns - kvm->arch.last_tsc_nsec;
1698
1699         if (vcpu->arch.virtual_tsc_khz) {
1700                 if (data == 0 && msr->host_initiated) {
1701                         /*
1702                          * detection of vcpu initialization -- need to sync
1703                          * with other vCPUs. This particularly helps to keep
1704                          * kvm_clock stable after CPU hotplug
1705                          */
1706                         synchronizing = true;
1707                 } else {
1708                         u64 tsc_exp = kvm->arch.last_tsc_write +
1709                                                 nsec_to_cycles(vcpu, elapsed);
1710                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
1711                         /*
1712                          * Special case: TSC write with a small delta (1 second)
1713                          * of virtual cycle time against real time is
1714                          * interpreted as an attempt to synchronize the CPU.
1715                          */
1716                         synchronizing = data < tsc_exp + tsc_hz &&
1717                                         data + tsc_hz > tsc_exp;
1718                 }
1719         }
1720
1721         /*
1722          * For a reliable TSC, we can match TSC offsets, and for an unstable
1723          * TSC, we add elapsed time in this computation.  We could let the
1724          * compensation code attempt to catch up if we fall behind, but
1725          * it's better to try to match offsets from the beginning.
1726          */
1727         if (synchronizing &&
1728             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1729                 if (!kvm_check_tsc_unstable()) {
1730                         offset = kvm->arch.cur_tsc_offset;
1731                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1732                 } else {
1733                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1734                         data += delta;
1735                         offset = kvm_compute_tsc_offset(vcpu, data);
1736                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1737                 }
1738                 matched = true;
1739                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1740         } else {
1741                 /*
1742                  * We split periods of matched TSC writes into generations.
1743                  * For each generation, we track the original measured
1744                  * nanosecond time, offset, and write, so if TSCs are in
1745                  * sync, we can match exact offset, and if not, we can match
1746                  * exact software computation in compute_guest_tsc()
1747                  *
1748                  * These values are tracked in kvm->arch.cur_xxx variables.
1749                  */
1750                 kvm->arch.cur_tsc_generation++;
1751                 kvm->arch.cur_tsc_nsec = ns;
1752                 kvm->arch.cur_tsc_write = data;
1753                 kvm->arch.cur_tsc_offset = offset;
1754                 matched = false;
1755                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1756                          kvm->arch.cur_tsc_generation, data);
1757         }
1758
1759         /*
1760          * We also track th most recent recorded KHZ, write and time to
1761          * allow the matching interval to be extended at each write.
1762          */
1763         kvm->arch.last_tsc_nsec = ns;
1764         kvm->arch.last_tsc_write = data;
1765         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1766
1767         vcpu->arch.last_guest_tsc = data;
1768
1769         /* Keep track of which generation this VCPU has synchronized to */
1770         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1771         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1772         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1773
1774         if (!msr->host_initiated && guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST))
1775                 update_ia32_tsc_adjust_msr(vcpu, offset);
1776
1777         kvm_vcpu_write_tsc_offset(vcpu, offset);
1778         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1779
1780         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1781         if (!matched) {
1782                 kvm->arch.nr_vcpus_matched_tsc = 0;
1783         } else if (!already_matched) {
1784                 kvm->arch.nr_vcpus_matched_tsc++;
1785         }
1786
1787         kvm_track_tsc_matching(vcpu);
1788         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1789 }
1790
1791 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1792
1793 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1794                                            s64 adjustment)
1795 {
1796         u64 tsc_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1797         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
1798 }
1799
1800 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1801 {
1802         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1803                 WARN_ON(adjustment < 0);
1804         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1805         adjust_tsc_offset_guest(vcpu, adjustment);
1806 }
1807
1808 #ifdef CONFIG_X86_64
1809
1810 static u64 read_tsc(void)
1811 {
1812         u64 ret = (u64)rdtsc_ordered();
1813         u64 last = pvclock_gtod_data.clock.cycle_last;
1814
1815         if (likely(ret >= last))
1816                 return ret;
1817
1818         /*
1819          * GCC likes to generate cmov here, but this branch is extremely
1820          * predictable (it's just a function of time and the likely is
1821          * very likely) and there's a data dependence, so force GCC
1822          * to generate a branch instead.  I don't barrier() because
1823          * we don't actually need a barrier, and if this function
1824          * ever gets inlined it will generate worse code.
1825          */
1826         asm volatile ("");
1827         return last;
1828 }
1829
1830 static inline u64 vgettsc(u64 *tsc_timestamp, int *mode)
1831 {
1832         long v;
1833         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1834         u64 tsc_pg_val;
1835
1836         switch (gtod->clock.vclock_mode) {
1837         case VCLOCK_HVCLOCK:
1838                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
1839                                                   tsc_timestamp);
1840                 if (tsc_pg_val != U64_MAX) {
1841                         /* TSC page valid */
1842                         *mode = VCLOCK_HVCLOCK;
1843                         v = (tsc_pg_val - gtod->clock.cycle_last) &
1844                                 gtod->clock.mask;
1845                 } else {
1846                         /* TSC page invalid */
1847                         *mode = VCLOCK_NONE;
1848                 }
1849                 break;
1850         case VCLOCK_TSC:
1851                 *mode = VCLOCK_TSC;
1852                 *tsc_timestamp = read_tsc();
1853                 v = (*tsc_timestamp - gtod->clock.cycle_last) &
1854                         gtod->clock.mask;
1855                 break;
1856         default:
1857                 *mode = VCLOCK_NONE;
1858         }
1859
1860         if (*mode == VCLOCK_NONE)
1861                 *tsc_timestamp = v = 0;
1862
1863         return v * gtod->clock.mult;
1864 }
1865
1866 static int do_monotonic_boot(s64 *t, u64 *tsc_timestamp)
1867 {
1868         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1869         unsigned long seq;
1870         int mode;
1871         u64 ns;
1872
1873         do {
1874                 seq = read_seqcount_begin(&gtod->seq);
1875                 ns = gtod->nsec_base;
1876                 ns += vgettsc(tsc_timestamp, &mode);
1877                 ns >>= gtod->clock.shift;
1878                 ns += gtod->boot_ns;
1879         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1880         *t = ns;
1881
1882         return mode;
1883 }
1884
1885 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
1886 {
1887         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1888         unsigned long seq;
1889         int mode;
1890         u64 ns;
1891
1892         do {
1893                 seq = read_seqcount_begin(&gtod->seq);
1894                 ts->tv_sec = gtod->wall_time_sec;
1895                 ns = gtod->nsec_base;
1896                 ns += vgettsc(tsc_timestamp, &mode);
1897                 ns >>= gtod->clock.shift;
1898         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1899
1900         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
1901         ts->tv_nsec = ns;
1902
1903         return mode;
1904 }
1905
1906 /* returns true if host is using TSC based clocksource */
1907 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
1908 {
1909         /* checked again under seqlock below */
1910         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
1911                 return false;
1912
1913         return gtod_is_based_on_tsc(do_monotonic_boot(kernel_ns,
1914                                                       tsc_timestamp));
1915 }
1916
1917 /* returns true if host is using TSC based clocksource */
1918 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
1919                                            u64 *tsc_timestamp)
1920 {
1921         /* checked again under seqlock below */
1922         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
1923                 return false;
1924
1925         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
1926 }
1927 #endif
1928
1929 /*
1930  *
1931  * Assuming a stable TSC across physical CPUS, and a stable TSC
1932  * across virtual CPUs, the following condition is possible.
1933  * Each numbered line represents an event visible to both
1934  * CPUs at the next numbered event.
1935  *
1936  * "timespecX" represents host monotonic time. "tscX" represents
1937  * RDTSC value.
1938  *
1939  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1940  *
1941  * 1.  read timespec0,tsc0
1942  * 2.                                   | timespec1 = timespec0 + N
1943  *                                      | tsc1 = tsc0 + M
1944  * 3. transition to guest               | transition to guest
1945  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1946  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1947  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1948  *
1949  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1950  *
1951  *      - ret0 < ret1
1952  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1953  *              ...
1954  *      - 0 < N - M => M < N
1955  *
1956  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1957  * always the case (the difference between two distinct xtime instances
1958  * might be smaller then the difference between corresponding TSC reads,
1959  * when updating guest vcpus pvclock areas).
1960  *
1961  * To avoid that problem, do not allow visibility of distinct
1962  * system_timestamp/tsc_timestamp values simultaneously: use a master
1963  * copy of host monotonic time values. Update that master copy
1964  * in lockstep.
1965  *
1966  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1967  *
1968  */
1969
1970 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1971 {
1972 #ifdef CONFIG_X86_64
1973         struct kvm_arch *ka = &kvm->arch;
1974         int vclock_mode;
1975         bool host_tsc_clocksource, vcpus_matched;
1976
1977         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1978                         atomic_read(&kvm->online_vcpus));
1979
1980         /*
1981          * If the host uses TSC clock, then passthrough TSC as stable
1982          * to the guest.
1983          */
1984         host_tsc_clocksource = kvm_get_time_and_clockread(
1985                                         &ka->master_kernel_ns,
1986                                         &ka->master_cycle_now);
1987
1988         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1989                                 && !ka->backwards_tsc_observed
1990                                 && !ka->boot_vcpu_runs_old_kvmclock;
1991
1992         if (ka->use_master_clock)
1993                 atomic_set(&kvm_guest_has_master_clock, 1);
1994
1995         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1996         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1997                                         vcpus_matched);
1998 #endif
1999 }
2000
2001 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2002 {
2003         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2004 }
2005
2006 static void kvm_gen_update_masterclock(struct kvm *kvm)
2007 {
2008 #ifdef CONFIG_X86_64
2009         int i;
2010         struct kvm_vcpu *vcpu;
2011         struct kvm_arch *ka = &kvm->arch;
2012
2013         spin_lock(&ka->pvclock_gtod_sync_lock);
2014         kvm_make_mclock_inprogress_request(kvm);
2015         /* no guest entries from this point */
2016         pvclock_update_vm_gtod_copy(kvm);
2017
2018         kvm_for_each_vcpu(i, vcpu, kvm)
2019                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2020
2021         /* guest entries allowed */
2022         kvm_for_each_vcpu(i, vcpu, kvm)
2023                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2024
2025         spin_unlock(&ka->pvclock_gtod_sync_lock);
2026 #endif
2027 }
2028
2029 u64 get_kvmclock_ns(struct kvm *kvm)
2030 {
2031         struct kvm_arch *ka = &kvm->arch;
2032         struct pvclock_vcpu_time_info hv_clock;
2033         u64 ret;
2034
2035         spin_lock(&ka->pvclock_gtod_sync_lock);
2036         if (!ka->use_master_clock) {
2037                 spin_unlock(&ka->pvclock_gtod_sync_lock);
2038                 return ktime_get_boot_ns() + ka->kvmclock_offset;
2039         }
2040
2041         hv_clock.tsc_timestamp = ka->master_cycle_now;
2042         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2043         spin_unlock(&ka->pvclock_gtod_sync_lock);
2044
2045         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2046         get_cpu();
2047
2048         if (__this_cpu_read(cpu_tsc_khz)) {
2049                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2050                                    &hv_clock.tsc_shift,
2051                                    &hv_clock.tsc_to_system_mul);
2052                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2053         } else
2054                 ret = ktime_get_boot_ns() + ka->kvmclock_offset;
2055
2056         put_cpu();
2057
2058         return ret;
2059 }
2060
2061 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
2062 {
2063         struct kvm_vcpu_arch *vcpu = &v->arch;
2064         struct pvclock_vcpu_time_info guest_hv_clock;
2065
2066         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
2067                 &guest_hv_clock, sizeof(guest_hv_clock))))
2068                 return;
2069
2070         /* This VCPU is paused, but it's legal for a guest to read another
2071          * VCPU's kvmclock, so we really have to follow the specification where
2072          * it says that version is odd if data is being modified, and even after
2073          * it is consistent.
2074          *
2075          * Version field updates must be kept separate.  This is because
2076          * kvm_write_guest_cached might use a "rep movs" instruction, and
2077          * writes within a string instruction are weakly ordered.  So there
2078          * are three writes overall.
2079          *
2080          * As a small optimization, only write the version field in the first
2081          * and third write.  The vcpu->pv_time cache is still valid, because the
2082          * version field is the first in the struct.
2083          */
2084         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2085
2086         if (guest_hv_clock.version & 1)
2087                 ++guest_hv_clock.version;  /* first time write, random junk */
2088
2089         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2090         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2091                                 &vcpu->hv_clock,
2092                                 sizeof(vcpu->hv_clock.version));
2093
2094         smp_wmb();
2095
2096         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2097         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2098
2099         if (vcpu->pvclock_set_guest_stopped_request) {
2100                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2101                 vcpu->pvclock_set_guest_stopped_request = false;
2102         }
2103
2104         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2105
2106         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2107                                 &vcpu->hv_clock,
2108                                 sizeof(vcpu->hv_clock));
2109
2110         smp_wmb();
2111
2112         vcpu->hv_clock.version++;
2113         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2114                                 &vcpu->hv_clock,
2115                                 sizeof(vcpu->hv_clock.version));
2116 }
2117
2118 static int kvm_guest_time_update(struct kvm_vcpu *v)
2119 {
2120         unsigned long flags, tgt_tsc_khz;
2121         struct kvm_vcpu_arch *vcpu = &v->arch;
2122         struct kvm_arch *ka = &v->kvm->arch;
2123         s64 kernel_ns;
2124         u64 tsc_timestamp, host_tsc;
2125         u8 pvclock_flags;
2126         bool use_master_clock;
2127
2128         kernel_ns = 0;
2129         host_tsc = 0;
2130
2131         /*
2132          * If the host uses TSC clock, then passthrough TSC as stable
2133          * to the guest.
2134          */
2135         spin_lock(&ka->pvclock_gtod_sync_lock);
2136         use_master_clock = ka->use_master_clock;
2137         if (use_master_clock) {
2138                 host_tsc = ka->master_cycle_now;
2139                 kernel_ns = ka->master_kernel_ns;
2140         }
2141         spin_unlock(&ka->pvclock_gtod_sync_lock);
2142
2143         /* Keep irq disabled to prevent changes to the clock */
2144         local_irq_save(flags);
2145         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2146         if (unlikely(tgt_tsc_khz == 0)) {
2147                 local_irq_restore(flags);
2148                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2149                 return 1;
2150         }
2151         if (!use_master_clock) {
2152                 host_tsc = rdtsc();
2153                 kernel_ns = ktime_get_boot_ns();
2154         }
2155
2156         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2157
2158         /*
2159          * We may have to catch up the TSC to match elapsed wall clock
2160          * time for two reasons, even if kvmclock is used.
2161          *   1) CPU could have been running below the maximum TSC rate
2162          *   2) Broken TSC compensation resets the base at each VCPU
2163          *      entry to avoid unknown leaps of TSC even when running
2164          *      again on the same CPU.  This may cause apparent elapsed
2165          *      time to disappear, and the guest to stand still or run
2166          *      very slowly.
2167          */
2168         if (vcpu->tsc_catchup) {
2169                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2170                 if (tsc > tsc_timestamp) {
2171                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2172                         tsc_timestamp = tsc;
2173                 }
2174         }
2175
2176         local_irq_restore(flags);
2177
2178         /* With all the info we got, fill in the values */
2179
2180         if (kvm_has_tsc_control)
2181                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2182
2183         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2184                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2185                                    &vcpu->hv_clock.tsc_shift,
2186                                    &vcpu->hv_clock.tsc_to_system_mul);
2187                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2188         }
2189
2190         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2191         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2192         vcpu->last_guest_tsc = tsc_timestamp;
2193
2194         /* If the host uses TSC clocksource, then it is stable */
2195         pvclock_flags = 0;
2196         if (use_master_clock)
2197                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2198
2199         vcpu->hv_clock.flags = pvclock_flags;
2200
2201         if (vcpu->pv_time_enabled)
2202                 kvm_setup_pvclock_page(v);
2203         if (v == kvm_get_vcpu(v->kvm, 0))
2204                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2205         return 0;
2206 }
2207
2208 /*
2209  * kvmclock updates which are isolated to a given vcpu, such as
2210  * vcpu->cpu migration, should not allow system_timestamp from
2211  * the rest of the vcpus to remain static. Otherwise ntp frequency
2212  * correction applies to one vcpu's system_timestamp but not
2213  * the others.
2214  *
2215  * So in those cases, request a kvmclock update for all vcpus.
2216  * We need to rate-limit these requests though, as they can
2217  * considerably slow guests that have a large number of vcpus.
2218  * The time for a remote vcpu to update its kvmclock is bound
2219  * by the delay we use to rate-limit the updates.
2220  */
2221
2222 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2223
2224 static void kvmclock_update_fn(struct work_struct *work)
2225 {
2226         int i;
2227         struct delayed_work *dwork = to_delayed_work(work);
2228         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2229                                            kvmclock_update_work);
2230         struct kvm *kvm = container_of(ka, struct kvm, arch);
2231         struct kvm_vcpu *vcpu;
2232
2233         kvm_for_each_vcpu(i, vcpu, kvm) {
2234                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2235                 kvm_vcpu_kick(vcpu);
2236         }
2237 }
2238
2239 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2240 {
2241         struct kvm *kvm = v->kvm;
2242
2243         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2244         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2245                                         KVMCLOCK_UPDATE_DELAY);
2246 }
2247
2248 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2249
2250 static void kvmclock_sync_fn(struct work_struct *work)
2251 {
2252         struct delayed_work *dwork = to_delayed_work(work);
2253         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2254                                            kvmclock_sync_work);
2255         struct kvm *kvm = container_of(ka, struct kvm, arch);
2256
2257         if (!kvmclock_periodic_sync)
2258                 return;
2259
2260         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2261         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2262                                         KVMCLOCK_SYNC_PERIOD);
2263 }
2264
2265 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2266 {
2267         u64 mcg_cap = vcpu->arch.mcg_cap;
2268         unsigned bank_num = mcg_cap & 0xff;
2269         u32 msr = msr_info->index;
2270         u64 data = msr_info->data;
2271
2272         switch (msr) {
2273         case MSR_IA32_MCG_STATUS:
2274                 vcpu->arch.mcg_status = data;
2275                 break;
2276         case MSR_IA32_MCG_CTL:
2277                 if (!(mcg_cap & MCG_CTL_P) &&
2278                     (data || !msr_info->host_initiated))
2279                         return 1;
2280                 if (data != 0 && data != ~(u64)0)
2281                         return 1;
2282                 vcpu->arch.mcg_ctl = data;
2283                 break;
2284         default:
2285                 if (msr >= MSR_IA32_MC0_CTL &&
2286                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2287                         u32 offset = msr - MSR_IA32_MC0_CTL;
2288                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2289                          * some Linux kernels though clear bit 10 in bank 4 to
2290                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2291                          * this to avoid an uncatched #GP in the guest
2292                          */
2293                         if ((offset & 0x3) == 0 &&
2294                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2295                                 return -1;
2296                         if (!msr_info->host_initiated &&
2297                                 (offset & 0x3) == 1 && data != 0)
2298                                 return -1;
2299                         vcpu->arch.mce_banks[offset] = data;
2300                         break;
2301                 }
2302                 return 1;
2303         }
2304         return 0;
2305 }
2306
2307 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2308 {
2309         struct kvm *kvm = vcpu->kvm;
2310         int lm = is_long_mode(vcpu);
2311         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2312                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2313         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2314                 : kvm->arch.xen_hvm_config.blob_size_32;
2315         u32 page_num = data & ~PAGE_MASK;
2316         u64 page_addr = data & PAGE_MASK;
2317         u8 *page;
2318         int r;
2319
2320         r = -E2BIG;
2321         if (page_num >= blob_size)
2322                 goto out;
2323         r = -ENOMEM;
2324         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2325         if (IS_ERR(page)) {
2326                 r = PTR_ERR(page);
2327                 goto out;
2328         }
2329         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2330                 goto out_free;
2331         r = 0;
2332 out_free:
2333         kfree(page);
2334 out:
2335         return r;
2336 }
2337
2338 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2339 {
2340         gpa_t gpa = data & ~0x3f;
2341
2342         /* Bits 3:5 are reserved, Should be zero */
2343         if (data & 0x38)
2344                 return 1;
2345
2346         vcpu->arch.apf.msr_val = data;
2347
2348         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2349                 kvm_clear_async_pf_completion_queue(vcpu);
2350                 kvm_async_pf_hash_reset(vcpu);
2351                 return 0;
2352         }
2353
2354         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2355                                         sizeof(u32)))
2356                 return 1;
2357
2358         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2359         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2360         kvm_async_pf_wakeup_all(vcpu);
2361         return 0;
2362 }
2363
2364 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2365 {
2366         vcpu->arch.pv_time_enabled = false;
2367 }
2368
2369 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu, bool invalidate_gpa)
2370 {
2371         ++vcpu->stat.tlb_flush;
2372         kvm_x86_ops->tlb_flush(vcpu, invalidate_gpa);
2373 }
2374
2375 static void record_steal_time(struct kvm_vcpu *vcpu)
2376 {
2377         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2378                 return;
2379
2380         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2381                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2382                 return;
2383
2384         /*
2385          * Doing a TLB flush here, on the guest's behalf, can avoid
2386          * expensive IPIs.
2387          */
2388         if (xchg(&vcpu->arch.st.steal.preempted, 0) & KVM_VCPU_FLUSH_TLB)
2389                 kvm_vcpu_flush_tlb(vcpu, false);
2390
2391         if (vcpu->arch.st.steal.version & 1)
2392                 vcpu->arch.st.steal.version += 1;  /* first time write, random junk */
2393
2394         vcpu->arch.st.steal.version += 1;
2395
2396         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2397                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2398
2399         smp_wmb();
2400
2401         vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2402                 vcpu->arch.st.last_steal;
2403         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2404
2405         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2406                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2407
2408         smp_wmb();
2409
2410         vcpu->arch.st.steal.version += 1;
2411
2412         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2413                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2414 }
2415
2416 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2417 {
2418         bool pr = false;
2419         u32 msr = msr_info->index;
2420         u64 data = msr_info->data;
2421
2422         switch (msr) {
2423         case MSR_AMD64_NB_CFG:
2424         case MSR_IA32_UCODE_WRITE:
2425         case MSR_VM_HSAVE_PA:
2426         case MSR_AMD64_PATCH_LOADER:
2427         case MSR_AMD64_BU_CFG2:
2428         case MSR_AMD64_DC_CFG:
2429                 break;
2430
2431         case MSR_IA32_UCODE_REV:
2432                 if (msr_info->host_initiated)
2433                         vcpu->arch.microcode_version = data;
2434                 break;
2435         case MSR_EFER:
2436                 return set_efer(vcpu, data);
2437         case MSR_K7_HWCR:
2438                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2439                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2440                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2441                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2442                 if (data != 0) {
2443                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2444                                     data);
2445                         return 1;
2446                 }
2447                 break;
2448         case MSR_FAM10H_MMIO_CONF_BASE:
2449                 if (data != 0) {
2450                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2451                                     "0x%llx\n", data);
2452                         return 1;
2453                 }
2454                 break;
2455         case MSR_IA32_DEBUGCTLMSR:
2456                 if (!data) {
2457                         /* We support the non-activated case already */
2458                         break;
2459                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2460                         /* Values other than LBR and BTF are vendor-specific,
2461                            thus reserved and should throw a #GP */
2462                         return 1;
2463                 }
2464                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2465                             __func__, data);
2466                 break;
2467         case 0x200 ... 0x2ff:
2468                 return kvm_mtrr_set_msr(vcpu, msr, data);
2469         case MSR_IA32_APICBASE:
2470                 return kvm_set_apic_base(vcpu, msr_info);
2471         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2472                 return kvm_x2apic_msr_write(vcpu, msr, data);
2473         case MSR_IA32_TSCDEADLINE:
2474                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2475                 break;
2476         case MSR_IA32_TSC_ADJUST:
2477                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
2478                         if (!msr_info->host_initiated) {
2479                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2480                                 adjust_tsc_offset_guest(vcpu, adj);
2481                         }
2482                         vcpu->arch.ia32_tsc_adjust_msr = data;
2483                 }
2484                 break;
2485         case MSR_IA32_MISC_ENABLE:
2486                 vcpu->arch.ia32_misc_enable_msr = data;
2487                 break;
2488         case MSR_IA32_SMBASE:
2489                 if (!msr_info->host_initiated)
2490                         return 1;
2491                 vcpu->arch.smbase = data;
2492                 break;
2493         case MSR_IA32_TSC:
2494                 kvm_write_tsc(vcpu, msr_info);
2495                 break;
2496         case MSR_SMI_COUNT:
2497                 if (!msr_info->host_initiated)
2498                         return 1;
2499                 vcpu->arch.smi_count = data;
2500                 break;
2501         case MSR_KVM_WALL_CLOCK_NEW:
2502         case MSR_KVM_WALL_CLOCK:
2503                 vcpu->kvm->arch.wall_clock = data;
2504                 kvm_write_wall_clock(vcpu->kvm, data);
2505                 break;
2506         case MSR_KVM_SYSTEM_TIME_NEW:
2507         case MSR_KVM_SYSTEM_TIME: {
2508                 struct kvm_arch *ka = &vcpu->kvm->arch;
2509
2510                 kvmclock_reset(vcpu);
2511
2512                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2513                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2514
2515                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2516                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2517
2518                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2519                 }
2520
2521                 vcpu->arch.time = data;
2522                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2523
2524                 /* we verify if the enable bit is set... */
2525                 if (!(data & 1))
2526                         break;
2527
2528                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2529                      &vcpu->arch.pv_time, data & ~1ULL,
2530                      sizeof(struct pvclock_vcpu_time_info)))
2531                         vcpu->arch.pv_time_enabled = false;
2532                 else
2533                         vcpu->arch.pv_time_enabled = true;
2534
2535                 break;
2536         }
2537         case MSR_KVM_ASYNC_PF_EN:
2538                 if (kvm_pv_enable_async_pf(vcpu, data))
2539                         return 1;
2540                 break;
2541         case MSR_KVM_STEAL_TIME:
2542
2543                 if (unlikely(!sched_info_on()))
2544                         return 1;
2545
2546                 if (data & KVM_STEAL_RESERVED_MASK)
2547                         return 1;
2548
2549                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2550                                                 data & KVM_STEAL_VALID_BITS,
2551                                                 sizeof(struct kvm_steal_time)))
2552                         return 1;
2553
2554                 vcpu->arch.st.msr_val = data;
2555
2556                 if (!(data & KVM_MSR_ENABLED))
2557                         break;
2558
2559                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2560
2561                 break;
2562         case MSR_KVM_PV_EOI_EN:
2563                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
2564                         return 1;
2565                 break;
2566
2567         case MSR_IA32_MCG_CTL:
2568         case MSR_IA32_MCG_STATUS:
2569         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2570                 return set_msr_mce(vcpu, msr_info);
2571
2572         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2573         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2574                 pr = true; /* fall through */
2575         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2576         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2577                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2578                         return kvm_pmu_set_msr(vcpu, msr_info);
2579
2580                 if (pr || data != 0)
2581                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2582                                     "0x%x data 0x%llx\n", msr, data);
2583                 break;
2584         case MSR_K7_CLK_CTL:
2585                 /*
2586                  * Ignore all writes to this no longer documented MSR.
2587                  * Writes are only relevant for old K7 processors,
2588                  * all pre-dating SVM, but a recommended workaround from
2589                  * AMD for these chips. It is possible to specify the
2590                  * affected processor models on the command line, hence
2591                  * the need to ignore the workaround.
2592                  */
2593                 break;
2594         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2595         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2596         case HV_X64_MSR_CRASH_CTL:
2597         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2598         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
2599         case HV_X64_MSR_TSC_EMULATION_CONTROL:
2600         case HV_X64_MSR_TSC_EMULATION_STATUS:
2601                 return kvm_hv_set_msr_common(vcpu, msr, data,
2602                                              msr_info->host_initiated);
2603         case MSR_IA32_BBL_CR_CTL3:
2604                 /* Drop writes to this legacy MSR -- see rdmsr
2605                  * counterpart for further detail.
2606                  */
2607                 if (report_ignored_msrs)
2608                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
2609                                 msr, data);
2610                 break;
2611         case MSR_AMD64_OSVW_ID_LENGTH:
2612                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2613                         return 1;
2614                 vcpu->arch.osvw.length = data;
2615                 break;
2616         case MSR_AMD64_OSVW_STATUS:
2617                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2618                         return 1;
2619                 vcpu->arch.osvw.status = data;
2620                 break;
2621         case MSR_PLATFORM_INFO:
2622                 if (!msr_info->host_initiated ||
2623                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
2624                      cpuid_fault_enabled(vcpu)))
2625                         return 1;
2626                 vcpu->arch.msr_platform_info = data;
2627                 break;
2628         case MSR_MISC_FEATURES_ENABLES:
2629                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
2630                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
2631                      !supports_cpuid_fault(vcpu)))
2632                         return 1;
2633                 vcpu->arch.msr_misc_features_enables = data;
2634                 break;
2635         default:
2636                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2637                         return xen_hvm_config(vcpu, data);
2638                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2639                         return kvm_pmu_set_msr(vcpu, msr_info);
2640                 if (!ignore_msrs) {
2641                         vcpu_debug_ratelimited(vcpu, "unhandled wrmsr: 0x%x data 0x%llx\n",
2642                                     msr, data);
2643                         return 1;
2644                 } else {
2645                         if (report_ignored_msrs)
2646                                 vcpu_unimpl(vcpu,
2647                                         "ignored wrmsr: 0x%x data 0x%llx\n",
2648                                         msr, data);
2649                         break;
2650                 }
2651         }
2652         return 0;
2653 }
2654 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2655
2656
2657 /*
2658  * Reads an msr value (of 'msr_index') into 'pdata'.
2659  * Returns 0 on success, non-0 otherwise.
2660  * Assumes vcpu_load() was already called.
2661  */
2662 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2663 {
2664         return kvm_x86_ops->get_msr(vcpu, msr);
2665 }
2666 EXPORT_SYMBOL_GPL(kvm_get_msr);
2667
2668 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
2669 {
2670         u64 data;
2671         u64 mcg_cap = vcpu->arch.mcg_cap;
2672         unsigned bank_num = mcg_cap & 0xff;
2673
2674         switch (msr) {
2675         case MSR_IA32_P5_MC_ADDR:
2676         case MSR_IA32_P5_MC_TYPE:
2677                 data = 0;
2678                 break;
2679         case MSR_IA32_MCG_CAP:
2680                 data = vcpu->arch.mcg_cap;
2681                 break;
2682         case MSR_IA32_MCG_CTL:
2683                 if (!(mcg_cap & MCG_CTL_P) && !host)
2684                         return 1;
2685                 data = vcpu->arch.mcg_ctl;
2686                 break;
2687         case MSR_IA32_MCG_STATUS:
2688                 data = vcpu->arch.mcg_status;
2689                 break;
2690         default:
2691                 if (msr >= MSR_IA32_MC0_CTL &&
2692                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2693                         u32 offset = msr - MSR_IA32_MC0_CTL;
2694                         data = vcpu->arch.mce_banks[offset];
2695                         break;
2696                 }
2697                 return 1;
2698         }
2699         *pdata = data;
2700         return 0;
2701 }
2702
2703 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2704 {
2705         switch (msr_info->index) {
2706         case MSR_IA32_PLATFORM_ID:
2707         case MSR_IA32_EBL_CR_POWERON:
2708         case MSR_IA32_DEBUGCTLMSR:
2709         case MSR_IA32_LASTBRANCHFROMIP:
2710         case MSR_IA32_LASTBRANCHTOIP:
2711         case MSR_IA32_LASTINTFROMIP:
2712         case MSR_IA32_LASTINTTOIP:
2713         case MSR_K8_SYSCFG:
2714         case MSR_K8_TSEG_ADDR:
2715         case MSR_K8_TSEG_MASK:
2716         case MSR_K7_HWCR:
2717         case MSR_VM_HSAVE_PA:
2718         case MSR_K8_INT_PENDING_MSG:
2719         case MSR_AMD64_NB_CFG:
2720         case MSR_FAM10H_MMIO_CONF_BASE:
2721         case MSR_AMD64_BU_CFG2:
2722         case MSR_IA32_PERF_CTL:
2723         case MSR_AMD64_DC_CFG:
2724                 msr_info->data = 0;
2725                 break;
2726         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
2727         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2728         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2729         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2730         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2731                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2732                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2733                 msr_info->data = 0;
2734                 break;
2735         case MSR_IA32_UCODE_REV:
2736                 msr_info->data = vcpu->arch.microcode_version;
2737                 break;
2738         case MSR_IA32_TSC:
2739                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + vcpu->arch.tsc_offset;
2740                 break;
2741         case MSR_MTRRcap:
2742         case 0x200 ... 0x2ff:
2743                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2744         case 0xcd: /* fsb frequency */
2745                 msr_info->data = 3;
2746                 break;
2747                 /*
2748                  * MSR_EBC_FREQUENCY_ID
2749                  * Conservative value valid for even the basic CPU models.
2750                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2751                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2752                  * and 266MHz for model 3, or 4. Set Core Clock
2753                  * Frequency to System Bus Frequency Ratio to 1 (bits
2754                  * 31:24) even though these are only valid for CPU
2755                  * models > 2, however guests may end up dividing or
2756                  * multiplying by zero otherwise.
2757                  */
2758         case MSR_EBC_FREQUENCY_ID:
2759                 msr_info->data = 1 << 24;
2760                 break;
2761         case MSR_IA32_APICBASE:
2762                 msr_info->data = kvm_get_apic_base(vcpu);
2763                 break;
2764         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2765                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2766                 break;
2767         case MSR_IA32_TSCDEADLINE:
2768                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2769                 break;
2770         case MSR_IA32_TSC_ADJUST:
2771                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2772                 break;
2773         case MSR_IA32_MISC_ENABLE:
2774                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2775                 break;
2776         case MSR_IA32_SMBASE:
2777                 if (!msr_info->host_initiated)
2778                         return 1;
2779                 msr_info->data = vcpu->arch.smbase;
2780                 break;
2781         case MSR_SMI_COUNT:
2782                 msr_info->data = vcpu->arch.smi_count;
2783                 break;
2784         case MSR_IA32_PERF_STATUS:
2785                 /* TSC increment by tick */
2786                 msr_info->data = 1000ULL;
2787                 /* CPU multiplier */
2788                 msr_info->data |= (((uint64_t)4ULL) << 40);
2789                 break;
2790         case MSR_EFER:
2791                 msr_info->data = vcpu->arch.efer;
2792                 break;
2793         case MSR_KVM_WALL_CLOCK:
2794         case MSR_KVM_WALL_CLOCK_NEW:
2795                 msr_info->data = vcpu->kvm->arch.wall_clock;
2796                 break;
2797         case MSR_KVM_SYSTEM_TIME:
2798         case MSR_KVM_SYSTEM_TIME_NEW:
2799                 msr_info->data = vcpu->arch.time;
2800                 break;
2801         case MSR_KVM_ASYNC_PF_EN:
2802                 msr_info->data = vcpu->arch.apf.msr_val;
2803                 break;
2804         case MSR_KVM_STEAL_TIME:
2805                 msr_info->data = vcpu->arch.st.msr_val;
2806                 break;
2807         case MSR_KVM_PV_EOI_EN:
2808                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2809                 break;
2810         case MSR_IA32_P5_MC_ADDR:
2811         case MSR_IA32_P5_MC_TYPE:
2812         case MSR_IA32_MCG_CAP:
2813         case MSR_IA32_MCG_CTL:
2814         case MSR_IA32_MCG_STATUS:
2815         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2816                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
2817                                    msr_info->host_initiated);
2818         case MSR_K7_CLK_CTL:
2819                 /*
2820                  * Provide expected ramp-up count for K7. All other
2821                  * are set to zero, indicating minimum divisors for
2822                  * every field.
2823                  *
2824                  * This prevents guest kernels on AMD host with CPU
2825                  * type 6, model 8 and higher from exploding due to
2826                  * the rdmsr failing.
2827                  */
2828                 msr_info->data = 0x20000000;
2829                 break;
2830         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2831         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2832         case HV_X64_MSR_CRASH_CTL:
2833         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2834         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
2835         case HV_X64_MSR_TSC_EMULATION_CONTROL:
2836         case HV_X64_MSR_TSC_EMULATION_STATUS:
2837                 return kvm_hv_get_msr_common(vcpu,
2838                                              msr_info->index, &msr_info->data,
2839                                              msr_info->host_initiated);
2840                 break;
2841         case MSR_IA32_BBL_CR_CTL3:
2842                 /* This legacy MSR exists but isn't fully documented in current
2843                  * silicon.  It is however accessed by winxp in very narrow
2844                  * scenarios where it sets bit #19, itself documented as
2845                  * a "reserved" bit.  Best effort attempt to source coherent
2846                  * read data here should the balance of the register be
2847                  * interpreted by the guest:
2848                  *
2849                  * L2 cache control register 3: 64GB range, 256KB size,
2850                  * enabled, latency 0x1, configured
2851                  */
2852                 msr_info->data = 0xbe702111;
2853                 break;
2854         case MSR_AMD64_OSVW_ID_LENGTH:
2855                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2856                         return 1;
2857                 msr_info->data = vcpu->arch.osvw.length;
2858                 break;
2859         case MSR_AMD64_OSVW_STATUS:
2860                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2861                         return 1;
2862                 msr_info->data = vcpu->arch.osvw.status;
2863                 break;
2864         case MSR_PLATFORM_INFO:
2865                 if (!msr_info->host_initiated &&
2866                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
2867                         return 1;
2868                 msr_info->data = vcpu->arch.msr_platform_info;
2869                 break;
2870         case MSR_MISC_FEATURES_ENABLES:
2871                 msr_info->data = vcpu->arch.msr_misc_features_enables;
2872                 break;
2873         default:
2874                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2875                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2876                 if (!ignore_msrs) {
2877                         vcpu_debug_ratelimited(vcpu, "unhandled rdmsr: 0x%x\n",
2878                                                msr_info->index);
2879                         return 1;
2880                 } else {
2881                         if (report_ignored_msrs)
2882                                 vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n",
2883                                         msr_info->index);
2884                         msr_info->data = 0;
2885                 }
2886                 break;
2887         }
2888         return 0;
2889 }
2890 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2891
2892 /*
2893  * Read or write a bunch of msrs. All parameters are kernel addresses.
2894  *
2895  * @return number of msrs set successfully.
2896  */
2897 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2898                     struct kvm_msr_entry *entries,
2899                     int (*do_msr)(struct kvm_vcpu *vcpu,
2900                                   unsigned index, u64 *data))
2901 {
2902         int i;
2903
2904         for (i = 0; i < msrs->nmsrs; ++i)
2905                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2906                         break;
2907
2908         return i;
2909 }
2910
2911 /*
2912  * Read or write a bunch of msrs. Parameters are user addresses.
2913  *
2914  * @return number of msrs set successfully.
2915  */
2916 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2917                   int (*do_msr)(struct kvm_vcpu *vcpu,
2918                                 unsigned index, u64 *data),
2919                   int writeback)
2920 {
2921         struct kvm_msrs msrs;
2922         struct kvm_msr_entry *entries;
2923         int r, n;
2924         unsigned size;
2925
2926         r = -EFAULT;
2927         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
2928                 goto out;
2929
2930         r = -E2BIG;
2931         if (msrs.nmsrs >= MAX_IO_MSRS)
2932                 goto out;
2933
2934         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2935         entries = memdup_user(user_msrs->entries, size);
2936         if (IS_ERR(entries)) {
2937                 r = PTR_ERR(entries);
2938                 goto out;
2939         }
2940
2941         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2942         if (r < 0)
2943                 goto out_free;
2944
2945         r = -EFAULT;
2946         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2947                 goto out_free;
2948
2949         r = n;
2950
2951 out_free:
2952         kfree(entries);
2953 out:
2954         return r;
2955 }
2956
2957 static inline bool kvm_can_mwait_in_guest(void)
2958 {
2959         return boot_cpu_has(X86_FEATURE_MWAIT) &&
2960                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
2961                 boot_cpu_has(X86_FEATURE_ARAT);
2962 }
2963
2964 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2965 {
2966         int r = 0;
2967
2968         switch (ext) {
2969         case KVM_CAP_IRQCHIP:
2970         case KVM_CAP_HLT:
2971         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2972         case KVM_CAP_SET_TSS_ADDR:
2973         case KVM_CAP_EXT_CPUID:
2974         case KVM_CAP_EXT_EMUL_CPUID:
2975         case KVM_CAP_CLOCKSOURCE:
2976         case KVM_CAP_PIT:
2977         case KVM_CAP_NOP_IO_DELAY:
2978         case KVM_CAP_MP_STATE:
2979         case KVM_CAP_SYNC_MMU:
2980         case KVM_CAP_USER_NMI:
2981         case KVM_CAP_REINJECT_CONTROL:
2982         case KVM_CAP_IRQ_INJECT_STATUS:
2983         case KVM_CAP_IOEVENTFD:
2984         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2985         case KVM_CAP_PIT2:
2986         case KVM_CAP_PIT_STATE2:
2987         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2988         case KVM_CAP_XEN_HVM:
2989         case KVM_CAP_VCPU_EVENTS:
2990         case KVM_CAP_HYPERV:
2991         case KVM_CAP_HYPERV_VAPIC:
2992         case KVM_CAP_HYPERV_SPIN:
2993         case KVM_CAP_HYPERV_SYNIC:
2994         case KVM_CAP_HYPERV_SYNIC2:
2995         case KVM_CAP_HYPERV_VP_INDEX:
2996         case KVM_CAP_HYPERV_EVENTFD:
2997         case KVM_CAP_HYPERV_TLBFLUSH:
2998         case KVM_CAP_HYPERV_SEND_IPI:
2999         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3000         case KVM_CAP_PCI_SEGMENT:
3001         case KVM_CAP_DEBUGREGS:
3002         case KVM_CAP_X86_ROBUST_SINGLESTEP:
3003         case KVM_CAP_XSAVE:
3004         case KVM_CAP_ASYNC_PF:
3005         case KVM_CAP_GET_TSC_KHZ:
3006         case KVM_CAP_KVMCLOCK_CTRL:
3007         case KVM_CAP_READONLY_MEM:
3008         case KVM_CAP_HYPERV_TIME:
3009         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3010         case KVM_CAP_TSC_DEADLINE_TIMER:
3011         case KVM_CAP_ENABLE_CAP_VM:
3012         case KVM_CAP_DISABLE_QUIRKS:
3013         case KVM_CAP_SET_BOOT_CPU_ID:
3014         case KVM_CAP_SPLIT_IRQCHIP:
3015         case KVM_CAP_IMMEDIATE_EXIT:
3016         case KVM_CAP_GET_MSR_FEATURES:
3017         case KVM_CAP_MSR_PLATFORM_INFO:
3018         case KVM_CAP_EXCEPTION_PAYLOAD:
3019                 r = 1;
3020                 break;
3021         case KVM_CAP_SYNC_REGS:
3022                 r = KVM_SYNC_X86_VALID_FIELDS;
3023                 break;
3024         case KVM_CAP_ADJUST_CLOCK:
3025                 r = KVM_CLOCK_TSC_STABLE;
3026                 break;
3027         case KVM_CAP_X86_DISABLE_EXITS:
3028                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE;
3029                 if(kvm_can_mwait_in_guest())
3030                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
3031                 break;
3032         case KVM_CAP_X86_SMM:
3033                 /* SMBASE is usually relocated above 1M on modern chipsets,
3034                  * and SMM handlers might indeed rely on 4G segment limits,
3035                  * so do not report SMM to be available if real mode is
3036                  * emulated via vm86 mode.  Still, do not go to great lengths
3037                  * to avoid userspace's usage of the feature, because it is a
3038                  * fringe case that is not enabled except via specific settings
3039                  * of the module parameters.
3040                  */
3041                 r = kvm_x86_ops->has_emulated_msr(MSR_IA32_SMBASE);
3042                 break;
3043         case KVM_CAP_VAPIC:
3044                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
3045                 break;
3046         case KVM_CAP_NR_VCPUS:
3047                 r = KVM_SOFT_MAX_VCPUS;
3048                 break;
3049         case KVM_CAP_MAX_VCPUS:
3050                 r = KVM_MAX_VCPUS;
3051                 break;
3052         case KVM_CAP_NR_MEMSLOTS:
3053                 r = KVM_USER_MEM_SLOTS;
3054                 break;
3055         case KVM_CAP_PV_MMU:    /* obsolete */
3056                 r = 0;
3057                 break;
3058         case KVM_CAP_MCE:
3059                 r = KVM_MAX_MCE_BANKS;
3060                 break;
3061         case KVM_CAP_XCRS:
3062                 r = boot_cpu_has(X86_FEATURE_XSAVE);
3063                 break;
3064         case KVM_CAP_TSC_CONTROL:
3065                 r = kvm_has_tsc_control;
3066                 break;
3067         case KVM_CAP_X2APIC_API:
3068                 r = KVM_X2APIC_API_VALID_FLAGS;
3069                 break;
3070         case KVM_CAP_NESTED_STATE:
3071                 r = kvm_x86_ops->get_nested_state ?
3072                         kvm_x86_ops->get_nested_state(NULL, 0, 0) : 0;
3073                 break;
3074         default:
3075                 break;
3076         }
3077         return r;
3078
3079 }
3080
3081 long kvm_arch_dev_ioctl(struct file *filp,
3082                         unsigned int ioctl, unsigned long arg)
3083 {
3084         void __user *argp = (void __user *)arg;
3085         long r;
3086
3087         switch (ioctl) {
3088         case KVM_GET_MSR_INDEX_LIST: {
3089                 struct kvm_msr_list __user *user_msr_list = argp;
3090                 struct kvm_msr_list msr_list;
3091                 unsigned n;
3092
3093                 r = -EFAULT;
3094                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3095                         goto out;
3096                 n = msr_list.nmsrs;
3097                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
3098                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3099                         goto out;
3100                 r = -E2BIG;
3101                 if (n < msr_list.nmsrs)
3102                         goto out;
3103                 r = -EFAULT;
3104                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
3105                                  num_msrs_to_save * sizeof(u32)))
3106                         goto out;
3107                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
3108                                  &emulated_msrs,
3109                                  num_emulated_msrs * sizeof(u32)))
3110                         goto out;
3111                 r = 0;
3112                 break;
3113         }
3114         case KVM_GET_SUPPORTED_CPUID:
3115         case KVM_GET_EMULATED_CPUID: {
3116                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3117                 struct kvm_cpuid2 cpuid;
3118
3119                 r = -EFAULT;
3120                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3121                         goto out;
3122
3123                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
3124                                             ioctl);
3125                 if (r)
3126                         goto out;
3127
3128                 r = -EFAULT;
3129                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3130                         goto out;
3131                 r = 0;
3132                 break;
3133         }
3134         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
3135                 r = -EFAULT;
3136                 if (copy_to_user(argp, &kvm_mce_cap_supported,
3137                                  sizeof(kvm_mce_cap_supported)))
3138                         goto out;
3139                 r = 0;
3140                 break;
3141         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
3142                 struct kvm_msr_list __user *user_msr_list = argp;
3143                 struct kvm_msr_list msr_list;
3144                 unsigned int n;
3145
3146                 r = -EFAULT;
3147                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3148                         goto out;
3149                 n = msr_list.nmsrs;
3150                 msr_list.nmsrs = num_msr_based_features;
3151                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3152                         goto out;
3153                 r = -E2BIG;
3154                 if (n < msr_list.nmsrs)
3155                         goto out;
3156                 r = -EFAULT;
3157                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
3158                                  num_msr_based_features * sizeof(u32)))
3159                         goto out;
3160                 r = 0;
3161                 break;
3162         }
3163         case KVM_GET_MSRS:
3164                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
3165                 break;
3166         }
3167         default:
3168                 r = -EINVAL;
3169         }
3170 out:
3171         return r;
3172 }
3173
3174 static void wbinvd_ipi(void *garbage)
3175 {
3176         wbinvd();
3177 }
3178
3179 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
3180 {
3181         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
3182 }
3183
3184 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
3185 {
3186         /* Address WBINVD may be executed by guest */
3187         if (need_emulate_wbinvd(vcpu)) {
3188                 if (kvm_x86_ops->has_wbinvd_exit())
3189                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3190                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
3191                         smp_call_function_single(vcpu->cpu,
3192                                         wbinvd_ipi, NULL, 1);
3193         }
3194
3195         kvm_x86_ops->vcpu_load(vcpu, cpu);
3196
3197         /* Apply any externally detected TSC adjustments (due to suspend) */
3198         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
3199                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
3200                 vcpu->arch.tsc_offset_adjustment = 0;
3201                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3202         }
3203
3204         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
3205                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
3206                                 rdtsc() - vcpu->arch.last_host_tsc;
3207                 if (tsc_delta < 0)
3208                         mark_tsc_unstable("KVM discovered backwards TSC");
3209
3210                 if (kvm_check_tsc_unstable()) {
3211                         u64 offset = kvm_compute_tsc_offset(vcpu,
3212                                                 vcpu->arch.last_guest_tsc);
3213                         kvm_vcpu_write_tsc_offset(vcpu, offset);
3214                         vcpu->arch.tsc_catchup = 1;
3215                 }
3216
3217                 if (kvm_lapic_hv_timer_in_use(vcpu))
3218                         kvm_lapic_restart_hv_timer(vcpu);
3219
3220                 /*
3221                  * On a host with synchronized TSC, there is no need to update
3222                  * kvmclock on vcpu->cpu migration
3223                  */
3224                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
3225                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
3226                 if (vcpu->cpu != cpu)
3227                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
3228                 vcpu->cpu = cpu;
3229         }
3230
3231         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3232 }
3233
3234 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
3235 {
3236         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3237                 return;
3238
3239         vcpu->arch.st.steal.preempted = KVM_VCPU_PREEMPTED;
3240
3241         kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.st.stime,
3242                         &vcpu->arch.st.steal.preempted,
3243                         offsetof(struct kvm_steal_time, preempted),
3244                         sizeof(vcpu->arch.st.steal.preempted));
3245 }
3246
3247 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
3248 {
3249         int idx;
3250
3251         if (vcpu->preempted)
3252                 vcpu->arch.preempted_in_kernel = !kvm_x86_ops->get_cpl(vcpu);
3253
3254         /*
3255          * Disable page faults because we're in atomic context here.
3256          * kvm_write_guest_offset_cached() would call might_fault()
3257          * that relies on pagefault_disable() to tell if there's a
3258          * bug. NOTE: the write to guest memory may not go through if
3259          * during postcopy live migration or if there's heavy guest
3260          * paging.
3261          */
3262         pagefault_disable();
3263         /*
3264          * kvm_memslots() will be called by
3265          * kvm_write_guest_offset_cached() so take the srcu lock.
3266          */
3267         idx = srcu_read_lock(&vcpu->kvm->srcu);
3268         kvm_steal_time_set_preempted(vcpu);
3269         srcu_read_unlock(&vcpu->kvm->srcu, idx);
3270         pagefault_enable();
3271         kvm_x86_ops->vcpu_put(vcpu);
3272         vcpu->arch.last_host_tsc = rdtsc();
3273         /*
3274          * If userspace has set any breakpoints or watchpoints, dr6 is restored
3275          * on every vmexit, but if not, we might have a stale dr6 from the
3276          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
3277          */
3278         set_debugreg(0, 6);
3279 }
3280
3281 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
3282                                     struct kvm_lapic_state *s)
3283 {
3284         if (vcpu->arch.apicv_active)
3285                 kvm_x86_ops->sync_pir_to_irr(vcpu);
3286
3287         return kvm_apic_get_state(vcpu, s);
3288 }
3289
3290 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
3291                                     struct kvm_lapic_state *s)
3292 {
3293         int r;
3294
3295         r = kvm_apic_set_state(vcpu, s);
3296         if (r)
3297                 return r;
3298         update_cr8_intercept(vcpu);
3299
3300         return 0;
3301 }
3302
3303 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
3304 {
3305         return (!lapic_in_kernel(vcpu) ||
3306                 kvm_apic_accept_pic_intr(vcpu));
3307 }
3308
3309 /*
3310  * if userspace requested an interrupt window, check that the
3311  * interrupt window is open.
3312  *
3313  * No need to exit to userspace if we already have an interrupt queued.
3314  */
3315 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
3316 {
3317         return kvm_arch_interrupt_allowed(vcpu) &&
3318                 !kvm_cpu_has_interrupt(vcpu) &&
3319                 !kvm_event_needs_reinjection(vcpu) &&
3320                 kvm_cpu_accept_dm_intr(vcpu);
3321 }
3322
3323 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
3324                                     struct kvm_interrupt *irq)
3325 {
3326         if (irq->irq >= KVM_NR_INTERRUPTS)
3327                 return -EINVAL;
3328
3329         if (!irqchip_in_kernel(vcpu->kvm)) {
3330                 kvm_queue_interrupt(vcpu, irq->irq, false);
3331                 kvm_make_request(KVM_REQ_EVENT, vcpu);
3332                 return 0;
3333         }
3334
3335         /*
3336          * With in-kernel LAPIC, we only use this to inject EXTINT, so
3337          * fail for in-kernel 8259.
3338          */
3339         if (pic_in_kernel(vcpu->kvm))
3340                 return -ENXIO;
3341
3342         if (vcpu->arch.pending_external_vector != -1)
3343                 return -EEXIST;
3344
3345         vcpu->arch.pending_external_vector = irq->irq;
3346         kvm_make_request(KVM_REQ_EVENT, vcpu);
3347         return 0;
3348 }
3349
3350 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
3351 {
3352         kvm_inject_nmi(vcpu);
3353
3354         return 0;
3355 }
3356
3357 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
3358 {
3359         kvm_make_request(KVM_REQ_SMI, vcpu);
3360
3361         return 0;
3362 }
3363
3364 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
3365                                            struct kvm_tpr_access_ctl *tac)
3366 {
3367         if (tac->flags)
3368                 return -EINVAL;
3369         vcpu->arch.tpr_access_reporting = !!tac->enabled;
3370         return 0;
3371 }
3372
3373 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
3374                                         u64 mcg_cap)
3375 {
3376         int r;
3377         unsigned bank_num = mcg_cap & 0xff, bank;
3378
3379         r = -EINVAL;
3380         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
3381                 goto out;
3382         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
3383                 goto out;
3384         r = 0;
3385         vcpu->arch.mcg_cap = mcg_cap;
3386         /* Init IA32_MCG_CTL to all 1s */
3387         if (mcg_cap & MCG_CTL_P)
3388                 vcpu->arch.mcg_ctl = ~(u64)0;
3389         /* Init IA32_MCi_CTL to all 1s */
3390         for (bank = 0; bank < bank_num; bank++)
3391                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3392
3393         if (kvm_x86_ops->setup_mce)
3394                 kvm_x86_ops->setup_mce(vcpu);
3395 out:
3396         return r;
3397 }
3398
3399 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3400                                       struct kvm_x86_mce *mce)
3401 {
3402         u64 mcg_cap = vcpu->arch.mcg_cap;
3403         unsigned bank_num = mcg_cap & 0xff;
3404         u64 *banks = vcpu->arch.mce_banks;
3405
3406         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3407                 return -EINVAL;
3408         /*
3409          * if IA32_MCG_CTL is not all 1s, the uncorrected error
3410          * reporting is disabled
3411          */
3412         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3413             vcpu->arch.mcg_ctl != ~(u64)0)
3414                 return 0;
3415         banks += 4 * mce->bank;
3416         /*
3417          * if IA32_MCi_CTL is not all 1s, the uncorrected error
3418          * reporting is disabled for the bank
3419          */
3420         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3421                 return 0;
3422         if (mce->status & MCI_STATUS_UC) {
3423                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3424                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3425                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3426                         return 0;
3427                 }
3428                 if (banks[1] & MCI_STATUS_VAL)
3429                         mce->status |= MCI_STATUS_OVER;
3430                 banks[2] = mce->addr;
3431                 banks[3] = mce->misc;
3432                 vcpu->arch.mcg_status = mce->mcg_status;
3433                 banks[1] = mce->status;
3434                 kvm_queue_exception(vcpu, MC_VECTOR);
3435         } else if (!(banks[1] & MCI_STATUS_VAL)
3436                    || !(banks[1] & MCI_STATUS_UC)) {
3437                 if (banks[1] & MCI_STATUS_VAL)
3438                         mce->status |= MCI_STATUS_OVER;
3439                 banks[2] = mce->addr;
3440                 banks[3] = mce->misc;
3441                 banks[1] = mce->status;
3442         } else
3443                 banks[1] |= MCI_STATUS_OVER;
3444         return 0;
3445 }
3446
3447 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3448                                                struct kvm_vcpu_events *events)
3449 {
3450         process_nmi(vcpu);
3451
3452         /*
3453          * The API doesn't provide the instruction length for software
3454          * exceptions, so don't report them. As long as the guest RIP
3455          * isn't advanced, we should expect to encounter the exception
3456          * again.
3457          */
3458         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
3459                 events->exception.injected = 0;
3460                 events->exception.pending = 0;
3461         } else {
3462                 events->exception.injected = vcpu->arch.exception.injected;
3463                 events->exception.pending = vcpu->arch.exception.pending;
3464                 /*
3465                  * For ABI compatibility, deliberately conflate
3466                  * pending and injected exceptions when
3467                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
3468                  */
3469                 if (!vcpu->kvm->arch.exception_payload_enabled)
3470                         events->exception.injected |=
3471                                 vcpu->arch.exception.pending;
3472         }
3473         events->exception.nr = vcpu->arch.exception.nr;
3474         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3475         events->exception.error_code = vcpu->arch.exception.error_code;
3476         events->exception_has_payload = vcpu->arch.exception.has_payload;
3477         events->exception_payload = vcpu->arch.exception.payload;
3478
3479         events->interrupt.injected =
3480                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
3481         events->interrupt.nr = vcpu->arch.interrupt.nr;
3482         events->interrupt.soft = 0;
3483         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3484
3485         events->nmi.injected = vcpu->arch.nmi_injected;
3486         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3487         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3488         events->nmi.pad = 0;
3489
3490         events->sipi_vector = 0; /* never valid when reporting to user space */
3491
3492         events->smi.smm = is_smm(vcpu);
3493         events->smi.pending = vcpu->arch.smi_pending;
3494         events->smi.smm_inside_nmi =
3495                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3496         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3497
3498         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3499                          | KVM_VCPUEVENT_VALID_SHADOW
3500                          | KVM_VCPUEVENT_VALID_SMM);
3501         if (vcpu->kvm->arch.exception_payload_enabled)
3502                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
3503
3504         memset(&events->reserved, 0, sizeof(events->reserved));
3505 }
3506
3507 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags);
3508
3509 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3510                                               struct kvm_vcpu_events *events)
3511 {
3512         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3513                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3514                               | KVM_VCPUEVENT_VALID_SHADOW
3515                               | KVM_VCPUEVENT_VALID_SMM
3516                               | KVM_VCPUEVENT_VALID_PAYLOAD))
3517                 return -EINVAL;
3518
3519         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
3520                 if (!vcpu->kvm->arch.exception_payload_enabled)
3521                         return -EINVAL;
3522                 if (events->exception.pending)
3523                         events->exception.injected = 0;
3524                 else
3525                         events->exception_has_payload = 0;
3526         } else {
3527                 events->exception.pending = 0;
3528                 events->exception_has_payload = 0;
3529         }
3530
3531         if ((events->exception.injected || events->exception.pending) &&
3532             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
3533                 return -EINVAL;
3534
3535         /* INITs are latched while in SMM */
3536         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
3537             (events->smi.smm || events->smi.pending) &&
3538             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
3539                 return -EINVAL;
3540
3541         process_nmi(vcpu);
3542         vcpu->arch.exception.injected = events->exception.injected;
3543         vcpu->arch.exception.pending = events->exception.pending;
3544         vcpu->arch.exception.nr = events->exception.nr;
3545         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3546         vcpu->arch.exception.error_code = events->exception.error_code;
3547         vcpu->arch.exception.has_payload = events->exception_has_payload;
3548         vcpu->arch.exception.payload = events->exception_payload;
3549
3550         vcpu->arch.interrupt.injected = events->interrupt.injected;
3551         vcpu->arch.interrupt.nr = events->interrupt.nr;
3552         vcpu->arch.interrupt.soft = events->interrupt.soft;
3553         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3554                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3555                                                   events->interrupt.shadow);
3556
3557         vcpu->arch.nmi_injected = events->nmi.injected;
3558         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3559                 vcpu->arch.nmi_pending = events->nmi.pending;
3560         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3561
3562         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3563             lapic_in_kernel(vcpu))
3564                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3565
3566         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3567                 u32 hflags = vcpu->arch.hflags;
3568                 if (events->smi.smm)
3569                         hflags |= HF_SMM_MASK;
3570                 else
3571                         hflags &= ~HF_SMM_MASK;
3572                 kvm_set_hflags(vcpu, hflags);
3573
3574                 vcpu->arch.smi_pending = events->smi.pending;
3575
3576                 if (events->smi.smm) {
3577                         if (events->smi.smm_inside_nmi)
3578                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3579                         else
3580                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3581                         if (lapic_in_kernel(vcpu)) {
3582                                 if (events->smi.latched_init)
3583                                         set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3584                                 else
3585                                         clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3586                         }
3587                 }
3588         }
3589
3590         kvm_make_request(KVM_REQ_EVENT, vcpu);
3591
3592         return 0;
3593 }
3594
3595 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3596                                              struct kvm_debugregs *dbgregs)
3597 {
3598         unsigned long val;
3599
3600         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3601         kvm_get_dr(vcpu, 6, &val);
3602         dbgregs->dr6 = val;
3603         dbgregs->dr7 = vcpu->arch.dr7;
3604         dbgregs->flags = 0;
3605         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3606 }
3607
3608 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3609                                             struct kvm_debugregs *dbgregs)
3610 {
3611         if (dbgregs->flags)
3612                 return -EINVAL;
3613
3614         if (dbgregs->dr6 & ~0xffffffffull)
3615                 return -EINVAL;
3616         if (dbgregs->dr7 & ~0xffffffffull)
3617                 return -EINVAL;
3618
3619         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3620         kvm_update_dr0123(vcpu);
3621         vcpu->arch.dr6 = dbgregs->dr6;
3622         kvm_update_dr6(vcpu);
3623         vcpu->arch.dr7 = dbgregs->dr7;
3624         kvm_update_dr7(vcpu);
3625
3626         return 0;
3627 }
3628
3629 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3630
3631 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3632 {
3633         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3634         u64 xstate_bv = xsave->header.xfeatures;
3635         u64 valid;
3636
3637         /*
3638          * Copy legacy XSAVE area, to avoid complications with CPUID
3639          * leaves 0 and 1 in the loop below.
3640          */
3641         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3642
3643         /* Set XSTATE_BV */
3644         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
3645         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3646
3647         /*
3648          * Copy each region from the possibly compacted offset to the
3649          * non-compacted offset.
3650          */
3651         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3652         while (valid) {
3653                 u64 feature = valid & -valid;
3654                 int index = fls64(feature) - 1;
3655                 void *src = get_xsave_addr(xsave, feature);
3656
3657                 if (src) {
3658                         u32 size, offset, ecx, edx;
3659                         cpuid_count(XSTATE_CPUID, index,
3660                                     &size, &offset, &ecx, &edx);
3661                         if (feature == XFEATURE_MASK_PKRU)
3662                                 memcpy(dest + offset, &vcpu->arch.pkru,
3663                                        sizeof(vcpu->arch.pkru));
3664                         else
3665                                 memcpy(dest + offset, src, size);
3666
3667                 }
3668
3669                 valid -= feature;
3670         }
3671 }
3672
3673 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3674 {
3675         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3676         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3677         u64 valid;
3678
3679         /*
3680          * Copy legacy XSAVE area, to avoid complications with CPUID
3681          * leaves 0 and 1 in the loop below.
3682          */
3683         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3684
3685         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3686         xsave->header.xfeatures = xstate_bv;
3687         if (boot_cpu_has(X86_FEATURE_XSAVES))
3688                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3689
3690         /*
3691          * Copy each region from the non-compacted offset to the
3692          * possibly compacted offset.
3693          */
3694         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3695         while (valid) {
3696                 u64 feature = valid & -valid;
3697                 int index = fls64(feature) - 1;
3698                 void *dest = get_xsave_addr(xsave, feature);
3699
3700                 if (dest) {
3701                         u32 size, offset, ecx, edx;
3702                         cpuid_count(XSTATE_CPUID, index,
3703                                     &size, &offset, &ecx, &edx);
3704                         if (feature == XFEATURE_MASK_PKRU)
3705                                 memcpy(&vcpu->arch.pkru, src + offset,
3706                                        sizeof(vcpu->arch.pkru));
3707                         else
3708                                 memcpy(dest, src + offset, size);
3709                 }
3710
3711                 valid -= feature;
3712         }
3713 }
3714
3715 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3716                                          struct kvm_xsave *guest_xsave)
3717 {
3718         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3719                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3720                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3721         } else {
3722                 memcpy(guest_xsave->region,
3723                         &vcpu->arch.guest_fpu.state.fxsave,
3724                         sizeof(struct fxregs_state));
3725                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3726                         XFEATURE_MASK_FPSSE;
3727         }
3728 }
3729
3730 #define XSAVE_MXCSR_OFFSET 24
3731
3732 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3733                                         struct kvm_xsave *guest_xsave)
3734 {
3735         u64 xstate_bv =
3736                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3737         u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
3738
3739         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3740                 /*
3741                  * Here we allow setting states that are not present in
3742                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3743                  * with old userspace.
3744                  */
3745                 if (xstate_bv & ~kvm_supported_xcr0() ||
3746                         mxcsr & ~mxcsr_feature_mask)
3747                         return -EINVAL;
3748                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3749         } else {
3750                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
3751                         mxcsr & ~mxcsr_feature_mask)
3752                         return -EINVAL;
3753                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3754                         guest_xsave->region, sizeof(struct fxregs_state));
3755         }
3756         return 0;
3757 }
3758
3759 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3760                                         struct kvm_xcrs *guest_xcrs)
3761 {
3762         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3763                 guest_xcrs->nr_xcrs = 0;
3764                 return;
3765         }
3766
3767         guest_xcrs->nr_xcrs = 1;
3768         guest_xcrs->flags = 0;
3769         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3770         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3771 }
3772
3773 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3774                                        struct kvm_xcrs *guest_xcrs)
3775 {
3776         int i, r = 0;
3777
3778         if (!boot_cpu_has(X86_FEATURE_XSAVE))
3779                 return -EINVAL;
3780
3781         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3782                 return -EINVAL;
3783
3784         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3785                 /* Only support XCR0 currently */
3786                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3787                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3788                                 guest_xcrs->xcrs[i].value);
3789                         break;
3790                 }
3791         if (r)
3792                 r = -EINVAL;
3793         return r;
3794 }
3795
3796 /*
3797  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3798  * stopped by the hypervisor.  This function will be called from the host only.
3799  * EINVAL is returned when the host attempts to set the flag for a guest that
3800  * does not support pv clocks.
3801  */
3802 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3803 {
3804         if (!vcpu->arch.pv_time_enabled)
3805                 return -EINVAL;
3806         vcpu->arch.pvclock_set_guest_stopped_request = true;
3807         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3808         return 0;
3809 }
3810
3811 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
3812                                      struct kvm_enable_cap *cap)
3813 {
3814         int r;
3815         uint16_t vmcs_version;
3816         void __user *user_ptr;
3817
3818         if (cap->flags)
3819                 return -EINVAL;
3820
3821         switch (cap->cap) {
3822         case KVM_CAP_HYPERV_SYNIC2:
3823                 if (cap->args[0])
3824                         return -EINVAL;
3825         case KVM_CAP_HYPERV_SYNIC:
3826                 if (!irqchip_in_kernel(vcpu->kvm))
3827                         return -EINVAL;
3828                 return kvm_hv_activate_synic(vcpu, cap->cap ==
3829                                              KVM_CAP_HYPERV_SYNIC2);
3830         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3831                 r = kvm_x86_ops->nested_enable_evmcs(vcpu, &vmcs_version);
3832                 if (!r) {
3833                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
3834                         if (copy_to_user(user_ptr, &vmcs_version,
3835                                          sizeof(vmcs_version)))
3836                                 r = -EFAULT;
3837                 }
3838                 return r;
3839
3840         default:
3841                 return -EINVAL;
3842         }
3843 }
3844
3845 long kvm_arch_vcpu_ioctl(struct file *filp,
3846                          unsigned int ioctl, unsigned long arg)
3847 {
3848         struct kvm_vcpu *vcpu = filp->private_data;
3849         void __user *argp = (void __user *)arg;
3850         int r;
3851         union {
3852                 struct kvm_lapic_state *lapic;
3853                 struct kvm_xsave *xsave;
3854                 struct kvm_xcrs *xcrs;
3855                 void *buffer;
3856         } u;
3857
3858         vcpu_load(vcpu);
3859
3860         u.buffer = NULL;
3861         switch (ioctl) {
3862         case KVM_GET_LAPIC: {
3863                 r = -EINVAL;
3864                 if (!lapic_in_kernel(vcpu))
3865                         goto out;
3866                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3867
3868                 r = -ENOMEM;
3869                 if (!u.lapic)
3870                         goto out;
3871                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3872                 if (r)
3873                         goto out;
3874                 r = -EFAULT;
3875                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3876                         goto out;
3877                 r = 0;
3878                 break;
3879         }
3880         case KVM_SET_LAPIC: {
3881                 r = -EINVAL;
3882                 if (!lapic_in_kernel(vcpu))
3883                         goto out;
3884                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3885                 if (IS_ERR(u.lapic)) {
3886                         r = PTR_ERR(u.lapic);
3887                         goto out_nofree;
3888                 }
3889
3890                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3891                 break;
3892         }
3893         case KVM_INTERRUPT: {
3894                 struct kvm_interrupt irq;
3895
3896                 r = -EFAULT;
3897                 if (copy_from_user(&irq, argp, sizeof(irq)))
3898                         goto out;
3899                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3900                 break;
3901         }
3902         case KVM_NMI: {
3903                 r = kvm_vcpu_ioctl_nmi(vcpu);
3904                 break;
3905         }
3906         case KVM_SMI: {
3907                 r = kvm_vcpu_ioctl_smi(vcpu);
3908                 break;
3909         }
3910         case KVM_SET_CPUID: {
3911                 struct kvm_cpuid __user *cpuid_arg = argp;
3912                 struct kvm_cpuid cpuid;
3913
3914                 r = -EFAULT;
3915                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3916                         goto out;
3917                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3918                 break;
3919         }
3920         case KVM_SET_CPUID2: {
3921                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3922                 struct kvm_cpuid2 cpuid;
3923
3924                 r = -EFAULT;
3925                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3926                         goto out;
3927                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3928                                               cpuid_arg->entries);
3929                 break;
3930         }
3931         case KVM_GET_CPUID2: {
3932                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3933                 struct kvm_cpuid2 cpuid;
3934
3935                 r = -EFAULT;
3936                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3937                         goto out;
3938                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3939                                               cpuid_arg->entries);
3940                 if (r)
3941                         goto out;
3942                 r = -EFAULT;
3943                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3944                         goto out;
3945                 r = 0;
3946                 break;
3947         }
3948         case KVM_GET_MSRS: {
3949                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
3950                 r = msr_io(vcpu, argp, do_get_msr, 1);
3951                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3952                 break;
3953         }
3954         case KVM_SET_MSRS: {
3955                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
3956                 r = msr_io(vcpu, argp, do_set_msr, 0);
3957                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3958                 break;
3959         }
3960         case KVM_TPR_ACCESS_REPORTING: {
3961                 struct kvm_tpr_access_ctl tac;
3962
3963                 r = -EFAULT;
3964                 if (copy_from_user(&tac, argp, sizeof(tac)))
3965                         goto out;
3966                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3967                 if (r)
3968                         goto out;
3969                 r = -EFAULT;
3970                 if (copy_to_user(argp, &tac, sizeof(tac)))
3971                         goto out;
3972                 r = 0;
3973                 break;
3974         };
3975         case KVM_SET_VAPIC_ADDR: {
3976                 struct kvm_vapic_addr va;
3977                 int idx;
3978
3979                 r = -EINVAL;
3980                 if (!lapic_in_kernel(vcpu))
3981                         goto out;
3982                 r = -EFAULT;
3983                 if (copy_from_user(&va, argp, sizeof(va)))
3984                         goto out;
3985                 idx = srcu_read_lock(&vcpu->kvm->srcu);
3986                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3987                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3988                 break;
3989         }
3990         case KVM_X86_SETUP_MCE: {
3991                 u64 mcg_cap;
3992
3993                 r = -EFAULT;
3994                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
3995                         goto out;
3996                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3997                 break;
3998         }
3999         case KVM_X86_SET_MCE: {
4000                 struct kvm_x86_mce mce;
4001
4002                 r = -EFAULT;
4003                 if (copy_from_user(&mce, argp, sizeof(mce)))
4004                         goto out;
4005                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
4006                 break;
4007         }
4008         case KVM_GET_VCPU_EVENTS: {
4009                 struct kvm_vcpu_events events;
4010
4011                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
4012
4013                 r = -EFAULT;
4014                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
4015                         break;
4016                 r = 0;
4017                 break;
4018         }
4019         case KVM_SET_VCPU_EVENTS: {
4020                 struct kvm_vcpu_events events;
4021
4022                 r = -EFAULT;
4023                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
4024                         break;
4025
4026                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
4027                 break;
4028         }
4029         case KVM_GET_DEBUGREGS: {
4030                 struct kvm_debugregs dbgregs;
4031
4032                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
4033
4034                 r = -EFAULT;
4035                 if (copy_to_user(argp, &dbgregs,
4036                                  sizeof(struct kvm_debugregs)))
4037                         break;
4038                 r = 0;
4039                 break;
4040         }
4041         case KVM_SET_DEBUGREGS: {
4042                 struct kvm_debugregs dbgregs;
4043
4044                 r = -EFAULT;
4045                 if (copy_from_user(&dbgregs, argp,
4046                                    sizeof(struct kvm_debugregs)))
4047                         break;
4048
4049                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
4050                 break;
4051         }
4052         case KVM_GET_XSAVE: {
4053                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
4054                 r = -ENOMEM;
4055                 if (!u.xsave)
4056                         break;
4057
4058                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
4059
4060                 r = -EFAULT;
4061                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
4062                         break;
4063                 r = 0;
4064                 break;
4065         }
4066         case KVM_SET_XSAVE: {
4067                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
4068                 if (IS_ERR(u.xsave)) {
4069                         r = PTR_ERR(u.xsave);
4070                         goto out_nofree;
4071                 }
4072
4073                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
4074                 break;
4075         }
4076         case KVM_GET_XCRS: {
4077                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
4078                 r = -ENOMEM;
4079                 if (!u.xcrs)
4080                         break;
4081
4082                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
4083
4084                 r = -EFAULT;
4085                 if (copy_to_user(argp, u.xcrs,
4086                                  sizeof(struct kvm_xcrs)))
4087                         break;
4088                 r = 0;
4089                 break;
4090         }
4091         case KVM_SET_XCRS: {
4092                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
4093                 if (IS_ERR(u.xcrs)) {
4094                         r = PTR_ERR(u.xcrs);
4095                         goto out_nofree;
4096                 }
4097
4098                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
4099                 break;
4100         }
4101         case KVM_SET_TSC_KHZ: {
4102                 u32 user_tsc_khz;
4103
4104                 r = -EINVAL;
4105                 user_tsc_khz = (u32)arg;
4106
4107                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
4108                         goto out;
4109
4110                 if (user_tsc_khz == 0)
4111                         user_tsc_khz = tsc_khz;
4112
4113                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
4114                         r = 0;
4115
4116                 goto out;
4117         }
4118         case KVM_GET_TSC_KHZ: {
4119                 r = vcpu->arch.virtual_tsc_khz;
4120                 goto out;
4121         }
4122         case KVM_KVMCLOCK_CTRL: {
4123                 r = kvm_set_guest_paused(vcpu);
4124                 goto out;
4125         }
4126         case KVM_ENABLE_CAP: {
4127                 struct kvm_enable_cap cap;
4128
4129                 r = -EFAULT;
4130                 if (copy_from_user(&cap, argp, sizeof(cap)))
4131                         goto out;
4132                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
4133                 break;
4134         }
4135         case KVM_GET_NESTED_STATE: {
4136                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4137                 u32 user_data_size;
4138
4139                 r = -EINVAL;
4140                 if (!kvm_x86_ops->get_nested_state)
4141                         break;
4142
4143                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
4144                 r = -EFAULT;
4145                 if (get_user(user_data_size, &user_kvm_nested_state->size))
4146                         break;
4147
4148                 r = kvm_x86_ops->get_nested_state(vcpu, user_kvm_nested_state,
4149                                                   user_data_size);
4150                 if (r < 0)
4151                         break;
4152
4153                 if (r > user_data_size) {
4154                         if (put_user(r, &user_kvm_nested_state->size))
4155                                 r = -EFAULT;
4156                         else
4157                                 r = -E2BIG;
4158                         break;
4159                 }
4160
4161                 r = 0;
4162                 break;
4163         }
4164         case KVM_SET_NESTED_STATE: {
4165                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4166                 struct kvm_nested_state kvm_state;
4167
4168                 r = -EINVAL;
4169                 if (!kvm_x86_ops->set_nested_state)
4170                         break;
4171
4172                 r = -EFAULT;
4173                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
4174                         break;
4175
4176                 r = -EINVAL;
4177                 if (kvm_state.size < sizeof(kvm_state))
4178                         break;
4179
4180                 if (kvm_state.flags &
4181                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
4182                       | KVM_STATE_NESTED_EVMCS))
4183                         break;
4184
4185                 /* nested_run_pending implies guest_mode.  */
4186                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
4187                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
4188                         break;
4189
4190                 r = kvm_x86_ops->set_nested_state(vcpu, user_kvm_nested_state, &kvm_state);
4191                 break;
4192         }
4193         default:
4194                 r = -EINVAL;
4195         }
4196 out:
4197         kfree(u.buffer);
4198 out_nofree:
4199         vcpu_put(vcpu);
4200         return r;
4201 }
4202
4203 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
4204 {
4205         return VM_FAULT_SIGBUS;
4206 }
4207
4208 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
4209 {
4210         int ret;
4211
4212         if (addr > (unsigned int)(-3 * PAGE_SIZE))
4213                 return -EINVAL;
4214         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
4215         return ret;
4216 }
4217
4218 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
4219                                               u64 ident_addr)
4220 {
4221         return kvm_x86_ops->set_identity_map_addr(kvm, ident_addr);
4222 }
4223
4224 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
4225                                           u32 kvm_nr_mmu_pages)
4226 {
4227         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
4228                 return -EINVAL;
4229
4230         mutex_lock(&kvm->slots_lock);
4231
4232         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
4233         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
4234
4235         mutex_unlock(&kvm->slots_lock);
4236         return 0;
4237 }
4238
4239 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
4240 {
4241         return kvm->arch.n_max_mmu_pages;
4242 }
4243
4244 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4245 {
4246         struct kvm_pic *pic = kvm->arch.vpic;
4247         int r;
4248
4249         r = 0;
4250         switch (chip->chip_id) {
4251         case KVM_IRQCHIP_PIC_MASTER:
4252                 memcpy(&chip->chip.pic, &pic->pics[0],
4253                         sizeof(struct kvm_pic_state));
4254                 break;
4255         case KVM_IRQCHIP_PIC_SLAVE:
4256                 memcpy(&chip->chip.pic, &pic->pics[1],
4257                         sizeof(struct kvm_pic_state));
4258                 break;
4259         case KVM_IRQCHIP_IOAPIC:
4260                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
4261                 break;
4262         default:
4263                 r = -EINVAL;
4264                 break;
4265         }
4266         return r;
4267 }
4268
4269 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4270 {
4271         struct kvm_pic *pic = kvm->arch.vpic;
4272         int r;
4273
4274         r = 0;
4275         switch (chip->chip_id) {
4276         case KVM_IRQCHIP_PIC_MASTER:
4277                 spin_lock(&pic->lock);
4278                 memcpy(&pic->pics[0], &chip->chip.pic,
4279                         sizeof(struct kvm_pic_state));
4280                 spin_unlock(&pic->lock);
4281                 break;
4282         case KVM_IRQCHIP_PIC_SLAVE:
4283                 spin_lock(&pic->lock);
4284                 memcpy(&pic->pics[1], &chip->chip.pic,
4285                         sizeof(struct kvm_pic_state));
4286                 spin_unlock(&pic->lock);
4287                 break;
4288         case KVM_IRQCHIP_IOAPIC:
4289                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
4290                 break;
4291         default:
4292                 r = -EINVAL;
4293                 break;
4294         }
4295         kvm_pic_update_irq(pic);
4296         return r;
4297 }
4298
4299 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4300 {
4301         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
4302
4303         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
4304
4305         mutex_lock(&kps->lock);
4306         memcpy(ps, &kps->channels, sizeof(*ps));
4307         mutex_unlock(&kps->lock);
4308         return 0;
4309 }
4310
4311 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4312 {
4313         int i;
4314         struct kvm_pit *pit = kvm->arch.vpit;
4315
4316         mutex_lock(&pit->pit_state.lock);
4317         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
4318         for (i = 0; i < 3; i++)
4319                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
4320         mutex_unlock(&pit->pit_state.lock);
4321         return 0;
4322 }
4323
4324 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4325 {
4326         mutex_lock(&kvm->arch.vpit->pit_state.lock);
4327         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
4328                 sizeof(ps->channels));
4329         ps->flags = kvm->arch.vpit->pit_state.flags;
4330         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
4331         memset(&ps->reserved, 0, sizeof(ps->reserved));
4332         return 0;
4333 }
4334
4335 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4336 {
4337         int start = 0;
4338         int i;
4339         u32 prev_legacy, cur_legacy;
4340         struct kvm_pit *pit = kvm->arch.vpit;
4341
4342         mutex_lock(&pit->pit_state.lock);
4343         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
4344         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
4345         if (!prev_legacy && cur_legacy)
4346                 start = 1;
4347         memcpy(&pit->pit_state.channels, &ps->channels,
4348                sizeof(pit->pit_state.channels));
4349         pit->pit_state.flags = ps->flags;
4350         for (i = 0; i < 3; i++)
4351                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
4352                                    start && i == 0);
4353         mutex_unlock(&pit->pit_state.lock);
4354         return 0;
4355 }
4356
4357 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
4358                                  struct kvm_reinject_control *control)
4359 {
4360         struct kvm_pit *pit = kvm->arch.vpit;
4361
4362         if (!pit)
4363                 return -ENXIO;
4364
4365         /* pit->pit_state.lock was overloaded to prevent userspace from getting
4366          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
4367          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
4368          */
4369         mutex_lock(&pit->pit_state.lock);
4370         kvm_pit_set_reinject(pit, control->pit_reinject);
4371         mutex_unlock(&pit->pit_state.lock);
4372
4373         return 0;
4374 }
4375
4376 /**
4377  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
4378  * @kvm: kvm instance
4379  * @log: slot id and address to which we copy the log
4380  *
4381  * Steps 1-4 below provide general overview of dirty page logging. See
4382  * kvm_get_dirty_log_protect() function description for additional details.
4383  *
4384  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
4385  * always flush the TLB (step 4) even if previous step failed  and the dirty
4386  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
4387  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
4388  * writes will be marked dirty for next log read.
4389  *
4390  *   1. Take a snapshot of the bit and clear it if needed.
4391  *   2. Write protect the corresponding page.
4392  *   3. Copy the snapshot to the userspace.
4393  *   4. Flush TLB's if needed.
4394  */
4395 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
4396 {
4397         bool is_dirty = false;
4398         int r;
4399
4400         mutex_lock(&kvm->slots_lock);
4401
4402         /*
4403          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4404          */
4405         if (kvm_x86_ops->flush_log_dirty)
4406                 kvm_x86_ops->flush_log_dirty(kvm);
4407
4408         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
4409
4410         /*
4411          * All the TLBs can be flushed out of mmu lock, see the comments in
4412          * kvm_mmu_slot_remove_write_access().
4413          */
4414         lockdep_assert_held(&kvm->slots_lock);
4415         if (is_dirty)
4416                 kvm_flush_remote_tlbs(kvm);
4417
4418         mutex_unlock(&kvm->slots_lock);
4419         return r;
4420 }
4421
4422 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
4423                         bool line_status)
4424 {
4425         if (!irqchip_in_kernel(kvm))
4426                 return -ENXIO;
4427
4428         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
4429                                         irq_event->irq, irq_event->level,
4430                                         line_status);
4431         return 0;
4432 }
4433
4434 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
4435                                    struct kvm_enable_cap *cap)
4436 {
4437         int r;
4438
4439         if (cap->flags)
4440                 return -EINVAL;
4441
4442         switch (cap->cap) {
4443         case KVM_CAP_DISABLE_QUIRKS:
4444                 kvm->arch.disabled_quirks = cap->args[0];
4445                 r = 0;
4446                 break;
4447         case KVM_CAP_SPLIT_IRQCHIP: {
4448                 mutex_lock(&kvm->lock);
4449                 r = -EINVAL;
4450                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
4451                         goto split_irqchip_unlock;
4452                 r = -EEXIST;
4453                 if (irqchip_in_kernel(kvm))
4454                         goto split_irqchip_unlock;
4455                 if (kvm->created_vcpus)
4456                         goto split_irqchip_unlock;
4457                 r = kvm_setup_empty_irq_routing(kvm);
4458                 if (r)
4459                         goto split_irqchip_unlock;
4460                 /* Pairs with irqchip_in_kernel. */
4461                 smp_wmb();
4462                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
4463                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
4464                 r = 0;
4465 split_irqchip_unlock:
4466                 mutex_unlock(&kvm->lock);
4467                 break;
4468         }
4469         case KVM_CAP_X2APIC_API:
4470                 r = -EINVAL;
4471                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
4472                         break;
4473
4474                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
4475                         kvm->arch.x2apic_format = true;
4476                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
4477                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
4478
4479                 r = 0;
4480                 break;
4481         case KVM_CAP_X86_DISABLE_EXITS:
4482                 r = -EINVAL;
4483                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
4484                         break;
4485
4486                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
4487                         kvm_can_mwait_in_guest())
4488                         kvm->arch.mwait_in_guest = true;
4489                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
4490                         kvm->arch.hlt_in_guest = true;
4491                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
4492                         kvm->arch.pause_in_guest = true;
4493                 r = 0;
4494                 break;
4495         case KVM_CAP_MSR_PLATFORM_INFO:
4496                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
4497                 r = 0;
4498                 break;
4499         case KVM_CAP_EXCEPTION_PAYLOAD:
4500                 kvm->arch.exception_payload_enabled = cap->args[0];
4501                 r = 0;
4502                 break;
4503         default:
4504                 r = -EINVAL;
4505                 break;
4506         }
4507         return r;
4508 }
4509
4510 long kvm_arch_vm_ioctl(struct file *filp,
4511                        unsigned int ioctl, unsigned long arg)
4512 {
4513         struct kvm *kvm = filp->private_data;
4514         void __user *argp = (void __user *)arg;
4515         int r = -ENOTTY;
4516         /*
4517          * This union makes it completely explicit to gcc-3.x
4518          * that these two variables' stack usage should be
4519          * combined, not added together.
4520          */
4521         union {
4522                 struct kvm_pit_state ps;
4523                 struct kvm_pit_state2 ps2;
4524                 struct kvm_pit_config pit_config;
4525         } u;
4526
4527         switch (ioctl) {
4528         case KVM_SET_TSS_ADDR:
4529                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
4530                 break;
4531         case KVM_SET_IDENTITY_MAP_ADDR: {
4532                 u64 ident_addr;
4533
4534                 mutex_lock(&kvm->lock);
4535                 r = -EINVAL;
4536                 if (kvm->created_vcpus)
4537                         goto set_identity_unlock;
4538                 r = -EFAULT;
4539                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
4540                         goto set_identity_unlock;
4541                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
4542 set_identity_unlock:
4543                 mutex_unlock(&kvm->lock);
4544                 break;
4545         }
4546         case KVM_SET_NR_MMU_PAGES:
4547                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
4548                 break;
4549         case KVM_GET_NR_MMU_PAGES:
4550                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
4551                 break;
4552         case KVM_CREATE_IRQCHIP: {
4553                 mutex_lock(&kvm->lock);
4554
4555                 r = -EEXIST;
4556                 if (irqchip_in_kernel(kvm))
4557                         goto create_irqchip_unlock;
4558
4559                 r = -EINVAL;
4560                 if (kvm->created_vcpus)
4561                         goto create_irqchip_unlock;
4562
4563                 r = kvm_pic_init(kvm);
4564                 if (r)
4565                         goto create_irqchip_unlock;
4566
4567                 r = kvm_ioapic_init(kvm);
4568                 if (r) {
4569                         kvm_pic_destroy(kvm);
4570                         goto create_irqchip_unlock;
4571                 }
4572
4573                 r = kvm_setup_default_irq_routing(kvm);
4574                 if (r) {
4575                         kvm_ioapic_destroy(kvm);
4576                         kvm_pic_destroy(kvm);
4577                         goto create_irqchip_unlock;
4578                 }
4579                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4580                 smp_wmb();
4581                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
4582         create_irqchip_unlock:
4583                 mutex_unlock(&kvm->lock);
4584                 break;
4585         }
4586         case KVM_CREATE_PIT:
4587                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
4588                 goto create_pit;
4589         case KVM_CREATE_PIT2:
4590                 r = -EFAULT;
4591                 if (copy_from_user(&u.pit_config, argp,
4592                                    sizeof(struct kvm_pit_config)))
4593                         goto out;
4594         create_pit:
4595                 mutex_lock(&kvm->lock);
4596                 r = -EEXIST;
4597                 if (kvm->arch.vpit)
4598                         goto create_pit_unlock;
4599                 r = -ENOMEM;
4600                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
4601                 if (kvm->arch.vpit)
4602                         r = 0;
4603         create_pit_unlock:
4604                 mutex_unlock(&kvm->lock);
4605                 break;
4606         case KVM_GET_IRQCHIP: {
4607                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4608                 struct kvm_irqchip *chip;
4609
4610                 chip = memdup_user(argp, sizeof(*chip));
4611                 if (IS_ERR(chip)) {
4612                         r = PTR_ERR(chip);
4613                         goto out;
4614                 }
4615
4616                 r = -ENXIO;
4617                 if (!irqchip_kernel(kvm))
4618                         goto get_irqchip_out;
4619                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
4620                 if (r)
4621                         goto get_irqchip_out;
4622                 r = -EFAULT;
4623                 if (copy_to_user(argp, chip, sizeof(*chip)))
4624                         goto get_irqchip_out;
4625                 r = 0;
4626         get_irqchip_out:
4627                 kfree(chip);
4628                 break;
4629         }
4630         case KVM_SET_IRQCHIP: {
4631                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4632                 struct kvm_irqchip *chip;
4633
4634                 chip = memdup_user(argp, sizeof(*chip));
4635                 if (IS_ERR(chip)) {
4636                         r = PTR_ERR(chip);
4637                         goto out;
4638                 }
4639
4640                 r = -ENXIO;
4641                 if (!irqchip_kernel(kvm))
4642                         goto set_irqchip_out;
4643                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4644                 if (r)
4645                         goto set_irqchip_out;
4646                 r = 0;
4647         set_irqchip_out:
4648                 kfree(chip);
4649                 break;
4650         }
4651         case KVM_GET_PIT: {
4652                 r = -EFAULT;
4653                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4654                         goto out;
4655                 r = -ENXIO;
4656                 if (!kvm->arch.vpit)
4657                         goto out;
4658                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4659                 if (r)
4660                         goto out;
4661                 r = -EFAULT;
4662                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4663                         goto out;
4664                 r = 0;
4665                 break;
4666         }
4667         case KVM_SET_PIT: {
4668                 r = -EFAULT;
4669                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
4670                         goto out;
4671                 r = -ENXIO;
4672                 if (!kvm->arch.vpit)
4673                         goto out;
4674                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4675                 break;
4676         }
4677         case KVM_GET_PIT2: {
4678                 r = -ENXIO;
4679                 if (!kvm->arch.vpit)
4680                         goto out;
4681                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4682                 if (r)
4683                         goto out;
4684                 r = -EFAULT;
4685                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4686                         goto out;
4687                 r = 0;
4688                 break;
4689         }
4690         case KVM_SET_PIT2: {
4691                 r = -EFAULT;
4692                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4693                         goto out;
4694                 r = -ENXIO;
4695                 if (!kvm->arch.vpit)
4696                         goto out;
4697                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4698                 break;
4699         }
4700         case KVM_REINJECT_CONTROL: {
4701                 struct kvm_reinject_control control;
4702                 r =  -EFAULT;
4703                 if (copy_from_user(&control, argp, sizeof(control)))
4704                         goto out;
4705                 r = kvm_vm_ioctl_reinject(kvm, &control);
4706                 break;
4707         }
4708         case KVM_SET_BOOT_CPU_ID:
4709                 r = 0;
4710                 mutex_lock(&kvm->lock);
4711                 if (kvm->created_vcpus)
4712                         r = -EBUSY;
4713                 else
4714                         kvm->arch.bsp_vcpu_id = arg;
4715                 mutex_unlock(&kvm->lock);
4716                 break;
4717         case KVM_XEN_HVM_CONFIG: {
4718                 struct kvm_xen_hvm_config xhc;
4719                 r = -EFAULT;
4720                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
4721                         goto out;
4722                 r = -EINVAL;
4723                 if (xhc.flags)
4724                         goto out;
4725                 memcpy(&kvm->arch.xen_hvm_config, &xhc, sizeof(xhc));
4726                 r = 0;
4727                 break;
4728         }
4729         case KVM_SET_CLOCK: {
4730                 struct kvm_clock_data user_ns;
4731                 u64 now_ns;
4732
4733                 r = -EFAULT;
4734                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4735                         goto out;
4736
4737                 r = -EINVAL;
4738                 if (user_ns.flags)
4739                         goto out;
4740
4741                 r = 0;
4742                 /*
4743                  * TODO: userspace has to take care of races with VCPU_RUN, so
4744                  * kvm_gen_update_masterclock() can be cut down to locked
4745                  * pvclock_update_vm_gtod_copy().
4746                  */
4747                 kvm_gen_update_masterclock(kvm);
4748                 now_ns = get_kvmclock_ns(kvm);
4749                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
4750                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
4751                 break;
4752         }
4753         case KVM_GET_CLOCK: {
4754                 struct kvm_clock_data user_ns;
4755                 u64 now_ns;
4756
4757                 now_ns = get_kvmclock_ns(kvm);
4758                 user_ns.clock = now_ns;
4759                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
4760                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4761
4762                 r = -EFAULT;
4763                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4764                         goto out;
4765                 r = 0;
4766                 break;
4767         }
4768         case KVM_ENABLE_CAP: {
4769                 struct kvm_enable_cap cap;
4770
4771                 r = -EFAULT;
4772                 if (copy_from_user(&cap, argp, sizeof(cap)))
4773                         goto out;
4774                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
4775                 break;
4776         }
4777         case KVM_MEMORY_ENCRYPT_OP: {
4778                 r = -ENOTTY;
4779                 if (kvm_x86_ops->mem_enc_op)
4780                         r = kvm_x86_ops->mem_enc_op(kvm, argp);
4781                 break;
4782         }
4783         case KVM_MEMORY_ENCRYPT_REG_REGION: {
4784                 struct kvm_enc_region region;
4785
4786                 r = -EFAULT;
4787                 if (copy_from_user(&region, argp, sizeof(region)))
4788                         goto out;
4789
4790                 r = -ENOTTY;
4791                 if (kvm_x86_ops->mem_enc_reg_region)
4792                         r = kvm_x86_ops->mem_enc_reg_region(kvm, &region);
4793                 break;
4794         }
4795         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
4796                 struct kvm_enc_region region;
4797
4798                 r = -EFAULT;
4799                 if (copy_from_user(&region, argp, sizeof(region)))
4800                         goto out;
4801
4802                 r = -ENOTTY;
4803                 if (kvm_x86_ops->mem_enc_unreg_region)
4804                         r = kvm_x86_ops->mem_enc_unreg_region(kvm, &region);
4805                 break;
4806         }
4807         case KVM_HYPERV_EVENTFD: {
4808                 struct kvm_hyperv_eventfd hvevfd;
4809
4810                 r = -EFAULT;
4811                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
4812                         goto out;
4813                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
4814                 break;
4815         }
4816         default:
4817                 r = -ENOTTY;
4818         }
4819 out:
4820         return r;
4821 }
4822
4823 static void kvm_init_msr_list(void)
4824 {
4825         u32 dummy[2];
4826         unsigned i, j;
4827
4828         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4829                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4830                         continue;
4831
4832                 /*
4833                  * Even MSRs that are valid in the host may not be exposed
4834                  * to the guests in some cases.
4835                  */
4836                 switch (msrs_to_save[i]) {
4837                 case MSR_IA32_BNDCFGS:
4838                         if (!kvm_mpx_supported())
4839                                 continue;
4840                         break;
4841                 case MSR_TSC_AUX:
4842                         if (!kvm_x86_ops->rdtscp_supported())
4843                                 continue;
4844                         break;
4845                 default:
4846                         break;
4847                 }
4848
4849                 if (j < i)
4850                         msrs_to_save[j] = msrs_to_save[i];
4851                 j++;
4852         }
4853         num_msrs_to_save = j;
4854
4855         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4856                 if (!kvm_x86_ops->has_emulated_msr(emulated_msrs[i]))
4857                         continue;
4858
4859                 if (j < i)
4860                         emulated_msrs[j] = emulated_msrs[i];
4861                 j++;
4862         }
4863         num_emulated_msrs = j;
4864
4865         for (i = j = 0; i < ARRAY_SIZE(msr_based_features); i++) {
4866                 struct kvm_msr_entry msr;
4867
4868                 msr.index = msr_based_features[i];
4869                 if (kvm_get_msr_feature(&msr))
4870                         continue;
4871
4872                 if (j < i)
4873                         msr_based_features[j] = msr_based_features[i];
4874                 j++;
4875         }
4876         num_msr_based_features = j;
4877 }
4878
4879 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4880                            const void *v)
4881 {
4882         int handled = 0;
4883         int n;
4884
4885         do {
4886                 n = min(len, 8);
4887                 if (!(lapic_in_kernel(vcpu) &&
4888                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4889                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4890                         break;
4891                 handled += n;
4892                 addr += n;
4893                 len -= n;
4894                 v += n;
4895         } while (len);
4896
4897         return handled;
4898 }
4899
4900 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4901 {
4902         int handled = 0;
4903         int n;
4904
4905         do {
4906                 n = min(len, 8);
4907                 if (!(lapic_in_kernel(vcpu) &&
4908                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4909                                          addr, n, v))
4910                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4911                         break;
4912                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
4913                 handled += n;
4914                 addr += n;
4915                 len -= n;
4916                 v += n;
4917         } while (len);
4918
4919         return handled;
4920 }
4921
4922 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4923                         struct kvm_segment *var, int seg)
4924 {
4925         kvm_x86_ops->set_segment(vcpu, var, seg);
4926 }
4927
4928 void kvm_get_segment(struct kvm_vcpu *vcpu,
4929                      struct kvm_segment *var, int seg)
4930 {
4931         kvm_x86_ops->get_segment(vcpu, var, seg);
4932 }
4933
4934 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4935                            struct x86_exception *exception)
4936 {
4937         gpa_t t_gpa;
4938
4939         BUG_ON(!mmu_is_nested(vcpu));
4940
4941         /* NPT walks are always user-walks */
4942         access |= PFERR_USER_MASK;
4943         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
4944
4945         return t_gpa;
4946 }
4947
4948 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4949                               struct x86_exception *exception)
4950 {
4951         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4952         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4953 }
4954
4955  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4956                                 struct x86_exception *exception)
4957 {
4958         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4959         access |= PFERR_FETCH_MASK;
4960         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4961 }
4962
4963 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4964                                struct x86_exception *exception)
4965 {
4966         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4967         access |= PFERR_WRITE_MASK;
4968         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4969 }
4970
4971 /* uses this to access any guest's mapped memory without checking CPL */
4972 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4973                                 struct x86_exception *exception)
4974 {
4975         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4976 }
4977
4978 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4979                                       struct kvm_vcpu *vcpu, u32 access,
4980                                       struct x86_exception *exception)
4981 {
4982         void *data = val;
4983         int r = X86EMUL_CONTINUE;
4984
4985         while (bytes) {
4986                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4987                                                             exception);
4988                 unsigned offset = addr & (PAGE_SIZE-1);
4989                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4990                 int ret;
4991
4992                 if (gpa == UNMAPPED_GVA)
4993                         return X86EMUL_PROPAGATE_FAULT;
4994                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4995                                                offset, toread);
4996                 if (ret < 0) {
4997                         r = X86EMUL_IO_NEEDED;
4998                         goto out;
4999                 }
5000
5001                 bytes -= toread;
5002                 data += toread;
5003                 addr += toread;
5004         }
5005 out:
5006         return r;
5007 }
5008
5009 /* used for instruction fetching */
5010 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
5011                                 gva_t addr, void *val, unsigned int bytes,
5012                                 struct x86_exception *exception)
5013 {
5014         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5015         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5016         unsigned offset;
5017         int ret;
5018
5019         /* Inline kvm_read_guest_virt_helper for speed.  */
5020         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
5021                                                     exception);
5022         if (unlikely(gpa == UNMAPPED_GVA))
5023                 return X86EMUL_PROPAGATE_FAULT;
5024
5025         offset = addr & (PAGE_SIZE-1);
5026         if (WARN_ON(offset + bytes > PAGE_SIZE))
5027                 bytes = (unsigned)PAGE_SIZE - offset;
5028         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
5029                                        offset, bytes);
5030         if (unlikely(ret < 0))
5031                 return X86EMUL_IO_NEEDED;
5032
5033         return X86EMUL_CONTINUE;
5034 }
5035
5036 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
5037                                gva_t addr, void *val, unsigned int bytes,
5038                                struct x86_exception *exception)
5039 {
5040         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5041
5042         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
5043                                           exception);
5044 }
5045 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
5046
5047 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
5048                              gva_t addr, void *val, unsigned int bytes,
5049                              struct x86_exception *exception, bool system)
5050 {
5051         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5052         u32 access = 0;
5053
5054         if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
5055                 access |= PFERR_USER_MASK;
5056
5057         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
5058 }
5059
5060 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
5061                 unsigned long addr, void *val, unsigned int bytes)
5062 {
5063         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5064         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
5065
5066         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
5067 }
5068
5069 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5070                                       struct kvm_vcpu *vcpu, u32 access,
5071                                       struct x86_exception *exception)
5072 {
5073         void *data = val;
5074         int r = X86EMUL_CONTINUE;
5075
5076         while (bytes) {
5077                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
5078                                                              access,
5079                                                              exception);
5080                 unsigned offset = addr & (PAGE_SIZE-1);
5081                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
5082                 int ret;
5083
5084                 if (gpa == UNMAPPED_GVA)
5085                         return X86EMUL_PROPAGATE_FAULT;
5086                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
5087                 if (ret < 0) {
5088                         r = X86EMUL_IO_NEEDED;
5089                         goto out;
5090                 }
5091
5092                 bytes -= towrite;
5093                 data += towrite;
5094                 addr += towrite;
5095         }
5096 out:
5097         return r;
5098 }
5099
5100 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
5101                               unsigned int bytes, struct x86_exception *exception,
5102                               bool system)
5103 {
5104         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5105         u32 access = PFERR_WRITE_MASK;
5106
5107         if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
5108                 access |= PFERR_USER_MASK;
5109
5110         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5111                                            access, exception);
5112 }
5113
5114 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
5115                                 unsigned int bytes, struct x86_exception *exception)
5116 {
5117         /* kvm_write_guest_virt_system can pull in tons of pages. */
5118         vcpu->arch.l1tf_flush_l1d = true;
5119
5120         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5121                                            PFERR_WRITE_MASK, exception);
5122 }
5123 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
5124
5125 int handle_ud(struct kvm_vcpu *vcpu)
5126 {
5127         int emul_type = EMULTYPE_TRAP_UD;
5128         enum emulation_result er;
5129         char sig[5]; /* ud2; .ascii "kvm" */
5130         struct x86_exception e;
5131
5132         if (force_emulation_prefix &&
5133             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
5134                                 sig, sizeof(sig), &e) == 0 &&
5135             memcmp(sig, "\xf\xbkvm", sizeof(sig)) == 0) {
5136                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
5137                 emul_type = 0;
5138         }
5139
5140         er = kvm_emulate_instruction(vcpu, emul_type);
5141         if (er == EMULATE_USER_EXIT)
5142                 return 0;
5143         if (er != EMULATE_DONE)
5144                 kvm_queue_exception(vcpu, UD_VECTOR);
5145         return 1;
5146 }
5147 EXPORT_SYMBOL_GPL(handle_ud);
5148
5149 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
5150                             gpa_t gpa, bool write)
5151 {
5152         /* For APIC access vmexit */
5153         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5154                 return 1;
5155
5156         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
5157                 trace_vcpu_match_mmio(gva, gpa, write, true);
5158                 return 1;
5159         }
5160
5161         return 0;
5162 }
5163
5164 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
5165                                 gpa_t *gpa, struct x86_exception *exception,
5166                                 bool write)
5167 {
5168         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
5169                 | (write ? PFERR_WRITE_MASK : 0);
5170
5171         /*
5172          * currently PKRU is only applied to ept enabled guest so
5173          * there is no pkey in EPT page table for L1 guest or EPT
5174          * shadow page table for L2 guest.
5175          */
5176         if (vcpu_match_mmio_gva(vcpu, gva)
5177             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
5178                                  vcpu->arch.access, 0, access)) {
5179                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
5180                                         (gva & (PAGE_SIZE - 1));
5181                 trace_vcpu_match_mmio(gva, *gpa, write, false);
5182                 return 1;
5183         }
5184
5185         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5186
5187         if (*gpa == UNMAPPED_GVA)
5188                 return -1;
5189
5190         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
5191 }
5192
5193 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
5194                         const void *val, int bytes)
5195 {
5196         int ret;
5197
5198         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
5199         if (ret < 0)
5200                 return 0;
5201         kvm_page_track_write(vcpu, gpa, val, bytes);
5202         return 1;
5203 }
5204
5205 struct read_write_emulator_ops {
5206         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
5207                                   int bytes);
5208         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
5209                                   void *val, int bytes);
5210         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
5211                                int bytes, void *val);
5212         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
5213                                     void *val, int bytes);
5214         bool write;
5215 };
5216
5217 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
5218 {
5219         if (vcpu->mmio_read_completed) {
5220                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
5221                                vcpu->mmio_fragments[0].gpa, val);
5222                 vcpu->mmio_read_completed = 0;
5223                 return 1;
5224         }
5225
5226         return 0;
5227 }
5228
5229 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
5230                         void *val, int bytes)
5231 {
5232         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
5233 }
5234
5235 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
5236                          void *val, int bytes)
5237 {
5238         return emulator_write_phys(vcpu, gpa, val, bytes);
5239 }
5240
5241 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
5242 {
5243         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
5244         return vcpu_mmio_write(vcpu, gpa, bytes, val);
5245 }
5246
5247 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5248                           void *val, int bytes)
5249 {
5250         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
5251         return X86EMUL_IO_NEEDED;
5252 }
5253
5254 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5255                            void *val, int bytes)
5256 {
5257         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
5258
5259         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
5260         return X86EMUL_CONTINUE;
5261 }
5262
5263 static const struct read_write_emulator_ops read_emultor = {
5264         .read_write_prepare = read_prepare,
5265         .read_write_emulate = read_emulate,
5266         .read_write_mmio = vcpu_mmio_read,
5267         .read_write_exit_mmio = read_exit_mmio,
5268 };
5269
5270 static const struct read_write_emulator_ops write_emultor = {
5271         .read_write_emulate = write_emulate,
5272         .read_write_mmio = write_mmio,
5273         .read_write_exit_mmio = write_exit_mmio,
5274         .write = true,
5275 };
5276
5277 static int emulator_read_write_onepage(unsigned long addr, void *val,
5278                                        unsigned int bytes,
5279                                        struct x86_exception *exception,
5280                                        struct kvm_vcpu *vcpu,
5281                                        const struct read_write_emulator_ops *ops)
5282 {
5283         gpa_t gpa;
5284         int handled, ret;
5285         bool write = ops->write;
5286         struct kvm_mmio_fragment *frag;
5287         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5288
5289         /*
5290          * If the exit was due to a NPF we may already have a GPA.
5291          * If the GPA is present, use it to avoid the GVA to GPA table walk.
5292          * Note, this cannot be used on string operations since string
5293          * operation using rep will only have the initial GPA from the NPF
5294          * occurred.
5295          */
5296         if (vcpu->arch.gpa_available &&
5297             emulator_can_use_gpa(ctxt) &&
5298             (addr & ~PAGE_MASK) == (vcpu->arch.gpa_val & ~PAGE_MASK)) {
5299                 gpa = vcpu->arch.gpa_val;
5300                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
5301         } else {
5302                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
5303                 if (ret < 0)
5304                         return X86EMUL_PROPAGATE_FAULT;
5305         }
5306
5307         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
5308                 return X86EMUL_CONTINUE;
5309
5310         /*
5311          * Is this MMIO handled locally?
5312          */
5313         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
5314         if (handled == bytes)
5315                 return X86EMUL_CONTINUE;
5316
5317         gpa += handled;
5318         bytes -= handled;
5319         val += handled;
5320
5321         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
5322         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
5323         frag->gpa = gpa;
5324         frag->data = val;
5325         frag->len = bytes;
5326         return X86EMUL_CONTINUE;
5327 }
5328
5329 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
5330                         unsigned long addr,
5331                         void *val, unsigned int bytes,
5332                         struct x86_exception *exception,
5333                         const struct read_write_emulator_ops *ops)
5334 {
5335         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5336         gpa_t gpa;
5337         int rc;
5338
5339         if (ops->read_write_prepare &&
5340                   ops->read_write_prepare(vcpu, val, bytes))
5341                 return X86EMUL_CONTINUE;
5342
5343         vcpu->mmio_nr_fragments = 0;
5344
5345         /* Crossing a page boundary? */
5346         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
5347                 int now;
5348
5349                 now = -addr & ~PAGE_MASK;
5350                 rc = emulator_read_write_onepage(addr, val, now, exception,
5351                                                  vcpu, ops);
5352
5353                 if (rc != X86EMUL_CONTINUE)
5354                         return rc;
5355                 addr += now;
5356                 if (ctxt->mode != X86EMUL_MODE_PROT64)
5357                         addr = (u32)addr;
5358                 val += now;
5359                 bytes -= now;
5360         }
5361
5362         rc = emulator_read_write_onepage(addr, val, bytes, exception,
5363                                          vcpu, ops);
5364         if (rc != X86EMUL_CONTINUE)
5365                 return rc;
5366
5367         if (!vcpu->mmio_nr_fragments)
5368                 return rc;
5369
5370         gpa = vcpu->mmio_fragments[0].gpa;
5371
5372         vcpu->mmio_needed = 1;
5373         vcpu->mmio_cur_fragment = 0;
5374
5375         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
5376         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
5377         vcpu->run->exit_reason = KVM_EXIT_MMIO;
5378         vcpu->run->mmio.phys_addr = gpa;
5379
5380         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
5381 }
5382
5383 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
5384                                   unsigned long addr,
5385                                   void *val,
5386                                   unsigned int bytes,
5387                                   struct x86_exception *exception)
5388 {
5389         return emulator_read_write(ctxt, addr, val, bytes,
5390                                    exception, &read_emultor);
5391 }
5392
5393 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
5394                             unsigned long addr,
5395                             const void *val,
5396                             unsigned int bytes,
5397                             struct x86_exception *exception)
5398 {
5399         return emulator_read_write(ctxt, addr, (void *)val, bytes,
5400                                    exception, &write_emultor);
5401 }
5402
5403 #define CMPXCHG_TYPE(t, ptr, old, new) \
5404         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
5405
5406 #ifdef CONFIG_X86_64
5407 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
5408 #else
5409 #  define CMPXCHG64(ptr, old, new) \
5410         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
5411 #endif
5412
5413 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
5414                                      unsigned long addr,
5415                                      const void *old,
5416                                      const void *new,
5417                                      unsigned int bytes,
5418                                      struct x86_exception *exception)
5419 {
5420         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5421         gpa_t gpa;
5422         struct page *page;
5423         char *kaddr;
5424         bool exchanged;
5425
5426         /* guests cmpxchg8b have to be emulated atomically */
5427         if (bytes > 8 || (bytes & (bytes - 1)))
5428                 goto emul_write;
5429
5430         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
5431
5432         if (gpa == UNMAPPED_GVA ||
5433             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5434                 goto emul_write;
5435
5436         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
5437                 goto emul_write;
5438
5439         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
5440         if (is_error_page(page))
5441                 goto emul_write;
5442
5443         kaddr = kmap_atomic(page);
5444         kaddr += offset_in_page(gpa);
5445         switch (bytes) {
5446         case 1:
5447                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
5448                 break;
5449         case 2:
5450                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
5451                 break;
5452         case 4:
5453                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
5454                 break;
5455         case 8:
5456                 exchanged = CMPXCHG64(kaddr, old, new);
5457                 break;
5458         default:
5459                 BUG();
5460         }
5461         kunmap_atomic(kaddr);
5462         kvm_release_page_dirty(page);
5463
5464         if (!exchanged)
5465                 return X86EMUL_CMPXCHG_FAILED;
5466
5467         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
5468         kvm_page_track_write(vcpu, gpa, new, bytes);
5469
5470         return X86EMUL_CONTINUE;
5471
5472 emul_write:
5473         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
5474
5475         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
5476 }
5477
5478 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
5479 {
5480         int r = 0, i;
5481
5482         for (i = 0; i < vcpu->arch.pio.count; i++) {
5483                 if (vcpu->arch.pio.in)
5484                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
5485                                             vcpu->arch.pio.size, pd);
5486                 else
5487                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
5488                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
5489                                              pd);
5490                 if (r)
5491                         break;
5492                 pd += vcpu->arch.pio.size;
5493         }
5494         return r;
5495 }
5496
5497 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
5498                                unsigned short port, void *val,
5499                                unsigned int count, bool in)
5500 {
5501         vcpu->arch.pio.port = port;
5502         vcpu->arch.pio.in = in;
5503         vcpu->arch.pio.count  = count;
5504         vcpu->arch.pio.size = size;
5505
5506         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
5507                 vcpu->arch.pio.count = 0;
5508                 return 1;
5509         }
5510
5511         vcpu->run->exit_reason = KVM_EXIT_IO;
5512         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
5513         vcpu->run->io.size = size;
5514         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
5515         vcpu->run->io.count = count;
5516         vcpu->run->io.port = port;
5517
5518         return 0;
5519 }
5520
5521 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
5522                                     int size, unsigned short port, void *val,
5523                                     unsigned int count)
5524 {
5525         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5526         int ret;
5527
5528         if (vcpu->arch.pio.count)
5529                 goto data_avail;
5530
5531         memset(vcpu->arch.pio_data, 0, size * count);
5532
5533         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
5534         if (ret) {
5535 data_avail:
5536                 memcpy(val, vcpu->arch.pio_data, size * count);
5537                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
5538                 vcpu->arch.pio.count = 0;
5539                 return 1;
5540         }
5541
5542         return 0;
5543 }
5544
5545 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
5546                                      int size, unsigned short port,
5547                                      const void *val, unsigned int count)
5548 {
5549         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5550
5551         memcpy(vcpu->arch.pio_data, val, size * count);
5552         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
5553         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
5554 }
5555
5556 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
5557 {
5558         return kvm_x86_ops->get_segment_base(vcpu, seg);
5559 }
5560
5561 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
5562 {
5563         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
5564 }
5565
5566 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
5567 {
5568         if (!need_emulate_wbinvd(vcpu))
5569                 return X86EMUL_CONTINUE;
5570
5571         if (kvm_x86_ops->has_wbinvd_exit()) {
5572                 int cpu = get_cpu();
5573
5574                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
5575                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
5576                                 wbinvd_ipi, NULL, 1);
5577                 put_cpu();
5578                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
5579         } else
5580                 wbinvd();
5581         return X86EMUL_CONTINUE;
5582 }
5583
5584 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
5585 {
5586         kvm_emulate_wbinvd_noskip(vcpu);
5587         return kvm_skip_emulated_instruction(vcpu);
5588 }
5589 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
5590
5591
5592
5593 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
5594 {
5595         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
5596 }
5597
5598 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
5599                            unsigned long *dest)
5600 {
5601         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
5602 }
5603
5604 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
5605                            unsigned long value)
5606 {
5607
5608         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
5609 }
5610
5611 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
5612 {
5613         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
5614 }
5615
5616 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
5617 {
5618         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5619         unsigned long value;
5620
5621         switch (cr) {
5622         case 0:
5623                 value = kvm_read_cr0(vcpu);
5624                 break;
5625         case 2:
5626                 value = vcpu->arch.cr2;
5627                 break;
5628         case 3:
5629                 value = kvm_read_cr3(vcpu);
5630                 break;
5631         case 4:
5632                 value = kvm_read_cr4(vcpu);
5633                 break;
5634         case 8:
5635                 value = kvm_get_cr8(vcpu);
5636                 break;
5637         default:
5638                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5639                 return 0;
5640         }
5641
5642         return value;
5643 }
5644
5645 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
5646 {
5647         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5648         int res = 0;
5649
5650         switch (cr) {
5651         case 0:
5652                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
5653                 break;
5654         case 2:
5655                 vcpu->arch.cr2 = val;
5656                 break;
5657         case 3:
5658                 res = kvm_set_cr3(vcpu, val);
5659                 break;
5660         case 4:
5661                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
5662                 break;
5663         case 8:
5664                 res = kvm_set_cr8(vcpu, val);
5665                 break;
5666         default:
5667                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5668                 res = -1;
5669         }
5670
5671         return res;
5672 }
5673
5674 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
5675 {
5676         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
5677 }
5678
5679 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5680 {
5681         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
5682 }
5683
5684 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5685 {
5686         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
5687 }
5688
5689 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5690 {
5691         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
5692 }
5693
5694 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5695 {
5696         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
5697 }
5698
5699 static unsigned long emulator_get_cached_segment_base(
5700         struct x86_emulate_ctxt *ctxt, int seg)
5701 {
5702         return get_segment_base(emul_to_vcpu(ctxt), seg);
5703 }
5704
5705 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
5706                                  struct desc_struct *desc, u32 *base3,
5707                                  int seg)
5708 {
5709         struct kvm_segment var;
5710
5711         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
5712         *selector = var.selector;
5713
5714         if (var.unusable) {
5715                 memset(desc, 0, sizeof(*desc));
5716                 if (base3)
5717                         *base3 = 0;
5718                 return false;
5719         }
5720
5721         if (var.g)
5722                 var.limit >>= 12;
5723         set_desc_limit(desc, var.limit);
5724         set_desc_base(desc, (unsigned long)var.base);
5725 #ifdef CONFIG_X86_64
5726         if (base3)
5727                 *base3 = var.base >> 32;
5728 #endif
5729         desc->type = var.type;
5730         desc->s = var.s;
5731         desc->dpl = var.dpl;
5732         desc->p = var.present;
5733         desc->avl = var.avl;
5734         desc->l = var.l;
5735         desc->d = var.db;
5736         desc->g = var.g;
5737
5738         return true;
5739 }
5740
5741 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
5742                                  struct desc_struct *desc, u32 base3,
5743                                  int seg)
5744 {
5745         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5746         struct kvm_segment var;
5747
5748         var.selector = selector;
5749         var.base = get_desc_base(desc);
5750 #ifdef CONFIG_X86_64
5751         var.base |= ((u64)base3) << 32;
5752 #endif
5753         var.limit = get_desc_limit(desc);
5754         if (desc->g)
5755                 var.limit = (var.limit << 12) | 0xfff;
5756         var.type = desc->type;
5757         var.dpl = desc->dpl;
5758         var.db = desc->d;
5759         var.s = desc->s;
5760         var.l = desc->l;
5761         var.g = desc->g;
5762         var.avl = desc->avl;
5763         var.present = desc->p;
5764         var.unusable = !var.present;
5765         var.padding = 0;
5766
5767         kvm_set_segment(vcpu, &var, seg);
5768         return;
5769 }
5770
5771 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
5772                             u32 msr_index, u64 *pdata)
5773 {
5774         struct msr_data msr;
5775         int r;
5776
5777         msr.index = msr_index;
5778         msr.host_initiated = false;
5779         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
5780         if (r)
5781                 return r;
5782
5783         *pdata = msr.data;
5784         return 0;
5785 }
5786
5787 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
5788                             u32 msr_index, u64 data)
5789 {
5790         struct msr_data msr;
5791
5792         msr.data = data;
5793         msr.index = msr_index;
5794         msr.host_initiated = false;
5795         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
5796 }
5797
5798 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
5799 {
5800         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5801
5802         return vcpu->arch.smbase;
5803 }
5804
5805 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
5806 {
5807         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5808
5809         vcpu->arch.smbase = smbase;
5810 }
5811
5812 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
5813                               u32 pmc)
5814 {
5815         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
5816 }
5817
5818 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
5819                              u32 pmc, u64 *pdata)
5820 {
5821         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
5822 }
5823
5824 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
5825 {
5826         emul_to_vcpu(ctxt)->arch.halt_request = 1;
5827 }
5828
5829 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
5830                               struct x86_instruction_info *info,
5831                               enum x86_intercept_stage stage)
5832 {
5833         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
5834 }
5835
5836 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
5837                         u32 *eax, u32 *ebx, u32 *ecx, u32 *edx, bool check_limit)
5838 {
5839         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, check_limit);
5840 }
5841
5842 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
5843 {
5844         return kvm_register_read(emul_to_vcpu(ctxt), reg);
5845 }
5846
5847 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
5848 {
5849         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
5850 }
5851
5852 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
5853 {
5854         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
5855 }
5856
5857 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
5858 {
5859         return emul_to_vcpu(ctxt)->arch.hflags;
5860 }
5861
5862 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
5863 {
5864         kvm_set_hflags(emul_to_vcpu(ctxt), emul_flags);
5865 }
5866
5867 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt, u64 smbase)
5868 {
5869         return kvm_x86_ops->pre_leave_smm(emul_to_vcpu(ctxt), smbase);
5870 }
5871
5872 static const struct x86_emulate_ops emulate_ops = {
5873         .read_gpr            = emulator_read_gpr,
5874         .write_gpr           = emulator_write_gpr,
5875         .read_std            = emulator_read_std,
5876         .write_std           = emulator_write_std,
5877         .read_phys           = kvm_read_guest_phys_system,
5878         .fetch               = kvm_fetch_guest_virt,
5879         .read_emulated       = emulator_read_emulated,
5880         .write_emulated      = emulator_write_emulated,
5881         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
5882         .invlpg              = emulator_invlpg,
5883         .pio_in_emulated     = emulator_pio_in_emulated,
5884         .pio_out_emulated    = emulator_pio_out_emulated,
5885         .get_segment         = emulator_get_segment,
5886         .set_segment         = emulator_set_segment,
5887         .get_cached_segment_base = emulator_get_cached_segment_base,
5888         .get_gdt             = emulator_get_gdt,
5889         .get_idt             = emulator_get_idt,
5890         .set_gdt             = emulator_set_gdt,
5891         .set_idt             = emulator_set_idt,
5892         .get_cr              = emulator_get_cr,
5893         .set_cr              = emulator_set_cr,
5894         .cpl                 = emulator_get_cpl,
5895         .get_dr              = emulator_get_dr,
5896         .set_dr              = emulator_set_dr,
5897         .get_smbase          = emulator_get_smbase,
5898         .set_smbase          = emulator_set_smbase,
5899         .set_msr             = emulator_set_msr,
5900         .get_msr             = emulator_get_msr,
5901         .check_pmc           = emulator_check_pmc,
5902         .read_pmc            = emulator_read_pmc,
5903         .halt                = emulator_halt,
5904         .wbinvd              = emulator_wbinvd,
5905         .fix_hypercall       = emulator_fix_hypercall,
5906         .intercept           = emulator_intercept,
5907         .get_cpuid           = emulator_get_cpuid,
5908         .set_nmi_mask        = emulator_set_nmi_mask,
5909         .get_hflags          = emulator_get_hflags,
5910         .set_hflags          = emulator_set_hflags,
5911         .pre_leave_smm       = emulator_pre_leave_smm,
5912 };
5913
5914 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5915 {
5916         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5917         /*
5918          * an sti; sti; sequence only disable interrupts for the first
5919          * instruction. So, if the last instruction, be it emulated or
5920          * not, left the system with the INT_STI flag enabled, it
5921          * means that the last instruction is an sti. We should not
5922          * leave the flag on in this case. The same goes for mov ss
5923          */
5924         if (int_shadow & mask)
5925                 mask = 0;
5926         if (unlikely(int_shadow || mask)) {
5927                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5928                 if (!mask)
5929                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5930         }
5931 }
5932
5933 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5934 {
5935         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5936         if (ctxt->exception.vector == PF_VECTOR)
5937                 return kvm_propagate_fault(vcpu, &ctxt->exception);
5938
5939         if (ctxt->exception.error_code_valid)
5940                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5941                                       ctxt->exception.error_code);
5942         else
5943                 kvm_queue_exception(vcpu, ctxt->exception.vector);
5944         return false;
5945 }
5946
5947 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5948 {
5949         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5950         int cs_db, cs_l;
5951
5952         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5953
5954         ctxt->eflags = kvm_get_rflags(vcpu);
5955         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
5956
5957         ctxt->eip = kvm_rip_read(vcpu);
5958         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5959                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5960                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5961                      cs_db                              ? X86EMUL_MODE_PROT32 :
5962                                                           X86EMUL_MODE_PROT16;
5963         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5964         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5965         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5966
5967         init_decode_cache(ctxt);
5968         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5969 }
5970
5971 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5972 {
5973         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5974         int ret;
5975
5976         init_emulate_ctxt(vcpu);
5977
5978         ctxt->op_bytes = 2;
5979         ctxt->ad_bytes = 2;
5980         ctxt->_eip = ctxt->eip + inc_eip;
5981         ret = emulate_int_real(ctxt, irq);
5982
5983         if (ret != X86EMUL_CONTINUE)
5984                 return EMULATE_FAIL;
5985
5986         ctxt->eip = ctxt->_eip;
5987         kvm_rip_write(vcpu, ctxt->eip);
5988         kvm_set_rflags(vcpu, ctxt->eflags);
5989
5990         return EMULATE_DONE;
5991 }
5992 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5993
5994 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
5995 {
5996         int r = EMULATE_DONE;
5997
5998         ++vcpu->stat.insn_emulation_fail;
5999         trace_kvm_emulate_insn_failed(vcpu);
6000
6001         if (emulation_type & EMULTYPE_NO_UD_ON_FAIL)
6002                 return EMULATE_FAIL;
6003
6004         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
6005                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
6006                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
6007                 vcpu->run->internal.ndata = 0;
6008                 r = EMULATE_USER_EXIT;
6009         }
6010
6011         kvm_queue_exception(vcpu, UD_VECTOR);
6012
6013         return r;
6014 }
6015
6016 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
6017                                   bool write_fault_to_shadow_pgtable,
6018                                   int emulation_type)
6019 {
6020         gpa_t gpa = cr2;
6021         kvm_pfn_t pfn;
6022
6023         if (!(emulation_type & EMULTYPE_ALLOW_RETRY))
6024                 return false;
6025
6026         if (WARN_ON_ONCE(is_guest_mode(vcpu)))
6027                 return false;
6028
6029         if (!vcpu->arch.mmu->direct_map) {
6030                 /*
6031                  * Write permission should be allowed since only
6032                  * write access need to be emulated.
6033                  */
6034                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
6035
6036                 /*
6037                  * If the mapping is invalid in guest, let cpu retry
6038                  * it to generate fault.
6039                  */
6040                 if (gpa == UNMAPPED_GVA)
6041                         return true;
6042         }
6043
6044         /*
6045          * Do not retry the unhandleable instruction if it faults on the
6046          * readonly host memory, otherwise it will goto a infinite loop:
6047          * retry instruction -> write #PF -> emulation fail -> retry
6048          * instruction -> ...
6049          */
6050         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
6051
6052         /*
6053          * If the instruction failed on the error pfn, it can not be fixed,
6054          * report the error to userspace.
6055          */
6056         if (is_error_noslot_pfn(pfn))
6057                 return false;
6058
6059         kvm_release_pfn_clean(pfn);
6060
6061         /* The instructions are well-emulated on direct mmu. */
6062         if (vcpu->arch.mmu->direct_map) {
6063                 unsigned int indirect_shadow_pages;
6064
6065                 spin_lock(&vcpu->kvm->mmu_lock);
6066                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
6067                 spin_unlock(&vcpu->kvm->mmu_lock);
6068
6069                 if (indirect_shadow_pages)
6070                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6071
6072                 return true;
6073         }
6074
6075         /*
6076          * if emulation was due to access to shadowed page table
6077          * and it failed try to unshadow page and re-enter the
6078          * guest to let CPU execute the instruction.
6079          */
6080         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6081
6082         /*
6083          * If the access faults on its page table, it can not
6084          * be fixed by unprotecting shadow page and it should
6085          * be reported to userspace.
6086          */
6087         return !write_fault_to_shadow_pgtable;
6088 }
6089
6090 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
6091                               unsigned long cr2,  int emulation_type)
6092 {
6093         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6094         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
6095
6096         last_retry_eip = vcpu->arch.last_retry_eip;
6097         last_retry_addr = vcpu->arch.last_retry_addr;
6098
6099         /*
6100          * If the emulation is caused by #PF and it is non-page_table
6101          * writing instruction, it means the VM-EXIT is caused by shadow
6102          * page protected, we can zap the shadow page and retry this
6103          * instruction directly.
6104          *
6105          * Note: if the guest uses a non-page-table modifying instruction
6106          * on the PDE that points to the instruction, then we will unmap
6107          * the instruction and go to an infinite loop. So, we cache the
6108          * last retried eip and the last fault address, if we meet the eip
6109          * and the address again, we can break out of the potential infinite
6110          * loop.
6111          */
6112         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
6113
6114         if (!(emulation_type & EMULTYPE_ALLOW_RETRY))
6115                 return false;
6116
6117         if (WARN_ON_ONCE(is_guest_mode(vcpu)))
6118                 return false;
6119
6120         if (x86_page_table_writing_insn(ctxt))
6121                 return false;
6122
6123         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
6124                 return false;
6125
6126         vcpu->arch.last_retry_eip = ctxt->eip;
6127         vcpu->arch.last_retry_addr = cr2;
6128
6129         if (!vcpu->arch.mmu->direct_map)
6130                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
6131
6132         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6133
6134         return true;
6135 }
6136
6137 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
6138 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
6139
6140 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
6141 {
6142         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
6143                 /* This is a good place to trace that we are exiting SMM.  */
6144                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
6145
6146                 /* Process a latched INIT or SMI, if any.  */
6147                 kvm_make_request(KVM_REQ_EVENT, vcpu);
6148         }
6149
6150         kvm_mmu_reset_context(vcpu);
6151 }
6152
6153 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
6154 {
6155         unsigned changed = vcpu->arch.hflags ^ emul_flags;
6156
6157         vcpu->arch.hflags = emul_flags;
6158
6159         if (changed & HF_SMM_MASK)
6160                 kvm_smm_changed(vcpu);
6161 }
6162
6163 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
6164                                 unsigned long *db)
6165 {
6166         u32 dr6 = 0;
6167         int i;
6168         u32 enable, rwlen;
6169
6170         enable = dr7;
6171         rwlen = dr7 >> 16;
6172         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
6173                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
6174                         dr6 |= (1 << i);
6175         return dr6;
6176 }
6177
6178 static void kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu, int *r)
6179 {
6180         struct kvm_run *kvm_run = vcpu->run;
6181
6182         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
6183                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
6184                 kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
6185                 kvm_run->debug.arch.exception = DB_VECTOR;
6186                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
6187                 *r = EMULATE_USER_EXIT;
6188         } else {
6189                 kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
6190         }
6191 }
6192
6193 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
6194 {
6195         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6196         int r = EMULATE_DONE;
6197
6198         kvm_x86_ops->skip_emulated_instruction(vcpu);
6199
6200         /*
6201          * rflags is the old, "raw" value of the flags.  The new value has
6202          * not been saved yet.
6203          *
6204          * This is correct even for TF set by the guest, because "the
6205          * processor will not generate this exception after the instruction
6206          * that sets the TF flag".
6207          */
6208         if (unlikely(rflags & X86_EFLAGS_TF))
6209                 kvm_vcpu_do_singlestep(vcpu, &r);
6210         return r == EMULATE_DONE;
6211 }
6212 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
6213
6214 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
6215 {
6216         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
6217             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
6218                 struct kvm_run *kvm_run = vcpu->run;
6219                 unsigned long eip = kvm_get_linear_rip(vcpu);
6220                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
6221                                            vcpu->arch.guest_debug_dr7,
6222                                            vcpu->arch.eff_db);
6223
6224                 if (dr6 != 0) {
6225                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
6226                         kvm_run->debug.arch.pc = eip;
6227                         kvm_run->debug.arch.exception = DB_VECTOR;
6228                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
6229                         *r = EMULATE_USER_EXIT;
6230                         return true;
6231                 }
6232         }
6233
6234         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
6235             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
6236                 unsigned long eip = kvm_get_linear_rip(vcpu);
6237                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
6238                                            vcpu->arch.dr7,
6239                                            vcpu->arch.db);
6240
6241                 if (dr6 != 0) {
6242                         vcpu->arch.dr6 &= ~15;
6243                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
6244                         kvm_queue_exception(vcpu, DB_VECTOR);
6245                         *r = EMULATE_DONE;
6246                         return true;
6247                 }
6248         }
6249
6250         return false;
6251 }
6252
6253 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
6254 {
6255         switch (ctxt->opcode_len) {
6256         case 1:
6257                 switch (ctxt->b) {
6258                 case 0xe4:      /* IN */
6259                 case 0xe5:
6260                 case 0xec:
6261                 case 0xed:
6262                 case 0xe6:      /* OUT */
6263                 case 0xe7:
6264                 case 0xee:
6265                 case 0xef:
6266                 case 0x6c:      /* INS */
6267                 case 0x6d:
6268                 case 0x6e:      /* OUTS */
6269                 case 0x6f:
6270                         return true;
6271                 }
6272                 break;
6273         case 2:
6274                 switch (ctxt->b) {
6275                 case 0x33:      /* RDPMC */
6276                         return true;
6277                 }
6278                 break;
6279         }
6280
6281         return false;
6282 }
6283
6284 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
6285                             unsigned long cr2,
6286                             int emulation_type,
6287                             void *insn,
6288                             int insn_len)
6289 {
6290         int r;
6291         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6292         bool writeback = true;
6293         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
6294
6295         vcpu->arch.l1tf_flush_l1d = true;
6296
6297         /*
6298          * Clear write_fault_to_shadow_pgtable here to ensure it is
6299          * never reused.
6300          */
6301         vcpu->arch.write_fault_to_shadow_pgtable = false;
6302         kvm_clear_exception_queue(vcpu);
6303
6304         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
6305                 init_emulate_ctxt(vcpu);
6306
6307                 /*
6308                  * We will reenter on the same instruction since
6309                  * we do not set complete_userspace_io.  This does not
6310                  * handle watchpoints yet, those would be handled in
6311                  * the emulate_ops.
6312                  */
6313                 if (!(emulation_type & EMULTYPE_SKIP) &&
6314                     kvm_vcpu_check_breakpoint(vcpu, &r))
6315                         return r;
6316
6317                 ctxt->interruptibility = 0;
6318                 ctxt->have_exception = false;
6319                 ctxt->exception.vector = -1;
6320                 ctxt->perm_ok = false;
6321
6322                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
6323
6324                 r = x86_decode_insn(ctxt, insn, insn_len);
6325
6326                 trace_kvm_emulate_insn_start(vcpu);
6327                 ++vcpu->stat.insn_emulation;
6328                 if (r != EMULATION_OK)  {
6329                         if (emulation_type & EMULTYPE_TRAP_UD)
6330                                 return EMULATE_FAIL;
6331                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6332                                                 emulation_type))
6333                                 return EMULATE_DONE;
6334                         if (ctxt->have_exception && inject_emulated_exception(vcpu))
6335                                 return EMULATE_DONE;
6336                         if (emulation_type & EMULTYPE_SKIP)
6337                                 return EMULATE_FAIL;
6338                         return handle_emulation_failure(vcpu, emulation_type);
6339                 }
6340         }
6341
6342         if ((emulation_type & EMULTYPE_VMWARE) &&
6343             !is_vmware_backdoor_opcode(ctxt))
6344                 return EMULATE_FAIL;
6345
6346         if (emulation_type & EMULTYPE_SKIP) {
6347                 kvm_rip_write(vcpu, ctxt->_eip);
6348                 if (ctxt->eflags & X86_EFLAGS_RF)
6349                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
6350                 return EMULATE_DONE;
6351         }
6352
6353         if (retry_instruction(ctxt, cr2, emulation_type))
6354                 return EMULATE_DONE;
6355
6356         /* this is needed for vmware backdoor interface to work since it
6357            changes registers values  during IO operation */
6358         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
6359                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6360                 emulator_invalidate_register_cache(ctxt);
6361         }
6362
6363 restart:
6364         /* Save the faulting GPA (cr2) in the address field */
6365         ctxt->exception.address = cr2;
6366
6367         r = x86_emulate_insn(ctxt);
6368
6369         if (r == EMULATION_INTERCEPTED)
6370                 return EMULATE_DONE;
6371
6372         if (r == EMULATION_FAILED) {
6373                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6374                                         emulation_type))
6375                         return EMULATE_DONE;
6376
6377                 return handle_emulation_failure(vcpu, emulation_type);
6378         }
6379
6380         if (ctxt->have_exception) {
6381                 r = EMULATE_DONE;
6382                 if (inject_emulated_exception(vcpu))
6383                         return r;
6384         } else if (vcpu->arch.pio.count) {
6385                 if (!vcpu->arch.pio.in) {
6386                         /* FIXME: return into emulator if single-stepping.  */
6387                         vcpu->arch.pio.count = 0;
6388                 } else {
6389                         writeback = false;
6390                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
6391                 }
6392                 r = EMULATE_USER_EXIT;
6393         } else if (vcpu->mmio_needed) {
6394                 if (!vcpu->mmio_is_write)
6395                         writeback = false;
6396                 r = EMULATE_USER_EXIT;
6397                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6398         } else if (r == EMULATION_RESTART)
6399                 goto restart;
6400         else
6401                 r = EMULATE_DONE;
6402
6403         if (writeback) {
6404                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6405                 toggle_interruptibility(vcpu, ctxt->interruptibility);
6406                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6407                 kvm_rip_write(vcpu, ctxt->eip);
6408                 if (r == EMULATE_DONE &&
6409                     (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
6410                         kvm_vcpu_do_singlestep(vcpu, &r);
6411                 if (!ctxt->have_exception ||
6412                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
6413                         __kvm_set_rflags(vcpu, ctxt->eflags);
6414
6415                 /*
6416                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
6417                  * do nothing, and it will be requested again as soon as
6418                  * the shadow expires.  But we still need to check here,
6419                  * because POPF has no interrupt shadow.
6420                  */
6421                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
6422                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6423         } else
6424                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
6425
6426         return r;
6427 }
6428
6429 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
6430 {
6431         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
6432 }
6433 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
6434
6435 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
6436                                         void *insn, int insn_len)
6437 {
6438         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
6439 }
6440 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
6441
6442 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
6443                             unsigned short port)
6444 {
6445         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
6446         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
6447                                             size, port, &val, 1);
6448         /* do not return to emulator after return from userspace */
6449         vcpu->arch.pio.count = 0;
6450         return ret;
6451 }
6452
6453 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
6454 {
6455         unsigned long val;
6456
6457         /* We should only ever be called with arch.pio.count equal to 1 */
6458         BUG_ON(vcpu->arch.pio.count != 1);
6459
6460         /* For size less than 4 we merge, else we zero extend */
6461         val = (vcpu->arch.pio.size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX)
6462                                         : 0;
6463
6464         /*
6465          * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
6466          * the copy and tracing
6467          */
6468         emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, vcpu->arch.pio.size,
6469                                  vcpu->arch.pio.port, &val, 1);
6470         kvm_register_write(vcpu, VCPU_REGS_RAX, val);
6471
6472         return 1;
6473 }
6474
6475 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
6476                            unsigned short port)
6477 {
6478         unsigned long val;
6479         int ret;
6480
6481         /* For size less than 4 we merge, else we zero extend */
6482         val = (size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX) : 0;
6483
6484         ret = emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, size, port,
6485                                        &val, 1);
6486         if (ret) {
6487                 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
6488                 return ret;
6489         }
6490
6491         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
6492
6493         return 0;
6494 }
6495
6496 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
6497 {
6498         int ret = kvm_skip_emulated_instruction(vcpu);
6499
6500         /*
6501          * TODO: we might be squashing a KVM_GUESTDBG_SINGLESTEP-triggered
6502          * KVM_EXIT_DEBUG here.
6503          */
6504         if (in)
6505                 return kvm_fast_pio_in(vcpu, size, port) && ret;
6506         else
6507                 return kvm_fast_pio_out(vcpu, size, port) && ret;
6508 }
6509 EXPORT_SYMBOL_GPL(kvm_fast_pio);
6510
6511 static int kvmclock_cpu_down_prep(unsigned int cpu)
6512 {
6513         __this_cpu_write(cpu_tsc_khz, 0);
6514         return 0;
6515 }
6516
6517 static void tsc_khz_changed(void *data)
6518 {
6519         struct cpufreq_freqs *freq = data;
6520         unsigned long khz = 0;
6521
6522         if (data)
6523                 khz = freq->new;
6524         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6525                 khz = cpufreq_quick_get(raw_smp_processor_id());
6526         if (!khz)
6527                 khz = tsc_khz;
6528         __this_cpu_write(cpu_tsc_khz, khz);
6529 }
6530
6531 #ifdef CONFIG_X86_64
6532 static void kvm_hyperv_tsc_notifier(void)
6533 {
6534         struct kvm *kvm;
6535         struct kvm_vcpu *vcpu;
6536         int cpu;
6537
6538         spin_lock(&kvm_lock);
6539         list_for_each_entry(kvm, &vm_list, vm_list)
6540                 kvm_make_mclock_inprogress_request(kvm);
6541
6542         hyperv_stop_tsc_emulation();
6543
6544         /* TSC frequency always matches when on Hyper-V */
6545         for_each_present_cpu(cpu)
6546                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
6547         kvm_max_guest_tsc_khz = tsc_khz;
6548
6549         list_for_each_entry(kvm, &vm_list, vm_list) {
6550                 struct kvm_arch *ka = &kvm->arch;
6551
6552                 spin_lock(&ka->pvclock_gtod_sync_lock);
6553
6554                 pvclock_update_vm_gtod_copy(kvm);
6555
6556                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6557                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6558
6559                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6560                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
6561
6562                 spin_unlock(&ka->pvclock_gtod_sync_lock);
6563         }
6564         spin_unlock(&kvm_lock);
6565 }
6566 #endif
6567
6568 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
6569                                      void *data)
6570 {
6571         struct cpufreq_freqs *freq = data;
6572         struct kvm *kvm;
6573         struct kvm_vcpu *vcpu;
6574         int i, send_ipi = 0;
6575
6576         /*
6577          * We allow guests to temporarily run on slowing clocks,
6578          * provided we notify them after, or to run on accelerating
6579          * clocks, provided we notify them before.  Thus time never
6580          * goes backwards.
6581          *
6582          * However, we have a problem.  We can't atomically update
6583          * the frequency of a given CPU from this function; it is
6584          * merely a notifier, which can be called from any CPU.
6585          * Changing the TSC frequency at arbitrary points in time
6586          * requires a recomputation of local variables related to
6587          * the TSC for each VCPU.  We must flag these local variables
6588          * to be updated and be sure the update takes place with the
6589          * new frequency before any guests proceed.
6590          *
6591          * Unfortunately, the combination of hotplug CPU and frequency
6592          * change creates an intractable locking scenario; the order
6593          * of when these callouts happen is undefined with respect to
6594          * CPU hotplug, and they can race with each other.  As such,
6595          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
6596          * undefined; you can actually have a CPU frequency change take
6597          * place in between the computation of X and the setting of the
6598          * variable.  To protect against this problem, all updates of
6599          * the per_cpu tsc_khz variable are done in an interrupt
6600          * protected IPI, and all callers wishing to update the value
6601          * must wait for a synchronous IPI to complete (which is trivial
6602          * if the caller is on the CPU already).  This establishes the
6603          * necessary total order on variable updates.
6604          *
6605          * Note that because a guest time update may take place
6606          * anytime after the setting of the VCPU's request bit, the
6607          * correct TSC value must be set before the request.  However,
6608          * to ensure the update actually makes it to any guest which
6609          * starts running in hardware virtualization between the set
6610          * and the acquisition of the spinlock, we must also ping the
6611          * CPU after setting the request bit.
6612          *
6613          */
6614
6615         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
6616                 return 0;
6617         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
6618                 return 0;
6619
6620         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
6621
6622         spin_lock(&kvm_lock);
6623         list_for_each_entry(kvm, &vm_list, vm_list) {
6624                 kvm_for_each_vcpu(i, vcpu, kvm) {
6625                         if (vcpu->cpu != freq->cpu)
6626                                 continue;
6627                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6628                         if (vcpu->cpu != smp_processor_id())
6629                                 send_ipi = 1;
6630                 }
6631         }
6632         spin_unlock(&kvm_lock);
6633
6634         if (freq->old < freq->new && send_ipi) {
6635                 /*
6636                  * We upscale the frequency.  Must make the guest
6637                  * doesn't see old kvmclock values while running with
6638                  * the new frequency, otherwise we risk the guest sees
6639                  * time go backwards.
6640                  *
6641                  * In case we update the frequency for another cpu
6642                  * (which might be in guest context) send an interrupt
6643                  * to kick the cpu out of guest context.  Next time
6644                  * guest context is entered kvmclock will be updated,
6645                  * so the guest will not see stale values.
6646                  */
6647                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
6648         }
6649         return 0;
6650 }
6651
6652 static struct notifier_block kvmclock_cpufreq_notifier_block = {
6653         .notifier_call  = kvmclock_cpufreq_notifier
6654 };
6655
6656 static int kvmclock_cpu_online(unsigned int cpu)
6657 {
6658         tsc_khz_changed(NULL);
6659         return 0;
6660 }
6661
6662 static void kvm_timer_init(void)
6663 {
6664         max_tsc_khz = tsc_khz;
6665
6666         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
6667 #ifdef CONFIG_CPU_FREQ
6668                 struct cpufreq_policy policy;
6669                 int cpu;
6670
6671                 memset(&policy, 0, sizeof(policy));
6672                 cpu = get_cpu();
6673                 cpufreq_get_policy(&policy, cpu);
6674                 if (policy.cpuinfo.max_freq)
6675                         max_tsc_khz = policy.cpuinfo.max_freq;
6676                 put_cpu();
6677 #endif
6678                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
6679                                           CPUFREQ_TRANSITION_NOTIFIER);
6680         }
6681         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
6682
6683         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
6684                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
6685 }
6686
6687 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
6688 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
6689
6690 int kvm_is_in_guest(void)
6691 {
6692         return __this_cpu_read(current_vcpu) != NULL;
6693 }
6694
6695 static int kvm_is_user_mode(void)
6696 {
6697         int user_mode = 3;
6698
6699         if (__this_cpu_read(current_vcpu))
6700                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
6701
6702         return user_mode != 0;
6703 }
6704
6705 static unsigned long kvm_get_guest_ip(void)
6706 {
6707         unsigned long ip = 0;
6708
6709         if (__this_cpu_read(current_vcpu))
6710                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
6711
6712         return ip;
6713 }
6714
6715 static struct perf_guest_info_callbacks kvm_guest_cbs = {
6716         .is_in_guest            = kvm_is_in_guest,
6717         .is_user_mode           = kvm_is_user_mode,
6718         .get_guest_ip           = kvm_get_guest_ip,
6719 };
6720
6721 static void kvm_set_mmio_spte_mask(void)
6722 {
6723         u64 mask;
6724         int maxphyaddr = boot_cpu_data.x86_phys_bits;
6725
6726         /*
6727          * Set the reserved bits and the present bit of an paging-structure
6728          * entry to generate page fault with PFER.RSV = 1.
6729          */
6730
6731         /*
6732          * Mask the uppermost physical address bit, which would be reserved as
6733          * long as the supported physical address width is less than 52.
6734          */
6735         mask = 1ull << 51;
6736
6737         /* Set the present bit. */
6738         mask |= 1ull;
6739
6740         /*
6741          * If reserved bit is not supported, clear the present bit to disable
6742          * mmio page fault.
6743          */
6744         if (IS_ENABLED(CONFIG_X86_64) && maxphyaddr == 52)
6745                 mask &= ~1ull;
6746
6747         kvm_mmu_set_mmio_spte_mask(mask, mask);
6748 }
6749
6750 #ifdef CONFIG_X86_64
6751 static void pvclock_gtod_update_fn(struct work_struct *work)
6752 {
6753         struct kvm *kvm;
6754
6755         struct kvm_vcpu *vcpu;
6756         int i;
6757
6758         spin_lock(&kvm_lock);
6759         list_for_each_entry(kvm, &vm_list, vm_list)
6760                 kvm_for_each_vcpu(i, vcpu, kvm)
6761                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
6762         atomic_set(&kvm_guest_has_master_clock, 0);
6763         spin_unlock(&kvm_lock);
6764 }
6765
6766 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
6767
6768 /*
6769  * Notification about pvclock gtod data update.
6770  */
6771 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
6772                                void *priv)
6773 {
6774         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
6775         struct timekeeper *tk = priv;
6776
6777         update_pvclock_gtod(tk);
6778
6779         /* disable master clock if host does not trust, or does not
6780          * use, TSC based clocksource.
6781          */
6782         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
6783             atomic_read(&kvm_guest_has_master_clock) != 0)
6784                 queue_work(system_long_wq, &pvclock_gtod_work);
6785
6786         return 0;
6787 }
6788
6789 static struct notifier_block pvclock_gtod_notifier = {
6790         .notifier_call = pvclock_gtod_notify,
6791 };
6792 #endif
6793
6794 int kvm_arch_init(void *opaque)
6795 {
6796         int r;
6797         struct kvm_x86_ops *ops = opaque;
6798
6799         if (kvm_x86_ops) {
6800                 printk(KERN_ERR "kvm: already loaded the other module\n");
6801                 r = -EEXIST;
6802                 goto out;
6803         }
6804
6805         if (!ops->cpu_has_kvm_support()) {
6806                 printk(KERN_ERR "kvm: no hardware support\n");
6807                 r = -EOPNOTSUPP;
6808                 goto out;
6809         }
6810         if (ops->disabled_by_bios()) {
6811                 printk(KERN_ERR "kvm: disabled by bios\n");
6812                 r = -EOPNOTSUPP;
6813                 goto out;
6814         }
6815
6816         r = -ENOMEM;
6817         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
6818         if (!shared_msrs) {
6819                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
6820                 goto out;
6821         }
6822
6823         r = kvm_mmu_module_init();
6824         if (r)
6825                 goto out_free_percpu;
6826
6827         kvm_set_mmio_spte_mask();
6828
6829         kvm_x86_ops = ops;
6830
6831         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
6832                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
6833                         PT_PRESENT_MASK, 0, sme_me_mask);
6834         kvm_timer_init();
6835
6836         perf_register_guest_info_callbacks(&kvm_guest_cbs);
6837
6838         if (boot_cpu_has(X86_FEATURE_XSAVE))
6839                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
6840
6841         kvm_lapic_init();
6842 #ifdef CONFIG_X86_64
6843         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
6844
6845         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
6846                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
6847 #endif
6848
6849         return 0;
6850
6851 out_free_percpu:
6852         free_percpu(shared_msrs);
6853 out:
6854         return r;
6855 }
6856
6857 void kvm_arch_exit(void)
6858 {
6859 #ifdef CONFIG_X86_64
6860         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
6861                 clear_hv_tscchange_cb();
6862 #endif
6863         kvm_lapic_exit();
6864         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
6865
6866         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6867                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
6868                                             CPUFREQ_TRANSITION_NOTIFIER);
6869         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
6870 #ifdef CONFIG_X86_64
6871         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
6872 #endif
6873         kvm_x86_ops = NULL;
6874         kvm_mmu_module_exit();
6875         free_percpu(shared_msrs);
6876 }
6877
6878 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
6879 {
6880         ++vcpu->stat.halt_exits;
6881         if (lapic_in_kernel(vcpu)) {
6882                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
6883                 return 1;
6884         } else {
6885                 vcpu->run->exit_reason = KVM_EXIT_HLT;
6886                 return 0;
6887         }
6888 }
6889 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
6890
6891 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
6892 {
6893         int ret = kvm_skip_emulated_instruction(vcpu);
6894         /*
6895          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6896          * KVM_EXIT_DEBUG here.
6897          */
6898         return kvm_vcpu_halt(vcpu) && ret;
6899 }
6900 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
6901
6902 #ifdef CONFIG_X86_64
6903 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
6904                                 unsigned long clock_type)
6905 {
6906         struct kvm_clock_pairing clock_pairing;
6907         struct timespec64 ts;
6908         u64 cycle;
6909         int ret;
6910
6911         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
6912                 return -KVM_EOPNOTSUPP;
6913
6914         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
6915                 return -KVM_EOPNOTSUPP;
6916
6917         clock_pairing.sec = ts.tv_sec;
6918         clock_pairing.nsec = ts.tv_nsec;
6919         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
6920         clock_pairing.flags = 0;
6921         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
6922
6923         ret = 0;
6924         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
6925                             sizeof(struct kvm_clock_pairing)))
6926                 ret = -KVM_EFAULT;
6927
6928         return ret;
6929 }
6930 #endif
6931
6932 /*
6933  * kvm_pv_kick_cpu_op:  Kick a vcpu.
6934  *
6935  * @apicid - apicid of vcpu to be kicked.
6936  */
6937 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
6938 {
6939         struct kvm_lapic_irq lapic_irq;
6940
6941         lapic_irq.shorthand = 0;
6942         lapic_irq.dest_mode = 0;
6943         lapic_irq.level = 0;
6944         lapic_irq.dest_id = apicid;
6945         lapic_irq.msi_redir_hint = false;
6946
6947         lapic_irq.delivery_mode = APIC_DM_REMRD;
6948         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
6949 }
6950
6951 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
6952 {
6953         vcpu->arch.apicv_active = false;
6954         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
6955 }
6956
6957 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
6958 {
6959         unsigned long nr, a0, a1, a2, a3, ret;
6960         int op_64_bit;
6961
6962         if (kvm_hv_hypercall_enabled(vcpu->kvm))
6963                 return kvm_hv_hypercall(vcpu);
6964
6965         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
6966         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
6967         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
6968         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
6969         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
6970
6971         trace_kvm_hypercall(nr, a0, a1, a2, a3);
6972
6973         op_64_bit = is_64_bit_mode(vcpu);
6974         if (!op_64_bit) {
6975                 nr &= 0xFFFFFFFF;
6976                 a0 &= 0xFFFFFFFF;
6977                 a1 &= 0xFFFFFFFF;
6978                 a2 &= 0xFFFFFFFF;
6979                 a3 &= 0xFFFFFFFF;
6980         }
6981
6982         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
6983                 ret = -KVM_EPERM;
6984                 goto out;
6985         }
6986
6987         switch (nr) {
6988         case KVM_HC_VAPIC_POLL_IRQ:
6989                 ret = 0;
6990                 break;
6991         case KVM_HC_KICK_CPU:
6992                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
6993                 ret = 0;
6994                 break;
6995 #ifdef CONFIG_X86_64
6996         case KVM_HC_CLOCK_PAIRING:
6997                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
6998                 break;
6999         case KVM_HC_SEND_IPI:
7000                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
7001                 break;
7002 #endif
7003         default:
7004                 ret = -KVM_ENOSYS;
7005                 break;
7006         }
7007 out:
7008         if (!op_64_bit)
7009                 ret = (u32)ret;
7010         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
7011
7012         ++vcpu->stat.hypercalls;
7013         return kvm_skip_emulated_instruction(vcpu);
7014 }
7015 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
7016
7017 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
7018 {
7019         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7020         char instruction[3];
7021         unsigned long rip = kvm_rip_read(vcpu);
7022
7023         kvm_x86_ops->patch_hypercall(vcpu, instruction);
7024
7025         return emulator_write_emulated(ctxt, rip, instruction, 3,
7026                 &ctxt->exception);
7027 }
7028
7029 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
7030 {
7031         return vcpu->run->request_interrupt_window &&
7032                 likely(!pic_in_kernel(vcpu->kvm));
7033 }
7034
7035 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
7036 {
7037         struct kvm_run *kvm_run = vcpu->run;
7038
7039         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
7040         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
7041         kvm_run->cr8 = kvm_get_cr8(vcpu);
7042         kvm_run->apic_base = kvm_get_apic_base(vcpu);
7043         kvm_run->ready_for_interrupt_injection =
7044                 pic_in_kernel(vcpu->kvm) ||
7045                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
7046 }
7047
7048 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
7049 {
7050         int max_irr, tpr;
7051
7052         if (!kvm_x86_ops->update_cr8_intercept)
7053                 return;
7054
7055         if (!lapic_in_kernel(vcpu))
7056                 return;
7057
7058         if (vcpu->arch.apicv_active)
7059                 return;
7060
7061         if (!vcpu->arch.apic->vapic_addr)
7062                 max_irr = kvm_lapic_find_highest_irr(vcpu);
7063         else
7064                 max_irr = -1;
7065
7066         if (max_irr != -1)
7067                 max_irr >>= 4;
7068
7069         tpr = kvm_lapic_get_cr8(vcpu);
7070
7071         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
7072 }
7073
7074 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
7075 {
7076         int r;
7077
7078         /* try to reinject previous events if any */
7079
7080         if (vcpu->arch.exception.injected)
7081                 kvm_x86_ops->queue_exception(vcpu);
7082         /*
7083          * Do not inject an NMI or interrupt if there is a pending
7084          * exception.  Exceptions and interrupts are recognized at
7085          * instruction boundaries, i.e. the start of an instruction.
7086          * Trap-like exceptions, e.g. #DB, have higher priority than
7087          * NMIs and interrupts, i.e. traps are recognized before an
7088          * NMI/interrupt that's pending on the same instruction.
7089          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
7090          * priority, but are only generated (pended) during instruction
7091          * execution, i.e. a pending fault-like exception means the
7092          * fault occurred on the *previous* instruction and must be
7093          * serviced prior to recognizing any new events in order to
7094          * fully complete the previous instruction.
7095          */
7096         else if (!vcpu->arch.exception.pending) {
7097                 if (vcpu->arch.nmi_injected)
7098                         kvm_x86_ops->set_nmi(vcpu);
7099                 else if (vcpu->arch.interrupt.injected)
7100                         kvm_x86_ops->set_irq(vcpu);
7101         }
7102
7103         /*
7104          * Call check_nested_events() even if we reinjected a previous event
7105          * in order for caller to determine if it should require immediate-exit
7106          * from L2 to L1 due to pending L1 events which require exit
7107          * from L2 to L1.
7108          */
7109         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
7110                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
7111                 if (r != 0)
7112                         return r;
7113         }
7114
7115         /* try to inject new event if pending */
7116         if (vcpu->arch.exception.pending) {
7117                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
7118                                         vcpu->arch.exception.has_error_code,
7119                                         vcpu->arch.exception.error_code);
7120
7121                 WARN_ON_ONCE(vcpu->arch.exception.injected);
7122                 vcpu->arch.exception.pending = false;
7123                 vcpu->arch.exception.injected = true;
7124
7125                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
7126                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
7127                                              X86_EFLAGS_RF);
7128
7129                 if (vcpu->arch.exception.nr == DB_VECTOR) {
7130                         /*
7131                          * This code assumes that nSVM doesn't use
7132                          * check_nested_events(). If it does, the
7133                          * DR6/DR7 changes should happen before L1
7134                          * gets a #VMEXIT for an intercepted #DB in
7135                          * L2.  (Under VMX, on the other hand, the
7136                          * DR6/DR7 changes should not happen in the
7137                          * event of a VM-exit to L1 for an intercepted
7138                          * #DB in L2.)
7139                          */
7140                         kvm_deliver_exception_payload(vcpu);
7141                         if (vcpu->arch.dr7 & DR7_GD) {
7142                                 vcpu->arch.dr7 &= ~DR7_GD;
7143                                 kvm_update_dr7(vcpu);
7144                         }
7145                 }
7146
7147                 kvm_x86_ops->queue_exception(vcpu);
7148         }
7149
7150         /* Don't consider new event if we re-injected an event */
7151         if (kvm_event_needs_reinjection(vcpu))
7152                 return 0;
7153
7154         if (vcpu->arch.smi_pending && !is_smm(vcpu) &&
7155             kvm_x86_ops->smi_allowed(vcpu)) {
7156                 vcpu->arch.smi_pending = false;
7157                 ++vcpu->arch.smi_count;
7158                 enter_smm(vcpu);
7159         } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
7160                 --vcpu->arch.nmi_pending;
7161                 vcpu->arch.nmi_injected = true;
7162                 kvm_x86_ops->set_nmi(vcpu);
7163         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
7164                 /*
7165                  * Because interrupts can be injected asynchronously, we are
7166                  * calling check_nested_events again here to avoid a race condition.
7167                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
7168                  * proposal and current concerns.  Perhaps we should be setting
7169                  * KVM_REQ_EVENT only on certain events and not unconditionally?
7170                  */
7171                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
7172                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
7173                         if (r != 0)
7174                                 return r;
7175                 }
7176                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
7177                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
7178                                             false);
7179                         kvm_x86_ops->set_irq(vcpu);
7180                 }
7181         }
7182
7183         return 0;
7184 }
7185
7186 static void process_nmi(struct kvm_vcpu *vcpu)
7187 {
7188         unsigned limit = 2;
7189
7190         /*
7191          * x86 is limited to one NMI running, and one NMI pending after it.
7192          * If an NMI is already in progress, limit further NMIs to just one.
7193          * Otherwise, allow two (and we'll inject the first one immediately).
7194          */
7195         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
7196                 limit = 1;
7197
7198         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
7199         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
7200         kvm_make_request(KVM_REQ_EVENT, vcpu);
7201 }
7202
7203 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
7204 {
7205         u32 flags = 0;
7206         flags |= seg->g       << 23;
7207         flags |= seg->db      << 22;
7208         flags |= seg->l       << 21;
7209         flags |= seg->avl     << 20;
7210         flags |= seg->present << 15;
7211         flags |= seg->dpl     << 13;
7212         flags |= seg->s       << 12;
7213         flags |= seg->type    << 8;
7214         return flags;
7215 }
7216
7217 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
7218 {
7219         struct kvm_segment seg;
7220         int offset;
7221
7222         kvm_get_segment(vcpu, &seg, n);
7223         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
7224
7225         if (n < 3)
7226                 offset = 0x7f84 + n * 12;
7227         else
7228                 offset = 0x7f2c + (n - 3) * 12;
7229
7230         put_smstate(u32, buf, offset + 8, seg.base);
7231         put_smstate(u32, buf, offset + 4, seg.limit);
7232         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
7233 }
7234
7235 #ifdef CONFIG_X86_64
7236 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
7237 {
7238         struct kvm_segment seg;
7239         int offset;
7240         u16 flags;
7241
7242         kvm_get_segment(vcpu, &seg, n);
7243         offset = 0x7e00 + n * 16;
7244
7245         flags = enter_smm_get_segment_flags(&seg) >> 8;
7246         put_smstate(u16, buf, offset, seg.selector);
7247         put_smstate(u16, buf, offset + 2, flags);
7248         put_smstate(u32, buf, offset + 4, seg.limit);
7249         put_smstate(u64, buf, offset + 8, seg.base);
7250 }
7251 #endif
7252
7253 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
7254 {
7255         struct desc_ptr dt;
7256         struct kvm_segment seg;
7257         unsigned long val;
7258         int i;
7259
7260         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
7261         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
7262         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
7263         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
7264
7265         for (i = 0; i < 8; i++)
7266                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
7267
7268         kvm_get_dr(vcpu, 6, &val);
7269         put_smstate(u32, buf, 0x7fcc, (u32)val);
7270         kvm_get_dr(vcpu, 7, &val);
7271         put_smstate(u32, buf, 0x7fc8, (u32)val);
7272
7273         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7274         put_smstate(u32, buf, 0x7fc4, seg.selector);
7275         put_smstate(u32, buf, 0x7f64, seg.base);
7276         put_smstate(u32, buf, 0x7f60, seg.limit);
7277         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
7278
7279         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7280         put_smstate(u32, buf, 0x7fc0, seg.selector);
7281         put_smstate(u32, buf, 0x7f80, seg.base);
7282         put_smstate(u32, buf, 0x7f7c, seg.limit);
7283         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
7284
7285         kvm_x86_ops->get_gdt(vcpu, &dt);
7286         put_smstate(u32, buf, 0x7f74, dt.address);
7287         put_smstate(u32, buf, 0x7f70, dt.size);
7288
7289         kvm_x86_ops->get_idt(vcpu, &dt);
7290         put_smstate(u32, buf, 0x7f58, dt.address);
7291         put_smstate(u32, buf, 0x7f54, dt.size);
7292
7293         for (i = 0; i < 6; i++)
7294                 enter_smm_save_seg_32(vcpu, buf, i);
7295
7296         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
7297
7298         /* revision id */
7299         put_smstate(u32, buf, 0x7efc, 0x00020000);
7300         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
7301 }
7302
7303 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
7304 {
7305 #ifdef CONFIG_X86_64
7306         struct desc_ptr dt;
7307         struct kvm_segment seg;
7308         unsigned long val;
7309         int i;
7310
7311         for (i = 0; i < 16; i++)
7312                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
7313
7314         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
7315         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
7316
7317         kvm_get_dr(vcpu, 6, &val);
7318         put_smstate(u64, buf, 0x7f68, val);
7319         kvm_get_dr(vcpu, 7, &val);
7320         put_smstate(u64, buf, 0x7f60, val);
7321
7322         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
7323         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
7324         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
7325
7326         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
7327
7328         /* revision id */
7329         put_smstate(u32, buf, 0x7efc, 0x00020064);
7330
7331         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
7332
7333         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7334         put_smstate(u16, buf, 0x7e90, seg.selector);
7335         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
7336         put_smstate(u32, buf, 0x7e94, seg.limit);
7337         put_smstate(u64, buf, 0x7e98, seg.base);
7338
7339         kvm_x86_ops->get_idt(vcpu, &dt);
7340         put_smstate(u32, buf, 0x7e84, dt.size);
7341         put_smstate(u64, buf, 0x7e88, dt.address);
7342
7343         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7344         put_smstate(u16, buf, 0x7e70, seg.selector);
7345         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
7346         put_smstate(u32, buf, 0x7e74, seg.limit);
7347         put_smstate(u64, buf, 0x7e78, seg.base);
7348
7349         kvm_x86_ops->get_gdt(vcpu, &dt);
7350         put_smstate(u32, buf, 0x7e64, dt.size);
7351         put_smstate(u64, buf, 0x7e68, dt.address);
7352
7353         for (i = 0; i < 6; i++)
7354                 enter_smm_save_seg_64(vcpu, buf, i);
7355 #else
7356         WARN_ON_ONCE(1);
7357 #endif
7358 }
7359
7360 static void enter_smm(struct kvm_vcpu *vcpu)
7361 {
7362         struct kvm_segment cs, ds;
7363         struct desc_ptr dt;
7364         char buf[512];
7365         u32 cr0;
7366
7367         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
7368         memset(buf, 0, 512);
7369         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7370                 enter_smm_save_state_64(vcpu, buf);
7371         else
7372                 enter_smm_save_state_32(vcpu, buf);
7373
7374         /*
7375          * Give pre_enter_smm() a chance to make ISA-specific changes to the
7376          * vCPU state (e.g. leave guest mode) after we've saved the state into
7377          * the SMM state-save area.
7378          */
7379         kvm_x86_ops->pre_enter_smm(vcpu, buf);
7380
7381         vcpu->arch.hflags |= HF_SMM_MASK;
7382         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
7383
7384         if (kvm_x86_ops->get_nmi_mask(vcpu))
7385                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
7386         else
7387                 kvm_x86_ops->set_nmi_mask(vcpu, true);
7388
7389         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
7390         kvm_rip_write(vcpu, 0x8000);
7391
7392         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
7393         kvm_x86_ops->set_cr0(vcpu, cr0);
7394         vcpu->arch.cr0 = cr0;
7395
7396         kvm_x86_ops->set_cr4(vcpu, 0);
7397
7398         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
7399         dt.address = dt.size = 0;
7400         kvm_x86_ops->set_idt(vcpu, &dt);
7401
7402         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
7403
7404         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
7405         cs.base = vcpu->arch.smbase;
7406
7407         ds.selector = 0;
7408         ds.base = 0;
7409
7410         cs.limit    = ds.limit = 0xffffffff;
7411         cs.type     = ds.type = 0x3;
7412         cs.dpl      = ds.dpl = 0;
7413         cs.db       = ds.db = 0;
7414         cs.s        = ds.s = 1;
7415         cs.l        = ds.l = 0;
7416         cs.g        = ds.g = 1;
7417         cs.avl      = ds.avl = 0;
7418         cs.present  = ds.present = 1;
7419         cs.unusable = ds.unusable = 0;
7420         cs.padding  = ds.padding = 0;
7421
7422         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7423         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
7424         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
7425         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
7426         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
7427         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
7428
7429         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7430                 kvm_x86_ops->set_efer(vcpu, 0);
7431
7432         kvm_update_cpuid(vcpu);
7433         kvm_mmu_reset_context(vcpu);
7434 }
7435
7436 static void process_smi(struct kvm_vcpu *vcpu)
7437 {
7438         vcpu->arch.smi_pending = true;
7439         kvm_make_request(KVM_REQ_EVENT, vcpu);
7440 }
7441
7442 void kvm_make_scan_ioapic_request(struct kvm *kvm)
7443 {
7444         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
7445 }
7446
7447 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
7448 {
7449         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
7450                 return;
7451
7452         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
7453
7454         if (irqchip_split(vcpu->kvm))
7455                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
7456         else {
7457                 if (vcpu->arch.apicv_active)
7458                         kvm_x86_ops->sync_pir_to_irr(vcpu);
7459                 if (ioapic_in_kernel(vcpu->kvm))
7460                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
7461         }
7462
7463         if (is_guest_mode(vcpu))
7464                 vcpu->arch.load_eoi_exitmap_pending = true;
7465         else
7466                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
7467 }
7468
7469 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
7470 {
7471         u64 eoi_exit_bitmap[4];
7472
7473         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
7474                 return;
7475
7476         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
7477                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
7478         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
7479 }
7480
7481 int kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
7482                 unsigned long start, unsigned long end,
7483                 bool blockable)
7484 {
7485         unsigned long apic_address;
7486
7487         /*
7488          * The physical address of apic access page is stored in the VMCS.
7489          * Update it when it becomes invalid.
7490          */
7491         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7492         if (start <= apic_address && apic_address < end)
7493                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
7494
7495         return 0;
7496 }
7497
7498 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
7499 {
7500         struct page *page = NULL;
7501
7502         if (!lapic_in_kernel(vcpu))
7503                 return;
7504
7505         if (!kvm_x86_ops->set_apic_access_page_addr)
7506                 return;
7507
7508         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7509         if (is_error_page(page))
7510                 return;
7511         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
7512
7513         /*
7514          * Do not pin apic access page in memory, the MMU notifier
7515          * will call us again if it is migrated or swapped out.
7516          */
7517         put_page(page);
7518 }
7519 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
7520
7521 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
7522 {
7523         smp_send_reschedule(vcpu->cpu);
7524 }
7525 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
7526
7527 /*
7528  * Returns 1 to let vcpu_run() continue the guest execution loop without
7529  * exiting to the userspace.  Otherwise, the value will be returned to the
7530  * userspace.
7531  */
7532 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
7533 {
7534         int r;
7535         bool req_int_win =
7536                 dm_request_for_irq_injection(vcpu) &&
7537                 kvm_cpu_accept_dm_intr(vcpu);
7538
7539         bool req_immediate_exit = false;
7540
7541         if (kvm_request_pending(vcpu)) {
7542                 if (kvm_check_request(KVM_REQ_GET_VMCS12_PAGES, vcpu))
7543                         kvm_x86_ops->get_vmcs12_pages(vcpu);
7544                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
7545                         kvm_mmu_unload(vcpu);
7546                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
7547                         __kvm_migrate_timers(vcpu);
7548                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
7549                         kvm_gen_update_masterclock(vcpu->kvm);
7550                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
7551                         kvm_gen_kvmclock_update(vcpu);
7552                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
7553                         r = kvm_guest_time_update(vcpu);
7554                         if (unlikely(r))
7555                                 goto out;
7556                 }
7557                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
7558                         kvm_mmu_sync_roots(vcpu);
7559                 if (kvm_check_request(KVM_REQ_LOAD_CR3, vcpu))
7560                         kvm_mmu_load_cr3(vcpu);
7561                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
7562                         kvm_vcpu_flush_tlb(vcpu, true);
7563                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
7564                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
7565                         r = 0;
7566                         goto out;
7567                 }
7568                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
7569                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
7570                         vcpu->mmio_needed = 0;
7571                         r = 0;
7572                         goto out;
7573                 }
7574                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
7575                         /* Page is swapped out. Do synthetic halt */
7576                         vcpu->arch.apf.halted = true;
7577                         r = 1;
7578                         goto out;
7579                 }
7580                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
7581                         record_steal_time(vcpu);
7582                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
7583                         process_smi(vcpu);
7584                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
7585                         process_nmi(vcpu);
7586                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
7587                         kvm_pmu_handle_event(vcpu);
7588                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
7589                         kvm_pmu_deliver_pmi(vcpu);
7590                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
7591                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
7592                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
7593                                      vcpu->arch.ioapic_handled_vectors)) {
7594                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
7595                                 vcpu->run->eoi.vector =
7596                                                 vcpu->arch.pending_ioapic_eoi;
7597                                 r = 0;
7598                                 goto out;
7599                         }
7600                 }
7601                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
7602                         vcpu_scan_ioapic(vcpu);
7603                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
7604                         vcpu_load_eoi_exitmap(vcpu);
7605                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
7606                         kvm_vcpu_reload_apic_access_page(vcpu);
7607                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
7608                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
7609                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
7610                         r = 0;
7611                         goto out;
7612                 }
7613                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
7614                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
7615                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
7616                         r = 0;
7617                         goto out;
7618                 }
7619                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
7620                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
7621                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
7622                         r = 0;
7623                         goto out;
7624                 }
7625
7626                 /*
7627                  * KVM_REQ_HV_STIMER has to be processed after
7628                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
7629                  * depend on the guest clock being up-to-date
7630                  */
7631                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
7632                         kvm_hv_process_stimers(vcpu);
7633         }
7634
7635         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
7636                 ++vcpu->stat.req_event;
7637                 kvm_apic_accept_events(vcpu);
7638                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
7639                         r = 1;
7640                         goto out;
7641                 }
7642
7643                 if (inject_pending_event(vcpu, req_int_win) != 0)
7644                         req_immediate_exit = true;
7645                 else {
7646                         /* Enable SMI/NMI/IRQ window open exits if needed.
7647                          *
7648                          * SMIs have three cases:
7649                          * 1) They can be nested, and then there is nothing to
7650                          *    do here because RSM will cause a vmexit anyway.
7651                          * 2) There is an ISA-specific reason why SMI cannot be
7652                          *    injected, and the moment when this changes can be
7653                          *    intercepted.
7654                          * 3) Or the SMI can be pending because
7655                          *    inject_pending_event has completed the injection
7656                          *    of an IRQ or NMI from the previous vmexit, and
7657                          *    then we request an immediate exit to inject the
7658                          *    SMI.
7659                          */
7660                         if (vcpu->arch.smi_pending && !is_smm(vcpu))
7661                                 if (!kvm_x86_ops->enable_smi_window(vcpu))
7662                                         req_immediate_exit = true;
7663                         if (vcpu->arch.nmi_pending)
7664                                 kvm_x86_ops->enable_nmi_window(vcpu);
7665                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
7666                                 kvm_x86_ops->enable_irq_window(vcpu);
7667                         WARN_ON(vcpu->arch.exception.pending);
7668                 }
7669
7670                 if (kvm_lapic_enabled(vcpu)) {
7671                         update_cr8_intercept(vcpu);
7672                         kvm_lapic_sync_to_vapic(vcpu);
7673                 }
7674         }
7675
7676         r = kvm_mmu_reload(vcpu);
7677         if (unlikely(r)) {
7678                 goto cancel_injection;
7679         }
7680
7681         preempt_disable();
7682
7683         kvm_x86_ops->prepare_guest_switch(vcpu);
7684
7685         /*
7686          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
7687          * IPI are then delayed after guest entry, which ensures that they
7688          * result in virtual interrupt delivery.
7689          */
7690         local_irq_disable();
7691         vcpu->mode = IN_GUEST_MODE;
7692
7693         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
7694
7695         /*
7696          * 1) We should set ->mode before checking ->requests.  Please see
7697          * the comment in kvm_vcpu_exiting_guest_mode().
7698          *
7699          * 2) For APICv, we should set ->mode before checking PIR.ON.  This
7700          * pairs with the memory barrier implicit in pi_test_and_set_on
7701          * (see vmx_deliver_posted_interrupt).
7702          *
7703          * 3) This also orders the write to mode from any reads to the page
7704          * tables done while the VCPU is running.  Please see the comment
7705          * in kvm_flush_remote_tlbs.
7706          */
7707         smp_mb__after_srcu_read_unlock();
7708
7709         /*
7710          * This handles the case where a posted interrupt was
7711          * notified with kvm_vcpu_kick.
7712          */
7713         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
7714                 kvm_x86_ops->sync_pir_to_irr(vcpu);
7715
7716         if (vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu)
7717             || need_resched() || signal_pending(current)) {
7718                 vcpu->mode = OUTSIDE_GUEST_MODE;
7719                 smp_wmb();
7720                 local_irq_enable();
7721                 preempt_enable();
7722                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7723                 r = 1;
7724                 goto cancel_injection;
7725         }
7726
7727         kvm_load_guest_xcr0(vcpu);
7728
7729         if (req_immediate_exit) {
7730                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7731                 kvm_x86_ops->request_immediate_exit(vcpu);
7732         }
7733
7734         trace_kvm_entry(vcpu->vcpu_id);
7735         if (lapic_timer_advance_ns)
7736                 wait_lapic_expire(vcpu);
7737         guest_enter_irqoff();
7738
7739         if (unlikely(vcpu->arch.switch_db_regs)) {
7740                 set_debugreg(0, 7);
7741                 set_debugreg(vcpu->arch.eff_db[0], 0);
7742                 set_debugreg(vcpu->arch.eff_db[1], 1);
7743                 set_debugreg(vcpu->arch.eff_db[2], 2);
7744                 set_debugreg(vcpu->arch.eff_db[3], 3);
7745                 set_debugreg(vcpu->arch.dr6, 6);
7746                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
7747         }
7748
7749         kvm_x86_ops->run(vcpu);
7750
7751         /*
7752          * Do this here before restoring debug registers on the host.  And
7753          * since we do this before handling the vmexit, a DR access vmexit
7754          * can (a) read the correct value of the debug registers, (b) set
7755          * KVM_DEBUGREG_WONT_EXIT again.
7756          */
7757         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
7758                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
7759                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
7760                 kvm_update_dr0123(vcpu);
7761                 kvm_update_dr6(vcpu);
7762                 kvm_update_dr7(vcpu);
7763                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
7764         }
7765
7766         /*
7767          * If the guest has used debug registers, at least dr7
7768          * will be disabled while returning to the host.
7769          * If we don't have active breakpoints in the host, we don't
7770          * care about the messed up debug address registers. But if
7771          * we have some of them active, restore the old state.
7772          */
7773         if (hw_breakpoint_active())
7774                 hw_breakpoint_restore();
7775
7776         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
7777
7778         vcpu->mode = OUTSIDE_GUEST_MODE;
7779         smp_wmb();
7780
7781         kvm_put_guest_xcr0(vcpu);
7782
7783         kvm_before_interrupt(vcpu);
7784         kvm_x86_ops->handle_external_intr(vcpu);
7785         kvm_after_interrupt(vcpu);
7786
7787         ++vcpu->stat.exits;
7788
7789         guest_exit_irqoff();
7790
7791         local_irq_enable();
7792         preempt_enable();
7793
7794         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7795
7796         /*
7797          * Profile KVM exit RIPs:
7798          */
7799         if (unlikely(prof_on == KVM_PROFILING)) {
7800                 unsigned long rip = kvm_rip_read(vcpu);
7801                 profile_hit(KVM_PROFILING, (void *)rip);
7802         }
7803
7804         if (unlikely(vcpu->arch.tsc_always_catchup))
7805                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7806
7807         if (vcpu->arch.apic_attention)
7808                 kvm_lapic_sync_from_vapic(vcpu);
7809
7810         vcpu->arch.gpa_available = false;
7811         r = kvm_x86_ops->handle_exit(vcpu);
7812         return r;
7813
7814 cancel_injection:
7815         kvm_x86_ops->cancel_injection(vcpu);
7816         if (unlikely(vcpu->arch.apic_attention))
7817                 kvm_lapic_sync_from_vapic(vcpu);
7818 out:
7819         return r;
7820 }
7821
7822 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
7823 {
7824         if (!kvm_arch_vcpu_runnable(vcpu) &&
7825             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
7826                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7827                 kvm_vcpu_block(vcpu);
7828                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7829
7830                 if (kvm_x86_ops->post_block)
7831                         kvm_x86_ops->post_block(vcpu);
7832
7833                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
7834                         return 1;
7835         }
7836
7837         kvm_apic_accept_events(vcpu);
7838         switch(vcpu->arch.mp_state) {
7839         case KVM_MP_STATE_HALTED:
7840                 vcpu->arch.pv.pv_unhalted = false;
7841                 vcpu->arch.mp_state =
7842                         KVM_MP_STATE_RUNNABLE;
7843         case KVM_MP_STATE_RUNNABLE:
7844                 vcpu->arch.apf.halted = false;
7845                 break;
7846         case KVM_MP_STATE_INIT_RECEIVED:
7847                 break;
7848         default:
7849                 return -EINTR;
7850                 break;
7851         }
7852         return 1;
7853 }
7854
7855 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
7856 {
7857         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
7858                 kvm_x86_ops->check_nested_events(vcpu, false);
7859
7860         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7861                 !vcpu->arch.apf.halted);
7862 }
7863
7864 static int vcpu_run(struct kvm_vcpu *vcpu)
7865 {
7866         int r;
7867         struct kvm *kvm = vcpu->kvm;
7868
7869         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7870         vcpu->arch.l1tf_flush_l1d = true;
7871
7872         for (;;) {
7873                 if (kvm_vcpu_running(vcpu)) {
7874                         r = vcpu_enter_guest(vcpu);
7875                 } else {
7876                         r = vcpu_block(kvm, vcpu);
7877                 }
7878
7879                 if (r <= 0)
7880                         break;
7881
7882                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
7883                 if (kvm_cpu_has_pending_timer(vcpu))
7884                         kvm_inject_pending_timer_irqs(vcpu);
7885
7886                 if (dm_request_for_irq_injection(vcpu) &&
7887                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
7888                         r = 0;
7889                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
7890                         ++vcpu->stat.request_irq_exits;
7891                         break;
7892                 }
7893
7894                 kvm_check_async_pf_completion(vcpu);
7895
7896                 if (signal_pending(current)) {
7897                         r = -EINTR;
7898                         vcpu->run->exit_reason = KVM_EXIT_INTR;
7899                         ++vcpu->stat.signal_exits;
7900                         break;
7901                 }
7902                 if (need_resched()) {
7903                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7904                         cond_resched();
7905                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7906                 }
7907         }
7908
7909         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7910
7911         return r;
7912 }
7913
7914 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
7915 {
7916         int r;
7917         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7918         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
7919         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
7920         if (r != EMULATE_DONE)
7921                 return 0;
7922         return 1;
7923 }
7924
7925 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
7926 {
7927         BUG_ON(!vcpu->arch.pio.count);
7928
7929         return complete_emulated_io(vcpu);
7930 }
7931
7932 /*
7933  * Implements the following, as a state machine:
7934  *
7935  * read:
7936  *   for each fragment
7937  *     for each mmio piece in the fragment
7938  *       write gpa, len
7939  *       exit
7940  *       copy data
7941  *   execute insn
7942  *
7943  * write:
7944  *   for each fragment
7945  *     for each mmio piece in the fragment
7946  *       write gpa, len
7947  *       copy data
7948  *       exit
7949  */
7950 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
7951 {
7952         struct kvm_run *run = vcpu->run;
7953         struct kvm_mmio_fragment *frag;
7954         unsigned len;
7955
7956         BUG_ON(!vcpu->mmio_needed);
7957
7958         /* Complete previous fragment */
7959         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
7960         len = min(8u, frag->len);
7961         if (!vcpu->mmio_is_write)
7962                 memcpy(frag->data, run->mmio.data, len);
7963
7964         if (frag->len <= 8) {
7965                 /* Switch to the next fragment. */
7966                 frag++;
7967                 vcpu->mmio_cur_fragment++;
7968         } else {
7969                 /* Go forward to the next mmio piece. */
7970                 frag->data += len;
7971                 frag->gpa += len;
7972                 frag->len -= len;
7973         }
7974
7975         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
7976                 vcpu->mmio_needed = 0;
7977
7978                 /* FIXME: return into emulator if single-stepping.  */
7979                 if (vcpu->mmio_is_write)
7980                         return 1;
7981                 vcpu->mmio_read_completed = 1;
7982                 return complete_emulated_io(vcpu);
7983         }
7984
7985         run->exit_reason = KVM_EXIT_MMIO;
7986         run->mmio.phys_addr = frag->gpa;
7987         if (vcpu->mmio_is_write)
7988                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
7989         run->mmio.len = min(8u, frag->len);
7990         run->mmio.is_write = vcpu->mmio_is_write;
7991         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7992         return 0;
7993 }
7994
7995 /* Swap (qemu) user FPU context for the guest FPU context. */
7996 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7997 {
7998         preempt_disable();
7999         copy_fpregs_to_fpstate(&vcpu->arch.user_fpu);
8000         /* PKRU is separately restored in kvm_x86_ops->run.  */
8001         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state,
8002                                 ~XFEATURE_MASK_PKRU);
8003         preempt_enable();
8004         trace_kvm_fpu(1);
8005 }
8006
8007 /* When vcpu_run ends, restore user space FPU context. */
8008 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
8009 {
8010         preempt_disable();
8011         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
8012         copy_kernel_to_fpregs(&vcpu->arch.user_fpu.state);
8013         preempt_enable();
8014         ++vcpu->stat.fpu_reload;
8015         trace_kvm_fpu(0);
8016 }
8017
8018 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
8019 {
8020         int r;
8021
8022         vcpu_load(vcpu);
8023         kvm_sigset_activate(vcpu);
8024         kvm_load_guest_fpu(vcpu);
8025
8026         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
8027                 if (kvm_run->immediate_exit) {
8028                         r = -EINTR;
8029                         goto out;
8030                 }
8031                 kvm_vcpu_block(vcpu);
8032                 kvm_apic_accept_events(vcpu);
8033                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
8034                 r = -EAGAIN;
8035                 if (signal_pending(current)) {
8036                         r = -EINTR;
8037                         vcpu->run->exit_reason = KVM_EXIT_INTR;
8038                         ++vcpu->stat.signal_exits;
8039                 }
8040                 goto out;
8041         }
8042
8043         if (vcpu->run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
8044                 r = -EINVAL;
8045                 goto out;
8046         }
8047
8048         if (vcpu->run->kvm_dirty_regs) {
8049                 r = sync_regs(vcpu);
8050                 if (r != 0)
8051                         goto out;
8052         }
8053
8054         /* re-sync apic's tpr */
8055         if (!lapic_in_kernel(vcpu)) {
8056                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
8057                         r = -EINVAL;
8058                         goto out;
8059                 }
8060         }
8061
8062         if (unlikely(vcpu->arch.complete_userspace_io)) {
8063                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
8064                 vcpu->arch.complete_userspace_io = NULL;
8065                 r = cui(vcpu);
8066                 if (r <= 0)
8067                         goto out;
8068         } else
8069                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
8070
8071         if (kvm_run->immediate_exit)
8072                 r = -EINTR;
8073         else
8074                 r = vcpu_run(vcpu);
8075
8076 out:
8077         kvm_put_guest_fpu(vcpu);
8078         if (vcpu->run->kvm_valid_regs)
8079                 store_regs(vcpu);
8080         post_kvm_run_save(vcpu);
8081         kvm_sigset_deactivate(vcpu);
8082
8083         vcpu_put(vcpu);
8084         return r;
8085 }
8086
8087 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8088 {
8089         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
8090                 /*
8091                  * We are here if userspace calls get_regs() in the middle of
8092                  * instruction emulation. Registers state needs to be copied
8093                  * back from emulation context to vcpu. Userspace shouldn't do
8094                  * that usually, but some bad designed PV devices (vmware
8095                  * backdoor interface) need this to work
8096                  */
8097                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
8098                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8099         }
8100         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
8101         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
8102         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
8103         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
8104         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
8105         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
8106         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
8107         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
8108 #ifdef CONFIG_X86_64
8109         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
8110         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
8111         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
8112         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
8113         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
8114         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
8115         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
8116         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
8117 #endif
8118
8119         regs->rip = kvm_rip_read(vcpu);
8120         regs->rflags = kvm_get_rflags(vcpu);
8121 }
8122
8123 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8124 {
8125         vcpu_load(vcpu);
8126         __get_regs(vcpu, regs);
8127         vcpu_put(vcpu);
8128         return 0;
8129 }
8130
8131 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8132 {
8133         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
8134         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8135
8136         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
8137         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
8138         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
8139         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
8140         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
8141         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
8142         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
8143         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
8144 #ifdef CONFIG_X86_64
8145         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
8146         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
8147         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
8148         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
8149         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
8150         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
8151         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
8152         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
8153 #endif
8154
8155         kvm_rip_write(vcpu, regs->rip);
8156         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
8157
8158         vcpu->arch.exception.pending = false;
8159
8160         kvm_make_request(KVM_REQ_EVENT, vcpu);
8161 }
8162
8163 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8164 {
8165         vcpu_load(vcpu);
8166         __set_regs(vcpu, regs);
8167         vcpu_put(vcpu);
8168         return 0;
8169 }
8170
8171 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
8172 {
8173         struct kvm_segment cs;
8174
8175         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
8176         *db = cs.db;
8177         *l = cs.l;
8178 }
8179 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
8180
8181 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8182 {
8183         struct desc_ptr dt;
8184
8185         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
8186         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
8187         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
8188         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
8189         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
8190         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
8191
8192         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
8193         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
8194
8195         kvm_x86_ops->get_idt(vcpu, &dt);
8196         sregs->idt.limit = dt.size;
8197         sregs->idt.base = dt.address;
8198         kvm_x86_ops->get_gdt(vcpu, &dt);
8199         sregs->gdt.limit = dt.size;
8200         sregs->gdt.base = dt.address;
8201
8202         sregs->cr0 = kvm_read_cr0(vcpu);
8203         sregs->cr2 = vcpu->arch.cr2;
8204         sregs->cr3 = kvm_read_cr3(vcpu);
8205         sregs->cr4 = kvm_read_cr4(vcpu);
8206         sregs->cr8 = kvm_get_cr8(vcpu);
8207         sregs->efer = vcpu->arch.efer;
8208         sregs->apic_base = kvm_get_apic_base(vcpu);
8209
8210         memset(sregs->interrupt_bitmap, 0, sizeof(sregs->interrupt_bitmap));
8211
8212         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
8213                 set_bit(vcpu->arch.interrupt.nr,
8214                         (unsigned long *)sregs->interrupt_bitmap);
8215 }
8216
8217 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
8218                                   struct kvm_sregs *sregs)
8219 {
8220         vcpu_load(vcpu);
8221         __get_sregs(vcpu, sregs);
8222         vcpu_put(vcpu);
8223         return 0;
8224 }
8225
8226 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
8227                                     struct kvm_mp_state *mp_state)
8228 {
8229         vcpu_load(vcpu);
8230
8231         kvm_apic_accept_events(vcpu);
8232         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
8233                                         vcpu->arch.pv.pv_unhalted)
8234                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
8235         else
8236                 mp_state->mp_state = vcpu->arch.mp_state;
8237
8238         vcpu_put(vcpu);
8239         return 0;
8240 }
8241
8242 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
8243                                     struct kvm_mp_state *mp_state)
8244 {
8245         int ret = -EINVAL;
8246
8247         vcpu_load(vcpu);
8248
8249         if (!lapic_in_kernel(vcpu) &&
8250             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
8251                 goto out;
8252
8253         /* INITs are latched while in SMM */
8254         if ((is_smm(vcpu) || vcpu->arch.smi_pending) &&
8255             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
8256              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
8257                 goto out;
8258
8259         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
8260                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
8261                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
8262         } else
8263                 vcpu->arch.mp_state = mp_state->mp_state;
8264         kvm_make_request(KVM_REQ_EVENT, vcpu);
8265
8266         ret = 0;
8267 out:
8268         vcpu_put(vcpu);
8269         return ret;
8270 }
8271
8272 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
8273                     int reason, bool has_error_code, u32 error_code)
8274 {
8275         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
8276         int ret;
8277
8278         init_emulate_ctxt(vcpu);
8279
8280         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
8281                                    has_error_code, error_code);
8282
8283         if (ret)
8284                 return EMULATE_FAIL;
8285
8286         kvm_rip_write(vcpu, ctxt->eip);
8287         kvm_set_rflags(vcpu, ctxt->eflags);
8288         kvm_make_request(KVM_REQ_EVENT, vcpu);
8289         return EMULATE_DONE;
8290 }
8291 EXPORT_SYMBOL_GPL(kvm_task_switch);
8292
8293 static int kvm_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8294 {
8295         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) &&
8296                         (sregs->cr4 & X86_CR4_OSXSAVE))
8297                 return  -EINVAL;
8298
8299         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
8300                 /*
8301                  * When EFER.LME and CR0.PG are set, the processor is in
8302                  * 64-bit mode (though maybe in a 32-bit code segment).
8303                  * CR4.PAE and EFER.LMA must be set.
8304                  */
8305                 if (!(sregs->cr4 & X86_CR4_PAE)
8306                     || !(sregs->efer & EFER_LMA))
8307                         return -EINVAL;
8308         } else {
8309                 /*
8310                  * Not in 64-bit mode: EFER.LMA is clear and the code
8311                  * segment cannot be 64-bit.
8312                  */
8313                 if (sregs->efer & EFER_LMA || sregs->cs.l)
8314                         return -EINVAL;
8315         }
8316
8317         return 0;
8318 }
8319
8320 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8321 {
8322         struct msr_data apic_base_msr;
8323         int mmu_reset_needed = 0;
8324         int cpuid_update_needed = 0;
8325         int pending_vec, max_bits, idx;
8326         struct desc_ptr dt;
8327         int ret = -EINVAL;
8328
8329         if (kvm_valid_sregs(vcpu, sregs))
8330                 goto out;
8331
8332         apic_base_msr.data = sregs->apic_base;
8333         apic_base_msr.host_initiated = true;
8334         if (kvm_set_apic_base(vcpu, &apic_base_msr))
8335                 goto out;
8336
8337         dt.size = sregs->idt.limit;
8338         dt.address = sregs->idt.base;
8339         kvm_x86_ops->set_idt(vcpu, &dt);
8340         dt.size = sregs->gdt.limit;
8341         dt.address = sregs->gdt.base;
8342         kvm_x86_ops->set_gdt(vcpu, &dt);
8343
8344         vcpu->arch.cr2 = sregs->cr2;
8345         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
8346         vcpu->arch.cr3 = sregs->cr3;
8347         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
8348
8349         kvm_set_cr8(vcpu, sregs->cr8);
8350
8351         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
8352         kvm_x86_ops->set_efer(vcpu, sregs->efer);
8353
8354         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
8355         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
8356         vcpu->arch.cr0 = sregs->cr0;
8357
8358         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
8359         cpuid_update_needed |= ((kvm_read_cr4(vcpu) ^ sregs->cr4) &
8360                                 (X86_CR4_OSXSAVE | X86_CR4_PKE));
8361         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
8362         if (cpuid_update_needed)
8363                 kvm_update_cpuid(vcpu);
8364
8365         idx = srcu_read_lock(&vcpu->kvm->srcu);
8366         if (!is_long_mode(vcpu) && is_pae(vcpu) && is_paging(vcpu)) {
8367                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
8368                 mmu_reset_needed = 1;
8369         }
8370         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8371
8372         if (mmu_reset_needed)
8373                 kvm_mmu_reset_context(vcpu);
8374
8375         max_bits = KVM_NR_INTERRUPTS;
8376         pending_vec = find_first_bit(
8377                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
8378         if (pending_vec < max_bits) {
8379                 kvm_queue_interrupt(vcpu, pending_vec, false);
8380                 pr_debug("Set back pending irq %d\n", pending_vec);
8381         }
8382
8383         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
8384         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
8385         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
8386         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
8387         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
8388         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
8389
8390         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
8391         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
8392
8393         update_cr8_intercept(vcpu);
8394
8395         /* Older userspace won't unhalt the vcpu on reset. */
8396         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
8397             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
8398             !is_protmode(vcpu))
8399                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8400
8401         kvm_make_request(KVM_REQ_EVENT, vcpu);
8402
8403         ret = 0;
8404 out:
8405         return ret;
8406 }
8407
8408 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
8409                                   struct kvm_sregs *sregs)
8410 {
8411         int ret;
8412
8413         vcpu_load(vcpu);
8414         ret = __set_sregs(vcpu, sregs);
8415         vcpu_put(vcpu);
8416         return ret;
8417 }
8418
8419 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
8420                                         struct kvm_guest_debug *dbg)
8421 {
8422         unsigned long rflags;
8423         int i, r;
8424
8425         vcpu_load(vcpu);
8426
8427         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
8428                 r = -EBUSY;
8429                 if (vcpu->arch.exception.pending)
8430                         goto out;
8431                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
8432                         kvm_queue_exception(vcpu, DB_VECTOR);
8433                 else
8434                         kvm_queue_exception(vcpu, BP_VECTOR);
8435         }
8436
8437         /*
8438          * Read rflags as long as potentially injected trace flags are still
8439          * filtered out.
8440          */
8441         rflags = kvm_get_rflags(vcpu);
8442
8443         vcpu->guest_debug = dbg->control;
8444         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
8445                 vcpu->guest_debug = 0;
8446
8447         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
8448                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
8449                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
8450                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
8451         } else {
8452                 for (i = 0; i < KVM_NR_DB_REGS; i++)
8453                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
8454         }
8455         kvm_update_dr7(vcpu);
8456
8457         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8458                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
8459                         get_segment_base(vcpu, VCPU_SREG_CS);
8460
8461         /*
8462          * Trigger an rflags update that will inject or remove the trace
8463          * flags.
8464          */
8465         kvm_set_rflags(vcpu, rflags);
8466
8467         kvm_x86_ops->update_bp_intercept(vcpu);
8468
8469         r = 0;
8470
8471 out:
8472         vcpu_put(vcpu);
8473         return r;
8474 }
8475
8476 /*
8477  * Translate a guest virtual address to a guest physical address.
8478  */
8479 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
8480                                     struct kvm_translation *tr)
8481 {
8482         unsigned long vaddr = tr->linear_address;
8483         gpa_t gpa;
8484         int idx;
8485
8486         vcpu_load(vcpu);
8487
8488         idx = srcu_read_lock(&vcpu->kvm->srcu);
8489         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
8490         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8491         tr->physical_address = gpa;
8492         tr->valid = gpa != UNMAPPED_GVA;
8493         tr->writeable = 1;
8494         tr->usermode = 0;
8495
8496         vcpu_put(vcpu);
8497         return 0;
8498 }
8499
8500 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8501 {
8502         struct fxregs_state *fxsave;
8503
8504         vcpu_load(vcpu);
8505
8506         fxsave = &vcpu->arch.guest_fpu.state.fxsave;
8507         memcpy(fpu->fpr, fxsave->st_space, 128);
8508         fpu->fcw = fxsave->cwd;
8509         fpu->fsw = fxsave->swd;
8510         fpu->ftwx = fxsave->twd;
8511         fpu->last_opcode = fxsave->fop;
8512         fpu->last_ip = fxsave->rip;
8513         fpu->last_dp = fxsave->rdp;
8514         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
8515
8516         vcpu_put(vcpu);
8517         return 0;
8518 }
8519
8520 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8521 {
8522         struct fxregs_state *fxsave;
8523
8524         vcpu_load(vcpu);
8525
8526         fxsave = &vcpu->arch.guest_fpu.state.fxsave;
8527
8528         memcpy(fxsave->st_space, fpu->fpr, 128);
8529         fxsave->cwd = fpu->fcw;
8530         fxsave->swd = fpu->fsw;
8531         fxsave->twd = fpu->ftwx;
8532         fxsave->fop = fpu->last_opcode;
8533         fxsave->rip = fpu->last_ip;
8534         fxsave->rdp = fpu->last_dp;
8535         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
8536
8537         vcpu_put(vcpu);
8538         return 0;
8539 }
8540
8541 static void store_regs(struct kvm_vcpu *vcpu)
8542 {
8543         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
8544
8545         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
8546                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
8547
8548         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
8549                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
8550
8551         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
8552                 kvm_vcpu_ioctl_x86_get_vcpu_events(
8553                                 vcpu, &vcpu->run->s.regs.events);
8554 }
8555
8556 static int sync_regs(struct kvm_vcpu *vcpu)
8557 {
8558         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
8559                 return -EINVAL;
8560
8561         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
8562                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
8563                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
8564         }
8565         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
8566                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
8567                         return -EINVAL;
8568                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
8569         }
8570         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
8571                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
8572                                 vcpu, &vcpu->run->s.regs.events))
8573                         return -EINVAL;
8574                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
8575         }
8576
8577         return 0;
8578 }
8579
8580 static void fx_init(struct kvm_vcpu *vcpu)
8581 {
8582         fpstate_init(&vcpu->arch.guest_fpu.state);
8583         if (boot_cpu_has(X86_FEATURE_XSAVES))
8584                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
8585                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
8586
8587         /*
8588          * Ensure guest xcr0 is valid for loading
8589          */
8590         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
8591
8592         vcpu->arch.cr0 |= X86_CR0_ET;
8593 }
8594
8595 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
8596 {
8597         void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
8598
8599         kvmclock_reset(vcpu);
8600
8601         kvm_x86_ops->vcpu_free(vcpu);
8602         free_cpumask_var(wbinvd_dirty_mask);
8603 }
8604
8605 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
8606                                                 unsigned int id)
8607 {
8608         struct kvm_vcpu *vcpu;
8609
8610         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
8611                 printk_once(KERN_WARNING
8612                 "kvm: SMP vm created on host with unstable TSC; "
8613                 "guest TSC will not be reliable\n");
8614
8615         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
8616
8617         return vcpu;
8618 }
8619
8620 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
8621 {
8622         kvm_vcpu_mtrr_init(vcpu);
8623         vcpu_load(vcpu);
8624         kvm_vcpu_reset(vcpu, false);
8625         kvm_init_mmu(vcpu, false);
8626         vcpu_put(vcpu);
8627         return 0;
8628 }
8629
8630 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
8631 {
8632         struct msr_data msr;
8633         struct kvm *kvm = vcpu->kvm;
8634
8635         kvm_hv_vcpu_postcreate(vcpu);
8636
8637         if (mutex_lock_killable(&vcpu->mutex))
8638                 return;
8639         vcpu_load(vcpu);
8640         msr.data = 0x0;
8641         msr.index = MSR_IA32_TSC;
8642         msr.host_initiated = true;
8643         kvm_write_tsc(vcpu, &msr);
8644         vcpu_put(vcpu);
8645         mutex_unlock(&vcpu->mutex);
8646
8647         if (!kvmclock_periodic_sync)
8648                 return;
8649
8650         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
8651                                         KVMCLOCK_SYNC_PERIOD);
8652 }
8653
8654 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
8655 {
8656         vcpu->arch.apf.msr_val = 0;
8657
8658         vcpu_load(vcpu);
8659         kvm_mmu_unload(vcpu);
8660         vcpu_put(vcpu);
8661
8662         kvm_x86_ops->vcpu_free(vcpu);
8663 }
8664
8665 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
8666 {
8667         kvm_lapic_reset(vcpu, init_event);
8668
8669         vcpu->arch.hflags = 0;
8670
8671         vcpu->arch.smi_pending = 0;
8672         vcpu->arch.smi_count = 0;
8673         atomic_set(&vcpu->arch.nmi_queued, 0);
8674         vcpu->arch.nmi_pending = 0;
8675         vcpu->arch.nmi_injected = false;
8676         kvm_clear_interrupt_queue(vcpu);
8677         kvm_clear_exception_queue(vcpu);
8678         vcpu->arch.exception.pending = false;
8679
8680         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
8681         kvm_update_dr0123(vcpu);
8682         vcpu->arch.dr6 = DR6_INIT;
8683         kvm_update_dr6(vcpu);
8684         vcpu->arch.dr7 = DR7_FIXED_1;
8685         kvm_update_dr7(vcpu);
8686
8687         vcpu->arch.cr2 = 0;
8688
8689         kvm_make_request(KVM_REQ_EVENT, vcpu);
8690         vcpu->arch.apf.msr_val = 0;
8691         vcpu->arch.st.msr_val = 0;
8692
8693         kvmclock_reset(vcpu);
8694
8695         kvm_clear_async_pf_completion_queue(vcpu);
8696         kvm_async_pf_hash_reset(vcpu);
8697         vcpu->arch.apf.halted = false;
8698
8699         if (kvm_mpx_supported()) {
8700                 void *mpx_state_buffer;
8701
8702                 /*
8703                  * To avoid have the INIT path from kvm_apic_has_events() that be
8704                  * called with loaded FPU and does not let userspace fix the state.
8705                  */
8706                 if (init_event)
8707                         kvm_put_guest_fpu(vcpu);
8708                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu.state.xsave,
8709                                         XFEATURE_MASK_BNDREGS);
8710                 if (mpx_state_buffer)
8711                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
8712                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu.state.xsave,
8713                                         XFEATURE_MASK_BNDCSR);
8714                 if (mpx_state_buffer)
8715                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
8716                 if (init_event)
8717                         kvm_load_guest_fpu(vcpu);
8718         }
8719
8720         if (!init_event) {
8721                 kvm_pmu_reset(vcpu);
8722                 vcpu->arch.smbase = 0x30000;
8723
8724                 vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
8725                 vcpu->arch.msr_misc_features_enables = 0;
8726
8727                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
8728         }
8729
8730         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
8731         vcpu->arch.regs_avail = ~0;
8732         vcpu->arch.regs_dirty = ~0;
8733
8734         vcpu->arch.ia32_xss = 0;
8735
8736         kvm_x86_ops->vcpu_reset(vcpu, init_event);
8737 }
8738
8739 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
8740 {
8741         struct kvm_segment cs;
8742
8743         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
8744         cs.selector = vector << 8;
8745         cs.base = vector << 12;
8746         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
8747         kvm_rip_write(vcpu, 0);
8748 }
8749
8750 int kvm_arch_hardware_enable(void)
8751 {
8752         struct kvm *kvm;
8753         struct kvm_vcpu *vcpu;
8754         int i;
8755         int ret;
8756         u64 local_tsc;
8757         u64 max_tsc = 0;
8758         bool stable, backwards_tsc = false;
8759
8760         kvm_shared_msr_cpu_online();
8761         ret = kvm_x86_ops->hardware_enable();
8762         if (ret != 0)
8763                 return ret;
8764
8765         local_tsc = rdtsc();
8766         stable = !kvm_check_tsc_unstable();
8767         list_for_each_entry(kvm, &vm_list, vm_list) {
8768                 kvm_for_each_vcpu(i, vcpu, kvm) {
8769                         if (!stable && vcpu->cpu == smp_processor_id())
8770                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8771                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
8772                                 backwards_tsc = true;
8773                                 if (vcpu->arch.last_host_tsc > max_tsc)
8774                                         max_tsc = vcpu->arch.last_host_tsc;
8775                         }
8776                 }
8777         }
8778
8779         /*
8780          * Sometimes, even reliable TSCs go backwards.  This happens on
8781          * platforms that reset TSC during suspend or hibernate actions, but
8782          * maintain synchronization.  We must compensate.  Fortunately, we can
8783          * detect that condition here, which happens early in CPU bringup,
8784          * before any KVM threads can be running.  Unfortunately, we can't
8785          * bring the TSCs fully up to date with real time, as we aren't yet far
8786          * enough into CPU bringup that we know how much real time has actually
8787          * elapsed; our helper function, ktime_get_boot_ns() will be using boot
8788          * variables that haven't been updated yet.
8789          *
8790          * So we simply find the maximum observed TSC above, then record the
8791          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
8792          * the adjustment will be applied.  Note that we accumulate
8793          * adjustments, in case multiple suspend cycles happen before some VCPU
8794          * gets a chance to run again.  In the event that no KVM threads get a
8795          * chance to run, we will miss the entire elapsed period, as we'll have
8796          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
8797          * loose cycle time.  This isn't too big a deal, since the loss will be
8798          * uniform across all VCPUs (not to mention the scenario is extremely
8799          * unlikely). It is possible that a second hibernate recovery happens
8800          * much faster than a first, causing the observed TSC here to be
8801          * smaller; this would require additional padding adjustment, which is
8802          * why we set last_host_tsc to the local tsc observed here.
8803          *
8804          * N.B. - this code below runs only on platforms with reliable TSC,
8805          * as that is the only way backwards_tsc is set above.  Also note
8806          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
8807          * have the same delta_cyc adjustment applied if backwards_tsc
8808          * is detected.  Note further, this adjustment is only done once,
8809          * as we reset last_host_tsc on all VCPUs to stop this from being
8810          * called multiple times (one for each physical CPU bringup).
8811          *
8812          * Platforms with unreliable TSCs don't have to deal with this, they
8813          * will be compensated by the logic in vcpu_load, which sets the TSC to
8814          * catchup mode.  This will catchup all VCPUs to real time, but cannot
8815          * guarantee that they stay in perfect synchronization.
8816          */
8817         if (backwards_tsc) {
8818                 u64 delta_cyc = max_tsc - local_tsc;
8819                 list_for_each_entry(kvm, &vm_list, vm_list) {
8820                         kvm->arch.backwards_tsc_observed = true;
8821                         kvm_for_each_vcpu(i, vcpu, kvm) {
8822                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
8823                                 vcpu->arch.last_host_tsc = local_tsc;
8824                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8825                         }
8826
8827                         /*
8828                          * We have to disable TSC offset matching.. if you were
8829                          * booting a VM while issuing an S4 host suspend....
8830                          * you may have some problem.  Solving this issue is
8831                          * left as an exercise to the reader.
8832                          */
8833                         kvm->arch.last_tsc_nsec = 0;
8834                         kvm->arch.last_tsc_write = 0;
8835                 }
8836
8837         }
8838         return 0;
8839 }
8840
8841 void kvm_arch_hardware_disable(void)
8842 {
8843         kvm_x86_ops->hardware_disable();
8844         drop_user_return_notifiers();
8845 }
8846
8847 int kvm_arch_hardware_setup(void)
8848 {
8849         int r;
8850
8851         r = kvm_x86_ops->hardware_setup();
8852         if (r != 0)
8853                 return r;
8854
8855         if (kvm_has_tsc_control) {
8856                 /*
8857                  * Make sure the user can only configure tsc_khz values that
8858                  * fit into a signed integer.
8859                  * A min value is not calculated because it will always
8860                  * be 1 on all machines.
8861                  */
8862                 u64 max = min(0x7fffffffULL,
8863                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
8864                 kvm_max_guest_tsc_khz = max;
8865
8866                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
8867         }
8868
8869         kvm_init_msr_list();
8870         return 0;
8871 }
8872
8873 void kvm_arch_hardware_unsetup(void)
8874 {
8875         kvm_x86_ops->hardware_unsetup();
8876 }
8877
8878 void kvm_arch_check_processor_compat(void *rtn)
8879 {
8880         kvm_x86_ops->check_processor_compatibility(rtn);
8881 }
8882
8883 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
8884 {
8885         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
8886 }
8887 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
8888
8889 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
8890 {
8891         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
8892 }
8893
8894 struct static_key kvm_no_apic_vcpu __read_mostly;
8895 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
8896
8897 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
8898 {
8899         struct page *page;
8900         int r;
8901
8902         vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv(vcpu);
8903         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
8904         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
8905                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8906         else
8907                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
8908
8909         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
8910         if (!page) {
8911                 r = -ENOMEM;
8912                 goto fail;
8913         }
8914         vcpu->arch.pio_data = page_address(page);
8915
8916         kvm_set_tsc_khz(vcpu, max_tsc_khz);
8917
8918         r = kvm_mmu_create(vcpu);
8919         if (r < 0)
8920                 goto fail_free_pio_data;
8921
8922         if (irqchip_in_kernel(vcpu->kvm)) {
8923                 r = kvm_create_lapic(vcpu);
8924                 if (r < 0)
8925                         goto fail_mmu_destroy;
8926         } else
8927                 static_key_slow_inc(&kvm_no_apic_vcpu);
8928
8929         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
8930                                        GFP_KERNEL);
8931         if (!vcpu->arch.mce_banks) {
8932                 r = -ENOMEM;
8933                 goto fail_free_lapic;
8934         }
8935         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
8936
8937         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
8938                 r = -ENOMEM;
8939                 goto fail_free_mce_banks;
8940         }
8941
8942         fx_init(vcpu);
8943
8944         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
8945
8946         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
8947
8948         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
8949
8950         kvm_async_pf_hash_reset(vcpu);
8951         kvm_pmu_init(vcpu);
8952
8953         vcpu->arch.pending_external_vector = -1;
8954         vcpu->arch.preempted_in_kernel = false;
8955
8956         kvm_hv_vcpu_init(vcpu);
8957
8958         return 0;
8959
8960 fail_free_mce_banks:
8961         kfree(vcpu->arch.mce_banks);
8962 fail_free_lapic:
8963         kvm_free_lapic(vcpu);
8964 fail_mmu_destroy:
8965         kvm_mmu_destroy(vcpu);
8966 fail_free_pio_data:
8967         free_page((unsigned long)vcpu->arch.pio_data);
8968 fail:
8969         return r;
8970 }
8971
8972 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
8973 {
8974         int idx;
8975
8976         kvm_hv_vcpu_uninit(vcpu);
8977         kvm_pmu_destroy(vcpu);
8978         kfree(vcpu->arch.mce_banks);
8979         kvm_free_lapic(vcpu);
8980         idx = srcu_read_lock(&vcpu->kvm->srcu);
8981         kvm_mmu_destroy(vcpu);
8982         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8983         free_page((unsigned long)vcpu->arch.pio_data);
8984         if (!lapic_in_kernel(vcpu))
8985                 static_key_slow_dec(&kvm_no_apic_vcpu);
8986 }
8987
8988 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
8989 {
8990         vcpu->arch.l1tf_flush_l1d = true;
8991         kvm_x86_ops->sched_in(vcpu, cpu);
8992 }
8993
8994 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
8995 {
8996         if (type)
8997                 return -EINVAL;
8998
8999         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
9000         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
9001         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
9002         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
9003         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
9004
9005         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
9006         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
9007         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
9008         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
9009                 &kvm->arch.irq_sources_bitmap);
9010
9011         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
9012         mutex_init(&kvm->arch.apic_map_lock);
9013         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
9014
9015         kvm->arch.kvmclock_offset = -ktime_get_boot_ns();
9016         pvclock_update_vm_gtod_copy(kvm);
9017
9018         kvm->arch.guest_can_read_msr_platform_info = true;
9019
9020         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
9021         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
9022
9023         kvm_hv_init_vm(kvm);
9024         kvm_page_track_init(kvm);
9025         kvm_mmu_init_vm(kvm);
9026
9027         if (kvm_x86_ops->vm_init)
9028                 return kvm_x86_ops->vm_init(kvm);
9029
9030         return 0;
9031 }
9032
9033 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
9034 {
9035         vcpu_load(vcpu);
9036         kvm_mmu_unload(vcpu);
9037         vcpu_put(vcpu);
9038 }
9039
9040 static void kvm_free_vcpus(struct kvm *kvm)
9041 {
9042         unsigned int i;
9043         struct kvm_vcpu *vcpu;
9044
9045         /*
9046          * Unpin any mmu pages first.
9047          */
9048         kvm_for_each_vcpu(i, vcpu, kvm) {
9049                 kvm_clear_async_pf_completion_queue(vcpu);
9050                 kvm_unload_vcpu_mmu(vcpu);
9051         }
9052         kvm_for_each_vcpu(i, vcpu, kvm)
9053                 kvm_arch_vcpu_free(vcpu);
9054
9055         mutex_lock(&kvm->lock);
9056         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
9057                 kvm->vcpus[i] = NULL;
9058
9059         atomic_set(&kvm->online_vcpus, 0);
9060         mutex_unlock(&kvm->lock);
9061 }
9062
9063 void kvm_arch_sync_events(struct kvm *kvm)
9064 {
9065         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
9066         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
9067         kvm_free_pit(kvm);
9068 }
9069
9070 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
9071 {
9072         int i, r;
9073         unsigned long hva;
9074         struct kvm_memslots *slots = kvm_memslots(kvm);
9075         struct kvm_memory_slot *slot, old;
9076
9077         /* Called with kvm->slots_lock held.  */
9078         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
9079                 return -EINVAL;
9080
9081         slot = id_to_memslot(slots, id);
9082         if (size) {
9083                 if (slot->npages)
9084                         return -EEXIST;
9085
9086                 /*
9087                  * MAP_SHARED to prevent internal slot pages from being moved
9088                  * by fork()/COW.
9089                  */
9090                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
9091                               MAP_SHARED | MAP_ANONYMOUS, 0);
9092                 if (IS_ERR((void *)hva))
9093                         return PTR_ERR((void *)hva);
9094         } else {
9095                 if (!slot->npages)
9096                         return 0;
9097
9098                 hva = 0;
9099         }
9100
9101         old = *slot;
9102         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
9103                 struct kvm_userspace_memory_region m;
9104
9105                 m.slot = id | (i << 16);
9106                 m.flags = 0;
9107                 m.guest_phys_addr = gpa;
9108                 m.userspace_addr = hva;
9109                 m.memory_size = size;
9110                 r = __kvm_set_memory_region(kvm, &m);
9111                 if (r < 0)
9112                         return r;
9113         }
9114
9115         if (!size)
9116                 vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
9117
9118         return 0;
9119 }
9120 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
9121
9122 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
9123 {
9124         int r;
9125
9126         mutex_lock(&kvm->slots_lock);
9127         r = __x86_set_memory_region(kvm, id, gpa, size);
9128         mutex_unlock(&kvm->slots_lock);
9129
9130         return r;
9131 }
9132 EXPORT_SYMBOL_GPL(x86_set_memory_region);
9133
9134 void kvm_arch_destroy_vm(struct kvm *kvm)
9135 {
9136         if (current->mm == kvm->mm) {
9137                 /*
9138                  * Free memory regions allocated on behalf of userspace,
9139                  * unless the the memory map has changed due to process exit
9140                  * or fd copying.
9141                  */
9142                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
9143                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
9144                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
9145         }
9146         if (kvm_x86_ops->vm_destroy)
9147                 kvm_x86_ops->vm_destroy(kvm);
9148         kvm_pic_destroy(kvm);
9149         kvm_ioapic_destroy(kvm);
9150         kvm_free_vcpus(kvm);
9151         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
9152         kvm_mmu_uninit_vm(kvm);
9153         kvm_page_track_cleanup(kvm);
9154         kvm_hv_destroy_vm(kvm);
9155 }
9156
9157 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
9158                            struct kvm_memory_slot *dont)
9159 {
9160         int i;
9161
9162         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9163                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
9164                         kvfree(free->arch.rmap[i]);
9165                         free->arch.rmap[i] = NULL;
9166                 }
9167                 if (i == 0)
9168                         continue;
9169
9170                 if (!dont || free->arch.lpage_info[i - 1] !=
9171                              dont->arch.lpage_info[i - 1]) {
9172                         kvfree(free->arch.lpage_info[i - 1]);
9173                         free->arch.lpage_info[i - 1] = NULL;
9174                 }
9175         }
9176
9177         kvm_page_track_free_memslot(free, dont);
9178 }
9179
9180 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
9181                             unsigned long npages)
9182 {
9183         int i;
9184
9185         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9186                 struct kvm_lpage_info *linfo;
9187                 unsigned long ugfn;
9188                 int lpages;
9189                 int level = i + 1;
9190
9191                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
9192                                       slot->base_gfn, level) + 1;
9193
9194                 slot->arch.rmap[i] =
9195                         kvcalloc(lpages, sizeof(*slot->arch.rmap[i]),
9196                                  GFP_KERNEL);
9197                 if (!slot->arch.rmap[i])
9198                         goto out_free;
9199                 if (i == 0)
9200                         continue;
9201
9202                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL);
9203                 if (!linfo)
9204                         goto out_free;
9205
9206                 slot->arch.lpage_info[i - 1] = linfo;
9207
9208                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
9209                         linfo[0].disallow_lpage = 1;
9210                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
9211                         linfo[lpages - 1].disallow_lpage = 1;
9212                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
9213                 /*
9214                  * If the gfn and userspace address are not aligned wrt each
9215                  * other, or if explicitly asked to, disable large page
9216                  * support for this slot
9217                  */
9218                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
9219                     !kvm_largepages_enabled()) {
9220                         unsigned long j;
9221
9222                         for (j = 0; j < lpages; ++j)
9223                                 linfo[j].disallow_lpage = 1;
9224                 }
9225         }
9226
9227         if (kvm_page_track_create_memslot(slot, npages))
9228                 goto out_free;
9229
9230         return 0;
9231
9232 out_free:
9233         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9234                 kvfree(slot->arch.rmap[i]);
9235                 slot->arch.rmap[i] = NULL;
9236                 if (i == 0)
9237                         continue;
9238
9239                 kvfree(slot->arch.lpage_info[i - 1]);
9240                 slot->arch.lpage_info[i - 1] = NULL;
9241         }
9242         return -ENOMEM;
9243 }
9244
9245 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
9246 {
9247         /*
9248          * memslots->generation has been incremented.
9249          * mmio generation may have reached its maximum value.
9250          */
9251         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
9252 }
9253
9254 int kvm_arch_prepare_memory_region(struct kvm *kvm,
9255                                 struct kvm_memory_slot *memslot,
9256                                 const struct kvm_userspace_memory_region *mem,
9257                                 enum kvm_mr_change change)
9258 {
9259         return 0;
9260 }
9261
9262 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
9263                                      struct kvm_memory_slot *new)
9264 {
9265         /* Still write protect RO slot */
9266         if (new->flags & KVM_MEM_READONLY) {
9267                 kvm_mmu_slot_remove_write_access(kvm, new);
9268                 return;
9269         }
9270
9271         /*
9272          * Call kvm_x86_ops dirty logging hooks when they are valid.
9273          *
9274          * kvm_x86_ops->slot_disable_log_dirty is called when:
9275          *
9276          *  - KVM_MR_CREATE with dirty logging is disabled
9277          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
9278          *
9279          * The reason is, in case of PML, we need to set D-bit for any slots
9280          * with dirty logging disabled in order to eliminate unnecessary GPA
9281          * logging in PML buffer (and potential PML buffer full VMEXT). This
9282          * guarantees leaving PML enabled during guest's lifetime won't have
9283          * any additonal overhead from PML when guest is running with dirty
9284          * logging disabled for memory slots.
9285          *
9286          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
9287          * to dirty logging mode.
9288          *
9289          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
9290          *
9291          * In case of write protect:
9292          *
9293          * Write protect all pages for dirty logging.
9294          *
9295          * All the sptes including the large sptes which point to this
9296          * slot are set to readonly. We can not create any new large
9297          * spte on this slot until the end of the logging.
9298          *
9299          * See the comments in fast_page_fault().
9300          */
9301         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
9302                 if (kvm_x86_ops->slot_enable_log_dirty)
9303                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
9304                 else
9305                         kvm_mmu_slot_remove_write_access(kvm, new);
9306         } else {
9307                 if (kvm_x86_ops->slot_disable_log_dirty)
9308                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
9309         }
9310 }
9311
9312 void kvm_arch_commit_memory_region(struct kvm *kvm,
9313                                 const struct kvm_userspace_memory_region *mem,
9314                                 const struct kvm_memory_slot *old,
9315                                 const struct kvm_memory_slot *new,
9316                                 enum kvm_mr_change change)
9317 {
9318         int nr_mmu_pages = 0;
9319
9320         if (!kvm->arch.n_requested_mmu_pages)
9321                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
9322
9323         if (nr_mmu_pages)
9324                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
9325
9326         /*
9327          * Dirty logging tracks sptes in 4k granularity, meaning that large
9328          * sptes have to be split.  If live migration is successful, the guest
9329          * in the source machine will be destroyed and large sptes will be
9330          * created in the destination. However, if the guest continues to run
9331          * in the source machine (for example if live migration fails), small
9332          * sptes will remain around and cause bad performance.
9333          *
9334          * Scan sptes if dirty logging has been stopped, dropping those
9335          * which can be collapsed into a single large-page spte.  Later
9336          * page faults will create the large-page sptes.
9337          */
9338         if ((change != KVM_MR_DELETE) &&
9339                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
9340                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
9341                 kvm_mmu_zap_collapsible_sptes(kvm, new);
9342
9343         /*
9344          * Set up write protection and/or dirty logging for the new slot.
9345          *
9346          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
9347          * been zapped so no dirty logging staff is needed for old slot. For
9348          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
9349          * new and it's also covered when dealing with the new slot.
9350          *
9351          * FIXME: const-ify all uses of struct kvm_memory_slot.
9352          */
9353         if (change != KVM_MR_DELETE)
9354                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
9355 }
9356
9357 void kvm_arch_flush_shadow_all(struct kvm *kvm)
9358 {
9359         kvm_mmu_invalidate_zap_all_pages(kvm);
9360 }
9361
9362 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
9363                                    struct kvm_memory_slot *slot)
9364 {
9365         kvm_page_track_flush_slot(kvm, slot);
9366 }
9367
9368 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
9369 {
9370         return (is_guest_mode(vcpu) &&
9371                         kvm_x86_ops->guest_apic_has_interrupt &&
9372                         kvm_x86_ops->guest_apic_has_interrupt(vcpu));
9373 }
9374
9375 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
9376 {
9377         if (!list_empty_careful(&vcpu->async_pf.done))
9378                 return true;
9379
9380         if (kvm_apic_has_events(vcpu))
9381                 return true;
9382
9383         if (vcpu->arch.pv.pv_unhalted)
9384                 return true;
9385
9386         if (vcpu->arch.exception.pending)
9387                 return true;
9388
9389         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
9390             (vcpu->arch.nmi_pending &&
9391              kvm_x86_ops->nmi_allowed(vcpu)))
9392                 return true;
9393
9394         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
9395             (vcpu->arch.smi_pending && !is_smm(vcpu)))
9396                 return true;
9397
9398         if (kvm_arch_interrupt_allowed(vcpu) &&
9399             (kvm_cpu_has_interrupt(vcpu) ||
9400             kvm_guest_apic_has_interrupt(vcpu)))
9401                 return true;
9402
9403         if (kvm_hv_has_stimer_pending(vcpu))
9404                 return true;
9405
9406         return false;
9407 }
9408
9409 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
9410 {
9411         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
9412 }
9413
9414 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
9415 {
9416         return vcpu->arch.preempted_in_kernel;
9417 }
9418
9419 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
9420 {
9421         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
9422 }
9423
9424 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
9425 {
9426         return kvm_x86_ops->interrupt_allowed(vcpu);
9427 }
9428
9429 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
9430 {
9431         if (is_64_bit_mode(vcpu))
9432                 return kvm_rip_read(vcpu);
9433         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
9434                      kvm_rip_read(vcpu));
9435 }
9436 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
9437
9438 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
9439 {
9440         return kvm_get_linear_rip(vcpu) == linear_rip;
9441 }
9442 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
9443
9444 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
9445 {
9446         unsigned long rflags;
9447
9448         rflags = kvm_x86_ops->get_rflags(vcpu);
9449         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
9450                 rflags &= ~X86_EFLAGS_TF;
9451         return rflags;
9452 }
9453 EXPORT_SYMBOL_GPL(kvm_get_rflags);
9454
9455 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9456 {
9457         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
9458             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
9459                 rflags |= X86_EFLAGS_TF;
9460         kvm_x86_ops->set_rflags(vcpu, rflags);
9461 }
9462
9463 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9464 {
9465         __kvm_set_rflags(vcpu, rflags);
9466         kvm_make_request(KVM_REQ_EVENT, vcpu);
9467 }
9468 EXPORT_SYMBOL_GPL(kvm_set_rflags);
9469
9470 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
9471 {
9472         int r;
9473
9474         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
9475               work->wakeup_all)
9476                 return;
9477
9478         r = kvm_mmu_reload(vcpu);
9479         if (unlikely(r))
9480                 return;
9481
9482         if (!vcpu->arch.mmu->direct_map &&
9483               work->arch.cr3 != vcpu->arch.mmu->get_cr3(vcpu))
9484                 return;
9485
9486         vcpu->arch.mmu->page_fault(vcpu, work->gva, 0, true);
9487 }
9488
9489 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
9490 {
9491         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
9492 }
9493
9494 static inline u32 kvm_async_pf_next_probe(u32 key)
9495 {
9496         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
9497 }
9498
9499 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9500 {
9501         u32 key = kvm_async_pf_hash_fn(gfn);
9502
9503         while (vcpu->arch.apf.gfns[key] != ~0)
9504                 key = kvm_async_pf_next_probe(key);
9505
9506         vcpu->arch.apf.gfns[key] = gfn;
9507 }
9508
9509 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
9510 {
9511         int i;
9512         u32 key = kvm_async_pf_hash_fn(gfn);
9513
9514         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
9515                      (vcpu->arch.apf.gfns[key] != gfn &&
9516                       vcpu->arch.apf.gfns[key] != ~0); i++)
9517                 key = kvm_async_pf_next_probe(key);
9518
9519         return key;
9520 }
9521
9522 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9523 {
9524         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
9525 }
9526
9527 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9528 {
9529         u32 i, j, k;
9530
9531         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
9532         while (true) {
9533                 vcpu->arch.apf.gfns[i] = ~0;
9534                 do {
9535                         j = kvm_async_pf_next_probe(j);
9536                         if (vcpu->arch.apf.gfns[j] == ~0)
9537                                 return;
9538                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
9539                         /*
9540                          * k lies cyclically in ]i,j]
9541                          * |    i.k.j |
9542                          * |....j i.k.| or  |.k..j i...|
9543                          */
9544                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
9545                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
9546                 i = j;
9547         }
9548 }
9549
9550 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
9551 {
9552
9553         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
9554                                       sizeof(val));
9555 }
9556
9557 static int apf_get_user(struct kvm_vcpu *vcpu, u32 *val)
9558 {
9559
9560         return kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, val,
9561                                       sizeof(u32));
9562 }
9563
9564 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
9565                                      struct kvm_async_pf *work)
9566 {
9567         struct x86_exception fault;
9568
9569         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
9570         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
9571
9572         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
9573             (vcpu->arch.apf.send_user_only &&
9574              kvm_x86_ops->get_cpl(vcpu) == 0))
9575                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
9576         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
9577                 fault.vector = PF_VECTOR;
9578                 fault.error_code_valid = true;
9579                 fault.error_code = 0;
9580                 fault.nested_page_fault = false;
9581                 fault.address = work->arch.token;
9582                 fault.async_page_fault = true;
9583                 kvm_inject_page_fault(vcpu, &fault);
9584         }
9585 }
9586
9587 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
9588                                  struct kvm_async_pf *work)
9589 {
9590         struct x86_exception fault;
9591         u32 val;
9592
9593         if (work->wakeup_all)
9594                 work->arch.token = ~0; /* broadcast wakeup */
9595         else
9596                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
9597         trace_kvm_async_pf_ready(work->arch.token, work->gva);
9598
9599         if (vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED &&
9600             !apf_get_user(vcpu, &val)) {
9601                 if (val == KVM_PV_REASON_PAGE_NOT_PRESENT &&
9602                     vcpu->arch.exception.pending &&
9603                     vcpu->arch.exception.nr == PF_VECTOR &&
9604                     !apf_put_user(vcpu, 0)) {
9605                         vcpu->arch.exception.injected = false;
9606                         vcpu->arch.exception.pending = false;
9607                         vcpu->arch.exception.nr = 0;
9608                         vcpu->arch.exception.has_error_code = false;
9609                         vcpu->arch.exception.error_code = 0;
9610                         vcpu->arch.exception.has_payload = false;
9611                         vcpu->arch.exception.payload = 0;
9612                 } else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
9613                         fault.vector = PF_VECTOR;
9614                         fault.error_code_valid = true;
9615                         fault.error_code = 0;
9616                         fault.nested_page_fault = false;
9617                         fault.address = work->arch.token;
9618                         fault.async_page_fault = true;
9619                         kvm_inject_page_fault(vcpu, &fault);
9620                 }
9621         }
9622         vcpu->arch.apf.halted = false;
9623         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9624 }
9625
9626 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
9627 {
9628         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
9629                 return true;
9630         else
9631                 return kvm_can_do_async_pf(vcpu);
9632 }
9633
9634 void kvm_arch_start_assignment(struct kvm *kvm)
9635 {
9636         atomic_inc(&kvm->arch.assigned_device_count);
9637 }
9638 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
9639
9640 void kvm_arch_end_assignment(struct kvm *kvm)
9641 {
9642         atomic_dec(&kvm->arch.assigned_device_count);
9643 }
9644 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
9645
9646 bool kvm_arch_has_assigned_device(struct kvm *kvm)
9647 {
9648         return atomic_read(&kvm->arch.assigned_device_count);
9649 }
9650 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
9651
9652 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
9653 {
9654         atomic_inc(&kvm->arch.noncoherent_dma_count);
9655 }
9656 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
9657
9658 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
9659 {
9660         atomic_dec(&kvm->arch.noncoherent_dma_count);
9661 }
9662 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
9663
9664 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
9665 {
9666         return atomic_read(&kvm->arch.noncoherent_dma_count);
9667 }
9668 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
9669
9670 bool kvm_arch_has_irq_bypass(void)
9671 {
9672         return kvm_x86_ops->update_pi_irte != NULL;
9673 }
9674
9675 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
9676                                       struct irq_bypass_producer *prod)
9677 {
9678         struct kvm_kernel_irqfd *irqfd =
9679                 container_of(cons, struct kvm_kernel_irqfd, consumer);
9680
9681         irqfd->producer = prod;
9682
9683         return kvm_x86_ops->update_pi_irte(irqfd->kvm,
9684                                            prod->irq, irqfd->gsi, 1);
9685 }
9686
9687 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
9688                                       struct irq_bypass_producer *prod)
9689 {
9690         int ret;
9691         struct kvm_kernel_irqfd *irqfd =
9692                 container_of(cons, struct kvm_kernel_irqfd, consumer);
9693
9694         WARN_ON(irqfd->producer != prod);
9695         irqfd->producer = NULL;
9696
9697         /*
9698          * When producer of consumer is unregistered, we change back to
9699          * remapped mode, so we can re-use the current implementation
9700          * when the irq is masked/disabled or the consumer side (KVM
9701          * int this case doesn't want to receive the interrupts.
9702         */
9703         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
9704         if (ret)
9705                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
9706                        " fails: %d\n", irqfd->consumer.token, ret);
9707 }
9708
9709 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
9710                                    uint32_t guest_irq, bool set)
9711 {
9712         if (!kvm_x86_ops->update_pi_irte)
9713                 return -EINVAL;
9714
9715         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
9716 }
9717
9718 bool kvm_vector_hashing_enabled(void)
9719 {
9720         return vector_hashing;
9721 }
9722 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
9723
9724 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
9725 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
9726 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
9727 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
9728 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
9729 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
9730 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
9731 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
9732 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
9733 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
9734 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
9735 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
9736 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
9737 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
9738 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
9739 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
9740 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
9741 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
9742 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);