arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "assigned-dev.h"
  31 #include "pmu.h"
  32 #include "hyperv.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/export.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/mman.h>
  42 #include <linux/highmem.h>
  43 #include <linux/iommu.h>
  44 #include <linux/intel-iommu.h>
  45 #include <linux/cpufreq.h>
  46 #include <linux/user-return-notifier.h>
  47 #include <linux/srcu.h>
  48 #include <linux/slab.h>
  49 #include <linux/perf_event.h>
  50 #include <linux/uaccess.h>
  51 #include <linux/hash.h>
  52 #include <linux/pci.h>
  53 #include <linux/timekeeper_internal.h>
  54 #include <linux/pvclock_gtod.h>
  55 #include <linux/kvm_irqfd.h>
  56 #include <linux/irqbypass.h>
  57 #include <linux/sched/stat.h>
  58
  59 #include <trace/events/kvm.h>
  60
  61 #include <asm/debugreg.h>
  62 #include <asm/msr.h>
  63 #include <asm/desc.h>
  64 #include <asm/mce.h>
  65 #include <linux/kernel_stat.h>
  66 #include <asm/fpu/internal.h> /* Ugh! */
  67 #include <asm/pvclock.h>
  68 #include <asm/div64.h>
  69 #include <asm/irq_remapping.h>
  70
  71 #define CREATE_TRACE_POINTS
  72 #include "trace.h"
  73
  74 #define MAX_IO_MSRS 256
  75 #define KVM_MAX_MCE_BANKS 32
  76 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  77 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  78
  79 #define emul_to_vcpu(ctxt) \
  80         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  81
  82 /* EFER defaults:
  83  * - enable syscall per default because its emulated by KVM
  84  * - enable LME and LMA per default on 64 bit KVM
  85  */
  86 #ifdef CONFIG_X86_64
  87 static
  88 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  89 #else
  90 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  91 #endif
  92
  93 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  94 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  95
  96 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
  97                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
  98
  99 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 100 static void process_nmi(struct kvm_vcpu *vcpu);
 101 static void enter_smm(struct kvm_vcpu *vcpu);
 102 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 103
 104 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
 105 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 106
 107 static bool __read_mostly ignore_msrs = 0;
 108 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 109
 110 unsigned int min_timer_period_us = 500;
 111 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 112
 113 static bool __read_mostly kvmclock_periodic_sync = true;
 114 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 115
 116 bool __read_mostly kvm_has_tsc_control;
 117 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 118 u32  __read_mostly kvm_max_guest_tsc_khz;
 119 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 120 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 121 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 122 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 123 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 124 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 125 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 126
 127 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 128 static u32 __read_mostly tsc_tolerance_ppm = 250;
 129 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 130
 131 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 132 unsigned int __read_mostly lapic_timer_advance_ns = 0;
 133 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 134
 135 static bool __read_mostly vector_hashing = true;
 136 module_param(vector_hashing, bool, S_IRUGO);
 137
 138 static bool __read_mostly backwards_tsc_observed = false;
 139
 140 #define KVM_NR_SHARED_MSRS 16
 141
 142 struct kvm_shared_msrs_global {
 143         int nr;
 144         u32 msrs[KVM_NR_SHARED_MSRS];
 145 };
 146
 147 struct kvm_shared_msrs {
 148         struct user_return_notifier urn;
 149         bool registered;
 150         struct kvm_shared_msr_values {
 151                 u64 host;
 152                 u64 curr;
 153         } values[KVM_NR_SHARED_MSRS];
 154 };
 155
 156 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 157 static struct kvm_shared_msrs __percpu *shared_msrs;
 158
 159 struct kvm_stats_debugfs_item debugfs_entries[] = {
 160         { "pf_fixed", VCPU_STAT(pf_fixed) },
 161         { "pf_guest", VCPU_STAT(pf_guest) },
 162         { "tlb_flush", VCPU_STAT(tlb_flush) },
 163         { "invlpg", VCPU_STAT(invlpg) },
 164         { "exits", VCPU_STAT(exits) },
 165         { "io_exits", VCPU_STAT(io_exits) },
 166         { "mmio_exits", VCPU_STAT(mmio_exits) },
 167         { "signal_exits", VCPU_STAT(signal_exits) },
 168         { "irq_window", VCPU_STAT(irq_window_exits) },
 169         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 170         { "halt_exits", VCPU_STAT(halt_exits) },
 171         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 172         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 173         { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
 174         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 175         { "hypercalls", VCPU_STAT(hypercalls) },
 176         { "request_irq", VCPU_STAT(request_irq_exits) },
 177         { "irq_exits", VCPU_STAT(irq_exits) },
 178         { "host_state_reload", VCPU_STAT(host_state_reload) },
 179         { "efer_reload", VCPU_STAT(efer_reload) },
 180         { "fpu_reload", VCPU_STAT(fpu_reload) },
 181         { "insn_emulation", VCPU_STAT(insn_emulation) },
 182         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 183         { "irq_injections", VCPU_STAT(irq_injections) },
 184         { "nmi_injections", VCPU_STAT(nmi_injections) },
 185         { "req_event", VCPU_STAT(req_event) },
 186         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 187         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 188         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 189         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 190         { "mmu_flooded", VM_STAT(mmu_flooded) },
 191         { "mmu_recycled", VM_STAT(mmu_recycled) },
 192         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 193         { "mmu_unsync", VM_STAT(mmu_unsync) },
 194         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 195         { "largepages", VM_STAT(lpages) },
 196         { "max_mmu_page_hash_collisions",
 197                 VM_STAT(max_mmu_page_hash_collisions) },
 198         { NULL }
 199 };
 200
 201 u64 __read_mostly host_xcr0;
 202
 203 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 204
 205 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 206 {
 207         int i;
 208         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 209                 vcpu->arch.apf.gfns[i] = ~0;
 210 }
 211
 212 static void kvm_on_user_return(struct user_return_notifier *urn)
 213 {
 214         unsigned slot;
 215         struct kvm_shared_msrs *locals
 216                 = container_of(urn, struct kvm_shared_msrs, urn);
 217         struct kvm_shared_msr_values *values;
 218         unsigned long flags;
 219
 220         /*
 221          * Disabling irqs at this point since the following code could be
 222          * interrupted and executed through kvm_arch_hardware_disable()
 223          */
 224         local_irq_save(flags);
 225         if (locals->registered) {
 226                 locals->registered = false;
 227                 user_return_notifier_unregister(urn);
 228         }
 229         local_irq_restore(flags);
 230         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 231                 values = &locals->values[slot];
 232                 if (values->host != values->curr) {
 233                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 234                         values->curr = values->host;
 235                 }
 236         }
 237 }
 238
 239 static void shared_msr_update(unsigned slot, u32 msr)
 240 {
 241         u64 value;
 242         unsigned int cpu = smp_processor_id();
 243         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 244
 245         /* only read, and nobody should modify it at this time,
 246          * so don't need lock */
 247         if (slot >= shared_msrs_global.nr) {
 248                 printk(KERN_ERR "kvm: invalid MSR slot!");
 249                 return;
 250         }
 251         rdmsrl_safe(msr, &value);
 252         smsr->values[slot].host = value;
 253         smsr->values[slot].curr = value;
 254 }
 255
 256 void kvm_define_shared_msr(unsigned slot, u32 msr)
 257 {
 258         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 259         shared_msrs_global.msrs[slot] = msr;
 260         if (slot >= shared_msrs_global.nr)
 261                 shared_msrs_global.nr = slot + 1;
 262 }
 263 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 264
 265 static void kvm_shared_msr_cpu_online(void)
 266 {
 267         unsigned i;
 268
 269         for (i = 0; i < shared_msrs_global.nr; ++i)
 270                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 271 }
 272
 273 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 274 {
 275         unsigned int cpu = smp_processor_id();
 276         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 277         int err;
 278
 279         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 280                 return 0;
 281         smsr->values[slot].curr = value;
 282         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 283         if (err)
 284                 return 1;
 285
 286         if (!smsr->registered) {
 287                 smsr->urn.on_user_return = kvm_on_user_return;
 288                 user_return_notifier_register(&smsr->urn);
 289                 smsr->registered = true;
 290         }
 291         return 0;
 292 }
 293 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 294
 295 static void drop_user_return_notifiers(void)
 296 {
 297         unsigned int cpu = smp_processor_id();
 298         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 299
 300         if (smsr->registered)
 301                 kvm_on_user_return(&smsr->urn);
 302 }
 303
 304 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 305 {
 306         return vcpu->arch.apic_base;
 307 }
 308 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 309
 310 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 311 {
 312         u64 old_state = vcpu->arch.apic_base &
 313                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 314         u64 new_state = msr_info->data &
 315                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 316         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
 317                 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
 318
 319         if (!msr_info->host_initiated &&
 320             ((msr_info->data & reserved_bits) != 0 ||
 321              new_state == X2APIC_ENABLE ||
 322              (new_state == MSR_IA32_APICBASE_ENABLE &&
 323               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 324              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 325               old_state == 0)))
 326                 return 1;
 327
 328         kvm_lapic_set_base(vcpu, msr_info->data);
 329         return 0;
 330 }
 331 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 332
 333 asmlinkage __visible void kvm_spurious_fault(void)
 334 {
 335         /* Fault while not rebooting.  We want the trace. */
 336         BUG();
 337 }
 338 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 339
 340 #define EXCPT_BENIGN            0
 341 #define EXCPT_CONTRIBUTORY      1
 342 #define EXCPT_PF                2
 343
 344 static int exception_class(int vector)
 345 {
 346         switch (vector) {
 347         case PF_VECTOR:
 348                 return EXCPT_PF;
 349         case DE_VECTOR:
 350         case TS_VECTOR:
 351         case NP_VECTOR:
 352         case SS_VECTOR:
 353         case GP_VECTOR:
 354                 return EXCPT_CONTRIBUTORY;
 355         default:
 356                 break;
 357         }
 358         return EXCPT_BENIGN;
 359 }
 360
 361 #define EXCPT_FAULT             0
 362 #define EXCPT_TRAP              1
 363 #define EXCPT_ABORT             2
 364 #define EXCPT_INTERRUPT         3
 365
 366 static int exception_type(int vector)
 367 {
 368         unsigned int mask;
 369
 370         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 371                 return EXCPT_INTERRUPT;
 372
 373         mask = 1 << vector;
 374
 375         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 376         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 377                 return EXCPT_TRAP;
 378
 379         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 380                 return EXCPT_ABORT;
 381
 382         /* Reserved exceptions will result in fault */
 383         return EXCPT_FAULT;
 384 }
 385
 386 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 387                 unsigned nr, bool has_error, u32 error_code,
 388                 bool reinject)
 389 {
 390         u32 prev_nr;
 391         int class1, class2;
 392
 393         kvm_make_request(KVM_REQ_EVENT, vcpu);
 394
 395         if (!vcpu->arch.exception.pending) {
 396         queue:
 397                 if (has_error && !is_protmode(vcpu))
 398                         has_error = false;
 399                 vcpu->arch.exception.pending = true;
 400                 vcpu->arch.exception.has_error_code = has_error;
 401                 vcpu->arch.exception.nr = nr;
 402                 vcpu->arch.exception.error_code = error_code;
 403                 vcpu->arch.exception.reinject = reinject;
 404                 return;
 405         }
 406
 407         /* to check exception */
 408         prev_nr = vcpu->arch.exception.nr;
 409         if (prev_nr == DF_VECTOR) {
 410                 /* triple fault -> shutdown */
 411                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 412                 return;
 413         }
 414         class1 = exception_class(prev_nr);
 415         class2 = exception_class(nr);
 416         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 417                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 418                 /* generate double fault per SDM Table 5-5 */
 419                 vcpu->arch.exception.pending = true;
 420                 vcpu->arch.exception.has_error_code = true;
 421                 vcpu->arch.exception.nr = DF_VECTOR;
 422                 vcpu->arch.exception.error_code = 0;
 423         } else
 424                 /* replace previous exception with a new one in a hope
 425                    that instruction re-execution will regenerate lost
 426                    exception */
 427                 goto queue;
 428 }
 429
 430 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 431 {
 432         kvm_multiple_exception(vcpu, nr, false, 0, false);
 433 }
 434 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 435
 436 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 437 {
 438         kvm_multiple_exception(vcpu, nr, false, 0, true);
 439 }
 440 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 441
 442 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 443 {
 444         if (err)
 445                 kvm_inject_gp(vcpu, 0);
 446         else
 447                 return kvm_skip_emulated_instruction(vcpu);
 448
 449         return 1;
 450 }
 451 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 452
 453 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 454 {
 455         ++vcpu->stat.pf_guest;
 456         vcpu->arch.cr2 = fault->address;
 457         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 458 }
 459 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 460
 461 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 462 {
 463         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 464                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 465         else
 466                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 467
 468         return fault->nested_page_fault;
 469 }
 470
 471 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 472 {
 473         atomic_inc(&vcpu->arch.nmi_queued);
 474         kvm_make_request(KVM_REQ_NMI, vcpu);
 475 }
 476 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 477
 478 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 479 {
 480         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 481 }
 482 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 483
 484 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 485 {
 486         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 487 }
 488 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 489
 490 /*
 491  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 492  * a #GP and return false.
 493  */
 494 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 495 {
 496         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 497                 return true;
 498         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 499         return false;
 500 }
 501 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 502
 503 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 504 {
 505         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 506                 return true;
 507
 508         kvm_queue_exception(vcpu, UD_VECTOR);
 509         return false;
 510 }
 511 EXPORT_SYMBOL_GPL(kvm_require_dr);
 512
 513 /*
 514  * This function will be used to read from the physical memory of the currently
 515  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 516  * can read from guest physical or from the guest's guest physical memory.
 517  */
 518 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 519                             gfn_t ngfn, void *data, int offset, int len,
 520                             u32 access)
 521 {
 522         struct x86_exception exception;
 523         gfn_t real_gfn;
 524         gpa_t ngpa;
 525
 526         ngpa     = gfn_to_gpa(ngfn);
 527         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 528         if (real_gfn == UNMAPPED_GVA)
 529                 return -EFAULT;
 530
 531         real_gfn = gpa_to_gfn(real_gfn);
 532
 533         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 534 }
 535 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 536
 537 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 538                                void *data, int offset, int len, u32 access)
 539 {
 540         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 541                                        data, offset, len, access);
 542 }
 543
 544 /*
 545  * Load the pae pdptrs.  Return true is they are all valid.
 546  */
 547 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 548 {
 549         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 550         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 551         int i;
 552         int ret;
 553         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 554
 555         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 556                                       offset * sizeof(u64), sizeof(pdpte),
 557                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 558         if (ret < 0) {
 559                 ret = 0;
 560                 goto out;
 561         }
 562         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 563                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 564                     (pdpte[i] &
 565                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
 566                         ret = 0;
 567                         goto out;
 568                 }
 569         }
 570         ret = 1;
 571
 572         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 573         __set_bit(VCPU_EXREG_PDPTR,
 574                   (unsigned long *)&vcpu->arch.regs_avail);
 575         __set_bit(VCPU_EXREG_PDPTR,
 576                   (unsigned long *)&vcpu->arch.regs_dirty);
 577 out:
 578
 579         return ret;
 580 }
 581 EXPORT_SYMBOL_GPL(load_pdptrs);
 582
 583 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 584 {
 585         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 586         bool changed = true;
 587         int offset;
 588         gfn_t gfn;
 589         int r;
 590
 591         if (is_long_mode(vcpu) || !is_pae(vcpu))
 592                 return false;
 593
 594         if (!test_bit(VCPU_EXREG_PDPTR,
 595                       (unsigned long *)&vcpu->arch.regs_avail))
 596                 return true;
 597
 598         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 599         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 600         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 601                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 602         if (r < 0)
 603                 goto out;
 604         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 605 out:
 606
 607         return changed;
 608 }
 609 EXPORT_SYMBOL_GPL(pdptrs_changed);
 610
 611 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 612 {
 613         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 614         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 615
 616         cr0 |= X86_CR0_ET;
 617
 618 #ifdef CONFIG_X86_64
 619         if (cr0 & 0xffffffff00000000UL)
 620                 return 1;
 621 #endif
 622
 623         cr0 &= ~CR0_RESERVED_BITS;
 624
 625         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 626                 return 1;
 627
 628         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 629                 return 1;
 630
 631         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 632 #ifdef CONFIG_X86_64
 633                 if ((vcpu->arch.efer & EFER_LME)) {
 634                         int cs_db, cs_l;
 635
 636                         if (!is_pae(vcpu))
 637                                 return 1;
 638                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 639                         if (cs_l)
 640                                 return 1;
 641                 } else
 642 #endif
 643                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 644                                                  kvm_read_cr3(vcpu)))
 645                         return 1;
 646         }
 647
 648         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 649                 return 1;
 650
 651         kvm_x86_ops->set_cr0(vcpu, cr0);
 652
 653         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 654                 kvm_clear_async_pf_completion_queue(vcpu);
 655                 kvm_async_pf_hash_reset(vcpu);
 656         }
 657
 658         if ((cr0 ^ old_cr0) & update_bits)
 659                 kvm_mmu_reset_context(vcpu);
 660
 661         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 662             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 663             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 664                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 665
 666         return 0;
 667 }
 668 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 669
 670 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 671 {
 672         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 673 }
 674 EXPORT_SYMBOL_GPL(kvm_lmsw);
 675
 676 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 677 {
 678         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 679                         !vcpu->guest_xcr0_loaded) {
 680                 /* kvm_set_xcr() also depends on this */
 681                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 682                 vcpu->guest_xcr0_loaded = 1;
 683         }
 684 }
 685
 686 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 687 {
 688         if (vcpu->guest_xcr0_loaded) {
 689                 if (vcpu->arch.xcr0 != host_xcr0)
 690                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 691                 vcpu->guest_xcr0_loaded = 0;
 692         }
 693 }
 694
 695 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 696 {
 697         u64 xcr0 = xcr;
 698         u64 old_xcr0 = vcpu->arch.xcr0;
 699         u64 valid_bits;
 700
 701         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 702         if (index != XCR_XFEATURE_ENABLED_MASK)
 703                 return 1;
 704         if (!(xcr0 & XFEATURE_MASK_FP))
 705                 return 1;
 706         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 707                 return 1;
 708
 709         /*
 710          * Do not allow the guest to set bits that we do not support
 711          * saving.  However, xcr0 bit 0 is always set, even if the
 712          * emulated CPU does not support XSAVE (see fx_init).
 713          */
 714         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 715         if (xcr0 & ~valid_bits)
 716                 return 1;
 717
 718         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 719             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 720                 return 1;
 721
 722         if (xcr0 & XFEATURE_MASK_AVX512) {
 723                 if (!(xcr0 & XFEATURE_MASK_YMM))
 724                         return 1;
 725                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 726                         return 1;
 727         }
 728         vcpu->arch.xcr0 = xcr0;
 729
 730         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 731                 kvm_update_cpuid(vcpu);
 732         return 0;
 733 }
 734
 735 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 736 {
 737         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 738             __kvm_set_xcr(vcpu, index, xcr)) {
 739                 kvm_inject_gp(vcpu, 0);
 740                 return 1;
 741         }
 742         return 0;
 743 }
 744 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 745
 746 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 747 {
 748         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 749         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 750                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 751
 752         if (cr4 & CR4_RESERVED_BITS)
 753                 return 1;
 754
 755         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 756                 return 1;
 757
 758         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 759                 return 1;
 760
 761         if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
 762                 return 1;
 763
 764         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 765                 return 1;
 766
 767         if (!guest_cpuid_has_pku(vcpu) && (cr4 & X86_CR4_PKE))
 768                 return 1;
 769
 770         if (is_long_mode(vcpu)) {
 771                 if (!(cr4 & X86_CR4_PAE))
 772                         return 1;
 773         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 774                    && ((cr4 ^ old_cr4) & pdptr_bits)
 775                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 776                                    kvm_read_cr3(vcpu)))
 777                 return 1;
 778
 779         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 780                 if (!guest_cpuid_has_pcid(vcpu))
 781                         return 1;
 782
 783                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 784                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 785                         return 1;
 786         }
 787
 788         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 789                 return 1;
 790
 791         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 792             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 793                 kvm_mmu_reset_context(vcpu);
 794
 795         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 796                 kvm_update_cpuid(vcpu);
 797
 798         return 0;
 799 }
 800 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 801
 802 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 803 {
 804 #ifdef CONFIG_X86_64
 805         cr3 &= ~CR3_PCID_INVD;
 806 #endif
 807
 808         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 809                 kvm_mmu_sync_roots(vcpu);
 810                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 811                 return 0;
 812         }
 813
 814         if (is_long_mode(vcpu)) {
 815                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 816                         return 1;
 817         } else if (is_pae(vcpu) && is_paging(vcpu) &&
 818                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 819                 return 1;
 820
 821         vcpu->arch.cr3 = cr3;
 822         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 823         kvm_mmu_new_cr3(vcpu);
 824         return 0;
 825 }
 826 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 827
 828 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 829 {
 830         if (cr8 & CR8_RESERVED_BITS)
 831                 return 1;
 832         if (lapic_in_kernel(vcpu))
 833                 kvm_lapic_set_tpr(vcpu, cr8);
 834         else
 835                 vcpu->arch.cr8 = cr8;
 836         return 0;
 837 }
 838 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 839
 840 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 841 {
 842         if (lapic_in_kernel(vcpu))
 843                 return kvm_lapic_get_cr8(vcpu);
 844         else
 845                 return vcpu->arch.cr8;
 846 }
 847 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 848
 849 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 850 {
 851         int i;
 852
 853         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 854                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 855                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 856                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 857         }
 858 }
 859
 860 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 861 {
 862         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 863                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 864 }
 865
 866 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 867 {
 868         unsigned long dr7;
 869
 870         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 871                 dr7 = vcpu->arch.guest_debug_dr7;
 872         else
 873                 dr7 = vcpu->arch.dr7;
 874         kvm_x86_ops->set_dr7(vcpu, dr7);
 875         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 876         if (dr7 & DR7_BP_EN_MASK)
 877                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 878 }
 879
 880 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 881 {
 882         u64 fixed = DR6_FIXED_1;
 883
 884         if (!guest_cpuid_has_rtm(vcpu))
 885                 fixed |= DR6_RTM;
 886         return fixed;
 887 }
 888
 889 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 890 {
 891         switch (dr) {
 892         case 0 ... 3:
 893                 vcpu->arch.db[dr] = val;
 894                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 895                         vcpu->arch.eff_db[dr] = val;
 896                 break;
 897         case 4:
 898                 /* fall through */
 899         case 6:
 900                 if (val & 0xffffffff00000000ULL)
 901                         return -1; /* #GP */
 902                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 903                 kvm_update_dr6(vcpu);
 904                 break;
 905         case 5:
 906                 /* fall through */
 907         default: /* 7 */
 908                 if (val & 0xffffffff00000000ULL)
 909                         return -1; /* #GP */
 910                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 911                 kvm_update_dr7(vcpu);
 912                 break;
 913         }
 914
 915         return 0;
 916 }
 917
 918 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 919 {
 920         if (__kvm_set_dr(vcpu, dr, val)) {
 921                 kvm_inject_gp(vcpu, 0);
 922                 return 1;
 923         }
 924         return 0;
 925 }
 926 EXPORT_SYMBOL_GPL(kvm_set_dr);
 927
 928 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 929 {
 930         switch (dr) {
 931         case 0 ... 3:
 932                 *val = vcpu->arch.db[dr];
 933                 break;
 934         case 4:
 935                 /* fall through */
 936         case 6:
 937                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 938                         *val = vcpu->arch.dr6;
 939                 else
 940                         *val = kvm_x86_ops->get_dr6(vcpu);
 941                 break;
 942         case 5:
 943                 /* fall through */
 944         default: /* 7 */
 945                 *val = vcpu->arch.dr7;
 946                 break;
 947         }
 948         return 0;
 949 }
 950 EXPORT_SYMBOL_GPL(kvm_get_dr);
 951
 952 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 953 {
 954         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 955         u64 data;
 956         int err;
 957
 958         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
 959         if (err)
 960                 return err;
 961         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 962         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 963         return err;
 964 }
 965 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 966
 967 /*
 968  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 969  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 970  *
 971  * This list is modified at module load time to reflect the
 972  * capabilities of the host cpu. This capabilities test skips MSRs that are
 973  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
 974  * may depend on host virtualization features rather than host cpu features.
 975  */
 976
 977 static u32 msrs_to_save[] = {
 978         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 979         MSR_STAR,
 980 #ifdef CONFIG_X86_64
 981         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 982 #endif
 983         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 984         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
 985 };
 986
 987 static unsigned num_msrs_to_save;
 988
 989 static u32 emulated_msrs[] = {
 990         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 991         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 992         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 993         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
 994         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
 995         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
 996         HV_X64_MSR_RESET,
 997         HV_X64_MSR_VP_INDEX,
 998         HV_X64_MSR_VP_RUNTIME,
 999         HV_X64_MSR_SCONTROL,
1000         HV_X64_MSR_STIMER0_CONFIG,
1001         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1002         MSR_KVM_PV_EOI_EN,
1003
1004         MSR_IA32_TSC_ADJUST,
1005         MSR_IA32_TSCDEADLINE,
1006         MSR_IA32_MISC_ENABLE,
1007         MSR_IA32_MCG_STATUS,
1008         MSR_IA32_MCG_CTL,
1009         MSR_IA32_MCG_EXT_CTL,
1010         MSR_IA32_SMBASE,
1011 };
1012
1013 static unsigned num_emulated_msrs;
1014
1015 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1016 {
1017         if (efer & efer_reserved_bits)
1018                 return false;
1019
1020         if (efer & EFER_FFXSR) {
1021                 struct kvm_cpuid_entry2 *feat;
1022
1023                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
1024                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
1025                         return false;
1026         }
1027
1028         if (efer & EFER_SVME) {
1029                 struct kvm_cpuid_entry2 *feat;
1030
1031                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
1032                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
1033                         return false;
1034         }
1035
1036         return true;
1037 }
1038 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1039
1040 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1041 {
1042         u64 old_efer = vcpu->arch.efer;
1043
1044         if (!kvm_valid_efer(vcpu, efer))
1045                 return 1;
1046
1047         if (is_paging(vcpu)
1048             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1049                 return 1;
1050
1051         efer &= ~EFER_LMA;
1052         efer |= vcpu->arch.efer & EFER_LMA;
1053
1054         kvm_x86_ops->set_efer(vcpu, efer);
1055
1056         /* Update reserved bits */
1057         if ((efer ^ old_efer) & EFER_NX)
1058                 kvm_mmu_reset_context(vcpu);
1059
1060         return 0;
1061 }
1062
1063 void kvm_enable_efer_bits(u64 mask)
1064 {
1065        efer_reserved_bits &= ~mask;
1066 }
1067 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1068
1069 /*
1070  * Writes msr value into into the appropriate "register".
1071  * Returns 0 on success, non-0 otherwise.
1072  * Assumes vcpu_load() was already called.
1073  */
1074 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1075 {
1076         switch (msr->index) {
1077         case MSR_FS_BASE:
1078         case MSR_GS_BASE:
1079         case MSR_KERNEL_GS_BASE:
1080         case MSR_CSTAR:
1081         case MSR_LSTAR:
1082                 if (is_noncanonical_address(msr->data))
1083                         return 1;
1084                 break;
1085         case MSR_IA32_SYSENTER_EIP:
1086         case MSR_IA32_SYSENTER_ESP:
1087                 /*
1088                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1089                  * non-canonical address is written on Intel but not on
1090                  * AMD (which ignores the top 32-bits, because it does
1091                  * not implement 64-bit SYSENTER).
1092                  *
1093                  * 64-bit code should hence be able to write a non-canonical
1094                  * value on AMD.  Making the address canonical ensures that
1095                  * vmentry does not fail on Intel after writing a non-canonical
1096                  * value, and that something deterministic happens if the guest
1097                  * invokes 64-bit SYSENTER.
1098                  */
1099                 msr->data = get_canonical(msr->data);
1100         }
1101         return kvm_x86_ops->set_msr(vcpu, msr);
1102 }
1103 EXPORT_SYMBOL_GPL(kvm_set_msr);
1104
1105 /*
1106  * Adapt set_msr() to msr_io()'s calling convention
1107  */
1108 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1109 {
1110         struct msr_data msr;
1111         int r;
1112
1113         msr.index = index;
1114         msr.host_initiated = true;
1115         r = kvm_get_msr(vcpu, &msr);
1116         if (r)
1117                 return r;
1118
1119         *data = msr.data;
1120         return 0;
1121 }
1122
1123 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1124 {
1125         struct msr_data msr;
1126
1127         msr.data = *data;
1128         msr.index = index;
1129         msr.host_initiated = true;
1130         return kvm_set_msr(vcpu, &msr);
1131 }
1132
1133 #ifdef CONFIG_X86_64
1134 struct pvclock_gtod_data {
1135         seqcount_t      seq;
1136
1137         struct { /* extract of a clocksource struct */
1138                 int vclock_mode;
1139                 u64     cycle_last;
1140                 u64     mask;
1141                 u32     mult;
1142                 u32     shift;
1143         } clock;
1144
1145         u64             boot_ns;
1146         u64             nsec_base;
1147         u64             wall_time_sec;
1148 };
1149
1150 static struct pvclock_gtod_data pvclock_gtod_data;
1151
1152 static void update_pvclock_gtod(struct timekeeper *tk)
1153 {
1154         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1155         u64 boot_ns;
1156
1157         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1158
1159         write_seqcount_begin(&vdata->seq);
1160
1161         /* copy pvclock gtod data */
1162         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1163         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1164         vdata->clock.mask               = tk->tkr_mono.mask;
1165         vdata->clock.mult               = tk->tkr_mono.mult;
1166         vdata->clock.shift              = tk->tkr_mono.shift;
1167
1168         vdata->boot_ns                  = boot_ns;
1169         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1170
1171         vdata->wall_time_sec            = tk->xtime_sec;
1172
1173         write_seqcount_end(&vdata->seq);
1174 }
1175 #endif
1176
1177 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1178 {
1179         /*
1180          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1181          * vcpu_enter_guest.  This function is only called from
1182          * the physical CPU that is running vcpu.
1183          */
1184         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1185 }
1186
1187 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1188 {
1189         int version;
1190         int r;
1191         struct pvclock_wall_clock wc;
1192         struct timespec64 boot;
1193
1194         if (!wall_clock)
1195                 return;
1196
1197         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1198         if (r)
1199                 return;
1200
1201         if (version & 1)
1202                 ++version;  /* first time write, random junk */
1203
1204         ++version;
1205
1206         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1207                 return;
1208
1209         /*
1210          * The guest calculates current wall clock time by adding
1211          * system time (updated by kvm_guest_time_update below) to the
1212          * wall clock specified here.  guest system time equals host
1213          * system time for us, thus we must fill in host boot time here.
1214          */
1215         getboottime64(&boot);
1216
1217         if (kvm->arch.kvmclock_offset) {
1218                 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1219                 boot = timespec64_sub(boot, ts);
1220         }
1221         wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1222         wc.nsec = boot.tv_nsec;
1223         wc.version = version;
1224
1225         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1226
1227         version++;
1228         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1229 }
1230
1231 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1232 {
1233         do_shl32_div32(dividend, divisor);
1234         return dividend;
1235 }
1236
1237 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1238                                s8 *pshift, u32 *pmultiplier)
1239 {
1240         uint64_t scaled64;
1241         int32_t  shift = 0;
1242         uint64_t tps64;
1243         uint32_t tps32;
1244
1245         tps64 = base_hz;
1246         scaled64 = scaled_hz;
1247         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1248                 tps64 >>= 1;
1249                 shift--;
1250         }
1251
1252         tps32 = (uint32_t)tps64;
1253         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1254                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1255                         scaled64 >>= 1;
1256                 else
1257                         tps32 <<= 1;
1258                 shift++;
1259         }
1260
1261         *pshift = shift;
1262         *pmultiplier = div_frac(scaled64, tps32);
1263
1264         pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1265                  __func__, base_hz, scaled_hz, shift, *pmultiplier);
1266 }
1267
1268 #ifdef CONFIG_X86_64
1269 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1270 #endif
1271
1272 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1273 static unsigned long max_tsc_khz;
1274
1275 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1276 {
1277         u64 v = (u64)khz * (1000000 + ppm);
1278         do_div(v, 1000000);
1279         return v;
1280 }
1281
1282 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1283 {
1284         u64 ratio;
1285
1286         /* Guest TSC same frequency as host TSC? */
1287         if (!scale) {
1288                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1289                 return 0;
1290         }
1291
1292         /* TSC scaling supported? */
1293         if (!kvm_has_tsc_control) {
1294                 if (user_tsc_khz > tsc_khz) {
1295                         vcpu->arch.tsc_catchup = 1;
1296                         vcpu->arch.tsc_always_catchup = 1;
1297                         return 0;
1298                 } else {
1299                         WARN(1, "user requested TSC rate below hardware speed\n");
1300                         return -1;
1301                 }
1302         }
1303
1304         /* TSC scaling required  - calculate ratio */
1305         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1306                                 user_tsc_khz, tsc_khz);
1307
1308         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1309                 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1310                           user_tsc_khz);
1311                 return -1;
1312         }
1313
1314         vcpu->arch.tsc_scaling_ratio = ratio;
1315         return 0;
1316 }
1317
1318 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1319 {
1320         u32 thresh_lo, thresh_hi;
1321         int use_scaling = 0;
1322
1323         /* tsc_khz can be zero if TSC calibration fails */
1324         if (user_tsc_khz == 0) {
1325                 /* set tsc_scaling_ratio to a safe value */
1326                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1327                 return -1;
1328         }
1329
1330         /* Compute a scale to convert nanoseconds in TSC cycles */
1331         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1332                            &vcpu->arch.virtual_tsc_shift,
1333                            &vcpu->arch.virtual_tsc_mult);
1334         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1335
1336         /*
1337          * Compute the variation in TSC rate which is acceptable
1338          * within the range of tolerance and decide if the
1339          * rate being applied is within that bounds of the hardware
1340          * rate.  If so, no scaling or compensation need be done.
1341          */
1342         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1343         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1344         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1345                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1346                 use_scaling = 1;
1347         }
1348         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1349 }
1350
1351 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1352 {
1353         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1354                                       vcpu->arch.virtual_tsc_mult,
1355                                       vcpu->arch.virtual_tsc_shift);
1356         tsc += vcpu->arch.this_tsc_write;
1357         return tsc;
1358 }
1359
1360 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1361 {
1362 #ifdef CONFIG_X86_64
1363         bool vcpus_matched;
1364         struct kvm_arch *ka = &vcpu->kvm->arch;
1365         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1366
1367         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1368                          atomic_read(&vcpu->kvm->online_vcpus));
1369
1370         /*
1371          * Once the masterclock is enabled, always perform request in
1372          * order to update it.
1373          *
1374          * In order to enable masterclock, the host clocksource must be TSC
1375          * and the vcpus need to have matched TSCs.  When that happens,
1376          * perform request to enable masterclock.
1377          */
1378         if (ka->use_master_clock ||
1379             (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1380                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1381
1382         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1383                             atomic_read(&vcpu->kvm->online_vcpus),
1384                             ka->use_master_clock, gtod->clock.vclock_mode);
1385 #endif
1386 }
1387
1388 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1389 {
1390         u64 curr_offset = vcpu->arch.tsc_offset;
1391         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1392 }
1393
1394 /*
1395  * Multiply tsc by a fixed point number represented by ratio.
1396  *
1397  * The most significant 64-N bits (mult) of ratio represent the
1398  * integral part of the fixed point number; the remaining N bits
1399  * (frac) represent the fractional part, ie. ratio represents a fixed
1400  * point number (mult + frac * 2^(-N)).
1401  *
1402  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1403  */
1404 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1405 {
1406         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1407 }
1408
1409 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1410 {
1411         u64 _tsc = tsc;
1412         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1413
1414         if (ratio != kvm_default_tsc_scaling_ratio)
1415                 _tsc = __scale_tsc(ratio, tsc);
1416
1417         return _tsc;
1418 }
1419 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1420
1421 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1422 {
1423         u64 tsc;
1424
1425         tsc = kvm_scale_tsc(vcpu, rdtsc());
1426
1427         return target_tsc - tsc;
1428 }
1429
1430 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1431 {
1432         return vcpu->arch.tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
1433 }
1434 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1435
1436 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
1437 {
1438         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1439         vcpu->arch.tsc_offset = offset;
1440 }
1441
1442 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1443 {
1444         struct kvm *kvm = vcpu->kvm;
1445         u64 offset, ns, elapsed;
1446         unsigned long flags;
1447         s64 usdiff;
1448         bool matched;
1449         bool already_matched;
1450         u64 data = msr->data;
1451
1452         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1453         offset = kvm_compute_tsc_offset(vcpu, data);
1454         ns = ktime_get_boot_ns();
1455         elapsed = ns - kvm->arch.last_tsc_nsec;
1456
1457         if (vcpu->arch.virtual_tsc_khz) {
1458                 int faulted = 0;
1459
1460                 /* n.b - signed multiplication and division required */
1461                 usdiff = data - kvm->arch.last_tsc_write;
1462 #ifdef CONFIG_X86_64
1463                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1464 #else
1465                 /* do_div() only does unsigned */
1466                 asm("1: idivl %[divisor]\n"
1467                     "2: xor %%edx, %%edx\n"
1468                     "   movl $0, %[faulted]\n"
1469                     "3:\n"
1470                     ".section .fixup,\"ax\"\n"
1471                     "4: movl $1, %[faulted]\n"
1472                     "   jmp  3b\n"
1473                     ".previous\n"
1474
1475                 _ASM_EXTABLE(1b, 4b)
1476
1477                 : "=A"(usdiff), [faulted] "=r" (faulted)
1478                 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1479
1480 #endif
1481                 do_div(elapsed, 1000);
1482                 usdiff -= elapsed;
1483                 if (usdiff < 0)
1484                         usdiff = -usdiff;
1485
1486                 /* idivl overflow => difference is larger than USEC_PER_SEC */
1487                 if (faulted)
1488                         usdiff = USEC_PER_SEC;
1489         } else
1490                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1491
1492         /*
1493          * Special case: TSC write with a small delta (1 second) of virtual
1494          * cycle time against real time is interpreted as an attempt to
1495          * synchronize the CPU.
1496          *
1497          * For a reliable TSC, we can match TSC offsets, and for an unstable
1498          * TSC, we add elapsed time in this computation.  We could let the
1499          * compensation code attempt to catch up if we fall behind, but
1500          * it's better to try to match offsets from the beginning.
1501          */
1502         if (usdiff < USEC_PER_SEC &&
1503             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1504                 if (!check_tsc_unstable()) {
1505                         offset = kvm->arch.cur_tsc_offset;
1506                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1507                 } else {
1508                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1509                         data += delta;
1510                         offset = kvm_compute_tsc_offset(vcpu, data);
1511                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1512                 }
1513                 matched = true;
1514                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1515         } else {
1516                 /*
1517                  * We split periods of matched TSC writes into generations.
1518                  * For each generation, we track the original measured
1519                  * nanosecond time, offset, and write, so if TSCs are in
1520                  * sync, we can match exact offset, and if not, we can match
1521                  * exact software computation in compute_guest_tsc()
1522                  *
1523                  * These values are tracked in kvm->arch.cur_xxx variables.
1524                  */
1525                 kvm->arch.cur_tsc_generation++;
1526                 kvm->arch.cur_tsc_nsec = ns;
1527                 kvm->arch.cur_tsc_write = data;
1528                 kvm->arch.cur_tsc_offset = offset;
1529                 matched = false;
1530                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1531                          kvm->arch.cur_tsc_generation, data);
1532         }
1533
1534         /*
1535          * We also track th most recent recorded KHZ, write and time to
1536          * allow the matching interval to be extended at each write.
1537          */
1538         kvm->arch.last_tsc_nsec = ns;
1539         kvm->arch.last_tsc_write = data;
1540         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1541
1542         vcpu->arch.last_guest_tsc = data;
1543
1544         /* Keep track of which generation this VCPU has synchronized to */
1545         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1546         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1547         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1548
1549         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1550                 update_ia32_tsc_adjust_msr(vcpu, offset);
1551         kvm_vcpu_write_tsc_offset(vcpu, offset);
1552         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1553
1554         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1555         if (!matched) {
1556                 kvm->arch.nr_vcpus_matched_tsc = 0;
1557         } else if (!already_matched) {
1558                 kvm->arch.nr_vcpus_matched_tsc++;
1559         }
1560
1561         kvm_track_tsc_matching(vcpu);
1562         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1563 }
1564
1565 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1566
1567 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1568                                            s64 adjustment)
1569 {
1570         kvm_vcpu_write_tsc_offset(vcpu, vcpu->arch.tsc_offset + adjustment);
1571 }
1572
1573 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1574 {
1575         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1576                 WARN_ON(adjustment < 0);
1577         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1578         adjust_tsc_offset_guest(vcpu, adjustment);
1579 }
1580
1581 #ifdef CONFIG_X86_64
1582
1583 static u64 read_tsc(void)
1584 {
1585         u64 ret = (u64)rdtsc_ordered();
1586         u64 last = pvclock_gtod_data.clock.cycle_last;
1587
1588         if (likely(ret >= last))
1589                 return ret;
1590
1591         /*
1592          * GCC likes to generate cmov here, but this branch is extremely
1593          * predictable (it's just a function of time and the likely is
1594          * very likely) and there's a data dependence, so force GCC
1595          * to generate a branch instead.  I don't barrier() because
1596          * we don't actually need a barrier, and if this function
1597          * ever gets inlined it will generate worse code.
1598          */
1599         asm volatile ("");
1600         return last;
1601 }
1602
1603 static inline u64 vgettsc(u64 *cycle_now)
1604 {
1605         long v;
1606         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1607
1608         *cycle_now = read_tsc();
1609
1610         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1611         return v * gtod->clock.mult;
1612 }
1613
1614 static int do_monotonic_boot(s64 *t, u64 *cycle_now)
1615 {
1616         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1617         unsigned long seq;
1618         int mode;
1619         u64 ns;
1620
1621         do {
1622                 seq = read_seqcount_begin(&gtod->seq);
1623                 mode = gtod->clock.vclock_mode;
1624                 ns = gtod->nsec_base;
1625                 ns += vgettsc(cycle_now);
1626                 ns >>= gtod->clock.shift;
1627                 ns += gtod->boot_ns;
1628         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1629         *t = ns;
1630
1631         return mode;
1632 }
1633
1634 static int do_realtime(struct timespec *ts, u64 *cycle_now)
1635 {
1636         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1637         unsigned long seq;
1638         int mode;
1639         u64 ns;
1640
1641         do {
1642                 seq = read_seqcount_begin(&gtod->seq);
1643                 mode = gtod->clock.vclock_mode;
1644                 ts->tv_sec = gtod->wall_time_sec;
1645                 ns = gtod->nsec_base;
1646                 ns += vgettsc(cycle_now);
1647                 ns >>= gtod->clock.shift;
1648         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1649
1650         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
1651         ts->tv_nsec = ns;
1652
1653         return mode;
1654 }
1655
1656 /* returns true if host is using tsc clocksource */
1657 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *cycle_now)
1658 {
1659         /* checked again under seqlock below */
1660         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1661                 return false;
1662
1663         return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1664 }
1665
1666 /* returns true if host is using tsc clocksource */
1667 static bool kvm_get_walltime_and_clockread(struct timespec *ts,
1668                                            u64 *cycle_now)
1669 {
1670         /* checked again under seqlock below */
1671         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1672                 return false;
1673
1674         return do_realtime(ts, cycle_now) == VCLOCK_TSC;
1675 }
1676 #endif
1677
1678 /*
1679  *
1680  * Assuming a stable TSC across physical CPUS, and a stable TSC
1681  * across virtual CPUs, the following condition is possible.
1682  * Each numbered line represents an event visible to both
1683  * CPUs at the next numbered event.
1684  *
1685  * "timespecX" represents host monotonic time. "tscX" represents
1686  * RDTSC value.
1687  *
1688  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1689  *
1690  * 1.  read timespec0,tsc0
1691  * 2.                                   | timespec1 = timespec0 + N
1692  *                                      | tsc1 = tsc0 + M
1693  * 3. transition to guest               | transition to guest
1694  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1695  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1696  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1697  *
1698  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1699  *
1700  *      - ret0 < ret1
1701  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1702  *              ...
1703  *      - 0 < N - M => M < N
1704  *
1705  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1706  * always the case (the difference between two distinct xtime instances
1707  * might be smaller then the difference between corresponding TSC reads,
1708  * when updating guest vcpus pvclock areas).
1709  *
1710  * To avoid that problem, do not allow visibility of distinct
1711  * system_timestamp/tsc_timestamp values simultaneously: use a master
1712  * copy of host monotonic time values. Update that master copy
1713  * in lockstep.
1714  *
1715  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1716  *
1717  */
1718
1719 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1720 {
1721 #ifdef CONFIG_X86_64
1722         struct kvm_arch *ka = &kvm->arch;
1723         int vclock_mode;
1724         bool host_tsc_clocksource, vcpus_matched;
1725
1726         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1727                         atomic_read(&kvm->online_vcpus));
1728
1729         /*
1730          * If the host uses TSC clock, then passthrough TSC as stable
1731          * to the guest.
1732          */
1733         host_tsc_clocksource = kvm_get_time_and_clockread(
1734                                         &ka->master_kernel_ns,
1735                                         &ka->master_cycle_now);
1736
1737         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1738                                 && !backwards_tsc_observed
1739                                 && !ka->boot_vcpu_runs_old_kvmclock;
1740
1741         if (ka->use_master_clock)
1742                 atomic_set(&kvm_guest_has_master_clock, 1);
1743
1744         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1745         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1746                                         vcpus_matched);
1747 #endif
1748 }
1749
1750 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
1751 {
1752         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
1753 }
1754
1755 static void kvm_gen_update_masterclock(struct kvm *kvm)
1756 {
1757 #ifdef CONFIG_X86_64
1758         int i;
1759         struct kvm_vcpu *vcpu;
1760         struct kvm_arch *ka = &kvm->arch;
1761
1762         spin_lock(&ka->pvclock_gtod_sync_lock);
1763         kvm_make_mclock_inprogress_request(kvm);
1764         /* no guest entries from this point */
1765         pvclock_update_vm_gtod_copy(kvm);
1766
1767         kvm_for_each_vcpu(i, vcpu, kvm)
1768                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1769
1770         /* guest entries allowed */
1771         kvm_for_each_vcpu(i, vcpu, kvm)
1772                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1773
1774         spin_unlock(&ka->pvclock_gtod_sync_lock);
1775 #endif
1776 }
1777
1778 static u64 __get_kvmclock_ns(struct kvm *kvm)
1779 {
1780         struct kvm_arch *ka = &kvm->arch;
1781         struct pvclock_vcpu_time_info hv_clock;
1782
1783         spin_lock(&ka->pvclock_gtod_sync_lock);
1784         if (!ka->use_master_clock) {
1785                 spin_unlock(&ka->pvclock_gtod_sync_lock);
1786                 return ktime_get_boot_ns() + ka->kvmclock_offset;
1787         }
1788
1789         hv_clock.tsc_timestamp = ka->master_cycle_now;
1790         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
1791         spin_unlock(&ka->pvclock_gtod_sync_lock);
1792
1793         kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
1794                            &hv_clock.tsc_shift,
1795                            &hv_clock.tsc_to_system_mul);
1796         return __pvclock_read_cycles(&hv_clock, rdtsc());
1797 }
1798
1799 u64 get_kvmclock_ns(struct kvm *kvm)
1800 {
1801         unsigned long flags;
1802         s64 ns;
1803
1804         local_irq_save(flags);
1805         ns = __get_kvmclock_ns(kvm);
1806         local_irq_restore(flags);
1807
1808         return ns;
1809 }
1810
1811 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
1812 {
1813         struct kvm_vcpu_arch *vcpu = &v->arch;
1814         struct pvclock_vcpu_time_info guest_hv_clock;
1815
1816         if (unlikely(kvm_vcpu_read_guest_cached(v, &vcpu->pv_time,
1817                 &guest_hv_clock, sizeof(guest_hv_clock))))
1818                 return;
1819
1820         /* This VCPU is paused, but it's legal for a guest to read another
1821          * VCPU's kvmclock, so we really have to follow the specification where
1822          * it says that version is odd if data is being modified, and even after
1823          * it is consistent.
1824          *
1825          * Version field updates must be kept separate.  This is because
1826          * kvm_write_guest_cached might use a "rep movs" instruction, and
1827          * writes within a string instruction are weakly ordered.  So there
1828          * are three writes overall.
1829          *
1830          * As a small optimization, only write the version field in the first
1831          * and third write.  The vcpu->pv_time cache is still valid, because the
1832          * version field is the first in the struct.
1833          */
1834         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1835
1836         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1837         kvm_vcpu_write_guest_cached(v, &vcpu->pv_time,
1838                                     &vcpu->hv_clock,
1839                                     sizeof(vcpu->hv_clock.version));
1840
1841         smp_wmb();
1842
1843         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1844         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1845
1846         if (vcpu->pvclock_set_guest_stopped_request) {
1847                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
1848                 vcpu->pvclock_set_guest_stopped_request = false;
1849         }
1850
1851         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1852
1853         kvm_vcpu_write_guest_cached(v, &vcpu->pv_time,
1854                                     &vcpu->hv_clock,
1855                                     sizeof(vcpu->hv_clock));
1856
1857         smp_wmb();
1858
1859         vcpu->hv_clock.version++;
1860         kvm_vcpu_write_guest_cached(v, &vcpu->pv_time,
1861                                     &vcpu->hv_clock,
1862                                     sizeof(vcpu->hv_clock.version));
1863 }
1864
1865 static int kvm_guest_time_update(struct kvm_vcpu *v)
1866 {
1867         unsigned long flags, tgt_tsc_khz;
1868         struct kvm_vcpu_arch *vcpu = &v->arch;
1869         struct kvm_arch *ka = &v->kvm->arch;
1870         s64 kernel_ns;
1871         u64 tsc_timestamp, host_tsc;
1872         u8 pvclock_flags;
1873         bool use_master_clock;
1874
1875         kernel_ns = 0;
1876         host_tsc = 0;
1877
1878         /*
1879          * If the host uses TSC clock, then passthrough TSC as stable
1880          * to the guest.
1881          */
1882         spin_lock(&ka->pvclock_gtod_sync_lock);
1883         use_master_clock = ka->use_master_clock;
1884         if (use_master_clock) {
1885                 host_tsc = ka->master_cycle_now;
1886                 kernel_ns = ka->master_kernel_ns;
1887         }
1888         spin_unlock(&ka->pvclock_gtod_sync_lock);
1889
1890         /* Keep irq disabled to prevent changes to the clock */
1891         local_irq_save(flags);
1892         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1893         if (unlikely(tgt_tsc_khz == 0)) {
1894                 local_irq_restore(flags);
1895                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1896                 return 1;
1897         }
1898         if (!use_master_clock) {
1899                 host_tsc = rdtsc();
1900                 kernel_ns = ktime_get_boot_ns();
1901         }
1902
1903         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
1904
1905         /*
1906          * We may have to catch up the TSC to match elapsed wall clock
1907          * time for two reasons, even if kvmclock is used.
1908          *   1) CPU could have been running below the maximum TSC rate
1909          *   2) Broken TSC compensation resets the base at each VCPU
1910          *      entry to avoid unknown leaps of TSC even when running
1911          *      again on the same CPU.  This may cause apparent elapsed
1912          *      time to disappear, and the guest to stand still or run
1913          *      very slowly.
1914          */
1915         if (vcpu->tsc_catchup) {
1916                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1917                 if (tsc > tsc_timestamp) {
1918                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1919                         tsc_timestamp = tsc;
1920                 }
1921         }
1922
1923         local_irq_restore(flags);
1924
1925         /* With all the info we got, fill in the values */
1926
1927         if (kvm_has_tsc_control)
1928                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
1929
1930         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
1931                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
1932                                    &vcpu->hv_clock.tsc_shift,
1933                                    &vcpu->hv_clock.tsc_to_system_mul);
1934                 vcpu->hw_tsc_khz = tgt_tsc_khz;
1935         }
1936
1937         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1938         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1939         vcpu->last_guest_tsc = tsc_timestamp;
1940
1941         /* If the host uses TSC clocksource, then it is stable */
1942         pvclock_flags = 0;
1943         if (use_master_clock)
1944                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1945
1946         vcpu->hv_clock.flags = pvclock_flags;
1947
1948         if (vcpu->pv_time_enabled)
1949                 kvm_setup_pvclock_page(v);
1950         if (v == kvm_get_vcpu(v->kvm, 0))
1951                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
1952         return 0;
1953 }
1954
1955 /*
1956  * kvmclock updates which are isolated to a given vcpu, such as
1957  * vcpu->cpu migration, should not allow system_timestamp from
1958  * the rest of the vcpus to remain static. Otherwise ntp frequency
1959  * correction applies to one vcpu's system_timestamp but not
1960  * the others.
1961  *
1962  * So in those cases, request a kvmclock update for all vcpus.
1963  * We need to rate-limit these requests though, as they can
1964  * considerably slow guests that have a large number of vcpus.
1965  * The time for a remote vcpu to update its kvmclock is bound
1966  * by the delay we use to rate-limit the updates.
1967  */
1968
1969 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1970
1971 static void kvmclock_update_fn(struct work_struct *work)
1972 {
1973         int i;
1974         struct delayed_work *dwork = to_delayed_work(work);
1975         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1976                                            kvmclock_update_work);
1977         struct kvm *kvm = container_of(ka, struct kvm, arch);
1978         struct kvm_vcpu *vcpu;
1979
1980         kvm_for_each_vcpu(i, vcpu, kvm) {
1981                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1982                 kvm_vcpu_kick(vcpu);
1983         }
1984 }
1985
1986 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1987 {
1988         struct kvm *kvm = v->kvm;
1989
1990         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1991         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1992                                         KVMCLOCK_UPDATE_DELAY);
1993 }
1994
1995 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1996
1997 static void kvmclock_sync_fn(struct work_struct *work)
1998 {
1999         struct delayed_work *dwork = to_delayed_work(work);
2000         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2001                                            kvmclock_sync_work);
2002         struct kvm *kvm = container_of(ka, struct kvm, arch);
2003
2004         if (!kvmclock_periodic_sync)
2005                 return;
2006
2007         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2008         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2009                                         KVMCLOCK_SYNC_PERIOD);
2010 }
2011
2012 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
2013 {
2014         u64 mcg_cap = vcpu->arch.mcg_cap;
2015         unsigned bank_num = mcg_cap & 0xff;
2016
2017         switch (msr) {
2018         case MSR_IA32_MCG_STATUS:
2019                 vcpu->arch.mcg_status = data;
2020                 break;
2021         case MSR_IA32_MCG_CTL:
2022                 if (!(mcg_cap & MCG_CTL_P))
2023                         return 1;
2024                 if (data != 0 && data != ~(u64)0)
2025                         return -1;
2026                 vcpu->arch.mcg_ctl = data;
2027                 break;
2028         default:
2029                 if (msr >= MSR_IA32_MC0_CTL &&
2030                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2031                         u32 offset = msr - MSR_IA32_MC0_CTL;
2032                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2033                          * some Linux kernels though clear bit 10 in bank 4 to
2034                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2035                          * this to avoid an uncatched #GP in the guest
2036                          */
2037                         if ((offset & 0x3) == 0 &&
2038                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2039                                 return -1;
2040                         vcpu->arch.mce_banks[offset] = data;
2041                         break;
2042                 }
2043                 return 1;
2044         }
2045         return 0;
2046 }
2047
2048 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2049 {
2050         struct kvm *kvm = vcpu->kvm;
2051         int lm = is_long_mode(vcpu);
2052         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2053                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2054         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2055                 : kvm->arch.xen_hvm_config.blob_size_32;
2056         u32 page_num = data & ~PAGE_MASK;
2057         u64 page_addr = data & PAGE_MASK;
2058         u8 *page;
2059         int r;
2060
2061         r = -E2BIG;
2062         if (page_num >= blob_size)
2063                 goto out;
2064         r = -ENOMEM;
2065         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2066         if (IS_ERR(page)) {
2067                 r = PTR_ERR(page);
2068                 goto out;
2069         }
2070         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2071                 goto out_free;
2072         r = 0;
2073 out_free:
2074         kfree(page);
2075 out:
2076         return r;
2077 }
2078
2079 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2080 {
2081         gpa_t gpa = data & ~0x3f;
2082
2083         /* Bits 2:5 are reserved, Should be zero */
2084         if (data & 0x3c)
2085                 return 1;
2086
2087         vcpu->arch.apf.msr_val = data;
2088
2089         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2090                 kvm_clear_async_pf_completion_queue(vcpu);
2091                 kvm_async_pf_hash_reset(vcpu);
2092                 return 0;
2093         }
2094
2095         if (kvm_vcpu_gfn_to_hva_cache_init(vcpu, &vcpu->arch.apf.data, gpa,
2096                                         sizeof(u32)))
2097                 return 1;
2098
2099         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2100         kvm_async_pf_wakeup_all(vcpu);
2101         return 0;
2102 }
2103
2104 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2105 {
2106         vcpu->arch.pv_time_enabled = false;
2107 }
2108
2109 static void record_steal_time(struct kvm_vcpu *vcpu)
2110 {
2111         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2112                 return;
2113
2114         if (unlikely(kvm_vcpu_read_guest_cached(vcpu, &vcpu->arch.st.stime,
2115                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2116                 return;
2117
2118         vcpu->arch.st.steal.preempted = 0;
2119
2120         if (vcpu->arch.st.steal.version & 1)
2121                 vcpu->arch.st.steal.version += 1;  /* first time write, random junk */
2122
2123         vcpu->arch.st.steal.version += 1;
2124
2125         kvm_vcpu_write_guest_cached(vcpu, &vcpu->arch.st.stime,
2126                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2127
2128         smp_wmb();
2129
2130         vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2131                 vcpu->arch.st.last_steal;
2132         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2133
2134         kvm_vcpu_write_guest_cached(vcpu, &vcpu->arch.st.stime,
2135                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2136
2137         smp_wmb();
2138
2139         vcpu->arch.st.steal.version += 1;
2140
2141         kvm_vcpu_write_guest_cached(vcpu, &vcpu->arch.st.stime,
2142                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2143 }
2144
2145 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2146 {
2147         bool pr = false;
2148         u32 msr = msr_info->index;
2149         u64 data = msr_info->data;
2150
2151         switch (msr) {
2152         case MSR_AMD64_NB_CFG:
2153         case MSR_IA32_UCODE_REV:
2154         case MSR_IA32_UCODE_WRITE:
2155         case MSR_VM_HSAVE_PA:
2156         case MSR_AMD64_PATCH_LOADER:
2157         case MSR_AMD64_BU_CFG2:
2158                 break;
2159
2160         case MSR_EFER:
2161                 return set_efer(vcpu, data);
2162         case MSR_K7_HWCR:
2163                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2164                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2165                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2166                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2167                 if (data != 0) {
2168                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2169                                     data);
2170                         return 1;
2171                 }
2172                 break;
2173         case MSR_FAM10H_MMIO_CONF_BASE:
2174                 if (data != 0) {
2175                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2176                                     "0x%llx\n", data);
2177                         return 1;
2178                 }
2179                 break;
2180         case MSR_IA32_DEBUGCTLMSR:
2181                 if (!data) {
2182                         /* We support the non-activated case already */
2183                         break;
2184                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2185                         /* Values other than LBR and BTF are vendor-specific,
2186                            thus reserved and should throw a #GP */
2187                         return 1;
2188                 }
2189                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2190                             __func__, data);
2191                 break;
2192         case 0x200 ... 0x2ff:
2193                 return kvm_mtrr_set_msr(vcpu, msr, data);
2194         case MSR_IA32_APICBASE:
2195                 return kvm_set_apic_base(vcpu, msr_info);
2196         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2197                 return kvm_x2apic_msr_write(vcpu, msr, data);
2198         case MSR_IA32_TSCDEADLINE:
2199                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2200                 break;
2201         case MSR_IA32_TSC_ADJUST:
2202                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2203                         if (!msr_info->host_initiated) {
2204                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2205                                 adjust_tsc_offset_guest(vcpu, adj);
2206                         }
2207                         vcpu->arch.ia32_tsc_adjust_msr = data;
2208                 }
2209                 break;
2210         case MSR_IA32_MISC_ENABLE:
2211                 vcpu->arch.ia32_misc_enable_msr = data;
2212                 break;
2213         case MSR_IA32_SMBASE:
2214                 if (!msr_info->host_initiated)
2215                         return 1;
2216                 vcpu->arch.smbase = data;
2217                 break;
2218         case MSR_KVM_WALL_CLOCK_NEW:
2219         case MSR_KVM_WALL_CLOCK:
2220                 vcpu->kvm->arch.wall_clock = data;
2221                 kvm_write_wall_clock(vcpu->kvm, data);
2222                 break;
2223         case MSR_KVM_SYSTEM_TIME_NEW:
2224         case MSR_KVM_SYSTEM_TIME: {
2225                 struct kvm_arch *ka = &vcpu->kvm->arch;
2226
2227                 kvmclock_reset(vcpu);
2228
2229                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2230                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2231
2232                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2233                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
2234                                         &vcpu->requests);
2235
2236                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2237                 }
2238
2239                 vcpu->arch.time = data;
2240                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2241
2242                 /* we verify if the enable bit is set... */
2243                 if (!(data & 1))
2244                         break;
2245
2246                 if (kvm_vcpu_gfn_to_hva_cache_init(vcpu,
2247                      &vcpu->arch.pv_time, data & ~1ULL,
2248                      sizeof(struct pvclock_vcpu_time_info)))
2249                         vcpu->arch.pv_time_enabled = false;
2250                 else
2251                         vcpu->arch.pv_time_enabled = true;
2252
2253                 break;
2254         }
2255         case MSR_KVM_ASYNC_PF_EN:
2256                 if (kvm_pv_enable_async_pf(vcpu, data))
2257                         return 1;
2258                 break;
2259         case MSR_KVM_STEAL_TIME:
2260
2261                 if (unlikely(!sched_info_on()))
2262                         return 1;
2263
2264                 if (data & KVM_STEAL_RESERVED_MASK)
2265                         return 1;
2266
2267                 if (kvm_vcpu_gfn_to_hva_cache_init(vcpu, &vcpu->arch.st.stime,
2268                                                 data & KVM_STEAL_VALID_BITS,
2269                                                 sizeof(struct kvm_steal_time)))
2270                         return 1;
2271
2272                 vcpu->arch.st.msr_val = data;
2273
2274                 if (!(data & KVM_MSR_ENABLED))
2275                         break;
2276
2277                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2278
2279                 break;
2280         case MSR_KVM_PV_EOI_EN:
2281                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2282                         return 1;
2283                 break;
2284
2285         case MSR_IA32_MCG_CTL:
2286         case MSR_IA32_MCG_STATUS:
2287         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2288                 return set_msr_mce(vcpu, msr, data);
2289
2290         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2291         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2292                 pr = true; /* fall through */
2293         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2294         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2295                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2296                         return kvm_pmu_set_msr(vcpu, msr_info);
2297
2298                 if (pr || data != 0)
2299                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2300                                     "0x%x data 0x%llx\n", msr, data);
2301                 break;
2302         case MSR_K7_CLK_CTL:
2303                 /*
2304                  * Ignore all writes to this no longer documented MSR.
2305                  * Writes are only relevant for old K7 processors,
2306                  * all pre-dating SVM, but a recommended workaround from
2307                  * AMD for these chips. It is possible to specify the
2308                  * affected processor models on the command line, hence
2309                  * the need to ignore the workaround.
2310                  */
2311                 break;
2312         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2313         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2314         case HV_X64_MSR_CRASH_CTL:
2315         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2316                 return kvm_hv_set_msr_common(vcpu, msr, data,
2317                                              msr_info->host_initiated);
2318         case MSR_IA32_BBL_CR_CTL3:
2319                 /* Drop writes to this legacy MSR -- see rdmsr
2320                  * counterpart for further detail.
2321                  */
2322                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n", msr, data);
2323                 break;
2324         case MSR_AMD64_OSVW_ID_LENGTH:
2325                 if (!guest_cpuid_has_osvw(vcpu))
2326                         return 1;
2327                 vcpu->arch.osvw.length = data;
2328                 break;
2329         case MSR_AMD64_OSVW_STATUS:
2330                 if (!guest_cpuid_has_osvw(vcpu))
2331                         return 1;
2332                 vcpu->arch.osvw.status = data;
2333                 break;
2334         default:
2335                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2336                         return xen_hvm_config(vcpu, data);
2337                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2338                         return kvm_pmu_set_msr(vcpu, msr_info);
2339                 if (!ignore_msrs) {
2340                         vcpu_debug_ratelimited(vcpu, "unhandled wrmsr: 0x%x data 0x%llx\n",
2341                                     msr, data);
2342                         return 1;
2343                 } else {
2344                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
2345                                     msr, data);
2346                         break;
2347                 }
2348         }
2349         return 0;
2350 }
2351 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2352
2353
2354 /*
2355  * Reads an msr value (of 'msr_index') into 'pdata'.
2356  * Returns 0 on success, non-0 otherwise.
2357  * Assumes vcpu_load() was already called.
2358  */
2359 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2360 {
2361         return kvm_x86_ops->get_msr(vcpu, msr);
2362 }
2363 EXPORT_SYMBOL_GPL(kvm_get_msr);
2364
2365 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2366 {
2367         u64 data;
2368         u64 mcg_cap = vcpu->arch.mcg_cap;
2369         unsigned bank_num = mcg_cap & 0xff;
2370
2371         switch (msr) {
2372         case MSR_IA32_P5_MC_ADDR:
2373         case MSR_IA32_P5_MC_TYPE:
2374                 data = 0;
2375                 break;
2376         case MSR_IA32_MCG_CAP:
2377                 data = vcpu->arch.mcg_cap;
2378                 break;
2379         case MSR_IA32_MCG_CTL:
2380                 if (!(mcg_cap & MCG_CTL_P))
2381                         return 1;
2382                 data = vcpu->arch.mcg_ctl;
2383                 break;
2384         case MSR_IA32_MCG_STATUS:
2385                 data = vcpu->arch.mcg_status;
2386                 break;
2387         default:
2388                 if (msr >= MSR_IA32_MC0_CTL &&
2389                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2390                         u32 offset = msr - MSR_IA32_MC0_CTL;
2391                         data = vcpu->arch.mce_banks[offset];
2392                         break;
2393                 }
2394                 return 1;
2395         }
2396         *pdata = data;
2397         return 0;
2398 }
2399
2400 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2401 {
2402         switch (msr_info->index) {
2403         case MSR_IA32_PLATFORM_ID:
2404         case MSR_IA32_EBL_CR_POWERON:
2405         case MSR_IA32_DEBUGCTLMSR:
2406         case MSR_IA32_LASTBRANCHFROMIP:
2407         case MSR_IA32_LASTBRANCHTOIP:
2408         case MSR_IA32_LASTINTFROMIP:
2409         case MSR_IA32_LASTINTTOIP:
2410         case MSR_K8_SYSCFG:
2411         case MSR_K8_TSEG_ADDR:
2412         case MSR_K8_TSEG_MASK:
2413         case MSR_K7_HWCR:
2414         case MSR_VM_HSAVE_PA:
2415         case MSR_K8_INT_PENDING_MSG:
2416         case MSR_AMD64_NB_CFG:
2417         case MSR_FAM10H_MMIO_CONF_BASE:
2418         case MSR_AMD64_BU_CFG2:
2419         case MSR_IA32_PERF_CTL:
2420                 msr_info->data = 0;
2421                 break;
2422         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2423         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2424         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2425         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2426                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2427                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2428                 msr_info->data = 0;
2429                 break;
2430         case MSR_IA32_UCODE_REV:
2431                 msr_info->data = 0x100000000ULL;
2432                 break;
2433         case MSR_MTRRcap:
2434         case 0x200 ... 0x2ff:
2435                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2436         case 0xcd: /* fsb frequency */
2437                 msr_info->data = 3;
2438                 break;
2439                 /*
2440                  * MSR_EBC_FREQUENCY_ID
2441                  * Conservative value valid for even the basic CPU models.
2442                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2443                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2444                  * and 266MHz for model 3, or 4. Set Core Clock
2445                  * Frequency to System Bus Frequency Ratio to 1 (bits
2446                  * 31:24) even though these are only valid for CPU
2447                  * models > 2, however guests may end up dividing or
2448                  * multiplying by zero otherwise.
2449                  */
2450         case MSR_EBC_FREQUENCY_ID:
2451                 msr_info->data = 1 << 24;
2452                 break;
2453         case MSR_IA32_APICBASE:
2454                 msr_info->data = kvm_get_apic_base(vcpu);
2455                 break;
2456         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2457                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2458                 break;
2459         case MSR_IA32_TSCDEADLINE:
2460                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2461                 break;
2462         case MSR_IA32_TSC_ADJUST:
2463                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2464                 break;
2465         case MSR_IA32_MISC_ENABLE:
2466                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2467                 break;
2468         case MSR_IA32_SMBASE:
2469                 if (!msr_info->host_initiated)
2470                         return 1;
2471                 msr_info->data = vcpu->arch.smbase;
2472                 break;
2473         case MSR_IA32_PERF_STATUS:
2474                 /* TSC increment by tick */
2475                 msr_info->data = 1000ULL;
2476                 /* CPU multiplier */
2477                 msr_info->data |= (((uint64_t)4ULL) << 40);
2478                 break;
2479         case MSR_EFER:
2480                 msr_info->data = vcpu->arch.efer;
2481                 break;
2482         case MSR_KVM_WALL_CLOCK:
2483         case MSR_KVM_WALL_CLOCK_NEW:
2484                 msr_info->data = vcpu->kvm->arch.wall_clock;
2485                 break;
2486         case MSR_KVM_SYSTEM_TIME:
2487         case MSR_KVM_SYSTEM_TIME_NEW:
2488                 msr_info->data = vcpu->arch.time;
2489                 break;
2490         case MSR_KVM_ASYNC_PF_EN:
2491                 msr_info->data = vcpu->arch.apf.msr_val;
2492                 break;
2493         case MSR_KVM_STEAL_TIME:
2494                 msr_info->data = vcpu->arch.st.msr_val;
2495                 break;
2496         case MSR_KVM_PV_EOI_EN:
2497                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2498                 break;
2499         case MSR_IA32_P5_MC_ADDR:
2500         case MSR_IA32_P5_MC_TYPE:
2501         case MSR_IA32_MCG_CAP:
2502         case MSR_IA32_MCG_CTL:
2503         case MSR_IA32_MCG_STATUS:
2504         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2505                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2506         case MSR_K7_CLK_CTL:
2507                 /*
2508                  * Provide expected ramp-up count for K7. All other
2509                  * are set to zero, indicating minimum divisors for
2510                  * every field.
2511                  *
2512                  * This prevents guest kernels on AMD host with CPU
2513                  * type 6, model 8 and higher from exploding due to
2514                  * the rdmsr failing.
2515                  */
2516                 msr_info->data = 0x20000000;
2517                 break;
2518         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2519         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2520         case HV_X64_MSR_CRASH_CTL:
2521         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2522                 return kvm_hv_get_msr_common(vcpu,
2523                                              msr_info->index, &msr_info->data);
2524                 break;
2525         case MSR_IA32_BBL_CR_CTL3:
2526                 /* This legacy MSR exists but isn't fully documented in current
2527                  * silicon.  It is however accessed by winxp in very narrow
2528                  * scenarios where it sets bit #19, itself documented as
2529                  * a "reserved" bit.  Best effort attempt to source coherent
2530                  * read data here should the balance of the register be
2531                  * interpreted by the guest:
2532                  *
2533                  * L2 cache control register 3: 64GB range, 256KB size,
2534                  * enabled, latency 0x1, configured
2535                  */
2536                 msr_info->data = 0xbe702111;
2537                 break;
2538         case MSR_AMD64_OSVW_ID_LENGTH:
2539                 if (!guest_cpuid_has_osvw(vcpu))
2540                         return 1;
2541                 msr_info->data = vcpu->arch.osvw.length;
2542                 break;
2543         case MSR_AMD64_OSVW_STATUS:
2544                 if (!guest_cpuid_has_osvw(vcpu))
2545                         return 1;
2546                 msr_info->data = vcpu->arch.osvw.status;
2547                 break;
2548         default:
2549                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2550                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2551                 if (!ignore_msrs) {
2552                         vcpu_debug_ratelimited(vcpu, "unhandled rdmsr: 0x%x\n",
2553                                                msr_info->index);
2554                         return 1;
2555                 } else {
2556                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);
2557                         msr_info->data = 0;
2558                 }
2559                 break;
2560         }
2561         return 0;
2562 }
2563 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2564
2565 /*
2566  * Read or write a bunch of msrs. All parameters are kernel addresses.
2567  *
2568  * @return number of msrs set successfully.
2569  */
2570 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2571                     struct kvm_msr_entry *entries,
2572                     int (*do_msr)(struct kvm_vcpu *vcpu,
2573                                   unsigned index, u64 *data))
2574 {
2575         int i, idx;
2576
2577         idx = srcu_read_lock(&vcpu->kvm->srcu);
2578         for (i = 0; i < msrs->nmsrs; ++i)
2579                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2580                         break;
2581         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2582
2583         return i;
2584 }
2585
2586 /*
2587  * Read or write a bunch of msrs. Parameters are user addresses.
2588  *
2589  * @return number of msrs set successfully.
2590  */
2591 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2592                   int (*do_msr)(struct kvm_vcpu *vcpu,
2593                                 unsigned index, u64 *data),
2594                   int writeback)
2595 {
2596         struct kvm_msrs msrs;
2597         struct kvm_msr_entry *entries;
2598         int r, n;
2599         unsigned size;
2600
2601         r = -EFAULT;
2602         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2603                 goto out;
2604
2605         r = -E2BIG;
2606         if (msrs.nmsrs >= MAX_IO_MSRS)
2607                 goto out;
2608
2609         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2610         entries = memdup_user(user_msrs->entries, size);
2611         if (IS_ERR(entries)) {
2612                 r = PTR_ERR(entries);
2613                 goto out;
2614         }
2615
2616         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2617         if (r < 0)
2618                 goto out_free;
2619
2620         r = -EFAULT;
2621         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2622                 goto out_free;
2623
2624         r = n;
2625
2626 out_free:
2627         kfree(entries);
2628 out:
2629         return r;
2630 }
2631
2632 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2633 {
2634         int r;
2635
2636         switch (ext) {
2637         case KVM_CAP_IRQCHIP:
2638         case KVM_CAP_HLT:
2639         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2640         case KVM_CAP_SET_TSS_ADDR:
2641         case KVM_CAP_EXT_CPUID:
2642         case KVM_CAP_EXT_EMUL_CPUID:
2643         case KVM_CAP_CLOCKSOURCE:
2644         case KVM_CAP_PIT:
2645         case KVM_CAP_NOP_IO_DELAY:
2646         case KVM_CAP_MP_STATE:
2647         case KVM_CAP_SYNC_MMU:
2648         case KVM_CAP_USER_NMI:
2649         case KVM_CAP_REINJECT_CONTROL:
2650         case KVM_CAP_IRQ_INJECT_STATUS:
2651         case KVM_CAP_IOEVENTFD:
2652         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2653         case KVM_CAP_PIT2:
2654         case KVM_CAP_PIT_STATE2:
2655         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2656         case KVM_CAP_XEN_HVM:
2657         case KVM_CAP_VCPU_EVENTS:
2658         case KVM_CAP_HYPERV:
2659         case KVM_CAP_HYPERV_VAPIC:
2660         case KVM_CAP_HYPERV_SPIN:
2661         case KVM_CAP_HYPERV_SYNIC:
2662         case KVM_CAP_PCI_SEGMENT:
2663         case KVM_CAP_DEBUGREGS:
2664         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2665         case KVM_CAP_XSAVE:
2666         case KVM_CAP_ASYNC_PF:
2667         case KVM_CAP_GET_TSC_KHZ:
2668         case KVM_CAP_KVMCLOCK_CTRL:
2669         case KVM_CAP_READONLY_MEM:
2670         case KVM_CAP_HYPERV_TIME:
2671         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2672         case KVM_CAP_TSC_DEADLINE_TIMER:
2673         case KVM_CAP_ENABLE_CAP_VM:
2674         case KVM_CAP_DISABLE_QUIRKS:
2675         case KVM_CAP_SET_BOOT_CPU_ID:
2676         case KVM_CAP_SPLIT_IRQCHIP:
2677         case KVM_CAP_IMMEDIATE_EXIT:
2678 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2679         case KVM_CAP_ASSIGN_DEV_IRQ:
2680         case KVM_CAP_PCI_2_3:
2681 #endif
2682                 r = 1;
2683                 break;
2684         case KVM_CAP_ADJUST_CLOCK:
2685                 r = KVM_CLOCK_TSC_STABLE;
2686                 break;
2687         case KVM_CAP_X86_SMM:
2688                 /* SMBASE is usually relocated above 1M on modern chipsets,
2689                  * and SMM handlers might indeed rely on 4G segment limits,
2690                  * so do not report SMM to be available if real mode is
2691                  * emulated via vm86 mode.  Still, do not go to great lengths
2692                  * to avoid userspace's usage of the feature, because it is a
2693                  * fringe case that is not enabled except via specific settings
2694                  * of the module parameters.
2695                  */
2696                 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2697                 break;
2698         case KVM_CAP_COALESCED_MMIO:
2699                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2700                 break;
2701         case KVM_CAP_VAPIC:
2702                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2703                 break;
2704         case KVM_CAP_NR_VCPUS:
2705                 r = KVM_SOFT_MAX_VCPUS;
2706                 break;
2707         case KVM_CAP_MAX_VCPUS:
2708                 r = KVM_MAX_VCPUS;
2709                 break;
2710         case KVM_CAP_NR_MEMSLOTS:
2711                 r = KVM_USER_MEM_SLOTS;
2712                 break;
2713         case KVM_CAP_PV_MMU:    /* obsolete */
2714                 r = 0;
2715                 break;
2716 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2717         case KVM_CAP_IOMMU:
2718                 r = iommu_present(&pci_bus_type);
2719                 break;
2720 #endif
2721         case KVM_CAP_MCE:
2722                 r = KVM_MAX_MCE_BANKS;
2723                 break;
2724         case KVM_CAP_XCRS:
2725                 r = boot_cpu_has(X86_FEATURE_XSAVE);
2726                 break;
2727         case KVM_CAP_TSC_CONTROL:
2728                 r = kvm_has_tsc_control;
2729                 break;
2730         case KVM_CAP_X2APIC_API:
2731                 r = KVM_X2APIC_API_VALID_FLAGS;
2732                 break;
2733         default:
2734                 r = 0;
2735                 break;
2736         }
2737         return r;
2738
2739 }
2740
2741 long kvm_arch_dev_ioctl(struct file *filp,
2742                         unsigned int ioctl, unsigned long arg)
2743 {
2744         void __user *argp = (void __user *)arg;
2745         long r;
2746
2747         switch (ioctl) {
2748         case KVM_GET_MSR_INDEX_LIST: {
2749                 struct kvm_msr_list __user *user_msr_list = argp;
2750                 struct kvm_msr_list msr_list;
2751                 unsigned n;
2752
2753                 r = -EFAULT;
2754                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2755                         goto out;
2756                 n = msr_list.nmsrs;
2757                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2758                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2759                         goto out;
2760                 r = -E2BIG;
2761                 if (n < msr_list.nmsrs)
2762                         goto out;
2763                 r = -EFAULT;
2764                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2765                                  num_msrs_to_save * sizeof(u32)))
2766                         goto out;
2767                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2768                                  &emulated_msrs,
2769                                  num_emulated_msrs * sizeof(u32)))
2770                         goto out;
2771                 r = 0;
2772                 break;
2773         }
2774         case KVM_GET_SUPPORTED_CPUID:
2775         case KVM_GET_EMULATED_CPUID: {
2776                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2777                 struct kvm_cpuid2 cpuid;
2778
2779                 r = -EFAULT;
2780                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2781                         goto out;
2782
2783                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2784                                             ioctl);
2785                 if (r)
2786                         goto out;
2787
2788                 r = -EFAULT;
2789                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2790                         goto out;
2791                 r = 0;
2792                 break;
2793         }
2794         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2795                 r = -EFAULT;
2796                 if (copy_to_user(argp, &kvm_mce_cap_supported,
2797                                  sizeof(kvm_mce_cap_supported)))
2798                         goto out;
2799                 r = 0;
2800                 break;
2801         }
2802         default:
2803                 r = -EINVAL;
2804         }
2805 out:
2806         return r;
2807 }
2808
2809 static void wbinvd_ipi(void *garbage)
2810 {
2811         wbinvd();
2812 }
2813
2814 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2815 {
2816         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2817 }
2818
2819 static inline void kvm_migrate_timers(struct kvm_vcpu *vcpu)
2820 {
2821         set_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests);
2822 }
2823
2824 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2825 {
2826         /* Address WBINVD may be executed by guest */
2827         if (need_emulate_wbinvd(vcpu)) {
2828                 if (kvm_x86_ops->has_wbinvd_exit())
2829                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2830                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2831                         smp_call_function_single(vcpu->cpu,
2832                                         wbinvd_ipi, NULL, 1);
2833         }
2834
2835         kvm_x86_ops->vcpu_load(vcpu, cpu);
2836
2837         /* Apply any externally detected TSC adjustments (due to suspend) */
2838         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2839                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2840                 vcpu->arch.tsc_offset_adjustment = 0;
2841                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2842         }
2843
2844         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2845                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2846                                 rdtsc() - vcpu->arch.last_host_tsc;
2847                 if (tsc_delta < 0)
2848                         mark_tsc_unstable("KVM discovered backwards TSC");
2849
2850                 if (check_tsc_unstable()) {
2851                         u64 offset = kvm_compute_tsc_offset(vcpu,
2852                                                 vcpu->arch.last_guest_tsc);
2853                         kvm_vcpu_write_tsc_offset(vcpu, offset);
2854                         vcpu->arch.tsc_catchup = 1;
2855                 }
2856                 if (kvm_lapic_hv_timer_in_use(vcpu) &&
2857                                 kvm_x86_ops->set_hv_timer(vcpu,
2858                                         kvm_get_lapic_target_expiration_tsc(vcpu)))
2859                         kvm_lapic_switch_to_sw_timer(vcpu);
2860                 /*
2861                  * On a host with synchronized TSC, there is no need to update
2862                  * kvmclock on vcpu->cpu migration
2863                  */
2864                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2865                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2866                 if (vcpu->cpu != cpu)
2867                         kvm_migrate_timers(vcpu);
2868                 vcpu->cpu = cpu;
2869         }
2870
2871         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2872 }
2873
2874 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
2875 {
2876         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2877                 return;
2878
2879         vcpu->arch.st.steal.preempted = 1;
2880
2881         kvm_vcpu_write_guest_offset_cached(vcpu, &vcpu->arch.st.stime,
2882                         &vcpu->arch.st.steal.preempted,
2883                         offsetof(struct kvm_steal_time, preempted),
2884                         sizeof(vcpu->arch.st.steal.preempted));
2885 }
2886
2887 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2888 {
2889         int idx;
2890         /*
2891          * Disable page faults because we're in atomic context here.
2892          * kvm_write_guest_offset_cached() would call might_fault()
2893          * that relies on pagefault_disable() to tell if there's a
2894          * bug. NOTE: the write to guest memory may not go through if
2895          * during postcopy live migration or if there's heavy guest
2896          * paging.
2897          */
2898         pagefault_disable();
2899         /*
2900          * kvm_memslots() will be called by
2901          * kvm_write_guest_offset_cached() so take the srcu lock.
2902          */
2903         idx = srcu_read_lock(&vcpu->kvm->srcu);
2904         kvm_steal_time_set_preempted(vcpu);
2905         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2906         pagefault_enable();
2907         kvm_x86_ops->vcpu_put(vcpu);
2908         kvm_put_guest_fpu(vcpu);
2909         vcpu->arch.last_host_tsc = rdtsc();
2910 }
2911
2912 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2913                                     struct kvm_lapic_state *s)
2914 {
2915         if (kvm_x86_ops->sync_pir_to_irr && vcpu->arch.apicv_active)
2916                 kvm_x86_ops->sync_pir_to_irr(vcpu);
2917
2918         return kvm_apic_get_state(vcpu, s);
2919 }
2920
2921 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2922                                     struct kvm_lapic_state *s)
2923 {
2924         int r;
2925
2926         r = kvm_apic_set_state(vcpu, s);
2927         if (r)
2928                 return r;
2929         update_cr8_intercept(vcpu);
2930
2931         return 0;
2932 }
2933
2934 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
2935 {
2936         return (!lapic_in_kernel(vcpu) ||
2937                 kvm_apic_accept_pic_intr(vcpu));
2938 }
2939
2940 /*
2941  * if userspace requested an interrupt window, check that the
2942  * interrupt window is open.
2943  *
2944  * No need to exit to userspace if we already have an interrupt queued.
2945  */
2946 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
2947 {
2948         return kvm_arch_interrupt_allowed(vcpu) &&
2949                 !kvm_cpu_has_interrupt(vcpu) &&
2950                 !kvm_event_needs_reinjection(vcpu) &&
2951                 kvm_cpu_accept_dm_intr(vcpu);
2952 }
2953
2954 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2955                                     struct kvm_interrupt *irq)
2956 {
2957         if (irq->irq >= KVM_NR_INTERRUPTS)
2958                 return -EINVAL;
2959
2960         if (!irqchip_in_kernel(vcpu->kvm)) {
2961                 kvm_queue_interrupt(vcpu, irq->irq, false);
2962                 kvm_make_request(KVM_REQ_EVENT, vcpu);
2963                 return 0;
2964         }
2965
2966         /*
2967          * With in-kernel LAPIC, we only use this to inject EXTINT, so
2968          * fail for in-kernel 8259.
2969          */
2970         if (pic_in_kernel(vcpu->kvm))
2971                 return -ENXIO;
2972
2973         if (vcpu->arch.pending_external_vector != -1)
2974                 return -EEXIST;
2975
2976         vcpu->arch.pending_external_vector = irq->irq;
2977         kvm_make_request(KVM_REQ_EVENT, vcpu);
2978         return 0;
2979 }
2980
2981 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2982 {
2983         kvm_inject_nmi(vcpu);
2984
2985         return 0;
2986 }
2987
2988 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
2989 {
2990         kvm_make_request(KVM_REQ_SMI, vcpu);
2991
2992         return 0;
2993 }
2994
2995 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2996                                            struct kvm_tpr_access_ctl *tac)
2997 {
2998         if (tac->flags)
2999                 return -EINVAL;
3000         vcpu->arch.tpr_access_reporting = !!tac->enabled;
3001         return 0;
3002 }
3003
3004 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
3005                                         u64 mcg_cap)
3006 {
3007         int r;
3008         unsigned bank_num = mcg_cap & 0xff, bank;
3009
3010         r = -EINVAL;
3011         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
3012                 goto out;
3013         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
3014                 goto out;
3015         r = 0;
3016         vcpu->arch.mcg_cap = mcg_cap;
3017         /* Init IA32_MCG_CTL to all 1s */
3018         if (mcg_cap & MCG_CTL_P)
3019                 vcpu->arch.mcg_ctl = ~(u64)0;
3020         /* Init IA32_MCi_CTL to all 1s */
3021         for (bank = 0; bank < bank_num; bank++)
3022                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3023
3024         if (kvm_x86_ops->setup_mce)
3025                 kvm_x86_ops->setup_mce(vcpu);
3026 out:
3027         return r;
3028 }
3029
3030 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3031                                       struct kvm_x86_mce *mce)
3032 {
3033         u64 mcg_cap = vcpu->arch.mcg_cap;
3034         unsigned bank_num = mcg_cap & 0xff;
3035         u64 *banks = vcpu->arch.mce_banks;
3036
3037         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3038                 return -EINVAL;
3039         /*
3040          * if IA32_MCG_CTL is not all 1s, the uncorrected error
3041          * reporting is disabled
3042          */
3043         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3044             vcpu->arch.mcg_ctl != ~(u64)0)
3045                 return 0;
3046         banks += 4 * mce->bank;
3047         /*
3048          * if IA32_MCi_CTL is not all 1s, the uncorrected error
3049          * reporting is disabled for the bank
3050          */
3051         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3052                 return 0;
3053         if (mce->status & MCI_STATUS_UC) {
3054                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3055                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3056                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3057                         return 0;
3058                 }
3059                 if (banks[1] & MCI_STATUS_VAL)
3060                         mce->status |= MCI_STATUS_OVER;
3061                 banks[2] = mce->addr;
3062                 banks[3] = mce->misc;
3063                 vcpu->arch.mcg_status = mce->mcg_status;
3064                 banks[1] = mce->status;
3065                 kvm_queue_exception(vcpu, MC_VECTOR);
3066         } else if (!(banks[1] & MCI_STATUS_VAL)
3067                    || !(banks[1] & MCI_STATUS_UC)) {
3068                 if (banks[1] & MCI_STATUS_VAL)
3069                         mce->status |= MCI_STATUS_OVER;
3070                 banks[2] = mce->addr;
3071                 banks[3] = mce->misc;
3072                 banks[1] = mce->status;
3073         } else
3074                 banks[1] |= MCI_STATUS_OVER;
3075         return 0;
3076 }
3077
3078 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3079                                                struct kvm_vcpu_events *events)
3080 {
3081         process_nmi(vcpu);
3082         events->exception.injected =
3083                 vcpu->arch.exception.pending &&
3084                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
3085         events->exception.nr = vcpu->arch.exception.nr;
3086         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3087         events->exception.pad = 0;
3088         events->exception.error_code = vcpu->arch.exception.error_code;
3089
3090         events->interrupt.injected =
3091                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
3092         events->interrupt.nr = vcpu->arch.interrupt.nr;
3093         events->interrupt.soft = 0;
3094         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3095
3096         events->nmi.injected = vcpu->arch.nmi_injected;
3097         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3098         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3099         events->nmi.pad = 0;
3100
3101         events->sipi_vector = 0; /* never valid when reporting to user space */
3102
3103         events->smi.smm = is_smm(vcpu);
3104         events->smi.pending = vcpu->arch.smi_pending;
3105         events->smi.smm_inside_nmi =
3106                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3107         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3108
3109         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3110                          | KVM_VCPUEVENT_VALID_SHADOW
3111                          | KVM_VCPUEVENT_VALID_SMM);
3112         memset(&events->reserved, 0, sizeof(events->reserved));
3113 }
3114
3115 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags);
3116
3117 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3118                                               struct kvm_vcpu_events *events)
3119 {
3120         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3121                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3122                               | KVM_VCPUEVENT_VALID_SHADOW
3123                               | KVM_VCPUEVENT_VALID_SMM))
3124                 return -EINVAL;
3125
3126         if (events->exception.injected &&
3127             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
3128                 return -EINVAL;
3129
3130         process_nmi(vcpu);
3131         vcpu->arch.exception.pending = events->exception.injected;
3132         vcpu->arch.exception.nr = events->exception.nr;
3133         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3134         vcpu->arch.exception.error_code = events->exception.error_code;
3135
3136         vcpu->arch.interrupt.pending = events->interrupt.injected;
3137         vcpu->arch.interrupt.nr = events->interrupt.nr;
3138         vcpu->arch.interrupt.soft = events->interrupt.soft;
3139         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3140                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3141                                                   events->interrupt.shadow);
3142
3143         vcpu->arch.nmi_injected = events->nmi.injected;
3144         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3145                 vcpu->arch.nmi_pending = events->nmi.pending;
3146         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3147
3148         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3149             lapic_in_kernel(vcpu))
3150                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3151
3152         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3153                 u32 hflags = vcpu->arch.hflags;
3154                 if (events->smi.smm)
3155                         hflags |= HF_SMM_MASK;
3156                 else
3157                         hflags &= ~HF_SMM_MASK;
3158                 kvm_set_hflags(vcpu, hflags);
3159
3160                 vcpu->arch.smi_pending = events->smi.pending;
3161                 if (events->smi.smm_inside_nmi)
3162                         vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3163                 else
3164                         vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3165                 if (lapic_in_kernel(vcpu)) {
3166                         if (events->smi.latched_init)
3167                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3168                         else
3169                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3170                 }
3171         }
3172
3173         kvm_make_request(KVM_REQ_EVENT, vcpu);
3174
3175         return 0;
3176 }
3177
3178 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3179                                              struct kvm_debugregs *dbgregs)
3180 {
3181         unsigned long val;
3182
3183         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3184         kvm_get_dr(vcpu, 6, &val);
3185         dbgregs->dr6 = val;
3186         dbgregs->dr7 = vcpu->arch.dr7;
3187         dbgregs->flags = 0;
3188         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3189 }
3190
3191 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3192                                             struct kvm_debugregs *dbgregs)
3193 {
3194         if (dbgregs->flags)
3195                 return -EINVAL;
3196
3197         if (dbgregs->dr6 & ~0xffffffffull)
3198                 return -EINVAL;
3199         if (dbgregs->dr7 & ~0xffffffffull)
3200                 return -EINVAL;
3201
3202         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3203         kvm_update_dr0123(vcpu);
3204         vcpu->arch.dr6 = dbgregs->dr6;
3205         kvm_update_dr6(vcpu);
3206         vcpu->arch.dr7 = dbgregs->dr7;
3207         kvm_update_dr7(vcpu);
3208
3209         return 0;
3210 }
3211
3212 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3213
3214 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3215 {
3216         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3217         u64 xstate_bv = xsave->header.xfeatures;
3218         u64 valid;
3219
3220         /*
3221          * Copy legacy XSAVE area, to avoid complications with CPUID
3222          * leaves 0 and 1 in the loop below.
3223          */
3224         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3225
3226         /* Set XSTATE_BV */
3227         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
3228         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3229
3230         /*
3231          * Copy each region from the possibly compacted offset to the
3232          * non-compacted offset.
3233          */
3234         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3235         while (valid) {
3236                 u64 feature = valid & -valid;
3237                 int index = fls64(feature) - 1;
3238                 void *src = get_xsave_addr(xsave, feature);
3239
3240                 if (src) {
3241                         u32 size, offset, ecx, edx;
3242                         cpuid_count(XSTATE_CPUID, index,
3243                                     &size, &offset, &ecx, &edx);
3244                         memcpy(dest + offset, src, size);
3245                 }
3246
3247                 valid -= feature;
3248         }
3249 }
3250
3251 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3252 {
3253         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3254         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3255         u64 valid;
3256
3257         /*
3258          * Copy legacy XSAVE area, to avoid complications with CPUID
3259          * leaves 0 and 1 in the loop below.
3260          */
3261         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3262
3263         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3264         xsave->header.xfeatures = xstate_bv;
3265         if (boot_cpu_has(X86_FEATURE_XSAVES))
3266                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3267
3268         /*
3269          * Copy each region from the non-compacted offset to the
3270          * possibly compacted offset.
3271          */
3272         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3273         while (valid) {
3274                 u64 feature = valid & -valid;
3275                 int index = fls64(feature) - 1;
3276                 void *dest = get_xsave_addr(xsave, feature);
3277
3278                 if (dest) {
3279                         u32 size, offset, ecx, edx;
3280                         cpuid_count(XSTATE_CPUID, index,
3281                                     &size, &offset, &ecx, &edx);
3282                         memcpy(dest, src + offset, size);
3283                 }
3284
3285                 valid -= feature;
3286         }
3287 }
3288
3289 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3290                                          struct kvm_xsave *guest_xsave)
3291 {
3292         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3293                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3294                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3295         } else {
3296                 memcpy(guest_xsave->region,
3297                         &vcpu->arch.guest_fpu.state.fxsave,
3298                         sizeof(struct fxregs_state));
3299                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3300                         XFEATURE_MASK_FPSSE;
3301         }
3302 }
3303
3304 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3305                                         struct kvm_xsave *guest_xsave)
3306 {
3307         u64 xstate_bv =
3308                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3309
3310         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3311                 /*
3312                  * Here we allow setting states that are not present in
3313                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3314                  * with old userspace.
3315                  */
3316                 if (xstate_bv & ~kvm_supported_xcr0())
3317                         return -EINVAL;
3318                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3319         } else {
3320                 if (xstate_bv & ~XFEATURE_MASK_FPSSE)
3321                         return -EINVAL;
3322                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3323                         guest_xsave->region, sizeof(struct fxregs_state));
3324         }
3325         return 0;
3326 }
3327
3328 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3329                                         struct kvm_xcrs *guest_xcrs)
3330 {
3331         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3332                 guest_xcrs->nr_xcrs = 0;
3333                 return;
3334         }
3335
3336         guest_xcrs->nr_xcrs = 1;
3337         guest_xcrs->flags = 0;
3338         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3339         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3340 }
3341
3342 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3343                                        struct kvm_xcrs *guest_xcrs)
3344 {
3345         int i, r = 0;
3346
3347         if (!boot_cpu_has(X86_FEATURE_XSAVE))
3348                 return -EINVAL;
3349
3350         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3351                 return -EINVAL;
3352
3353         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3354                 /* Only support XCR0 currently */
3355                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3356                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3357                                 guest_xcrs->xcrs[i].value);
3358                         break;
3359                 }
3360         if (r)
3361                 r = -EINVAL;
3362         return r;
3363 }
3364
3365 /*
3366  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3367  * stopped by the hypervisor.  This function will be called from the host only.
3368  * EINVAL is returned when the host attempts to set the flag for a guest that
3369  * does not support pv clocks.
3370  */
3371 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3372 {
3373         if (!vcpu->arch.pv_time_enabled)
3374                 return -EINVAL;
3375         vcpu->arch.pvclock_set_guest_stopped_request = true;
3376         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3377         return 0;
3378 }
3379
3380 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
3381                                      struct kvm_enable_cap *cap)
3382 {
3383         if (cap->flags)
3384                 return -EINVAL;
3385
3386         switch (cap->cap) {
3387         case KVM_CAP_HYPERV_SYNIC:
3388                 if (!irqchip_in_kernel(vcpu->kvm))
3389                         return -EINVAL;
3390                 return kvm_hv_activate_synic(vcpu);
3391         default:
3392                 return -EINVAL;
3393         }
3394 }
3395
3396 long kvm_arch_vcpu_ioctl(struct file *filp,
3397                          unsigned int ioctl, unsigned long arg)
3398 {
3399         struct kvm_vcpu *vcpu = filp->private_data;
3400         void __user *argp = (void __user *)arg;
3401         int r;
3402         union {
3403                 struct kvm_lapic_state *lapic;
3404                 struct kvm_xsave *xsave;
3405                 struct kvm_xcrs *xcrs;
3406                 void *buffer;
3407         } u;
3408
3409         u.buffer = NULL;
3410         switch (ioctl) {
3411         case KVM_GET_LAPIC: {
3412                 r = -EINVAL;
3413                 if (!lapic_in_kernel(vcpu))
3414                         goto out;
3415                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3416
3417                 r = -ENOMEM;
3418                 if (!u.lapic)
3419                         goto out;
3420                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3421                 if (r)
3422                         goto out;
3423                 r = -EFAULT;
3424                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3425                         goto out;
3426                 r = 0;
3427                 break;
3428         }
3429         case KVM_SET_LAPIC: {
3430                 r = -EINVAL;
3431                 if (!lapic_in_kernel(vcpu))
3432                         goto out;
3433                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3434                 if (IS_ERR(u.lapic))
3435                         return PTR_ERR(u.lapic);
3436
3437                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3438                 break;
3439         }
3440         case KVM_INTERRUPT: {
3441                 struct kvm_interrupt irq;
3442
3443                 r = -EFAULT;
3444                 if (copy_from_user(&irq, argp, sizeof irq))
3445                         goto out;
3446                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3447                 break;
3448         }
3449         case KVM_NMI: {
3450                 r = kvm_vcpu_ioctl_nmi(vcpu);
3451                 break;
3452         }
3453         case KVM_SMI: {
3454                 r = kvm_vcpu_ioctl_smi(vcpu);
3455                 break;
3456         }
3457         case KVM_SET_CPUID: {
3458                 struct kvm_cpuid __user *cpuid_arg = argp;
3459                 struct kvm_cpuid cpuid;
3460
3461                 r = -EFAULT;
3462                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3463                         goto out;
3464                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3465                 break;
3466         }
3467         case KVM_SET_CPUID2: {
3468                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3469                 struct kvm_cpuid2 cpuid;
3470
3471                 r = -EFAULT;
3472                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3473                         goto out;
3474                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3475                                               cpuid_arg->entries);
3476                 break;
3477         }
3478         case KVM_GET_CPUID2: {
3479                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3480                 struct kvm_cpuid2 cpuid;
3481
3482                 r = -EFAULT;
3483                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3484                         goto out;
3485                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3486                                               cpuid_arg->entries);
3487                 if (r)
3488                         goto out;
3489                 r = -EFAULT;
3490                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3491                         goto out;
3492                 r = 0;
3493                 break;
3494         }
3495         case KVM_GET_MSRS:
3496                 r = msr_io(vcpu, argp, do_get_msr, 1);
3497                 break;
3498         case KVM_SET_MSRS:
3499                 r = msr_io(vcpu, argp, do_set_msr, 0);
3500                 break;
3501         case KVM_TPR_ACCESS_REPORTING: {
3502                 struct kvm_tpr_access_ctl tac;
3503
3504                 r = -EFAULT;
3505                 if (copy_from_user(&tac, argp, sizeof tac))
3506                         goto out;
3507                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3508                 if (r)
3509                         goto out;
3510                 r = -EFAULT;
3511                 if (copy_to_user(argp, &tac, sizeof tac))
3512                         goto out;
3513                 r = 0;
3514                 break;
3515         };
3516         case KVM_SET_VAPIC_ADDR: {
3517                 struct kvm_vapic_addr va;
3518                 int idx;
3519
3520                 r = -EINVAL;
3521                 if (!lapic_in_kernel(vcpu))
3522                         goto out;
3523                 r = -EFAULT;
3524                 if (copy_from_user(&va, argp, sizeof va))
3525                         goto out;
3526                 idx = srcu_read_lock(&vcpu->kvm->srcu);
3527                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3528                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3529                 break;
3530         }
3531         case KVM_X86_SETUP_MCE: {
3532                 u64 mcg_cap;
3533
3534                 r = -EFAULT;
3535                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3536                         goto out;
3537                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3538                 break;
3539         }
3540         case KVM_X86_SET_MCE: {
3541                 struct kvm_x86_mce mce;
3542
3543                 r = -EFAULT;
3544                 if (copy_from_user(&mce, argp, sizeof mce))
3545                         goto out;
3546                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3547                 break;
3548         }
3549         case KVM_GET_VCPU_EVENTS: {
3550                 struct kvm_vcpu_events events;
3551
3552                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3553
3554                 r = -EFAULT;
3555                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3556                         break;
3557                 r = 0;
3558                 break;
3559         }
3560         case KVM_SET_VCPU_EVENTS: {
3561                 struct kvm_vcpu_events events;
3562
3563                 r = -EFAULT;
3564                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3565                         break;
3566
3567                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3568                 break;
3569         }
3570         case KVM_GET_DEBUGREGS: {
3571                 struct kvm_debugregs dbgregs;
3572
3573                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3574
3575                 r = -EFAULT;
3576                 if (copy_to_user(argp, &dbgregs,
3577                                  sizeof(struct kvm_debugregs)))
3578                         break;
3579                 r = 0;
3580                 break;
3581         }
3582         case KVM_SET_DEBUGREGS: {
3583                 struct kvm_debugregs dbgregs;
3584
3585                 r = -EFAULT;
3586                 if (copy_from_user(&dbgregs, argp,
3587                                    sizeof(struct kvm_debugregs)))
3588                         break;
3589
3590                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3591                 break;
3592         }
3593         case KVM_GET_XSAVE: {
3594                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3595                 r = -ENOMEM;
3596                 if (!u.xsave)
3597                         break;
3598
3599                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3600
3601                 r = -EFAULT;
3602                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3603                         break;
3604                 r = 0;
3605                 break;
3606         }
3607         case KVM_SET_XSAVE: {
3608                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3609                 if (IS_ERR(u.xsave))
3610                         return PTR_ERR(u.xsave);
3611
3612                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3613                 break;
3614         }
3615         case KVM_GET_XCRS: {
3616                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3617                 r = -ENOMEM;
3618                 if (!u.xcrs)
3619                         break;
3620
3621                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3622
3623                 r = -EFAULT;
3624                 if (copy_to_user(argp, u.xcrs,
3625                                  sizeof(struct kvm_xcrs)))
3626                         break;
3627                 r = 0;
3628                 break;
3629         }
3630         case KVM_SET_XCRS: {
3631                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3632                 if (IS_ERR(u.xcrs))
3633                         return PTR_ERR(u.xcrs);
3634
3635                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3636                 break;
3637         }
3638         case KVM_SET_TSC_KHZ: {
3639                 u32 user_tsc_khz;
3640
3641                 r = -EINVAL;
3642                 user_tsc_khz = (u32)arg;
3643
3644                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3645                         goto out;
3646
3647                 if (user_tsc_khz == 0)
3648                         user_tsc_khz = tsc_khz;
3649
3650                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
3651                         r = 0;
3652
3653                 goto out;
3654         }
3655         case KVM_GET_TSC_KHZ: {
3656                 r = vcpu->arch.virtual_tsc_khz;
3657                 goto out;
3658         }
3659         case KVM_KVMCLOCK_CTRL: {
3660                 r = kvm_set_guest_paused(vcpu);
3661                 goto out;
3662         }
3663         case KVM_ENABLE_CAP: {
3664                 struct kvm_enable_cap cap;
3665
3666                 r = -EFAULT;
3667                 if (copy_from_user(&cap, argp, sizeof(cap)))
3668                         goto out;
3669                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
3670                 break;
3671         }
3672         default:
3673                 r = -EINVAL;
3674         }
3675 out:
3676         kfree(u.buffer);
3677         return r;
3678 }
3679
3680 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3681 {
3682         return VM_FAULT_SIGBUS;
3683 }
3684
3685 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3686 {
3687         int ret;
3688
3689         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3690                 return -EINVAL;
3691         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3692         return ret;
3693 }
3694
3695 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3696                                               u64 ident_addr)
3697 {
3698         kvm->arch.ept_identity_map_addr = ident_addr;
3699         return 0;
3700 }
3701
3702 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3703                                           u32 kvm_nr_mmu_pages)
3704 {
3705         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3706                 return -EINVAL;
3707
3708         mutex_lock(&kvm->slots_lock);
3709
3710         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3711         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3712
3713         mutex_unlock(&kvm->slots_lock);
3714         return 0;
3715 }
3716
3717 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3718 {
3719         return kvm->arch.n_max_mmu_pages;
3720 }
3721
3722 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3723 {
3724         int r;
3725
3726         r = 0;
3727         switch (chip->chip_id) {
3728         case KVM_IRQCHIP_PIC_MASTER:
3729                 memcpy(&chip->chip.pic,
3730                         &pic_irqchip(kvm)->pics[0],
3731                         sizeof(struct kvm_pic_state));
3732                 break;
3733         case KVM_IRQCHIP_PIC_SLAVE:
3734                 memcpy(&chip->chip.pic,
3735                         &pic_irqchip(kvm)->pics[1],
3736                         sizeof(struct kvm_pic_state));
3737                 break;
3738         case KVM_IRQCHIP_IOAPIC:
3739                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3740                 break;
3741         default:
3742                 r = -EINVAL;
3743                 break;
3744         }
3745         return r;
3746 }
3747
3748 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3749 {
3750         int r;
3751
3752         r = 0;
3753         switch (chip->chip_id) {
3754         case KVM_IRQCHIP_PIC_MASTER:
3755                 spin_lock(&pic_irqchip(kvm)->lock);
3756                 memcpy(&pic_irqchip(kvm)->pics[0],
3757                         &chip->chip.pic,
3758                         sizeof(struct kvm_pic_state));
3759                 spin_unlock(&pic_irqchip(kvm)->lock);
3760                 break;
3761         case KVM_IRQCHIP_PIC_SLAVE:
3762                 spin_lock(&pic_irqchip(kvm)->lock);
3763                 memcpy(&pic_irqchip(kvm)->pics[1],
3764                         &chip->chip.pic,
3765                         sizeof(struct kvm_pic_state));
3766                 spin_unlock(&pic_irqchip(kvm)->lock);
3767                 break;
3768         case KVM_IRQCHIP_IOAPIC:
3769                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3770                 break;
3771         default:
3772                 r = -EINVAL;
3773                 break;
3774         }
3775         kvm_pic_update_irq(pic_irqchip(kvm));
3776         return r;
3777 }
3778
3779 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3780 {
3781         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
3782
3783         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
3784
3785         mutex_lock(&kps->lock);
3786         memcpy(ps, &kps->channels, sizeof(*ps));
3787         mutex_unlock(&kps->lock);
3788         return 0;
3789 }
3790
3791 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3792 {
3793         int i;
3794         struct kvm_pit *pit = kvm->arch.vpit;
3795
3796         mutex_lock(&pit->pit_state.lock);
3797         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
3798         for (i = 0; i < 3; i++)
3799                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
3800         mutex_unlock(&pit->pit_state.lock);
3801         return 0;
3802 }
3803
3804 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3805 {
3806         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3807         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3808                 sizeof(ps->channels));
3809         ps->flags = kvm->arch.vpit->pit_state.flags;
3810         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3811         memset(&ps->reserved, 0, sizeof(ps->reserved));
3812         return 0;
3813 }
3814
3815 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3816 {
3817         int start = 0;
3818         int i;
3819         u32 prev_legacy, cur_legacy;
3820         struct kvm_pit *pit = kvm->arch.vpit;
3821
3822         mutex_lock(&pit->pit_state.lock);
3823         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3824         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3825         if (!prev_legacy && cur_legacy)
3826                 start = 1;
3827         memcpy(&pit->pit_state.channels, &ps->channels,
3828                sizeof(pit->pit_state.channels));
3829         pit->pit_state.flags = ps->flags;
3830         for (i = 0; i < 3; i++)
3831                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
3832                                    start && i == 0);
3833         mutex_unlock(&pit->pit_state.lock);
3834         return 0;
3835 }
3836
3837 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3838                                  struct kvm_reinject_control *control)
3839 {
3840         struct kvm_pit *pit = kvm->arch.vpit;
3841
3842         if (!pit)
3843                 return -ENXIO;
3844
3845         /* pit->pit_state.lock was overloaded to prevent userspace from getting
3846          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
3847          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
3848          */
3849         mutex_lock(&pit->pit_state.lock);
3850         kvm_pit_set_reinject(pit, control->pit_reinject);
3851         mutex_unlock(&pit->pit_state.lock);
3852
3853         return 0;
3854 }
3855
3856 /**
3857  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3858  * @kvm: kvm instance
3859  * @log: slot id and address to which we copy the log
3860  *
3861  * Steps 1-4 below provide general overview of dirty page logging. See
3862  * kvm_get_dirty_log_protect() function description for additional details.
3863  *
3864  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3865  * always flush the TLB (step 4) even if previous step failed  and the dirty
3866  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3867  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3868  * writes will be marked dirty for next log read.
3869  *
3870  *   1. Take a snapshot of the bit and clear it if needed.
3871  *   2. Write protect the corresponding page.
3872  *   3. Copy the snapshot to the userspace.
3873  *   4. Flush TLB's if needed.
3874  */
3875 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3876 {
3877         bool is_dirty = false;
3878         int r;
3879
3880         mutex_lock(&kvm->slots_lock);
3881
3882         /*
3883          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3884          */
3885         if (kvm_x86_ops->flush_log_dirty)
3886                 kvm_x86_ops->flush_log_dirty(kvm);
3887
3888         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3889
3890         /*
3891          * All the TLBs can be flushed out of mmu lock, see the comments in
3892          * kvm_mmu_slot_remove_write_access().
3893          */
3894         lockdep_assert_held(&kvm->slots_lock);
3895         if (is_dirty)
3896                 kvm_flush_remote_tlbs(kvm);
3897
3898         mutex_unlock(&kvm->slots_lock);
3899         return r;
3900 }
3901
3902 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3903                         bool line_status)
3904 {
3905         if (!irqchip_in_kernel(kvm))
3906                 return -ENXIO;
3907
3908         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3909                                         irq_event->irq, irq_event->level,
3910                                         line_status);
3911         return 0;
3912 }
3913
3914 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
3915                                    struct kvm_enable_cap *cap)
3916 {
3917         int r;
3918
3919         if (cap->flags)
3920                 return -EINVAL;
3921
3922         switch (cap->cap) {
3923         case KVM_CAP_DISABLE_QUIRKS:
3924                 kvm->arch.disabled_quirks = cap->args[0];
3925                 r = 0;
3926                 break;
3927         case KVM_CAP_SPLIT_IRQCHIP: {
3928                 mutex_lock(&kvm->lock);
3929                 r = -EINVAL;
3930                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
3931                         goto split_irqchip_unlock;
3932                 r = -EEXIST;
3933                 if (irqchip_in_kernel(kvm))
3934                         goto split_irqchip_unlock;
3935                 if (kvm->created_vcpus)
3936                         goto split_irqchip_unlock;
3937                 r = kvm_setup_empty_irq_routing(kvm);
3938                 if (r)
3939                         goto split_irqchip_unlock;
3940                 /* Pairs with irqchip_in_kernel. */
3941                 smp_wmb();
3942                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
3943                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
3944                 r = 0;
3945 split_irqchip_unlock:
3946                 mutex_unlock(&kvm->lock);
3947                 break;
3948         }
3949         case KVM_CAP_X2APIC_API:
3950                 r = -EINVAL;
3951                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
3952                         break;
3953
3954                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
3955                         kvm->arch.x2apic_format = true;
3956                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
3957                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
3958
3959                 r = 0;
3960                 break;
3961         default:
3962                 r = -EINVAL;
3963                 break;
3964         }
3965         return r;
3966 }
3967
3968 long kvm_arch_vm_ioctl(struct file *filp,
3969                        unsigned int ioctl, unsigned long arg)
3970 {
3971         struct kvm *kvm = filp->private_data;
3972         void __user *argp = (void __user *)arg;
3973         int r = -ENOTTY;
3974         /*
3975          * This union makes it completely explicit to gcc-3.x
3976          * that these two variables' stack usage should be
3977          * combined, not added together.
3978          */
3979         union {
3980                 struct kvm_pit_state ps;
3981                 struct kvm_pit_state2 ps2;
3982                 struct kvm_pit_config pit_config;
3983         } u;
3984
3985         switch (ioctl) {
3986         case KVM_SET_TSS_ADDR:
3987                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3988                 break;
3989         case KVM_SET_IDENTITY_MAP_ADDR: {
3990                 u64 ident_addr;
3991
3992                 r = -EFAULT;
3993                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3994                         goto out;
3995                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3996                 break;
3997         }
3998         case KVM_SET_NR_MMU_PAGES:
3999                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
4000                 break;
4001         case KVM_GET_NR_MMU_PAGES:
4002                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
4003                 break;
4004         case KVM_CREATE_IRQCHIP: {
4005                 mutex_lock(&kvm->lock);
4006
4007                 r = -EEXIST;
4008                 if (irqchip_in_kernel(kvm))
4009                         goto create_irqchip_unlock;
4010
4011                 r = -EINVAL;
4012                 if (kvm->created_vcpus)
4013                         goto create_irqchip_unlock;
4014
4015                 r = kvm_pic_init(kvm);
4016                 if (r)
4017                         goto create_irqchip_unlock;
4018
4019                 r = kvm_ioapic_init(kvm);
4020                 if (r) {
4021                         mutex_lock(&kvm->slots_lock);
4022                         kvm_pic_destroy(kvm);
4023                         mutex_unlock(&kvm->slots_lock);
4024                         goto create_irqchip_unlock;
4025                 }
4026
4027                 r = kvm_setup_default_irq_routing(kvm);
4028                 if (r) {
4029                         mutex_lock(&kvm->slots_lock);
4030                         mutex_lock(&kvm->irq_lock);
4031                         kvm_ioapic_destroy(kvm);
4032                         kvm_pic_destroy(kvm);
4033                         mutex_unlock(&kvm->irq_lock);
4034                         mutex_unlock(&kvm->slots_lock);
4035                         goto create_irqchip_unlock;
4036                 }
4037                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4038                 smp_wmb();
4039                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
4040         create_irqchip_unlock:
4041                 mutex_unlock(&kvm->lock);
4042                 break;
4043         }
4044         case KVM_CREATE_PIT:
4045                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
4046                 goto create_pit;
4047         case KVM_CREATE_PIT2:
4048                 r = -EFAULT;
4049                 if (copy_from_user(&u.pit_config, argp,
4050                                    sizeof(struct kvm_pit_config)))
4051                         goto out;
4052         create_pit:
4053                 mutex_lock(&kvm->lock);
4054                 r = -EEXIST;
4055                 if (kvm->arch.vpit)
4056                         goto create_pit_unlock;
4057                 r = -ENOMEM;
4058                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
4059                 if (kvm->arch.vpit)
4060                         r = 0;
4061         create_pit_unlock:
4062                 mutex_unlock(&kvm->lock);
4063                 break;
4064         case KVM_GET_IRQCHIP: {
4065                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4066                 struct kvm_irqchip *chip;
4067
4068                 chip = memdup_user(argp, sizeof(*chip));
4069                 if (IS_ERR(chip)) {
4070                         r = PTR_ERR(chip);
4071                         goto out;
4072                 }
4073
4074                 r = -ENXIO;
4075                 if (!irqchip_kernel(kvm))
4076                         goto get_irqchip_out;
4077                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
4078                 if (r)
4079                         goto get_irqchip_out;
4080                 r = -EFAULT;
4081                 if (copy_to_user(argp, chip, sizeof *chip))
4082                         goto get_irqchip_out;
4083                 r = 0;
4084         get_irqchip_out:
4085                 kfree(chip);
4086                 break;
4087         }
4088         case KVM_SET_IRQCHIP: {
4089                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4090                 struct kvm_irqchip *chip;
4091
4092                 chip = memdup_user(argp, sizeof(*chip));
4093                 if (IS_ERR(chip)) {
4094                         r = PTR_ERR(chip);
4095                         goto out;
4096                 }
4097
4098                 r = -ENXIO;
4099                 if (!irqchip_kernel(kvm))
4100                         goto set_irqchip_out;
4101                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4102                 if (r)
4103                         goto set_irqchip_out;
4104                 r = 0;
4105         set_irqchip_out:
4106                 kfree(chip);
4107                 break;
4108         }
4109         case KVM_GET_PIT: {
4110                 r = -EFAULT;
4111                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4112                         goto out;
4113                 r = -ENXIO;
4114                 if (!kvm->arch.vpit)
4115                         goto out;
4116                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4117                 if (r)
4118                         goto out;
4119                 r = -EFAULT;
4120                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4121                         goto out;
4122                 r = 0;
4123                 break;
4124         }
4125         case KVM_SET_PIT: {
4126                 r = -EFAULT;
4127                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
4128                         goto out;
4129                 r = -ENXIO;
4130                 if (!kvm->arch.vpit)
4131                         goto out;
4132                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4133                 break;
4134         }
4135         case KVM_GET_PIT2: {
4136                 r = -ENXIO;
4137                 if (!kvm->arch.vpit)
4138                         goto out;
4139                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4140                 if (r)
4141                         goto out;
4142                 r = -EFAULT;
4143                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4144                         goto out;
4145                 r = 0;
4146                 break;
4147         }
4148         case KVM_SET_PIT2: {
4149                 r = -EFAULT;
4150                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4151                         goto out;
4152                 r = -ENXIO;
4153                 if (!kvm->arch.vpit)
4154                         goto out;
4155                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4156                 break;
4157         }
4158         case KVM_REINJECT_CONTROL: {
4159                 struct kvm_reinject_control control;
4160                 r =  -EFAULT;
4161                 if (copy_from_user(&control, argp, sizeof(control)))
4162                         goto out;
4163                 r = kvm_vm_ioctl_reinject(kvm, &control);
4164                 break;
4165         }
4166         case KVM_SET_BOOT_CPU_ID:
4167                 r = 0;
4168                 mutex_lock(&kvm->lock);
4169                 if (kvm->created_vcpus)
4170                         r = -EBUSY;
4171                 else
4172                         kvm->arch.bsp_vcpu_id = arg;
4173                 mutex_unlock(&kvm->lock);
4174                 break;
4175         case KVM_XEN_HVM_CONFIG: {
4176                 r = -EFAULT;
4177                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
4178                                    sizeof(struct kvm_xen_hvm_config)))
4179                         goto out;
4180                 r = -EINVAL;
4181                 if (kvm->arch.xen_hvm_config.flags)
4182                         goto out;
4183                 r = 0;
4184                 break;
4185         }
4186         case KVM_SET_CLOCK: {
4187                 struct kvm_clock_data user_ns;
4188                 u64 now_ns;
4189
4190                 r = -EFAULT;
4191                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4192                         goto out;
4193
4194                 r = -EINVAL;
4195                 if (user_ns.flags)
4196                         goto out;
4197
4198                 r = 0;
4199                 local_irq_disable();
4200                 now_ns = __get_kvmclock_ns(kvm);
4201                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
4202                 local_irq_enable();
4203                 kvm_gen_update_masterclock(kvm);
4204                 break;
4205         }
4206         case KVM_GET_CLOCK: {
4207                 struct kvm_clock_data user_ns;
4208                 u64 now_ns;
4209
4210                 local_irq_disable();
4211                 now_ns = __get_kvmclock_ns(kvm);
4212                 user_ns.clock = now_ns;
4213                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
4214                 local_irq_enable();
4215                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4216
4217                 r = -EFAULT;
4218                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4219                         goto out;
4220                 r = 0;
4221                 break;
4222         }
4223         case KVM_ENABLE_CAP: {
4224                 struct kvm_enable_cap cap;
4225
4226                 r = -EFAULT;
4227                 if (copy_from_user(&cap, argp, sizeof(cap)))
4228                         goto out;
4229                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
4230                 break;
4231         }
4232         default:
4233                 r = kvm_vm_ioctl_assigned_device(kvm, ioctl, arg);
4234         }
4235 out:
4236         return r;
4237 }
4238
4239 static void kvm_init_msr_list(void)
4240 {
4241         u32 dummy[2];
4242         unsigned i, j;
4243
4244         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4245                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4246                         continue;
4247
4248                 /*
4249                  * Even MSRs that are valid in the host may not be exposed
4250                  * to the guests in some cases.
4251                  */
4252                 switch (msrs_to_save[i]) {
4253                 case MSR_IA32_BNDCFGS:
4254                         if (!kvm_x86_ops->mpx_supported())
4255                                 continue;
4256                         break;
4257                 case MSR_TSC_AUX:
4258                         if (!kvm_x86_ops->rdtscp_supported())
4259                                 continue;
4260                         break;
4261                 default:
4262                         break;
4263                 }
4264
4265                 if (j < i)
4266                         msrs_to_save[j] = msrs_to_save[i];
4267                 j++;
4268         }
4269         num_msrs_to_save = j;
4270
4271         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4272                 switch (emulated_msrs[i]) {
4273                 case MSR_IA32_SMBASE:
4274                         if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
4275                                 continue;
4276                         break;
4277                 default:
4278                         break;
4279                 }
4280
4281                 if (j < i)
4282                         emulated_msrs[j] = emulated_msrs[i];
4283                 j++;
4284         }
4285         num_emulated_msrs = j;
4286 }
4287
4288 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4289                            const void *v)
4290 {
4291         int handled = 0;
4292         int n;
4293
4294         do {
4295                 n = min(len, 8);
4296                 if (!(lapic_in_kernel(vcpu) &&
4297                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4298                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4299                         break;
4300                 handled += n;
4301                 addr += n;
4302                 len -= n;
4303                 v += n;
4304         } while (len);
4305
4306         return handled;
4307 }
4308
4309 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4310 {
4311         int handled = 0;
4312         int n;
4313
4314         do {
4315                 n = min(len, 8);
4316                 if (!(lapic_in_kernel(vcpu) &&
4317                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4318                                          addr, n, v))
4319                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4320                         break;
4321                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
4322                 handled += n;
4323                 addr += n;
4324                 len -= n;
4325                 v += n;
4326         } while (len);
4327
4328         return handled;
4329 }
4330
4331 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4332                         struct kvm_segment *var, int seg)
4333 {
4334         kvm_x86_ops->set_segment(vcpu, var, seg);
4335 }
4336
4337 void kvm_get_segment(struct kvm_vcpu *vcpu,
4338                      struct kvm_segment *var, int seg)
4339 {
4340         kvm_x86_ops->get_segment(vcpu, var, seg);
4341 }
4342
4343 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4344                            struct x86_exception *exception)
4345 {
4346         gpa_t t_gpa;
4347
4348         BUG_ON(!mmu_is_nested(vcpu));
4349
4350         /* NPT walks are always user-walks */
4351         access |= PFERR_USER_MASK;
4352         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4353
4354         return t_gpa;
4355 }
4356
4357 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4358                               struct x86_exception *exception)
4359 {
4360         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4361         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4362 }
4363
4364  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4365                                 struct x86_exception *exception)
4366 {
4367         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4368         access |= PFERR_FETCH_MASK;
4369         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4370 }
4371
4372 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4373                                struct x86_exception *exception)
4374 {
4375         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4376         access |= PFERR_WRITE_MASK;
4377         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4378 }
4379
4380 /* uses this to access any guest's mapped memory without checking CPL */
4381 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4382                                 struct x86_exception *exception)
4383 {
4384         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4385 }
4386
4387 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4388                                       struct kvm_vcpu *vcpu, u32 access,
4389                                       struct x86_exception *exception)
4390 {
4391         void *data = val;
4392         int r = X86EMUL_CONTINUE;
4393
4394         while (bytes) {
4395                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4396                                                             exception);
4397                 unsigned offset = addr & (PAGE_SIZE-1);
4398                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4399                 int ret;
4400
4401                 if (gpa == UNMAPPED_GVA)
4402                         return X86EMUL_PROPAGATE_FAULT;
4403                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4404                                                offset, toread);
4405                 if (ret < 0) {
4406                         r = X86EMUL_IO_NEEDED;
4407                         goto out;
4408                 }
4409
4410                 bytes -= toread;
4411                 data += toread;
4412                 addr += toread;
4413         }
4414 out:
4415         return r;
4416 }
4417
4418 /* used for instruction fetching */
4419 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4420                                 gva_t addr, void *val, unsigned int bytes,
4421                                 struct x86_exception *exception)
4422 {
4423         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4424         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4425         unsigned offset;
4426         int ret;
4427
4428         /* Inline kvm_read_guest_virt_helper for speed.  */
4429         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4430                                                     exception);
4431         if (unlikely(gpa == UNMAPPED_GVA))
4432                 return X86EMUL_PROPAGATE_FAULT;
4433
4434         offset = addr & (PAGE_SIZE-1);
4435         if (WARN_ON(offset + bytes > PAGE_SIZE))
4436                 bytes = (unsigned)PAGE_SIZE - offset;
4437         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4438                                        offset, bytes);
4439         if (unlikely(ret < 0))
4440                 return X86EMUL_IO_NEEDED;
4441
4442         return X86EMUL_CONTINUE;
4443 }
4444
4445 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4446                                gva_t addr, void *val, unsigned int bytes,
4447                                struct x86_exception *exception)
4448 {
4449         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4450         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4451
4452         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4453                                           exception);
4454 }
4455 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4456
4457 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4458                                       gva_t addr, void *val, unsigned int bytes,
4459                                       struct x86_exception *exception)
4460 {
4461         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4462         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4463 }
4464
4465 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
4466                 unsigned long addr, void *val, unsigned int bytes)
4467 {
4468         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4469         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
4470
4471         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
4472 }
4473
4474 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4475                                        gva_t addr, void *val,
4476                                        unsigned int bytes,
4477                                        struct x86_exception *exception)
4478 {
4479         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4480         void *data = val;
4481         int r = X86EMUL_CONTINUE;
4482
4483         while (bytes) {
4484                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4485                                                              PFERR_WRITE_MASK,
4486                                                              exception);
4487                 unsigned offset = addr & (PAGE_SIZE-1);
4488                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4489                 int ret;
4490
4491                 if (gpa == UNMAPPED_GVA)
4492                         return X86EMUL_PROPAGATE_FAULT;
4493                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4494                 if (ret < 0) {
4495                         r = X86EMUL_IO_NEEDED;
4496                         goto out;
4497                 }
4498
4499                 bytes -= towrite;
4500                 data += towrite;
4501                 addr += towrite;
4502         }
4503 out:
4504         return r;
4505 }
4506 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4507
4508 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4509                             gpa_t gpa, bool write)
4510 {
4511         /* For APIC access vmexit */
4512         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4513                 return 1;
4514
4515         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
4516                 trace_vcpu_match_mmio(gva, gpa, write, true);
4517                 return 1;
4518         }
4519
4520         return 0;
4521 }
4522
4523 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4524                                 gpa_t *gpa, struct x86_exception *exception,
4525                                 bool write)
4526 {
4527         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4528                 | (write ? PFERR_WRITE_MASK : 0);
4529
4530         /*
4531          * currently PKRU is only applied to ept enabled guest so
4532          * there is no pkey in EPT page table for L1 guest or EPT
4533          * shadow page table for L2 guest.
4534          */
4535         if (vcpu_match_mmio_gva(vcpu, gva)
4536             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4537                                  vcpu->arch.access, 0, access)) {
4538                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4539                                         (gva & (PAGE_SIZE - 1));
4540                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4541                 return 1;
4542         }
4543
4544         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4545
4546         if (*gpa == UNMAPPED_GVA)
4547                 return -1;
4548
4549         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
4550 }
4551
4552 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4553                         const void *val, int bytes)
4554 {
4555         int ret;
4556
4557         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4558         if (ret < 0)
4559                 return 0;
4560         kvm_page_track_write(vcpu, gpa, val, bytes);
4561         return 1;
4562 }
4563
4564 struct read_write_emulator_ops {
4565         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4566                                   int bytes);
4567         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4568                                   void *val, int bytes);
4569         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4570                                int bytes, void *val);
4571         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4572                                     void *val, int bytes);
4573         bool write;
4574 };
4575
4576 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4577 {
4578         if (vcpu->mmio_read_completed) {
4579                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4580                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4581                 vcpu->mmio_read_completed = 0;
4582                 return 1;
4583         }
4584
4585         return 0;
4586 }
4587
4588 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4589                         void *val, int bytes)
4590 {
4591         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4592 }
4593
4594 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4595                          void *val, int bytes)
4596 {
4597         return emulator_write_phys(vcpu, gpa, val, bytes);
4598 }
4599
4600 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4601 {
4602         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4603         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4604 }
4605
4606 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4607                           void *val, int bytes)
4608 {
4609         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4610         return X86EMUL_IO_NEEDED;
4611 }
4612
4613 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4614                            void *val, int bytes)
4615 {
4616         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4617
4618         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4619         return X86EMUL_CONTINUE;
4620 }
4621
4622 static const struct read_write_emulator_ops read_emultor = {
4623         .read_write_prepare = read_prepare,
4624         .read_write_emulate = read_emulate,
4625         .read_write_mmio = vcpu_mmio_read,
4626         .read_write_exit_mmio = read_exit_mmio,
4627 };
4628
4629 static const struct read_write_emulator_ops write_emultor = {
4630         .read_write_emulate = write_emulate,
4631         .read_write_mmio = write_mmio,
4632         .read_write_exit_mmio = write_exit_mmio,
4633         .write = true,
4634 };
4635
4636 static int emulator_read_write_onepage(unsigned long addr, void *val,
4637                                        unsigned int bytes,
4638                                        struct x86_exception *exception,
4639                                        struct kvm_vcpu *vcpu,
4640                                        const struct read_write_emulator_ops *ops)
4641 {
4642         gpa_t gpa;
4643         int handled, ret;
4644         bool write = ops->write;
4645         struct kvm_mmio_fragment *frag;
4646         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4647
4648         /*
4649          * If the exit was due to a NPF we may already have a GPA.
4650          * If the GPA is present, use it to avoid the GVA to GPA table walk.
4651          * Note, this cannot be used on string operations since string
4652          * operation using rep will only have the initial GPA from the NPF
4653          * occurred.
4654          */
4655         if (vcpu->arch.gpa_available &&
4656             emulator_can_use_gpa(ctxt) &&
4657             vcpu_is_mmio_gpa(vcpu, addr, exception->address, write) &&
4658             (addr & ~PAGE_MASK) == (exception->address & ~PAGE_MASK)) {
4659                 gpa = exception->address;
4660                 goto mmio;
4661         }
4662
4663         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4664
4665         if (ret < 0)
4666                 return X86EMUL_PROPAGATE_FAULT;
4667
4668         /* For APIC access vmexit */
4669         if (ret)
4670                 goto mmio;
4671
4672         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4673                 return X86EMUL_CONTINUE;
4674
4675 mmio:
4676         /*
4677          * Is this MMIO handled locally?
4678          */
4679         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4680         if (handled == bytes)
4681                 return X86EMUL_CONTINUE;
4682
4683         gpa += handled;
4684         bytes -= handled;
4685         val += handled;
4686
4687         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4688         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4689         frag->gpa = gpa;
4690         frag->data = val;
4691         frag->len = bytes;
4692         return X86EMUL_CONTINUE;
4693 }
4694
4695 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4696                         unsigned long addr,
4697                         void *val, unsigned int bytes,
4698                         struct x86_exception *exception,
4699                         const struct read_write_emulator_ops *ops)
4700 {
4701         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4702         gpa_t gpa;
4703         int rc;
4704
4705         if (ops->read_write_prepare &&
4706                   ops->read_write_prepare(vcpu, val, bytes))
4707                 return X86EMUL_CONTINUE;
4708
4709         vcpu->mmio_nr_fragments = 0;
4710
4711         /* Crossing a page boundary? */
4712         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4713                 int now;
4714
4715                 now = -addr & ~PAGE_MASK;
4716                 rc = emulator_read_write_onepage(addr, val, now, exception,
4717                                                  vcpu, ops);
4718
4719                 if (rc != X86EMUL_CONTINUE)
4720                         return rc;
4721                 addr += now;
4722                 if (ctxt->mode != X86EMUL_MODE_PROT64)
4723                         addr = (u32)addr;
4724                 val += now;
4725                 bytes -= now;
4726         }
4727
4728         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4729                                          vcpu, ops);
4730         if (rc != X86EMUL_CONTINUE)
4731                 return rc;
4732
4733         if (!vcpu->mmio_nr_fragments)
4734                 return rc;
4735
4736         gpa = vcpu->mmio_fragments[0].gpa;
4737
4738         vcpu->mmio_needed = 1;
4739         vcpu->mmio_cur_fragment = 0;
4740
4741         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4742         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4743         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4744         vcpu->run->mmio.phys_addr = gpa;
4745
4746         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4747 }
4748
4749 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4750                                   unsigned long addr,
4751                                   void *val,
4752                                   unsigned int bytes,
4753                                   struct x86_exception *exception)
4754 {
4755         return emulator_read_write(ctxt, addr, val, bytes,
4756                                    exception, &read_emultor);
4757 }
4758
4759 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4760                             unsigned long addr,
4761                             const void *val,
4762                             unsigned int bytes,
4763                             struct x86_exception *exception)
4764 {
4765         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4766                                    exception, &write_emultor);
4767 }
4768
4769 #define CMPXCHG_TYPE(t, ptr, old, new) \
4770         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4771
4772 #ifdef CONFIG_X86_64
4773 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4774 #else
4775 #  define CMPXCHG64(ptr, old, new) \
4776         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4777 #endif
4778
4779 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4780                                      unsigned long addr,
4781                                      const void *old,
4782                                      const void *new,
4783                                      unsigned int bytes,
4784                                      struct x86_exception *exception)
4785 {
4786         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4787         gpa_t gpa;
4788         struct page *page;
4789         char *kaddr;
4790         bool exchanged;
4791
4792         /* guests cmpxchg8b have to be emulated atomically */
4793         if (bytes > 8 || (bytes & (bytes - 1)))
4794                 goto emul_write;
4795
4796         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4797
4798         if (gpa == UNMAPPED_GVA ||
4799             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4800                 goto emul_write;
4801
4802         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4803                 goto emul_write;
4804
4805         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4806         if (is_error_page(page))
4807                 goto emul_write;
4808
4809         kaddr = kmap_atomic(page);
4810         kaddr += offset_in_page(gpa);
4811         switch (bytes) {
4812         case 1:
4813                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4814                 break;
4815         case 2:
4816                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4817                 break;
4818         case 4:
4819                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4820                 break;
4821         case 8:
4822                 exchanged = CMPXCHG64(kaddr, old, new);
4823                 break;
4824         default:
4825                 BUG();
4826         }
4827         kunmap_atomic(kaddr);
4828         kvm_release_page_dirty(page);
4829
4830         if (!exchanged)
4831                 return X86EMUL_CMPXCHG_FAILED;
4832
4833         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
4834         kvm_page_track_write(vcpu, gpa, new, bytes);
4835
4836         return X86EMUL_CONTINUE;
4837
4838 emul_write:
4839         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4840
4841         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4842 }
4843
4844 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4845 {
4846         /* TODO: String I/O for in kernel device */
4847         int r;
4848
4849         if (vcpu->arch.pio.in)
4850                 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4851                                     vcpu->arch.pio.size, pd);
4852         else
4853                 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4854                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4855                                      pd);
4856         return r;
4857 }
4858
4859 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4860                                unsigned short port, void *val,
4861                                unsigned int count, bool in)
4862 {
4863         vcpu->arch.pio.port = port;
4864         vcpu->arch.pio.in = in;
4865         vcpu->arch.pio.count  = count;
4866         vcpu->arch.pio.size = size;
4867
4868         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4869                 vcpu->arch.pio.count = 0;
4870                 return 1;
4871         }
4872
4873         vcpu->run->exit_reason = KVM_EXIT_IO;
4874         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4875         vcpu->run->io.size = size;
4876         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4877         vcpu->run->io.count = count;
4878         vcpu->run->io.port = port;
4879
4880         return 0;
4881 }
4882
4883 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4884                                     int size, unsigned short port, void *val,
4885                                     unsigned int count)
4886 {
4887         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4888         int ret;
4889
4890         if (vcpu->arch.pio.count)
4891                 goto data_avail;
4892
4893         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4894         if (ret) {
4895 data_avail:
4896                 memcpy(val, vcpu->arch.pio_data, size * count);
4897                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4898                 vcpu->arch.pio.count = 0;
4899                 return 1;
4900         }
4901
4902         return 0;
4903 }
4904
4905 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4906                                      int size, unsigned short port,
4907                                      const void *val, unsigned int count)
4908 {
4909         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4910
4911         memcpy(vcpu->arch.pio_data, val, size * count);
4912         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4913         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4914 }
4915
4916 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4917 {
4918         return kvm_x86_ops->get_segment_base(vcpu, seg);
4919 }
4920
4921 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4922 {
4923         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4924 }
4925
4926 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4927 {
4928         if (!need_emulate_wbinvd(vcpu))
4929                 return X86EMUL_CONTINUE;
4930
4931         if (kvm_x86_ops->has_wbinvd_exit()) {
4932                 int cpu = get_cpu();
4933
4934                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4935                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4936                                 wbinvd_ipi, NULL, 1);
4937                 put_cpu();
4938                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4939         } else
4940                 wbinvd();
4941         return X86EMUL_CONTINUE;
4942 }
4943
4944 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4945 {
4946         kvm_emulate_wbinvd_noskip(vcpu);
4947         return kvm_skip_emulated_instruction(vcpu);
4948 }
4949 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4950
4951
4952
4953 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4954 {
4955         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
4956 }
4957
4958 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
4959                            unsigned long *dest)
4960 {
4961         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4962 }
4963
4964 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
4965                            unsigned long value)
4966 {
4967
4968         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4969 }
4970
4971 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4972 {
4973         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4974 }
4975
4976 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4977 {
4978         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4979         unsigned long value;
4980
4981         switch (cr) {
4982         case 0:
4983                 value = kvm_read_cr0(vcpu);
4984                 break;
4985         case 2:
4986                 value = vcpu->arch.cr2;
4987                 break;
4988         case 3:
4989                 value = kvm_read_cr3(vcpu);
4990                 break;
4991         case 4:
4992                 value = kvm_read_cr4(vcpu);
4993                 break;
4994         case 8:
4995                 value = kvm_get_cr8(vcpu);
4996                 break;
4997         default:
4998                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4999                 return 0;
5000         }
5001
5002         return value;
5003 }
5004
5005 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
5006 {
5007         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5008         int res = 0;
5009
5010         switch (cr) {
5011         case 0:
5012                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
5013                 break;
5014         case 2:
5015                 vcpu->arch.cr2 = val;
5016                 break;
5017         case 3:
5018                 res = kvm_set_cr3(vcpu, val);
5019                 break;
5020         case 4:
5021                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
5022                 break;
5023         case 8:
5024                 res = kvm_set_cr8(vcpu, val);
5025                 break;
5026         default:
5027                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5028                 res = -1;
5029         }
5030
5031         return res;
5032 }
5033
5034 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
5035 {
5036         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
5037 }
5038
5039 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5040 {
5041         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
5042 }
5043
5044 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5045 {
5046         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
5047 }
5048
5049 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5050 {
5051         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
5052 }
5053
5054 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5055 {
5056         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
5057 }
5058
5059 static unsigned long emulator_get_cached_segment_base(
5060         struct x86_emulate_ctxt *ctxt, int seg)
5061 {
5062         return get_segment_base(emul_to_vcpu(ctxt), seg);
5063 }
5064
5065 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
5066                                  struct desc_struct *desc, u32 *base3,
5067                                  int seg)
5068 {
5069         struct kvm_segment var;
5070
5071         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
5072         *selector = var.selector;
5073
5074         if (var.unusable) {
5075                 memset(desc, 0, sizeof(*desc));
5076                 return false;
5077         }
5078
5079         if (var.g)
5080                 var.limit >>= 12;
5081         set_desc_limit(desc, var.limit);
5082         set_desc_base(desc, (unsigned long)var.base);
5083 #ifdef CONFIG_X86_64
5084         if (base3)
5085                 *base3 = var.base >> 32;
5086 #endif
5087         desc->type = var.type;
5088         desc->s = var.s;
5089         desc->dpl = var.dpl;
5090         desc->p = var.present;
5091         desc->avl = var.avl;
5092         desc->l = var.l;
5093         desc->d = var.db;
5094         desc->g = var.g;
5095
5096         return true;
5097 }
5098
5099 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
5100                                  struct desc_struct *desc, u32 base3,
5101                                  int seg)
5102 {
5103         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5104         struct kvm_segment var;
5105
5106         var.selector = selector;
5107         var.base = get_desc_base(desc);
5108 #ifdef CONFIG_X86_64
5109         var.base |= ((u64)base3) << 32;
5110 #endif
5111         var.limit = get_desc_limit(desc);
5112         if (desc->g)
5113                 var.limit = (var.limit << 12) | 0xfff;
5114         var.type = desc->type;
5115         var.dpl = desc->dpl;
5116         var.db = desc->d;
5117         var.s = desc->s;
5118         var.l = desc->l;
5119         var.g = desc->g;
5120         var.avl = desc->avl;
5121         var.present = desc->p;
5122         var.unusable = !var.present;
5123         var.padding = 0;
5124
5125         kvm_set_segment(vcpu, &var, seg);
5126         return;
5127 }
5128
5129 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
5130                             u32 msr_index, u64 *pdata)
5131 {
5132         struct msr_data msr;
5133         int r;
5134
5135         msr.index = msr_index;
5136         msr.host_initiated = false;
5137         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
5138         if (r)
5139                 return r;
5140
5141         *pdata = msr.data;
5142         return 0;
5143 }
5144
5145 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
5146                             u32 msr_index, u64 data)
5147 {
5148         struct msr_data msr;
5149
5150         msr.data = data;
5151         msr.index = msr_index;
5152         msr.host_initiated = false;
5153         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
5154 }
5155
5156 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
5157 {
5158         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5159
5160         return vcpu->arch.smbase;
5161 }
5162
5163 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
5164 {
5165         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5166
5167         vcpu->arch.smbase = smbase;
5168 }
5169
5170 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
5171                               u32 pmc)
5172 {
5173         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
5174 }
5175
5176 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
5177                              u32 pmc, u64 *pdata)
5178 {
5179         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
5180 }
5181
5182 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
5183 {
5184         emul_to_vcpu(ctxt)->arch.halt_request = 1;
5185 }
5186
5187 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
5188 {
5189         preempt_disable();
5190         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
5191 }
5192
5193 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
5194 {
5195         preempt_enable();
5196 }
5197
5198 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
5199                               struct x86_instruction_info *info,
5200                               enum x86_intercept_stage stage)
5201 {
5202         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
5203 }
5204
5205 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
5206                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
5207 {
5208         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
5209 }
5210
5211 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
5212 {
5213         return kvm_register_read(emul_to_vcpu(ctxt), reg);
5214 }
5215
5216 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
5217 {
5218         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
5219 }
5220
5221 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
5222 {
5223         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
5224 }
5225
5226 static const struct x86_emulate_ops emulate_ops = {
5227         .read_gpr            = emulator_read_gpr,
5228         .write_gpr           = emulator_write_gpr,
5229         .read_std            = kvm_read_guest_virt_system,
5230         .write_std           = kvm_write_guest_virt_system,
5231         .read_phys           = kvm_read_guest_phys_system,
5232         .fetch               = kvm_fetch_guest_virt,
5233         .read_emulated       = emulator_read_emulated,
5234         .write_emulated      = emulator_write_emulated,
5235         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
5236         .invlpg              = emulator_invlpg,
5237         .pio_in_emulated     = emulator_pio_in_emulated,
5238         .pio_out_emulated    = emulator_pio_out_emulated,
5239         .get_segment         = emulator_get_segment,
5240         .set_segment         = emulator_set_segment,
5241         .get_cached_segment_base = emulator_get_cached_segment_base,
5242         .get_gdt             = emulator_get_gdt,
5243         .get_idt             = emulator_get_idt,
5244         .set_gdt             = emulator_set_gdt,
5245         .set_idt             = emulator_set_idt,
5246         .get_cr              = emulator_get_cr,
5247         .set_cr              = emulator_set_cr,
5248         .cpl                 = emulator_get_cpl,
5249         .get_dr              = emulator_get_dr,
5250         .set_dr              = emulator_set_dr,
5251         .get_smbase          = emulator_get_smbase,
5252         .set_smbase          = emulator_set_smbase,
5253         .set_msr             = emulator_set_msr,
5254         .get_msr             = emulator_get_msr,
5255         .check_pmc           = emulator_check_pmc,
5256         .read_pmc            = emulator_read_pmc,
5257         .halt                = emulator_halt,
5258         .wbinvd              = emulator_wbinvd,
5259         .fix_hypercall       = emulator_fix_hypercall,
5260         .get_fpu             = emulator_get_fpu,
5261         .put_fpu             = emulator_put_fpu,
5262         .intercept           = emulator_intercept,
5263         .get_cpuid           = emulator_get_cpuid,
5264         .set_nmi_mask        = emulator_set_nmi_mask,
5265 };
5266
5267 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5268 {
5269         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5270         /*
5271          * an sti; sti; sequence only disable interrupts for the first
5272          * instruction. So, if the last instruction, be it emulated or
5273          * not, left the system with the INT_STI flag enabled, it
5274          * means that the last instruction is an sti. We should not
5275          * leave the flag on in this case. The same goes for mov ss
5276          */
5277         if (int_shadow & mask)
5278                 mask = 0;
5279         if (unlikely(int_shadow || mask)) {
5280                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5281                 if (!mask)
5282                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5283         }
5284 }
5285
5286 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5287 {
5288         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5289         if (ctxt->exception.vector == PF_VECTOR)
5290                 return kvm_propagate_fault(vcpu, &ctxt->exception);
5291
5292         if (ctxt->exception.error_code_valid)
5293                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5294                                       ctxt->exception.error_code);
5295         else
5296                 kvm_queue_exception(vcpu, ctxt->exception.vector);
5297         return false;
5298 }
5299
5300 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5301 {
5302         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5303         int cs_db, cs_l;
5304
5305         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5306
5307         ctxt->eflags = kvm_get_rflags(vcpu);
5308         ctxt->eip = kvm_rip_read(vcpu);
5309         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5310                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5311                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5312                      cs_db                              ? X86EMUL_MODE_PROT32 :
5313                                                           X86EMUL_MODE_PROT16;
5314         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5315         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5316         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5317         ctxt->emul_flags = vcpu->arch.hflags;
5318
5319         init_decode_cache(ctxt);
5320         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5321 }
5322
5323 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5324 {
5325         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5326         int ret;
5327
5328         init_emulate_ctxt(vcpu);
5329
5330         ctxt->op_bytes = 2;
5331         ctxt->ad_bytes = 2;
5332         ctxt->_eip = ctxt->eip + inc_eip;
5333         ret = emulate_int_real(ctxt, irq);
5334
5335         if (ret != X86EMUL_CONTINUE)
5336                 return EMULATE_FAIL;
5337
5338         ctxt->eip = ctxt->_eip;
5339         kvm_rip_write(vcpu, ctxt->eip);
5340         kvm_set_rflags(vcpu, ctxt->eflags);
5341
5342         if (irq == NMI_VECTOR)
5343                 vcpu->arch.nmi_pending = 0;
5344         else
5345                 vcpu->arch.interrupt.pending = false;
5346
5347         return EMULATE_DONE;
5348 }
5349 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5350
5351 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
5352 {
5353         int r = EMULATE_DONE;
5354
5355         ++vcpu->stat.insn_emulation_fail;
5356         trace_kvm_emulate_insn_failed(vcpu);
5357         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5358                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5359                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5360                 vcpu->run->internal.ndata = 0;
5361                 r = EMULATE_FAIL;
5362         }
5363         kvm_queue_exception(vcpu, UD_VECTOR);
5364
5365         return r;
5366 }
5367
5368 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5369                                   bool write_fault_to_shadow_pgtable,
5370                                   int emulation_type)
5371 {
5372         gpa_t gpa = cr2;
5373         kvm_pfn_t pfn;
5374
5375         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5376                 return false;
5377
5378         if (!vcpu->arch.mmu.direct_map) {
5379                 /*
5380                  * Write permission should be allowed since only
5381                  * write access need to be emulated.
5382                  */
5383                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5384
5385                 /*
5386                  * If the mapping is invalid in guest, let cpu retry
5387                  * it to generate fault.
5388                  */
5389                 if (gpa == UNMAPPED_GVA)
5390                         return true;
5391         }
5392
5393         /*
5394          * Do not retry the unhandleable instruction if it faults on the
5395          * readonly host memory, otherwise it will goto a infinite loop:
5396          * retry instruction -> write #PF -> emulation fail -> retry
5397          * instruction -> ...
5398          */
5399         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5400
5401         /*
5402          * If the instruction failed on the error pfn, it can not be fixed,
5403          * report the error to userspace.
5404          */
5405         if (is_error_noslot_pfn(pfn))
5406                 return false;
5407
5408         kvm_release_pfn_clean(pfn);
5409
5410         /* The instructions are well-emulated on direct mmu. */
5411         if (vcpu->arch.mmu.direct_map) {
5412                 unsigned int indirect_shadow_pages;
5413
5414                 spin_lock(&vcpu->kvm->mmu_lock);
5415                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5416                 spin_unlock(&vcpu->kvm->mmu_lock);
5417
5418                 if (indirect_shadow_pages)
5419                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5420
5421                 return true;
5422         }
5423
5424         /*
5425          * if emulation was due to access to shadowed page table
5426          * and it failed try to unshadow page and re-enter the
5427          * guest to let CPU execute the instruction.
5428          */
5429         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5430
5431         /*
5432          * If the access faults on its page table, it can not
5433          * be fixed by unprotecting shadow page and it should
5434          * be reported to userspace.
5435          */
5436         return !write_fault_to_shadow_pgtable;
5437 }
5438
5439 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5440                               unsigned long cr2,  int emulation_type)
5441 {
5442         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5443         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5444
5445         last_retry_eip = vcpu->arch.last_retry_eip;
5446         last_retry_addr = vcpu->arch.last_retry_addr;
5447
5448         /*
5449          * If the emulation is caused by #PF and it is non-page_table
5450          * writing instruction, it means the VM-EXIT is caused by shadow
5451          * page protected, we can zap the shadow page and retry this
5452          * instruction directly.
5453          *
5454          * Note: if the guest uses a non-page-table modifying instruction
5455          * on the PDE that points to the instruction, then we will unmap
5456          * the instruction and go to an infinite loop. So, we cache the
5457          * last retried eip and the last fault address, if we meet the eip
5458          * and the address again, we can break out of the potential infinite
5459          * loop.
5460          */
5461         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5462
5463         if (!(emulation_type & EMULTYPE_RETRY))
5464                 return false;
5465
5466         if (x86_page_table_writing_insn(ctxt))
5467                 return false;
5468
5469         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5470                 return false;
5471
5472         vcpu->arch.last_retry_eip = ctxt->eip;
5473         vcpu->arch.last_retry_addr = cr2;
5474
5475         if (!vcpu->arch.mmu.direct_map)
5476                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5477
5478         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5479
5480         return true;
5481 }
5482
5483 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5484 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5485
5486 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5487 {
5488         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5489                 /* This is a good place to trace that we are exiting SMM.  */
5490                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5491
5492                 /* Process a latched INIT or SMI, if any.  */
5493                 kvm_make_request(KVM_REQ_EVENT, vcpu);
5494         }
5495
5496         kvm_mmu_reset_context(vcpu);
5497 }
5498
5499 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5500 {
5501         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5502
5503         vcpu->arch.hflags = emul_flags;
5504
5505         if (changed & HF_SMM_MASK)
5506                 kvm_smm_changed(vcpu);
5507 }
5508
5509 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5510                                 unsigned long *db)
5511 {
5512         u32 dr6 = 0;
5513         int i;
5514         u32 enable, rwlen;
5515
5516         enable = dr7;
5517         rwlen = dr7 >> 16;
5518         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5519                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5520                         dr6 |= (1 << i);
5521         return dr6;
5522 }
5523
5524 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, unsigned long rflags, int *r)
5525 {
5526         struct kvm_run *kvm_run = vcpu->run;
5527
5528         /*
5529          * rflags is the old, "raw" value of the flags.  The new value has
5530          * not been saved yet.
5531          *
5532          * This is correct even for TF set by the guest, because "the
5533          * processor will not generate this exception after the instruction
5534          * that sets the TF flag".
5535          */
5536         if (unlikely(rflags & X86_EFLAGS_TF)) {
5537                 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5538                         kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 |
5539                                                   DR6_RTM;
5540                         kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5541                         kvm_run->debug.arch.exception = DB_VECTOR;
5542                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5543                         *r = EMULATE_USER_EXIT;
5544                 } else {
5545                         /*
5546                          * "Certain debug exceptions may clear bit 0-3.  The
5547                          * remaining contents of the DR6 register are never
5548                          * cleared by the processor".
5549                          */
5550                         vcpu->arch.dr6 &= ~15;
5551                         vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5552                         kvm_queue_exception(vcpu, DB_VECTOR);
5553                 }
5554         }
5555 }
5556
5557 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
5558 {
5559         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5560         int r = EMULATE_DONE;
5561
5562         kvm_x86_ops->skip_emulated_instruction(vcpu);
5563         kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5564         return r == EMULATE_DONE;
5565 }
5566 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
5567
5568 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5569 {
5570         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5571             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5572                 struct kvm_run *kvm_run = vcpu->run;
5573                 unsigned long eip = kvm_get_linear_rip(vcpu);
5574                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5575                                            vcpu->arch.guest_debug_dr7,
5576                                            vcpu->arch.eff_db);
5577
5578                 if (dr6 != 0) {
5579                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5580                         kvm_run->debug.arch.pc = eip;
5581                         kvm_run->debug.arch.exception = DB_VECTOR;
5582                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5583                         *r = EMULATE_USER_EXIT;
5584                         return true;
5585                 }
5586         }
5587
5588         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5589             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5590                 unsigned long eip = kvm_get_linear_rip(vcpu);
5591                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5592                                            vcpu->arch.dr7,
5593                                            vcpu->arch.db);
5594
5595                 if (dr6 != 0) {
5596                         vcpu->arch.dr6 &= ~15;
5597                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5598                         kvm_queue_exception(vcpu, DB_VECTOR);
5599                         *r = EMULATE_DONE;
5600                         return true;
5601                 }
5602         }
5603
5604         return false;
5605 }
5606
5607 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5608                             unsigned long cr2,
5609                             int emulation_type,
5610                             void *insn,
5611                             int insn_len)
5612 {
5613         int r;
5614         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5615         bool writeback = true;
5616         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5617
5618         /*
5619          * Clear write_fault_to_shadow_pgtable here to ensure it is
5620          * never reused.
5621          */
5622         vcpu->arch.write_fault_to_shadow_pgtable = false;
5623         kvm_clear_exception_queue(vcpu);
5624
5625         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5626                 init_emulate_ctxt(vcpu);
5627
5628                 /*
5629                  * We will reenter on the same instruction since
5630                  * we do not set complete_userspace_io.  This does not
5631                  * handle watchpoints yet, those would be handled in
5632                  * the emulate_ops.
5633                  */
5634                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5635                         return r;
5636
5637                 ctxt->interruptibility = 0;
5638                 ctxt->have_exception = false;
5639                 ctxt->exception.vector = -1;
5640                 ctxt->perm_ok = false;
5641
5642                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5643
5644                 r = x86_decode_insn(ctxt, insn, insn_len);
5645
5646                 trace_kvm_emulate_insn_start(vcpu);
5647                 ++vcpu->stat.insn_emulation;
5648                 if (r != EMULATION_OK)  {
5649                         if (emulation_type & EMULTYPE_TRAP_UD)
5650                                 return EMULATE_FAIL;
5651                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5652                                                 emulation_type))
5653                                 return EMULATE_DONE;
5654                         if (emulation_type & EMULTYPE_SKIP)
5655                                 return EMULATE_FAIL;
5656                         return handle_emulation_failure(vcpu);
5657                 }
5658         }
5659
5660         if (emulation_type & EMULTYPE_SKIP) {
5661                 kvm_rip_write(vcpu, ctxt->_eip);
5662                 if (ctxt->eflags & X86_EFLAGS_RF)
5663                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5664                 return EMULATE_DONE;
5665         }
5666
5667         if (retry_instruction(ctxt, cr2, emulation_type))
5668                 return EMULATE_DONE;
5669
5670         /* this is needed for vmware backdoor interface to work since it
5671            changes registers values  during IO operation */
5672         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5673                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5674                 emulator_invalidate_register_cache(ctxt);
5675         }
5676
5677 restart:
5678         /* Save the faulting GPA (cr2) in the address field */
5679         ctxt->exception.address = cr2;
5680
5681         r = x86_emulate_insn(ctxt);
5682
5683         if (r == EMULATION_INTERCEPTED)
5684                 return EMULATE_DONE;
5685
5686         if (r == EMULATION_FAILED) {
5687                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5688                                         emulation_type))
5689                         return EMULATE_DONE;
5690
5691                 return handle_emulation_failure(vcpu);
5692         }
5693
5694         if (ctxt->have_exception) {
5695                 r = EMULATE_DONE;
5696                 if (inject_emulated_exception(vcpu))
5697                         return r;
5698         } else if (vcpu->arch.pio.count) {
5699                 if (!vcpu->arch.pio.in) {
5700                         /* FIXME: return into emulator if single-stepping.  */
5701                         vcpu->arch.pio.count = 0;
5702                 } else {
5703                         writeback = false;
5704                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5705                 }
5706                 r = EMULATE_USER_EXIT;
5707         } else if (vcpu->mmio_needed) {
5708                 if (!vcpu->mmio_is_write)
5709                         writeback = false;
5710                 r = EMULATE_USER_EXIT;
5711                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5712         } else if (r == EMULATION_RESTART)
5713                 goto restart;
5714         else
5715                 r = EMULATE_DONE;
5716
5717         if (writeback) {
5718                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5719                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5720                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5721                 if (vcpu->arch.hflags != ctxt->emul_flags)
5722                         kvm_set_hflags(vcpu, ctxt->emul_flags);
5723                 kvm_rip_write(vcpu, ctxt->eip);
5724                 if (r == EMULATE_DONE)
5725                         kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5726                 if (!ctxt->have_exception ||
5727                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5728                         __kvm_set_rflags(vcpu, ctxt->eflags);
5729
5730                 /*
5731                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5732                  * do nothing, and it will be requested again as soon as
5733                  * the shadow expires.  But we still need to check here,
5734                  * because POPF has no interrupt shadow.
5735                  */
5736                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5737                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5738         } else
5739                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5740
5741         return r;
5742 }
5743 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5744
5745 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5746 {
5747         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5748         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5749                                             size, port, &val, 1);
5750         /* do not return to emulator after return from userspace */
5751         vcpu->arch.pio.count = 0;
5752         return ret;
5753 }
5754 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5755
5756 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
5757 {
5758         unsigned long val;
5759
5760         /* We should only ever be called with arch.pio.count equal to 1 */
5761         BUG_ON(vcpu->arch.pio.count != 1);
5762
5763         /* For size less than 4 we merge, else we zero extend */
5764         val = (vcpu->arch.pio.size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX)
5765                                         : 0;
5766
5767         /*
5768          * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
5769          * the copy and tracing
5770          */
5771         emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, vcpu->arch.pio.size,
5772                                  vcpu->arch.pio.port, &val, 1);
5773         kvm_register_write(vcpu, VCPU_REGS_RAX, val);
5774
5775         return 1;
5776 }
5777
5778 int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size, unsigned short port)
5779 {
5780         unsigned long val;
5781         int ret;
5782
5783         /* For size less than 4 we merge, else we zero extend */
5784         val = (size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX) : 0;
5785
5786         ret = emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, size, port,
5787                                        &val, 1);
5788         if (ret) {
5789                 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
5790                 return ret;
5791         }
5792
5793         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
5794
5795         return 0;
5796 }
5797 EXPORT_SYMBOL_GPL(kvm_fast_pio_in);
5798
5799 static int kvmclock_cpu_down_prep(unsigned int cpu)
5800 {
5801         __this_cpu_write(cpu_tsc_khz, 0);
5802         return 0;
5803 }
5804
5805 static void tsc_khz_changed(void *data)
5806 {
5807         struct cpufreq_freqs *freq = data;
5808         unsigned long khz = 0;
5809
5810         if (data)
5811                 khz = freq->new;
5812         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5813                 khz = cpufreq_quick_get(raw_smp_processor_id());
5814         if (!khz)
5815                 khz = tsc_khz;
5816         __this_cpu_write(cpu_tsc_khz, khz);
5817 }
5818
5819 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5820                                      void *data)
5821 {
5822         struct cpufreq_freqs *freq = data;
5823         struct kvm *kvm;
5824         struct kvm_vcpu *vcpu;
5825         int i, send_ipi = 0;
5826
5827         /*
5828          * We allow guests to temporarily run on slowing clocks,
5829          * provided we notify them after, or to run on accelerating
5830          * clocks, provided we notify them before.  Thus time never
5831          * goes backwards.
5832          *
5833          * However, we have a problem.  We can't atomically update
5834          * the frequency of a given CPU from this function; it is
5835          * merely a notifier, which can be called from any CPU.
5836          * Changing the TSC frequency at arbitrary points in time
5837          * requires a recomputation of local variables related to
5838          * the TSC for each VCPU.  We must flag these local variables
5839          * to be updated and be sure the update takes place with the
5840          * new frequency before any guests proceed.
5841          *
5842          * Unfortunately, the combination of hotplug CPU and frequency
5843          * change creates an intractable locking scenario; the order
5844          * of when these callouts happen is undefined with respect to
5845          * CPU hotplug, and they can race with each other.  As such,
5846          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5847          * undefined; you can actually have a CPU frequency change take
5848          * place in between the computation of X and the setting of the
5849          * variable.  To protect against this problem, all updates of
5850          * the per_cpu tsc_khz variable are done in an interrupt
5851          * protected IPI, and all callers wishing to update the value
5852          * must wait for a synchronous IPI to complete (which is trivial
5853          * if the caller is on the CPU already).  This establishes the
5854          * necessary total order on variable updates.
5855          *
5856          * Note that because a guest time update may take place
5857          * anytime after the setting of the VCPU's request bit, the
5858          * correct TSC value must be set before the request.  However,
5859          * to ensure the update actually makes it to any guest which
5860          * starts running in hardware virtualization between the set
5861          * and the acquisition of the spinlock, we must also ping the
5862          * CPU after setting the request bit.
5863          *
5864          */
5865
5866         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5867                 return 0;
5868         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5869                 return 0;
5870
5871         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5872
5873         spin_lock(&kvm_lock);
5874         list_for_each_entry(kvm, &vm_list, vm_list) {
5875                 kvm_for_each_vcpu(i, vcpu, kvm) {
5876                         if (vcpu->cpu != freq->cpu)
5877                                 continue;
5878                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5879                         if (vcpu->cpu != smp_processor_id())
5880                                 send_ipi = 1;
5881                 }
5882         }
5883         spin_unlock(&kvm_lock);
5884
5885         if (freq->old < freq->new && send_ipi) {
5886                 /*
5887                  * We upscale the frequency.  Must make the guest
5888                  * doesn't see old kvmclock values while running with
5889                  * the new frequency, otherwise we risk the guest sees
5890                  * time go backwards.
5891                  *
5892                  * In case we update the frequency for another cpu
5893                  * (which might be in guest context) send an interrupt
5894                  * to kick the cpu out of guest context.  Next time
5895                  * guest context is entered kvmclock will be updated,
5896                  * so the guest will not see stale values.
5897                  */
5898                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5899         }
5900         return 0;
5901 }
5902
5903 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5904         .notifier_call  = kvmclock_cpufreq_notifier
5905 };
5906
5907 static int kvmclock_cpu_online(unsigned int cpu)
5908 {
5909         tsc_khz_changed(NULL);
5910         return 0;
5911 }
5912
5913 static void kvm_timer_init(void)
5914 {
5915         max_tsc_khz = tsc_khz;
5916
5917         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5918 #ifdef CONFIG_CPU_FREQ
5919                 struct cpufreq_policy policy;
5920                 int cpu;
5921
5922                 memset(&policy, 0, sizeof(policy));
5923                 cpu = get_cpu();
5924                 cpufreq_get_policy(&policy, cpu);
5925                 if (policy.cpuinfo.max_freq)
5926                         max_tsc_khz = policy.cpuinfo.max_freq;
5927                 put_cpu();
5928 #endif
5929                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5930                                           CPUFREQ_TRANSITION_NOTIFIER);
5931         }
5932         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5933
5934         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
5935                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
5936 }
5937
5938 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5939
5940 int kvm_is_in_guest(void)
5941 {
5942         return __this_cpu_read(current_vcpu) != NULL;
5943 }
5944
5945 static int kvm_is_user_mode(void)
5946 {
5947         int user_mode = 3;
5948
5949         if (__this_cpu_read(current_vcpu))
5950                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5951
5952         return user_mode != 0;
5953 }
5954
5955 static unsigned long kvm_get_guest_ip(void)
5956 {
5957         unsigned long ip = 0;
5958
5959         if (__this_cpu_read(current_vcpu))
5960                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5961
5962         return ip;
5963 }
5964
5965 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5966         .is_in_guest            = kvm_is_in_guest,
5967         .is_user_mode           = kvm_is_user_mode,
5968         .get_guest_ip           = kvm_get_guest_ip,
5969 };
5970
5971 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5972 {
5973         __this_cpu_write(current_vcpu, vcpu);
5974 }
5975 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5976
5977 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5978 {
5979         __this_cpu_write(current_vcpu, NULL);
5980 }
5981 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5982
5983 static void kvm_set_mmio_spte_mask(void)
5984 {
5985         u64 mask;
5986         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5987
5988         /*
5989          * Set the reserved bits and the present bit of an paging-structure
5990          * entry to generate page fault with PFER.RSV = 1.
5991          */
5992          /* Mask the reserved physical address bits. */
5993         mask = rsvd_bits(maxphyaddr, 51);
5994
5995         /* Set the present bit. */
5996         mask |= 1ull;
5997
5998 #ifdef CONFIG_X86_64
5999         /*
6000          * If reserved bit is not supported, clear the present bit to disable
6001          * mmio page fault.
6002          */
6003         if (maxphyaddr == 52)
6004                 mask &= ~1ull;
6005 #endif
6006
6007         kvm_mmu_set_mmio_spte_mask(mask);
6008 }
6009
6010 #ifdef CONFIG_X86_64
6011 static void pvclock_gtod_update_fn(struct work_struct *work)
6012 {
6013         struct kvm *kvm;
6014
6015         struct kvm_vcpu *vcpu;
6016         int i;
6017
6018         spin_lock(&kvm_lock);
6019         list_for_each_entry(kvm, &vm_list, vm_list)
6020                 kvm_for_each_vcpu(i, vcpu, kvm)
6021                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
6022         atomic_set(&kvm_guest_has_master_clock, 0);
6023         spin_unlock(&kvm_lock);
6024 }
6025
6026 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
6027
6028 /*
6029  * Notification about pvclock gtod data update.
6030  */
6031 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
6032                                void *priv)
6033 {
6034         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
6035         struct timekeeper *tk = priv;
6036
6037         update_pvclock_gtod(tk);
6038
6039         /* disable master clock if host does not trust, or does not
6040          * use, TSC clocksource
6041          */
6042         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
6043             atomic_read(&kvm_guest_has_master_clock) != 0)
6044                 queue_work(system_long_wq, &pvclock_gtod_work);
6045
6046         return 0;
6047 }
6048
6049 static struct notifier_block pvclock_gtod_notifier = {
6050         .notifier_call = pvclock_gtod_notify,
6051 };
6052 #endif
6053
6054 int kvm_arch_init(void *opaque)
6055 {
6056         int r;
6057         struct kvm_x86_ops *ops = opaque;
6058
6059         if (kvm_x86_ops) {
6060                 printk(KERN_ERR "kvm: already loaded the other module\n");
6061                 r = -EEXIST;
6062                 goto out;
6063         }
6064
6065         if (!ops->cpu_has_kvm_support()) {
6066                 printk(KERN_ERR "kvm: no hardware support\n");
6067                 r = -EOPNOTSUPP;
6068                 goto out;
6069         }
6070         if (ops->disabled_by_bios()) {
6071                 printk(KERN_ERR "kvm: disabled by bios\n");
6072                 r = -EOPNOTSUPP;
6073                 goto out;
6074         }
6075
6076         r = -ENOMEM;
6077         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
6078         if (!shared_msrs) {
6079                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
6080                 goto out;
6081         }
6082
6083         r = kvm_mmu_module_init();
6084         if (r)
6085                 goto out_free_percpu;
6086
6087         kvm_set_mmio_spte_mask();
6088
6089         kvm_x86_ops = ops;
6090
6091         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
6092                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
6093                         PT_PRESENT_MASK, 0);
6094         kvm_timer_init();
6095
6096         perf_register_guest_info_callbacks(&kvm_guest_cbs);
6097
6098         if (boot_cpu_has(X86_FEATURE_XSAVE))
6099                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
6100
6101         kvm_lapic_init();
6102 #ifdef CONFIG_X86_64
6103         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
6104 #endif
6105
6106         return 0;
6107
6108 out_free_percpu:
6109         free_percpu(shared_msrs);
6110 out:
6111         return r;
6112 }
6113
6114 void kvm_arch_exit(void)
6115 {
6116         kvm_lapic_exit();
6117         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
6118
6119         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6120                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
6121                                             CPUFREQ_TRANSITION_NOTIFIER);
6122         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
6123 #ifdef CONFIG_X86_64
6124         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
6125 #endif
6126         kvm_x86_ops = NULL;
6127         kvm_mmu_module_exit();
6128         free_percpu(shared_msrs);
6129 }
6130
6131 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
6132 {
6133         ++vcpu->stat.halt_exits;
6134         if (lapic_in_kernel(vcpu)) {
6135                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
6136                 return 1;
6137         } else {
6138                 vcpu->run->exit_reason = KVM_EXIT_HLT;
6139                 return 0;
6140         }
6141 }
6142 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
6143
6144 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
6145 {
6146         int ret = kvm_skip_emulated_instruction(vcpu);
6147         /*
6148          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6149          * KVM_EXIT_DEBUG here.
6150          */
6151         return kvm_vcpu_halt(vcpu) && ret;
6152 }
6153 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
6154
6155 #ifdef CONFIG_X86_64
6156 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
6157                                 unsigned long clock_type)
6158 {
6159         struct kvm_clock_pairing clock_pairing;
6160         struct timespec ts;
6161         u64 cycle;
6162         int ret;
6163
6164         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
6165                 return -KVM_EOPNOTSUPP;
6166
6167         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
6168                 return -KVM_EOPNOTSUPP;
6169
6170         clock_pairing.sec = ts.tv_sec;
6171         clock_pairing.nsec = ts.tv_nsec;
6172         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
6173         clock_pairing.flags = 0;
6174
6175         ret = 0;
6176         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
6177                             sizeof(struct kvm_clock_pairing)))
6178                 ret = -KVM_EFAULT;
6179
6180         return ret;
6181 }
6182 #endif
6183
6184 /*
6185  * kvm_pv_kick_cpu_op:  Kick a vcpu.
6186  *
6187  * @apicid - apicid of vcpu to be kicked.
6188  */
6189 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
6190 {
6191         struct kvm_lapic_irq lapic_irq;
6192
6193         lapic_irq.shorthand = 0;
6194         lapic_irq.dest_mode = 0;
6195         lapic_irq.dest_id = apicid;
6196         lapic_irq.msi_redir_hint = false;
6197
6198         lapic_irq.delivery_mode = APIC_DM_REMRD;
6199         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
6200 }
6201
6202 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
6203 {
6204         vcpu->arch.apicv_active = false;
6205         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
6206 }
6207
6208 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
6209 {
6210         unsigned long nr, a0, a1, a2, a3, ret;
6211         int op_64_bit, r;
6212
6213         r = kvm_skip_emulated_instruction(vcpu);
6214
6215         if (kvm_hv_hypercall_enabled(vcpu->kvm))
6216                 return kvm_hv_hypercall(vcpu);
6217
6218         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
6219         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
6220         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
6221         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
6222         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
6223
6224         trace_kvm_hypercall(nr, a0, a1, a2, a3);
6225
6226         op_64_bit = is_64_bit_mode(vcpu);
6227         if (!op_64_bit) {
6228                 nr &= 0xFFFFFFFF;
6229                 a0 &= 0xFFFFFFFF;
6230                 a1 &= 0xFFFFFFFF;
6231                 a2 &= 0xFFFFFFFF;
6232                 a3 &= 0xFFFFFFFF;
6233         }
6234
6235         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
6236                 ret = -KVM_EPERM;
6237                 goto out;
6238         }
6239
6240         switch (nr) {
6241         case KVM_HC_VAPIC_POLL_IRQ:
6242                 ret = 0;
6243                 break;
6244         case KVM_HC_KICK_CPU:
6245                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
6246                 ret = 0;
6247                 break;
6248 #ifdef CONFIG_X86_64
6249         case KVM_HC_CLOCK_PAIRING:
6250                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
6251                 break;
6252 #endif
6253         default:
6254                 ret = -KVM_ENOSYS;
6255                 break;
6256         }
6257 out:
6258         if (!op_64_bit)
6259                 ret = (u32)ret;
6260         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
6261         ++vcpu->stat.hypercalls;
6262         return r;
6263 }
6264 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
6265
6266 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
6267 {
6268         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6269         char instruction[3];
6270         unsigned long rip = kvm_rip_read(vcpu);
6271
6272         kvm_x86_ops->patch_hypercall(vcpu, instruction);
6273
6274         return emulator_write_emulated(ctxt, rip, instruction, 3,
6275                 &ctxt->exception);
6276 }
6277
6278 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
6279 {
6280         return vcpu->run->request_interrupt_window &&
6281                 likely(!pic_in_kernel(vcpu->kvm));
6282 }
6283
6284 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
6285 {
6286         struct kvm_run *kvm_run = vcpu->run;
6287
6288         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
6289         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
6290         kvm_run->cr8 = kvm_get_cr8(vcpu);
6291         kvm_run->apic_base = kvm_get_apic_base(vcpu);
6292         kvm_run->ready_for_interrupt_injection =
6293                 pic_in_kernel(vcpu->kvm) ||
6294                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
6295 }
6296
6297 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
6298 {
6299         int max_irr, tpr;
6300
6301         if (!kvm_x86_ops->update_cr8_intercept)
6302                 return;
6303
6304         if (!lapic_in_kernel(vcpu))
6305                 return;
6306
6307         if (vcpu->arch.apicv_active)
6308                 return;
6309
6310         if (!vcpu->arch.apic->vapic_addr)
6311                 max_irr = kvm_lapic_find_highest_irr(vcpu);
6312         else
6313                 max_irr = -1;
6314
6315         if (max_irr != -1)
6316                 max_irr >>= 4;
6317
6318         tpr = kvm_lapic_get_cr8(vcpu);
6319
6320         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
6321 }
6322
6323 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
6324 {
6325         int r;
6326
6327         /* try to reinject previous events if any */
6328         if (vcpu->arch.exception.pending) {
6329                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
6330                                         vcpu->arch.exception.has_error_code,
6331                                         vcpu->arch.exception.error_code);
6332
6333                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
6334                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
6335                                              X86_EFLAGS_RF);
6336
6337                 if (vcpu->arch.exception.nr == DB_VECTOR &&
6338                     (vcpu->arch.dr7 & DR7_GD)) {
6339                         vcpu->arch.dr7 &= ~DR7_GD;
6340                         kvm_update_dr7(vcpu);
6341                 }
6342
6343                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
6344                                           vcpu->arch.exception.has_error_code,
6345                                           vcpu->arch.exception.error_code,
6346                                           vcpu->arch.exception.reinject);
6347                 return 0;
6348         }
6349
6350         if (vcpu->arch.nmi_injected) {
6351                 kvm_x86_ops->set_nmi(vcpu);
6352                 return 0;
6353         }
6354
6355         if (vcpu->arch.interrupt.pending) {
6356                 kvm_x86_ops->set_irq(vcpu);
6357                 return 0;
6358         }
6359
6360         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6361                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6362                 if (r != 0)
6363                         return r;
6364         }
6365
6366         /* try to inject new event if pending */
6367         if (vcpu->arch.smi_pending && !is_smm(vcpu)) {
6368                 vcpu->arch.smi_pending = false;
6369                 enter_smm(vcpu);
6370         } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
6371                 --vcpu->arch.nmi_pending;
6372                 vcpu->arch.nmi_injected = true;
6373                 kvm_x86_ops->set_nmi(vcpu);
6374         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6375                 /*
6376                  * Because interrupts can be injected asynchronously, we are
6377                  * calling check_nested_events again here to avoid a race condition.
6378                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6379                  * proposal and current concerns.  Perhaps we should be setting
6380                  * KVM_REQ_EVENT only on certain events and not unconditionally?
6381                  */
6382                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6383                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6384                         if (r != 0)
6385                                 return r;
6386                 }
6387                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6388                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6389                                             false);
6390                         kvm_x86_ops->set_irq(vcpu);
6391                 }
6392         }
6393
6394         return 0;
6395 }
6396
6397 static void process_nmi(struct kvm_vcpu *vcpu)
6398 {
6399         unsigned limit = 2;
6400
6401         /*
6402          * x86 is limited to one NMI running, and one NMI pending after it.
6403          * If an NMI is already in progress, limit further NMIs to just one.
6404          * Otherwise, allow two (and we'll inject the first one immediately).
6405          */
6406         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6407                 limit = 1;
6408
6409         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6410         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6411         kvm_make_request(KVM_REQ_EVENT, vcpu);
6412 }
6413
6414 #define put_smstate(type, buf, offset, val)                       \
6415         *(type *)((buf) + (offset) - 0x7e00) = val
6416
6417 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
6418 {
6419         u32 flags = 0;
6420         flags |= seg->g       << 23;
6421         flags |= seg->db      << 22;
6422         flags |= seg->l       << 21;
6423         flags |= seg->avl     << 20;
6424         flags |= seg->present << 15;
6425         flags |= seg->dpl     << 13;
6426         flags |= seg->s       << 12;
6427         flags |= seg->type    << 8;
6428         return flags;
6429 }
6430
6431 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
6432 {
6433         struct kvm_segment seg;
6434         int offset;
6435
6436         kvm_get_segment(vcpu, &seg, n);
6437         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
6438
6439         if (n < 3)
6440                 offset = 0x7f84 + n * 12;
6441         else
6442                 offset = 0x7f2c + (n - 3) * 12;
6443
6444         put_smstate(u32, buf, offset + 8, seg.base);
6445         put_smstate(u32, buf, offset + 4, seg.limit);
6446         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
6447 }
6448
6449 #ifdef CONFIG_X86_64
6450 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
6451 {
6452         struct kvm_segment seg;
6453         int offset;
6454         u16 flags;
6455
6456         kvm_get_segment(vcpu, &seg, n);
6457         offset = 0x7e00 + n * 16;
6458
6459         flags = enter_smm_get_segment_flags(&seg) >> 8;
6460         put_smstate(u16, buf, offset, seg.selector);
6461         put_smstate(u16, buf, offset + 2, flags);
6462         put_smstate(u32, buf, offset + 4, seg.limit);
6463         put_smstate(u64, buf, offset + 8, seg.base);
6464 }
6465 #endif
6466
6467 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6468 {
6469         struct desc_ptr dt;
6470         struct kvm_segment seg;
6471         unsigned long val;
6472         int i;
6473
6474         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6475         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6476         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6477         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6478
6479         for (i = 0; i < 8; i++)
6480                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6481
6482         kvm_get_dr(vcpu, 6, &val);
6483         put_smstate(u32, buf, 0x7fcc, (u32)val);
6484         kvm_get_dr(vcpu, 7, &val);
6485         put_smstate(u32, buf, 0x7fc8, (u32)val);
6486
6487         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6488         put_smstate(u32, buf, 0x7fc4, seg.selector);
6489         put_smstate(u32, buf, 0x7f64, seg.base);
6490         put_smstate(u32, buf, 0x7f60, seg.limit);
6491         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
6492
6493         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6494         put_smstate(u32, buf, 0x7fc0, seg.selector);
6495         put_smstate(u32, buf, 0x7f80, seg.base);
6496         put_smstate(u32, buf, 0x7f7c, seg.limit);
6497         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
6498
6499         kvm_x86_ops->get_gdt(vcpu, &dt);
6500         put_smstate(u32, buf, 0x7f74, dt.address);
6501         put_smstate(u32, buf, 0x7f70, dt.size);
6502
6503         kvm_x86_ops->get_idt(vcpu, &dt);
6504         put_smstate(u32, buf, 0x7f58, dt.address);
6505         put_smstate(u32, buf, 0x7f54, dt.size);
6506
6507         for (i = 0; i < 6; i++)
6508                 enter_smm_save_seg_32(vcpu, buf, i);
6509
6510         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6511
6512         /* revision id */
6513         put_smstate(u32, buf, 0x7efc, 0x00020000);
6514         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6515 }
6516
6517 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6518 {
6519 #ifdef CONFIG_X86_64
6520         struct desc_ptr dt;
6521         struct kvm_segment seg;
6522         unsigned long val;
6523         int i;
6524
6525         for (i = 0; i < 16; i++)
6526                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6527
6528         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6529         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6530
6531         kvm_get_dr(vcpu, 6, &val);
6532         put_smstate(u64, buf, 0x7f68, val);
6533         kvm_get_dr(vcpu, 7, &val);
6534         put_smstate(u64, buf, 0x7f60, val);
6535
6536         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6537         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6538         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6539
6540         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6541
6542         /* revision id */
6543         put_smstate(u32, buf, 0x7efc, 0x00020064);
6544
6545         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6546
6547         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6548         put_smstate(u16, buf, 0x7e90, seg.selector);
6549         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
6550         put_smstate(u32, buf, 0x7e94, seg.limit);
6551         put_smstate(u64, buf, 0x7e98, seg.base);
6552
6553         kvm_x86_ops->get_idt(vcpu, &dt);
6554         put_smstate(u32, buf, 0x7e84, dt.size);
6555         put_smstate(u64, buf, 0x7e88, dt.address);
6556
6557         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6558         put_smstate(u16, buf, 0x7e70, seg.selector);
6559         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
6560         put_smstate(u32, buf, 0x7e74, seg.limit);
6561         put_smstate(u64, buf, 0x7e78, seg.base);
6562
6563         kvm_x86_ops->get_gdt(vcpu, &dt);
6564         put_smstate(u32, buf, 0x7e64, dt.size);
6565         put_smstate(u64, buf, 0x7e68, dt.address);
6566
6567         for (i = 0; i < 6; i++)
6568                 enter_smm_save_seg_64(vcpu, buf, i);
6569 #else
6570         WARN_ON_ONCE(1);
6571 #endif
6572 }
6573
6574 static void enter_smm(struct kvm_vcpu *vcpu)
6575 {
6576         struct kvm_segment cs, ds;
6577         struct desc_ptr dt;
6578         char buf[512];
6579         u32 cr0;
6580
6581         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6582         vcpu->arch.hflags |= HF_SMM_MASK;
6583         memset(buf, 0, 512);
6584         if (guest_cpuid_has_longmode(vcpu))
6585                 enter_smm_save_state_64(vcpu, buf);
6586         else
6587                 enter_smm_save_state_32(vcpu, buf);
6588
6589         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6590
6591         if (kvm_x86_ops->get_nmi_mask(vcpu))
6592                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6593         else
6594                 kvm_x86_ops->set_nmi_mask(vcpu, true);
6595
6596         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6597         kvm_rip_write(vcpu, 0x8000);
6598
6599         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6600         kvm_x86_ops->set_cr0(vcpu, cr0);
6601         vcpu->arch.cr0 = cr0;
6602
6603         kvm_x86_ops->set_cr4(vcpu, 0);
6604
6605         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
6606         dt.address = dt.size = 0;
6607         kvm_x86_ops->set_idt(vcpu, &dt);
6608
6609         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6610
6611         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6612         cs.base = vcpu->arch.smbase;
6613
6614         ds.selector = 0;
6615         ds.base = 0;
6616
6617         cs.limit    = ds.limit = 0xffffffff;
6618         cs.type     = ds.type = 0x3;
6619         cs.dpl      = ds.dpl = 0;
6620         cs.db       = ds.db = 0;
6621         cs.s        = ds.s = 1;
6622         cs.l        = ds.l = 0;
6623         cs.g        = ds.g = 1;
6624         cs.avl      = ds.avl = 0;
6625         cs.present  = ds.present = 1;
6626         cs.unusable = ds.unusable = 0;
6627         cs.padding  = ds.padding = 0;
6628
6629         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6630         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6631         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6632         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
6633         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
6634         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
6635
6636         if (guest_cpuid_has_longmode(vcpu))
6637                 kvm_x86_ops->set_efer(vcpu, 0);
6638
6639         kvm_update_cpuid(vcpu);
6640         kvm_mmu_reset_context(vcpu);
6641 }
6642
6643 static void process_smi(struct kvm_vcpu *vcpu)
6644 {
6645         vcpu->arch.smi_pending = true;
6646         kvm_make_request(KVM_REQ_EVENT, vcpu);
6647 }
6648
6649 void kvm_make_scan_ioapic_request(struct kvm *kvm)
6650 {
6651         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
6652 }
6653
6654 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6655 {
6656         u64 eoi_exit_bitmap[4];
6657
6658         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6659                 return;
6660
6661         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
6662
6663         if (irqchip_split(vcpu->kvm))
6664                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
6665         else {
6666                 if (kvm_x86_ops->sync_pir_to_irr && vcpu->arch.apicv_active)
6667                         kvm_x86_ops->sync_pir_to_irr(vcpu);
6668                 kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
6669         }
6670         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
6671                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
6672         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
6673 }
6674
6675 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6676 {
6677         ++vcpu->stat.tlb_flush;
6678         kvm_x86_ops->tlb_flush(vcpu);
6679 }
6680
6681 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6682 {
6683         struct page *page = NULL;
6684
6685         if (!lapic_in_kernel(vcpu))
6686                 return;
6687
6688         if (!kvm_x86_ops->set_apic_access_page_addr)
6689                 return;
6690
6691         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6692         if (is_error_page(page))
6693                 return;
6694         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6695
6696         /*
6697          * Do not pin apic access page in memory, the MMU notifier
6698          * will call us again if it is migrated or swapped out.
6699          */
6700         put_page(page);
6701 }
6702 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6703
6704 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
6705                                            unsigned long address)
6706 {
6707         /*
6708          * The physical address of apic access page is stored in the VMCS.
6709          * Update it when it becomes invalid.
6710          */
6711         if (address == gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT))
6712                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6713 }
6714
6715 /*
6716  * Returns 1 to let vcpu_run() continue the guest execution loop without
6717  * exiting to the userspace.  Otherwise, the value will be returned to the
6718  * userspace.
6719  */
6720 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6721 {
6722         int r;
6723         bool req_int_win =
6724                 dm_request_for_irq_injection(vcpu) &&
6725                 kvm_cpu_accept_dm_intr(vcpu);
6726
6727         bool req_immediate_exit = false;
6728
6729         if (vcpu->requests) {
6730                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6731                         kvm_mmu_unload(vcpu);
6732                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6733                         __kvm_migrate_timers(vcpu);
6734                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6735                         kvm_gen_update_masterclock(vcpu->kvm);
6736                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6737                         kvm_gen_kvmclock_update(vcpu);
6738                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6739                         r = kvm_guest_time_update(vcpu);
6740                         if (unlikely(r))
6741                                 goto out;
6742                 }
6743                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6744                         kvm_mmu_sync_roots(vcpu);
6745                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6746                         kvm_vcpu_flush_tlb(vcpu);
6747                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6748                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6749                         r = 0;
6750                         goto out;
6751                 }
6752                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6753                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6754                         r = 0;
6755                         goto out;
6756                 }
6757                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6758                         /* Page is swapped out. Do synthetic halt */
6759                         vcpu->arch.apf.halted = true;
6760                         r = 1;
6761                         goto out;
6762                 }
6763                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6764                         record_steal_time(vcpu);
6765                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
6766                         process_smi(vcpu);
6767                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6768                         process_nmi(vcpu);
6769                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6770                         kvm_pmu_handle_event(vcpu);
6771                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6772                         kvm_pmu_deliver_pmi(vcpu);
6773                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
6774                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
6775                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
6776                                      vcpu->arch.ioapic_handled_vectors)) {
6777                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
6778                                 vcpu->run->eoi.vector =
6779                                                 vcpu->arch.pending_ioapic_eoi;
6780                                 r = 0;
6781                                 goto out;
6782                         }
6783                 }
6784                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6785                         vcpu_scan_ioapic(vcpu);
6786                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6787                         kvm_vcpu_reload_apic_access_page(vcpu);
6788                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
6789                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6790                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
6791                         r = 0;
6792                         goto out;
6793                 }
6794                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
6795                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6796                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
6797                         r = 0;
6798                         goto out;
6799                 }
6800                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
6801                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
6802                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
6803                         r = 0;
6804                         goto out;
6805                 }
6806
6807                 /*
6808                  * KVM_REQ_HV_STIMER has to be processed after
6809                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
6810                  * depend on the guest clock being up-to-date
6811                  */
6812                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
6813                         kvm_hv_process_stimers(vcpu);
6814         }
6815
6816         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6817                 ++vcpu->stat.req_event;
6818                 kvm_apic_accept_events(vcpu);
6819                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6820                         r = 1;
6821                         goto out;
6822                 }
6823
6824                 if (inject_pending_event(vcpu, req_int_win) != 0)
6825                         req_immediate_exit = true;
6826                 else {
6827                         /* Enable NMI/IRQ window open exits if needed.
6828                          *
6829                          * SMIs have two cases: 1) they can be nested, and
6830                          * then there is nothing to do here because RSM will
6831                          * cause a vmexit anyway; 2) or the SMI can be pending
6832                          * because inject_pending_event has completed the
6833                          * injection of an IRQ or NMI from the previous vmexit,
6834                          * and then we request an immediate exit to inject the SMI.
6835                          */
6836                         if (vcpu->arch.smi_pending && !is_smm(vcpu))
6837                                 req_immediate_exit = true;
6838                         if (vcpu->arch.nmi_pending)
6839                                 kvm_x86_ops->enable_nmi_window(vcpu);
6840                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6841                                 kvm_x86_ops->enable_irq_window(vcpu);
6842                 }
6843
6844                 if (kvm_lapic_enabled(vcpu)) {
6845                         update_cr8_intercept(vcpu);
6846                         kvm_lapic_sync_to_vapic(vcpu);
6847                 }
6848         }
6849
6850         r = kvm_mmu_reload(vcpu);
6851         if (unlikely(r)) {
6852                 goto cancel_injection;
6853         }
6854
6855         preempt_disable();
6856
6857         kvm_x86_ops->prepare_guest_switch(vcpu);
6858         kvm_load_guest_fpu(vcpu);
6859
6860         /*
6861          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
6862          * IPI are then delayed after guest entry, which ensures that they
6863          * result in virtual interrupt delivery.
6864          */
6865         local_irq_disable();
6866         vcpu->mode = IN_GUEST_MODE;
6867
6868         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6869
6870         /*
6871          * 1) We should set ->mode before checking ->requests.  Please see
6872          * the comment in kvm_make_all_cpus_request.
6873          *
6874          * 2) For APICv, we should set ->mode before checking PIR.ON.  This
6875          * pairs with the memory barrier implicit in pi_test_and_set_on
6876          * (see vmx_deliver_posted_interrupt).
6877          *
6878          * 3) This also orders the write to mode from any reads to the page
6879          * tables done while the VCPU is running.  Please see the comment
6880          * in kvm_flush_remote_tlbs.
6881          */
6882         smp_mb__after_srcu_read_unlock();
6883
6884         /*
6885          * This handles the case where a posted interrupt was
6886          * notified with kvm_vcpu_kick.
6887          */
6888         if (kvm_lapic_enabled(vcpu)) {
6889                 if (kvm_x86_ops->sync_pir_to_irr && vcpu->arch.apicv_active)
6890                         kvm_x86_ops->sync_pir_to_irr(vcpu);
6891         }
6892
6893         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
6894             || need_resched() || signal_pending(current)) {
6895                 vcpu->mode = OUTSIDE_GUEST_MODE;
6896                 smp_wmb();
6897                 local_irq_enable();
6898                 preempt_enable();
6899                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6900                 r = 1;
6901                 goto cancel_injection;
6902         }
6903
6904         kvm_load_guest_xcr0(vcpu);
6905
6906         if (req_immediate_exit) {
6907                 kvm_make_request(KVM_REQ_EVENT, vcpu);
6908                 smp_send_reschedule(vcpu->cpu);
6909         }
6910
6911         trace_kvm_entry(vcpu->vcpu_id);
6912         wait_lapic_expire(vcpu);
6913         guest_enter_irqoff();
6914
6915         if (unlikely(vcpu->arch.switch_db_regs)) {
6916                 set_debugreg(0, 7);
6917                 set_debugreg(vcpu->arch.eff_db[0], 0);
6918                 set_debugreg(vcpu->arch.eff_db[1], 1);
6919                 set_debugreg(vcpu->arch.eff_db[2], 2);
6920                 set_debugreg(vcpu->arch.eff_db[3], 3);
6921                 set_debugreg(vcpu->arch.dr6, 6);
6922                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6923         }
6924
6925         kvm_x86_ops->run(vcpu);
6926
6927         /*
6928          * Do this here before restoring debug registers on the host.  And
6929          * since we do this before handling the vmexit, a DR access vmexit
6930          * can (a) read the correct value of the debug registers, (b) set
6931          * KVM_DEBUGREG_WONT_EXIT again.
6932          */
6933         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6934                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6935                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6936                 kvm_update_dr0123(vcpu);
6937                 kvm_update_dr6(vcpu);
6938                 kvm_update_dr7(vcpu);
6939                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6940         }
6941
6942         /*
6943          * If the guest has used debug registers, at least dr7
6944          * will be disabled while returning to the host.
6945          * If we don't have active breakpoints in the host, we don't
6946          * care about the messed up debug address registers. But if
6947          * we have some of them active, restore the old state.
6948          */
6949         if (hw_breakpoint_active())
6950                 hw_breakpoint_restore();
6951
6952         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
6953
6954         vcpu->mode = OUTSIDE_GUEST_MODE;
6955         smp_wmb();
6956
6957         kvm_put_guest_xcr0(vcpu);
6958
6959         kvm_x86_ops->handle_external_intr(vcpu);
6960
6961         ++vcpu->stat.exits;
6962
6963         guest_exit_irqoff();
6964
6965         local_irq_enable();
6966         preempt_enable();
6967
6968         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6969
6970         /*
6971          * Profile KVM exit RIPs:
6972          */
6973         if (unlikely(prof_on == KVM_PROFILING)) {
6974                 unsigned long rip = kvm_rip_read(vcpu);
6975                 profile_hit(KVM_PROFILING, (void *)rip);
6976         }
6977
6978         if (unlikely(vcpu->arch.tsc_always_catchup))
6979                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6980
6981         if (vcpu->arch.apic_attention)
6982                 kvm_lapic_sync_from_vapic(vcpu);
6983
6984         r = kvm_x86_ops->handle_exit(vcpu);
6985         return r;
6986
6987 cancel_injection:
6988         kvm_x86_ops->cancel_injection(vcpu);
6989         if (unlikely(vcpu->arch.apic_attention))
6990                 kvm_lapic_sync_from_vapic(vcpu);
6991 out:
6992         return r;
6993 }
6994
6995 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
6996 {
6997         if (!kvm_arch_vcpu_runnable(vcpu) &&
6998             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
6999                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7000                 kvm_vcpu_block(vcpu);
7001                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7002
7003                 if (kvm_x86_ops->post_block)
7004                         kvm_x86_ops->post_block(vcpu);
7005
7006                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
7007                         return 1;
7008         }
7009
7010         kvm_apic_accept_events(vcpu);
7011         switch(vcpu->arch.mp_state) {
7012         case KVM_MP_STATE_HALTED:
7013                 vcpu->arch.pv.pv_unhalted = false;
7014                 vcpu->arch.mp_state =
7015                         KVM_MP_STATE_RUNNABLE;
7016         case KVM_MP_STATE_RUNNABLE:
7017                 vcpu->arch.apf.halted = false;
7018                 break;
7019         case KVM_MP_STATE_INIT_RECEIVED:
7020                 break;
7021         default:
7022                 return -EINTR;
7023                 break;
7024         }
7025         return 1;
7026 }
7027
7028 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
7029 {
7030         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
7031                 kvm_x86_ops->check_nested_events(vcpu, false);
7032
7033         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7034                 !vcpu->arch.apf.halted);
7035 }
7036
7037 static int vcpu_run(struct kvm_vcpu *vcpu)
7038 {
7039         int r;
7040         struct kvm *kvm = vcpu->kvm;
7041
7042         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7043
7044         for (;;) {
7045                 if (kvm_vcpu_running(vcpu)) {
7046                         r = vcpu_enter_guest(vcpu);
7047                 } else {
7048                         r = vcpu_block(kvm, vcpu);
7049                 }
7050
7051                 if (r <= 0)
7052                         break;
7053
7054                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
7055                 if (kvm_cpu_has_pending_timer(vcpu))
7056                         kvm_inject_pending_timer_irqs(vcpu);
7057
7058                 if (dm_request_for_irq_injection(vcpu) &&
7059                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
7060                         r = 0;
7061                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
7062                         ++vcpu->stat.request_irq_exits;
7063                         break;
7064                 }
7065
7066                 kvm_check_async_pf_completion(vcpu);
7067
7068                 if (signal_pending(current)) {
7069                         r = -EINTR;
7070                         vcpu->run->exit_reason = KVM_EXIT_INTR;
7071                         ++vcpu->stat.signal_exits;
7072                         break;
7073                 }
7074                 if (need_resched()) {
7075                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7076                         cond_resched();
7077                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7078                 }
7079         }
7080
7081         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7082
7083         return r;
7084 }
7085
7086 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
7087 {
7088         int r;
7089         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7090         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
7091         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
7092         if (r != EMULATE_DONE)
7093                 return 0;
7094         return 1;
7095 }
7096
7097 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
7098 {
7099         BUG_ON(!vcpu->arch.pio.count);
7100
7101         return complete_emulated_io(vcpu);
7102 }
7103
7104 /*
7105  * Implements the following, as a state machine:
7106  *
7107  * read:
7108  *   for each fragment
7109  *     for each mmio piece in the fragment
7110  *       write gpa, len
7111  *       exit
7112  *       copy data
7113  *   execute insn
7114  *
7115  * write:
7116  *   for each fragment
7117  *     for each mmio piece in the fragment
7118  *       write gpa, len
7119  *       copy data
7120  *       exit
7121  */
7122 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
7123 {
7124         struct kvm_run *run = vcpu->run;
7125         struct kvm_mmio_fragment *frag;
7126         unsigned len;
7127
7128         BUG_ON(!vcpu->mmio_needed);
7129
7130         /* Complete previous fragment */
7131         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
7132         len = min(8u, frag->len);
7133         if (!vcpu->mmio_is_write)
7134                 memcpy(frag->data, run->mmio.data, len);
7135
7136         if (frag->len <= 8) {
7137                 /* Switch to the next fragment. */
7138                 frag++;
7139                 vcpu->mmio_cur_fragment++;
7140         } else {
7141                 /* Go forward to the next mmio piece. */
7142                 frag->data += len;
7143                 frag->gpa += len;
7144                 frag->len -= len;
7145         }
7146
7147         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
7148                 vcpu->mmio_needed = 0;
7149
7150                 /* FIXME: return into emulator if single-stepping.  */
7151                 if (vcpu->mmio_is_write)
7152                         return 1;
7153                 vcpu->mmio_read_completed = 1;
7154                 return complete_emulated_io(vcpu);
7155         }
7156
7157         run->exit_reason = KVM_EXIT_MMIO;
7158         run->mmio.phys_addr = frag->gpa;
7159         if (vcpu->mmio_is_write)
7160                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
7161         run->mmio.len = min(8u, frag->len);
7162         run->mmio.is_write = vcpu->mmio_is_write;
7163         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7164         return 0;
7165 }
7166
7167
7168 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
7169 {
7170         struct fpu *fpu = &current->thread.fpu;
7171         int r;
7172         sigset_t sigsaved;
7173
7174         fpu__activate_curr(fpu);
7175
7176         if (vcpu->sigset_active)
7177                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
7178
7179         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
7180                 kvm_vcpu_block(vcpu);
7181                 kvm_apic_accept_events(vcpu);
7182                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
7183                 r = -EAGAIN;
7184                 goto out;
7185         }
7186
7187         /* re-sync apic's tpr */
7188         if (!lapic_in_kernel(vcpu)) {
7189                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
7190                         r = -EINVAL;
7191                         goto out;
7192                 }
7193         }
7194
7195         if (unlikely(vcpu->arch.complete_userspace_io)) {
7196                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
7197                 vcpu->arch.complete_userspace_io = NULL;
7198                 r = cui(vcpu);
7199                 if (r <= 0)
7200                         goto out;
7201         } else
7202                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
7203
7204         if (kvm_run->immediate_exit)
7205                 r = -EINTR;
7206         else
7207                 r = vcpu_run(vcpu);
7208
7209 out:
7210         post_kvm_run_save(vcpu);
7211         if (vcpu->sigset_active)
7212                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
7213
7214         return r;
7215 }
7216
7217 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7218 {
7219         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
7220                 /*
7221                  * We are here if userspace calls get_regs() in the middle of
7222                  * instruction emulation. Registers state needs to be copied
7223                  * back from emulation context to vcpu. Userspace shouldn't do
7224                  * that usually, but some bad designed PV devices (vmware
7225                  * backdoor interface) need this to work
7226                  */
7227                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
7228                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7229         }
7230         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
7231         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
7232         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
7233         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
7234         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
7235         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
7236         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
7237         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
7238 #ifdef CONFIG_X86_64
7239         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
7240         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
7241         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
7242         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
7243         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
7244         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
7245         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
7246         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
7247 #endif
7248
7249         regs->rip = kvm_rip_read(vcpu);
7250         regs->rflags = kvm_get_rflags(vcpu);
7251
7252         return 0;
7253 }
7254
7255 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7256 {
7257         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
7258         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7259
7260         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
7261         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
7262         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
7263         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
7264         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
7265         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
7266         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
7267         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
7268 #ifdef CONFIG_X86_64
7269         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
7270         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
7271         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
7272         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
7273         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
7274         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
7275         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
7276         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
7277 #endif
7278
7279         kvm_rip_write(vcpu, regs->rip);
7280         kvm_set_rflags(vcpu, regs->rflags);
7281
7282         vcpu->arch.exception.pending = false;
7283
7284         kvm_make_request(KVM_REQ_EVENT, vcpu);
7285
7286         return 0;
7287 }
7288
7289 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
7290 {
7291         struct kvm_segment cs;
7292
7293         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7294         *db = cs.db;
7295         *l = cs.l;
7296 }
7297 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
7298
7299 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
7300                                   struct kvm_sregs *sregs)
7301 {
7302         struct desc_ptr dt;
7303
7304         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7305         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7306         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7307         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7308         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7309         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7310
7311         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7312         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7313
7314         kvm_x86_ops->get_idt(vcpu, &dt);
7315         sregs->idt.limit = dt.size;
7316         sregs->idt.base = dt.address;
7317         kvm_x86_ops->get_gdt(vcpu, &dt);
7318         sregs->gdt.limit = dt.size;
7319         sregs->gdt.base = dt.address;
7320
7321         sregs->cr0 = kvm_read_cr0(vcpu);
7322         sregs->cr2 = vcpu->arch.cr2;
7323         sregs->cr3 = kvm_read_cr3(vcpu);
7324         sregs->cr4 = kvm_read_cr4(vcpu);
7325         sregs->cr8 = kvm_get_cr8(vcpu);
7326         sregs->efer = vcpu->arch.efer;
7327         sregs->apic_base = kvm_get_apic_base(vcpu);
7328
7329         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
7330
7331         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
7332                 set_bit(vcpu->arch.interrupt.nr,
7333                         (unsigned long *)sregs->interrupt_bitmap);
7334
7335         return 0;
7336 }
7337
7338 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
7339                                     struct kvm_mp_state *mp_state)
7340 {
7341         kvm_apic_accept_events(vcpu);
7342         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
7343                                         vcpu->arch.pv.pv_unhalted)
7344                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
7345         else
7346                 mp_state->mp_state = vcpu->arch.mp_state;
7347
7348         return 0;
7349 }
7350
7351 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
7352                                     struct kvm_mp_state *mp_state)
7353 {
7354         if (!lapic_in_kernel(vcpu) &&
7355             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
7356                 return -EINVAL;
7357
7358         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
7359                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
7360                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
7361         } else
7362                 vcpu->arch.mp_state = mp_state->mp_state;
7363         kvm_make_request(KVM_REQ_EVENT, vcpu);
7364         return 0;
7365 }
7366
7367 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
7368                     int reason, bool has_error_code, u32 error_code)
7369 {
7370         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
7371         int ret;
7372
7373         init_emulate_ctxt(vcpu);
7374
7375         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
7376                                    has_error_code, error_code);
7377
7378         if (ret)
7379                 return EMULATE_FAIL;
7380
7381         kvm_rip_write(vcpu, ctxt->eip);
7382         kvm_set_rflags(vcpu, ctxt->eflags);
7383         kvm_make_request(KVM_REQ_EVENT, vcpu);
7384         return EMULATE_DONE;
7385 }
7386 EXPORT_SYMBOL_GPL(kvm_task_switch);
7387
7388 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
7389                                   struct kvm_sregs *sregs)
7390 {
7391         struct msr_data apic_base_msr;
7392         int mmu_reset_needed = 0;
7393         int pending_vec, max_bits, idx;
7394         struct desc_ptr dt;
7395
7396         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
7397                 return -EINVAL;
7398
7399         dt.size = sregs->idt.limit;
7400         dt.address = sregs->idt.base;
7401         kvm_x86_ops->set_idt(vcpu, &dt);
7402         dt.size = sregs->gdt.limit;
7403         dt.address = sregs->gdt.base;
7404         kvm_x86_ops->set_gdt(vcpu, &dt);
7405
7406         vcpu->arch.cr2 = sregs->cr2;
7407         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
7408         vcpu->arch.cr3 = sregs->cr3;
7409         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
7410
7411         kvm_set_cr8(vcpu, sregs->cr8);
7412
7413         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
7414         kvm_x86_ops->set_efer(vcpu, sregs->efer);
7415         apic_base_msr.data = sregs->apic_base;
7416         apic_base_msr.host_initiated = true;
7417         kvm_set_apic_base(vcpu, &apic_base_msr);
7418
7419         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
7420         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
7421         vcpu->arch.cr0 = sregs->cr0;
7422
7423         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
7424         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
7425         if (sregs->cr4 & (X86_CR4_OSXSAVE | X86_CR4_PKE))
7426                 kvm_update_cpuid(vcpu);
7427
7428         idx = srcu_read_lock(&vcpu->kvm->srcu);
7429         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
7430                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
7431                 mmu_reset_needed = 1;
7432         }
7433         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7434
7435         if (mmu_reset_needed)
7436                 kvm_mmu_reset_context(vcpu);
7437
7438         max_bits = KVM_NR_INTERRUPTS;
7439         pending_vec = find_first_bit(
7440                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
7441         if (pending_vec < max_bits) {
7442                 kvm_queue_interrupt(vcpu, pending_vec, false);
7443                 pr_debug("Set back pending irq %d\n", pending_vec);
7444         }
7445
7446         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7447         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7448         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7449         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7450         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7451         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7452
7453         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7454         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7455
7456         update_cr8_intercept(vcpu);
7457
7458         /* Older userspace won't unhalt the vcpu on reset. */
7459         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
7460             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
7461             !is_protmode(vcpu))
7462                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7463
7464         kvm_make_request(KVM_REQ_EVENT, vcpu);
7465
7466         return 0;
7467 }
7468
7469 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
7470                                         struct kvm_guest_debug *dbg)
7471 {
7472         unsigned long rflags;
7473         int i, r;
7474
7475         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
7476                 r = -EBUSY;
7477                 if (vcpu->arch.exception.pending)
7478                         goto out;
7479                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
7480                         kvm_queue_exception(vcpu, DB_VECTOR);
7481                 else
7482                         kvm_queue_exception(vcpu, BP_VECTOR);
7483         }
7484
7485         /*
7486          * Read rflags as long as potentially injected trace flags are still
7487          * filtered out.
7488          */
7489         rflags = kvm_get_rflags(vcpu);
7490
7491         vcpu->guest_debug = dbg->control;
7492         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
7493                 vcpu->guest_debug = 0;
7494
7495         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
7496                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
7497                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
7498                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
7499         } else {
7500                 for (i = 0; i < KVM_NR_DB_REGS; i++)
7501                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
7502         }
7503         kvm_update_dr7(vcpu);
7504
7505         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7506                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
7507                         get_segment_base(vcpu, VCPU_SREG_CS);
7508
7509         /*
7510          * Trigger an rflags update that will inject or remove the trace
7511          * flags.
7512          */
7513         kvm_set_rflags(vcpu, rflags);
7514
7515         kvm_x86_ops->update_bp_intercept(vcpu);
7516
7517         r = 0;
7518
7519 out:
7520
7521         return r;
7522 }
7523
7524 /*
7525  * Translate a guest virtual address to a guest physical address.
7526  */
7527 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
7528                                     struct kvm_translation *tr)
7529 {
7530         unsigned long vaddr = tr->linear_address;
7531         gpa_t gpa;
7532         int idx;
7533
7534         idx = srcu_read_lock(&vcpu->kvm->srcu);
7535         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
7536         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7537         tr->physical_address = gpa;
7538         tr->valid = gpa != UNMAPPED_GVA;
7539         tr->writeable = 1;
7540         tr->usermode = 0;
7541
7542         return 0;
7543 }
7544
7545 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7546 {
7547         struct fxregs_state *fxsave =
7548                         &vcpu->arch.guest_fpu.state.fxsave;
7549
7550         memcpy(fpu->fpr, fxsave->st_space, 128);
7551         fpu->fcw = fxsave->cwd;
7552         fpu->fsw = fxsave->swd;
7553         fpu->ftwx = fxsave->twd;
7554         fpu->last_opcode = fxsave->fop;
7555         fpu->last_ip = fxsave->rip;
7556         fpu->last_dp = fxsave->rdp;
7557         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
7558
7559         return 0;
7560 }
7561
7562 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7563 {
7564         struct fxregs_state *fxsave =
7565                         &vcpu->arch.guest_fpu.state.fxsave;
7566
7567         memcpy(fxsave->st_space, fpu->fpr, 128);
7568         fxsave->cwd = fpu->fcw;
7569         fxsave->swd = fpu->fsw;
7570         fxsave->twd = fpu->ftwx;
7571         fxsave->fop = fpu->last_opcode;
7572         fxsave->rip = fpu->last_ip;
7573         fxsave->rdp = fpu->last_dp;
7574         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
7575
7576         return 0;
7577 }
7578
7579 static void fx_init(struct kvm_vcpu *vcpu)
7580 {
7581         fpstate_init(&vcpu->arch.guest_fpu.state);
7582         if (boot_cpu_has(X86_FEATURE_XSAVES))
7583                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
7584                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
7585
7586         /*
7587          * Ensure guest xcr0 is valid for loading
7588          */
7589         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
7590
7591         vcpu->arch.cr0 |= X86_CR0_ET;
7592 }
7593
7594 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7595 {
7596         if (vcpu->guest_fpu_loaded)
7597                 return;
7598
7599         /*
7600          * Restore all possible states in the guest,
7601          * and assume host would use all available bits.
7602          * Guest xcr0 would be loaded later.
7603          */
7604         vcpu->guest_fpu_loaded = 1;
7605         __kernel_fpu_begin();
7606         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state);
7607         trace_kvm_fpu(1);
7608 }
7609
7610 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7611 {
7612         if (!vcpu->guest_fpu_loaded)
7613                 return;
7614
7615         vcpu->guest_fpu_loaded = 0;
7616         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
7617         __kernel_fpu_end();
7618         ++vcpu->stat.fpu_reload;
7619         trace_kvm_fpu(0);
7620 }
7621
7622 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7623 {
7624         void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
7625
7626         kvmclock_reset(vcpu);
7627
7628         kvm_x86_ops->vcpu_free(vcpu);
7629         free_cpumask_var(wbinvd_dirty_mask);
7630 }
7631
7632 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7633                                                 unsigned int id)
7634 {
7635         struct kvm_vcpu *vcpu;
7636
7637         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7638                 printk_once(KERN_WARNING
7639                 "kvm: SMP vm created on host with unstable TSC; "
7640                 "guest TSC will not be reliable\n");
7641
7642         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
7643
7644         return vcpu;
7645 }
7646
7647 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7648 {
7649         int r;
7650
7651         kvm_vcpu_mtrr_init(vcpu);
7652         r = vcpu_load(vcpu);
7653         if (r)
7654                 return r;
7655         kvm_vcpu_reset(vcpu, false);
7656         kvm_mmu_setup(vcpu);
7657         vcpu_put(vcpu);
7658         return r;
7659 }
7660
7661 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7662 {
7663         struct msr_data msr;
7664         struct kvm *kvm = vcpu->kvm;
7665
7666         if (vcpu_load(vcpu))
7667                 return;
7668         msr.data = 0x0;
7669         msr.index = MSR_IA32_TSC;
7670         msr.host_initiated = true;
7671         kvm_write_tsc(vcpu, &msr);
7672         vcpu_put(vcpu);
7673
7674         if (!kvmclock_periodic_sync)
7675                 return;
7676
7677         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7678                                         KVMCLOCK_SYNC_PERIOD);
7679 }
7680
7681 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7682 {
7683         int r;
7684         vcpu->arch.apf.msr_val = 0;
7685
7686         r = vcpu_load(vcpu);
7687         BUG_ON(r);
7688         kvm_mmu_unload(vcpu);
7689         vcpu_put(vcpu);
7690
7691         kvm_x86_ops->vcpu_free(vcpu);
7692 }
7693
7694 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
7695 {
7696         vcpu->arch.hflags = 0;
7697
7698         vcpu->arch.smi_pending = 0;
7699         atomic_set(&vcpu->arch.nmi_queued, 0);
7700         vcpu->arch.nmi_pending = 0;
7701         vcpu->arch.nmi_injected = false;
7702         kvm_clear_interrupt_queue(vcpu);
7703         kvm_clear_exception_queue(vcpu);
7704
7705         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7706         kvm_update_dr0123(vcpu);
7707         vcpu->arch.dr6 = DR6_INIT;
7708         kvm_update_dr6(vcpu);
7709         vcpu->arch.dr7 = DR7_FIXED_1;
7710         kvm_update_dr7(vcpu);
7711
7712         vcpu->arch.cr2 = 0;
7713
7714         kvm_make_request(KVM_REQ_EVENT, vcpu);
7715         vcpu->arch.apf.msr_val = 0;
7716         vcpu->arch.st.msr_val = 0;
7717
7718         kvmclock_reset(vcpu);
7719
7720         kvm_clear_async_pf_completion_queue(vcpu);
7721         kvm_async_pf_hash_reset(vcpu);
7722         vcpu->arch.apf.halted = false;
7723
7724         if (!init_event) {
7725                 kvm_pmu_reset(vcpu);
7726                 vcpu->arch.smbase = 0x30000;
7727         }
7728
7729         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7730         vcpu->arch.regs_avail = ~0;
7731         vcpu->arch.regs_dirty = ~0;
7732
7733         kvm_x86_ops->vcpu_reset(vcpu, init_event);
7734 }
7735
7736 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7737 {
7738         struct kvm_segment cs;
7739
7740         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7741         cs.selector = vector << 8;
7742         cs.base = vector << 12;
7743         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7744         kvm_rip_write(vcpu, 0);
7745 }
7746
7747 int kvm_arch_hardware_enable(void)
7748 {
7749         struct kvm *kvm;
7750         struct kvm_vcpu *vcpu;
7751         int i;
7752         int ret;
7753         u64 local_tsc;
7754         u64 max_tsc = 0;
7755         bool stable, backwards_tsc = false;
7756
7757         kvm_shared_msr_cpu_online();
7758         ret = kvm_x86_ops->hardware_enable();
7759         if (ret != 0)
7760                 return ret;
7761
7762         local_tsc = rdtsc();
7763         stable = !check_tsc_unstable();
7764         list_for_each_entry(kvm, &vm_list, vm_list) {
7765                 kvm_for_each_vcpu(i, vcpu, kvm) {
7766                         if (!stable && vcpu->cpu == smp_processor_id())
7767                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7768                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7769                                 backwards_tsc = true;
7770                                 if (vcpu->arch.last_host_tsc > max_tsc)
7771                                         max_tsc = vcpu->arch.last_host_tsc;
7772                         }
7773                 }
7774         }
7775
7776         /*
7777          * Sometimes, even reliable TSCs go backwards.  This happens on
7778          * platforms that reset TSC during suspend or hibernate actions, but
7779          * maintain synchronization.  We must compensate.  Fortunately, we can
7780          * detect that condition here, which happens early in CPU bringup,
7781          * before any KVM threads can be running.  Unfortunately, we can't
7782          * bring the TSCs fully up to date with real time, as we aren't yet far
7783          * enough into CPU bringup that we know how much real time has actually
7784          * elapsed; our helper function, ktime_get_boot_ns() will be using boot
7785          * variables that haven't been updated yet.
7786          *
7787          * So we simply find the maximum observed TSC above, then record the
7788          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
7789          * the adjustment will be applied.  Note that we accumulate
7790          * adjustments, in case multiple suspend cycles happen before some VCPU
7791          * gets a chance to run again.  In the event that no KVM threads get a
7792          * chance to run, we will miss the entire elapsed period, as we'll have
7793          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7794          * loose cycle time.  This isn't too big a deal, since the loss will be
7795          * uniform across all VCPUs (not to mention the scenario is extremely
7796          * unlikely). It is possible that a second hibernate recovery happens
7797          * much faster than a first, causing the observed TSC here to be
7798          * smaller; this would require additional padding adjustment, which is
7799          * why we set last_host_tsc to the local tsc observed here.
7800          *
7801          * N.B. - this code below runs only on platforms with reliable TSC,
7802          * as that is the only way backwards_tsc is set above.  Also note
7803          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7804          * have the same delta_cyc adjustment applied if backwards_tsc
7805          * is detected.  Note further, this adjustment is only done once,
7806          * as we reset last_host_tsc on all VCPUs to stop this from being
7807          * called multiple times (one for each physical CPU bringup).
7808          *
7809          * Platforms with unreliable TSCs don't have to deal with this, they
7810          * will be compensated by the logic in vcpu_load, which sets the TSC to
7811          * catchup mode.  This will catchup all VCPUs to real time, but cannot
7812          * guarantee that they stay in perfect synchronization.
7813          */
7814         if (backwards_tsc) {
7815                 u64 delta_cyc = max_tsc - local_tsc;
7816                 backwards_tsc_observed = true;
7817                 list_for_each_entry(kvm, &vm_list, vm_list) {
7818                         kvm_for_each_vcpu(i, vcpu, kvm) {
7819                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7820                                 vcpu->arch.last_host_tsc = local_tsc;
7821                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7822                         }
7823
7824                         /*
7825                          * We have to disable TSC offset matching.. if you were
7826                          * booting a VM while issuing an S4 host suspend....
7827                          * you may have some problem.  Solving this issue is
7828                          * left as an exercise to the reader.
7829                          */
7830                         kvm->arch.last_tsc_nsec = 0;
7831                         kvm->arch.last_tsc_write = 0;
7832                 }
7833
7834         }
7835         return 0;
7836 }
7837
7838 void kvm_arch_hardware_disable(void)
7839 {
7840         kvm_x86_ops->hardware_disable();
7841         drop_user_return_notifiers();
7842 }
7843
7844 int kvm_arch_hardware_setup(void)
7845 {
7846         int r;
7847
7848         r = kvm_x86_ops->hardware_setup();
7849         if (r != 0)
7850                 return r;
7851
7852         if (kvm_has_tsc_control) {
7853                 /*
7854                  * Make sure the user can only configure tsc_khz values that
7855                  * fit into a signed integer.
7856                  * A min value is not calculated needed because it will always
7857                  * be 1 on all machines.
7858                  */
7859                 u64 max = min(0x7fffffffULL,
7860                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
7861                 kvm_max_guest_tsc_khz = max;
7862
7863                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
7864         }
7865
7866         kvm_init_msr_list();
7867         return 0;
7868 }
7869
7870 void kvm_arch_hardware_unsetup(void)
7871 {
7872         kvm_x86_ops->hardware_unsetup();
7873 }
7874
7875 void kvm_arch_check_processor_compat(void *rtn)
7876 {
7877         kvm_x86_ops->check_processor_compatibility(rtn);
7878 }
7879
7880 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
7881 {
7882         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
7883 }
7884 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
7885
7886 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
7887 {
7888         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
7889 }
7890
7891 struct static_key kvm_no_apic_vcpu __read_mostly;
7892 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
7893
7894 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7895 {
7896         struct page *page;
7897         struct kvm *kvm;
7898         int r;
7899
7900         BUG_ON(vcpu->kvm == NULL);
7901         kvm = vcpu->kvm;
7902
7903         vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv();
7904         vcpu->arch.pv.pv_unhalted = false;
7905         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7906         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_reset_bsp(vcpu))
7907                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7908         else
7909                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7910
7911         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7912         if (!page) {
7913                 r = -ENOMEM;
7914                 goto fail;
7915         }
7916         vcpu->arch.pio_data = page_address(page);
7917
7918         kvm_set_tsc_khz(vcpu, max_tsc_khz);
7919
7920         r = kvm_mmu_create(vcpu);
7921         if (r < 0)
7922                 goto fail_free_pio_data;
7923
7924         if (irqchip_in_kernel(kvm)) {
7925                 r = kvm_create_lapic(vcpu);
7926                 if (r < 0)
7927                         goto fail_mmu_destroy;
7928         } else
7929                 static_key_slow_inc(&kvm_no_apic_vcpu);
7930
7931         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7932                                        GFP_KERNEL);
7933         if (!vcpu->arch.mce_banks) {
7934                 r = -ENOMEM;
7935                 goto fail_free_lapic;
7936         }
7937         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7938
7939         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7940                 r = -ENOMEM;
7941                 goto fail_free_mce_banks;
7942         }
7943
7944         fx_init(vcpu);
7945
7946         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7947         vcpu->arch.pv_time_enabled = false;
7948
7949         vcpu->arch.guest_supported_xcr0 = 0;
7950         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7951
7952         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
7953
7954         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
7955
7956         kvm_async_pf_hash_reset(vcpu);
7957         kvm_pmu_init(vcpu);
7958
7959         vcpu->arch.pending_external_vector = -1;
7960
7961         kvm_hv_vcpu_init(vcpu);
7962
7963         return 0;
7964
7965 fail_free_mce_banks:
7966         kfree(vcpu->arch.mce_banks);
7967 fail_free_lapic:
7968         kvm_free_lapic(vcpu);
7969 fail_mmu_destroy:
7970         kvm_mmu_destroy(vcpu);
7971 fail_free_pio_data:
7972         free_page((unsigned long)vcpu->arch.pio_data);
7973 fail:
7974         return r;
7975 }
7976
7977 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
7978 {
7979         int idx;
7980
7981         kvm_hv_vcpu_uninit(vcpu);
7982         kvm_pmu_destroy(vcpu);
7983         kfree(vcpu->arch.mce_banks);
7984         kvm_free_lapic(vcpu);
7985         idx = srcu_read_lock(&vcpu->kvm->srcu);
7986         kvm_mmu_destroy(vcpu);
7987         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7988         free_page((unsigned long)vcpu->arch.pio_data);
7989         if (!lapic_in_kernel(vcpu))
7990                 static_key_slow_dec(&kvm_no_apic_vcpu);
7991 }
7992
7993 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
7994 {
7995         kvm_x86_ops->sched_in(vcpu, cpu);
7996 }
7997
7998 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
7999 {
8000         if (type)
8001                 return -EINVAL;
8002
8003         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
8004         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
8005         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
8006         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
8007         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
8008
8009         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
8010         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
8011         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
8012         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
8013                 &kvm->arch.irq_sources_bitmap);
8014
8015         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
8016         mutex_init(&kvm->arch.apic_map_lock);
8017         mutex_init(&kvm->arch.hyperv.hv_lock);
8018         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
8019
8020         kvm->arch.kvmclock_offset = -ktime_get_boot_ns();
8021         pvclock_update_vm_gtod_copy(kvm);
8022
8023         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
8024         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
8025
8026         kvm_page_track_init(kvm);
8027         kvm_mmu_init_vm(kvm);
8028
8029         if (kvm_x86_ops->vm_init)
8030                 return kvm_x86_ops->vm_init(kvm);
8031
8032         return 0;
8033 }
8034
8035 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
8036 {
8037         int r;
8038         r = vcpu_load(vcpu);
8039         BUG_ON(r);
8040         kvm_mmu_unload(vcpu);
8041         vcpu_put(vcpu);
8042 }
8043
8044 static void kvm_free_vcpus(struct kvm *kvm)
8045 {
8046         unsigned int i;
8047         struct kvm_vcpu *vcpu;
8048
8049         /*
8050          * Unpin any mmu pages first.
8051          */
8052         kvm_for_each_vcpu(i, vcpu, kvm) {
8053                 kvm_clear_async_pf_completion_queue(vcpu);
8054                 kvm_unload_vcpu_mmu(vcpu);
8055         }
8056         kvm_for_each_vcpu(i, vcpu, kvm)
8057                 kvm_arch_vcpu_free(vcpu);
8058
8059         mutex_lock(&kvm->lock);
8060         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
8061                 kvm->vcpus[i] = NULL;
8062
8063         atomic_set(&kvm->online_vcpus, 0);
8064         mutex_unlock(&kvm->lock);
8065 }
8066
8067 void kvm_arch_sync_events(struct kvm *kvm)
8068 {
8069         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
8070         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
8071         kvm_free_all_assigned_devices(kvm);
8072         kvm_free_pit(kvm);
8073 }
8074
8075 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
8076 {
8077         int i, r;
8078         unsigned long hva;
8079         struct kvm_memslots *slots = kvm_memslots(kvm);
8080         struct kvm_memory_slot *slot, old;
8081
8082         /* Called with kvm->slots_lock held.  */
8083         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
8084                 return -EINVAL;
8085
8086         slot = id_to_memslot(slots, id);
8087         if (size) {
8088                 if (slot->npages)
8089                         return -EEXIST;
8090
8091                 /*
8092                  * MAP_SHARED to prevent internal slot pages from being moved
8093                  * by fork()/COW.
8094                  */
8095                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
8096                               MAP_SHARED | MAP_ANONYMOUS, 0);
8097                 if (IS_ERR((void *)hva))
8098                         return PTR_ERR((void *)hva);
8099         } else {
8100                 if (!slot->npages)
8101                         return 0;
8102
8103                 hva = 0;
8104         }
8105
8106         old = *slot;
8107         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
8108                 struct kvm_userspace_memory_region m;
8109
8110                 m.slot = id | (i << 16);
8111                 m.flags = 0;
8112                 m.guest_phys_addr = gpa;
8113                 m.userspace_addr = hva;
8114                 m.memory_size = size;
8115                 r = __kvm_set_memory_region(kvm, &m);
8116                 if (r < 0)
8117                         return r;
8118         }
8119
8120         if (!size) {
8121                 r = vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
8122                 WARN_ON(r < 0);
8123         }
8124
8125         return 0;
8126 }
8127 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
8128
8129 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
8130 {
8131         int r;
8132
8133         mutex_lock(&kvm->slots_lock);
8134         r = __x86_set_memory_region(kvm, id, gpa, size);
8135         mutex_unlock(&kvm->slots_lock);
8136
8137         return r;
8138 }
8139 EXPORT_SYMBOL_GPL(x86_set_memory_region);
8140
8141 void kvm_arch_destroy_vm(struct kvm *kvm)
8142 {
8143         if (current->mm == kvm->mm) {
8144                 /*
8145                  * Free memory regions allocated on behalf of userspace,
8146                  * unless the the memory map has changed due to process exit
8147                  * or fd copying.
8148                  */
8149                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
8150                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
8151                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
8152         }
8153         if (kvm_x86_ops->vm_destroy)
8154                 kvm_x86_ops->vm_destroy(kvm);
8155         kvm_iommu_unmap_guest(kvm);
8156         kvm_pic_destroy(kvm);
8157         kvm_ioapic_destroy(kvm);
8158         kvm_free_vcpus(kvm);
8159         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
8160         kvm_mmu_uninit_vm(kvm);
8161         kvm_page_track_cleanup(kvm);
8162 }
8163
8164 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
8165                            struct kvm_memory_slot *dont)
8166 {
8167         int i;
8168
8169         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8170                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
8171                         kvfree(free->arch.rmap[i]);
8172                         free->arch.rmap[i] = NULL;
8173                 }
8174                 if (i == 0)
8175                         continue;
8176
8177                 if (!dont || free->arch.lpage_info[i - 1] !=
8178                              dont->arch.lpage_info[i - 1]) {
8179                         kvfree(free->arch.lpage_info[i - 1]);
8180                         free->arch.lpage_info[i - 1] = NULL;
8181                 }
8182         }
8183
8184         kvm_page_track_free_memslot(free, dont);
8185 }
8186
8187 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
8188                             unsigned long npages)
8189 {
8190         int i;
8191
8192         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8193                 struct kvm_lpage_info *linfo;
8194                 unsigned long ugfn;
8195                 int lpages;
8196                 int level = i + 1;
8197
8198                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
8199                                       slot->base_gfn, level) + 1;
8200
8201                 slot->arch.rmap[i] =
8202                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
8203                 if (!slot->arch.rmap[i])
8204                         goto out_free;
8205                 if (i == 0)
8206                         continue;
8207
8208                 linfo = kvm_kvzalloc(lpages * sizeof(*linfo));
8209                 if (!linfo)
8210                         goto out_free;
8211
8212                 slot->arch.lpage_info[i - 1] = linfo;
8213
8214                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
8215                         linfo[0].disallow_lpage = 1;
8216                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
8217                         linfo[lpages - 1].disallow_lpage = 1;
8218                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
8219                 /*
8220                  * If the gfn and userspace address are not aligned wrt each
8221                  * other, or if explicitly asked to, disable large page
8222                  * support for this slot
8223                  */
8224                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
8225                     !kvm_largepages_enabled()) {
8226                         unsigned long j;
8227
8228                         for (j = 0; j < lpages; ++j)
8229                                 linfo[j].disallow_lpage = 1;
8230                 }
8231         }
8232
8233         if (kvm_page_track_create_memslot(slot, npages))
8234                 goto out_free;
8235
8236         return 0;
8237
8238 out_free:
8239         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8240                 kvfree(slot->arch.rmap[i]);
8241                 slot->arch.rmap[i] = NULL;
8242                 if (i == 0)
8243                         continue;
8244
8245                 kvfree(slot->arch.lpage_info[i - 1]);
8246                 slot->arch.lpage_info[i - 1] = NULL;
8247         }
8248         return -ENOMEM;
8249 }
8250
8251 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
8252 {
8253         /*
8254          * memslots->generation has been incremented.
8255          * mmio generation may have reached its maximum value.
8256          */
8257         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
8258 }
8259
8260 int kvm_arch_prepare_memory_region(struct kvm *kvm,
8261                                 struct kvm_memory_slot *memslot,
8262                                 const struct kvm_userspace_memory_region *mem,
8263                                 enum kvm_mr_change change)
8264 {
8265         return 0;
8266 }
8267
8268 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
8269                                      struct kvm_memory_slot *new)
8270 {
8271         /* Still write protect RO slot */
8272         if (new->flags & KVM_MEM_READONLY) {
8273                 kvm_mmu_slot_remove_write_access(kvm, new);
8274                 return;
8275         }
8276
8277         /*
8278          * Call kvm_x86_ops dirty logging hooks when they are valid.
8279          *
8280          * kvm_x86_ops->slot_disable_log_dirty is called when:
8281          *
8282          *  - KVM_MR_CREATE with dirty logging is disabled
8283          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8284          *
8285          * The reason is, in case of PML, we need to set D-bit for any slots
8286          * with dirty logging disabled in order to eliminate unnecessary GPA
8287          * logging in PML buffer (and potential PML buffer full VMEXT). This
8288          * guarantees leaving PML enabled during guest's lifetime won't have
8289          * any additonal overhead from PML when guest is running with dirty
8290          * logging disabled for memory slots.
8291          *
8292          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8293          * to dirty logging mode.
8294          *
8295          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8296          *
8297          * In case of write protect:
8298          *
8299          * Write protect all pages for dirty logging.
8300          *
8301          * All the sptes including the large sptes which point to this
8302          * slot are set to readonly. We can not create any new large
8303          * spte on this slot until the end of the logging.
8304          *
8305          * See the comments in fast_page_fault().
8306          */
8307         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
8308                 if (kvm_x86_ops->slot_enable_log_dirty)
8309                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
8310                 else
8311                         kvm_mmu_slot_remove_write_access(kvm, new);
8312         } else {
8313                 if (kvm_x86_ops->slot_disable_log_dirty)
8314                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
8315         }
8316 }
8317
8318 void kvm_arch_commit_memory_region(struct kvm *kvm,
8319                                 const struct kvm_userspace_memory_region *mem,
8320                                 const struct kvm_memory_slot *old,
8321                                 const struct kvm_memory_slot *new,
8322                                 enum kvm_mr_change change)
8323 {
8324         int nr_mmu_pages = 0;
8325
8326         if (!kvm->arch.n_requested_mmu_pages)
8327                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
8328
8329         if (nr_mmu_pages)
8330                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
8331
8332         /*
8333          * Dirty logging tracks sptes in 4k granularity, meaning that large
8334          * sptes have to be split.  If live migration is successful, the guest
8335          * in the source machine will be destroyed and large sptes will be
8336          * created in the destination. However, if the guest continues to run
8337          * in the source machine (for example if live migration fails), small
8338          * sptes will remain around and cause bad performance.
8339          *
8340          * Scan sptes if dirty logging has been stopped, dropping those
8341          * which can be collapsed into a single large-page spte.  Later
8342          * page faults will create the large-page sptes.
8343          */
8344         if ((change != KVM_MR_DELETE) &&
8345                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
8346                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
8347                 kvm_mmu_zap_collapsible_sptes(kvm, new);
8348
8349         /*
8350          * Set up write protection and/or dirty logging for the new slot.
8351          *
8352          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8353          * been zapped so no dirty logging staff is needed for old slot. For
8354          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8355          * new and it's also covered when dealing with the new slot.
8356          *
8357          * FIXME: const-ify all uses of struct kvm_memory_slot.
8358          */
8359         if (change != KVM_MR_DELETE)
8360                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
8361 }
8362
8363 void kvm_arch_flush_shadow_all(struct kvm *kvm)
8364 {
8365         kvm_mmu_invalidate_zap_all_pages(kvm);
8366 }
8367
8368 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
8369                                    struct kvm_memory_slot *slot)
8370 {
8371         kvm_page_track_flush_slot(kvm, slot);
8372 }
8373
8374 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
8375 {
8376         if (!list_empty_careful(&vcpu->async_pf.done))
8377                 return true;
8378
8379         if (kvm_apic_has_events(vcpu))
8380                 return true;
8381
8382         if (vcpu->arch.pv.pv_unhalted)
8383                 return true;
8384
8385         if (atomic_read(&vcpu->arch.nmi_queued))
8386                 return true;
8387
8388         if (test_bit(KVM_REQ_SMI, &vcpu->requests))
8389                 return true;
8390
8391         if (kvm_arch_interrupt_allowed(vcpu) &&
8392             kvm_cpu_has_interrupt(vcpu))
8393                 return true;
8394
8395         if (kvm_hv_has_stimer_pending(vcpu))
8396                 return true;
8397
8398         return false;
8399 }
8400
8401 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
8402 {
8403         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
8404 }
8405
8406 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
8407 {
8408         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
8409 }
8410
8411 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
8412 {
8413         return kvm_x86_ops->interrupt_allowed(vcpu);
8414 }
8415
8416 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
8417 {
8418         if (is_64_bit_mode(vcpu))
8419                 return kvm_rip_read(vcpu);
8420         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
8421                      kvm_rip_read(vcpu));
8422 }
8423 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
8424
8425 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
8426 {
8427         return kvm_get_linear_rip(vcpu) == linear_rip;
8428 }
8429 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
8430
8431 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
8432 {
8433         unsigned long rflags;
8434
8435         rflags = kvm_x86_ops->get_rflags(vcpu);
8436         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8437                 rflags &= ~X86_EFLAGS_TF;
8438         return rflags;
8439 }
8440 EXPORT_SYMBOL_GPL(kvm_get_rflags);
8441
8442 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8443 {
8444         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
8445             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
8446                 rflags |= X86_EFLAGS_TF;
8447         kvm_x86_ops->set_rflags(vcpu, rflags);
8448 }
8449
8450 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8451 {
8452         __kvm_set_rflags(vcpu, rflags);
8453         kvm_make_request(KVM_REQ_EVENT, vcpu);
8454 }
8455 EXPORT_SYMBOL_GPL(kvm_set_rflags);
8456
8457 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
8458 {
8459         int r;
8460
8461         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
8462               work->wakeup_all)
8463                 return;
8464
8465         r = kvm_mmu_reload(vcpu);
8466         if (unlikely(r))
8467                 return;
8468
8469         if (!vcpu->arch.mmu.direct_map &&
8470               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
8471                 return;
8472
8473         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
8474 }
8475
8476 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
8477 {
8478         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
8479 }
8480
8481 static inline u32 kvm_async_pf_next_probe(u32 key)
8482 {
8483         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
8484 }
8485
8486 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8487 {
8488         u32 key = kvm_async_pf_hash_fn(gfn);
8489
8490         while (vcpu->arch.apf.gfns[key] != ~0)
8491                 key = kvm_async_pf_next_probe(key);
8492
8493         vcpu->arch.apf.gfns[key] = gfn;
8494 }
8495
8496 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
8497 {
8498         int i;
8499         u32 key = kvm_async_pf_hash_fn(gfn);
8500
8501         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
8502                      (vcpu->arch.apf.gfns[key] != gfn &&
8503                       vcpu->arch.apf.gfns[key] != ~0); i++)
8504                 key = kvm_async_pf_next_probe(key);
8505
8506         return key;
8507 }
8508
8509 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8510 {
8511         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
8512 }
8513
8514 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8515 {
8516         u32 i, j, k;
8517
8518         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
8519         while (true) {
8520                 vcpu->arch.apf.gfns[i] = ~0;
8521                 do {
8522                         j = kvm_async_pf_next_probe(j);
8523                         if (vcpu->arch.apf.gfns[j] == ~0)
8524                                 return;
8525                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
8526                         /*
8527                          * k lies cyclically in ]i,j]
8528                          * |    i.k.j |
8529                          * |....j i.k.| or  |.k..j i...|
8530                          */
8531                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
8532                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
8533                 i = j;
8534         }
8535 }
8536
8537 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
8538 {
8539         return kvm_vcpu_write_guest_cached(vcpu, &vcpu->arch.apf.data, &val,
8540                                            sizeof(val));
8541 }
8542
8543 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
8544                                      struct kvm_async_pf *work)
8545 {
8546         struct x86_exception fault;
8547
8548         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
8549         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
8550
8551         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
8552             (vcpu->arch.apf.send_user_only &&
8553              kvm_x86_ops->get_cpl(vcpu) == 0))
8554                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
8555         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
8556                 fault.vector = PF_VECTOR;
8557                 fault.error_code_valid = true;
8558                 fault.error_code = 0;
8559                 fault.nested_page_fault = false;
8560                 fault.address = work->arch.token;
8561                 kvm_inject_page_fault(vcpu, &fault);
8562         }
8563 }
8564
8565 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
8566                                  struct kvm_async_pf *work)
8567 {
8568         struct x86_exception fault;
8569
8570         if (work->wakeup_all)
8571                 work->arch.token = ~0; /* broadcast wakeup */
8572         else
8573                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
8574         trace_kvm_async_pf_ready(work->arch.token, work->gva);
8575
8576         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
8577             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
8578                 fault.vector = PF_VECTOR;
8579                 fault.error_code_valid = true;
8580                 fault.error_code = 0;
8581                 fault.nested_page_fault = false;
8582                 fault.address = work->arch.token;
8583                 kvm_inject_page_fault(vcpu, &fault);
8584         }
8585         vcpu->arch.apf.halted = false;
8586         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8587 }
8588
8589 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
8590 {
8591         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
8592                 return true;
8593         else
8594                 return !kvm_event_needs_reinjection(vcpu) &&
8595                         kvm_x86_ops->interrupt_allowed(vcpu);
8596 }
8597
8598 void kvm_arch_start_assignment(struct kvm *kvm)
8599 {
8600         atomic_inc(&kvm->arch.assigned_device_count);
8601 }
8602 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
8603
8604 void kvm_arch_end_assignment(struct kvm *kvm)
8605 {
8606         atomic_dec(&kvm->arch.assigned_device_count);
8607 }
8608 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
8609
8610 bool kvm_arch_has_assigned_device(struct kvm *kvm)
8611 {
8612         return atomic_read(&kvm->arch.assigned_device_count);
8613 }
8614 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
8615
8616 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
8617 {
8618         atomic_inc(&kvm->arch.noncoherent_dma_count);
8619 }
8620 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
8621
8622 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
8623 {
8624         atomic_dec(&kvm->arch.noncoherent_dma_count);
8625 }
8626 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
8627
8628 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
8629 {
8630         return atomic_read(&kvm->arch.noncoherent_dma_count);
8631 }
8632 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
8633
8634 bool kvm_arch_has_irq_bypass(void)
8635 {
8636         return kvm_x86_ops->update_pi_irte != NULL;
8637 }
8638
8639 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
8640                                       struct irq_bypass_producer *prod)
8641 {
8642         struct kvm_kernel_irqfd *irqfd =
8643                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8644
8645         irqfd->producer = prod;
8646
8647         return kvm_x86_ops->update_pi_irte(irqfd->kvm,
8648                                            prod->irq, irqfd->gsi, 1);
8649 }
8650
8651 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
8652                                       struct irq_bypass_producer *prod)
8653 {
8654         int ret;
8655         struct kvm_kernel_irqfd *irqfd =
8656                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8657
8658         WARN_ON(irqfd->producer != prod);
8659         irqfd->producer = NULL;
8660
8661         /*
8662          * When producer of consumer is unregistered, we change back to
8663          * remapped mode, so we can re-use the current implementation
8664          * when the irq is masked/disabled or the consumer side (KVM
8665          * int this case doesn't want to receive the interrupts.
8666         */
8667         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
8668         if (ret)
8669                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
8670                        " fails: %d\n", irqfd->consumer.token, ret);
8671 }
8672
8673 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
8674                                    uint32_t guest_irq, bool set)
8675 {
8676         if (!kvm_x86_ops->update_pi_irte)
8677                 return -EINVAL;
8678
8679         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
8680 }
8681
8682 bool kvm_vector_hashing_enabled(void)
8683 {
8684         return vector_hashing;
8685 }
8686 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
8687
8688 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
8689 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
8690 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
8691 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
8692 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
8693 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
8694 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
8695 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
8696 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
8697 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
8698 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
8699 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
8700 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
8701 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
8702 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
8703 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
8704 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
8705 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
8706 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);