arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "pmu.h"
  31 #include "hyperv.h"
  32
  33 #include <linux/clocksource.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/kvm.h>
  36 #include <linux/fs.h>
  37 #include <linux/vmalloc.h>
  38 #include <linux/export.h>
  39 #include <linux/moduleparam.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <linux/sched/stat.h>
  57
  58 #include <trace/events/kvm.h>
  59
  60 #include <asm/debugreg.h>
  61 #include <asm/msr.h>
  62 #include <asm/desc.h>
  63 #include <asm/mce.h>
  64 #include <linux/kernel_stat.h>
  65 #include <asm/fpu/internal.h> /* Ugh! */
  66 #include <asm/pvclock.h>
  67 #include <asm/div64.h>
  68 #include <asm/irq_remapping.h>
  69
  70 #define CREATE_TRACE_POINTS
  71 #include "trace.h"
  72
  73 #define MAX_IO_MSRS 256
  74 #define KVM_MAX_MCE_BANKS 32
  75 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  76 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  77
  78 #define emul_to_vcpu(ctxt) \
  79         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  80
  81 /* EFER defaults:
  82  * - enable syscall per default because its emulated by KVM
  83  * - enable LME and LMA per default on 64 bit KVM
  84  */
  85 #ifdef CONFIG_X86_64
  86 static
  87 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  88 #else
  89 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  90 #endif
  91
  92 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  93 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  94
  95 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
  96                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
  97
  98 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  99 static void process_nmi(struct kvm_vcpu *vcpu);
 100 static void enter_smm(struct kvm_vcpu *vcpu);
 101 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 102
 103 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
 104 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 105
 106 static bool __read_mostly ignore_msrs = 0;
 107 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 108
 109 unsigned int min_timer_period_us = 500;
 110 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 111
 112 static bool __read_mostly kvmclock_periodic_sync = true;
 113 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 114
 115 bool __read_mostly kvm_has_tsc_control;
 116 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 117 u32  __read_mostly kvm_max_guest_tsc_khz;
 118 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 119 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 120 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 121 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 122 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 123 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 124 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 125
 126 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 127 static u32 __read_mostly tsc_tolerance_ppm = 250;
 128 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 129
 130 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 131 unsigned int __read_mostly lapic_timer_advance_ns = 0;
 132 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 133
 134 static bool __read_mostly vector_hashing = true;
 135 module_param(vector_hashing, bool, S_IRUGO);
 136
 137 #define KVM_NR_SHARED_MSRS 16
 138
 139 struct kvm_shared_msrs_global {
 140         int nr;
 141         u32 msrs[KVM_NR_SHARED_MSRS];
 142 };
 143
 144 struct kvm_shared_msrs {
 145         struct user_return_notifier urn;
 146         bool registered;
 147         struct kvm_shared_msr_values {
 148                 u64 host;
 149                 u64 curr;
 150         } values[KVM_NR_SHARED_MSRS];
 151 };
 152
 153 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 154 static struct kvm_shared_msrs __percpu *shared_msrs;
 155
 156 struct kvm_stats_debugfs_item debugfs_entries[] = {
 157         { "pf_fixed", VCPU_STAT(pf_fixed) },
 158         { "pf_guest", VCPU_STAT(pf_guest) },
 159         { "tlb_flush", VCPU_STAT(tlb_flush) },
 160         { "invlpg", VCPU_STAT(invlpg) },
 161         { "exits", VCPU_STAT(exits) },
 162         { "io_exits", VCPU_STAT(io_exits) },
 163         { "mmio_exits", VCPU_STAT(mmio_exits) },
 164         { "signal_exits", VCPU_STAT(signal_exits) },
 165         { "irq_window", VCPU_STAT(irq_window_exits) },
 166         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 167         { "halt_exits", VCPU_STAT(halt_exits) },
 168         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 169         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 170         { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
 171         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 172         { "hypercalls", VCPU_STAT(hypercalls) },
 173         { "request_irq", VCPU_STAT(request_irq_exits) },
 174         { "irq_exits", VCPU_STAT(irq_exits) },
 175         { "host_state_reload", VCPU_STAT(host_state_reload) },
 176         { "efer_reload", VCPU_STAT(efer_reload) },
 177         { "fpu_reload", VCPU_STAT(fpu_reload) },
 178         { "insn_emulation", VCPU_STAT(insn_emulation) },
 179         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 180         { "irq_injections", VCPU_STAT(irq_injections) },
 181         { "nmi_injections", VCPU_STAT(nmi_injections) },
 182         { "req_event", VCPU_STAT(req_event) },
 183         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 184         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 185         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 186         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 187         { "mmu_flooded", VM_STAT(mmu_flooded) },
 188         { "mmu_recycled", VM_STAT(mmu_recycled) },
 189         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 190         { "mmu_unsync", VM_STAT(mmu_unsync) },
 191         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 192         { "largepages", VM_STAT(lpages) },
 193         { "max_mmu_page_hash_collisions",
 194                 VM_STAT(max_mmu_page_hash_collisions) },
 195         { NULL }
 196 };
 197
 198 u64 __read_mostly host_xcr0;
 199
 200 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 201
 202 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 203 {
 204         int i;
 205         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 206                 vcpu->arch.apf.gfns[i] = ~0;
 207 }
 208
 209 static void kvm_on_user_return(struct user_return_notifier *urn)
 210 {
 211         unsigned slot;
 212         struct kvm_shared_msrs *locals
 213                 = container_of(urn, struct kvm_shared_msrs, urn);
 214         struct kvm_shared_msr_values *values;
 215         unsigned long flags;
 216
 217         /*
 218          * Disabling irqs at this point since the following code could be
 219          * interrupted and executed through kvm_arch_hardware_disable()
 220          */
 221         local_irq_save(flags);
 222         if (locals->registered) {
 223                 locals->registered = false;
 224                 user_return_notifier_unregister(urn);
 225         }
 226         local_irq_restore(flags);
 227         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 228                 values = &locals->values[slot];
 229                 if (values->host != values->curr) {
 230                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 231                         values->curr = values->host;
 232                 }
 233         }
 234 }
 235
 236 static void shared_msr_update(unsigned slot, u32 msr)
 237 {
 238         u64 value;
 239         unsigned int cpu = smp_processor_id();
 240         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 241
 242         /* only read, and nobody should modify it at this time,
 243          * so don't need lock */
 244         if (slot >= shared_msrs_global.nr) {
 245                 printk(KERN_ERR "kvm: invalid MSR slot!");
 246                 return;
 247         }
 248         rdmsrl_safe(msr, &value);
 249         smsr->values[slot].host = value;
 250         smsr->values[slot].curr = value;
 251 }
 252
 253 void kvm_define_shared_msr(unsigned slot, u32 msr)
 254 {
 255         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 256         shared_msrs_global.msrs[slot] = msr;
 257         if (slot >= shared_msrs_global.nr)
 258                 shared_msrs_global.nr = slot + 1;
 259 }
 260 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 261
 262 static void kvm_shared_msr_cpu_online(void)
 263 {
 264         unsigned i;
 265
 266         for (i = 0; i < shared_msrs_global.nr; ++i)
 267                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 268 }
 269
 270 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 271 {
 272         unsigned int cpu = smp_processor_id();
 273         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 274         int err;
 275
 276         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 277                 return 0;
 278         smsr->values[slot].curr = value;
 279         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 280         if (err)
 281                 return 1;
 282
 283         if (!smsr->registered) {
 284                 smsr->urn.on_user_return = kvm_on_user_return;
 285                 user_return_notifier_register(&smsr->urn);
 286                 smsr->registered = true;
 287         }
 288         return 0;
 289 }
 290 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 291
 292 static void drop_user_return_notifiers(void)
 293 {
 294         unsigned int cpu = smp_processor_id();
 295         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 296
 297         if (smsr->registered)
 298                 kvm_on_user_return(&smsr->urn);
 299 }
 300
 301 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 302 {
 303         return vcpu->arch.apic_base;
 304 }
 305 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 306
 307 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 308 {
 309         u64 old_state = vcpu->arch.apic_base &
 310                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 311         u64 new_state = msr_info->data &
 312                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 313         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |
 314                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 315
 316         if ((msr_info->data & reserved_bits) || new_state == X2APIC_ENABLE)
 317                 return 1;
 318         if (!msr_info->host_initiated &&
 319             ((new_state == MSR_IA32_APICBASE_ENABLE &&
 320               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 321              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 322               old_state == 0)))
 323                 return 1;
 324
 325         kvm_lapic_set_base(vcpu, msr_info->data);
 326         return 0;
 327 }
 328 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 329
 330 asmlinkage __visible void kvm_spurious_fault(void)
 331 {
 332         /* Fault while not rebooting.  We want the trace. */
 333         BUG();
 334 }
 335 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 336
 337 #define EXCPT_BENIGN            0
 338 #define EXCPT_CONTRIBUTORY      1
 339 #define EXCPT_PF                2
 340
 341 static int exception_class(int vector)
 342 {
 343         switch (vector) {
 344         case PF_VECTOR:
 345                 return EXCPT_PF;
 346         case DE_VECTOR:
 347         case TS_VECTOR:
 348         case NP_VECTOR:
 349         case SS_VECTOR:
 350         case GP_VECTOR:
 351                 return EXCPT_CONTRIBUTORY;
 352         default:
 353                 break;
 354         }
 355         return EXCPT_BENIGN;
 356 }
 357
 358 #define EXCPT_FAULT             0
 359 #define EXCPT_TRAP              1
 360 #define EXCPT_ABORT             2
 361 #define EXCPT_INTERRUPT         3
 362
 363 static int exception_type(int vector)
 364 {
 365         unsigned int mask;
 366
 367         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 368                 return EXCPT_INTERRUPT;
 369
 370         mask = 1 << vector;
 371
 372         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 373         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 374                 return EXCPT_TRAP;
 375
 376         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 377                 return EXCPT_ABORT;
 378
 379         /* Reserved exceptions will result in fault */
 380         return EXCPT_FAULT;
 381 }
 382
 383 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 384                 unsigned nr, bool has_error, u32 error_code,
 385                 bool reinject)
 386 {
 387         u32 prev_nr;
 388         int class1, class2;
 389
 390         kvm_make_request(KVM_REQ_EVENT, vcpu);
 391
 392         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 393         queue:
 394                 if (has_error && !is_protmode(vcpu))
 395                         has_error = false;
 396                 if (reinject) {
 397                         /*
 398                          * On vmentry, vcpu->arch.exception.pending is only
 399                          * true if an event injection was blocked by
 400                          * nested_run_pending.  In that case, however,
 401                          * vcpu_enter_guest requests an immediate exit,
 402                          * and the guest shouldn't proceed far enough to
 403                          * need reinjection.
 404                          */
 405                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 406                         vcpu->arch.exception.injected = true;
 407                 } else {
 408                         vcpu->arch.exception.pending = true;
 409                         vcpu->arch.exception.injected = false;
 410                 }
 411                 vcpu->arch.exception.has_error_code = has_error;
 412                 vcpu->arch.exception.nr = nr;
 413                 vcpu->arch.exception.error_code = error_code;
 414                 return;
 415         }
 416
 417         /* to check exception */
 418         prev_nr = vcpu->arch.exception.nr;
 419         if (prev_nr == DF_VECTOR) {
 420                 /* triple fault -> shutdown */
 421                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 422                 return;
 423         }
 424         class1 = exception_class(prev_nr);
 425         class2 = exception_class(nr);
 426         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 427                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 428                 /*
 429                  * Generate double fault per SDM Table 5-5.  Set
 430                  * exception.pending = true so that the double fault
 431                  * can trigger a nested vmexit.
 432                  */
 433                 vcpu->arch.exception.pending = true;
 434                 vcpu->arch.exception.injected = false;
 435                 vcpu->arch.exception.has_error_code = true;
 436                 vcpu->arch.exception.nr = DF_VECTOR;
 437                 vcpu->arch.exception.error_code = 0;
 438         } else
 439                 /* replace previous exception with a new one in a hope
 440                    that instruction re-execution will regenerate lost
 441                    exception */
 442                 goto queue;
 443 }
 444
 445 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 446 {
 447         kvm_multiple_exception(vcpu, nr, false, 0, false);
 448 }
 449 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 450
 451 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 452 {
 453         kvm_multiple_exception(vcpu, nr, false, 0, true);
 454 }
 455 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 456
 457 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 458 {
 459         if (err)
 460                 kvm_inject_gp(vcpu, 0);
 461         else
 462                 return kvm_skip_emulated_instruction(vcpu);
 463
 464         return 1;
 465 }
 466 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 467
 468 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 469 {
 470         ++vcpu->stat.pf_guest;
 471         vcpu->arch.exception.nested_apf =
 472                 is_guest_mode(vcpu) && fault->async_page_fault;
 473         if (vcpu->arch.exception.nested_apf)
 474                 vcpu->arch.apf.nested_apf_token = fault->address;
 475         else
 476                 vcpu->arch.cr2 = fault->address;
 477         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 478 }
 479 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 480
 481 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 482 {
 483         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 484                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 485         else
 486                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 487
 488         return fault->nested_page_fault;
 489 }
 490
 491 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 492 {
 493         atomic_inc(&vcpu->arch.nmi_queued);
 494         kvm_make_request(KVM_REQ_NMI, vcpu);
 495 }
 496 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 497
 498 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 499 {
 500         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 501 }
 502 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 503
 504 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 505 {
 506         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 507 }
 508 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 509
 510 /*
 511  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 512  * a #GP and return false.
 513  */
 514 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 515 {
 516         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 517                 return true;
 518         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 519         return false;
 520 }
 521 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 522
 523 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 524 {
 525         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 526                 return true;
 527
 528         kvm_queue_exception(vcpu, UD_VECTOR);
 529         return false;
 530 }
 531 EXPORT_SYMBOL_GPL(kvm_require_dr);
 532
 533 /*
 534  * This function will be used to read from the physical memory of the currently
 535  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 536  * can read from guest physical or from the guest's guest physical memory.
 537  */
 538 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 539                             gfn_t ngfn, void *data, int offset, int len,
 540                             u32 access)
 541 {
 542         struct x86_exception exception;
 543         gfn_t real_gfn;
 544         gpa_t ngpa;
 545
 546         ngpa     = gfn_to_gpa(ngfn);
 547         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 548         if (real_gfn == UNMAPPED_GVA)
 549                 return -EFAULT;
 550
 551         real_gfn = gpa_to_gfn(real_gfn);
 552
 553         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 554 }
 555 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 556
 557 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 558                                void *data, int offset, int len, u32 access)
 559 {
 560         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 561                                        data, offset, len, access);
 562 }
 563
 564 /*
 565  * Load the pae pdptrs.  Return true is they are all valid.
 566  */
 567 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 568 {
 569         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 570         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 571         int i;
 572         int ret;
 573         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 574
 575         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 576                                       offset * sizeof(u64), sizeof(pdpte),
 577                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 578         if (ret < 0) {
 579                 ret = 0;
 580                 goto out;
 581         }
 582         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 583                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 584                     (pdpte[i] &
 585                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
 586                         ret = 0;
 587                         goto out;
 588                 }
 589         }
 590         ret = 1;
 591
 592         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 593         __set_bit(VCPU_EXREG_PDPTR,
 594                   (unsigned long *)&vcpu->arch.regs_avail);
 595         __set_bit(VCPU_EXREG_PDPTR,
 596                   (unsigned long *)&vcpu->arch.regs_dirty);
 597 out:
 598
 599         return ret;
 600 }
 601 EXPORT_SYMBOL_GPL(load_pdptrs);
 602
 603 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 604 {
 605         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 606         bool changed = true;
 607         int offset;
 608         gfn_t gfn;
 609         int r;
 610
 611         if (is_long_mode(vcpu) || !is_pae(vcpu))
 612                 return false;
 613
 614         if (!test_bit(VCPU_EXREG_PDPTR,
 615                       (unsigned long *)&vcpu->arch.regs_avail))
 616                 return true;
 617
 618         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 619         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 620         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 621                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 622         if (r < 0)
 623                 goto out;
 624         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 625 out:
 626
 627         return changed;
 628 }
 629 EXPORT_SYMBOL_GPL(pdptrs_changed);
 630
 631 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 632 {
 633         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 634         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 635
 636         cr0 |= X86_CR0_ET;
 637
 638 #ifdef CONFIG_X86_64
 639         if (cr0 & 0xffffffff00000000UL)
 640                 return 1;
 641 #endif
 642
 643         cr0 &= ~CR0_RESERVED_BITS;
 644
 645         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 646                 return 1;
 647
 648         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 649                 return 1;
 650
 651         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 652 #ifdef CONFIG_X86_64
 653                 if ((vcpu->arch.efer & EFER_LME)) {
 654                         int cs_db, cs_l;
 655
 656                         if (!is_pae(vcpu))
 657                                 return 1;
 658                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 659                         if (cs_l)
 660                                 return 1;
 661                 } else
 662 #endif
 663                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 664                                                  kvm_read_cr3(vcpu)))
 665                         return 1;
 666         }
 667
 668         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 669                 return 1;
 670
 671         kvm_x86_ops->set_cr0(vcpu, cr0);
 672
 673         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 674                 kvm_clear_async_pf_completion_queue(vcpu);
 675                 kvm_async_pf_hash_reset(vcpu);
 676         }
 677
 678         if ((cr0 ^ old_cr0) & update_bits)
 679                 kvm_mmu_reset_context(vcpu);
 680
 681         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 682             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 683             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 684                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 685
 686         return 0;
 687 }
 688 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 689
 690 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 691 {
 692         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 693 }
 694 EXPORT_SYMBOL_GPL(kvm_lmsw);
 695
 696 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 697 {
 698         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 699                         !vcpu->guest_xcr0_loaded) {
 700                 /* kvm_set_xcr() also depends on this */
 701                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 702                 vcpu->guest_xcr0_loaded = 1;
 703         }
 704 }
 705
 706 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 707 {
 708         if (vcpu->guest_xcr0_loaded) {
 709                 if (vcpu->arch.xcr0 != host_xcr0)
 710                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 711                 vcpu->guest_xcr0_loaded = 0;
 712         }
 713 }
 714
 715 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 716 {
 717         u64 xcr0 = xcr;
 718         u64 old_xcr0 = vcpu->arch.xcr0;
 719         u64 valid_bits;
 720
 721         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 722         if (index != XCR_XFEATURE_ENABLED_MASK)
 723                 return 1;
 724         if (!(xcr0 & XFEATURE_MASK_FP))
 725                 return 1;
 726         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 727                 return 1;
 728
 729         /*
 730          * Do not allow the guest to set bits that we do not support
 731          * saving.  However, xcr0 bit 0 is always set, even if the
 732          * emulated CPU does not support XSAVE (see fx_init).
 733          */
 734         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 735         if (xcr0 & ~valid_bits)
 736                 return 1;
 737
 738         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 739             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 740                 return 1;
 741
 742         if (xcr0 & XFEATURE_MASK_AVX512) {
 743                 if (!(xcr0 & XFEATURE_MASK_YMM))
 744                         return 1;
 745                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 746                         return 1;
 747         }
 748         vcpu->arch.xcr0 = xcr0;
 749
 750         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 751                 kvm_update_cpuid(vcpu);
 752         return 0;
 753 }
 754
 755 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 756 {
 757         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 758             __kvm_set_xcr(vcpu, index, xcr)) {
 759                 kvm_inject_gp(vcpu, 0);
 760                 return 1;
 761         }
 762         return 0;
 763 }
 764 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 765
 766 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 767 {
 768         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 769         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 770                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 771
 772         if (cr4 & CR4_RESERVED_BITS)
 773                 return 1;
 774
 775         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) && (cr4 & X86_CR4_OSXSAVE))
 776                 return 1;
 777
 778         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMEP) && (cr4 & X86_CR4_SMEP))
 779                 return 1;
 780
 781         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMAP) && (cr4 & X86_CR4_SMAP))
 782                 return 1;
 783
 784         if (!guest_cpuid_has(vcpu, X86_FEATURE_FSGSBASE) && (cr4 & X86_CR4_FSGSBASE))
 785                 return 1;
 786
 787         if (!guest_cpuid_has(vcpu, X86_FEATURE_PKU) && (cr4 & X86_CR4_PKE))
 788                 return 1;
 789
 790         if (!guest_cpuid_has(vcpu, X86_FEATURE_LA57) && (cr4 & X86_CR4_LA57))
 791                 return 1;
 792
 793         if (is_long_mode(vcpu)) {
 794                 if (!(cr4 & X86_CR4_PAE))
 795                         return 1;
 796         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 797                    && ((cr4 ^ old_cr4) & pdptr_bits)
 798                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 799                                    kvm_read_cr3(vcpu)))
 800                 return 1;
 801
 802         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 803                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
 804                         return 1;
 805
 806                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 807                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 808                         return 1;
 809         }
 810
 811         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 812                 return 1;
 813
 814         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 815             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 816                 kvm_mmu_reset_context(vcpu);
 817
 818         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 819                 kvm_update_cpuid(vcpu);
 820
 821         return 0;
 822 }
 823 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 824
 825 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 826 {
 827 #ifdef CONFIG_X86_64
 828         cr3 &= ~CR3_PCID_INVD;
 829 #endif
 830
 831         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 832                 kvm_mmu_sync_roots(vcpu);
 833                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 834                 return 0;
 835         }
 836
 837         if (is_long_mode(vcpu) &&
 838             (cr3 & rsvd_bits(cpuid_maxphyaddr(vcpu), 62)))
 839                 return 1;
 840         else if (is_pae(vcpu) && is_paging(vcpu) &&
 841                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 842                 return 1;
 843
 844         vcpu->arch.cr3 = cr3;
 845         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 846         kvm_mmu_new_cr3(vcpu);
 847         return 0;
 848 }
 849 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 850
 851 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 852 {
 853         if (cr8 & CR8_RESERVED_BITS)
 854                 return 1;
 855         if (lapic_in_kernel(vcpu))
 856                 kvm_lapic_set_tpr(vcpu, cr8);
 857         else
 858                 vcpu->arch.cr8 = cr8;
 859         return 0;
 860 }
 861 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 862
 863 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 864 {
 865         if (lapic_in_kernel(vcpu))
 866                 return kvm_lapic_get_cr8(vcpu);
 867         else
 868                 return vcpu->arch.cr8;
 869 }
 870 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 871
 872 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 873 {
 874         int i;
 875
 876         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 877                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 878                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 879                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 880         }
 881 }
 882
 883 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 884 {
 885         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 886                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 887 }
 888
 889 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 890 {
 891         unsigned long dr7;
 892
 893         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 894                 dr7 = vcpu->arch.guest_debug_dr7;
 895         else
 896                 dr7 = vcpu->arch.dr7;
 897         kvm_x86_ops->set_dr7(vcpu, dr7);
 898         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 899         if (dr7 & DR7_BP_EN_MASK)
 900                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 901 }
 902
 903 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 904 {
 905         u64 fixed = DR6_FIXED_1;
 906
 907         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
 908                 fixed |= DR6_RTM;
 909         return fixed;
 910 }
 911
 912 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 913 {
 914         switch (dr) {
 915         case 0 ... 3:
 916                 vcpu->arch.db[dr] = val;
 917                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 918                         vcpu->arch.eff_db[dr] = val;
 919                 break;
 920         case 4:
 921                 /* fall through */
 922         case 6:
 923                 if (val & 0xffffffff00000000ULL)
 924                         return -1; /* #GP */
 925                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 926                 kvm_update_dr6(vcpu);
 927                 break;
 928         case 5:
 929                 /* fall through */
 930         default: /* 7 */
 931                 if (val & 0xffffffff00000000ULL)
 932                         return -1; /* #GP */
 933                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 934                 kvm_update_dr7(vcpu);
 935                 break;
 936         }
 937
 938         return 0;
 939 }
 940
 941 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 942 {
 943         if (__kvm_set_dr(vcpu, dr, val)) {
 944                 kvm_inject_gp(vcpu, 0);
 945                 return 1;
 946         }
 947         return 0;
 948 }
 949 EXPORT_SYMBOL_GPL(kvm_set_dr);
 950
 951 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 952 {
 953         switch (dr) {
 954         case 0 ... 3:
 955                 *val = vcpu->arch.db[dr];
 956                 break;
 957         case 4:
 958                 /* fall through */
 959         case 6:
 960                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 961                         *val = vcpu->arch.dr6;
 962                 else
 963                         *val = kvm_x86_ops->get_dr6(vcpu);
 964                 break;
 965         case 5:
 966                 /* fall through */
 967         default: /* 7 */
 968                 *val = vcpu->arch.dr7;
 969                 break;
 970         }
 971         return 0;
 972 }
 973 EXPORT_SYMBOL_GPL(kvm_get_dr);
 974
 975 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 976 {
 977         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 978         u64 data;
 979         int err;
 980
 981         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
 982         if (err)
 983                 return err;
 984         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 985         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 986         return err;
 987 }
 988 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 989
 990 /*
 991  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 992  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 993  *
 994  * This list is modified at module load time to reflect the
 995  * capabilities of the host cpu. This capabilities test skips MSRs that are
 996  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
 997  * may depend on host virtualization features rather than host cpu features.
 998  */
 999
1000 static u32 msrs_to_save[] = {
1001         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1002         MSR_STAR,
1003 #ifdef CONFIG_X86_64
1004         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1005 #endif
1006         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1007         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1008 };
1009
1010 static unsigned num_msrs_to_save;
1011
1012 static u32 emulated_msrs[] = {
1013         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1014         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1015         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1016         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1017         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1018         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1019         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1020         HV_X64_MSR_RESET,
1021         HV_X64_MSR_VP_INDEX,
1022         HV_X64_MSR_VP_RUNTIME,
1023         HV_X64_MSR_SCONTROL,
1024         HV_X64_MSR_STIMER0_CONFIG,
1025         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1026         MSR_KVM_PV_EOI_EN,
1027
1028         MSR_IA32_TSC_ADJUST,
1029         MSR_IA32_TSCDEADLINE,
1030         MSR_IA32_MISC_ENABLE,
1031         MSR_IA32_MCG_STATUS,
1032         MSR_IA32_MCG_CTL,
1033         MSR_IA32_MCG_EXT_CTL,
1034         MSR_IA32_SMBASE,
1035         MSR_PLATFORM_INFO,
1036         MSR_MISC_FEATURES_ENABLES,
1037 };
1038
1039 static unsigned num_emulated_msrs;
1040
1041 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1042 {
1043         if (efer & efer_reserved_bits)
1044                 return false;
1045
1046         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1047                         return false;
1048
1049         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1050                         return false;
1051
1052         return true;
1053 }
1054 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1055
1056 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1057 {
1058         u64 old_efer = vcpu->arch.efer;
1059
1060         if (!kvm_valid_efer(vcpu, efer))
1061                 return 1;
1062
1063         if (is_paging(vcpu)
1064             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1065                 return 1;
1066
1067         efer &= ~EFER_LMA;
1068         efer |= vcpu->arch.efer & EFER_LMA;
1069
1070         kvm_x86_ops->set_efer(vcpu, efer);
1071
1072         /* Update reserved bits */
1073         if ((efer ^ old_efer) & EFER_NX)
1074                 kvm_mmu_reset_context(vcpu);
1075
1076         return 0;
1077 }
1078
1079 void kvm_enable_efer_bits(u64 mask)
1080 {
1081        efer_reserved_bits &= ~mask;
1082 }
1083 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1084
1085 /*
1086  * Writes msr value into into the appropriate "register".
1087  * Returns 0 on success, non-0 otherwise.
1088  * Assumes vcpu_load() was already called.
1089  */
1090 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1091 {
1092         switch (msr->index) {
1093         case MSR_FS_BASE:
1094         case MSR_GS_BASE:
1095         case MSR_KERNEL_GS_BASE:
1096         case MSR_CSTAR:
1097         case MSR_LSTAR:
1098                 if (is_noncanonical_address(msr->data, vcpu))
1099                         return 1;
1100                 break;
1101         case MSR_IA32_SYSENTER_EIP:
1102         case MSR_IA32_SYSENTER_ESP:
1103                 /*
1104                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1105                  * non-canonical address is written on Intel but not on
1106                  * AMD (which ignores the top 32-bits, because it does
1107                  * not implement 64-bit SYSENTER).
1108                  *
1109                  * 64-bit code should hence be able to write a non-canonical
1110                  * value on AMD.  Making the address canonical ensures that
1111                  * vmentry does not fail on Intel after writing a non-canonical
1112                  * value, and that something deterministic happens if the guest
1113                  * invokes 64-bit SYSENTER.
1114                  */
1115                 msr->data = get_canonical(msr->data, vcpu_virt_addr_bits(vcpu));
1116         }
1117         return kvm_x86_ops->set_msr(vcpu, msr);
1118 }
1119 EXPORT_SYMBOL_GPL(kvm_set_msr);
1120
1121 /*
1122  * Adapt set_msr() to msr_io()'s calling convention
1123  */
1124 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1125 {
1126         struct msr_data msr;
1127         int r;
1128
1129         msr.index = index;
1130         msr.host_initiated = true;
1131         r = kvm_get_msr(vcpu, &msr);
1132         if (r)
1133                 return r;
1134
1135         *data = msr.data;
1136         return 0;
1137 }
1138
1139 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1140 {
1141         struct msr_data msr;
1142
1143         msr.data = *data;
1144         msr.index = index;
1145         msr.host_initiated = true;
1146         return kvm_set_msr(vcpu, &msr);
1147 }
1148
1149 #ifdef CONFIG_X86_64
1150 struct pvclock_gtod_data {
1151         seqcount_t      seq;
1152
1153         struct { /* extract of a clocksource struct */
1154                 int vclock_mode;
1155                 u64     cycle_last;
1156                 u64     mask;
1157                 u32     mult;
1158                 u32     shift;
1159         } clock;
1160
1161         u64             boot_ns;
1162         u64             nsec_base;
1163         u64             wall_time_sec;
1164 };
1165
1166 static struct pvclock_gtod_data pvclock_gtod_data;
1167
1168 static void update_pvclock_gtod(struct timekeeper *tk)
1169 {
1170         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1171         u64 boot_ns;
1172
1173         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1174
1175         write_seqcount_begin(&vdata->seq);
1176
1177         /* copy pvclock gtod data */
1178         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1179         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1180         vdata->clock.mask               = tk->tkr_mono.mask;
1181         vdata->clock.mult               = tk->tkr_mono.mult;
1182         vdata->clock.shift              = tk->tkr_mono.shift;
1183
1184         vdata->boot_ns                  = boot_ns;
1185         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1186
1187         vdata->wall_time_sec            = tk->xtime_sec;
1188
1189         write_seqcount_end(&vdata->seq);
1190 }
1191 #endif
1192
1193 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1194 {
1195         /*
1196          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1197          * vcpu_enter_guest.  This function is only called from
1198          * the physical CPU that is running vcpu.
1199          */
1200         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1201 }
1202
1203 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1204 {
1205         int version;
1206         int r;
1207         struct pvclock_wall_clock wc;
1208         struct timespec64 boot;
1209
1210         if (!wall_clock)
1211                 return;
1212
1213         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1214         if (r)
1215                 return;
1216
1217         if (version & 1)
1218                 ++version;  /* first time write, random junk */
1219
1220         ++version;
1221
1222         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1223                 return;
1224
1225         /*
1226          * The guest calculates current wall clock time by adding
1227          * system time (updated by kvm_guest_time_update below) to the
1228          * wall clock specified here.  guest system time equals host
1229          * system time for us, thus we must fill in host boot time here.
1230          */
1231         getboottime64(&boot);
1232
1233         if (kvm->arch.kvmclock_offset) {
1234                 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1235                 boot = timespec64_sub(boot, ts);
1236         }
1237         wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1238         wc.nsec = boot.tv_nsec;
1239         wc.version = version;
1240
1241         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1242
1243         version++;
1244         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1245 }
1246
1247 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1248 {
1249         do_shl32_div32(dividend, divisor);
1250         return dividend;
1251 }
1252
1253 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1254                                s8 *pshift, u32 *pmultiplier)
1255 {
1256         uint64_t scaled64;
1257         int32_t  shift = 0;
1258         uint64_t tps64;
1259         uint32_t tps32;
1260
1261         tps64 = base_hz;
1262         scaled64 = scaled_hz;
1263         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1264                 tps64 >>= 1;
1265                 shift--;
1266         }
1267
1268         tps32 = (uint32_t)tps64;
1269         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1270                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1271                         scaled64 >>= 1;
1272                 else
1273                         tps32 <<= 1;
1274                 shift++;
1275         }
1276
1277         *pshift = shift;
1278         *pmultiplier = div_frac(scaled64, tps32);
1279
1280         pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1281                  __func__, base_hz, scaled_hz, shift, *pmultiplier);
1282 }
1283
1284 #ifdef CONFIG_X86_64
1285 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1286 #endif
1287
1288 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1289 static unsigned long max_tsc_khz;
1290
1291 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1292 {
1293         u64 v = (u64)khz * (1000000 + ppm);
1294         do_div(v, 1000000);
1295         return v;
1296 }
1297
1298 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1299 {
1300         u64 ratio;
1301
1302         /* Guest TSC same frequency as host TSC? */
1303         if (!scale) {
1304                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1305                 return 0;
1306         }
1307
1308         /* TSC scaling supported? */
1309         if (!kvm_has_tsc_control) {
1310                 if (user_tsc_khz > tsc_khz) {
1311                         vcpu->arch.tsc_catchup = 1;
1312                         vcpu->arch.tsc_always_catchup = 1;
1313                         return 0;
1314                 } else {
1315                         WARN(1, "user requested TSC rate below hardware speed\n");
1316                         return -1;
1317                 }
1318         }
1319
1320         /* TSC scaling required  - calculate ratio */
1321         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1322                                 user_tsc_khz, tsc_khz);
1323
1324         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1325                 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1326                           user_tsc_khz);
1327                 return -1;
1328         }
1329
1330         vcpu->arch.tsc_scaling_ratio = ratio;
1331         return 0;
1332 }
1333
1334 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1335 {
1336         u32 thresh_lo, thresh_hi;
1337         int use_scaling = 0;
1338
1339         /* tsc_khz can be zero if TSC calibration fails */
1340         if (user_tsc_khz == 0) {
1341                 /* set tsc_scaling_ratio to a safe value */
1342                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1343                 return -1;
1344         }
1345
1346         /* Compute a scale to convert nanoseconds in TSC cycles */
1347         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1348                            &vcpu->arch.virtual_tsc_shift,
1349                            &vcpu->arch.virtual_tsc_mult);
1350         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1351
1352         /*
1353          * Compute the variation in TSC rate which is acceptable
1354          * within the range of tolerance and decide if the
1355          * rate being applied is within that bounds of the hardware
1356          * rate.  If so, no scaling or compensation need be done.
1357          */
1358         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1359         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1360         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1361                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1362                 use_scaling = 1;
1363         }
1364         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1365 }
1366
1367 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1368 {
1369         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1370                                       vcpu->arch.virtual_tsc_mult,
1371                                       vcpu->arch.virtual_tsc_shift);
1372         tsc += vcpu->arch.this_tsc_write;
1373         return tsc;
1374 }
1375
1376 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1377 {
1378 #ifdef CONFIG_X86_64
1379         bool vcpus_matched;
1380         struct kvm_arch *ka = &vcpu->kvm->arch;
1381         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1382
1383         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1384                          atomic_read(&vcpu->kvm->online_vcpus));
1385
1386         /*
1387          * Once the masterclock is enabled, always perform request in
1388          * order to update it.
1389          *
1390          * In order to enable masterclock, the host clocksource must be TSC
1391          * and the vcpus need to have matched TSCs.  When that happens,
1392          * perform request to enable masterclock.
1393          */
1394         if (ka->use_master_clock ||
1395             (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1396                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1397
1398         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1399                             atomic_read(&vcpu->kvm->online_vcpus),
1400                             ka->use_master_clock, gtod->clock.vclock_mode);
1401 #endif
1402 }
1403
1404 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1405 {
1406         u64 curr_offset = vcpu->arch.tsc_offset;
1407         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1408 }
1409
1410 /*
1411  * Multiply tsc by a fixed point number represented by ratio.
1412  *
1413  * The most significant 64-N bits (mult) of ratio represent the
1414  * integral part of the fixed point number; the remaining N bits
1415  * (frac) represent the fractional part, ie. ratio represents a fixed
1416  * point number (mult + frac * 2^(-N)).
1417  *
1418  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1419  */
1420 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1421 {
1422         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1423 }
1424
1425 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1426 {
1427         u64 _tsc = tsc;
1428         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1429
1430         if (ratio != kvm_default_tsc_scaling_ratio)
1431                 _tsc = __scale_tsc(ratio, tsc);
1432
1433         return _tsc;
1434 }
1435 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1436
1437 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1438 {
1439         u64 tsc;
1440
1441         tsc = kvm_scale_tsc(vcpu, rdtsc());
1442
1443         return target_tsc - tsc;
1444 }
1445
1446 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1447 {
1448         return vcpu->arch.tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
1449 }
1450 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1451
1452 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
1453 {
1454         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1455         vcpu->arch.tsc_offset = offset;
1456 }
1457
1458 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1459 {
1460         struct kvm *kvm = vcpu->kvm;
1461         u64 offset, ns, elapsed;
1462         unsigned long flags;
1463         bool matched;
1464         bool already_matched;
1465         u64 data = msr->data;
1466         bool synchronizing = false;
1467
1468         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1469         offset = kvm_compute_tsc_offset(vcpu, data);
1470         ns = ktime_get_boot_ns();
1471         elapsed = ns - kvm->arch.last_tsc_nsec;
1472
1473         if (vcpu->arch.virtual_tsc_khz) {
1474                 if (data == 0 && msr->host_initiated) {
1475                         /*
1476                          * detection of vcpu initialization -- need to sync
1477                          * with other vCPUs. This particularly helps to keep
1478                          * kvm_clock stable after CPU hotplug
1479                          */
1480                         synchronizing = true;
1481                 } else {
1482                         u64 tsc_exp = kvm->arch.last_tsc_write +
1483                                                 nsec_to_cycles(vcpu, elapsed);
1484                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
1485                         /*
1486                          * Special case: TSC write with a small delta (1 second)
1487                          * of virtual cycle time against real time is
1488                          * interpreted as an attempt to synchronize the CPU.
1489                          */
1490                         synchronizing = data < tsc_exp + tsc_hz &&
1491                                         data + tsc_hz > tsc_exp;
1492                 }
1493         }
1494
1495         /*
1496          * For a reliable TSC, we can match TSC offsets, and for an unstable
1497          * TSC, we add elapsed time in this computation.  We could let the
1498          * compensation code attempt to catch up if we fall behind, but
1499          * it's better to try to match offsets from the beginning.
1500          */
1501         if (synchronizing &&
1502             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1503                 if (!check_tsc_unstable()) {
1504                         offset = kvm->arch.cur_tsc_offset;
1505                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1506                 } else {
1507                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1508                         data += delta;
1509                         offset = kvm_compute_tsc_offset(vcpu, data);
1510                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1511                 }
1512                 matched = true;
1513                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1514         } else {
1515                 /*
1516                  * We split periods of matched TSC writes into generations.
1517                  * For each generation, we track the original measured
1518                  * nanosecond time, offset, and write, so if TSCs are in
1519                  * sync, we can match exact offset, and if not, we can match
1520                  * exact software computation in compute_guest_tsc()
1521                  *
1522                  * These values are tracked in kvm->arch.cur_xxx variables.
1523                  */
1524                 kvm->arch.cur_tsc_generation++;
1525                 kvm->arch.cur_tsc_nsec = ns;
1526                 kvm->arch.cur_tsc_write = data;
1527                 kvm->arch.cur_tsc_offset = offset;
1528                 matched = false;
1529                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1530                          kvm->arch.cur_tsc_generation, data);
1531         }
1532
1533         /*
1534          * We also track th most recent recorded KHZ, write and time to
1535          * allow the matching interval to be extended at each write.
1536          */
1537         kvm->arch.last_tsc_nsec = ns;
1538         kvm->arch.last_tsc_write = data;
1539         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1540
1541         vcpu->arch.last_guest_tsc = data;
1542
1543         /* Keep track of which generation this VCPU has synchronized to */
1544         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1545         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1546         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1547
1548         if (!msr->host_initiated && guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST))
1549                 update_ia32_tsc_adjust_msr(vcpu, offset);
1550
1551         kvm_vcpu_write_tsc_offset(vcpu, offset);
1552         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1553
1554         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1555         if (!matched) {
1556                 kvm->arch.nr_vcpus_matched_tsc = 0;
1557         } else if (!already_matched) {
1558                 kvm->arch.nr_vcpus_matched_tsc++;
1559         }
1560
1561         kvm_track_tsc_matching(vcpu);
1562         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1563 }
1564
1565 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1566
1567 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1568                                            s64 adjustment)
1569 {
1570         kvm_vcpu_write_tsc_offset(vcpu, vcpu->arch.tsc_offset + adjustment);
1571 }
1572
1573 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1574 {
1575         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1576                 WARN_ON(adjustment < 0);
1577         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1578         adjust_tsc_offset_guest(vcpu, adjustment);
1579 }
1580
1581 #ifdef CONFIG_X86_64
1582
1583 static u64 read_tsc(void)
1584 {
1585         u64 ret = (u64)rdtsc_ordered();
1586         u64 last = pvclock_gtod_data.clock.cycle_last;
1587
1588         if (likely(ret >= last))
1589                 return ret;
1590
1591         /*
1592          * GCC likes to generate cmov here, but this branch is extremely
1593          * predictable (it's just a function of time and the likely is
1594          * very likely) and there's a data dependence, so force GCC
1595          * to generate a branch instead.  I don't barrier() because
1596          * we don't actually need a barrier, and if this function
1597          * ever gets inlined it will generate worse code.
1598          */
1599         asm volatile ("");
1600         return last;
1601 }
1602
1603 static inline u64 vgettsc(u64 *cycle_now)
1604 {
1605         long v;
1606         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1607
1608         *cycle_now = read_tsc();
1609
1610         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1611         return v * gtod->clock.mult;
1612 }
1613
1614 static int do_monotonic_boot(s64 *t, u64 *cycle_now)
1615 {
1616         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1617         unsigned long seq;
1618         int mode;
1619         u64 ns;
1620
1621         do {
1622                 seq = read_seqcount_begin(&gtod->seq);
1623                 mode = gtod->clock.vclock_mode;
1624                 ns = gtod->nsec_base;
1625                 ns += vgettsc(cycle_now);
1626                 ns >>= gtod->clock.shift;
1627                 ns += gtod->boot_ns;
1628         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1629         *t = ns;
1630
1631         return mode;
1632 }
1633
1634 static int do_realtime(struct timespec *ts, u64 *cycle_now)
1635 {
1636         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1637         unsigned long seq;
1638         int mode;
1639         u64 ns;
1640
1641         do {
1642                 seq = read_seqcount_begin(&gtod->seq);
1643                 mode = gtod->clock.vclock_mode;
1644                 ts->tv_sec = gtod->wall_time_sec;
1645                 ns = gtod->nsec_base;
1646                 ns += vgettsc(cycle_now);
1647                 ns >>= gtod->clock.shift;
1648         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1649
1650         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
1651         ts->tv_nsec = ns;
1652
1653         return mode;
1654 }
1655
1656 /* returns true if host is using tsc clocksource */
1657 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *cycle_now)
1658 {
1659         /* checked again under seqlock below */
1660         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1661                 return false;
1662
1663         return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1664 }
1665
1666 /* returns true if host is using tsc clocksource */
1667 static bool kvm_get_walltime_and_clockread(struct timespec *ts,
1668                                            u64 *cycle_now)
1669 {
1670         /* checked again under seqlock below */
1671         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1672                 return false;
1673
1674         return do_realtime(ts, cycle_now) == VCLOCK_TSC;
1675 }
1676 #endif
1677
1678 /*
1679  *
1680  * Assuming a stable TSC across physical CPUS, and a stable TSC
1681  * across virtual CPUs, the following condition is possible.
1682  * Each numbered line represents an event visible to both
1683  * CPUs at the next numbered event.
1684  *
1685  * "timespecX" represents host monotonic time. "tscX" represents
1686  * RDTSC value.
1687  *
1688  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1689  *
1690  * 1.  read timespec0,tsc0
1691  * 2.                                   | timespec1 = timespec0 + N
1692  *                                      | tsc1 = tsc0 + M
1693  * 3. transition to guest               | transition to guest
1694  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1695  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1696  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1697  *
1698  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1699  *
1700  *      - ret0 < ret1
1701  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1702  *              ...
1703  *      - 0 < N - M => M < N
1704  *
1705  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1706  * always the case (the difference between two distinct xtime instances
1707  * might be smaller then the difference between corresponding TSC reads,
1708  * when updating guest vcpus pvclock areas).
1709  *
1710  * To avoid that problem, do not allow visibility of distinct
1711  * system_timestamp/tsc_timestamp values simultaneously: use a master
1712  * copy of host monotonic time values. Update that master copy
1713  * in lockstep.
1714  *
1715  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1716  *
1717  */
1718
1719 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1720 {
1721 #ifdef CONFIG_X86_64
1722         struct kvm_arch *ka = &kvm->arch;
1723         int vclock_mode;
1724         bool host_tsc_clocksource, vcpus_matched;
1725
1726         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1727                         atomic_read(&kvm->online_vcpus));
1728
1729         /*
1730          * If the host uses TSC clock, then passthrough TSC as stable
1731          * to the guest.
1732          */
1733         host_tsc_clocksource = kvm_get_time_and_clockread(
1734                                         &ka->master_kernel_ns,
1735                                         &ka->master_cycle_now);
1736
1737         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1738                                 && !ka->backwards_tsc_observed
1739                                 && !ka->boot_vcpu_runs_old_kvmclock;
1740
1741         if (ka->use_master_clock)
1742                 atomic_set(&kvm_guest_has_master_clock, 1);
1743
1744         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1745         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1746                                         vcpus_matched);
1747 #endif
1748 }
1749
1750 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
1751 {
1752         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
1753 }
1754
1755 static void kvm_gen_update_masterclock(struct kvm *kvm)
1756 {
1757 #ifdef CONFIG_X86_64
1758         int i;
1759         struct kvm_vcpu *vcpu;
1760         struct kvm_arch *ka = &kvm->arch;
1761
1762         spin_lock(&ka->pvclock_gtod_sync_lock);
1763         kvm_make_mclock_inprogress_request(kvm);
1764         /* no guest entries from this point */
1765         pvclock_update_vm_gtod_copy(kvm);
1766
1767         kvm_for_each_vcpu(i, vcpu, kvm)
1768                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1769
1770         /* guest entries allowed */
1771         kvm_for_each_vcpu(i, vcpu, kvm)
1772                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
1773
1774         spin_unlock(&ka->pvclock_gtod_sync_lock);
1775 #endif
1776 }
1777
1778 u64 get_kvmclock_ns(struct kvm *kvm)
1779 {
1780         struct kvm_arch *ka = &kvm->arch;
1781         struct pvclock_vcpu_time_info hv_clock;
1782         u64 ret;
1783
1784         spin_lock(&ka->pvclock_gtod_sync_lock);
1785         if (!ka->use_master_clock) {
1786                 spin_unlock(&ka->pvclock_gtod_sync_lock);
1787                 return ktime_get_boot_ns() + ka->kvmclock_offset;
1788         }
1789
1790         hv_clock.tsc_timestamp = ka->master_cycle_now;
1791         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
1792         spin_unlock(&ka->pvclock_gtod_sync_lock);
1793
1794         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
1795         get_cpu();
1796
1797         kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
1798                            &hv_clock.tsc_shift,
1799                            &hv_clock.tsc_to_system_mul);
1800         ret = __pvclock_read_cycles(&hv_clock, rdtsc());
1801
1802         put_cpu();
1803
1804         return ret;
1805 }
1806
1807 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
1808 {
1809         struct kvm_vcpu_arch *vcpu = &v->arch;
1810         struct pvclock_vcpu_time_info guest_hv_clock;
1811
1812         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1813                 &guest_hv_clock, sizeof(guest_hv_clock))))
1814                 return;
1815
1816         /* This VCPU is paused, but it's legal for a guest to read another
1817          * VCPU's kvmclock, so we really have to follow the specification where
1818          * it says that version is odd if data is being modified, and even after
1819          * it is consistent.
1820          *
1821          * Version field updates must be kept separate.  This is because
1822          * kvm_write_guest_cached might use a "rep movs" instruction, and
1823          * writes within a string instruction are weakly ordered.  So there
1824          * are three writes overall.
1825          *
1826          * As a small optimization, only write the version field in the first
1827          * and third write.  The vcpu->pv_time cache is still valid, because the
1828          * version field is the first in the struct.
1829          */
1830         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1831
1832         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1833         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1834                                 &vcpu->hv_clock,
1835                                 sizeof(vcpu->hv_clock.version));
1836
1837         smp_wmb();
1838
1839         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1840         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1841
1842         if (vcpu->pvclock_set_guest_stopped_request) {
1843                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
1844                 vcpu->pvclock_set_guest_stopped_request = false;
1845         }
1846
1847         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1848
1849         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1850                                 &vcpu->hv_clock,
1851                                 sizeof(vcpu->hv_clock));
1852
1853         smp_wmb();
1854
1855         vcpu->hv_clock.version++;
1856         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1857                                 &vcpu->hv_clock,
1858                                 sizeof(vcpu->hv_clock.version));
1859 }
1860
1861 static int kvm_guest_time_update(struct kvm_vcpu *v)
1862 {
1863         unsigned long flags, tgt_tsc_khz;
1864         struct kvm_vcpu_arch *vcpu = &v->arch;
1865         struct kvm_arch *ka = &v->kvm->arch;
1866         s64 kernel_ns;
1867         u64 tsc_timestamp, host_tsc;
1868         u8 pvclock_flags;
1869         bool use_master_clock;
1870
1871         kernel_ns = 0;
1872         host_tsc = 0;
1873
1874         /*
1875          * If the host uses TSC clock, then passthrough TSC as stable
1876          * to the guest.
1877          */
1878         spin_lock(&ka->pvclock_gtod_sync_lock);
1879         use_master_clock = ka->use_master_clock;
1880         if (use_master_clock) {
1881                 host_tsc = ka->master_cycle_now;
1882                 kernel_ns = ka->master_kernel_ns;
1883         }
1884         spin_unlock(&ka->pvclock_gtod_sync_lock);
1885
1886         /* Keep irq disabled to prevent changes to the clock */
1887         local_irq_save(flags);
1888         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1889         if (unlikely(tgt_tsc_khz == 0)) {
1890                 local_irq_restore(flags);
1891                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1892                 return 1;
1893         }
1894         if (!use_master_clock) {
1895                 host_tsc = rdtsc();
1896                 kernel_ns = ktime_get_boot_ns();
1897         }
1898
1899         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
1900
1901         /*
1902          * We may have to catch up the TSC to match elapsed wall clock
1903          * time for two reasons, even if kvmclock is used.
1904          *   1) CPU could have been running below the maximum TSC rate
1905          *   2) Broken TSC compensation resets the base at each VCPU
1906          *      entry to avoid unknown leaps of TSC even when running
1907          *      again on the same CPU.  This may cause apparent elapsed
1908          *      time to disappear, and the guest to stand still or run
1909          *      very slowly.
1910          */
1911         if (vcpu->tsc_catchup) {
1912                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1913                 if (tsc > tsc_timestamp) {
1914                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1915                         tsc_timestamp = tsc;
1916                 }
1917         }
1918
1919         local_irq_restore(flags);
1920
1921         /* With all the info we got, fill in the values */
1922
1923         if (kvm_has_tsc_control)
1924                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
1925
1926         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
1927                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
1928                                    &vcpu->hv_clock.tsc_shift,
1929                                    &vcpu->hv_clock.tsc_to_system_mul);
1930                 vcpu->hw_tsc_khz = tgt_tsc_khz;
1931         }
1932
1933         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1934         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1935         vcpu->last_guest_tsc = tsc_timestamp;
1936
1937         /* If the host uses TSC clocksource, then it is stable */
1938         pvclock_flags = 0;
1939         if (use_master_clock)
1940                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1941
1942         vcpu->hv_clock.flags = pvclock_flags;
1943
1944         if (vcpu->pv_time_enabled)
1945                 kvm_setup_pvclock_page(v);
1946         if (v == kvm_get_vcpu(v->kvm, 0))
1947                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
1948         return 0;
1949 }
1950
1951 /*
1952  * kvmclock updates which are isolated to a given vcpu, such as
1953  * vcpu->cpu migration, should not allow system_timestamp from
1954  * the rest of the vcpus to remain static. Otherwise ntp frequency
1955  * correction applies to one vcpu's system_timestamp but not
1956  * the others.
1957  *
1958  * So in those cases, request a kvmclock update for all vcpus.
1959  * We need to rate-limit these requests though, as they can
1960  * considerably slow guests that have a large number of vcpus.
1961  * The time for a remote vcpu to update its kvmclock is bound
1962  * by the delay we use to rate-limit the updates.
1963  */
1964
1965 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1966
1967 static void kvmclock_update_fn(struct work_struct *work)
1968 {
1969         int i;
1970         struct delayed_work *dwork = to_delayed_work(work);
1971         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1972                                            kvmclock_update_work);
1973         struct kvm *kvm = container_of(ka, struct kvm, arch);
1974         struct kvm_vcpu *vcpu;
1975
1976         kvm_for_each_vcpu(i, vcpu, kvm) {
1977                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1978                 kvm_vcpu_kick(vcpu);
1979         }
1980 }
1981
1982 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1983 {
1984         struct kvm *kvm = v->kvm;
1985
1986         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1987         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1988                                         KVMCLOCK_UPDATE_DELAY);
1989 }
1990
1991 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1992
1993 static void kvmclock_sync_fn(struct work_struct *work)
1994 {
1995         struct delayed_work *dwork = to_delayed_work(work);
1996         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1997                                            kvmclock_sync_work);
1998         struct kvm *kvm = container_of(ka, struct kvm, arch);
1999
2000         if (!kvmclock_periodic_sync)
2001                 return;
2002
2003         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2004         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2005                                         KVMCLOCK_SYNC_PERIOD);
2006 }
2007
2008 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
2009 {
2010         u64 mcg_cap = vcpu->arch.mcg_cap;
2011         unsigned bank_num = mcg_cap & 0xff;
2012
2013         switch (msr) {
2014         case MSR_IA32_MCG_STATUS:
2015                 vcpu->arch.mcg_status = data;
2016                 break;
2017         case MSR_IA32_MCG_CTL:
2018                 if (!(mcg_cap & MCG_CTL_P))
2019                         return 1;
2020                 if (data != 0 && data != ~(u64)0)
2021                         return -1;
2022                 vcpu->arch.mcg_ctl = data;
2023                 break;
2024         default:
2025                 if (msr >= MSR_IA32_MC0_CTL &&
2026                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2027                         u32 offset = msr - MSR_IA32_MC0_CTL;
2028                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2029                          * some Linux kernels though clear bit 10 in bank 4 to
2030                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2031                          * this to avoid an uncatched #GP in the guest
2032                          */
2033                         if ((offset & 0x3) == 0 &&
2034                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2035                                 return -1;
2036                         vcpu->arch.mce_banks[offset] = data;
2037                         break;
2038                 }
2039                 return 1;
2040         }
2041         return 0;
2042 }
2043
2044 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2045 {
2046         struct kvm *kvm = vcpu->kvm;
2047         int lm = is_long_mode(vcpu);
2048         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2049                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2050         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2051                 : kvm->arch.xen_hvm_config.blob_size_32;
2052         u32 page_num = data & ~PAGE_MASK;
2053         u64 page_addr = data & PAGE_MASK;
2054         u8 *page;
2055         int r;
2056
2057         r = -E2BIG;
2058         if (page_num >= blob_size)
2059                 goto out;
2060         r = -ENOMEM;
2061         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2062         if (IS_ERR(page)) {
2063                 r = PTR_ERR(page);
2064                 goto out;
2065         }
2066         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2067                 goto out_free;
2068         r = 0;
2069 out_free:
2070         kfree(page);
2071 out:
2072         return r;
2073 }
2074
2075 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2076 {
2077         gpa_t gpa = data & ~0x3f;
2078
2079         /* Bits 3:5 are reserved, Should be zero */
2080         if (data & 0x38)
2081                 return 1;
2082
2083         vcpu->arch.apf.msr_val = data;
2084
2085         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2086                 kvm_clear_async_pf_completion_queue(vcpu);
2087                 kvm_async_pf_hash_reset(vcpu);
2088                 return 0;
2089         }
2090
2091         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2092                                         sizeof(u32)))
2093                 return 1;
2094
2095         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2096         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2097         kvm_async_pf_wakeup_all(vcpu);
2098         return 0;
2099 }
2100
2101 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2102 {
2103         vcpu->arch.pv_time_enabled = false;
2104 }
2105
2106 static void record_steal_time(struct kvm_vcpu *vcpu)
2107 {
2108         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2109                 return;
2110
2111         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2112                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2113                 return;
2114
2115         vcpu->arch.st.steal.preempted = 0;
2116
2117         if (vcpu->arch.st.steal.version & 1)
2118                 vcpu->arch.st.steal.version += 1;  /* first time write, random junk */
2119
2120         vcpu->arch.st.steal.version += 1;
2121
2122         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2123                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2124
2125         smp_wmb();
2126
2127         vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2128                 vcpu->arch.st.last_steal;
2129         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2130
2131         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2132                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2133
2134         smp_wmb();
2135
2136         vcpu->arch.st.steal.version += 1;
2137
2138         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2139                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2140 }
2141
2142 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2143 {
2144         bool pr = false;
2145         u32 msr = msr_info->index;
2146         u64 data = msr_info->data;
2147
2148         switch (msr) {
2149         case MSR_AMD64_NB_CFG:
2150         case MSR_IA32_UCODE_REV:
2151         case MSR_IA32_UCODE_WRITE:
2152         case MSR_VM_HSAVE_PA:
2153         case MSR_AMD64_PATCH_LOADER:
2154         case MSR_AMD64_BU_CFG2:
2155         case MSR_AMD64_DC_CFG:
2156                 break;
2157
2158         case MSR_EFER:
2159                 return set_efer(vcpu, data);
2160         case MSR_K7_HWCR:
2161                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2162                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2163                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2164                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2165                 if (data != 0) {
2166                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2167                                     data);
2168                         return 1;
2169                 }
2170                 break;
2171         case MSR_FAM10H_MMIO_CONF_BASE:
2172                 if (data != 0) {
2173                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2174                                     "0x%llx\n", data);
2175                         return 1;
2176                 }
2177                 break;
2178         case MSR_IA32_DEBUGCTLMSR:
2179                 if (!data) {
2180                         /* We support the non-activated case already */
2181                         break;
2182                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2183                         /* Values other than LBR and BTF are vendor-specific,
2184                            thus reserved and should throw a #GP */
2185                         return 1;
2186                 }
2187                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2188                             __func__, data);
2189                 break;
2190         case 0x200 ... 0x2ff:
2191                 return kvm_mtrr_set_msr(vcpu, msr, data);
2192         case MSR_IA32_APICBASE:
2193                 return kvm_set_apic_base(vcpu, msr_info);
2194         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2195                 return kvm_x2apic_msr_write(vcpu, msr, data);
2196         case MSR_IA32_TSCDEADLINE:
2197                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2198                 break;
2199         case MSR_IA32_TSC_ADJUST:
2200                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
2201                         if (!msr_info->host_initiated) {
2202                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2203                                 adjust_tsc_offset_guest(vcpu, adj);
2204                         }
2205                         vcpu->arch.ia32_tsc_adjust_msr = data;
2206                 }
2207                 break;
2208         case MSR_IA32_MISC_ENABLE:
2209                 vcpu->arch.ia32_misc_enable_msr = data;
2210                 break;
2211         case MSR_IA32_SMBASE:
2212                 if (!msr_info->host_initiated)
2213                         return 1;
2214                 vcpu->arch.smbase = data;
2215                 break;
2216         case MSR_KVM_WALL_CLOCK_NEW:
2217         case MSR_KVM_WALL_CLOCK:
2218                 vcpu->kvm->arch.wall_clock = data;
2219                 kvm_write_wall_clock(vcpu->kvm, data);
2220                 break;
2221         case MSR_KVM_SYSTEM_TIME_NEW:
2222         case MSR_KVM_SYSTEM_TIME: {
2223                 struct kvm_arch *ka = &vcpu->kvm->arch;
2224
2225                 kvmclock_reset(vcpu);
2226
2227                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2228                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2229
2230                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2231                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2232
2233                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2234                 }
2235
2236                 vcpu->arch.time = data;
2237                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2238
2239                 /* we verify if the enable bit is set... */
2240                 if (!(data & 1))
2241                         break;
2242
2243                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2244                      &vcpu->arch.pv_time, data & ~1ULL,
2245                      sizeof(struct pvclock_vcpu_time_info)))
2246                         vcpu->arch.pv_time_enabled = false;
2247                 else
2248                         vcpu->arch.pv_time_enabled = true;
2249
2250                 break;
2251         }
2252         case MSR_KVM_ASYNC_PF_EN:
2253                 if (kvm_pv_enable_async_pf(vcpu, data))
2254                         return 1;
2255                 break;
2256         case MSR_KVM_STEAL_TIME:
2257
2258                 if (unlikely(!sched_info_on()))
2259                         return 1;
2260
2261                 if (data & KVM_STEAL_RESERVED_MASK)
2262                         return 1;
2263
2264                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2265                                                 data & KVM_STEAL_VALID_BITS,
2266                                                 sizeof(struct kvm_steal_time)))
2267                         return 1;
2268
2269                 vcpu->arch.st.msr_val = data;
2270
2271                 if (!(data & KVM_MSR_ENABLED))
2272                         break;
2273
2274                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2275
2276                 break;
2277         case MSR_KVM_PV_EOI_EN:
2278                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2279                         return 1;
2280                 break;
2281
2282         case MSR_IA32_MCG_CTL:
2283         case MSR_IA32_MCG_STATUS:
2284         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2285                 return set_msr_mce(vcpu, msr, data);
2286
2287         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2288         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2289                 pr = true; /* fall through */
2290         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2291         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2292                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2293                         return kvm_pmu_set_msr(vcpu, msr_info);
2294
2295                 if (pr || data != 0)
2296                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2297                                     "0x%x data 0x%llx\n", msr, data);
2298                 break;
2299         case MSR_K7_CLK_CTL:
2300                 /*
2301                  * Ignore all writes to this no longer documented MSR.
2302                  * Writes are only relevant for old K7 processors,
2303                  * all pre-dating SVM, but a recommended workaround from
2304                  * AMD for these chips. It is possible to specify the
2305                  * affected processor models on the command line, hence
2306                  * the need to ignore the workaround.
2307                  */
2308                 break;
2309         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2310         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2311         case HV_X64_MSR_CRASH_CTL:
2312         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2313                 return kvm_hv_set_msr_common(vcpu, msr, data,
2314                                              msr_info->host_initiated);
2315         case MSR_IA32_BBL_CR_CTL3:
2316                 /* Drop writes to this legacy MSR -- see rdmsr
2317                  * counterpart for further detail.
2318                  */
2319                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n", msr, data);
2320                 break;
2321         case MSR_AMD64_OSVW_ID_LENGTH:
2322                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2323                         return 1;
2324                 vcpu->arch.osvw.length = data;
2325                 break;
2326         case MSR_AMD64_OSVW_STATUS:
2327                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2328                         return 1;
2329                 vcpu->arch.osvw.status = data;
2330                 break;
2331         case MSR_PLATFORM_INFO:
2332                 if (!msr_info->host_initiated ||
2333                     data & ~MSR_PLATFORM_INFO_CPUID_FAULT ||
2334                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
2335                      cpuid_fault_enabled(vcpu)))
2336                         return 1;
2337                 vcpu->arch.msr_platform_info = data;
2338                 break;
2339         case MSR_MISC_FEATURES_ENABLES:
2340                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
2341                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
2342                      !supports_cpuid_fault(vcpu)))
2343                         return 1;
2344                 vcpu->arch.msr_misc_features_enables = data;
2345                 break;
2346         default:
2347                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2348                         return xen_hvm_config(vcpu, data);
2349                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2350                         return kvm_pmu_set_msr(vcpu, msr_info);
2351                 if (!ignore_msrs) {
2352                         vcpu_debug_ratelimited(vcpu, "unhandled wrmsr: 0x%x data 0x%llx\n",
2353                                     msr, data);
2354                         return 1;
2355                 } else {
2356                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
2357                                     msr, data);
2358                         break;
2359                 }
2360         }
2361         return 0;
2362 }
2363 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2364
2365
2366 /*
2367  * Reads an msr value (of 'msr_index') into 'pdata'.
2368  * Returns 0 on success, non-0 otherwise.
2369  * Assumes vcpu_load() was already called.
2370  */
2371 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2372 {
2373         return kvm_x86_ops->get_msr(vcpu, msr);
2374 }
2375 EXPORT_SYMBOL_GPL(kvm_get_msr);
2376
2377 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2378 {
2379         u64 data;
2380         u64 mcg_cap = vcpu->arch.mcg_cap;
2381         unsigned bank_num = mcg_cap & 0xff;
2382
2383         switch (msr) {
2384         case MSR_IA32_P5_MC_ADDR:
2385         case MSR_IA32_P5_MC_TYPE:
2386                 data = 0;
2387                 break;
2388         case MSR_IA32_MCG_CAP:
2389                 data = vcpu->arch.mcg_cap;
2390                 break;
2391         case MSR_IA32_MCG_CTL:
2392                 if (!(mcg_cap & MCG_CTL_P))
2393                         return 1;
2394                 data = vcpu->arch.mcg_ctl;
2395                 break;
2396         case MSR_IA32_MCG_STATUS:
2397                 data = vcpu->arch.mcg_status;
2398                 break;
2399         default:
2400                 if (msr >= MSR_IA32_MC0_CTL &&
2401                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2402                         u32 offset = msr - MSR_IA32_MC0_CTL;
2403                         data = vcpu->arch.mce_banks[offset];
2404                         break;
2405                 }
2406                 return 1;
2407         }
2408         *pdata = data;
2409         return 0;
2410 }
2411
2412 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2413 {
2414         switch (msr_info->index) {
2415         case MSR_IA32_PLATFORM_ID:
2416         case MSR_IA32_EBL_CR_POWERON:
2417         case MSR_IA32_DEBUGCTLMSR:
2418         case MSR_IA32_LASTBRANCHFROMIP:
2419         case MSR_IA32_LASTBRANCHTOIP:
2420         case MSR_IA32_LASTINTFROMIP:
2421         case MSR_IA32_LASTINTTOIP:
2422         case MSR_K8_SYSCFG:
2423         case MSR_K8_TSEG_ADDR:
2424         case MSR_K8_TSEG_MASK:
2425         case MSR_K7_HWCR:
2426         case MSR_VM_HSAVE_PA:
2427         case MSR_K8_INT_PENDING_MSG:
2428         case MSR_AMD64_NB_CFG:
2429         case MSR_FAM10H_MMIO_CONF_BASE:
2430         case MSR_AMD64_BU_CFG2:
2431         case MSR_IA32_PERF_CTL:
2432         case MSR_AMD64_DC_CFG:
2433                 msr_info->data = 0;
2434                 break;
2435         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2436         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2437         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2438         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2439                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2440                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2441                 msr_info->data = 0;
2442                 break;
2443         case MSR_IA32_UCODE_REV:
2444                 msr_info->data = 0x100000000ULL;
2445                 break;
2446         case MSR_MTRRcap:
2447         case 0x200 ... 0x2ff:
2448                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2449         case 0xcd: /* fsb frequency */
2450                 msr_info->data = 3;
2451                 break;
2452                 /*
2453                  * MSR_EBC_FREQUENCY_ID
2454                  * Conservative value valid for even the basic CPU models.
2455                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2456                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2457                  * and 266MHz for model 3, or 4. Set Core Clock
2458                  * Frequency to System Bus Frequency Ratio to 1 (bits
2459                  * 31:24) even though these are only valid for CPU
2460                  * models > 2, however guests may end up dividing or
2461                  * multiplying by zero otherwise.
2462                  */
2463         case MSR_EBC_FREQUENCY_ID:
2464                 msr_info->data = 1 << 24;
2465                 break;
2466         case MSR_IA32_APICBASE:
2467                 msr_info->data = kvm_get_apic_base(vcpu);
2468                 break;
2469         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2470                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2471                 break;
2472         case MSR_IA32_TSCDEADLINE:
2473                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2474                 break;
2475         case MSR_IA32_TSC_ADJUST:
2476                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2477                 break;
2478         case MSR_IA32_MISC_ENABLE:
2479                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2480                 break;
2481         case MSR_IA32_SMBASE:
2482                 if (!msr_info->host_initiated)
2483                         return 1;
2484                 msr_info->data = vcpu->arch.smbase;
2485                 break;
2486         case MSR_IA32_PERF_STATUS:
2487                 /* TSC increment by tick */
2488                 msr_info->data = 1000ULL;
2489                 /* CPU multiplier */
2490                 msr_info->data |= (((uint64_t)4ULL) << 40);
2491                 break;
2492         case MSR_EFER:
2493                 msr_info->data = vcpu->arch.efer;
2494                 break;
2495         case MSR_KVM_WALL_CLOCK:
2496         case MSR_KVM_WALL_CLOCK_NEW:
2497                 msr_info->data = vcpu->kvm->arch.wall_clock;
2498                 break;
2499         case MSR_KVM_SYSTEM_TIME:
2500         case MSR_KVM_SYSTEM_TIME_NEW:
2501                 msr_info->data = vcpu->arch.time;
2502                 break;
2503         case MSR_KVM_ASYNC_PF_EN:
2504                 msr_info->data = vcpu->arch.apf.msr_val;
2505                 break;
2506         case MSR_KVM_STEAL_TIME:
2507                 msr_info->data = vcpu->arch.st.msr_val;
2508                 break;
2509         case MSR_KVM_PV_EOI_EN:
2510                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2511                 break;
2512         case MSR_IA32_P5_MC_ADDR:
2513         case MSR_IA32_P5_MC_TYPE:
2514         case MSR_IA32_MCG_CAP:
2515         case MSR_IA32_MCG_CTL:
2516         case MSR_IA32_MCG_STATUS:
2517         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2518                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2519         case MSR_K7_CLK_CTL:
2520                 /*
2521                  * Provide expected ramp-up count for K7. All other
2522                  * are set to zero, indicating minimum divisors for
2523                  * every field.
2524                  *
2525                  * This prevents guest kernels on AMD host with CPU
2526                  * type 6, model 8 and higher from exploding due to
2527                  * the rdmsr failing.
2528                  */
2529                 msr_info->data = 0x20000000;
2530                 break;
2531         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2532         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2533         case HV_X64_MSR_CRASH_CTL:
2534         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2535                 return kvm_hv_get_msr_common(vcpu,
2536                                              msr_info->index, &msr_info->data);
2537                 break;
2538         case MSR_IA32_BBL_CR_CTL3:
2539                 /* This legacy MSR exists but isn't fully documented in current
2540                  * silicon.  It is however accessed by winxp in very narrow
2541                  * scenarios where it sets bit #19, itself documented as
2542                  * a "reserved" bit.  Best effort attempt to source coherent
2543                  * read data here should the balance of the register be
2544                  * interpreted by the guest:
2545                  *
2546                  * L2 cache control register 3: 64GB range, 256KB size,
2547                  * enabled, latency 0x1, configured
2548                  */
2549                 msr_info->data = 0xbe702111;
2550                 break;
2551         case MSR_AMD64_OSVW_ID_LENGTH:
2552                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2553                         return 1;
2554                 msr_info->data = vcpu->arch.osvw.length;
2555                 break;
2556         case MSR_AMD64_OSVW_STATUS:
2557                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2558                         return 1;
2559                 msr_info->data = vcpu->arch.osvw.status;
2560                 break;
2561         case MSR_PLATFORM_INFO:
2562                 msr_info->data = vcpu->arch.msr_platform_info;
2563                 break;
2564         case MSR_MISC_FEATURES_ENABLES:
2565                 msr_info->data = vcpu->arch.msr_misc_features_enables;
2566                 break;
2567         default:
2568                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2569                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2570                 if (!ignore_msrs) {
2571                         vcpu_debug_ratelimited(vcpu, "unhandled rdmsr: 0x%x\n",
2572                                                msr_info->index);
2573                         return 1;
2574                 } else {
2575                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);
2576                         msr_info->data = 0;
2577                 }
2578                 break;
2579         }
2580         return 0;
2581 }
2582 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2583
2584 /*
2585  * Read or write a bunch of msrs. All parameters are kernel addresses.
2586  *
2587  * @return number of msrs set successfully.
2588  */
2589 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2590                     struct kvm_msr_entry *entries,
2591                     int (*do_msr)(struct kvm_vcpu *vcpu,
2592                                   unsigned index, u64 *data))
2593 {
2594         int i, idx;
2595
2596         idx = srcu_read_lock(&vcpu->kvm->srcu);
2597         for (i = 0; i < msrs->nmsrs; ++i)
2598                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2599                         break;
2600         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2601
2602         return i;
2603 }
2604
2605 /*
2606  * Read or write a bunch of msrs. Parameters are user addresses.
2607  *
2608  * @return number of msrs set successfully.
2609  */
2610 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2611                   int (*do_msr)(struct kvm_vcpu *vcpu,
2612                                 unsigned index, u64 *data),
2613                   int writeback)
2614 {
2615         struct kvm_msrs msrs;
2616         struct kvm_msr_entry *entries;
2617         int r, n;
2618         unsigned size;
2619
2620         r = -EFAULT;
2621         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2622                 goto out;
2623
2624         r = -E2BIG;
2625         if (msrs.nmsrs >= MAX_IO_MSRS)
2626                 goto out;
2627
2628         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2629         entries = memdup_user(user_msrs->entries, size);
2630         if (IS_ERR(entries)) {
2631                 r = PTR_ERR(entries);
2632                 goto out;
2633         }
2634
2635         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2636         if (r < 0)
2637                 goto out_free;
2638
2639         r = -EFAULT;
2640         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2641                 goto out_free;
2642
2643         r = n;
2644
2645 out_free:
2646         kfree(entries);
2647 out:
2648         return r;
2649 }
2650
2651 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2652 {
2653         int r;
2654
2655         switch (ext) {
2656         case KVM_CAP_IRQCHIP:
2657         case KVM_CAP_HLT:
2658         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2659         case KVM_CAP_SET_TSS_ADDR:
2660         case KVM_CAP_EXT_CPUID:
2661         case KVM_CAP_EXT_EMUL_CPUID:
2662         case KVM_CAP_CLOCKSOURCE:
2663         case KVM_CAP_PIT:
2664         case KVM_CAP_NOP_IO_DELAY:
2665         case KVM_CAP_MP_STATE:
2666         case KVM_CAP_SYNC_MMU:
2667         case KVM_CAP_USER_NMI:
2668         case KVM_CAP_REINJECT_CONTROL:
2669         case KVM_CAP_IRQ_INJECT_STATUS:
2670         case KVM_CAP_IOEVENTFD:
2671         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2672         case KVM_CAP_PIT2:
2673         case KVM_CAP_PIT_STATE2:
2674         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2675         case KVM_CAP_XEN_HVM:
2676         case KVM_CAP_VCPU_EVENTS:
2677         case KVM_CAP_HYPERV:
2678         case KVM_CAP_HYPERV_VAPIC:
2679         case KVM_CAP_HYPERV_SPIN:
2680         case KVM_CAP_HYPERV_SYNIC:
2681         case KVM_CAP_HYPERV_SYNIC2:
2682         case KVM_CAP_HYPERV_VP_INDEX:
2683         case KVM_CAP_PCI_SEGMENT:
2684         case KVM_CAP_DEBUGREGS:
2685         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2686         case KVM_CAP_XSAVE:
2687         case KVM_CAP_ASYNC_PF:
2688         case KVM_CAP_GET_TSC_KHZ:
2689         case KVM_CAP_KVMCLOCK_CTRL:
2690         case KVM_CAP_READONLY_MEM:
2691         case KVM_CAP_HYPERV_TIME:
2692         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2693         case KVM_CAP_TSC_DEADLINE_TIMER:
2694         case KVM_CAP_ENABLE_CAP_VM:
2695         case KVM_CAP_DISABLE_QUIRKS:
2696         case KVM_CAP_SET_BOOT_CPU_ID:
2697         case KVM_CAP_SPLIT_IRQCHIP:
2698         case KVM_CAP_IMMEDIATE_EXIT:
2699                 r = 1;
2700                 break;
2701         case KVM_CAP_ADJUST_CLOCK:
2702                 r = KVM_CLOCK_TSC_STABLE;
2703                 break;
2704         case KVM_CAP_X86_GUEST_MWAIT:
2705                 r = kvm_mwait_in_guest();
2706                 break;
2707         case KVM_CAP_X86_SMM:
2708                 /* SMBASE is usually relocated above 1M on modern chipsets,
2709                  * and SMM handlers might indeed rely on 4G segment limits,
2710                  * so do not report SMM to be available if real mode is
2711                  * emulated via vm86 mode.  Still, do not go to great lengths
2712                  * to avoid userspace's usage of the feature, because it is a
2713                  * fringe case that is not enabled except via specific settings
2714                  * of the module parameters.
2715                  */
2716                 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2717                 break;
2718         case KVM_CAP_VAPIC:
2719                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2720                 break;
2721         case KVM_CAP_NR_VCPUS:
2722                 r = KVM_SOFT_MAX_VCPUS;
2723                 break;
2724         case KVM_CAP_MAX_VCPUS:
2725                 r = KVM_MAX_VCPUS;
2726                 break;
2727         case KVM_CAP_NR_MEMSLOTS:
2728                 r = KVM_USER_MEM_SLOTS;
2729                 break;
2730         case KVM_CAP_PV_MMU:    /* obsolete */
2731                 r = 0;
2732                 break;
2733         case KVM_CAP_MCE:
2734                 r = KVM_MAX_MCE_BANKS;
2735                 break;
2736         case KVM_CAP_XCRS:
2737                 r = boot_cpu_has(X86_FEATURE_XSAVE);
2738                 break;
2739         case KVM_CAP_TSC_CONTROL:
2740                 r = kvm_has_tsc_control;
2741                 break;
2742         case KVM_CAP_X2APIC_API:
2743                 r = KVM_X2APIC_API_VALID_FLAGS;
2744                 break;
2745         default:
2746                 r = 0;
2747                 break;
2748         }
2749         return r;
2750
2751 }
2752
2753 long kvm_arch_dev_ioctl(struct file *filp,
2754                         unsigned int ioctl, unsigned long arg)
2755 {
2756         void __user *argp = (void __user *)arg;
2757         long r;
2758
2759         switch (ioctl) {
2760         case KVM_GET_MSR_INDEX_LIST: {
2761                 struct kvm_msr_list __user *user_msr_list = argp;
2762                 struct kvm_msr_list msr_list;
2763                 unsigned n;
2764
2765                 r = -EFAULT;
2766                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2767                         goto out;
2768                 n = msr_list.nmsrs;
2769                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2770                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2771                         goto out;
2772                 r = -E2BIG;
2773                 if (n < msr_list.nmsrs)
2774                         goto out;
2775                 r = -EFAULT;
2776                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2777                                  num_msrs_to_save * sizeof(u32)))
2778                         goto out;
2779                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2780                                  &emulated_msrs,
2781                                  num_emulated_msrs * sizeof(u32)))
2782                         goto out;
2783                 r = 0;
2784                 break;
2785         }
2786         case KVM_GET_SUPPORTED_CPUID:
2787         case KVM_GET_EMULATED_CPUID: {
2788                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2789                 struct kvm_cpuid2 cpuid;
2790
2791                 r = -EFAULT;
2792                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2793                         goto out;
2794
2795                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2796                                             ioctl);
2797                 if (r)
2798                         goto out;
2799
2800                 r = -EFAULT;
2801                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2802                         goto out;
2803                 r = 0;
2804                 break;
2805         }
2806         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2807                 r = -EFAULT;
2808                 if (copy_to_user(argp, &kvm_mce_cap_supported,
2809                                  sizeof(kvm_mce_cap_supported)))
2810                         goto out;
2811                 r = 0;
2812                 break;
2813         }
2814         default:
2815                 r = -EINVAL;
2816         }
2817 out:
2818         return r;
2819 }
2820
2821 static void wbinvd_ipi(void *garbage)
2822 {
2823         wbinvd();
2824 }
2825
2826 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2827 {
2828         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2829 }
2830
2831 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2832 {
2833         /* Address WBINVD may be executed by guest */
2834         if (need_emulate_wbinvd(vcpu)) {
2835                 if (kvm_x86_ops->has_wbinvd_exit())
2836                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2837                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2838                         smp_call_function_single(vcpu->cpu,
2839                                         wbinvd_ipi, NULL, 1);
2840         }
2841
2842         kvm_x86_ops->vcpu_load(vcpu, cpu);
2843
2844         /* Apply any externally detected TSC adjustments (due to suspend) */
2845         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2846                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2847                 vcpu->arch.tsc_offset_adjustment = 0;
2848                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2849         }
2850
2851         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2852                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2853                                 rdtsc() - vcpu->arch.last_host_tsc;
2854                 if (tsc_delta < 0)
2855                         mark_tsc_unstable("KVM discovered backwards TSC");
2856
2857                 if (check_tsc_unstable()) {
2858                         u64 offset = kvm_compute_tsc_offset(vcpu,
2859                                                 vcpu->arch.last_guest_tsc);
2860                         kvm_vcpu_write_tsc_offset(vcpu, offset);
2861                         vcpu->arch.tsc_catchup = 1;
2862                 }
2863
2864                 if (kvm_lapic_hv_timer_in_use(vcpu))
2865                         kvm_lapic_restart_hv_timer(vcpu);
2866
2867                 /*
2868                  * On a host with synchronized TSC, there is no need to update
2869                  * kvmclock on vcpu->cpu migration
2870                  */
2871                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2872                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2873                 if (vcpu->cpu != cpu)
2874                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
2875                 vcpu->cpu = cpu;
2876         }
2877
2878         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2879 }
2880
2881 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
2882 {
2883         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2884                 return;
2885
2886         vcpu->arch.st.steal.preempted = 1;
2887
2888         kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.st.stime,
2889                         &vcpu->arch.st.steal.preempted,
2890                         offsetof(struct kvm_steal_time, preempted),
2891                         sizeof(vcpu->arch.st.steal.preempted));
2892 }
2893
2894 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2895 {
2896         int idx;
2897
2898         if (vcpu->preempted)
2899                 vcpu->arch.preempted_in_kernel = !kvm_x86_ops->get_cpl(vcpu);
2900
2901         /*
2902          * Disable page faults because we're in atomic context here.
2903          * kvm_write_guest_offset_cached() would call might_fault()
2904          * that relies on pagefault_disable() to tell if there's a
2905          * bug. NOTE: the write to guest memory may not go through if
2906          * during postcopy live migration or if there's heavy guest
2907          * paging.
2908          */
2909         pagefault_disable();
2910         /*
2911          * kvm_memslots() will be called by
2912          * kvm_write_guest_offset_cached() so take the srcu lock.
2913          */
2914         idx = srcu_read_lock(&vcpu->kvm->srcu);
2915         kvm_steal_time_set_preempted(vcpu);
2916         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2917         pagefault_enable();
2918         kvm_x86_ops->vcpu_put(vcpu);
2919         kvm_put_guest_fpu(vcpu);
2920         vcpu->arch.last_host_tsc = rdtsc();
2921 }
2922
2923 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2924                                     struct kvm_lapic_state *s)
2925 {
2926         if (kvm_x86_ops->sync_pir_to_irr && vcpu->arch.apicv_active)
2927                 kvm_x86_ops->sync_pir_to_irr(vcpu);
2928
2929         return kvm_apic_get_state(vcpu, s);
2930 }
2931
2932 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2933                                     struct kvm_lapic_state *s)
2934 {
2935         int r;
2936
2937         r = kvm_apic_set_state(vcpu, s);
2938         if (r)
2939                 return r;
2940         update_cr8_intercept(vcpu);
2941
2942         return 0;
2943 }
2944
2945 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
2946 {
2947         return (!lapic_in_kernel(vcpu) ||
2948                 kvm_apic_accept_pic_intr(vcpu));
2949 }
2950
2951 /*
2952  * if userspace requested an interrupt window, check that the
2953  * interrupt window is open.
2954  *
2955  * No need to exit to userspace if we already have an interrupt queued.
2956  */
2957 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
2958 {
2959         return kvm_arch_interrupt_allowed(vcpu) &&
2960                 !kvm_cpu_has_interrupt(vcpu) &&
2961                 !kvm_event_needs_reinjection(vcpu) &&
2962                 kvm_cpu_accept_dm_intr(vcpu);
2963 }
2964
2965 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2966                                     struct kvm_interrupt *irq)
2967 {
2968         if (irq->irq >= KVM_NR_INTERRUPTS)
2969                 return -EINVAL;
2970
2971         if (!irqchip_in_kernel(vcpu->kvm)) {
2972                 kvm_queue_interrupt(vcpu, irq->irq, false);
2973                 kvm_make_request(KVM_REQ_EVENT, vcpu);
2974                 return 0;
2975         }
2976
2977         /*
2978          * With in-kernel LAPIC, we only use this to inject EXTINT, so
2979          * fail for in-kernel 8259.
2980          */
2981         if (pic_in_kernel(vcpu->kvm))
2982                 return -ENXIO;
2983
2984         if (vcpu->arch.pending_external_vector != -1)
2985                 return -EEXIST;
2986
2987         vcpu->arch.pending_external_vector = irq->irq;
2988         kvm_make_request(KVM_REQ_EVENT, vcpu);
2989         return 0;
2990 }
2991
2992 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2993 {
2994         kvm_inject_nmi(vcpu);
2995
2996         return 0;
2997 }
2998
2999 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
3000 {
3001         kvm_make_request(KVM_REQ_SMI, vcpu);
3002
3003         return 0;
3004 }
3005
3006 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
3007                                            struct kvm_tpr_access_ctl *tac)
3008 {
3009         if (tac->flags)
3010                 return -EINVAL;
3011         vcpu->arch.tpr_access_reporting = !!tac->enabled;
3012         return 0;
3013 }
3014
3015 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
3016                                         u64 mcg_cap)
3017 {
3018         int r;
3019         unsigned bank_num = mcg_cap & 0xff, bank;
3020
3021         r = -EINVAL;
3022         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
3023                 goto out;
3024         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
3025                 goto out;
3026         r = 0;
3027         vcpu->arch.mcg_cap = mcg_cap;
3028         /* Init IA32_MCG_CTL to all 1s */
3029         if (mcg_cap & MCG_CTL_P)
3030                 vcpu->arch.mcg_ctl = ~(u64)0;
3031         /* Init IA32_MCi_CTL to all 1s */
3032         for (bank = 0; bank < bank_num; bank++)
3033                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3034
3035         if (kvm_x86_ops->setup_mce)
3036                 kvm_x86_ops->setup_mce(vcpu);
3037 out:
3038         return r;
3039 }
3040
3041 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3042                                       struct kvm_x86_mce *mce)
3043 {
3044         u64 mcg_cap = vcpu->arch.mcg_cap;
3045         unsigned bank_num = mcg_cap & 0xff;
3046         u64 *banks = vcpu->arch.mce_banks;
3047
3048         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3049                 return -EINVAL;
3050         /*
3051          * if IA32_MCG_CTL is not all 1s, the uncorrected error
3052          * reporting is disabled
3053          */
3054         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3055             vcpu->arch.mcg_ctl != ~(u64)0)
3056                 return 0;
3057         banks += 4 * mce->bank;
3058         /*
3059          * if IA32_MCi_CTL is not all 1s, the uncorrected error
3060          * reporting is disabled for the bank
3061          */
3062         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3063                 return 0;
3064         if (mce->status & MCI_STATUS_UC) {
3065                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3066                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3067                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3068                         return 0;
3069                 }
3070                 if (banks[1] & MCI_STATUS_VAL)
3071                         mce->status |= MCI_STATUS_OVER;
3072                 banks[2] = mce->addr;
3073                 banks[3] = mce->misc;
3074                 vcpu->arch.mcg_status = mce->mcg_status;
3075                 banks[1] = mce->status;
3076                 kvm_queue_exception(vcpu, MC_VECTOR);
3077         } else if (!(banks[1] & MCI_STATUS_VAL)
3078                    || !(banks[1] & MCI_STATUS_UC)) {
3079                 if (banks[1] & MCI_STATUS_VAL)
3080                         mce->status |= MCI_STATUS_OVER;
3081                 banks[2] = mce->addr;
3082                 banks[3] = mce->misc;
3083                 banks[1] = mce->status;
3084         } else
3085                 banks[1] |= MCI_STATUS_OVER;
3086         return 0;
3087 }
3088
3089 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3090                                                struct kvm_vcpu_events *events)
3091 {
3092         process_nmi(vcpu);
3093         /*
3094          * FIXME: pass injected and pending separately.  This is only
3095          * needed for nested virtualization, whose state cannot be
3096          * migrated yet.  For now we can combine them.
3097          */
3098         events->exception.injected =
3099                 (vcpu->arch.exception.pending ||
3100                  vcpu->arch.exception.injected) &&
3101                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
3102         events->exception.nr = vcpu->arch.exception.nr;
3103         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3104         events->exception.pad = 0;
3105         events->exception.error_code = vcpu->arch.exception.error_code;
3106
3107         events->interrupt.injected =
3108                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
3109         events->interrupt.nr = vcpu->arch.interrupt.nr;
3110         events->interrupt.soft = 0;
3111         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3112
3113         events->nmi.injected = vcpu->arch.nmi_injected;
3114         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3115         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3116         events->nmi.pad = 0;
3117
3118         events->sipi_vector = 0; /* never valid when reporting to user space */
3119
3120         events->smi.smm = is_smm(vcpu);
3121         events->smi.pending = vcpu->arch.smi_pending;
3122         events->smi.smm_inside_nmi =
3123                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3124         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3125
3126         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3127                          | KVM_VCPUEVENT_VALID_SHADOW
3128                          | KVM_VCPUEVENT_VALID_SMM);
3129         memset(&events->reserved, 0, sizeof(events->reserved));
3130 }
3131
3132 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags);
3133
3134 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3135                                               struct kvm_vcpu_events *events)
3136 {
3137         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3138                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3139                               | KVM_VCPUEVENT_VALID_SHADOW
3140                               | KVM_VCPUEVENT_VALID_SMM))
3141                 return -EINVAL;
3142
3143         if (events->exception.injected &&
3144             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR ||
3145              is_guest_mode(vcpu)))
3146                 return -EINVAL;
3147
3148         /* INITs are latched while in SMM */
3149         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
3150             (events->smi.smm || events->smi.pending) &&
3151             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
3152                 return -EINVAL;
3153
3154         process_nmi(vcpu);
3155         vcpu->arch.exception.injected = false;
3156         vcpu->arch.exception.pending = events->exception.injected;
3157         vcpu->arch.exception.nr = events->exception.nr;
3158         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3159         vcpu->arch.exception.error_code = events->exception.error_code;
3160
3161         vcpu->arch.interrupt.pending = events->interrupt.injected;
3162         vcpu->arch.interrupt.nr = events->interrupt.nr;
3163         vcpu->arch.interrupt.soft = events->interrupt.soft;
3164         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3165                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3166                                                   events->interrupt.shadow);
3167
3168         vcpu->arch.nmi_injected = events->nmi.injected;
3169         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3170                 vcpu->arch.nmi_pending = events->nmi.pending;
3171         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3172
3173         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3174             lapic_in_kernel(vcpu))
3175                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3176
3177         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3178                 u32 hflags = vcpu->arch.hflags;
3179                 if (events->smi.smm)
3180                         hflags |= HF_SMM_MASK;
3181                 else
3182                         hflags &= ~HF_SMM_MASK;
3183                 kvm_set_hflags(vcpu, hflags);
3184
3185                 vcpu->arch.smi_pending = events->smi.pending;
3186
3187                 if (events->smi.smm) {
3188                         if (events->smi.smm_inside_nmi)
3189                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3190                         else
3191                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3192                         if (lapic_in_kernel(vcpu)) {
3193                                 if (events->smi.latched_init)
3194                                         set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3195                                 else
3196                                         clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3197                         }
3198                 }
3199         }
3200
3201         kvm_make_request(KVM_REQ_EVENT, vcpu);
3202
3203         return 0;
3204 }
3205
3206 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3207                                              struct kvm_debugregs *dbgregs)
3208 {
3209         unsigned long val;
3210
3211         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3212         kvm_get_dr(vcpu, 6, &val);
3213         dbgregs->dr6 = val;
3214         dbgregs->dr7 = vcpu->arch.dr7;
3215         dbgregs->flags = 0;
3216         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3217 }
3218
3219 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3220                                             struct kvm_debugregs *dbgregs)
3221 {
3222         if (dbgregs->flags)
3223                 return -EINVAL;
3224
3225         if (dbgregs->dr6 & ~0xffffffffull)
3226                 return -EINVAL;
3227         if (dbgregs->dr7 & ~0xffffffffull)
3228                 return -EINVAL;
3229
3230         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3231         kvm_update_dr0123(vcpu);
3232         vcpu->arch.dr6 = dbgregs->dr6;
3233         kvm_update_dr6(vcpu);
3234         vcpu->arch.dr7 = dbgregs->dr7;
3235         kvm_update_dr7(vcpu);
3236
3237         return 0;
3238 }
3239
3240 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3241
3242 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3243 {
3244         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3245         u64 xstate_bv = xsave->header.xfeatures;
3246         u64 valid;
3247
3248         /*
3249          * Copy legacy XSAVE area, to avoid complications with CPUID
3250          * leaves 0 and 1 in the loop below.
3251          */
3252         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3253
3254         /* Set XSTATE_BV */
3255         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
3256         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3257
3258         /*
3259          * Copy each region from the possibly compacted offset to the
3260          * non-compacted offset.
3261          */
3262         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3263         while (valid) {
3264                 u64 feature = valid & -valid;
3265                 int index = fls64(feature) - 1;
3266                 void *src = get_xsave_addr(xsave, feature);
3267
3268                 if (src) {
3269                         u32 size, offset, ecx, edx;
3270                         cpuid_count(XSTATE_CPUID, index,
3271                                     &size, &offset, &ecx, &edx);
3272                         if (feature == XFEATURE_MASK_PKRU)
3273                                 memcpy(dest + offset, &vcpu->arch.pkru,
3274                                        sizeof(vcpu->arch.pkru));
3275                         else
3276                                 memcpy(dest + offset, src, size);
3277
3278                 }
3279
3280                 valid -= feature;
3281         }
3282 }
3283
3284 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3285 {
3286         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3287         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3288         u64 valid;
3289
3290         /*
3291          * Copy legacy XSAVE area, to avoid complications with CPUID
3292          * leaves 0 and 1 in the loop below.
3293          */
3294         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3295
3296         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3297         xsave->header.xfeatures = xstate_bv;
3298         if (boot_cpu_has(X86_FEATURE_XSAVES))
3299                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3300
3301         /*
3302          * Copy each region from the non-compacted offset to the
3303          * possibly compacted offset.
3304          */
3305         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3306         while (valid) {
3307                 u64 feature = valid & -valid;
3308                 int index = fls64(feature) - 1;
3309                 void *dest = get_xsave_addr(xsave, feature);
3310
3311                 if (dest) {
3312                         u32 size, offset, ecx, edx;
3313                         cpuid_count(XSTATE_CPUID, index,
3314                                     &size, &offset, &ecx, &edx);
3315                         if (feature == XFEATURE_MASK_PKRU)
3316                                 memcpy(&vcpu->arch.pkru, src + offset,
3317                                        sizeof(vcpu->arch.pkru));
3318                         else
3319                                 memcpy(dest, src + offset, size);
3320                 }
3321
3322                 valid -= feature;
3323         }
3324 }
3325
3326 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3327                                          struct kvm_xsave *guest_xsave)
3328 {
3329         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3330                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3331                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3332         } else {
3333                 memcpy(guest_xsave->region,
3334                         &vcpu->arch.guest_fpu.state.fxsave,
3335                         sizeof(struct fxregs_state));
3336                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3337                         XFEATURE_MASK_FPSSE;
3338         }
3339 }
3340
3341 #define XSAVE_MXCSR_OFFSET 24
3342
3343 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3344                                         struct kvm_xsave *guest_xsave)
3345 {
3346         u64 xstate_bv =
3347                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3348         u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
3349
3350         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3351                 /*
3352                  * Here we allow setting states that are not present in
3353                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3354                  * with old userspace.
3355                  */
3356                 if (xstate_bv & ~kvm_supported_xcr0() ||
3357                         mxcsr & ~mxcsr_feature_mask)
3358                         return -EINVAL;
3359                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3360         } else {
3361                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
3362                         mxcsr & ~mxcsr_feature_mask)
3363                         return -EINVAL;
3364                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3365                         guest_xsave->region, sizeof(struct fxregs_state));
3366         }
3367         return 0;
3368 }
3369
3370 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3371                                         struct kvm_xcrs *guest_xcrs)
3372 {
3373         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3374                 guest_xcrs->nr_xcrs = 0;
3375                 return;
3376         }
3377
3378         guest_xcrs->nr_xcrs = 1;
3379         guest_xcrs->flags = 0;
3380         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3381         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3382 }
3383
3384 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3385                                        struct kvm_xcrs *guest_xcrs)
3386 {
3387         int i, r = 0;
3388
3389         if (!boot_cpu_has(X86_FEATURE_XSAVE))
3390                 return -EINVAL;
3391
3392         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3393                 return -EINVAL;
3394
3395         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3396                 /* Only support XCR0 currently */
3397                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3398                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3399                                 guest_xcrs->xcrs[i].value);
3400                         break;
3401                 }
3402         if (r)
3403                 r = -EINVAL;
3404         return r;
3405 }
3406
3407 /*
3408  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3409  * stopped by the hypervisor.  This function will be called from the host only.
3410  * EINVAL is returned when the host attempts to set the flag for a guest that
3411  * does not support pv clocks.
3412  */
3413 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3414 {
3415         if (!vcpu->arch.pv_time_enabled)
3416                 return -EINVAL;
3417         vcpu->arch.pvclock_set_guest_stopped_request = true;
3418         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3419         return 0;
3420 }
3421
3422 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
3423                                      struct kvm_enable_cap *cap)
3424 {
3425         if (cap->flags)
3426                 return -EINVAL;
3427
3428         switch (cap->cap) {
3429         case KVM_CAP_HYPERV_SYNIC2:
3430                 if (cap->args[0])
3431                         return -EINVAL;
3432         case KVM_CAP_HYPERV_SYNIC:
3433                 if (!irqchip_in_kernel(vcpu->kvm))
3434                         return -EINVAL;
3435                 return kvm_hv_activate_synic(vcpu, cap->cap ==
3436                                              KVM_CAP_HYPERV_SYNIC2);
3437         default:
3438                 return -EINVAL;
3439         }
3440 }
3441
3442 long kvm_arch_vcpu_ioctl(struct file *filp,
3443                          unsigned int ioctl, unsigned long arg)
3444 {
3445         struct kvm_vcpu *vcpu = filp->private_data;
3446         void __user *argp = (void __user *)arg;
3447         int r;
3448         union {
3449                 struct kvm_lapic_state *lapic;
3450                 struct kvm_xsave *xsave;
3451                 struct kvm_xcrs *xcrs;
3452                 void *buffer;
3453         } u;
3454
3455         u.buffer = NULL;
3456         switch (ioctl) {
3457         case KVM_GET_LAPIC: {
3458                 r = -EINVAL;
3459                 if (!lapic_in_kernel(vcpu))
3460                         goto out;
3461                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3462
3463                 r = -ENOMEM;
3464                 if (!u.lapic)
3465                         goto out;
3466                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3467                 if (r)
3468                         goto out;
3469                 r = -EFAULT;
3470                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3471                         goto out;
3472                 r = 0;
3473                 break;
3474         }
3475         case KVM_SET_LAPIC: {
3476                 r = -EINVAL;
3477                 if (!lapic_in_kernel(vcpu))
3478                         goto out;
3479                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3480                 if (IS_ERR(u.lapic))
3481                         return PTR_ERR(u.lapic);
3482
3483                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3484                 break;
3485         }
3486         case KVM_INTERRUPT: {
3487                 struct kvm_interrupt irq;
3488
3489                 r = -EFAULT;
3490                 if (copy_from_user(&irq, argp, sizeof irq))
3491                         goto out;
3492                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3493                 break;
3494         }
3495         case KVM_NMI: {
3496                 r = kvm_vcpu_ioctl_nmi(vcpu);
3497                 break;
3498         }
3499         case KVM_SMI: {
3500                 r = kvm_vcpu_ioctl_smi(vcpu);
3501                 break;
3502         }
3503         case KVM_SET_CPUID: {
3504                 struct kvm_cpuid __user *cpuid_arg = argp;
3505                 struct kvm_cpuid cpuid;
3506
3507                 r = -EFAULT;
3508                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3509                         goto out;
3510                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3511                 break;
3512         }
3513         case KVM_SET_CPUID2: {
3514                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3515                 struct kvm_cpuid2 cpuid;
3516
3517                 r = -EFAULT;
3518                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3519                         goto out;
3520                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3521                                               cpuid_arg->entries);
3522                 break;
3523         }
3524         case KVM_GET_CPUID2: {
3525                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3526                 struct kvm_cpuid2 cpuid;
3527
3528                 r = -EFAULT;
3529                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3530                         goto out;
3531                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3532                                               cpuid_arg->entries);
3533                 if (r)
3534                         goto out;
3535                 r = -EFAULT;
3536                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3537                         goto out;
3538                 r = 0;
3539                 break;
3540         }
3541         case KVM_GET_MSRS:
3542                 r = msr_io(vcpu, argp, do_get_msr, 1);
3543                 break;
3544         case KVM_SET_MSRS:
3545                 r = msr_io(vcpu, argp, do_set_msr, 0);
3546                 break;
3547         case KVM_TPR_ACCESS_REPORTING: {
3548                 struct kvm_tpr_access_ctl tac;
3549
3550                 r = -EFAULT;
3551                 if (copy_from_user(&tac, argp, sizeof tac))
3552                         goto out;
3553                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3554                 if (r)
3555                         goto out;
3556                 r = -EFAULT;
3557                 if (copy_to_user(argp, &tac, sizeof tac))
3558                         goto out;
3559                 r = 0;
3560                 break;
3561         };
3562         case KVM_SET_VAPIC_ADDR: {
3563                 struct kvm_vapic_addr va;
3564                 int idx;
3565
3566                 r = -EINVAL;
3567                 if (!lapic_in_kernel(vcpu))
3568                         goto out;
3569                 r = -EFAULT;
3570                 if (copy_from_user(&va, argp, sizeof va))
3571                         goto out;
3572                 idx = srcu_read_lock(&vcpu->kvm->srcu);
3573                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3574                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3575                 break;
3576         }
3577         case KVM_X86_SETUP_MCE: {
3578                 u64 mcg_cap;
3579
3580                 r = -EFAULT;
3581                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3582                         goto out;
3583                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3584                 break;
3585         }
3586         case KVM_X86_SET_MCE: {
3587                 struct kvm_x86_mce mce;
3588
3589                 r = -EFAULT;
3590                 if (copy_from_user(&mce, argp, sizeof mce))
3591                         goto out;
3592                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3593                 break;
3594         }
3595         case KVM_GET_VCPU_EVENTS: {
3596                 struct kvm_vcpu_events events;
3597
3598                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3599
3600                 r = -EFAULT;
3601                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3602                         break;
3603                 r = 0;
3604                 break;
3605         }
3606         case KVM_SET_VCPU_EVENTS: {
3607                 struct kvm_vcpu_events events;
3608
3609                 r = -EFAULT;
3610                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3611                         break;
3612
3613                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3614                 break;
3615         }
3616         case KVM_GET_DEBUGREGS: {
3617                 struct kvm_debugregs dbgregs;
3618
3619                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3620
3621                 r = -EFAULT;
3622                 if (copy_to_user(argp, &dbgregs,
3623                                  sizeof(struct kvm_debugregs)))
3624                         break;
3625                 r = 0;
3626                 break;
3627         }
3628         case KVM_SET_DEBUGREGS: {
3629                 struct kvm_debugregs dbgregs;
3630
3631                 r = -EFAULT;
3632                 if (copy_from_user(&dbgregs, argp,
3633                                    sizeof(struct kvm_debugregs)))
3634                         break;
3635
3636                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3637                 break;
3638         }
3639         case KVM_GET_XSAVE: {
3640                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3641                 r = -ENOMEM;
3642                 if (!u.xsave)
3643                         break;
3644
3645                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3646
3647                 r = -EFAULT;
3648                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3649                         break;
3650                 r = 0;
3651                 break;
3652         }
3653         case KVM_SET_XSAVE: {
3654                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3655                 if (IS_ERR(u.xsave))
3656                         return PTR_ERR(u.xsave);
3657
3658                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3659                 break;
3660         }
3661         case KVM_GET_XCRS: {
3662                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3663                 r = -ENOMEM;
3664                 if (!u.xcrs)
3665                         break;
3666
3667                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3668
3669                 r = -EFAULT;
3670                 if (copy_to_user(argp, u.xcrs,
3671                                  sizeof(struct kvm_xcrs)))
3672                         break;
3673                 r = 0;
3674                 break;
3675         }
3676         case KVM_SET_XCRS: {
3677                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3678                 if (IS_ERR(u.xcrs))
3679                         return PTR_ERR(u.xcrs);
3680
3681                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3682                 break;
3683         }
3684         case KVM_SET_TSC_KHZ: {
3685                 u32 user_tsc_khz;
3686
3687                 r = -EINVAL;
3688                 user_tsc_khz = (u32)arg;
3689
3690                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3691                         goto out;
3692
3693                 if (user_tsc_khz == 0)
3694                         user_tsc_khz = tsc_khz;
3695
3696                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
3697                         r = 0;
3698
3699                 goto out;
3700         }
3701         case KVM_GET_TSC_KHZ: {
3702                 r = vcpu->arch.virtual_tsc_khz;
3703                 goto out;
3704         }
3705         case KVM_KVMCLOCK_CTRL: {
3706                 r = kvm_set_guest_paused(vcpu);
3707                 goto out;
3708         }
3709         case KVM_ENABLE_CAP: {
3710                 struct kvm_enable_cap cap;
3711
3712                 r = -EFAULT;
3713                 if (copy_from_user(&cap, argp, sizeof(cap)))
3714                         goto out;
3715                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
3716                 break;
3717         }
3718         default:
3719                 r = -EINVAL;
3720         }
3721 out:
3722         kfree(u.buffer);
3723         return r;
3724 }
3725
3726 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3727 {
3728         return VM_FAULT_SIGBUS;
3729 }
3730
3731 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3732 {
3733         int ret;
3734
3735         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3736                 return -EINVAL;
3737         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3738         return ret;
3739 }
3740
3741 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3742                                               u64 ident_addr)
3743 {
3744         kvm->arch.ept_identity_map_addr = ident_addr;
3745         return 0;
3746 }
3747
3748 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3749                                           u32 kvm_nr_mmu_pages)
3750 {
3751         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3752                 return -EINVAL;
3753
3754         mutex_lock(&kvm->slots_lock);
3755
3756         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3757         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3758
3759         mutex_unlock(&kvm->slots_lock);
3760         return 0;
3761 }
3762
3763 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3764 {
3765         return kvm->arch.n_max_mmu_pages;
3766 }
3767
3768 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3769 {
3770         struct kvm_pic *pic = kvm->arch.vpic;
3771         int r;
3772
3773         r = 0;
3774         switch (chip->chip_id) {
3775         case KVM_IRQCHIP_PIC_MASTER:
3776                 memcpy(&chip->chip.pic, &pic->pics[0],
3777                         sizeof(struct kvm_pic_state));
3778                 break;
3779         case KVM_IRQCHIP_PIC_SLAVE:
3780                 memcpy(&chip->chip.pic, &pic->pics[1],
3781                         sizeof(struct kvm_pic_state));
3782                 break;
3783         case KVM_IRQCHIP_IOAPIC:
3784                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
3785                 break;
3786         default:
3787                 r = -EINVAL;
3788                 break;
3789         }
3790         return r;
3791 }
3792
3793 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3794 {
3795         struct kvm_pic *pic = kvm->arch.vpic;
3796         int r;
3797
3798         r = 0;
3799         switch (chip->chip_id) {
3800         case KVM_IRQCHIP_PIC_MASTER:
3801                 spin_lock(&pic->lock);
3802                 memcpy(&pic->pics[0], &chip->chip.pic,
3803                         sizeof(struct kvm_pic_state));
3804                 spin_unlock(&pic->lock);
3805                 break;
3806         case KVM_IRQCHIP_PIC_SLAVE:
3807                 spin_lock(&pic->lock);
3808                 memcpy(&pic->pics[1], &chip->chip.pic,
3809                         sizeof(struct kvm_pic_state));
3810                 spin_unlock(&pic->lock);
3811                 break;
3812         case KVM_IRQCHIP_IOAPIC:
3813                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
3814                 break;
3815         default:
3816                 r = -EINVAL;
3817                 break;
3818         }
3819         kvm_pic_update_irq(pic);
3820         return r;
3821 }
3822
3823 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3824 {
3825         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
3826
3827         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
3828
3829         mutex_lock(&kps->lock);
3830         memcpy(ps, &kps->channels, sizeof(*ps));
3831         mutex_unlock(&kps->lock);
3832         return 0;
3833 }
3834
3835 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3836 {
3837         int i;
3838         struct kvm_pit *pit = kvm->arch.vpit;
3839
3840         mutex_lock(&pit->pit_state.lock);
3841         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
3842         for (i = 0; i < 3; i++)
3843                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
3844         mutex_unlock(&pit->pit_state.lock);
3845         return 0;
3846 }
3847
3848 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3849 {
3850         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3851         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3852                 sizeof(ps->channels));
3853         ps->flags = kvm->arch.vpit->pit_state.flags;
3854         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3855         memset(&ps->reserved, 0, sizeof(ps->reserved));
3856         return 0;
3857 }
3858
3859 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3860 {
3861         int start = 0;
3862         int i;
3863         u32 prev_legacy, cur_legacy;
3864         struct kvm_pit *pit = kvm->arch.vpit;
3865
3866         mutex_lock(&pit->pit_state.lock);
3867         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3868         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3869         if (!prev_legacy && cur_legacy)
3870                 start = 1;
3871         memcpy(&pit->pit_state.channels, &ps->channels,
3872                sizeof(pit->pit_state.channels));
3873         pit->pit_state.flags = ps->flags;
3874         for (i = 0; i < 3; i++)
3875                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
3876                                    start && i == 0);
3877         mutex_unlock(&pit->pit_state.lock);
3878         return 0;
3879 }
3880
3881 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3882                                  struct kvm_reinject_control *control)
3883 {
3884         struct kvm_pit *pit = kvm->arch.vpit;
3885
3886         if (!pit)
3887                 return -ENXIO;
3888
3889         /* pit->pit_state.lock was overloaded to prevent userspace from getting
3890          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
3891          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
3892          */
3893         mutex_lock(&pit->pit_state.lock);
3894         kvm_pit_set_reinject(pit, control->pit_reinject);
3895         mutex_unlock(&pit->pit_state.lock);
3896
3897         return 0;
3898 }
3899
3900 /**
3901  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3902  * @kvm: kvm instance
3903  * @log: slot id and address to which we copy the log
3904  *
3905  * Steps 1-4 below provide general overview of dirty page logging. See
3906  * kvm_get_dirty_log_protect() function description for additional details.
3907  *
3908  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3909  * always flush the TLB (step 4) even if previous step failed  and the dirty
3910  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3911  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3912  * writes will be marked dirty for next log read.
3913  *
3914  *   1. Take a snapshot of the bit and clear it if needed.
3915  *   2. Write protect the corresponding page.
3916  *   3. Copy the snapshot to the userspace.
3917  *   4. Flush TLB's if needed.
3918  */
3919 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3920 {
3921         bool is_dirty = false;
3922         int r;
3923
3924         mutex_lock(&kvm->slots_lock);
3925
3926         /*
3927          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3928          */
3929         if (kvm_x86_ops->flush_log_dirty)
3930                 kvm_x86_ops->flush_log_dirty(kvm);
3931
3932         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3933
3934         /*
3935          * All the TLBs can be flushed out of mmu lock, see the comments in
3936          * kvm_mmu_slot_remove_write_access().
3937          */
3938         lockdep_assert_held(&kvm->slots_lock);
3939         if (is_dirty)
3940                 kvm_flush_remote_tlbs(kvm);
3941
3942         mutex_unlock(&kvm->slots_lock);
3943         return r;
3944 }
3945
3946 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3947                         bool line_status)
3948 {
3949         if (!irqchip_in_kernel(kvm))
3950                 return -ENXIO;
3951
3952         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3953                                         irq_event->irq, irq_event->level,
3954                                         line_status);
3955         return 0;
3956 }
3957
3958 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
3959                                    struct kvm_enable_cap *cap)
3960 {
3961         int r;
3962
3963         if (cap->flags)
3964                 return -EINVAL;
3965
3966         switch (cap->cap) {
3967         case KVM_CAP_DISABLE_QUIRKS:
3968                 kvm->arch.disabled_quirks = cap->args[0];
3969                 r = 0;
3970                 break;
3971         case KVM_CAP_SPLIT_IRQCHIP: {
3972                 mutex_lock(&kvm->lock);
3973                 r = -EINVAL;
3974                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
3975                         goto split_irqchip_unlock;
3976                 r = -EEXIST;
3977                 if (irqchip_in_kernel(kvm))
3978                         goto split_irqchip_unlock;
3979                 if (kvm->created_vcpus)
3980                         goto split_irqchip_unlock;
3981                 r = kvm_setup_empty_irq_routing(kvm);
3982                 if (r)
3983                         goto split_irqchip_unlock;
3984                 /* Pairs with irqchip_in_kernel. */
3985                 smp_wmb();
3986                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
3987                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
3988                 r = 0;
3989 split_irqchip_unlock:
3990                 mutex_unlock(&kvm->lock);
3991                 break;
3992         }
3993         case KVM_CAP_X2APIC_API:
3994                 r = -EINVAL;
3995                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
3996                         break;
3997
3998                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
3999                         kvm->arch.x2apic_format = true;
4000                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
4001                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
4002
4003                 r = 0;
4004                 break;
4005         default:
4006                 r = -EINVAL;
4007                 break;
4008         }
4009         return r;
4010 }
4011
4012 long kvm_arch_vm_ioctl(struct file *filp,
4013                        unsigned int ioctl, unsigned long arg)
4014 {
4015         struct kvm *kvm = filp->private_data;
4016         void __user *argp = (void __user *)arg;
4017         int r = -ENOTTY;
4018         /*
4019          * This union makes it completely explicit to gcc-3.x
4020          * that these two variables' stack usage should be
4021          * combined, not added together.
4022          */
4023         union {
4024                 struct kvm_pit_state ps;
4025                 struct kvm_pit_state2 ps2;
4026                 struct kvm_pit_config pit_config;
4027         } u;
4028
4029         switch (ioctl) {
4030         case KVM_SET_TSS_ADDR:
4031                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
4032                 break;
4033         case KVM_SET_IDENTITY_MAP_ADDR: {
4034                 u64 ident_addr;
4035
4036                 r = -EFAULT;
4037                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
4038                         goto out;
4039                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
4040                 break;
4041         }
4042         case KVM_SET_NR_MMU_PAGES:
4043                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
4044                 break;
4045         case KVM_GET_NR_MMU_PAGES:
4046                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
4047                 break;
4048         case KVM_CREATE_IRQCHIP: {
4049                 mutex_lock(&kvm->lock);
4050
4051                 r = -EEXIST;
4052                 if (irqchip_in_kernel(kvm))
4053                         goto create_irqchip_unlock;
4054
4055                 r = -EINVAL;
4056                 if (kvm->created_vcpus)
4057                         goto create_irqchip_unlock;
4058
4059                 r = kvm_pic_init(kvm);
4060                 if (r)
4061                         goto create_irqchip_unlock;
4062
4063                 r = kvm_ioapic_init(kvm);
4064                 if (r) {
4065                         kvm_pic_destroy(kvm);
4066                         goto create_irqchip_unlock;
4067                 }
4068
4069                 r = kvm_setup_default_irq_routing(kvm);
4070                 if (r) {
4071                         kvm_ioapic_destroy(kvm);
4072                         kvm_pic_destroy(kvm);
4073                         goto create_irqchip_unlock;
4074                 }
4075                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4076                 smp_wmb();
4077                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
4078         create_irqchip_unlock:
4079                 mutex_unlock(&kvm->lock);
4080                 break;
4081         }
4082         case KVM_CREATE_PIT:
4083                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
4084                 goto create_pit;
4085         case KVM_CREATE_PIT2:
4086                 r = -EFAULT;
4087                 if (copy_from_user(&u.pit_config, argp,
4088                                    sizeof(struct kvm_pit_config)))
4089                         goto out;
4090         create_pit:
4091                 mutex_lock(&kvm->lock);
4092                 r = -EEXIST;
4093                 if (kvm->arch.vpit)
4094                         goto create_pit_unlock;
4095                 r = -ENOMEM;
4096                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
4097                 if (kvm->arch.vpit)
4098                         r = 0;
4099         create_pit_unlock:
4100                 mutex_unlock(&kvm->lock);
4101                 break;
4102         case KVM_GET_IRQCHIP: {
4103                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4104                 struct kvm_irqchip *chip;
4105
4106                 chip = memdup_user(argp, sizeof(*chip));
4107                 if (IS_ERR(chip)) {
4108                         r = PTR_ERR(chip);
4109                         goto out;
4110                 }
4111
4112                 r = -ENXIO;
4113                 if (!irqchip_kernel(kvm))
4114                         goto get_irqchip_out;
4115                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
4116                 if (r)
4117                         goto get_irqchip_out;
4118                 r = -EFAULT;
4119                 if (copy_to_user(argp, chip, sizeof *chip))
4120                         goto get_irqchip_out;
4121                 r = 0;
4122         get_irqchip_out:
4123                 kfree(chip);
4124                 break;
4125         }
4126         case KVM_SET_IRQCHIP: {
4127                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4128                 struct kvm_irqchip *chip;
4129
4130                 chip = memdup_user(argp, sizeof(*chip));
4131                 if (IS_ERR(chip)) {
4132                         r = PTR_ERR(chip);
4133                         goto out;
4134                 }
4135
4136                 r = -ENXIO;
4137                 if (!irqchip_kernel(kvm))
4138                         goto set_irqchip_out;
4139                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4140                 if (r)
4141                         goto set_irqchip_out;
4142                 r = 0;
4143         set_irqchip_out:
4144                 kfree(chip);
4145                 break;
4146         }
4147         case KVM_GET_PIT: {
4148                 r = -EFAULT;
4149                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4150                         goto out;
4151                 r = -ENXIO;
4152                 if (!kvm->arch.vpit)
4153                         goto out;
4154                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4155                 if (r)
4156                         goto out;
4157                 r = -EFAULT;
4158                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4159                         goto out;
4160                 r = 0;
4161                 break;
4162         }
4163         case KVM_SET_PIT: {
4164                 r = -EFAULT;
4165                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
4166                         goto out;
4167                 r = -ENXIO;
4168                 if (!kvm->arch.vpit)
4169                         goto out;
4170                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4171                 break;
4172         }
4173         case KVM_GET_PIT2: {
4174                 r = -ENXIO;
4175                 if (!kvm->arch.vpit)
4176                         goto out;
4177                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4178                 if (r)
4179                         goto out;
4180                 r = -EFAULT;
4181                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4182                         goto out;
4183                 r = 0;
4184                 break;
4185         }
4186         case KVM_SET_PIT2: {
4187                 r = -EFAULT;
4188                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4189                         goto out;
4190                 r = -ENXIO;
4191                 if (!kvm->arch.vpit)
4192                         goto out;
4193                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4194                 break;
4195         }
4196         case KVM_REINJECT_CONTROL: {
4197                 struct kvm_reinject_control control;
4198                 r =  -EFAULT;
4199                 if (copy_from_user(&control, argp, sizeof(control)))
4200                         goto out;
4201                 r = kvm_vm_ioctl_reinject(kvm, &control);
4202                 break;
4203         }
4204         case KVM_SET_BOOT_CPU_ID:
4205                 r = 0;
4206                 mutex_lock(&kvm->lock);
4207                 if (kvm->created_vcpus)
4208                         r = -EBUSY;
4209                 else
4210                         kvm->arch.bsp_vcpu_id = arg;
4211                 mutex_unlock(&kvm->lock);
4212                 break;
4213         case KVM_XEN_HVM_CONFIG: {
4214                 r = -EFAULT;
4215                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
4216                                    sizeof(struct kvm_xen_hvm_config)))
4217                         goto out;
4218                 r = -EINVAL;
4219                 if (kvm->arch.xen_hvm_config.flags)
4220                         goto out;
4221                 r = 0;
4222                 break;
4223         }
4224         case KVM_SET_CLOCK: {
4225                 struct kvm_clock_data user_ns;
4226                 u64 now_ns;
4227
4228                 r = -EFAULT;
4229                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4230                         goto out;
4231
4232                 r = -EINVAL;
4233                 if (user_ns.flags)
4234                         goto out;
4235
4236                 r = 0;
4237                 /*
4238                  * TODO: userspace has to take care of races with VCPU_RUN, so
4239                  * kvm_gen_update_masterclock() can be cut down to locked
4240                  * pvclock_update_vm_gtod_copy().
4241                  */
4242                 kvm_gen_update_masterclock(kvm);
4243                 now_ns = get_kvmclock_ns(kvm);
4244                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
4245                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
4246                 break;
4247         }
4248         case KVM_GET_CLOCK: {
4249                 struct kvm_clock_data user_ns;
4250                 u64 now_ns;
4251
4252                 now_ns = get_kvmclock_ns(kvm);
4253                 user_ns.clock = now_ns;
4254                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
4255                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4256
4257                 r = -EFAULT;
4258                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4259                         goto out;
4260                 r = 0;
4261                 break;
4262         }
4263         case KVM_ENABLE_CAP: {
4264                 struct kvm_enable_cap cap;
4265
4266                 r = -EFAULT;
4267                 if (copy_from_user(&cap, argp, sizeof(cap)))
4268                         goto out;
4269                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
4270                 break;
4271         }
4272         default:
4273                 r = -ENOTTY;
4274         }
4275 out:
4276         return r;
4277 }
4278
4279 static void kvm_init_msr_list(void)
4280 {
4281         u32 dummy[2];
4282         unsigned i, j;
4283
4284         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4285                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4286                         continue;
4287
4288                 /*
4289                  * Even MSRs that are valid in the host may not be exposed
4290                  * to the guests in some cases.
4291                  */
4292                 switch (msrs_to_save[i]) {
4293                 case MSR_IA32_BNDCFGS:
4294                         if (!kvm_x86_ops->mpx_supported())
4295                                 continue;
4296                         break;
4297                 case MSR_TSC_AUX:
4298                         if (!kvm_x86_ops->rdtscp_supported())
4299                                 continue;
4300                         break;
4301                 default:
4302                         break;
4303                 }
4304
4305                 if (j < i)
4306                         msrs_to_save[j] = msrs_to_save[i];
4307                 j++;
4308         }
4309         num_msrs_to_save = j;
4310
4311         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4312                 switch (emulated_msrs[i]) {
4313                 case MSR_IA32_SMBASE:
4314                         if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
4315                                 continue;
4316                         break;
4317                 default:
4318                         break;
4319                 }
4320
4321                 if (j < i)
4322                         emulated_msrs[j] = emulated_msrs[i];
4323                 j++;
4324         }
4325         num_emulated_msrs = j;
4326 }
4327
4328 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4329                            const void *v)
4330 {
4331         int handled = 0;
4332         int n;
4333
4334         do {
4335                 n = min(len, 8);
4336                 if (!(lapic_in_kernel(vcpu) &&
4337                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4338                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4339                         break;
4340                 handled += n;
4341                 addr += n;
4342                 len -= n;
4343                 v += n;
4344         } while (len);
4345
4346         return handled;
4347 }
4348
4349 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4350 {
4351         int handled = 0;
4352         int n;
4353
4354         do {
4355                 n = min(len, 8);
4356                 if (!(lapic_in_kernel(vcpu) &&
4357                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4358                                          addr, n, v))
4359                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4360                         break;
4361                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
4362                 handled += n;
4363                 addr += n;
4364                 len -= n;
4365                 v += n;
4366         } while (len);
4367
4368         return handled;
4369 }
4370
4371 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4372                         struct kvm_segment *var, int seg)
4373 {
4374         kvm_x86_ops->set_segment(vcpu, var, seg);
4375 }
4376
4377 void kvm_get_segment(struct kvm_vcpu *vcpu,
4378                      struct kvm_segment *var, int seg)
4379 {
4380         kvm_x86_ops->get_segment(vcpu, var, seg);
4381 }
4382
4383 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4384                            struct x86_exception *exception)
4385 {
4386         gpa_t t_gpa;
4387
4388         BUG_ON(!mmu_is_nested(vcpu));
4389
4390         /* NPT walks are always user-walks */
4391         access |= PFERR_USER_MASK;
4392         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4393
4394         return t_gpa;
4395 }
4396
4397 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4398                               struct x86_exception *exception)
4399 {
4400         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4401         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4402 }
4403
4404  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4405                                 struct x86_exception *exception)
4406 {
4407         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4408         access |= PFERR_FETCH_MASK;
4409         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4410 }
4411
4412 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4413                                struct x86_exception *exception)
4414 {
4415         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4416         access |= PFERR_WRITE_MASK;
4417         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4418 }
4419
4420 /* uses this to access any guest's mapped memory without checking CPL */
4421 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4422                                 struct x86_exception *exception)
4423 {
4424         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4425 }
4426
4427 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4428                                       struct kvm_vcpu *vcpu, u32 access,
4429                                       struct x86_exception *exception)
4430 {
4431         void *data = val;
4432         int r = X86EMUL_CONTINUE;
4433
4434         while (bytes) {
4435                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4436                                                             exception);
4437                 unsigned offset = addr & (PAGE_SIZE-1);
4438                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4439                 int ret;
4440
4441                 if (gpa == UNMAPPED_GVA)
4442                         return X86EMUL_PROPAGATE_FAULT;
4443                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4444                                                offset, toread);
4445                 if (ret < 0) {
4446                         r = X86EMUL_IO_NEEDED;
4447                         goto out;
4448                 }
4449
4450                 bytes -= toread;
4451                 data += toread;
4452                 addr += toread;
4453         }
4454 out:
4455         return r;
4456 }
4457
4458 /* used for instruction fetching */
4459 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4460                                 gva_t addr, void *val, unsigned int bytes,
4461                                 struct x86_exception *exception)
4462 {
4463         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4464         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4465         unsigned offset;
4466         int ret;
4467
4468         /* Inline kvm_read_guest_virt_helper for speed.  */
4469         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4470                                                     exception);
4471         if (unlikely(gpa == UNMAPPED_GVA))
4472                 return X86EMUL_PROPAGATE_FAULT;
4473
4474         offset = addr & (PAGE_SIZE-1);
4475         if (WARN_ON(offset + bytes > PAGE_SIZE))
4476                 bytes = (unsigned)PAGE_SIZE - offset;
4477         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4478                                        offset, bytes);
4479         if (unlikely(ret < 0))
4480                 return X86EMUL_IO_NEEDED;
4481
4482         return X86EMUL_CONTINUE;
4483 }
4484
4485 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4486                                gva_t addr, void *val, unsigned int bytes,
4487                                struct x86_exception *exception)
4488 {
4489         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4490         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4491
4492         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4493                                           exception);
4494 }
4495 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4496
4497 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4498                                       gva_t addr, void *val, unsigned int bytes,
4499                                       struct x86_exception *exception)
4500 {
4501         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4502         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4503 }
4504
4505 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
4506                 unsigned long addr, void *val, unsigned int bytes)
4507 {
4508         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4509         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
4510
4511         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
4512 }
4513
4514 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4515                                        gva_t addr, void *val,
4516                                        unsigned int bytes,
4517                                        struct x86_exception *exception)
4518 {
4519         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4520         void *data = val;
4521         int r = X86EMUL_CONTINUE;
4522
4523         while (bytes) {
4524                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4525                                                              PFERR_WRITE_MASK,
4526                                                              exception);
4527                 unsigned offset = addr & (PAGE_SIZE-1);
4528                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4529                 int ret;
4530
4531                 if (gpa == UNMAPPED_GVA)
4532                         return X86EMUL_PROPAGATE_FAULT;
4533                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4534                 if (ret < 0) {
4535                         r = X86EMUL_IO_NEEDED;
4536                         goto out;
4537                 }
4538
4539                 bytes -= towrite;
4540                 data += towrite;
4541                 addr += towrite;
4542         }
4543 out:
4544         return r;
4545 }
4546 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4547
4548 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4549                             gpa_t gpa, bool write)
4550 {
4551         /* For APIC access vmexit */
4552         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4553                 return 1;
4554
4555         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
4556                 trace_vcpu_match_mmio(gva, gpa, write, true);
4557                 return 1;
4558         }
4559
4560         return 0;
4561 }
4562
4563 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4564                                 gpa_t *gpa, struct x86_exception *exception,
4565                                 bool write)
4566 {
4567         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4568                 | (write ? PFERR_WRITE_MASK : 0);
4569
4570         /*
4571          * currently PKRU is only applied to ept enabled guest so
4572          * there is no pkey in EPT page table for L1 guest or EPT
4573          * shadow page table for L2 guest.
4574          */
4575         if (vcpu_match_mmio_gva(vcpu, gva)
4576             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4577                                  vcpu->arch.access, 0, access)) {
4578                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4579                                         (gva & (PAGE_SIZE - 1));
4580                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4581                 return 1;
4582         }
4583
4584         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4585
4586         if (*gpa == UNMAPPED_GVA)
4587                 return -1;
4588
4589         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
4590 }
4591
4592 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4593                         const void *val, int bytes)
4594 {
4595         int ret;
4596
4597         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4598         if (ret < 0)
4599                 return 0;
4600         kvm_page_track_write(vcpu, gpa, val, bytes);
4601         return 1;
4602 }
4603
4604 struct read_write_emulator_ops {
4605         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4606                                   int bytes);
4607         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4608                                   void *val, int bytes);
4609         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4610                                int bytes, void *val);
4611         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4612                                     void *val, int bytes);
4613         bool write;
4614 };
4615
4616 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4617 {
4618         if (vcpu->mmio_read_completed) {
4619                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4620                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4621                 vcpu->mmio_read_completed = 0;
4622                 return 1;
4623         }
4624
4625         return 0;
4626 }
4627
4628 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4629                         void *val, int bytes)
4630 {
4631         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4632 }
4633
4634 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4635                          void *val, int bytes)
4636 {
4637         return emulator_write_phys(vcpu, gpa, val, bytes);
4638 }
4639
4640 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4641 {
4642         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4643         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4644 }
4645
4646 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4647                           void *val, int bytes)
4648 {
4649         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4650         return X86EMUL_IO_NEEDED;
4651 }
4652
4653 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4654                            void *val, int bytes)
4655 {
4656         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4657
4658         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4659         return X86EMUL_CONTINUE;
4660 }
4661
4662 static const struct read_write_emulator_ops read_emultor = {
4663         .read_write_prepare = read_prepare,
4664         .read_write_emulate = read_emulate,
4665         .read_write_mmio = vcpu_mmio_read,
4666         .read_write_exit_mmio = read_exit_mmio,
4667 };
4668
4669 static const struct read_write_emulator_ops write_emultor = {
4670         .read_write_emulate = write_emulate,
4671         .read_write_mmio = write_mmio,
4672         .read_write_exit_mmio = write_exit_mmio,
4673         .write = true,
4674 };
4675
4676 static int emulator_read_write_onepage(unsigned long addr, void *val,
4677                                        unsigned int bytes,
4678                                        struct x86_exception *exception,
4679                                        struct kvm_vcpu *vcpu,
4680                                        const struct read_write_emulator_ops *ops)
4681 {
4682         gpa_t gpa;
4683         int handled, ret;
4684         bool write = ops->write;
4685         struct kvm_mmio_fragment *frag;
4686         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4687
4688         /*
4689          * If the exit was due to a NPF we may already have a GPA.
4690          * If the GPA is present, use it to avoid the GVA to GPA table walk.
4691          * Note, this cannot be used on string operations since string
4692          * operation using rep will only have the initial GPA from the NPF
4693          * occurred.
4694          */
4695         if (vcpu->arch.gpa_available &&
4696             emulator_can_use_gpa(ctxt) &&
4697             (addr & ~PAGE_MASK) == (vcpu->arch.gpa_val & ~PAGE_MASK)) {
4698                 gpa = vcpu->arch.gpa_val;
4699                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
4700         } else {
4701                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4702                 if (ret < 0)
4703                         return X86EMUL_PROPAGATE_FAULT;
4704         }
4705
4706         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
4707                 return X86EMUL_CONTINUE;
4708
4709         /*
4710          * Is this MMIO handled locally?
4711          */
4712         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4713         if (handled == bytes)
4714                 return X86EMUL_CONTINUE;
4715
4716         gpa += handled;
4717         bytes -= handled;
4718         val += handled;
4719
4720         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4721         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4722         frag->gpa = gpa;
4723         frag->data = val;
4724         frag->len = bytes;
4725         return X86EMUL_CONTINUE;
4726 }
4727
4728 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4729                         unsigned long addr,
4730                         void *val, unsigned int bytes,
4731                         struct x86_exception *exception,
4732                         const struct read_write_emulator_ops *ops)
4733 {
4734         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4735         gpa_t gpa;
4736         int rc;
4737
4738         if (ops->read_write_prepare &&
4739                   ops->read_write_prepare(vcpu, val, bytes))
4740                 return X86EMUL_CONTINUE;
4741
4742         vcpu->mmio_nr_fragments = 0;
4743
4744         /* Crossing a page boundary? */
4745         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4746                 int now;
4747
4748                 now = -addr & ~PAGE_MASK;
4749                 rc = emulator_read_write_onepage(addr, val, now, exception,
4750                                                  vcpu, ops);
4751
4752                 if (rc != X86EMUL_CONTINUE)
4753                         return rc;
4754                 addr += now;
4755                 if (ctxt->mode != X86EMUL_MODE_PROT64)
4756                         addr = (u32)addr;
4757                 val += now;
4758                 bytes -= now;
4759         }
4760
4761         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4762                                          vcpu, ops);
4763         if (rc != X86EMUL_CONTINUE)
4764                 return rc;
4765
4766         if (!vcpu->mmio_nr_fragments)
4767                 return rc;
4768
4769         gpa = vcpu->mmio_fragments[0].gpa;
4770
4771         vcpu->mmio_needed = 1;
4772         vcpu->mmio_cur_fragment = 0;
4773
4774         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4775         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4776         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4777         vcpu->run->mmio.phys_addr = gpa;
4778
4779         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4780 }
4781
4782 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4783                                   unsigned long addr,
4784                                   void *val,
4785                                   unsigned int bytes,
4786                                   struct x86_exception *exception)
4787 {
4788         return emulator_read_write(ctxt, addr, val, bytes,
4789                                    exception, &read_emultor);
4790 }
4791
4792 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4793                             unsigned long addr,
4794                             const void *val,
4795                             unsigned int bytes,
4796                             struct x86_exception *exception)
4797 {
4798         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4799                                    exception, &write_emultor);
4800 }
4801
4802 #define CMPXCHG_TYPE(t, ptr, old, new) \
4803         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4804
4805 #ifdef CONFIG_X86_64
4806 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4807 #else
4808 #  define CMPXCHG64(ptr, old, new) \
4809         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4810 #endif
4811
4812 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4813                                      unsigned long addr,
4814                                      const void *old,
4815                                      const void *new,
4816                                      unsigned int bytes,
4817                                      struct x86_exception *exception)
4818 {
4819         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4820         gpa_t gpa;
4821         struct page *page;
4822         char *kaddr;
4823         bool exchanged;
4824
4825         /* guests cmpxchg8b have to be emulated atomically */
4826         if (bytes > 8 || (bytes & (bytes - 1)))
4827                 goto emul_write;
4828
4829         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4830
4831         if (gpa == UNMAPPED_GVA ||
4832             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4833                 goto emul_write;
4834
4835         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4836                 goto emul_write;
4837
4838         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4839         if (is_error_page(page))
4840                 goto emul_write;
4841
4842         kaddr = kmap_atomic(page);
4843         kaddr += offset_in_page(gpa);
4844         switch (bytes) {
4845         case 1:
4846                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4847                 break;
4848         case 2:
4849                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4850                 break;
4851         case 4:
4852                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4853                 break;
4854         case 8:
4855                 exchanged = CMPXCHG64(kaddr, old, new);
4856                 break;
4857         default:
4858                 BUG();
4859         }
4860         kunmap_atomic(kaddr);
4861         kvm_release_page_dirty(page);
4862
4863         if (!exchanged)
4864                 return X86EMUL_CMPXCHG_FAILED;
4865
4866         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
4867         kvm_page_track_write(vcpu, gpa, new, bytes);
4868
4869         return X86EMUL_CONTINUE;
4870
4871 emul_write:
4872         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4873
4874         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4875 }
4876
4877 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4878 {
4879         int r = 0, i;
4880
4881         for (i = 0; i < vcpu->arch.pio.count; i++) {
4882                 if (vcpu->arch.pio.in)
4883                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4884                                             vcpu->arch.pio.size, pd);
4885                 else
4886                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4887                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
4888                                              pd);
4889                 if (r)
4890                         break;
4891                 pd += vcpu->arch.pio.size;
4892         }
4893         return r;
4894 }
4895
4896 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4897                                unsigned short port, void *val,
4898                                unsigned int count, bool in)
4899 {
4900         vcpu->arch.pio.port = port;
4901         vcpu->arch.pio.in = in;
4902         vcpu->arch.pio.count  = count;
4903         vcpu->arch.pio.size = size;
4904
4905         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4906                 vcpu->arch.pio.count = 0;
4907                 return 1;
4908         }
4909
4910         vcpu->run->exit_reason = KVM_EXIT_IO;
4911         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4912         vcpu->run->io.size = size;
4913         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4914         vcpu->run->io.count = count;
4915         vcpu->run->io.port = port;
4916
4917         return 0;
4918 }
4919
4920 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4921                                     int size, unsigned short port, void *val,
4922                                     unsigned int count)
4923 {
4924         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4925         int ret;
4926
4927         if (vcpu->arch.pio.count)
4928                 goto data_avail;
4929
4930         memset(vcpu->arch.pio_data, 0, size * count);
4931
4932         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4933         if (ret) {
4934 data_avail:
4935                 memcpy(val, vcpu->arch.pio_data, size * count);
4936                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4937                 vcpu->arch.pio.count = 0;
4938                 return 1;
4939         }
4940
4941         return 0;
4942 }
4943
4944 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4945                                      int size, unsigned short port,
4946                                      const void *val, unsigned int count)
4947 {
4948         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4949
4950         memcpy(vcpu->arch.pio_data, val, size * count);
4951         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4952         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4953 }
4954
4955 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4956 {
4957         return kvm_x86_ops->get_segment_base(vcpu, seg);
4958 }
4959
4960 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4961 {
4962         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4963 }
4964
4965 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4966 {
4967         if (!need_emulate_wbinvd(vcpu))
4968                 return X86EMUL_CONTINUE;
4969
4970         if (kvm_x86_ops->has_wbinvd_exit()) {
4971                 int cpu = get_cpu();
4972
4973                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4974                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4975                                 wbinvd_ipi, NULL, 1);
4976                 put_cpu();
4977                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4978         } else
4979                 wbinvd();
4980         return X86EMUL_CONTINUE;
4981 }
4982
4983 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4984 {
4985         kvm_emulate_wbinvd_noskip(vcpu);
4986         return kvm_skip_emulated_instruction(vcpu);
4987 }
4988 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4989
4990
4991
4992 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4993 {
4994         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
4995 }
4996
4997 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
4998                            unsigned long *dest)
4999 {
5000         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
5001 }
5002
5003 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
5004                            unsigned long value)
5005 {
5006
5007         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
5008 }
5009
5010 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
5011 {
5012         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
5013 }
5014
5015 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
5016 {
5017         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5018         unsigned long value;
5019
5020         switch (cr) {
5021         case 0:
5022                 value = kvm_read_cr0(vcpu);
5023                 break;
5024         case 2:
5025                 value = vcpu->arch.cr2;
5026                 break;
5027         case 3:
5028                 value = kvm_read_cr3(vcpu);
5029                 break;
5030         case 4:
5031                 value = kvm_read_cr4(vcpu);
5032                 break;
5033         case 8:
5034                 value = kvm_get_cr8(vcpu);
5035                 break;
5036         default:
5037                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5038                 return 0;
5039         }
5040
5041         return value;
5042 }
5043
5044 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
5045 {
5046         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5047         int res = 0;
5048
5049         switch (cr) {
5050         case 0:
5051                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
5052                 break;
5053         case 2:
5054                 vcpu->arch.cr2 = val;
5055                 break;
5056         case 3:
5057                 res = kvm_set_cr3(vcpu, val);
5058                 break;
5059         case 4:
5060                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
5061                 break;
5062         case 8:
5063                 res = kvm_set_cr8(vcpu, val);
5064                 break;
5065         default:
5066                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5067                 res = -1;
5068         }
5069
5070         return res;
5071 }
5072
5073 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
5074 {
5075         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
5076 }
5077
5078 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5079 {
5080         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
5081 }
5082
5083 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5084 {
5085         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
5086 }
5087
5088 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5089 {
5090         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
5091 }
5092
5093 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5094 {
5095         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
5096 }
5097
5098 static unsigned long emulator_get_cached_segment_base(
5099         struct x86_emulate_ctxt *ctxt, int seg)
5100 {
5101         return get_segment_base(emul_to_vcpu(ctxt), seg);
5102 }
5103
5104 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
5105                                  struct desc_struct *desc, u32 *base3,
5106                                  int seg)
5107 {
5108         struct kvm_segment var;
5109
5110         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
5111         *selector = var.selector;
5112
5113         if (var.unusable) {
5114                 memset(desc, 0, sizeof(*desc));
5115                 if (base3)
5116                         *base3 = 0;
5117                 return false;
5118         }
5119
5120         if (var.g)
5121                 var.limit >>= 12;
5122         set_desc_limit(desc, var.limit);
5123         set_desc_base(desc, (unsigned long)var.base);
5124 #ifdef CONFIG_X86_64
5125         if (base3)
5126                 *base3 = var.base >> 32;
5127 #endif
5128         desc->type = var.type;
5129         desc->s = var.s;
5130         desc->dpl = var.dpl;
5131         desc->p = var.present;
5132         desc->avl = var.avl;
5133         desc->l = var.l;
5134         desc->d = var.db;
5135         desc->g = var.g;
5136
5137         return true;
5138 }
5139
5140 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
5141                                  struct desc_struct *desc, u32 base3,
5142                                  int seg)
5143 {
5144         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5145         struct kvm_segment var;
5146
5147         var.selector = selector;
5148         var.base = get_desc_base(desc);
5149 #ifdef CONFIG_X86_64
5150         var.base |= ((u64)base3) << 32;
5151 #endif
5152         var.limit = get_desc_limit(desc);
5153         if (desc->g)
5154                 var.limit = (var.limit << 12) | 0xfff;
5155         var.type = desc->type;
5156         var.dpl = desc->dpl;
5157         var.db = desc->d;
5158         var.s = desc->s;
5159         var.l = desc->l;
5160         var.g = desc->g;
5161         var.avl = desc->avl;
5162         var.present = desc->p;
5163         var.unusable = !var.present;
5164         var.padding = 0;
5165
5166         kvm_set_segment(vcpu, &var, seg);
5167         return;
5168 }
5169
5170 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
5171                             u32 msr_index, u64 *pdata)
5172 {
5173         struct msr_data msr;
5174         int r;
5175
5176         msr.index = msr_index;
5177         msr.host_initiated = false;
5178         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
5179         if (r)
5180                 return r;
5181
5182         *pdata = msr.data;
5183         return 0;
5184 }
5185
5186 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
5187                             u32 msr_index, u64 data)
5188 {
5189         struct msr_data msr;
5190
5191         msr.data = data;
5192         msr.index = msr_index;
5193         msr.host_initiated = false;
5194         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
5195 }
5196
5197 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
5198 {
5199         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5200
5201         return vcpu->arch.smbase;
5202 }
5203
5204 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
5205 {
5206         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5207
5208         vcpu->arch.smbase = smbase;
5209 }
5210
5211 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
5212                               u32 pmc)
5213 {
5214         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
5215 }
5216
5217 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
5218                              u32 pmc, u64 *pdata)
5219 {
5220         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
5221 }
5222
5223 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
5224 {
5225         emul_to_vcpu(ctxt)->arch.halt_request = 1;
5226 }
5227
5228 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
5229 {
5230         preempt_disable();
5231         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
5232 }
5233
5234 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
5235 {
5236         preempt_enable();
5237 }
5238
5239 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
5240                               struct x86_instruction_info *info,
5241                               enum x86_intercept_stage stage)
5242 {
5243         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
5244 }
5245
5246 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
5247                         u32 *eax, u32 *ebx, u32 *ecx, u32 *edx, bool check_limit)
5248 {
5249         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, check_limit);
5250 }
5251
5252 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
5253 {
5254         return kvm_register_read(emul_to_vcpu(ctxt), reg);
5255 }
5256
5257 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
5258 {
5259         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
5260 }
5261
5262 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
5263 {
5264         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
5265 }
5266
5267 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
5268 {
5269         return emul_to_vcpu(ctxt)->arch.hflags;
5270 }
5271
5272 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
5273 {
5274         kvm_set_hflags(emul_to_vcpu(ctxt), emul_flags);
5275 }
5276
5277 static const struct x86_emulate_ops emulate_ops = {
5278         .read_gpr            = emulator_read_gpr,
5279         .write_gpr           = emulator_write_gpr,
5280         .read_std            = kvm_read_guest_virt_system,
5281         .write_std           = kvm_write_guest_virt_system,
5282         .read_phys           = kvm_read_guest_phys_system,
5283         .fetch               = kvm_fetch_guest_virt,
5284         .read_emulated       = emulator_read_emulated,
5285         .write_emulated      = emulator_write_emulated,
5286         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
5287         .invlpg              = emulator_invlpg,
5288         .pio_in_emulated     = emulator_pio_in_emulated,
5289         .pio_out_emulated    = emulator_pio_out_emulated,
5290         .get_segment         = emulator_get_segment,
5291         .set_segment         = emulator_set_segment,
5292         .get_cached_segment_base = emulator_get_cached_segment_base,
5293         .get_gdt             = emulator_get_gdt,
5294         .get_idt             = emulator_get_idt,
5295         .set_gdt             = emulator_set_gdt,
5296         .set_idt             = emulator_set_idt,
5297         .get_cr              = emulator_get_cr,
5298         .set_cr              = emulator_set_cr,
5299         .cpl                 = emulator_get_cpl,
5300         .get_dr              = emulator_get_dr,
5301         .set_dr              = emulator_set_dr,
5302         .get_smbase          = emulator_get_smbase,
5303         .set_smbase          = emulator_set_smbase,
5304         .set_msr             = emulator_set_msr,
5305         .get_msr             = emulator_get_msr,
5306         .check_pmc           = emulator_check_pmc,
5307         .read_pmc            = emulator_read_pmc,
5308         .halt                = emulator_halt,
5309         .wbinvd              = emulator_wbinvd,
5310         .fix_hypercall       = emulator_fix_hypercall,
5311         .get_fpu             = emulator_get_fpu,
5312         .put_fpu             = emulator_put_fpu,
5313         .intercept           = emulator_intercept,
5314         .get_cpuid           = emulator_get_cpuid,
5315         .set_nmi_mask        = emulator_set_nmi_mask,
5316         .get_hflags          = emulator_get_hflags,
5317         .set_hflags          = emulator_set_hflags,
5318 };
5319
5320 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5321 {
5322         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5323         /*
5324          * an sti; sti; sequence only disable interrupts for the first
5325          * instruction. So, if the last instruction, be it emulated or
5326          * not, left the system with the INT_STI flag enabled, it
5327          * means that the last instruction is an sti. We should not
5328          * leave the flag on in this case. The same goes for mov ss
5329          */
5330         if (int_shadow & mask)
5331                 mask = 0;
5332         if (unlikely(int_shadow || mask)) {
5333                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5334                 if (!mask)
5335                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5336         }
5337 }
5338
5339 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5340 {
5341         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5342         if (ctxt->exception.vector == PF_VECTOR)
5343                 return kvm_propagate_fault(vcpu, &ctxt->exception);
5344
5345         if (ctxt->exception.error_code_valid)
5346                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5347                                       ctxt->exception.error_code);
5348         else
5349                 kvm_queue_exception(vcpu, ctxt->exception.vector);
5350         return false;
5351 }
5352
5353 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5354 {
5355         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5356         int cs_db, cs_l;
5357
5358         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5359
5360         ctxt->eflags = kvm_get_rflags(vcpu);
5361         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
5362
5363         ctxt->eip = kvm_rip_read(vcpu);
5364         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5365                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5366                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5367                      cs_db                              ? X86EMUL_MODE_PROT32 :
5368                                                           X86EMUL_MODE_PROT16;
5369         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5370         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5371         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5372
5373         init_decode_cache(ctxt);
5374         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5375 }
5376
5377 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5378 {
5379         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5380         int ret;
5381
5382         init_emulate_ctxt(vcpu);
5383
5384         ctxt->op_bytes = 2;
5385         ctxt->ad_bytes = 2;
5386         ctxt->_eip = ctxt->eip + inc_eip;
5387         ret = emulate_int_real(ctxt, irq);
5388
5389         if (ret != X86EMUL_CONTINUE)
5390                 return EMULATE_FAIL;
5391
5392         ctxt->eip = ctxt->_eip;
5393         kvm_rip_write(vcpu, ctxt->eip);
5394         kvm_set_rflags(vcpu, ctxt->eflags);
5395
5396         if (irq == NMI_VECTOR)
5397                 vcpu->arch.nmi_pending = 0;
5398         else
5399                 vcpu->arch.interrupt.pending = false;
5400
5401         return EMULATE_DONE;
5402 }
5403 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5404
5405 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
5406 {
5407         int r = EMULATE_DONE;
5408
5409         ++vcpu->stat.insn_emulation_fail;
5410         trace_kvm_emulate_insn_failed(vcpu);
5411         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5412                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5413                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5414                 vcpu->run->internal.ndata = 0;
5415                 r = EMULATE_FAIL;
5416         }
5417         kvm_queue_exception(vcpu, UD_VECTOR);
5418
5419         return r;
5420 }
5421
5422 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5423                                   bool write_fault_to_shadow_pgtable,
5424                                   int emulation_type)
5425 {
5426         gpa_t gpa = cr2;
5427         kvm_pfn_t pfn;
5428
5429         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5430                 return false;
5431
5432         if (!vcpu->arch.mmu.direct_map) {
5433                 /*
5434                  * Write permission should be allowed since only
5435                  * write access need to be emulated.
5436                  */
5437                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5438
5439                 /*
5440                  * If the mapping is invalid in guest, let cpu retry
5441                  * it to generate fault.
5442                  */
5443                 if (gpa == UNMAPPED_GVA)
5444                         return true;
5445         }
5446
5447         /*
5448          * Do not retry the unhandleable instruction if it faults on the
5449          * readonly host memory, otherwise it will goto a infinite loop:
5450          * retry instruction -> write #PF -> emulation fail -> retry
5451          * instruction -> ...
5452          */
5453         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5454
5455         /*
5456          * If the instruction failed on the error pfn, it can not be fixed,
5457          * report the error to userspace.
5458          */
5459         if (is_error_noslot_pfn(pfn))
5460                 return false;
5461
5462         kvm_release_pfn_clean(pfn);
5463
5464         /* The instructions are well-emulated on direct mmu. */
5465         if (vcpu->arch.mmu.direct_map) {
5466                 unsigned int indirect_shadow_pages;
5467
5468                 spin_lock(&vcpu->kvm->mmu_lock);
5469                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5470                 spin_unlock(&vcpu->kvm->mmu_lock);
5471
5472                 if (indirect_shadow_pages)
5473                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5474
5475                 return true;
5476         }
5477
5478         /*
5479          * if emulation was due to access to shadowed page table
5480          * and it failed try to unshadow page and re-enter the
5481          * guest to let CPU execute the instruction.
5482          */
5483         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5484
5485         /*
5486          * If the access faults on its page table, it can not
5487          * be fixed by unprotecting shadow page and it should
5488          * be reported to userspace.
5489          */
5490         return !write_fault_to_shadow_pgtable;
5491 }
5492
5493 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5494                               unsigned long cr2,  int emulation_type)
5495 {
5496         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5497         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5498
5499         last_retry_eip = vcpu->arch.last_retry_eip;
5500         last_retry_addr = vcpu->arch.last_retry_addr;
5501
5502         /*
5503          * If the emulation is caused by #PF and it is non-page_table
5504          * writing instruction, it means the VM-EXIT is caused by shadow
5505          * page protected, we can zap the shadow page and retry this
5506          * instruction directly.
5507          *
5508          * Note: if the guest uses a non-page-table modifying instruction
5509          * on the PDE that points to the instruction, then we will unmap
5510          * the instruction and go to an infinite loop. So, we cache the
5511          * last retried eip and the last fault address, if we meet the eip
5512          * and the address again, we can break out of the potential infinite
5513          * loop.
5514          */
5515         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5516
5517         if (!(emulation_type & EMULTYPE_RETRY))
5518                 return false;
5519
5520         if (x86_page_table_writing_insn(ctxt))
5521                 return false;
5522
5523         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5524                 return false;
5525
5526         vcpu->arch.last_retry_eip = ctxt->eip;
5527         vcpu->arch.last_retry_addr = cr2;
5528
5529         if (!vcpu->arch.mmu.direct_map)
5530                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5531
5532         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5533
5534         return true;
5535 }
5536
5537 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5538 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5539
5540 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5541 {
5542         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5543                 /* This is a good place to trace that we are exiting SMM.  */
5544                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5545
5546                 /* Process a latched INIT or SMI, if any.  */
5547                 kvm_make_request(KVM_REQ_EVENT, vcpu);
5548         }
5549
5550         kvm_mmu_reset_context(vcpu);
5551 }
5552
5553 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5554 {
5555         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5556
5557         vcpu->arch.hflags = emul_flags;
5558
5559         if (changed & HF_SMM_MASK)
5560                 kvm_smm_changed(vcpu);
5561 }
5562
5563 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5564                                 unsigned long *db)
5565 {
5566         u32 dr6 = 0;
5567         int i;
5568         u32 enable, rwlen;
5569
5570         enable = dr7;
5571         rwlen = dr7 >> 16;
5572         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5573                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5574                         dr6 |= (1 << i);
5575         return dr6;
5576 }
5577
5578 static void kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu, int *r)
5579 {
5580         struct kvm_run *kvm_run = vcpu->run;
5581
5582         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5583                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
5584                 kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5585                 kvm_run->debug.arch.exception = DB_VECTOR;
5586                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
5587                 *r = EMULATE_USER_EXIT;
5588         } else {
5589                 /*
5590                  * "Certain debug exceptions may clear bit 0-3.  The
5591                  * remaining contents of the DR6 register are never
5592                  * cleared by the processor".
5593                  */
5594                 vcpu->arch.dr6 &= ~15;
5595                 vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5596                 kvm_queue_exception(vcpu, DB_VECTOR);
5597         }
5598 }
5599
5600 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
5601 {
5602         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5603         int r = EMULATE_DONE;
5604
5605         kvm_x86_ops->skip_emulated_instruction(vcpu);
5606
5607         /*
5608          * rflags is the old, "raw" value of the flags.  The new value has
5609          * not been saved yet.
5610          *
5611          * This is correct even for TF set by the guest, because "the
5612          * processor will not generate this exception after the instruction
5613          * that sets the TF flag".
5614          */
5615         if (unlikely(rflags & X86_EFLAGS_TF))
5616                 kvm_vcpu_do_singlestep(vcpu, &r);
5617         return r == EMULATE_DONE;
5618 }
5619 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
5620
5621 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5622 {
5623         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5624             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5625                 struct kvm_run *kvm_run = vcpu->run;
5626                 unsigned long eip = kvm_get_linear_rip(vcpu);
5627                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5628                                            vcpu->arch.guest_debug_dr7,
5629                                            vcpu->arch.eff_db);
5630
5631                 if (dr6 != 0) {
5632                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5633                         kvm_run->debug.arch.pc = eip;
5634                         kvm_run->debug.arch.exception = DB_VECTOR;
5635                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5636                         *r = EMULATE_USER_EXIT;
5637                         return true;
5638                 }
5639         }
5640
5641         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5642             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5643                 unsigned long eip = kvm_get_linear_rip(vcpu);
5644                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5645                                            vcpu->arch.dr7,
5646                                            vcpu->arch.db);
5647
5648                 if (dr6 != 0) {
5649                         vcpu->arch.dr6 &= ~15;
5650                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5651                         kvm_queue_exception(vcpu, DB_VECTOR);
5652                         *r = EMULATE_DONE;
5653                         return true;
5654                 }
5655         }
5656
5657         return false;
5658 }
5659
5660 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5661                             unsigned long cr2,
5662                             int emulation_type,
5663                             void *insn,
5664                             int insn_len)
5665 {
5666         int r;
5667         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5668         bool writeback = true;
5669         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5670
5671         /*
5672          * Clear write_fault_to_shadow_pgtable here to ensure it is
5673          * never reused.
5674          */
5675         vcpu->arch.write_fault_to_shadow_pgtable = false;
5676         kvm_clear_exception_queue(vcpu);
5677
5678         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5679                 init_emulate_ctxt(vcpu);
5680
5681                 /*
5682                  * We will reenter on the same instruction since
5683                  * we do not set complete_userspace_io.  This does not
5684                  * handle watchpoints yet, those would be handled in
5685                  * the emulate_ops.
5686                  */
5687                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5688                         return r;
5689
5690                 ctxt->interruptibility = 0;
5691                 ctxt->have_exception = false;
5692                 ctxt->exception.vector = -1;
5693                 ctxt->perm_ok = false;
5694
5695                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5696
5697                 r = x86_decode_insn(ctxt, insn, insn_len);
5698
5699                 trace_kvm_emulate_insn_start(vcpu);
5700                 ++vcpu->stat.insn_emulation;
5701                 if (r != EMULATION_OK)  {
5702                         if (emulation_type & EMULTYPE_TRAP_UD)
5703                                 return EMULATE_FAIL;
5704                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5705                                                 emulation_type))
5706                                 return EMULATE_DONE;
5707                         if (emulation_type & EMULTYPE_SKIP)
5708                                 return EMULATE_FAIL;
5709                         return handle_emulation_failure(vcpu);
5710                 }
5711         }
5712
5713         if (emulation_type & EMULTYPE_SKIP) {
5714                 kvm_rip_write(vcpu, ctxt->_eip);
5715                 if (ctxt->eflags & X86_EFLAGS_RF)
5716                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5717                 return EMULATE_DONE;
5718         }
5719
5720         if (retry_instruction(ctxt, cr2, emulation_type))
5721                 return EMULATE_DONE;
5722
5723         /* this is needed for vmware backdoor interface to work since it
5724            changes registers values  during IO operation */
5725         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5726                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5727                 emulator_invalidate_register_cache(ctxt);
5728         }
5729
5730 restart:
5731         /* Save the faulting GPA (cr2) in the address field */
5732         ctxt->exception.address = cr2;
5733
5734         r = x86_emulate_insn(ctxt);
5735
5736         if (r == EMULATION_INTERCEPTED)
5737                 return EMULATE_DONE;
5738
5739         if (r == EMULATION_FAILED) {
5740                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5741                                         emulation_type))
5742                         return EMULATE_DONE;
5743
5744                 return handle_emulation_failure(vcpu);
5745         }
5746
5747         if (ctxt->have_exception) {
5748                 r = EMULATE_DONE;
5749                 if (inject_emulated_exception(vcpu))
5750                         return r;
5751         } else if (vcpu->arch.pio.count) {
5752                 if (!vcpu->arch.pio.in) {
5753                         /* FIXME: return into emulator if single-stepping.  */
5754                         vcpu->arch.pio.count = 0;
5755                 } else {
5756                         writeback = false;
5757                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5758                 }
5759                 r = EMULATE_USER_EXIT;
5760         } else if (vcpu->mmio_needed) {
5761                 if (!vcpu->mmio_is_write)
5762                         writeback = false;
5763                 r = EMULATE_USER_EXIT;
5764                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5765         } else if (r == EMULATION_RESTART)
5766                 goto restart;
5767         else
5768                 r = EMULATE_DONE;
5769
5770         if (writeback) {
5771                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5772                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5773                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5774                 kvm_rip_write(vcpu, ctxt->eip);
5775                 if (r == EMULATE_DONE &&
5776                     (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
5777                         kvm_vcpu_do_singlestep(vcpu, &r);
5778                 if (!ctxt->have_exception ||
5779                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5780                         __kvm_set_rflags(vcpu, ctxt->eflags);
5781
5782                 /*
5783                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5784                  * do nothing, and it will be requested again as soon as
5785                  * the shadow expires.  But we still need to check here,
5786                  * because POPF has no interrupt shadow.
5787                  */
5788                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5789                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5790         } else
5791                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5792
5793         return r;
5794 }
5795 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5796
5797 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5798 {
5799         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5800         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5801                                             size, port, &val, 1);
5802         /* do not return to emulator after return from userspace */
5803         vcpu->arch.pio.count = 0;
5804         return ret;
5805 }
5806 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5807
5808 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
5809 {
5810         unsigned long val;
5811
5812         /* We should only ever be called with arch.pio.count equal to 1 */
5813         BUG_ON(vcpu->arch.pio.count != 1);
5814
5815         /* For size less than 4 we merge, else we zero extend */
5816         val = (vcpu->arch.pio.size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX)
5817                                         : 0;
5818
5819         /*
5820          * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
5821          * the copy and tracing
5822          */
5823         emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, vcpu->arch.pio.size,
5824                                  vcpu->arch.pio.port, &val, 1);
5825         kvm_register_write(vcpu, VCPU_REGS_RAX, val);
5826
5827         return 1;
5828 }
5829
5830 int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size, unsigned short port)
5831 {
5832         unsigned long val;
5833         int ret;
5834
5835         /* For size less than 4 we merge, else we zero extend */
5836         val = (size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX) : 0;
5837
5838         ret = emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, size, port,
5839                                        &val, 1);
5840         if (ret) {
5841                 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
5842                 return ret;
5843         }
5844
5845         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
5846
5847         return 0;
5848 }
5849 EXPORT_SYMBOL_GPL(kvm_fast_pio_in);
5850
5851 static int kvmclock_cpu_down_prep(unsigned int cpu)
5852 {
5853         __this_cpu_write(cpu_tsc_khz, 0);
5854         return 0;
5855 }
5856
5857 static void tsc_khz_changed(void *data)
5858 {
5859         struct cpufreq_freqs *freq = data;
5860         unsigned long khz = 0;
5861
5862         if (data)
5863                 khz = freq->new;
5864         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5865                 khz = cpufreq_quick_get(raw_smp_processor_id());
5866         if (!khz)
5867                 khz = tsc_khz;
5868         __this_cpu_write(cpu_tsc_khz, khz);
5869 }
5870
5871 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5872                                      void *data)
5873 {
5874         struct cpufreq_freqs *freq = data;
5875         struct kvm *kvm;
5876         struct kvm_vcpu *vcpu;
5877         int i, send_ipi = 0;
5878
5879         /*
5880          * We allow guests to temporarily run on slowing clocks,
5881          * provided we notify them after, or to run on accelerating
5882          * clocks, provided we notify them before.  Thus time never
5883          * goes backwards.
5884          *
5885          * However, we have a problem.  We can't atomically update
5886          * the frequency of a given CPU from this function; it is
5887          * merely a notifier, which can be called from any CPU.
5888          * Changing the TSC frequency at arbitrary points in time
5889          * requires a recomputation of local variables related to
5890          * the TSC for each VCPU.  We must flag these local variables
5891          * to be updated and be sure the update takes place with the
5892          * new frequency before any guests proceed.
5893          *
5894          * Unfortunately, the combination of hotplug CPU and frequency
5895          * change creates an intractable locking scenario; the order
5896          * of when these callouts happen is undefined with respect to
5897          * CPU hotplug, and they can race with each other.  As such,
5898          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5899          * undefined; you can actually have a CPU frequency change take
5900          * place in between the computation of X and the setting of the
5901          * variable.  To protect against this problem, all updates of
5902          * the per_cpu tsc_khz variable are done in an interrupt
5903          * protected IPI, and all callers wishing to update the value
5904          * must wait for a synchronous IPI to complete (which is trivial
5905          * if the caller is on the CPU already).  This establishes the
5906          * necessary total order on variable updates.
5907          *
5908          * Note that because a guest time update may take place
5909          * anytime after the setting of the VCPU's request bit, the
5910          * correct TSC value must be set before the request.  However,
5911          * to ensure the update actually makes it to any guest which
5912          * starts running in hardware virtualization between the set
5913          * and the acquisition of the spinlock, we must also ping the
5914          * CPU after setting the request bit.
5915          *
5916          */
5917
5918         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5919                 return 0;
5920         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5921                 return 0;
5922
5923         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5924
5925         spin_lock(&kvm_lock);
5926         list_for_each_entry(kvm, &vm_list, vm_list) {
5927                 kvm_for_each_vcpu(i, vcpu, kvm) {
5928                         if (vcpu->cpu != freq->cpu)
5929                                 continue;
5930                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5931                         if (vcpu->cpu != smp_processor_id())
5932                                 send_ipi = 1;
5933                 }
5934         }
5935         spin_unlock(&kvm_lock);
5936
5937         if (freq->old < freq->new && send_ipi) {
5938                 /*
5939                  * We upscale the frequency.  Must make the guest
5940                  * doesn't see old kvmclock values while running with
5941                  * the new frequency, otherwise we risk the guest sees
5942                  * time go backwards.
5943                  *
5944                  * In case we update the frequency for another cpu
5945                  * (which might be in guest context) send an interrupt
5946                  * to kick the cpu out of guest context.  Next time
5947                  * guest context is entered kvmclock will be updated,
5948                  * so the guest will not see stale values.
5949                  */
5950                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5951         }
5952         return 0;
5953 }
5954
5955 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5956         .notifier_call  = kvmclock_cpufreq_notifier
5957 };
5958
5959 static int kvmclock_cpu_online(unsigned int cpu)
5960 {
5961         tsc_khz_changed(NULL);
5962         return 0;
5963 }
5964
5965 static void kvm_timer_init(void)
5966 {
5967         max_tsc_khz = tsc_khz;
5968
5969         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5970 #ifdef CONFIG_CPU_FREQ
5971                 struct cpufreq_policy policy;
5972                 int cpu;
5973
5974                 memset(&policy, 0, sizeof(policy));
5975                 cpu = get_cpu();
5976                 cpufreq_get_policy(&policy, cpu);
5977                 if (policy.cpuinfo.max_freq)
5978                         max_tsc_khz = policy.cpuinfo.max_freq;
5979                 put_cpu();
5980 #endif
5981                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5982                                           CPUFREQ_TRANSITION_NOTIFIER);
5983         }
5984         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5985
5986         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
5987                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
5988 }
5989
5990 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5991
5992 int kvm_is_in_guest(void)
5993 {
5994         return __this_cpu_read(current_vcpu) != NULL;
5995 }
5996
5997 static int kvm_is_user_mode(void)
5998 {
5999         int user_mode = 3;
6000
6001         if (__this_cpu_read(current_vcpu))
6002                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
6003
6004         return user_mode != 0;
6005 }
6006
6007 static unsigned long kvm_get_guest_ip(void)
6008 {
6009         unsigned long ip = 0;
6010
6011         if (__this_cpu_read(current_vcpu))
6012                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
6013
6014         return ip;
6015 }
6016
6017 static struct perf_guest_info_callbacks kvm_guest_cbs = {
6018         .is_in_guest            = kvm_is_in_guest,
6019         .is_user_mode           = kvm_is_user_mode,
6020         .get_guest_ip           = kvm_get_guest_ip,
6021 };
6022
6023 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
6024 {
6025         __this_cpu_write(current_vcpu, vcpu);
6026 }
6027 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
6028
6029 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
6030 {
6031         __this_cpu_write(current_vcpu, NULL);
6032 }
6033 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
6034
6035 static void kvm_set_mmio_spte_mask(void)
6036 {
6037         u64 mask;
6038         int maxphyaddr = boot_cpu_data.x86_phys_bits;
6039
6040         /*
6041          * Set the reserved bits and the present bit of an paging-structure
6042          * entry to generate page fault with PFER.RSV = 1.
6043          */
6044          /* Mask the reserved physical address bits. */
6045         mask = rsvd_bits(maxphyaddr, 51);
6046
6047         /* Set the present bit. */
6048         mask |= 1ull;
6049
6050 #ifdef CONFIG_X86_64
6051         /*
6052          * If reserved bit is not supported, clear the present bit to disable
6053          * mmio page fault.
6054          */
6055         if (maxphyaddr == 52)
6056                 mask &= ~1ull;
6057 #endif
6058
6059         kvm_mmu_set_mmio_spte_mask(mask, mask);
6060 }
6061
6062 #ifdef CONFIG_X86_64
6063 static void pvclock_gtod_update_fn(struct work_struct *work)
6064 {
6065         struct kvm *kvm;
6066
6067         struct kvm_vcpu *vcpu;
6068         int i;
6069
6070         spin_lock(&kvm_lock);
6071         list_for_each_entry(kvm, &vm_list, vm_list)
6072                 kvm_for_each_vcpu(i, vcpu, kvm)
6073                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
6074         atomic_set(&kvm_guest_has_master_clock, 0);
6075         spin_unlock(&kvm_lock);
6076 }
6077
6078 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
6079
6080 /*
6081  * Notification about pvclock gtod data update.
6082  */
6083 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
6084                                void *priv)
6085 {
6086         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
6087         struct timekeeper *tk = priv;
6088
6089         update_pvclock_gtod(tk);
6090
6091         /* disable master clock if host does not trust, or does not
6092          * use, TSC clocksource
6093          */
6094         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
6095             atomic_read(&kvm_guest_has_master_clock) != 0)
6096                 queue_work(system_long_wq, &pvclock_gtod_work);
6097
6098         return 0;
6099 }
6100
6101 static struct notifier_block pvclock_gtod_notifier = {
6102         .notifier_call = pvclock_gtod_notify,
6103 };
6104 #endif
6105
6106 int kvm_arch_init(void *opaque)
6107 {
6108         int r;
6109         struct kvm_x86_ops *ops = opaque;
6110
6111         if (kvm_x86_ops) {
6112                 printk(KERN_ERR "kvm: already loaded the other module\n");
6113                 r = -EEXIST;
6114                 goto out;
6115         }
6116
6117         if (!ops->cpu_has_kvm_support()) {
6118                 printk(KERN_ERR "kvm: no hardware support\n");
6119                 r = -EOPNOTSUPP;
6120                 goto out;
6121         }
6122         if (ops->disabled_by_bios()) {
6123                 printk(KERN_ERR "kvm: disabled by bios\n");
6124                 r = -EOPNOTSUPP;
6125                 goto out;
6126         }
6127
6128         r = -ENOMEM;
6129         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
6130         if (!shared_msrs) {
6131                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
6132                 goto out;
6133         }
6134
6135         r = kvm_mmu_module_init();
6136         if (r)
6137                 goto out_free_percpu;
6138
6139         kvm_set_mmio_spte_mask();
6140
6141         kvm_x86_ops = ops;
6142
6143         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
6144                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
6145                         PT_PRESENT_MASK, 0);
6146         kvm_timer_init();
6147
6148         perf_register_guest_info_callbacks(&kvm_guest_cbs);
6149
6150         if (boot_cpu_has(X86_FEATURE_XSAVE))
6151                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
6152
6153         kvm_lapic_init();
6154 #ifdef CONFIG_X86_64
6155         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
6156 #endif
6157
6158         return 0;
6159
6160 out_free_percpu:
6161         free_percpu(shared_msrs);
6162 out:
6163         return r;
6164 }
6165
6166 void kvm_arch_exit(void)
6167 {
6168         kvm_lapic_exit();
6169         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
6170
6171         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6172                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
6173                                             CPUFREQ_TRANSITION_NOTIFIER);
6174         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
6175 #ifdef CONFIG_X86_64
6176         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
6177 #endif
6178         kvm_x86_ops = NULL;
6179         kvm_mmu_module_exit();
6180         free_percpu(shared_msrs);
6181 }
6182
6183 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
6184 {
6185         ++vcpu->stat.halt_exits;
6186         if (lapic_in_kernel(vcpu)) {
6187                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
6188                 return 1;
6189         } else {
6190                 vcpu->run->exit_reason = KVM_EXIT_HLT;
6191                 return 0;
6192         }
6193 }
6194 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
6195
6196 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
6197 {
6198         int ret = kvm_skip_emulated_instruction(vcpu);
6199         /*
6200          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6201          * KVM_EXIT_DEBUG here.
6202          */
6203         return kvm_vcpu_halt(vcpu) && ret;
6204 }
6205 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
6206
6207 #ifdef CONFIG_X86_64
6208 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
6209                                 unsigned long clock_type)
6210 {
6211         struct kvm_clock_pairing clock_pairing;
6212         struct timespec ts;
6213         u64 cycle;
6214         int ret;
6215
6216         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
6217                 return -KVM_EOPNOTSUPP;
6218
6219         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
6220                 return -KVM_EOPNOTSUPP;
6221
6222         clock_pairing.sec = ts.tv_sec;
6223         clock_pairing.nsec = ts.tv_nsec;
6224         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
6225         clock_pairing.flags = 0;
6226
6227         ret = 0;
6228         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
6229                             sizeof(struct kvm_clock_pairing)))
6230                 ret = -KVM_EFAULT;
6231
6232         return ret;
6233 }
6234 #endif
6235
6236 /*
6237  * kvm_pv_kick_cpu_op:  Kick a vcpu.
6238  *
6239  * @apicid - apicid of vcpu to be kicked.
6240  */
6241 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
6242 {
6243         struct kvm_lapic_irq lapic_irq;
6244
6245         lapic_irq.shorthand = 0;
6246         lapic_irq.dest_mode = 0;
6247         lapic_irq.level = 0;
6248         lapic_irq.dest_id = apicid;
6249         lapic_irq.msi_redir_hint = false;
6250
6251         lapic_irq.delivery_mode = APIC_DM_REMRD;
6252         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
6253 }
6254
6255 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
6256 {
6257         vcpu->arch.apicv_active = false;
6258         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
6259 }
6260
6261 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
6262 {
6263         unsigned long nr, a0, a1, a2, a3, ret;
6264         int op_64_bit, r;
6265
6266         r = kvm_skip_emulated_instruction(vcpu);
6267
6268         if (kvm_hv_hypercall_enabled(vcpu->kvm))
6269                 return kvm_hv_hypercall(vcpu);
6270
6271         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
6272         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
6273         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
6274         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
6275         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
6276
6277         trace_kvm_hypercall(nr, a0, a1, a2, a3);
6278
6279         op_64_bit = is_64_bit_mode(vcpu);
6280         if (!op_64_bit) {
6281                 nr &= 0xFFFFFFFF;
6282                 a0 &= 0xFFFFFFFF;
6283                 a1 &= 0xFFFFFFFF;
6284                 a2 &= 0xFFFFFFFF;
6285                 a3 &= 0xFFFFFFFF;
6286         }
6287
6288         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
6289                 ret = -KVM_EPERM;
6290                 goto out;
6291         }
6292
6293         switch (nr) {
6294         case KVM_HC_VAPIC_POLL_IRQ:
6295                 ret = 0;
6296                 break;
6297         case KVM_HC_KICK_CPU:
6298                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
6299                 ret = 0;
6300                 break;
6301 #ifdef CONFIG_X86_64
6302         case KVM_HC_CLOCK_PAIRING:
6303                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
6304                 break;
6305 #endif
6306         default:
6307                 ret = -KVM_ENOSYS;
6308                 break;
6309         }
6310 out:
6311         if (!op_64_bit)
6312                 ret = (u32)ret;
6313         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
6314         ++vcpu->stat.hypercalls;
6315         return r;
6316 }
6317 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
6318
6319 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
6320 {
6321         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6322         char instruction[3];
6323         unsigned long rip = kvm_rip_read(vcpu);
6324
6325         kvm_x86_ops->patch_hypercall(vcpu, instruction);
6326
6327         return emulator_write_emulated(ctxt, rip, instruction, 3,
6328                 &ctxt->exception);
6329 }
6330
6331 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
6332 {
6333         return vcpu->run->request_interrupt_window &&
6334                 likely(!pic_in_kernel(vcpu->kvm));
6335 }
6336
6337 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
6338 {
6339         struct kvm_run *kvm_run = vcpu->run;
6340
6341         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
6342         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
6343         kvm_run->cr8 = kvm_get_cr8(vcpu);
6344         kvm_run->apic_base = kvm_get_apic_base(vcpu);
6345         kvm_run->ready_for_interrupt_injection =
6346                 pic_in_kernel(vcpu->kvm) ||
6347                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
6348 }
6349
6350 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
6351 {
6352         int max_irr, tpr;
6353
6354         if (!kvm_x86_ops->update_cr8_intercept)
6355                 return;
6356
6357         if (!lapic_in_kernel(vcpu))
6358                 return;
6359
6360         if (vcpu->arch.apicv_active)
6361                 return;
6362
6363         if (!vcpu->arch.apic->vapic_addr)
6364                 max_irr = kvm_lapic_find_highest_irr(vcpu);
6365         else
6366                 max_irr = -1;
6367
6368         if (max_irr != -1)
6369                 max_irr >>= 4;
6370
6371         tpr = kvm_lapic_get_cr8(vcpu);
6372
6373         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
6374 }
6375
6376 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
6377 {
6378         int r;
6379
6380         /* try to reinject previous events if any */
6381         if (vcpu->arch.exception.injected) {
6382                 kvm_x86_ops->queue_exception(vcpu);
6383                 return 0;
6384         }
6385
6386         /*
6387          * Exceptions must be injected immediately, or the exception
6388          * frame will have the address of the NMI or interrupt handler.
6389          */
6390         if (!vcpu->arch.exception.pending) {
6391                 if (vcpu->arch.nmi_injected) {
6392                         kvm_x86_ops->set_nmi(vcpu);
6393                         return 0;
6394                 }
6395
6396                 if (vcpu->arch.interrupt.pending) {
6397                         kvm_x86_ops->set_irq(vcpu);
6398                         return 0;
6399                 }
6400         }
6401
6402         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6403                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6404                 if (r != 0)
6405                         return r;
6406         }
6407
6408         /* try to inject new event if pending */
6409         if (vcpu->arch.exception.pending) {
6410                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
6411                                         vcpu->arch.exception.has_error_code,
6412                                         vcpu->arch.exception.error_code);
6413
6414                 vcpu->arch.exception.pending = false;
6415                 vcpu->arch.exception.injected = true;
6416
6417                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
6418                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
6419                                              X86_EFLAGS_RF);
6420
6421                 if (vcpu->arch.exception.nr == DB_VECTOR &&
6422                     (vcpu->arch.dr7 & DR7_GD)) {
6423                         vcpu->arch.dr7 &= ~DR7_GD;
6424                         kvm_update_dr7(vcpu);
6425                 }
6426
6427                 kvm_x86_ops->queue_exception(vcpu);
6428         } else if (vcpu->arch.smi_pending && !is_smm(vcpu)) {
6429                 vcpu->arch.smi_pending = false;
6430                 enter_smm(vcpu);
6431         } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
6432                 --vcpu->arch.nmi_pending;
6433                 vcpu->arch.nmi_injected = true;
6434                 kvm_x86_ops->set_nmi(vcpu);
6435         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6436                 /*
6437                  * Because interrupts can be injected asynchronously, we are
6438                  * calling check_nested_events again here to avoid a race condition.
6439                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6440                  * proposal and current concerns.  Perhaps we should be setting
6441                  * KVM_REQ_EVENT only on certain events and not unconditionally?
6442                  */
6443                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6444                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6445                         if (r != 0)
6446                                 return r;
6447                 }
6448                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6449                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6450                                             false);
6451                         kvm_x86_ops->set_irq(vcpu);
6452                 }
6453         }
6454
6455         return 0;
6456 }
6457
6458 static void process_nmi(struct kvm_vcpu *vcpu)
6459 {
6460         unsigned limit = 2;
6461
6462         /*
6463          * x86 is limited to one NMI running, and one NMI pending after it.
6464          * If an NMI is already in progress, limit further NMIs to just one.
6465          * Otherwise, allow two (and we'll inject the first one immediately).
6466          */
6467         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6468                 limit = 1;
6469
6470         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6471         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6472         kvm_make_request(KVM_REQ_EVENT, vcpu);
6473 }
6474
6475 #define put_smstate(type, buf, offset, val)                       \
6476         *(type *)((buf) + (offset) - 0x7e00) = val
6477
6478 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
6479 {
6480         u32 flags = 0;
6481         flags |= seg->g       << 23;
6482         flags |= seg->db      << 22;
6483         flags |= seg->l       << 21;
6484         flags |= seg->avl     << 20;
6485         flags |= seg->present << 15;
6486         flags |= seg->dpl     << 13;
6487         flags |= seg->s       << 12;
6488         flags |= seg->type    << 8;
6489         return flags;
6490 }
6491
6492 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
6493 {
6494         struct kvm_segment seg;
6495         int offset;
6496
6497         kvm_get_segment(vcpu, &seg, n);
6498         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
6499
6500         if (n < 3)
6501                 offset = 0x7f84 + n * 12;
6502         else
6503                 offset = 0x7f2c + (n - 3) * 12;
6504
6505         put_smstate(u32, buf, offset + 8, seg.base);
6506         put_smstate(u32, buf, offset + 4, seg.limit);
6507         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
6508 }
6509
6510 #ifdef CONFIG_X86_64
6511 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
6512 {
6513         struct kvm_segment seg;
6514         int offset;
6515         u16 flags;
6516
6517         kvm_get_segment(vcpu, &seg, n);
6518         offset = 0x7e00 + n * 16;
6519
6520         flags = enter_smm_get_segment_flags(&seg) >> 8;
6521         put_smstate(u16, buf, offset, seg.selector);
6522         put_smstate(u16, buf, offset + 2, flags);
6523         put_smstate(u32, buf, offset + 4, seg.limit);
6524         put_smstate(u64, buf, offset + 8, seg.base);
6525 }
6526 #endif
6527
6528 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6529 {
6530         struct desc_ptr dt;
6531         struct kvm_segment seg;
6532         unsigned long val;
6533         int i;
6534
6535         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6536         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6537         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6538         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6539
6540         for (i = 0; i < 8; i++)
6541                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6542
6543         kvm_get_dr(vcpu, 6, &val);
6544         put_smstate(u32, buf, 0x7fcc, (u32)val);
6545         kvm_get_dr(vcpu, 7, &val);
6546         put_smstate(u32, buf, 0x7fc8, (u32)val);
6547
6548         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6549         put_smstate(u32, buf, 0x7fc4, seg.selector);
6550         put_smstate(u32, buf, 0x7f64, seg.base);
6551         put_smstate(u32, buf, 0x7f60, seg.limit);
6552         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
6553
6554         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6555         put_smstate(u32, buf, 0x7fc0, seg.selector);
6556         put_smstate(u32, buf, 0x7f80, seg.base);
6557         put_smstate(u32, buf, 0x7f7c, seg.limit);
6558         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
6559
6560         kvm_x86_ops->get_gdt(vcpu, &dt);
6561         put_smstate(u32, buf, 0x7f74, dt.address);
6562         put_smstate(u32, buf, 0x7f70, dt.size);
6563
6564         kvm_x86_ops->get_idt(vcpu, &dt);
6565         put_smstate(u32, buf, 0x7f58, dt.address);
6566         put_smstate(u32, buf, 0x7f54, dt.size);
6567
6568         for (i = 0; i < 6; i++)
6569                 enter_smm_save_seg_32(vcpu, buf, i);
6570
6571         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6572
6573         /* revision id */
6574         put_smstate(u32, buf, 0x7efc, 0x00020000);
6575         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6576 }
6577
6578 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6579 {
6580 #ifdef CONFIG_X86_64
6581         struct desc_ptr dt;
6582         struct kvm_segment seg;
6583         unsigned long val;
6584         int i;
6585
6586         for (i = 0; i < 16; i++)
6587                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6588
6589         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6590         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6591
6592         kvm_get_dr(vcpu, 6, &val);
6593         put_smstate(u64, buf, 0x7f68, val);
6594         kvm_get_dr(vcpu, 7, &val);
6595         put_smstate(u64, buf, 0x7f60, val);
6596
6597         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6598         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6599         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6600
6601         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6602
6603         /* revision id */
6604         put_smstate(u32, buf, 0x7efc, 0x00020064);
6605
6606         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6607
6608         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6609         put_smstate(u16, buf, 0x7e90, seg.selector);
6610         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
6611         put_smstate(u32, buf, 0x7e94, seg.limit);
6612         put_smstate(u64, buf, 0x7e98, seg.base);
6613
6614         kvm_x86_ops->get_idt(vcpu, &dt);
6615         put_smstate(u32, buf, 0x7e84, dt.size);
6616         put_smstate(u64, buf, 0x7e88, dt.address);
6617
6618         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6619         put_smstate(u16, buf, 0x7e70, seg.selector);
6620         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
6621         put_smstate(u32, buf, 0x7e74, seg.limit);
6622         put_smstate(u64, buf, 0x7e78, seg.base);
6623
6624         kvm_x86_ops->get_gdt(vcpu, &dt);
6625         put_smstate(u32, buf, 0x7e64, dt.size);
6626         put_smstate(u64, buf, 0x7e68, dt.address);
6627
6628         for (i = 0; i < 6; i++)
6629                 enter_smm_save_seg_64(vcpu, buf, i);
6630 #else
6631         WARN_ON_ONCE(1);
6632 #endif
6633 }
6634
6635 static void enter_smm(struct kvm_vcpu *vcpu)
6636 {
6637         struct kvm_segment cs, ds;
6638         struct desc_ptr dt;
6639         char buf[512];
6640         u32 cr0;
6641
6642         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6643         vcpu->arch.hflags |= HF_SMM_MASK;
6644         memset(buf, 0, 512);
6645         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
6646                 enter_smm_save_state_64(vcpu, buf);
6647         else
6648                 enter_smm_save_state_32(vcpu, buf);
6649
6650         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6651
6652         if (kvm_x86_ops->get_nmi_mask(vcpu))
6653                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6654         else
6655                 kvm_x86_ops->set_nmi_mask(vcpu, true);
6656
6657         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6658         kvm_rip_write(vcpu, 0x8000);
6659
6660         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6661         kvm_x86_ops->set_cr0(vcpu, cr0);
6662         vcpu->arch.cr0 = cr0;
6663
6664         kvm_x86_ops->set_cr4(vcpu, 0);
6665
6666         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
6667         dt.address = dt.size = 0;
6668         kvm_x86_ops->set_idt(vcpu, &dt);
6669
6670         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6671
6672         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6673         cs.base = vcpu->arch.smbase;
6674
6675         ds.selector = 0;
6676         ds.base = 0;
6677
6678         cs.limit    = ds.limit = 0xffffffff;
6679         cs.type     = ds.type = 0x3;
6680         cs.dpl      = ds.dpl = 0;
6681         cs.db       = ds.db = 0;
6682         cs.s        = ds.s = 1;
6683         cs.l        = ds.l = 0;
6684         cs.g        = ds.g = 1;
6685         cs.avl      = ds.avl = 0;
6686         cs.present  = ds.present = 1;
6687         cs.unusable = ds.unusable = 0;
6688         cs.padding  = ds.padding = 0;
6689
6690         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6691         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6692         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6693         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
6694         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
6695         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
6696
6697         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
6698                 kvm_x86_ops->set_efer(vcpu, 0);
6699
6700         kvm_update_cpuid(vcpu);
6701         kvm_mmu_reset_context(vcpu);
6702 }
6703
6704 static void process_smi(struct kvm_vcpu *vcpu)
6705 {
6706         vcpu->arch.smi_pending = true;
6707         kvm_make_request(KVM_REQ_EVENT, vcpu);
6708 }
6709
6710 void kvm_make_scan_ioapic_request(struct kvm *kvm)
6711 {
6712         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
6713 }
6714
6715 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6716 {
6717         u64 eoi_exit_bitmap[4];
6718
6719         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6720                 return;
6721
6722         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
6723
6724         if (irqchip_split(vcpu->kvm))
6725                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
6726         else {
6727                 if (kvm_x86_ops->sync_pir_to_irr && vcpu->arch.apicv_active)
6728                         kvm_x86_ops->sync_pir_to_irr(vcpu);
6729                 kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
6730         }
6731         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
6732                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
6733         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
6734 }
6735
6736 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6737 {
6738         ++vcpu->stat.tlb_flush;
6739         kvm_x86_ops->tlb_flush(vcpu);
6740 }
6741
6742 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6743 {
6744         struct page *page = NULL;
6745
6746         if (!lapic_in_kernel(vcpu))
6747                 return;
6748
6749         if (!kvm_x86_ops->set_apic_access_page_addr)
6750                 return;
6751
6752         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6753         if (is_error_page(page))
6754                 return;
6755         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6756
6757         /*
6758          * Do not pin apic access page in memory, the MMU notifier
6759          * will call us again if it is migrated or swapped out.
6760          */
6761         put_page(page);
6762 }
6763 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6764
6765 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
6766                                            unsigned long address)
6767 {
6768         /*
6769          * The physical address of apic access page is stored in the VMCS.
6770          * Update it when it becomes invalid.
6771          */
6772         if (address == gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT))
6773                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6774 }
6775
6776 /*
6777  * Returns 1 to let vcpu_run() continue the guest execution loop without
6778  * exiting to the userspace.  Otherwise, the value will be returned to the
6779  * userspace.
6780  */
6781 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6782 {
6783         int r;
6784         bool req_int_win =
6785                 dm_request_for_irq_injection(vcpu) &&
6786                 kvm_cpu_accept_dm_intr(vcpu);
6787
6788         bool req_immediate_exit = false;
6789
6790         if (kvm_request_pending(vcpu)) {
6791                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6792                         kvm_mmu_unload(vcpu);
6793                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6794                         __kvm_migrate_timers(vcpu);
6795                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6796                         kvm_gen_update_masterclock(vcpu->kvm);
6797                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6798                         kvm_gen_kvmclock_update(vcpu);
6799                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6800                         r = kvm_guest_time_update(vcpu);
6801                         if (unlikely(r))
6802                                 goto out;
6803                 }
6804                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6805                         kvm_mmu_sync_roots(vcpu);
6806                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6807                         kvm_vcpu_flush_tlb(vcpu);
6808                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6809                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6810                         r = 0;
6811                         goto out;
6812                 }
6813                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6814                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6815                         vcpu->mmio_needed = 0;
6816                         r = 0;
6817                         goto out;
6818                 }
6819                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6820                         /* Page is swapped out. Do synthetic halt */
6821                         vcpu->arch.apf.halted = true;
6822                         r = 1;
6823                         goto out;
6824                 }
6825                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6826                         record_steal_time(vcpu);
6827                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
6828                         process_smi(vcpu);
6829                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6830                         process_nmi(vcpu);
6831                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6832                         kvm_pmu_handle_event(vcpu);
6833                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6834                         kvm_pmu_deliver_pmi(vcpu);
6835                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
6836                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
6837                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
6838                                      vcpu->arch.ioapic_handled_vectors)) {
6839                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
6840                                 vcpu->run->eoi.vector =
6841                                                 vcpu->arch.pending_ioapic_eoi;
6842                                 r = 0;
6843                                 goto out;
6844                         }
6845                 }
6846                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6847                         vcpu_scan_ioapic(vcpu);
6848                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6849                         kvm_vcpu_reload_apic_access_page(vcpu);
6850                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
6851                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6852                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
6853                         r = 0;
6854                         goto out;
6855                 }
6856                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
6857                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6858                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
6859                         r = 0;
6860                         goto out;
6861                 }
6862                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
6863                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
6864                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
6865                         r = 0;
6866                         goto out;
6867                 }
6868
6869                 /*
6870                  * KVM_REQ_HV_STIMER has to be processed after
6871                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
6872                  * depend on the guest clock being up-to-date
6873                  */
6874                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
6875                         kvm_hv_process_stimers(vcpu);
6876         }
6877
6878         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6879                 ++vcpu->stat.req_event;
6880                 kvm_apic_accept_events(vcpu);
6881                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6882                         r = 1;
6883                         goto out;
6884                 }
6885
6886                 if (inject_pending_event(vcpu, req_int_win) != 0)
6887                         req_immediate_exit = true;
6888                 else {
6889                         /* Enable NMI/IRQ window open exits if needed.
6890                          *
6891                          * SMIs have two cases: 1) they can be nested, and
6892                          * then there is nothing to do here because RSM will
6893                          * cause a vmexit anyway; 2) or the SMI can be pending
6894                          * because inject_pending_event has completed the
6895                          * injection of an IRQ or NMI from the previous vmexit,
6896                          * and then we request an immediate exit to inject the SMI.
6897                          */
6898                         if (vcpu->arch.smi_pending && !is_smm(vcpu))
6899                                 req_immediate_exit = true;
6900                         if (vcpu->arch.nmi_pending)
6901                                 kvm_x86_ops->enable_nmi_window(vcpu);
6902                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6903                                 kvm_x86_ops->enable_irq_window(vcpu);
6904                         WARN_ON(vcpu->arch.exception.pending);
6905                 }
6906
6907                 if (kvm_lapic_enabled(vcpu)) {
6908                         update_cr8_intercept(vcpu);
6909                         kvm_lapic_sync_to_vapic(vcpu);
6910                 }
6911         }
6912
6913         r = kvm_mmu_reload(vcpu);
6914         if (unlikely(r)) {
6915                 goto cancel_injection;
6916         }
6917
6918         preempt_disable();
6919
6920         kvm_x86_ops->prepare_guest_switch(vcpu);
6921         kvm_load_guest_fpu(vcpu);
6922
6923         /*
6924          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
6925          * IPI are then delayed after guest entry, which ensures that they
6926          * result in virtual interrupt delivery.
6927          */
6928         local_irq_disable();
6929         vcpu->mode = IN_GUEST_MODE;
6930
6931         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6932
6933         /*
6934          * 1) We should set ->mode before checking ->requests.  Please see
6935          * the comment in kvm_vcpu_exiting_guest_mode().
6936          *
6937          * 2) For APICv, we should set ->mode before checking PIR.ON.  This
6938          * pairs with the memory barrier implicit in pi_test_and_set_on
6939          * (see vmx_deliver_posted_interrupt).
6940          *
6941          * 3) This also orders the write to mode from any reads to the page
6942          * tables done while the VCPU is running.  Please see the comment
6943          * in kvm_flush_remote_tlbs.
6944          */
6945         smp_mb__after_srcu_read_unlock();
6946
6947         /*
6948          * This handles the case where a posted interrupt was
6949          * notified with kvm_vcpu_kick.
6950          */
6951         if (kvm_lapic_enabled(vcpu)) {
6952                 if (kvm_x86_ops->sync_pir_to_irr && vcpu->arch.apicv_active)
6953                         kvm_x86_ops->sync_pir_to_irr(vcpu);
6954         }
6955
6956         if (vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu)
6957             || need_resched() || signal_pending(current)) {
6958                 vcpu->mode = OUTSIDE_GUEST_MODE;
6959                 smp_wmb();
6960                 local_irq_enable();
6961                 preempt_enable();
6962                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6963                 r = 1;
6964                 goto cancel_injection;
6965         }
6966
6967         kvm_load_guest_xcr0(vcpu);
6968
6969         if (req_immediate_exit) {
6970                 kvm_make_request(KVM_REQ_EVENT, vcpu);
6971                 smp_send_reschedule(vcpu->cpu);
6972         }
6973
6974         trace_kvm_entry(vcpu->vcpu_id);
6975         wait_lapic_expire(vcpu);
6976         guest_enter_irqoff();
6977
6978         if (unlikely(vcpu->arch.switch_db_regs)) {
6979                 set_debugreg(0, 7);
6980                 set_debugreg(vcpu->arch.eff_db[0], 0);
6981                 set_debugreg(vcpu->arch.eff_db[1], 1);
6982                 set_debugreg(vcpu->arch.eff_db[2], 2);
6983                 set_debugreg(vcpu->arch.eff_db[3], 3);
6984                 set_debugreg(vcpu->arch.dr6, 6);
6985                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6986         }
6987
6988         kvm_x86_ops->run(vcpu);
6989
6990         /*
6991          * Do this here before restoring debug registers on the host.  And
6992          * since we do this before handling the vmexit, a DR access vmexit
6993          * can (a) read the correct value of the debug registers, (b) set
6994          * KVM_DEBUGREG_WONT_EXIT again.
6995          */
6996         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6997                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6998                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6999                 kvm_update_dr0123(vcpu);
7000                 kvm_update_dr6(vcpu);
7001                 kvm_update_dr7(vcpu);
7002                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
7003         }
7004
7005         /*
7006          * If the guest has used debug registers, at least dr7
7007          * will be disabled while returning to the host.
7008          * If we don't have active breakpoints in the host, we don't
7009          * care about the messed up debug address registers. But if
7010          * we have some of them active, restore the old state.
7011          */
7012         if (hw_breakpoint_active())
7013                 hw_breakpoint_restore();
7014
7015         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
7016
7017         vcpu->mode = OUTSIDE_GUEST_MODE;
7018         smp_wmb();
7019
7020         kvm_put_guest_xcr0(vcpu);
7021
7022         kvm_x86_ops->handle_external_intr(vcpu);
7023
7024         ++vcpu->stat.exits;
7025
7026         guest_exit_irqoff();
7027
7028         local_irq_enable();
7029         preempt_enable();
7030
7031         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7032
7033         /*
7034          * Profile KVM exit RIPs:
7035          */
7036         if (unlikely(prof_on == KVM_PROFILING)) {
7037                 unsigned long rip = kvm_rip_read(vcpu);
7038                 profile_hit(KVM_PROFILING, (void *)rip);
7039         }
7040
7041         if (unlikely(vcpu->arch.tsc_always_catchup))
7042                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7043
7044         if (vcpu->arch.apic_attention)
7045                 kvm_lapic_sync_from_vapic(vcpu);
7046
7047         vcpu->arch.gpa_available = false;
7048         r = kvm_x86_ops->handle_exit(vcpu);
7049         return r;
7050
7051 cancel_injection:
7052         kvm_x86_ops->cancel_injection(vcpu);
7053         if (unlikely(vcpu->arch.apic_attention))
7054                 kvm_lapic_sync_from_vapic(vcpu);
7055 out:
7056         return r;
7057 }
7058
7059 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
7060 {
7061         if (!kvm_arch_vcpu_runnable(vcpu) &&
7062             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
7063                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7064                 kvm_vcpu_block(vcpu);
7065                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7066
7067                 if (kvm_x86_ops->post_block)
7068                         kvm_x86_ops->post_block(vcpu);
7069
7070                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
7071                         return 1;
7072         }
7073
7074         kvm_apic_accept_events(vcpu);
7075         switch(vcpu->arch.mp_state) {
7076         case KVM_MP_STATE_HALTED:
7077                 vcpu->arch.pv.pv_unhalted = false;
7078                 vcpu->arch.mp_state =
7079                         KVM_MP_STATE_RUNNABLE;
7080         case KVM_MP_STATE_RUNNABLE:
7081                 vcpu->arch.apf.halted = false;
7082                 break;
7083         case KVM_MP_STATE_INIT_RECEIVED:
7084                 break;
7085         default:
7086                 return -EINTR;
7087                 break;
7088         }
7089         return 1;
7090 }
7091
7092 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
7093 {
7094         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
7095                 kvm_x86_ops->check_nested_events(vcpu, false);
7096
7097         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7098                 !vcpu->arch.apf.halted);
7099 }
7100
7101 static int vcpu_run(struct kvm_vcpu *vcpu)
7102 {
7103         int r;
7104         struct kvm *kvm = vcpu->kvm;
7105
7106         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7107
7108         for (;;) {
7109                 if (kvm_vcpu_running(vcpu)) {
7110                         r = vcpu_enter_guest(vcpu);
7111                 } else {
7112                         r = vcpu_block(kvm, vcpu);
7113                 }
7114
7115                 if (r <= 0)
7116                         break;
7117
7118                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
7119                 if (kvm_cpu_has_pending_timer(vcpu))
7120                         kvm_inject_pending_timer_irqs(vcpu);
7121
7122                 if (dm_request_for_irq_injection(vcpu) &&
7123                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
7124                         r = 0;
7125                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
7126                         ++vcpu->stat.request_irq_exits;
7127                         break;
7128                 }
7129
7130                 kvm_check_async_pf_completion(vcpu);
7131
7132                 if (signal_pending(current)) {
7133                         r = -EINTR;
7134                         vcpu->run->exit_reason = KVM_EXIT_INTR;
7135                         ++vcpu->stat.signal_exits;
7136                         break;
7137                 }
7138                 if (need_resched()) {
7139                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7140                         cond_resched();
7141                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7142                 }
7143         }
7144
7145         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7146
7147         return r;
7148 }
7149
7150 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
7151 {
7152         int r;
7153         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7154         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
7155         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
7156         if (r != EMULATE_DONE)
7157                 return 0;
7158         return 1;
7159 }
7160
7161 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
7162 {
7163         BUG_ON(!vcpu->arch.pio.count);
7164
7165         return complete_emulated_io(vcpu);
7166 }
7167
7168 /*
7169  * Implements the following, as a state machine:
7170  *
7171  * read:
7172  *   for each fragment
7173  *     for each mmio piece in the fragment
7174  *       write gpa, len
7175  *       exit
7176  *       copy data
7177  *   execute insn
7178  *
7179  * write:
7180  *   for each fragment
7181  *     for each mmio piece in the fragment
7182  *       write gpa, len
7183  *       copy data
7184  *       exit
7185  */
7186 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
7187 {
7188         struct kvm_run *run = vcpu->run;
7189         struct kvm_mmio_fragment *frag;
7190         unsigned len;
7191
7192         BUG_ON(!vcpu->mmio_needed);
7193
7194         /* Complete previous fragment */
7195         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
7196         len = min(8u, frag->len);
7197         if (!vcpu->mmio_is_write)
7198                 memcpy(frag->data, run->mmio.data, len);
7199
7200         if (frag->len <= 8) {
7201                 /* Switch to the next fragment. */
7202                 frag++;
7203                 vcpu->mmio_cur_fragment++;
7204         } else {
7205                 /* Go forward to the next mmio piece. */
7206                 frag->data += len;
7207                 frag->gpa += len;
7208                 frag->len -= len;
7209         }
7210
7211         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
7212                 vcpu->mmio_needed = 0;
7213
7214                 /* FIXME: return into emulator if single-stepping.  */
7215                 if (vcpu->mmio_is_write)
7216                         return 1;
7217                 vcpu->mmio_read_completed = 1;
7218                 return complete_emulated_io(vcpu);
7219         }
7220
7221         run->exit_reason = KVM_EXIT_MMIO;
7222         run->mmio.phys_addr = frag->gpa;
7223         if (vcpu->mmio_is_write)
7224                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
7225         run->mmio.len = min(8u, frag->len);
7226         run->mmio.is_write = vcpu->mmio_is_write;
7227         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7228         return 0;
7229 }
7230
7231
7232 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
7233 {
7234         struct fpu *fpu = &current->thread.fpu;
7235         int r;
7236         sigset_t sigsaved;
7237
7238         fpu__activate_curr(fpu);
7239
7240         if (vcpu->sigset_active)
7241                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
7242
7243         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
7244                 kvm_vcpu_block(vcpu);
7245                 kvm_apic_accept_events(vcpu);
7246                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
7247                 r = -EAGAIN;
7248                 goto out;
7249         }
7250
7251         /* re-sync apic's tpr */
7252         if (!lapic_in_kernel(vcpu)) {
7253                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
7254                         r = -EINVAL;
7255                         goto out;
7256                 }
7257         }
7258
7259         if (unlikely(vcpu->arch.complete_userspace_io)) {
7260                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
7261                 vcpu->arch.complete_userspace_io = NULL;
7262                 r = cui(vcpu);
7263                 if (r <= 0)
7264                         goto out;
7265         } else
7266                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
7267
7268         if (kvm_run->immediate_exit)
7269                 r = -EINTR;
7270         else
7271                 r = vcpu_run(vcpu);
7272
7273 out:
7274         post_kvm_run_save(vcpu);
7275         if (vcpu->sigset_active)
7276                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
7277
7278         return r;
7279 }
7280
7281 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7282 {
7283         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
7284                 /*
7285                  * We are here if userspace calls get_regs() in the middle of
7286                  * instruction emulation. Registers state needs to be copied
7287                  * back from emulation context to vcpu. Userspace shouldn't do
7288                  * that usually, but some bad designed PV devices (vmware
7289                  * backdoor interface) need this to work
7290                  */
7291                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
7292                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7293         }
7294         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
7295         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
7296         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
7297         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
7298         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
7299         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
7300         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
7301         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
7302 #ifdef CONFIG_X86_64
7303         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
7304         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
7305         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
7306         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
7307         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
7308         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
7309         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
7310         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
7311 #endif
7312
7313         regs->rip = kvm_rip_read(vcpu);
7314         regs->rflags = kvm_get_rflags(vcpu);
7315
7316         return 0;
7317 }
7318
7319 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7320 {
7321         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
7322         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7323
7324         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
7325         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
7326         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
7327         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
7328         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
7329         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
7330         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
7331         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
7332 #ifdef CONFIG_X86_64
7333         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
7334         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
7335         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
7336         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
7337         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
7338         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
7339         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
7340         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
7341 #endif
7342
7343         kvm_rip_write(vcpu, regs->rip);
7344         kvm_set_rflags(vcpu, regs->rflags);
7345
7346         vcpu->arch.exception.pending = false;
7347
7348         kvm_make_request(KVM_REQ_EVENT, vcpu);
7349
7350         return 0;
7351 }
7352
7353 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
7354 {
7355         struct kvm_segment cs;
7356
7357         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7358         *db = cs.db;
7359         *l = cs.l;
7360 }
7361 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
7362
7363 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
7364                                   struct kvm_sregs *sregs)
7365 {
7366         struct desc_ptr dt;
7367
7368         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7369         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7370         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7371         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7372         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7373         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7374
7375         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7376         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7377
7378         kvm_x86_ops->get_idt(vcpu, &dt);
7379         sregs->idt.limit = dt.size;
7380         sregs->idt.base = dt.address;
7381         kvm_x86_ops->get_gdt(vcpu, &dt);
7382         sregs->gdt.limit = dt.size;
7383         sregs->gdt.base = dt.address;
7384
7385         sregs->cr0 = kvm_read_cr0(vcpu);
7386         sregs->cr2 = vcpu->arch.cr2;
7387         sregs->cr3 = kvm_read_cr3(vcpu);
7388         sregs->cr4 = kvm_read_cr4(vcpu);
7389         sregs->cr8 = kvm_get_cr8(vcpu);
7390         sregs->efer = vcpu->arch.efer;
7391         sregs->apic_base = kvm_get_apic_base(vcpu);
7392
7393         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
7394
7395         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
7396                 set_bit(vcpu->arch.interrupt.nr,
7397                         (unsigned long *)sregs->interrupt_bitmap);
7398
7399         return 0;
7400 }
7401
7402 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
7403                                     struct kvm_mp_state *mp_state)
7404 {
7405         kvm_apic_accept_events(vcpu);
7406         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
7407                                         vcpu->arch.pv.pv_unhalted)
7408                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
7409         else
7410                 mp_state->mp_state = vcpu->arch.mp_state;
7411
7412         return 0;
7413 }
7414
7415 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
7416                                     struct kvm_mp_state *mp_state)
7417 {
7418         if (!lapic_in_kernel(vcpu) &&
7419             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
7420                 return -EINVAL;
7421
7422         /* INITs are latched while in SMM */
7423         if ((is_smm(vcpu) || vcpu->arch.smi_pending) &&
7424             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
7425              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
7426                 return -EINVAL;
7427
7428         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
7429                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
7430                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
7431         } else
7432                 vcpu->arch.mp_state = mp_state->mp_state;
7433         kvm_make_request(KVM_REQ_EVENT, vcpu);
7434         return 0;
7435 }
7436
7437 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
7438                     int reason, bool has_error_code, u32 error_code)
7439 {
7440         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
7441         int ret;
7442
7443         init_emulate_ctxt(vcpu);
7444
7445         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
7446                                    has_error_code, error_code);
7447
7448         if (ret)
7449                 return EMULATE_FAIL;
7450
7451         kvm_rip_write(vcpu, ctxt->eip);
7452         kvm_set_rflags(vcpu, ctxt->eflags);
7453         kvm_make_request(KVM_REQ_EVENT, vcpu);
7454         return EMULATE_DONE;
7455 }
7456 EXPORT_SYMBOL_GPL(kvm_task_switch);
7457
7458 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
7459                                   struct kvm_sregs *sregs)
7460 {
7461         struct msr_data apic_base_msr;
7462         int mmu_reset_needed = 0;
7463         int pending_vec, max_bits, idx;
7464         struct desc_ptr dt;
7465
7466         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) &&
7467                         (sregs->cr4 & X86_CR4_OSXSAVE))
7468                 return -EINVAL;
7469
7470         apic_base_msr.data = sregs->apic_base;
7471         apic_base_msr.host_initiated = true;
7472         if (kvm_set_apic_base(vcpu, &apic_base_msr))
7473                 return -EINVAL;
7474
7475         dt.size = sregs->idt.limit;
7476         dt.address = sregs->idt.base;
7477         kvm_x86_ops->set_idt(vcpu, &dt);
7478         dt.size = sregs->gdt.limit;
7479         dt.address = sregs->gdt.base;
7480         kvm_x86_ops->set_gdt(vcpu, &dt);
7481
7482         vcpu->arch.cr2 = sregs->cr2;
7483         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
7484         vcpu->arch.cr3 = sregs->cr3;
7485         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
7486
7487         kvm_set_cr8(vcpu, sregs->cr8);
7488
7489         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
7490         kvm_x86_ops->set_efer(vcpu, sregs->efer);
7491
7492         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
7493         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
7494         vcpu->arch.cr0 = sregs->cr0;
7495
7496         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
7497         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
7498         if (sregs->cr4 & (X86_CR4_OSXSAVE | X86_CR4_PKE))
7499                 kvm_update_cpuid(vcpu);
7500
7501         idx = srcu_read_lock(&vcpu->kvm->srcu);
7502         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
7503                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
7504                 mmu_reset_needed = 1;
7505         }
7506         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7507
7508         if (mmu_reset_needed)
7509                 kvm_mmu_reset_context(vcpu);
7510
7511         max_bits = KVM_NR_INTERRUPTS;
7512         pending_vec = find_first_bit(
7513                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
7514         if (pending_vec < max_bits) {
7515                 kvm_queue_interrupt(vcpu, pending_vec, false);
7516                 pr_debug("Set back pending irq %d\n", pending_vec);
7517         }
7518
7519         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7520         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7521         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7522         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7523         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7524         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7525
7526         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7527         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7528
7529         update_cr8_intercept(vcpu);
7530
7531         /* Older userspace won't unhalt the vcpu on reset. */
7532         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
7533             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
7534             !is_protmode(vcpu))
7535                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7536
7537         kvm_make_request(KVM_REQ_EVENT, vcpu);
7538
7539         return 0;
7540 }
7541
7542 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
7543                                         struct kvm_guest_debug *dbg)
7544 {
7545         unsigned long rflags;
7546         int i, r;
7547
7548         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
7549                 r = -EBUSY;
7550                 if (vcpu->arch.exception.pending)
7551                         goto out;
7552                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
7553                         kvm_queue_exception(vcpu, DB_VECTOR);
7554                 else
7555                         kvm_queue_exception(vcpu, BP_VECTOR);
7556         }
7557
7558         /*
7559          * Read rflags as long as potentially injected trace flags are still
7560          * filtered out.
7561          */
7562         rflags = kvm_get_rflags(vcpu);
7563
7564         vcpu->guest_debug = dbg->control;
7565         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
7566                 vcpu->guest_debug = 0;
7567
7568         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
7569                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
7570                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
7571                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
7572         } else {
7573                 for (i = 0; i < KVM_NR_DB_REGS; i++)
7574                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
7575         }
7576         kvm_update_dr7(vcpu);
7577
7578         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7579                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
7580                         get_segment_base(vcpu, VCPU_SREG_CS);
7581
7582         /*
7583          * Trigger an rflags update that will inject or remove the trace
7584          * flags.
7585          */
7586         kvm_set_rflags(vcpu, rflags);
7587
7588         kvm_x86_ops->update_bp_intercept(vcpu);
7589
7590         r = 0;
7591
7592 out:
7593
7594         return r;
7595 }
7596
7597 /*
7598  * Translate a guest virtual address to a guest physical address.
7599  */
7600 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
7601                                     struct kvm_translation *tr)
7602 {
7603         unsigned long vaddr = tr->linear_address;
7604         gpa_t gpa;
7605         int idx;
7606
7607         idx = srcu_read_lock(&vcpu->kvm->srcu);
7608         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
7609         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7610         tr->physical_address = gpa;
7611         tr->valid = gpa != UNMAPPED_GVA;
7612         tr->writeable = 1;
7613         tr->usermode = 0;
7614
7615         return 0;
7616 }
7617
7618 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7619 {
7620         struct fxregs_state *fxsave =
7621                         &vcpu->arch.guest_fpu.state.fxsave;
7622
7623         memcpy(fpu->fpr, fxsave->st_space, 128);
7624         fpu->fcw = fxsave->cwd;
7625         fpu->fsw = fxsave->swd;
7626         fpu->ftwx = fxsave->twd;
7627         fpu->last_opcode = fxsave->fop;
7628         fpu->last_ip = fxsave->rip;
7629         fpu->last_dp = fxsave->rdp;
7630         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
7631
7632         return 0;
7633 }
7634
7635 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7636 {
7637         struct fxregs_state *fxsave =
7638                         &vcpu->arch.guest_fpu.state.fxsave;
7639
7640         memcpy(fxsave->st_space, fpu->fpr, 128);
7641         fxsave->cwd = fpu->fcw;
7642         fxsave->swd = fpu->fsw;
7643         fxsave->twd = fpu->ftwx;
7644         fxsave->fop = fpu->last_opcode;
7645         fxsave->rip = fpu->last_ip;
7646         fxsave->rdp = fpu->last_dp;
7647         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
7648
7649         return 0;
7650 }
7651
7652 static void fx_init(struct kvm_vcpu *vcpu)
7653 {
7654         fpstate_init(&vcpu->arch.guest_fpu.state);
7655         if (boot_cpu_has(X86_FEATURE_XSAVES))
7656                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
7657                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
7658
7659         /*
7660          * Ensure guest xcr0 is valid for loading
7661          */
7662         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
7663
7664         vcpu->arch.cr0 |= X86_CR0_ET;
7665 }
7666
7667 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7668 {
7669         if (vcpu->guest_fpu_loaded)
7670                 return;
7671
7672         /*
7673          * Restore all possible states in the guest,
7674          * and assume host would use all available bits.
7675          * Guest xcr0 would be loaded later.
7676          */
7677         vcpu->guest_fpu_loaded = 1;
7678         __kernel_fpu_begin();
7679         /* PKRU is separately restored in kvm_x86_ops->run.  */
7680         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state,
7681                                 ~XFEATURE_MASK_PKRU);
7682         trace_kvm_fpu(1);
7683 }
7684
7685 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7686 {
7687         if (!vcpu->guest_fpu_loaded)
7688                 return;
7689
7690         vcpu->guest_fpu_loaded = 0;
7691         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
7692         __kernel_fpu_end();
7693         ++vcpu->stat.fpu_reload;
7694         trace_kvm_fpu(0);
7695 }
7696
7697 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7698 {
7699         void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
7700
7701         kvmclock_reset(vcpu);
7702
7703         kvm_x86_ops->vcpu_free(vcpu);
7704         free_cpumask_var(wbinvd_dirty_mask);
7705 }
7706
7707 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7708                                                 unsigned int id)
7709 {
7710         struct kvm_vcpu *vcpu;
7711
7712         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7713                 printk_once(KERN_WARNING
7714                 "kvm: SMP vm created on host with unstable TSC; "
7715                 "guest TSC will not be reliable\n");
7716
7717         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
7718
7719         return vcpu;
7720 }
7721
7722 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7723 {
7724         int r;
7725
7726         kvm_vcpu_mtrr_init(vcpu);
7727         r = vcpu_load(vcpu);
7728         if (r)
7729                 return r;
7730         kvm_vcpu_reset(vcpu, false);
7731         kvm_mmu_setup(vcpu);
7732         vcpu_put(vcpu);
7733         return r;
7734 }
7735
7736 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7737 {
7738         struct msr_data msr;
7739         struct kvm *kvm = vcpu->kvm;
7740
7741         kvm_hv_vcpu_postcreate(vcpu);
7742
7743         if (vcpu_load(vcpu))
7744                 return;
7745         msr.data = 0x0;
7746         msr.index = MSR_IA32_TSC;
7747         msr.host_initiated = true;
7748         kvm_write_tsc(vcpu, &msr);
7749         vcpu_put(vcpu);
7750
7751         if (!kvmclock_periodic_sync)
7752                 return;
7753
7754         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7755                                         KVMCLOCK_SYNC_PERIOD);
7756 }
7757
7758 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7759 {
7760         int r;
7761         vcpu->arch.apf.msr_val = 0;
7762
7763         r = vcpu_load(vcpu);
7764         BUG_ON(r);
7765         kvm_mmu_unload(vcpu);
7766         vcpu_put(vcpu);
7767
7768         kvm_x86_ops->vcpu_free(vcpu);
7769 }
7770
7771 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
7772 {
7773         vcpu->arch.hflags = 0;
7774
7775         vcpu->arch.smi_pending = 0;
7776         atomic_set(&vcpu->arch.nmi_queued, 0);
7777         vcpu->arch.nmi_pending = 0;
7778         vcpu->arch.nmi_injected = false;
7779         kvm_clear_interrupt_queue(vcpu);
7780         kvm_clear_exception_queue(vcpu);
7781         vcpu->arch.exception.pending = false;
7782
7783         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7784         kvm_update_dr0123(vcpu);
7785         vcpu->arch.dr6 = DR6_INIT;
7786         kvm_update_dr6(vcpu);
7787         vcpu->arch.dr7 = DR7_FIXED_1;
7788         kvm_update_dr7(vcpu);
7789
7790         vcpu->arch.cr2 = 0;
7791
7792         kvm_make_request(KVM_REQ_EVENT, vcpu);
7793         vcpu->arch.apf.msr_val = 0;
7794         vcpu->arch.st.msr_val = 0;
7795
7796         kvmclock_reset(vcpu);
7797
7798         kvm_clear_async_pf_completion_queue(vcpu);
7799         kvm_async_pf_hash_reset(vcpu);
7800         vcpu->arch.apf.halted = false;
7801
7802         if (!init_event) {
7803                 kvm_pmu_reset(vcpu);
7804                 vcpu->arch.smbase = 0x30000;
7805
7806                 vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
7807                 vcpu->arch.msr_misc_features_enables = 0;
7808         }
7809
7810         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7811         vcpu->arch.regs_avail = ~0;
7812         vcpu->arch.regs_dirty = ~0;
7813
7814         kvm_x86_ops->vcpu_reset(vcpu, init_event);
7815 }
7816
7817 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7818 {
7819         struct kvm_segment cs;
7820
7821         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7822         cs.selector = vector << 8;
7823         cs.base = vector << 12;
7824         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7825         kvm_rip_write(vcpu, 0);
7826 }
7827
7828 int kvm_arch_hardware_enable(void)
7829 {
7830         struct kvm *kvm;
7831         struct kvm_vcpu *vcpu;
7832         int i;
7833         int ret;
7834         u64 local_tsc;
7835         u64 max_tsc = 0;
7836         bool stable, backwards_tsc = false;
7837
7838         kvm_shared_msr_cpu_online();
7839         ret = kvm_x86_ops->hardware_enable();
7840         if (ret != 0)
7841                 return ret;
7842
7843         local_tsc = rdtsc();
7844         stable = !check_tsc_unstable();
7845         list_for_each_entry(kvm, &vm_list, vm_list) {
7846                 kvm_for_each_vcpu(i, vcpu, kvm) {
7847                         if (!stable && vcpu->cpu == smp_processor_id())
7848                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7849                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7850                                 backwards_tsc = true;
7851                                 if (vcpu->arch.last_host_tsc > max_tsc)
7852                                         max_tsc = vcpu->arch.last_host_tsc;
7853                         }
7854                 }
7855         }
7856
7857         /*
7858          * Sometimes, even reliable TSCs go backwards.  This happens on
7859          * platforms that reset TSC during suspend or hibernate actions, but
7860          * maintain synchronization.  We must compensate.  Fortunately, we can
7861          * detect that condition here, which happens early in CPU bringup,
7862          * before any KVM threads can be running.  Unfortunately, we can't
7863          * bring the TSCs fully up to date with real time, as we aren't yet far
7864          * enough into CPU bringup that we know how much real time has actually
7865          * elapsed; our helper function, ktime_get_boot_ns() will be using boot
7866          * variables that haven't been updated yet.
7867          *
7868          * So we simply find the maximum observed TSC above, then record the
7869          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
7870          * the adjustment will be applied.  Note that we accumulate
7871          * adjustments, in case multiple suspend cycles happen before some VCPU
7872          * gets a chance to run again.  In the event that no KVM threads get a
7873          * chance to run, we will miss the entire elapsed period, as we'll have
7874          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7875          * loose cycle time.  This isn't too big a deal, since the loss will be
7876          * uniform across all VCPUs (not to mention the scenario is extremely
7877          * unlikely). It is possible that a second hibernate recovery happens
7878          * much faster than a first, causing the observed TSC here to be
7879          * smaller; this would require additional padding adjustment, which is
7880          * why we set last_host_tsc to the local tsc observed here.
7881          *
7882          * N.B. - this code below runs only on platforms with reliable TSC,
7883          * as that is the only way backwards_tsc is set above.  Also note
7884          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7885          * have the same delta_cyc adjustment applied if backwards_tsc
7886          * is detected.  Note further, this adjustment is only done once,
7887          * as we reset last_host_tsc on all VCPUs to stop this from being
7888          * called multiple times (one for each physical CPU bringup).
7889          *
7890          * Platforms with unreliable TSCs don't have to deal with this, they
7891          * will be compensated by the logic in vcpu_load, which sets the TSC to
7892          * catchup mode.  This will catchup all VCPUs to real time, but cannot
7893          * guarantee that they stay in perfect synchronization.
7894          */
7895         if (backwards_tsc) {
7896                 u64 delta_cyc = max_tsc - local_tsc;
7897                 list_for_each_entry(kvm, &vm_list, vm_list) {
7898                         kvm->arch.backwards_tsc_observed = true;
7899                         kvm_for_each_vcpu(i, vcpu, kvm) {
7900                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7901                                 vcpu->arch.last_host_tsc = local_tsc;
7902                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7903                         }
7904
7905                         /*
7906                          * We have to disable TSC offset matching.. if you were
7907                          * booting a VM while issuing an S4 host suspend....
7908                          * you may have some problem.  Solving this issue is
7909                          * left as an exercise to the reader.
7910                          */
7911                         kvm->arch.last_tsc_nsec = 0;
7912                         kvm->arch.last_tsc_write = 0;
7913                 }
7914
7915         }
7916         return 0;
7917 }
7918
7919 void kvm_arch_hardware_disable(void)
7920 {
7921         kvm_x86_ops->hardware_disable();
7922         drop_user_return_notifiers();
7923 }
7924
7925 int kvm_arch_hardware_setup(void)
7926 {
7927         int r;
7928
7929         r = kvm_x86_ops->hardware_setup();
7930         if (r != 0)
7931                 return r;
7932
7933         if (kvm_has_tsc_control) {
7934                 /*
7935                  * Make sure the user can only configure tsc_khz values that
7936                  * fit into a signed integer.
7937                  * A min value is not calculated needed because it will always
7938                  * be 1 on all machines.
7939                  */
7940                 u64 max = min(0x7fffffffULL,
7941                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
7942                 kvm_max_guest_tsc_khz = max;
7943
7944                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
7945         }
7946
7947         kvm_init_msr_list();
7948         return 0;
7949 }
7950
7951 void kvm_arch_hardware_unsetup(void)
7952 {
7953         kvm_x86_ops->hardware_unsetup();
7954 }
7955
7956 void kvm_arch_check_processor_compat(void *rtn)
7957 {
7958         kvm_x86_ops->check_processor_compatibility(rtn);
7959 }
7960
7961 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
7962 {
7963         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
7964 }
7965 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
7966
7967 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
7968 {
7969         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
7970 }
7971
7972 struct static_key kvm_no_apic_vcpu __read_mostly;
7973 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
7974
7975 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7976 {
7977         struct page *page;
7978         struct kvm *kvm;
7979         int r;
7980
7981         BUG_ON(vcpu->kvm == NULL);
7982         kvm = vcpu->kvm;
7983
7984         vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv();
7985         vcpu->arch.pv.pv_unhalted = false;
7986         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7987         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_reset_bsp(vcpu))
7988                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7989         else
7990                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7991
7992         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7993         if (!page) {
7994                 r = -ENOMEM;
7995                 goto fail;
7996         }
7997         vcpu->arch.pio_data = page_address(page);
7998
7999         kvm_set_tsc_khz(vcpu, max_tsc_khz);
8000
8001         r = kvm_mmu_create(vcpu);
8002         if (r < 0)
8003                 goto fail_free_pio_data;
8004
8005         if (irqchip_in_kernel(kvm)) {
8006                 r = kvm_create_lapic(vcpu);
8007                 if (r < 0)
8008                         goto fail_mmu_destroy;
8009         } else
8010                 static_key_slow_inc(&kvm_no_apic_vcpu);
8011
8012         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
8013                                        GFP_KERNEL);
8014         if (!vcpu->arch.mce_banks) {
8015                 r = -ENOMEM;
8016                 goto fail_free_lapic;
8017         }
8018         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
8019
8020         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
8021                 r = -ENOMEM;
8022                 goto fail_free_mce_banks;
8023         }
8024
8025         fx_init(vcpu);
8026
8027         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
8028         vcpu->arch.pv_time_enabled = false;
8029
8030         vcpu->arch.guest_supported_xcr0 = 0;
8031         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
8032
8033         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
8034
8035         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
8036
8037         kvm_async_pf_hash_reset(vcpu);
8038         kvm_pmu_init(vcpu);
8039
8040         vcpu->arch.pending_external_vector = -1;
8041         vcpu->arch.preempted_in_kernel = false;
8042
8043         kvm_hv_vcpu_init(vcpu);
8044
8045         return 0;
8046
8047 fail_free_mce_banks:
8048         kfree(vcpu->arch.mce_banks);
8049 fail_free_lapic:
8050         kvm_free_lapic(vcpu);
8051 fail_mmu_destroy:
8052         kvm_mmu_destroy(vcpu);
8053 fail_free_pio_data:
8054         free_page((unsigned long)vcpu->arch.pio_data);
8055 fail:
8056         return r;
8057 }
8058
8059 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
8060 {
8061         int idx;
8062
8063         kvm_hv_vcpu_uninit(vcpu);
8064         kvm_pmu_destroy(vcpu);
8065         kfree(vcpu->arch.mce_banks);
8066         kvm_free_lapic(vcpu);
8067         idx = srcu_read_lock(&vcpu->kvm->srcu);
8068         kvm_mmu_destroy(vcpu);
8069         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8070         free_page((unsigned long)vcpu->arch.pio_data);
8071         if (!lapic_in_kernel(vcpu))
8072                 static_key_slow_dec(&kvm_no_apic_vcpu);
8073 }
8074
8075 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
8076 {
8077         kvm_x86_ops->sched_in(vcpu, cpu);
8078 }
8079
8080 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
8081 {
8082         if (type)
8083                 return -EINVAL;
8084
8085         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
8086         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
8087         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
8088         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
8089         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
8090
8091         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
8092         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
8093         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
8094         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
8095                 &kvm->arch.irq_sources_bitmap);
8096
8097         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
8098         mutex_init(&kvm->arch.apic_map_lock);
8099         mutex_init(&kvm->arch.hyperv.hv_lock);
8100         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
8101
8102         kvm->arch.kvmclock_offset = -ktime_get_boot_ns();
8103         pvclock_update_vm_gtod_copy(kvm);
8104
8105         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
8106         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
8107
8108         kvm_page_track_init(kvm);
8109         kvm_mmu_init_vm(kvm);
8110
8111         if (kvm_x86_ops->vm_init)
8112                 return kvm_x86_ops->vm_init(kvm);
8113
8114         return 0;
8115 }
8116
8117 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
8118 {
8119         int r;
8120         r = vcpu_load(vcpu);
8121         BUG_ON(r);
8122         kvm_mmu_unload(vcpu);
8123         vcpu_put(vcpu);
8124 }
8125
8126 static void kvm_free_vcpus(struct kvm *kvm)
8127 {
8128         unsigned int i;
8129         struct kvm_vcpu *vcpu;
8130
8131         /*
8132          * Unpin any mmu pages first.
8133          */
8134         kvm_for_each_vcpu(i, vcpu, kvm) {
8135                 kvm_clear_async_pf_completion_queue(vcpu);
8136                 kvm_unload_vcpu_mmu(vcpu);
8137         }
8138         kvm_for_each_vcpu(i, vcpu, kvm)
8139                 kvm_arch_vcpu_free(vcpu);
8140
8141         mutex_lock(&kvm->lock);
8142         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
8143                 kvm->vcpus[i] = NULL;
8144
8145         atomic_set(&kvm->online_vcpus, 0);
8146         mutex_unlock(&kvm->lock);
8147 }
8148
8149 void kvm_arch_sync_events(struct kvm *kvm)
8150 {
8151         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
8152         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
8153         kvm_free_pit(kvm);
8154 }
8155
8156 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
8157 {
8158         int i, r;
8159         unsigned long hva;
8160         struct kvm_memslots *slots = kvm_memslots(kvm);
8161         struct kvm_memory_slot *slot, old;
8162
8163         /* Called with kvm->slots_lock held.  */
8164         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
8165                 return -EINVAL;
8166
8167         slot = id_to_memslot(slots, id);
8168         if (size) {
8169                 if (slot->npages)
8170                         return -EEXIST;
8171
8172                 /*
8173                  * MAP_SHARED to prevent internal slot pages from being moved
8174                  * by fork()/COW.
8175                  */
8176                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
8177                               MAP_SHARED | MAP_ANONYMOUS, 0);
8178                 if (IS_ERR((void *)hva))
8179                         return PTR_ERR((void *)hva);
8180         } else {
8181                 if (!slot->npages)
8182                         return 0;
8183
8184                 hva = 0;
8185         }
8186
8187         old = *slot;
8188         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
8189                 struct kvm_userspace_memory_region m;
8190
8191                 m.slot = id | (i << 16);
8192                 m.flags = 0;
8193                 m.guest_phys_addr = gpa;
8194                 m.userspace_addr = hva;
8195                 m.memory_size = size;
8196                 r = __kvm_set_memory_region(kvm, &m);
8197                 if (r < 0)
8198                         return r;
8199         }
8200
8201         if (!size) {
8202                 r = vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
8203                 WARN_ON(r < 0);
8204         }
8205
8206         return 0;
8207 }
8208 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
8209
8210 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
8211 {
8212         int r;
8213
8214         mutex_lock(&kvm->slots_lock);
8215         r = __x86_set_memory_region(kvm, id, gpa, size);
8216         mutex_unlock(&kvm->slots_lock);
8217
8218         return r;
8219 }
8220 EXPORT_SYMBOL_GPL(x86_set_memory_region);
8221
8222 void kvm_arch_destroy_vm(struct kvm *kvm)
8223 {
8224         if (current->mm == kvm->mm) {
8225                 /*
8226                  * Free memory regions allocated on behalf of userspace,
8227                  * unless the the memory map has changed due to process exit
8228                  * or fd copying.
8229                  */
8230                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
8231                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
8232                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
8233         }
8234         if (kvm_x86_ops->vm_destroy)
8235                 kvm_x86_ops->vm_destroy(kvm);
8236         kvm_pic_destroy(kvm);
8237         kvm_ioapic_destroy(kvm);
8238         kvm_free_vcpus(kvm);
8239         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
8240         kvm_mmu_uninit_vm(kvm);
8241         kvm_page_track_cleanup(kvm);
8242 }
8243
8244 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
8245                            struct kvm_memory_slot *dont)
8246 {
8247         int i;
8248
8249         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8250                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
8251                         kvfree(free->arch.rmap[i]);
8252                         free->arch.rmap[i] = NULL;
8253                 }
8254                 if (i == 0)
8255                         continue;
8256
8257                 if (!dont || free->arch.lpage_info[i - 1] !=
8258                              dont->arch.lpage_info[i - 1]) {
8259                         kvfree(free->arch.lpage_info[i - 1]);
8260                         free->arch.lpage_info[i - 1] = NULL;
8261                 }
8262         }
8263
8264         kvm_page_track_free_memslot(free, dont);
8265 }
8266
8267 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
8268                             unsigned long npages)
8269 {
8270         int i;
8271
8272         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8273                 struct kvm_lpage_info *linfo;
8274                 unsigned long ugfn;
8275                 int lpages;
8276                 int level = i + 1;
8277
8278                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
8279                                       slot->base_gfn, level) + 1;
8280
8281                 slot->arch.rmap[i] =
8282                         kvzalloc(lpages * sizeof(*slot->arch.rmap[i]), GFP_KERNEL);
8283                 if (!slot->arch.rmap[i])
8284                         goto out_free;
8285                 if (i == 0)
8286                         continue;
8287
8288                 linfo = kvzalloc(lpages * sizeof(*linfo), GFP_KERNEL);
8289                 if (!linfo)
8290                         goto out_free;
8291
8292                 slot->arch.lpage_info[i - 1] = linfo;
8293
8294                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
8295                         linfo[0].disallow_lpage = 1;
8296                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
8297                         linfo[lpages - 1].disallow_lpage = 1;
8298                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
8299                 /*
8300                  * If the gfn and userspace address are not aligned wrt each
8301                  * other, or if explicitly asked to, disable large page
8302                  * support for this slot
8303                  */
8304                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
8305                     !kvm_largepages_enabled()) {
8306                         unsigned long j;
8307
8308                         for (j = 0; j < lpages; ++j)
8309                                 linfo[j].disallow_lpage = 1;
8310                 }
8311         }
8312
8313         if (kvm_page_track_create_memslot(slot, npages))
8314                 goto out_free;
8315
8316         return 0;
8317
8318 out_free:
8319         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8320                 kvfree(slot->arch.rmap[i]);
8321                 slot->arch.rmap[i] = NULL;
8322                 if (i == 0)
8323                         continue;
8324
8325                 kvfree(slot->arch.lpage_info[i - 1]);
8326                 slot->arch.lpage_info[i - 1] = NULL;
8327         }
8328         return -ENOMEM;
8329 }
8330
8331 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
8332 {
8333         /*
8334          * memslots->generation has been incremented.
8335          * mmio generation may have reached its maximum value.
8336          */
8337         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
8338 }
8339
8340 int kvm_arch_prepare_memory_region(struct kvm *kvm,
8341                                 struct kvm_memory_slot *memslot,
8342                                 const struct kvm_userspace_memory_region *mem,
8343                                 enum kvm_mr_change change)
8344 {
8345         return 0;
8346 }
8347
8348 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
8349                                      struct kvm_memory_slot *new)
8350 {
8351         /* Still write protect RO slot */
8352         if (new->flags & KVM_MEM_READONLY) {
8353                 kvm_mmu_slot_remove_write_access(kvm, new);
8354                 return;
8355         }
8356
8357         /*
8358          * Call kvm_x86_ops dirty logging hooks when they are valid.
8359          *
8360          * kvm_x86_ops->slot_disable_log_dirty is called when:
8361          *
8362          *  - KVM_MR_CREATE with dirty logging is disabled
8363          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8364          *
8365          * The reason is, in case of PML, we need to set D-bit for any slots
8366          * with dirty logging disabled in order to eliminate unnecessary GPA
8367          * logging in PML buffer (and potential PML buffer full VMEXT). This
8368          * guarantees leaving PML enabled during guest's lifetime won't have
8369          * any additonal overhead from PML when guest is running with dirty
8370          * logging disabled for memory slots.
8371          *
8372          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8373          * to dirty logging mode.
8374          *
8375          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8376          *
8377          * In case of write protect:
8378          *
8379          * Write protect all pages for dirty logging.
8380          *
8381          * All the sptes including the large sptes which point to this
8382          * slot are set to readonly. We can not create any new large
8383          * spte on this slot until the end of the logging.
8384          *
8385          * See the comments in fast_page_fault().
8386          */
8387         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
8388                 if (kvm_x86_ops->slot_enable_log_dirty)
8389                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
8390                 else
8391                         kvm_mmu_slot_remove_write_access(kvm, new);
8392         } else {
8393                 if (kvm_x86_ops->slot_disable_log_dirty)
8394                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
8395         }
8396 }
8397
8398 void kvm_arch_commit_memory_region(struct kvm *kvm,
8399                                 const struct kvm_userspace_memory_region *mem,
8400                                 const struct kvm_memory_slot *old,
8401                                 const struct kvm_memory_slot *new,
8402                                 enum kvm_mr_change change)
8403 {
8404         int nr_mmu_pages = 0;
8405
8406         if (!kvm->arch.n_requested_mmu_pages)
8407                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
8408
8409         if (nr_mmu_pages)
8410                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
8411
8412         /*
8413          * Dirty logging tracks sptes in 4k granularity, meaning that large
8414          * sptes have to be split.  If live migration is successful, the guest
8415          * in the source machine will be destroyed and large sptes will be
8416          * created in the destination. However, if the guest continues to run
8417          * in the source machine (for example if live migration fails), small
8418          * sptes will remain around and cause bad performance.
8419          *
8420          * Scan sptes if dirty logging has been stopped, dropping those
8421          * which can be collapsed into a single large-page spte.  Later
8422          * page faults will create the large-page sptes.
8423          */
8424         if ((change != KVM_MR_DELETE) &&
8425                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
8426                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
8427                 kvm_mmu_zap_collapsible_sptes(kvm, new);
8428
8429         /*
8430          * Set up write protection and/or dirty logging for the new slot.
8431          *
8432          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8433          * been zapped so no dirty logging staff is needed for old slot. For
8434          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8435          * new and it's also covered when dealing with the new slot.
8436          *
8437          * FIXME: const-ify all uses of struct kvm_memory_slot.
8438          */
8439         if (change != KVM_MR_DELETE)
8440                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
8441 }
8442
8443 void kvm_arch_flush_shadow_all(struct kvm *kvm)
8444 {
8445         kvm_mmu_invalidate_zap_all_pages(kvm);
8446 }
8447
8448 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
8449                                    struct kvm_memory_slot *slot)
8450 {
8451         kvm_page_track_flush_slot(kvm, slot);
8452 }
8453
8454 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
8455 {
8456         if (!list_empty_careful(&vcpu->async_pf.done))
8457                 return true;
8458
8459         if (kvm_apic_has_events(vcpu))
8460                 return true;
8461
8462         if (vcpu->arch.pv.pv_unhalted)
8463                 return true;
8464
8465         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
8466             (vcpu->arch.nmi_pending &&
8467              kvm_x86_ops->nmi_allowed(vcpu)))
8468                 return true;
8469
8470         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
8471             (vcpu->arch.smi_pending && !is_smm(vcpu)))
8472                 return true;
8473
8474         if (kvm_arch_interrupt_allowed(vcpu) &&
8475             kvm_cpu_has_interrupt(vcpu))
8476                 return true;
8477
8478         if (kvm_hv_has_stimer_pending(vcpu))
8479                 return true;
8480
8481         return false;
8482 }
8483
8484 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
8485 {
8486         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
8487 }
8488
8489 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
8490 {
8491         return vcpu->arch.preempted_in_kernel;
8492 }
8493
8494 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
8495 {
8496         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
8497 }
8498
8499 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
8500 {
8501         return kvm_x86_ops->interrupt_allowed(vcpu);
8502 }
8503
8504 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
8505 {
8506         if (is_64_bit_mode(vcpu))
8507                 return kvm_rip_read(vcpu);
8508         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
8509                      kvm_rip_read(vcpu));
8510 }
8511 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
8512
8513 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
8514 {
8515         return kvm_get_linear_rip(vcpu) == linear_rip;
8516 }
8517 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
8518
8519 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
8520 {
8521         unsigned long rflags;
8522
8523         rflags = kvm_x86_ops->get_rflags(vcpu);
8524         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8525                 rflags &= ~X86_EFLAGS_TF;
8526         return rflags;
8527 }
8528 EXPORT_SYMBOL_GPL(kvm_get_rflags);
8529
8530 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8531 {
8532         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
8533             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
8534                 rflags |= X86_EFLAGS_TF;
8535         kvm_x86_ops->set_rflags(vcpu, rflags);
8536 }
8537
8538 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8539 {
8540         __kvm_set_rflags(vcpu, rflags);
8541         kvm_make_request(KVM_REQ_EVENT, vcpu);
8542 }
8543 EXPORT_SYMBOL_GPL(kvm_set_rflags);
8544
8545 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
8546 {
8547         int r;
8548
8549         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
8550               work->wakeup_all)
8551                 return;
8552
8553         r = kvm_mmu_reload(vcpu);
8554         if (unlikely(r))
8555                 return;
8556
8557         if (!vcpu->arch.mmu.direct_map &&
8558               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
8559                 return;
8560
8561         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
8562 }
8563
8564 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
8565 {
8566         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
8567 }
8568
8569 static inline u32 kvm_async_pf_next_probe(u32 key)
8570 {
8571         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
8572 }
8573
8574 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8575 {
8576         u32 key = kvm_async_pf_hash_fn(gfn);
8577
8578         while (vcpu->arch.apf.gfns[key] != ~0)
8579                 key = kvm_async_pf_next_probe(key);
8580
8581         vcpu->arch.apf.gfns[key] = gfn;
8582 }
8583
8584 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
8585 {
8586         int i;
8587         u32 key = kvm_async_pf_hash_fn(gfn);
8588
8589         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
8590                      (vcpu->arch.apf.gfns[key] != gfn &&
8591                       vcpu->arch.apf.gfns[key] != ~0); i++)
8592                 key = kvm_async_pf_next_probe(key);
8593
8594         return key;
8595 }
8596
8597 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8598 {
8599         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
8600 }
8601
8602 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8603 {
8604         u32 i, j, k;
8605
8606         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
8607         while (true) {
8608                 vcpu->arch.apf.gfns[i] = ~0;
8609                 do {
8610                         j = kvm_async_pf_next_probe(j);
8611                         if (vcpu->arch.apf.gfns[j] == ~0)
8612                                 return;
8613                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
8614                         /*
8615                          * k lies cyclically in ]i,j]
8616                          * |    i.k.j |
8617                          * |....j i.k.| or  |.k..j i...|
8618                          */
8619                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
8620                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
8621                 i = j;
8622         }
8623 }
8624
8625 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
8626 {
8627
8628         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
8629                                       sizeof(val));
8630 }
8631
8632 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
8633                                      struct kvm_async_pf *work)
8634 {
8635         struct x86_exception fault;
8636
8637         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
8638         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
8639
8640         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
8641             (vcpu->arch.apf.send_user_only &&
8642              kvm_x86_ops->get_cpl(vcpu) == 0))
8643                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
8644         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
8645                 fault.vector = PF_VECTOR;
8646                 fault.error_code_valid = true;
8647                 fault.error_code = 0;
8648                 fault.nested_page_fault = false;
8649                 fault.address = work->arch.token;
8650                 fault.async_page_fault = true;
8651                 kvm_inject_page_fault(vcpu, &fault);
8652         }
8653 }
8654
8655 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
8656                                  struct kvm_async_pf *work)
8657 {
8658         struct x86_exception fault;
8659
8660         if (work->wakeup_all)
8661                 work->arch.token = ~0; /* broadcast wakeup */
8662         else
8663                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
8664         trace_kvm_async_pf_ready(work->arch.token, work->gva);
8665
8666         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
8667             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
8668                 fault.vector = PF_VECTOR;
8669                 fault.error_code_valid = true;
8670                 fault.error_code = 0;
8671                 fault.nested_page_fault = false;
8672                 fault.address = work->arch.token;
8673                 fault.async_page_fault = true;
8674                 kvm_inject_page_fault(vcpu, &fault);
8675         }
8676         vcpu->arch.apf.halted = false;
8677         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8678 }
8679
8680 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
8681 {
8682         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
8683                 return true;
8684         else
8685                 return kvm_can_do_async_pf(vcpu);
8686 }
8687
8688 void kvm_arch_start_assignment(struct kvm *kvm)
8689 {
8690         atomic_inc(&kvm->arch.assigned_device_count);
8691 }
8692 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
8693
8694 void kvm_arch_end_assignment(struct kvm *kvm)
8695 {
8696         atomic_dec(&kvm->arch.assigned_device_count);
8697 }
8698 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
8699
8700 bool kvm_arch_has_assigned_device(struct kvm *kvm)
8701 {
8702         return atomic_read(&kvm->arch.assigned_device_count);
8703 }
8704 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
8705
8706 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
8707 {
8708         atomic_inc(&kvm->arch.noncoherent_dma_count);
8709 }
8710 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
8711
8712 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
8713 {
8714         atomic_dec(&kvm->arch.noncoherent_dma_count);
8715 }
8716 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
8717
8718 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
8719 {
8720         return atomic_read(&kvm->arch.noncoherent_dma_count);
8721 }
8722 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
8723
8724 bool kvm_arch_has_irq_bypass(void)
8725 {
8726         return kvm_x86_ops->update_pi_irte != NULL;
8727 }
8728
8729 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
8730                                       struct irq_bypass_producer *prod)
8731 {
8732         struct kvm_kernel_irqfd *irqfd =
8733                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8734
8735         irqfd->producer = prod;
8736
8737         return kvm_x86_ops->update_pi_irte(irqfd->kvm,
8738                                            prod->irq, irqfd->gsi, 1);
8739 }
8740
8741 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
8742                                       struct irq_bypass_producer *prod)
8743 {
8744         int ret;
8745         struct kvm_kernel_irqfd *irqfd =
8746                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8747
8748         WARN_ON(irqfd->producer != prod);
8749         irqfd->producer = NULL;
8750
8751         /*
8752          * When producer of consumer is unregistered, we change back to
8753          * remapped mode, so we can re-use the current implementation
8754          * when the irq is masked/disabled or the consumer side (KVM
8755          * int this case doesn't want to receive the interrupts.
8756         */
8757         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
8758         if (ret)
8759                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
8760                        " fails: %d\n", irqfd->consumer.token, ret);
8761 }
8762
8763 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
8764                                    uint32_t guest_irq, bool set)
8765 {
8766         if (!kvm_x86_ops->update_pi_irte)
8767                 return -EINVAL;
8768
8769         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
8770 }
8771
8772 bool kvm_vector_hashing_enabled(void)
8773 {
8774         return vector_hashing;
8775 }
8776 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
8777
8778 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
8779 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
8780 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
8781 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
8782 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
8783 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
8784 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
8785 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
8786 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
8787 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
8788 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
8789 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
8790 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
8791 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
8792 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
8793 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
8794 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
8795 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
8796 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);