arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "pmu.h"
  31 #include "hyperv.h"
  32
  33 #include <linux/clocksource.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/kvm.h>
  36 #include <linux/fs.h>
  37 #include <linux/vmalloc.h>
  38 #include <linux/export.h>
  39 #include <linux/moduleparam.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <linux/sched/stat.h>
  57
  58 #include <trace/events/kvm.h>
  59
  60 #include <asm/debugreg.h>
  61 #include <asm/msr.h>
  62 #include <asm/desc.h>
  63 #include <asm/mce.h>
  64 #include <linux/kernel_stat.h>
  65 #include <asm/fpu/internal.h> /* Ugh! */
  66 #include <asm/pvclock.h>
  67 #include <asm/div64.h>
  68 #include <asm/irq_remapping.h>
  69
  70 #define CREATE_TRACE_POINTS
  71 #include "trace.h"
  72
  73 #define MAX_IO_MSRS 256
  74 #define KVM_MAX_MCE_BANKS 32
  75 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  76 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  77
  78 #define emul_to_vcpu(ctxt) \
  79         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  80
  81 /* EFER defaults:
  82  * - enable syscall per default because its emulated by KVM
  83  * - enable LME and LMA per default on 64 bit KVM
  84  */
  85 #ifdef CONFIG_X86_64
  86 static
  87 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  88 #else
  89 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  90 #endif
  91
  92 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  93 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  94
  95 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
  96                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
  97
  98 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  99 static void process_nmi(struct kvm_vcpu *vcpu);
 100 static void enter_smm(struct kvm_vcpu *vcpu);
 101 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 102
 103 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
 104 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 105
 106 static bool __read_mostly ignore_msrs = 0;
 107 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 108
 109 unsigned int min_timer_period_us = 500;
 110 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 111
 112 static bool __read_mostly kvmclock_periodic_sync = true;
 113 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 114
 115 bool __read_mostly kvm_has_tsc_control;
 116 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 117 u32  __read_mostly kvm_max_guest_tsc_khz;
 118 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 119 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 120 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 121 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 122 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 123 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 124 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 125
 126 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 127 static u32 __read_mostly tsc_tolerance_ppm = 250;
 128 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 129
 130 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 131 unsigned int __read_mostly lapic_timer_advance_ns = 0;
 132 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 133
 134 static bool __read_mostly vector_hashing = true;
 135 module_param(vector_hashing, bool, S_IRUGO);
 136
 137 static bool __read_mostly backwards_tsc_observed = false;
 138
 139 #define KVM_NR_SHARED_MSRS 16
 140
 141 struct kvm_shared_msrs_global {
 142         int nr;
 143         u32 msrs[KVM_NR_SHARED_MSRS];
 144 };
 145
 146 struct kvm_shared_msrs {
 147         struct user_return_notifier urn;
 148         bool registered;
 149         struct kvm_shared_msr_values {
 150                 u64 host;
 151                 u64 curr;
 152         } values[KVM_NR_SHARED_MSRS];
 153 };
 154
 155 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 156 static struct kvm_shared_msrs __percpu *shared_msrs;
 157
 158 struct kvm_stats_debugfs_item debugfs_entries[] = {
 159         { "pf_fixed", VCPU_STAT(pf_fixed) },
 160         { "pf_guest", VCPU_STAT(pf_guest) },
 161         { "tlb_flush", VCPU_STAT(tlb_flush) },
 162         { "invlpg", VCPU_STAT(invlpg) },
 163         { "exits", VCPU_STAT(exits) },
 164         { "io_exits", VCPU_STAT(io_exits) },
 165         { "mmio_exits", VCPU_STAT(mmio_exits) },
 166         { "signal_exits", VCPU_STAT(signal_exits) },
 167         { "irq_window", VCPU_STAT(irq_window_exits) },
 168         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 169         { "halt_exits", VCPU_STAT(halt_exits) },
 170         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 171         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 172         { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
 173         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 174         { "hypercalls", VCPU_STAT(hypercalls) },
 175         { "request_irq", VCPU_STAT(request_irq_exits) },
 176         { "irq_exits", VCPU_STAT(irq_exits) },
 177         { "host_state_reload", VCPU_STAT(host_state_reload) },
 178         { "efer_reload", VCPU_STAT(efer_reload) },
 179         { "fpu_reload", VCPU_STAT(fpu_reload) },
 180         { "insn_emulation", VCPU_STAT(insn_emulation) },
 181         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 182         { "irq_injections", VCPU_STAT(irq_injections) },
 183         { "nmi_injections", VCPU_STAT(nmi_injections) },
 184         { "req_event", VCPU_STAT(req_event) },
 185         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 186         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 187         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 188         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 189         { "mmu_flooded", VM_STAT(mmu_flooded) },
 190         { "mmu_recycled", VM_STAT(mmu_recycled) },
 191         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 192         { "mmu_unsync", VM_STAT(mmu_unsync) },
 193         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 194         { "largepages", VM_STAT(lpages) },
 195         { "max_mmu_page_hash_collisions",
 196                 VM_STAT(max_mmu_page_hash_collisions) },
 197         { NULL }
 198 };
 199
 200 u64 __read_mostly host_xcr0;
 201
 202 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 203
 204 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 205 {
 206         int i;
 207         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 208                 vcpu->arch.apf.gfns[i] = ~0;
 209 }
 210
 211 static void kvm_on_user_return(struct user_return_notifier *urn)
 212 {
 213         unsigned slot;
 214         struct kvm_shared_msrs *locals
 215                 = container_of(urn, struct kvm_shared_msrs, urn);
 216         struct kvm_shared_msr_values *values;
 217         unsigned long flags;
 218
 219         /*
 220          * Disabling irqs at this point since the following code could be
 221          * interrupted and executed through kvm_arch_hardware_disable()
 222          */
 223         local_irq_save(flags);
 224         if (locals->registered) {
 225                 locals->registered = false;
 226                 user_return_notifier_unregister(urn);
 227         }
 228         local_irq_restore(flags);
 229         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 230                 values = &locals->values[slot];
 231                 if (values->host != values->curr) {
 232                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 233                         values->curr = values->host;
 234                 }
 235         }
 236 }
 237
 238 static void shared_msr_update(unsigned slot, u32 msr)
 239 {
 240         u64 value;
 241         unsigned int cpu = smp_processor_id();
 242         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 243
 244         /* only read, and nobody should modify it at this time,
 245          * so don't need lock */
 246         if (slot >= shared_msrs_global.nr) {
 247                 printk(KERN_ERR "kvm: invalid MSR slot!");
 248                 return;
 249         }
 250         rdmsrl_safe(msr, &value);
 251         smsr->values[slot].host = value;
 252         smsr->values[slot].curr = value;
 253 }
 254
 255 void kvm_define_shared_msr(unsigned slot, u32 msr)
 256 {
 257         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 258         shared_msrs_global.msrs[slot] = msr;
 259         if (slot >= shared_msrs_global.nr)
 260                 shared_msrs_global.nr = slot + 1;
 261 }
 262 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 263
 264 static void kvm_shared_msr_cpu_online(void)
 265 {
 266         unsigned i;
 267
 268         for (i = 0; i < shared_msrs_global.nr; ++i)
 269                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 270 }
 271
 272 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 273 {
 274         unsigned int cpu = smp_processor_id();
 275         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 276         int err;
 277
 278         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 279                 return 0;
 280         smsr->values[slot].curr = value;
 281         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 282         if (err)
 283                 return 1;
 284
 285         if (!smsr->registered) {
 286                 smsr->urn.on_user_return = kvm_on_user_return;
 287                 user_return_notifier_register(&smsr->urn);
 288                 smsr->registered = true;
 289         }
 290         return 0;
 291 }
 292 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 293
 294 static void drop_user_return_notifiers(void)
 295 {
 296         unsigned int cpu = smp_processor_id();
 297         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 298
 299         if (smsr->registered)
 300                 kvm_on_user_return(&smsr->urn);
 301 }
 302
 303 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 304 {
 305         return vcpu->arch.apic_base;
 306 }
 307 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 308
 309 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 310 {
 311         u64 old_state = vcpu->arch.apic_base &
 312                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 313         u64 new_state = msr_info->data &
 314                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 315         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
 316                 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
 317
 318         if (!msr_info->host_initiated &&
 319             ((msr_info->data & reserved_bits) != 0 ||
 320              new_state == X2APIC_ENABLE ||
 321              (new_state == MSR_IA32_APICBASE_ENABLE &&
 322               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 323              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 324               old_state == 0)))
 325                 return 1;
 326
 327         kvm_lapic_set_base(vcpu, msr_info->data);
 328         return 0;
 329 }
 330 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 331
 332 asmlinkage __visible void kvm_spurious_fault(void)
 333 {
 334         /* Fault while not rebooting.  We want the trace. */
 335         BUG();
 336 }
 337 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 338
 339 #define EXCPT_BENIGN            0
 340 #define EXCPT_CONTRIBUTORY      1
 341 #define EXCPT_PF                2
 342
 343 static int exception_class(int vector)
 344 {
 345         switch (vector) {
 346         case PF_VECTOR:
 347                 return EXCPT_PF;
 348         case DE_VECTOR:
 349         case TS_VECTOR:
 350         case NP_VECTOR:
 351         case SS_VECTOR:
 352         case GP_VECTOR:
 353                 return EXCPT_CONTRIBUTORY;
 354         default:
 355                 break;
 356         }
 357         return EXCPT_BENIGN;
 358 }
 359
 360 #define EXCPT_FAULT             0
 361 #define EXCPT_TRAP              1
 362 #define EXCPT_ABORT             2
 363 #define EXCPT_INTERRUPT         3
 364
 365 static int exception_type(int vector)
 366 {
 367         unsigned int mask;
 368
 369         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 370                 return EXCPT_INTERRUPT;
 371
 372         mask = 1 << vector;
 373
 374         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 375         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 376                 return EXCPT_TRAP;
 377
 378         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 379                 return EXCPT_ABORT;
 380
 381         /* Reserved exceptions will result in fault */
 382         return EXCPT_FAULT;
 383 }
 384
 385 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 386                 unsigned nr, bool has_error, u32 error_code,
 387                 bool reinject)
 388 {
 389         u32 prev_nr;
 390         int class1, class2;
 391
 392         kvm_make_request(KVM_REQ_EVENT, vcpu);
 393
 394         if (!vcpu->arch.exception.pending) {
 395         queue:
 396                 if (has_error && !is_protmode(vcpu))
 397                         has_error = false;
 398                 vcpu->arch.exception.pending = true;
 399                 vcpu->arch.exception.has_error_code = has_error;
 400                 vcpu->arch.exception.nr = nr;
 401                 vcpu->arch.exception.error_code = error_code;
 402                 vcpu->arch.exception.reinject = reinject;
 403                 return;
 404         }
 405
 406         /* to check exception */
 407         prev_nr = vcpu->arch.exception.nr;
 408         if (prev_nr == DF_VECTOR) {
 409                 /* triple fault -> shutdown */
 410                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 411                 return;
 412         }
 413         class1 = exception_class(prev_nr);
 414         class2 = exception_class(nr);
 415         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 416                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 417                 /* generate double fault per SDM Table 5-5 */
 418                 vcpu->arch.exception.pending = true;
 419                 vcpu->arch.exception.has_error_code = true;
 420                 vcpu->arch.exception.nr = DF_VECTOR;
 421                 vcpu->arch.exception.error_code = 0;
 422         } else
 423                 /* replace previous exception with a new one in a hope
 424                    that instruction re-execution will regenerate lost
 425                    exception */
 426                 goto queue;
 427 }
 428
 429 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 430 {
 431         kvm_multiple_exception(vcpu, nr, false, 0, false);
 432 }
 433 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 434
 435 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 436 {
 437         kvm_multiple_exception(vcpu, nr, false, 0, true);
 438 }
 439 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 440
 441 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 442 {
 443         if (err)
 444                 kvm_inject_gp(vcpu, 0);
 445         else
 446                 return kvm_skip_emulated_instruction(vcpu);
 447
 448         return 1;
 449 }
 450 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 451
 452 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 453 {
 454         ++vcpu->stat.pf_guest;
 455         vcpu->arch.cr2 = fault->address;
 456         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 457 }
 458 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 459
 460 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 461 {
 462         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 463                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 464         else
 465                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 466
 467         return fault->nested_page_fault;
 468 }
 469
 470 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 471 {
 472         atomic_inc(&vcpu->arch.nmi_queued);
 473         kvm_make_request(KVM_REQ_NMI, vcpu);
 474 }
 475 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 476
 477 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 478 {
 479         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 480 }
 481 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 482
 483 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 484 {
 485         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 486 }
 487 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 488
 489 /*
 490  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 491  * a #GP and return false.
 492  */
 493 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 494 {
 495         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 496                 return true;
 497         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 498         return false;
 499 }
 500 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 501
 502 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 503 {
 504         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 505                 return true;
 506
 507         kvm_queue_exception(vcpu, UD_VECTOR);
 508         return false;
 509 }
 510 EXPORT_SYMBOL_GPL(kvm_require_dr);
 511
 512 /*
 513  * This function will be used to read from the physical memory of the currently
 514  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 515  * can read from guest physical or from the guest's guest physical memory.
 516  */
 517 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 518                             gfn_t ngfn, void *data, int offset, int len,
 519                             u32 access)
 520 {
 521         struct x86_exception exception;
 522         gfn_t real_gfn;
 523         gpa_t ngpa;
 524
 525         ngpa     = gfn_to_gpa(ngfn);
 526         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 527         if (real_gfn == UNMAPPED_GVA)
 528                 return -EFAULT;
 529
 530         real_gfn = gpa_to_gfn(real_gfn);
 531
 532         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 533 }
 534 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 535
 536 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 537                                void *data, int offset, int len, u32 access)
 538 {
 539         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 540                                        data, offset, len, access);
 541 }
 542
 543 /*
 544  * Load the pae pdptrs.  Return true is they are all valid.
 545  */
 546 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 547 {
 548         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 549         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 550         int i;
 551         int ret;
 552         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 553
 554         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 555                                       offset * sizeof(u64), sizeof(pdpte),
 556                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 557         if (ret < 0) {
 558                 ret = 0;
 559                 goto out;
 560         }
 561         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 562                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 563                     (pdpte[i] &
 564                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
 565                         ret = 0;
 566                         goto out;
 567                 }
 568         }
 569         ret = 1;
 570
 571         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 572         __set_bit(VCPU_EXREG_PDPTR,
 573                   (unsigned long *)&vcpu->arch.regs_avail);
 574         __set_bit(VCPU_EXREG_PDPTR,
 575                   (unsigned long *)&vcpu->arch.regs_dirty);
 576 out:
 577
 578         return ret;
 579 }
 580 EXPORT_SYMBOL_GPL(load_pdptrs);
 581
 582 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 583 {
 584         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 585         bool changed = true;
 586         int offset;
 587         gfn_t gfn;
 588         int r;
 589
 590         if (is_long_mode(vcpu) || !is_pae(vcpu))
 591                 return false;
 592
 593         if (!test_bit(VCPU_EXREG_PDPTR,
 594                       (unsigned long *)&vcpu->arch.regs_avail))
 595                 return true;
 596
 597         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 598         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 599         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 600                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 601         if (r < 0)
 602                 goto out;
 603         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 604 out:
 605
 606         return changed;
 607 }
 608 EXPORT_SYMBOL_GPL(pdptrs_changed);
 609
 610 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 611 {
 612         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 613         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 614
 615         cr0 |= X86_CR0_ET;
 616
 617 #ifdef CONFIG_X86_64
 618         if (cr0 & 0xffffffff00000000UL)
 619                 return 1;
 620 #endif
 621
 622         cr0 &= ~CR0_RESERVED_BITS;
 623
 624         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 625                 return 1;
 626
 627         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 628                 return 1;
 629
 630         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 631 #ifdef CONFIG_X86_64
 632                 if ((vcpu->arch.efer & EFER_LME)) {
 633                         int cs_db, cs_l;
 634
 635                         if (!is_pae(vcpu))
 636                                 return 1;
 637                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 638                         if (cs_l)
 639                                 return 1;
 640                 } else
 641 #endif
 642                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 643                                                  kvm_read_cr3(vcpu)))
 644                         return 1;
 645         }
 646
 647         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 648                 return 1;
 649
 650         kvm_x86_ops->set_cr0(vcpu, cr0);
 651
 652         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 653                 kvm_clear_async_pf_completion_queue(vcpu);
 654                 kvm_async_pf_hash_reset(vcpu);
 655         }
 656
 657         if ((cr0 ^ old_cr0) & update_bits)
 658                 kvm_mmu_reset_context(vcpu);
 659
 660         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 661             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 662             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 663                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 664
 665         return 0;
 666 }
 667 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 668
 669 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 670 {
 671         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 672 }
 673 EXPORT_SYMBOL_GPL(kvm_lmsw);
 674
 675 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 676 {
 677         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 678                         !vcpu->guest_xcr0_loaded) {
 679                 /* kvm_set_xcr() also depends on this */
 680                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 681                 vcpu->guest_xcr0_loaded = 1;
 682         }
 683 }
 684
 685 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 686 {
 687         if (vcpu->guest_xcr0_loaded) {
 688                 if (vcpu->arch.xcr0 != host_xcr0)
 689                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 690                 vcpu->guest_xcr0_loaded = 0;
 691         }
 692 }
 693
 694 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 695 {
 696         u64 xcr0 = xcr;
 697         u64 old_xcr0 = vcpu->arch.xcr0;
 698         u64 valid_bits;
 699
 700         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 701         if (index != XCR_XFEATURE_ENABLED_MASK)
 702                 return 1;
 703         if (!(xcr0 & XFEATURE_MASK_FP))
 704                 return 1;
 705         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 706                 return 1;
 707
 708         /*
 709          * Do not allow the guest to set bits that we do not support
 710          * saving.  However, xcr0 bit 0 is always set, even if the
 711          * emulated CPU does not support XSAVE (see fx_init).
 712          */
 713         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 714         if (xcr0 & ~valid_bits)
 715                 return 1;
 716
 717         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 718             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 719                 return 1;
 720
 721         if (xcr0 & XFEATURE_MASK_AVX512) {
 722                 if (!(xcr0 & XFEATURE_MASK_YMM))
 723                         return 1;
 724                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 725                         return 1;
 726         }
 727         vcpu->arch.xcr0 = xcr0;
 728
 729         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 730                 kvm_update_cpuid(vcpu);
 731         return 0;
 732 }
 733
 734 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 735 {
 736         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 737             __kvm_set_xcr(vcpu, index, xcr)) {
 738                 kvm_inject_gp(vcpu, 0);
 739                 return 1;
 740         }
 741         return 0;
 742 }
 743 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 744
 745 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 746 {
 747         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 748         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 749                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 750
 751         if (cr4 & CR4_RESERVED_BITS)
 752                 return 1;
 753
 754         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 755                 return 1;
 756
 757         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 758                 return 1;
 759
 760         if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
 761                 return 1;
 762
 763         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 764                 return 1;
 765
 766         if (!guest_cpuid_has_pku(vcpu) && (cr4 & X86_CR4_PKE))
 767                 return 1;
 768
 769         if (is_long_mode(vcpu)) {
 770                 if (!(cr4 & X86_CR4_PAE))
 771                         return 1;
 772         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 773                    && ((cr4 ^ old_cr4) & pdptr_bits)
 774                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 775                                    kvm_read_cr3(vcpu)))
 776                 return 1;
 777
 778         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 779                 if (!guest_cpuid_has_pcid(vcpu))
 780                         return 1;
 781
 782                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 783                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 784                         return 1;
 785         }
 786
 787         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 788                 return 1;
 789
 790         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 791             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 792                 kvm_mmu_reset_context(vcpu);
 793
 794         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 795                 kvm_update_cpuid(vcpu);
 796
 797         return 0;
 798 }
 799 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 800
 801 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 802 {
 803 #ifdef CONFIG_X86_64
 804         cr3 &= ~CR3_PCID_INVD;
 805 #endif
 806
 807         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 808                 kvm_mmu_sync_roots(vcpu);
 809                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 810                 return 0;
 811         }
 812
 813         if (is_long_mode(vcpu)) {
 814                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 815                         return 1;
 816         } else if (is_pae(vcpu) && is_paging(vcpu) &&
 817                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 818                 return 1;
 819
 820         vcpu->arch.cr3 = cr3;
 821         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 822         kvm_mmu_new_cr3(vcpu);
 823         return 0;
 824 }
 825 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 826
 827 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 828 {
 829         if (cr8 & CR8_RESERVED_BITS)
 830                 return 1;
 831         if (lapic_in_kernel(vcpu))
 832                 kvm_lapic_set_tpr(vcpu, cr8);
 833         else
 834                 vcpu->arch.cr8 = cr8;
 835         return 0;
 836 }
 837 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 838
 839 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 840 {
 841         if (lapic_in_kernel(vcpu))
 842                 return kvm_lapic_get_cr8(vcpu);
 843         else
 844                 return vcpu->arch.cr8;
 845 }
 846 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 847
 848 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 849 {
 850         int i;
 851
 852         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 853                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 854                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 855                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 856         }
 857 }
 858
 859 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 860 {
 861         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 862                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 863 }
 864
 865 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 866 {
 867         unsigned long dr7;
 868
 869         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 870                 dr7 = vcpu->arch.guest_debug_dr7;
 871         else
 872                 dr7 = vcpu->arch.dr7;
 873         kvm_x86_ops->set_dr7(vcpu, dr7);
 874         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 875         if (dr7 & DR7_BP_EN_MASK)
 876                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 877 }
 878
 879 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 880 {
 881         u64 fixed = DR6_FIXED_1;
 882
 883         if (!guest_cpuid_has_rtm(vcpu))
 884                 fixed |= DR6_RTM;
 885         return fixed;
 886 }
 887
 888 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 889 {
 890         switch (dr) {
 891         case 0 ... 3:
 892                 vcpu->arch.db[dr] = val;
 893                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 894                         vcpu->arch.eff_db[dr] = val;
 895                 break;
 896         case 4:
 897                 /* fall through */
 898         case 6:
 899                 if (val & 0xffffffff00000000ULL)
 900                         return -1; /* #GP */
 901                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 902                 kvm_update_dr6(vcpu);
 903                 break;
 904         case 5:
 905                 /* fall through */
 906         default: /* 7 */
 907                 if (val & 0xffffffff00000000ULL)
 908                         return -1; /* #GP */
 909                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 910                 kvm_update_dr7(vcpu);
 911                 break;
 912         }
 913
 914         return 0;
 915 }
 916
 917 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 918 {
 919         if (__kvm_set_dr(vcpu, dr, val)) {
 920                 kvm_inject_gp(vcpu, 0);
 921                 return 1;
 922         }
 923         return 0;
 924 }
 925 EXPORT_SYMBOL_GPL(kvm_set_dr);
 926
 927 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 928 {
 929         switch (dr) {
 930         case 0 ... 3:
 931                 *val = vcpu->arch.db[dr];
 932                 break;
 933         case 4:
 934                 /* fall through */
 935         case 6:
 936                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 937                         *val = vcpu->arch.dr6;
 938                 else
 939                         *val = kvm_x86_ops->get_dr6(vcpu);
 940                 break;
 941         case 5:
 942                 /* fall through */
 943         default: /* 7 */
 944                 *val = vcpu->arch.dr7;
 945                 break;
 946         }
 947         return 0;
 948 }
 949 EXPORT_SYMBOL_GPL(kvm_get_dr);
 950
 951 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 952 {
 953         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 954         u64 data;
 955         int err;
 956
 957         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
 958         if (err)
 959                 return err;
 960         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 961         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 962         return err;
 963 }
 964 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 965
 966 /*
 967  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 968  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 969  *
 970  * This list is modified at module load time to reflect the
 971  * capabilities of the host cpu. This capabilities test skips MSRs that are
 972  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
 973  * may depend on host virtualization features rather than host cpu features.
 974  */
 975
 976 static u32 msrs_to_save[] = {
 977         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 978         MSR_STAR,
 979 #ifdef CONFIG_X86_64
 980         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 981 #endif
 982         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 983         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
 984 };
 985
 986 static unsigned num_msrs_to_save;
 987
 988 static u32 emulated_msrs[] = {
 989         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 990         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 991         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 992         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
 993         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
 994         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
 995         HV_X64_MSR_RESET,
 996         HV_X64_MSR_VP_INDEX,
 997         HV_X64_MSR_VP_RUNTIME,
 998         HV_X64_MSR_SCONTROL,
 999         HV_X64_MSR_STIMER0_CONFIG,
1000         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1001         MSR_KVM_PV_EOI_EN,
1002
1003         MSR_IA32_TSC_ADJUST,
1004         MSR_IA32_TSCDEADLINE,
1005         MSR_IA32_MISC_ENABLE,
1006         MSR_IA32_MCG_STATUS,
1007         MSR_IA32_MCG_CTL,
1008         MSR_IA32_MCG_EXT_CTL,
1009         MSR_IA32_SMBASE,
1010         MSR_PLATFORM_INFO,
1011         MSR_MISC_FEATURES_ENABLES,
1012 };
1013
1014 static unsigned num_emulated_msrs;
1015
1016 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1017 {
1018         if (efer & efer_reserved_bits)
1019                 return false;
1020
1021         if (efer & EFER_FFXSR) {
1022                 struct kvm_cpuid_entry2 *feat;
1023
1024                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
1025                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
1026                         return false;
1027         }
1028
1029         if (efer & EFER_SVME) {
1030                 struct kvm_cpuid_entry2 *feat;
1031
1032                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
1033                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
1034                         return false;
1035         }
1036
1037         return true;
1038 }
1039 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1040
1041 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1042 {
1043         u64 old_efer = vcpu->arch.efer;
1044
1045         if (!kvm_valid_efer(vcpu, efer))
1046                 return 1;
1047
1048         if (is_paging(vcpu)
1049             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1050                 return 1;
1051
1052         efer &= ~EFER_LMA;
1053         efer |= vcpu->arch.efer & EFER_LMA;
1054
1055         kvm_x86_ops->set_efer(vcpu, efer);
1056
1057         /* Update reserved bits */
1058         if ((efer ^ old_efer) & EFER_NX)
1059                 kvm_mmu_reset_context(vcpu);
1060
1061         return 0;
1062 }
1063
1064 void kvm_enable_efer_bits(u64 mask)
1065 {
1066        efer_reserved_bits &= ~mask;
1067 }
1068 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1069
1070 /*
1071  * Writes msr value into into the appropriate "register".
1072  * Returns 0 on success, non-0 otherwise.
1073  * Assumes vcpu_load() was already called.
1074  */
1075 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1076 {
1077         switch (msr->index) {
1078         case MSR_FS_BASE:
1079         case MSR_GS_BASE:
1080         case MSR_KERNEL_GS_BASE:
1081         case MSR_CSTAR:
1082         case MSR_LSTAR:
1083                 if (is_noncanonical_address(msr->data))
1084                         return 1;
1085                 break;
1086         case MSR_IA32_SYSENTER_EIP:
1087         case MSR_IA32_SYSENTER_ESP:
1088                 /*
1089                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1090                  * non-canonical address is written on Intel but not on
1091                  * AMD (which ignores the top 32-bits, because it does
1092                  * not implement 64-bit SYSENTER).
1093                  *
1094                  * 64-bit code should hence be able to write a non-canonical
1095                  * value on AMD.  Making the address canonical ensures that
1096                  * vmentry does not fail on Intel after writing a non-canonical
1097                  * value, and that something deterministic happens if the guest
1098                  * invokes 64-bit SYSENTER.
1099                  */
1100                 msr->data = get_canonical(msr->data);
1101         }
1102         return kvm_x86_ops->set_msr(vcpu, msr);
1103 }
1104 EXPORT_SYMBOL_GPL(kvm_set_msr);
1105
1106 /*
1107  * Adapt set_msr() to msr_io()'s calling convention
1108  */
1109 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1110 {
1111         struct msr_data msr;
1112         int r;
1113
1114         msr.index = index;
1115         msr.host_initiated = true;
1116         r = kvm_get_msr(vcpu, &msr);
1117         if (r)
1118                 return r;
1119
1120         *data = msr.data;
1121         return 0;
1122 }
1123
1124 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1125 {
1126         struct msr_data msr;
1127
1128         msr.data = *data;
1129         msr.index = index;
1130         msr.host_initiated = true;
1131         return kvm_set_msr(vcpu, &msr);
1132 }
1133
1134 #ifdef CONFIG_X86_64
1135 struct pvclock_gtod_data {
1136         seqcount_t      seq;
1137
1138         struct { /* extract of a clocksource struct */
1139                 int vclock_mode;
1140                 u64     cycle_last;
1141                 u64     mask;
1142                 u32     mult;
1143                 u32     shift;
1144         } clock;
1145
1146         u64             boot_ns;
1147         u64             nsec_base;
1148         u64             wall_time_sec;
1149 };
1150
1151 static struct pvclock_gtod_data pvclock_gtod_data;
1152
1153 static void update_pvclock_gtod(struct timekeeper *tk)
1154 {
1155         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1156         u64 boot_ns;
1157
1158         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1159
1160         write_seqcount_begin(&vdata->seq);
1161
1162         /* copy pvclock gtod data */
1163         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1164         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1165         vdata->clock.mask               = tk->tkr_mono.mask;
1166         vdata->clock.mult               = tk->tkr_mono.mult;
1167         vdata->clock.shift              = tk->tkr_mono.shift;
1168
1169         vdata->boot_ns                  = boot_ns;
1170         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1171
1172         vdata->wall_time_sec            = tk->xtime_sec;
1173
1174         write_seqcount_end(&vdata->seq);
1175 }
1176 #endif
1177
1178 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1179 {
1180         /*
1181          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1182          * vcpu_enter_guest.  This function is only called from
1183          * the physical CPU that is running vcpu.
1184          */
1185         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1186 }
1187
1188 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1189 {
1190         int version;
1191         int r;
1192         struct pvclock_wall_clock wc;
1193         struct timespec64 boot;
1194
1195         if (!wall_clock)
1196                 return;
1197
1198         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1199         if (r)
1200                 return;
1201
1202         if (version & 1)
1203                 ++version;  /* first time write, random junk */
1204
1205         ++version;
1206
1207         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1208                 return;
1209
1210         /*
1211          * The guest calculates current wall clock time by adding
1212          * system time (updated by kvm_guest_time_update below) to the
1213          * wall clock specified here.  guest system time equals host
1214          * system time for us, thus we must fill in host boot time here.
1215          */
1216         getboottime64(&boot);
1217
1218         if (kvm->arch.kvmclock_offset) {
1219                 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1220                 boot = timespec64_sub(boot, ts);
1221         }
1222         wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1223         wc.nsec = boot.tv_nsec;
1224         wc.version = version;
1225
1226         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1227
1228         version++;
1229         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1230 }
1231
1232 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1233 {
1234         do_shl32_div32(dividend, divisor);
1235         return dividend;
1236 }
1237
1238 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1239                                s8 *pshift, u32 *pmultiplier)
1240 {
1241         uint64_t scaled64;
1242         int32_t  shift = 0;
1243         uint64_t tps64;
1244         uint32_t tps32;
1245
1246         tps64 = base_hz;
1247         scaled64 = scaled_hz;
1248         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1249                 tps64 >>= 1;
1250                 shift--;
1251         }
1252
1253         tps32 = (uint32_t)tps64;
1254         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1255                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1256                         scaled64 >>= 1;
1257                 else
1258                         tps32 <<= 1;
1259                 shift++;
1260         }
1261
1262         *pshift = shift;
1263         *pmultiplier = div_frac(scaled64, tps32);
1264
1265         pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1266                  __func__, base_hz, scaled_hz, shift, *pmultiplier);
1267 }
1268
1269 #ifdef CONFIG_X86_64
1270 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1271 #endif
1272
1273 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1274 static unsigned long max_tsc_khz;
1275
1276 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1277 {
1278         u64 v = (u64)khz * (1000000 + ppm);
1279         do_div(v, 1000000);
1280         return v;
1281 }
1282
1283 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1284 {
1285         u64 ratio;
1286
1287         /* Guest TSC same frequency as host TSC? */
1288         if (!scale) {
1289                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1290                 return 0;
1291         }
1292
1293         /* TSC scaling supported? */
1294         if (!kvm_has_tsc_control) {
1295                 if (user_tsc_khz > tsc_khz) {
1296                         vcpu->arch.tsc_catchup = 1;
1297                         vcpu->arch.tsc_always_catchup = 1;
1298                         return 0;
1299                 } else {
1300                         WARN(1, "user requested TSC rate below hardware speed\n");
1301                         return -1;
1302                 }
1303         }
1304
1305         /* TSC scaling required  - calculate ratio */
1306         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1307                                 user_tsc_khz, tsc_khz);
1308
1309         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1310                 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1311                           user_tsc_khz);
1312                 return -1;
1313         }
1314
1315         vcpu->arch.tsc_scaling_ratio = ratio;
1316         return 0;
1317 }
1318
1319 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1320 {
1321         u32 thresh_lo, thresh_hi;
1322         int use_scaling = 0;
1323
1324         /* tsc_khz can be zero if TSC calibration fails */
1325         if (user_tsc_khz == 0) {
1326                 /* set tsc_scaling_ratio to a safe value */
1327                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1328                 return -1;
1329         }
1330
1331         /* Compute a scale to convert nanoseconds in TSC cycles */
1332         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1333                            &vcpu->arch.virtual_tsc_shift,
1334                            &vcpu->arch.virtual_tsc_mult);
1335         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1336
1337         /*
1338          * Compute the variation in TSC rate which is acceptable
1339          * within the range of tolerance and decide if the
1340          * rate being applied is within that bounds of the hardware
1341          * rate.  If so, no scaling or compensation need be done.
1342          */
1343         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1344         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1345         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1346                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1347                 use_scaling = 1;
1348         }
1349         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1350 }
1351
1352 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1353 {
1354         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1355                                       vcpu->arch.virtual_tsc_mult,
1356                                       vcpu->arch.virtual_tsc_shift);
1357         tsc += vcpu->arch.this_tsc_write;
1358         return tsc;
1359 }
1360
1361 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1362 {
1363 #ifdef CONFIG_X86_64
1364         bool vcpus_matched;
1365         struct kvm_arch *ka = &vcpu->kvm->arch;
1366         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1367
1368         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1369                          atomic_read(&vcpu->kvm->online_vcpus));
1370
1371         /*
1372          * Once the masterclock is enabled, always perform request in
1373          * order to update it.
1374          *
1375          * In order to enable masterclock, the host clocksource must be TSC
1376          * and the vcpus need to have matched TSCs.  When that happens,
1377          * perform request to enable masterclock.
1378          */
1379         if (ka->use_master_clock ||
1380             (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1381                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1382
1383         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1384                             atomic_read(&vcpu->kvm->online_vcpus),
1385                             ka->use_master_clock, gtod->clock.vclock_mode);
1386 #endif
1387 }
1388
1389 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1390 {
1391         u64 curr_offset = vcpu->arch.tsc_offset;
1392         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1393 }
1394
1395 /*
1396  * Multiply tsc by a fixed point number represented by ratio.
1397  *
1398  * The most significant 64-N bits (mult) of ratio represent the
1399  * integral part of the fixed point number; the remaining N bits
1400  * (frac) represent the fractional part, ie. ratio represents a fixed
1401  * point number (mult + frac * 2^(-N)).
1402  *
1403  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1404  */
1405 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1406 {
1407         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1408 }
1409
1410 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1411 {
1412         u64 _tsc = tsc;
1413         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1414
1415         if (ratio != kvm_default_tsc_scaling_ratio)
1416                 _tsc = __scale_tsc(ratio, tsc);
1417
1418         return _tsc;
1419 }
1420 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1421
1422 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1423 {
1424         u64 tsc;
1425
1426         tsc = kvm_scale_tsc(vcpu, rdtsc());
1427
1428         return target_tsc - tsc;
1429 }
1430
1431 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1432 {
1433         return vcpu->arch.tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
1434 }
1435 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1436
1437 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
1438 {
1439         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1440         vcpu->arch.tsc_offset = offset;
1441 }
1442
1443 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1444 {
1445         struct kvm *kvm = vcpu->kvm;
1446         u64 offset, ns, elapsed;
1447         unsigned long flags;
1448         bool matched;
1449         bool already_matched;
1450         u64 data = msr->data;
1451         bool synchronizing = false;
1452
1453         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1454         offset = kvm_compute_tsc_offset(vcpu, data);
1455         ns = ktime_get_boot_ns();
1456         elapsed = ns - kvm->arch.last_tsc_nsec;
1457
1458         if (vcpu->arch.virtual_tsc_khz) {
1459                 if (data == 0 && msr->host_initiated) {
1460                         /*
1461                          * detection of vcpu initialization -- need to sync
1462                          * with other vCPUs. This particularly helps to keep
1463                          * kvm_clock stable after CPU hotplug
1464                          */
1465                         synchronizing = true;
1466                 } else {
1467                         u64 tsc_exp = kvm->arch.last_tsc_write +
1468                                                 nsec_to_cycles(vcpu, elapsed);
1469                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
1470                         /*
1471                          * Special case: TSC write with a small delta (1 second)
1472                          * of virtual cycle time against real time is
1473                          * interpreted as an attempt to synchronize the CPU.
1474                          */
1475                         synchronizing = data < tsc_exp + tsc_hz &&
1476                                         data + tsc_hz > tsc_exp;
1477                 }
1478         }
1479
1480         /*
1481          * For a reliable TSC, we can match TSC offsets, and for an unstable
1482          * TSC, we add elapsed time in this computation.  We could let the
1483          * compensation code attempt to catch up if we fall behind, but
1484          * it's better to try to match offsets from the beginning.
1485          */
1486         if (synchronizing &&
1487             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1488                 if (!check_tsc_unstable()) {
1489                         offset = kvm->arch.cur_tsc_offset;
1490                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1491                 } else {
1492                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1493                         data += delta;
1494                         offset = kvm_compute_tsc_offset(vcpu, data);
1495                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1496                 }
1497                 matched = true;
1498                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1499         } else {
1500                 /*
1501                  * We split periods of matched TSC writes into generations.
1502                  * For each generation, we track the original measured
1503                  * nanosecond time, offset, and write, so if TSCs are in
1504                  * sync, we can match exact offset, and if not, we can match
1505                  * exact software computation in compute_guest_tsc()
1506                  *
1507                  * These values are tracked in kvm->arch.cur_xxx variables.
1508                  */
1509                 kvm->arch.cur_tsc_generation++;
1510                 kvm->arch.cur_tsc_nsec = ns;
1511                 kvm->arch.cur_tsc_write = data;
1512                 kvm->arch.cur_tsc_offset = offset;
1513                 matched = false;
1514                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1515                          kvm->arch.cur_tsc_generation, data);
1516         }
1517
1518         /*
1519          * We also track th most recent recorded KHZ, write and time to
1520          * allow the matching interval to be extended at each write.
1521          */
1522         kvm->arch.last_tsc_nsec = ns;
1523         kvm->arch.last_tsc_write = data;
1524         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1525
1526         vcpu->arch.last_guest_tsc = data;
1527
1528         /* Keep track of which generation this VCPU has synchronized to */
1529         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1530         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1531         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1532
1533         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1534                 update_ia32_tsc_adjust_msr(vcpu, offset);
1535         kvm_vcpu_write_tsc_offset(vcpu, offset);
1536         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1537
1538         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1539         if (!matched) {
1540                 kvm->arch.nr_vcpus_matched_tsc = 0;
1541         } else if (!already_matched) {
1542                 kvm->arch.nr_vcpus_matched_tsc++;
1543         }
1544
1545         kvm_track_tsc_matching(vcpu);
1546         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1547 }
1548
1549 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1550
1551 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1552                                            s64 adjustment)
1553 {
1554         kvm_vcpu_write_tsc_offset(vcpu, vcpu->arch.tsc_offset + adjustment);
1555 }
1556
1557 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1558 {
1559         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1560                 WARN_ON(adjustment < 0);
1561         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1562         adjust_tsc_offset_guest(vcpu, adjustment);
1563 }
1564
1565 #ifdef CONFIG_X86_64
1566
1567 static u64 read_tsc(void)
1568 {
1569         u64 ret = (u64)rdtsc_ordered();
1570         u64 last = pvclock_gtod_data.clock.cycle_last;
1571
1572         if (likely(ret >= last))
1573                 return ret;
1574
1575         /*
1576          * GCC likes to generate cmov here, but this branch is extremely
1577          * predictable (it's just a function of time and the likely is
1578          * very likely) and there's a data dependence, so force GCC
1579          * to generate a branch instead.  I don't barrier() because
1580          * we don't actually need a barrier, and if this function
1581          * ever gets inlined it will generate worse code.
1582          */
1583         asm volatile ("");
1584         return last;
1585 }
1586
1587 static inline u64 vgettsc(u64 *cycle_now)
1588 {
1589         long v;
1590         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1591
1592         *cycle_now = read_tsc();
1593
1594         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1595         return v * gtod->clock.mult;
1596 }
1597
1598 static int do_monotonic_boot(s64 *t, u64 *cycle_now)
1599 {
1600         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1601         unsigned long seq;
1602         int mode;
1603         u64 ns;
1604
1605         do {
1606                 seq = read_seqcount_begin(&gtod->seq);
1607                 mode = gtod->clock.vclock_mode;
1608                 ns = gtod->nsec_base;
1609                 ns += vgettsc(cycle_now);
1610                 ns >>= gtod->clock.shift;
1611                 ns += gtod->boot_ns;
1612         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1613         *t = ns;
1614
1615         return mode;
1616 }
1617
1618 static int do_realtime(struct timespec *ts, u64 *cycle_now)
1619 {
1620         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1621         unsigned long seq;
1622         int mode;
1623         u64 ns;
1624
1625         do {
1626                 seq = read_seqcount_begin(&gtod->seq);
1627                 mode = gtod->clock.vclock_mode;
1628                 ts->tv_sec = gtod->wall_time_sec;
1629                 ns = gtod->nsec_base;
1630                 ns += vgettsc(cycle_now);
1631                 ns >>= gtod->clock.shift;
1632         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1633
1634         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
1635         ts->tv_nsec = ns;
1636
1637         return mode;
1638 }
1639
1640 /* returns true if host is using tsc clocksource */
1641 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *cycle_now)
1642 {
1643         /* checked again under seqlock below */
1644         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1645                 return false;
1646
1647         return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1648 }
1649
1650 /* returns true if host is using tsc clocksource */
1651 static bool kvm_get_walltime_and_clockread(struct timespec *ts,
1652                                            u64 *cycle_now)
1653 {
1654         /* checked again under seqlock below */
1655         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1656                 return false;
1657
1658         return do_realtime(ts, cycle_now) == VCLOCK_TSC;
1659 }
1660 #endif
1661
1662 /*
1663  *
1664  * Assuming a stable TSC across physical CPUS, and a stable TSC
1665  * across virtual CPUs, the following condition is possible.
1666  * Each numbered line represents an event visible to both
1667  * CPUs at the next numbered event.
1668  *
1669  * "timespecX" represents host monotonic time. "tscX" represents
1670  * RDTSC value.
1671  *
1672  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1673  *
1674  * 1.  read timespec0,tsc0
1675  * 2.                                   | timespec1 = timespec0 + N
1676  *                                      | tsc1 = tsc0 + M
1677  * 3. transition to guest               | transition to guest
1678  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1679  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1680  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1681  *
1682  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1683  *
1684  *      - ret0 < ret1
1685  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1686  *              ...
1687  *      - 0 < N - M => M < N
1688  *
1689  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1690  * always the case (the difference between two distinct xtime instances
1691  * might be smaller then the difference between corresponding TSC reads,
1692  * when updating guest vcpus pvclock areas).
1693  *
1694  * To avoid that problem, do not allow visibility of distinct
1695  * system_timestamp/tsc_timestamp values simultaneously: use a master
1696  * copy of host monotonic time values. Update that master copy
1697  * in lockstep.
1698  *
1699  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1700  *
1701  */
1702
1703 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1704 {
1705 #ifdef CONFIG_X86_64
1706         struct kvm_arch *ka = &kvm->arch;
1707         int vclock_mode;
1708         bool host_tsc_clocksource, vcpus_matched;
1709
1710         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1711                         atomic_read(&kvm->online_vcpus));
1712
1713         /*
1714          * If the host uses TSC clock, then passthrough TSC as stable
1715          * to the guest.
1716          */
1717         host_tsc_clocksource = kvm_get_time_and_clockread(
1718                                         &ka->master_kernel_ns,
1719                                         &ka->master_cycle_now);
1720
1721         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1722                                 && !backwards_tsc_observed
1723                                 && !ka->boot_vcpu_runs_old_kvmclock;
1724
1725         if (ka->use_master_clock)
1726                 atomic_set(&kvm_guest_has_master_clock, 1);
1727
1728         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1729         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1730                                         vcpus_matched);
1731 #endif
1732 }
1733
1734 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
1735 {
1736         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
1737 }
1738
1739 static void kvm_gen_update_masterclock(struct kvm *kvm)
1740 {
1741 #ifdef CONFIG_X86_64
1742         int i;
1743         struct kvm_vcpu *vcpu;
1744         struct kvm_arch *ka = &kvm->arch;
1745
1746         spin_lock(&ka->pvclock_gtod_sync_lock);
1747         kvm_make_mclock_inprogress_request(kvm);
1748         /* no guest entries from this point */
1749         pvclock_update_vm_gtod_copy(kvm);
1750
1751         kvm_for_each_vcpu(i, vcpu, kvm)
1752                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1753
1754         /* guest entries allowed */
1755         kvm_for_each_vcpu(i, vcpu, kvm)
1756                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
1757
1758         spin_unlock(&ka->pvclock_gtod_sync_lock);
1759 #endif
1760 }
1761
1762 u64 get_kvmclock_ns(struct kvm *kvm)
1763 {
1764         struct kvm_arch *ka = &kvm->arch;
1765         struct pvclock_vcpu_time_info hv_clock;
1766         u64 ret;
1767
1768         spin_lock(&ka->pvclock_gtod_sync_lock);
1769         if (!ka->use_master_clock) {
1770                 spin_unlock(&ka->pvclock_gtod_sync_lock);
1771                 return ktime_get_boot_ns() + ka->kvmclock_offset;
1772         }
1773
1774         hv_clock.tsc_timestamp = ka->master_cycle_now;
1775         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
1776         spin_unlock(&ka->pvclock_gtod_sync_lock);
1777
1778         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
1779         get_cpu();
1780
1781         kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
1782                            &hv_clock.tsc_shift,
1783                            &hv_clock.tsc_to_system_mul);
1784         ret = __pvclock_read_cycles(&hv_clock, rdtsc());
1785
1786         put_cpu();
1787
1788         return ret;
1789 }
1790
1791 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
1792 {
1793         struct kvm_vcpu_arch *vcpu = &v->arch;
1794         struct pvclock_vcpu_time_info guest_hv_clock;
1795
1796         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1797                 &guest_hv_clock, sizeof(guest_hv_clock))))
1798                 return;
1799
1800         /* This VCPU is paused, but it's legal for a guest to read another
1801          * VCPU's kvmclock, so we really have to follow the specification where
1802          * it says that version is odd if data is being modified, and even after
1803          * it is consistent.
1804          *
1805          * Version field updates must be kept separate.  This is because
1806          * kvm_write_guest_cached might use a "rep movs" instruction, and
1807          * writes within a string instruction are weakly ordered.  So there
1808          * are three writes overall.
1809          *
1810          * As a small optimization, only write the version field in the first
1811          * and third write.  The vcpu->pv_time cache is still valid, because the
1812          * version field is the first in the struct.
1813          */
1814         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1815
1816         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1817         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1818                                 &vcpu->hv_clock,
1819                                 sizeof(vcpu->hv_clock.version));
1820
1821         smp_wmb();
1822
1823         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1824         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1825
1826         if (vcpu->pvclock_set_guest_stopped_request) {
1827                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
1828                 vcpu->pvclock_set_guest_stopped_request = false;
1829         }
1830
1831         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1832
1833         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1834                                 &vcpu->hv_clock,
1835                                 sizeof(vcpu->hv_clock));
1836
1837         smp_wmb();
1838
1839         vcpu->hv_clock.version++;
1840         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1841                                 &vcpu->hv_clock,
1842                                 sizeof(vcpu->hv_clock.version));
1843 }
1844
1845 static int kvm_guest_time_update(struct kvm_vcpu *v)
1846 {
1847         unsigned long flags, tgt_tsc_khz;
1848         struct kvm_vcpu_arch *vcpu = &v->arch;
1849         struct kvm_arch *ka = &v->kvm->arch;
1850         s64 kernel_ns;
1851         u64 tsc_timestamp, host_tsc;
1852         u8 pvclock_flags;
1853         bool use_master_clock;
1854
1855         kernel_ns = 0;
1856         host_tsc = 0;
1857
1858         /*
1859          * If the host uses TSC clock, then passthrough TSC as stable
1860          * to the guest.
1861          */
1862         spin_lock(&ka->pvclock_gtod_sync_lock);
1863         use_master_clock = ka->use_master_clock;
1864         if (use_master_clock) {
1865                 host_tsc = ka->master_cycle_now;
1866                 kernel_ns = ka->master_kernel_ns;
1867         }
1868         spin_unlock(&ka->pvclock_gtod_sync_lock);
1869
1870         /* Keep irq disabled to prevent changes to the clock */
1871         local_irq_save(flags);
1872         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1873         if (unlikely(tgt_tsc_khz == 0)) {
1874                 local_irq_restore(flags);
1875                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1876                 return 1;
1877         }
1878         if (!use_master_clock) {
1879                 host_tsc = rdtsc();
1880                 kernel_ns = ktime_get_boot_ns();
1881         }
1882
1883         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
1884
1885         /*
1886          * We may have to catch up the TSC to match elapsed wall clock
1887          * time for two reasons, even if kvmclock is used.
1888          *   1) CPU could have been running below the maximum TSC rate
1889          *   2) Broken TSC compensation resets the base at each VCPU
1890          *      entry to avoid unknown leaps of TSC even when running
1891          *      again on the same CPU.  This may cause apparent elapsed
1892          *      time to disappear, and the guest to stand still or run
1893          *      very slowly.
1894          */
1895         if (vcpu->tsc_catchup) {
1896                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1897                 if (tsc > tsc_timestamp) {
1898                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1899                         tsc_timestamp = tsc;
1900                 }
1901         }
1902
1903         local_irq_restore(flags);
1904
1905         /* With all the info we got, fill in the values */
1906
1907         if (kvm_has_tsc_control)
1908                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
1909
1910         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
1911                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
1912                                    &vcpu->hv_clock.tsc_shift,
1913                                    &vcpu->hv_clock.tsc_to_system_mul);
1914                 vcpu->hw_tsc_khz = tgt_tsc_khz;
1915         }
1916
1917         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1918         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1919         vcpu->last_guest_tsc = tsc_timestamp;
1920
1921         /* If the host uses TSC clocksource, then it is stable */
1922         pvclock_flags = 0;
1923         if (use_master_clock)
1924                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1925
1926         vcpu->hv_clock.flags = pvclock_flags;
1927
1928         if (vcpu->pv_time_enabled)
1929                 kvm_setup_pvclock_page(v);
1930         if (v == kvm_get_vcpu(v->kvm, 0))
1931                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
1932         return 0;
1933 }
1934
1935 /*
1936  * kvmclock updates which are isolated to a given vcpu, such as
1937  * vcpu->cpu migration, should not allow system_timestamp from
1938  * the rest of the vcpus to remain static. Otherwise ntp frequency
1939  * correction applies to one vcpu's system_timestamp but not
1940  * the others.
1941  *
1942  * So in those cases, request a kvmclock update for all vcpus.
1943  * We need to rate-limit these requests though, as they can
1944  * considerably slow guests that have a large number of vcpus.
1945  * The time for a remote vcpu to update its kvmclock is bound
1946  * by the delay we use to rate-limit the updates.
1947  */
1948
1949 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1950
1951 static void kvmclock_update_fn(struct work_struct *work)
1952 {
1953         int i;
1954         struct delayed_work *dwork = to_delayed_work(work);
1955         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1956                                            kvmclock_update_work);
1957         struct kvm *kvm = container_of(ka, struct kvm, arch);
1958         struct kvm_vcpu *vcpu;
1959
1960         kvm_for_each_vcpu(i, vcpu, kvm) {
1961                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1962                 kvm_vcpu_kick(vcpu);
1963         }
1964 }
1965
1966 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1967 {
1968         struct kvm *kvm = v->kvm;
1969
1970         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1971         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1972                                         KVMCLOCK_UPDATE_DELAY);
1973 }
1974
1975 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1976
1977 static void kvmclock_sync_fn(struct work_struct *work)
1978 {
1979         struct delayed_work *dwork = to_delayed_work(work);
1980         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1981                                            kvmclock_sync_work);
1982         struct kvm *kvm = container_of(ka, struct kvm, arch);
1983
1984         if (!kvmclock_periodic_sync)
1985                 return;
1986
1987         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
1988         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
1989                                         KVMCLOCK_SYNC_PERIOD);
1990 }
1991
1992 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1993 {
1994         u64 mcg_cap = vcpu->arch.mcg_cap;
1995         unsigned bank_num = mcg_cap & 0xff;
1996
1997         switch (msr) {
1998         case MSR_IA32_MCG_STATUS:
1999                 vcpu->arch.mcg_status = data;
2000                 break;
2001         case MSR_IA32_MCG_CTL:
2002                 if (!(mcg_cap & MCG_CTL_P))
2003                         return 1;
2004                 if (data != 0 && data != ~(u64)0)
2005                         return -1;
2006                 vcpu->arch.mcg_ctl = data;
2007                 break;
2008         default:
2009                 if (msr >= MSR_IA32_MC0_CTL &&
2010                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2011                         u32 offset = msr - MSR_IA32_MC0_CTL;
2012                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2013                          * some Linux kernels though clear bit 10 in bank 4 to
2014                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2015                          * this to avoid an uncatched #GP in the guest
2016                          */
2017                         if ((offset & 0x3) == 0 &&
2018                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2019                                 return -1;
2020                         vcpu->arch.mce_banks[offset] = data;
2021                         break;
2022                 }
2023                 return 1;
2024         }
2025         return 0;
2026 }
2027
2028 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2029 {
2030         struct kvm *kvm = vcpu->kvm;
2031         int lm = is_long_mode(vcpu);
2032         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2033                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2034         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2035                 : kvm->arch.xen_hvm_config.blob_size_32;
2036         u32 page_num = data & ~PAGE_MASK;
2037         u64 page_addr = data & PAGE_MASK;
2038         u8 *page;
2039         int r;
2040
2041         r = -E2BIG;
2042         if (page_num >= blob_size)
2043                 goto out;
2044         r = -ENOMEM;
2045         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2046         if (IS_ERR(page)) {
2047                 r = PTR_ERR(page);
2048                 goto out;
2049         }
2050         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2051                 goto out_free;
2052         r = 0;
2053 out_free:
2054         kfree(page);
2055 out:
2056         return r;
2057 }
2058
2059 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2060 {
2061         gpa_t gpa = data & ~0x3f;
2062
2063         /* Bits 2:5 are reserved, Should be zero */
2064         if (data & 0x3c)
2065                 return 1;
2066
2067         vcpu->arch.apf.msr_val = data;
2068
2069         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2070                 kvm_clear_async_pf_completion_queue(vcpu);
2071                 kvm_async_pf_hash_reset(vcpu);
2072                 return 0;
2073         }
2074
2075         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2076                                         sizeof(u32)))
2077                 return 1;
2078
2079         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2080         kvm_async_pf_wakeup_all(vcpu);
2081         return 0;
2082 }
2083
2084 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2085 {
2086         vcpu->arch.pv_time_enabled = false;
2087 }
2088
2089 static void record_steal_time(struct kvm_vcpu *vcpu)
2090 {
2091         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2092                 return;
2093
2094         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2095                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2096                 return;
2097
2098         vcpu->arch.st.steal.preempted = 0;
2099
2100         if (vcpu->arch.st.steal.version & 1)
2101                 vcpu->arch.st.steal.version += 1;  /* first time write, random junk */
2102
2103         vcpu->arch.st.steal.version += 1;
2104
2105         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2106                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2107
2108         smp_wmb();
2109
2110         vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2111                 vcpu->arch.st.last_steal;
2112         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2113
2114         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2115                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2116
2117         smp_wmb();
2118
2119         vcpu->arch.st.steal.version += 1;
2120
2121         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2122                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2123 }
2124
2125 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2126 {
2127         bool pr = false;
2128         u32 msr = msr_info->index;
2129         u64 data = msr_info->data;
2130
2131         switch (msr) {
2132         case MSR_AMD64_NB_CFG:
2133         case MSR_IA32_UCODE_REV:
2134         case MSR_IA32_UCODE_WRITE:
2135         case MSR_VM_HSAVE_PA:
2136         case MSR_AMD64_PATCH_LOADER:
2137         case MSR_AMD64_BU_CFG2:
2138         case MSR_AMD64_DC_CFG:
2139                 break;
2140
2141         case MSR_EFER:
2142                 return set_efer(vcpu, data);
2143         case MSR_K7_HWCR:
2144                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2145                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2146                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2147                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2148                 if (data != 0) {
2149                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2150                                     data);
2151                         return 1;
2152                 }
2153                 break;
2154         case MSR_FAM10H_MMIO_CONF_BASE:
2155                 if (data != 0) {
2156                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2157                                     "0x%llx\n", data);
2158                         return 1;
2159                 }
2160                 break;
2161         case MSR_IA32_DEBUGCTLMSR:
2162                 if (!data) {
2163                         /* We support the non-activated case already */
2164                         break;
2165                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2166                         /* Values other than LBR and BTF are vendor-specific,
2167                            thus reserved and should throw a #GP */
2168                         return 1;
2169                 }
2170                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2171                             __func__, data);
2172                 break;
2173         case 0x200 ... 0x2ff:
2174                 return kvm_mtrr_set_msr(vcpu, msr, data);
2175         case MSR_IA32_APICBASE:
2176                 return kvm_set_apic_base(vcpu, msr_info);
2177         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2178                 return kvm_x2apic_msr_write(vcpu, msr, data);
2179         case MSR_IA32_TSCDEADLINE:
2180                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2181                 break;
2182         case MSR_IA32_TSC_ADJUST:
2183                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2184                         if (!msr_info->host_initiated) {
2185                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2186                                 adjust_tsc_offset_guest(vcpu, adj);
2187                         }
2188                         vcpu->arch.ia32_tsc_adjust_msr = data;
2189                 }
2190                 break;
2191         case MSR_IA32_MISC_ENABLE:
2192                 vcpu->arch.ia32_misc_enable_msr = data;
2193                 break;
2194         case MSR_IA32_SMBASE:
2195                 if (!msr_info->host_initiated)
2196                         return 1;
2197                 vcpu->arch.smbase = data;
2198                 break;
2199         case MSR_KVM_WALL_CLOCK_NEW:
2200         case MSR_KVM_WALL_CLOCK:
2201                 vcpu->kvm->arch.wall_clock = data;
2202                 kvm_write_wall_clock(vcpu->kvm, data);
2203                 break;
2204         case MSR_KVM_SYSTEM_TIME_NEW:
2205         case MSR_KVM_SYSTEM_TIME: {
2206                 struct kvm_arch *ka = &vcpu->kvm->arch;
2207
2208                 kvmclock_reset(vcpu);
2209
2210                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2211                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2212
2213                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2214                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2215
2216                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2217                 }
2218
2219                 vcpu->arch.time = data;
2220                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2221
2222                 /* we verify if the enable bit is set... */
2223                 if (!(data & 1))
2224                         break;
2225
2226                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2227                      &vcpu->arch.pv_time, data & ~1ULL,
2228                      sizeof(struct pvclock_vcpu_time_info)))
2229                         vcpu->arch.pv_time_enabled = false;
2230                 else
2231                         vcpu->arch.pv_time_enabled = true;
2232
2233                 break;
2234         }
2235         case MSR_KVM_ASYNC_PF_EN:
2236                 if (kvm_pv_enable_async_pf(vcpu, data))
2237                         return 1;
2238                 break;
2239         case MSR_KVM_STEAL_TIME:
2240
2241                 if (unlikely(!sched_info_on()))
2242                         return 1;
2243
2244                 if (data & KVM_STEAL_RESERVED_MASK)
2245                         return 1;
2246
2247                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2248                                                 data & KVM_STEAL_VALID_BITS,
2249                                                 sizeof(struct kvm_steal_time)))
2250                         return 1;
2251
2252                 vcpu->arch.st.msr_val = data;
2253
2254                 if (!(data & KVM_MSR_ENABLED))
2255                         break;
2256
2257                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2258
2259                 break;
2260         case MSR_KVM_PV_EOI_EN:
2261                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2262                         return 1;
2263                 break;
2264
2265         case MSR_IA32_MCG_CTL:
2266         case MSR_IA32_MCG_STATUS:
2267         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2268                 return set_msr_mce(vcpu, msr, data);
2269
2270         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2271         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2272                 pr = true; /* fall through */
2273         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2274         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2275                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2276                         return kvm_pmu_set_msr(vcpu, msr_info);
2277
2278                 if (pr || data != 0)
2279                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2280                                     "0x%x data 0x%llx\n", msr, data);
2281                 break;
2282         case MSR_K7_CLK_CTL:
2283                 /*
2284                  * Ignore all writes to this no longer documented MSR.
2285                  * Writes are only relevant for old K7 processors,
2286                  * all pre-dating SVM, but a recommended workaround from
2287                  * AMD for these chips. It is possible to specify the
2288                  * affected processor models on the command line, hence
2289                  * the need to ignore the workaround.
2290                  */
2291                 break;
2292         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2293         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2294         case HV_X64_MSR_CRASH_CTL:
2295         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2296                 return kvm_hv_set_msr_common(vcpu, msr, data,
2297                                              msr_info->host_initiated);
2298         case MSR_IA32_BBL_CR_CTL3:
2299                 /* Drop writes to this legacy MSR -- see rdmsr
2300                  * counterpart for further detail.
2301                  */
2302                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n", msr, data);
2303                 break;
2304         case MSR_AMD64_OSVW_ID_LENGTH:
2305                 if (!guest_cpuid_has_osvw(vcpu))
2306                         return 1;
2307                 vcpu->arch.osvw.length = data;
2308                 break;
2309         case MSR_AMD64_OSVW_STATUS:
2310                 if (!guest_cpuid_has_osvw(vcpu))
2311                         return 1;
2312                 vcpu->arch.osvw.status = data;
2313                 break;
2314         case MSR_PLATFORM_INFO:
2315                 if (!msr_info->host_initiated ||
2316                     data & ~MSR_PLATFORM_INFO_CPUID_FAULT ||
2317                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
2318                      cpuid_fault_enabled(vcpu)))
2319                         return 1;
2320                 vcpu->arch.msr_platform_info = data;
2321                 break;
2322         case MSR_MISC_FEATURES_ENABLES:
2323                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
2324                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
2325                      !supports_cpuid_fault(vcpu)))
2326                         return 1;
2327                 vcpu->arch.msr_misc_features_enables = data;
2328                 break;
2329         default:
2330                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2331                         return xen_hvm_config(vcpu, data);
2332                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2333                         return kvm_pmu_set_msr(vcpu, msr_info);
2334                 if (!ignore_msrs) {
2335                         vcpu_debug_ratelimited(vcpu, "unhandled wrmsr: 0x%x data 0x%llx\n",
2336                                     msr, data);
2337                         return 1;
2338                 } else {
2339                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
2340                                     msr, data);
2341                         break;
2342                 }
2343         }
2344         return 0;
2345 }
2346 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2347
2348
2349 /*
2350  * Reads an msr value (of 'msr_index') into 'pdata'.
2351  * Returns 0 on success, non-0 otherwise.
2352  * Assumes vcpu_load() was already called.
2353  */
2354 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2355 {
2356         return kvm_x86_ops->get_msr(vcpu, msr);
2357 }
2358 EXPORT_SYMBOL_GPL(kvm_get_msr);
2359
2360 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2361 {
2362         u64 data;
2363         u64 mcg_cap = vcpu->arch.mcg_cap;
2364         unsigned bank_num = mcg_cap & 0xff;
2365
2366         switch (msr) {
2367         case MSR_IA32_P5_MC_ADDR:
2368         case MSR_IA32_P5_MC_TYPE:
2369                 data = 0;
2370                 break;
2371         case MSR_IA32_MCG_CAP:
2372                 data = vcpu->arch.mcg_cap;
2373                 break;
2374         case MSR_IA32_MCG_CTL:
2375                 if (!(mcg_cap & MCG_CTL_P))
2376                         return 1;
2377                 data = vcpu->arch.mcg_ctl;
2378                 break;
2379         case MSR_IA32_MCG_STATUS:
2380                 data = vcpu->arch.mcg_status;
2381                 break;
2382         default:
2383                 if (msr >= MSR_IA32_MC0_CTL &&
2384                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2385                         u32 offset = msr - MSR_IA32_MC0_CTL;
2386                         data = vcpu->arch.mce_banks[offset];
2387                         break;
2388                 }
2389                 return 1;
2390         }
2391         *pdata = data;
2392         return 0;
2393 }
2394
2395 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2396 {
2397         switch (msr_info->index) {
2398         case MSR_IA32_PLATFORM_ID:
2399         case MSR_IA32_EBL_CR_POWERON:
2400         case MSR_IA32_DEBUGCTLMSR:
2401         case MSR_IA32_LASTBRANCHFROMIP:
2402         case MSR_IA32_LASTBRANCHTOIP:
2403         case MSR_IA32_LASTINTFROMIP:
2404         case MSR_IA32_LASTINTTOIP:
2405         case MSR_K8_SYSCFG:
2406         case MSR_K8_TSEG_ADDR:
2407         case MSR_K8_TSEG_MASK:
2408         case MSR_K7_HWCR:
2409         case MSR_VM_HSAVE_PA:
2410         case MSR_K8_INT_PENDING_MSG:
2411         case MSR_AMD64_NB_CFG:
2412         case MSR_FAM10H_MMIO_CONF_BASE:
2413         case MSR_AMD64_BU_CFG2:
2414         case MSR_IA32_PERF_CTL:
2415         case MSR_AMD64_DC_CFG:
2416                 msr_info->data = 0;
2417                 break;
2418         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2419         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2420         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2421         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2422                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2423                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2424                 msr_info->data = 0;
2425                 break;
2426         case MSR_IA32_UCODE_REV:
2427                 msr_info->data = 0x100000000ULL;
2428                 break;
2429         case MSR_MTRRcap:
2430         case 0x200 ... 0x2ff:
2431                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2432         case 0xcd: /* fsb frequency */
2433                 msr_info->data = 3;
2434                 break;
2435                 /*
2436                  * MSR_EBC_FREQUENCY_ID
2437                  * Conservative value valid for even the basic CPU models.
2438                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2439                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2440                  * and 266MHz for model 3, or 4. Set Core Clock
2441                  * Frequency to System Bus Frequency Ratio to 1 (bits
2442                  * 31:24) even though these are only valid for CPU
2443                  * models > 2, however guests may end up dividing or
2444                  * multiplying by zero otherwise.
2445                  */
2446         case MSR_EBC_FREQUENCY_ID:
2447                 msr_info->data = 1 << 24;
2448                 break;
2449         case MSR_IA32_APICBASE:
2450                 msr_info->data = kvm_get_apic_base(vcpu);
2451                 break;
2452         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2453                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2454                 break;
2455         case MSR_IA32_TSCDEADLINE:
2456                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2457                 break;
2458         case MSR_IA32_TSC_ADJUST:
2459                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2460                 break;
2461         case MSR_IA32_MISC_ENABLE:
2462                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2463                 break;
2464         case MSR_IA32_SMBASE:
2465                 if (!msr_info->host_initiated)
2466                         return 1;
2467                 msr_info->data = vcpu->arch.smbase;
2468                 break;
2469         case MSR_IA32_PERF_STATUS:
2470                 /* TSC increment by tick */
2471                 msr_info->data = 1000ULL;
2472                 /* CPU multiplier */
2473                 msr_info->data |= (((uint64_t)4ULL) << 40);
2474                 break;
2475         case MSR_EFER:
2476                 msr_info->data = vcpu->arch.efer;
2477                 break;
2478         case MSR_KVM_WALL_CLOCK:
2479         case MSR_KVM_WALL_CLOCK_NEW:
2480                 msr_info->data = vcpu->kvm->arch.wall_clock;
2481                 break;
2482         case MSR_KVM_SYSTEM_TIME:
2483         case MSR_KVM_SYSTEM_TIME_NEW:
2484                 msr_info->data = vcpu->arch.time;
2485                 break;
2486         case MSR_KVM_ASYNC_PF_EN:
2487                 msr_info->data = vcpu->arch.apf.msr_val;
2488                 break;
2489         case MSR_KVM_STEAL_TIME:
2490                 msr_info->data = vcpu->arch.st.msr_val;
2491                 break;
2492         case MSR_KVM_PV_EOI_EN:
2493                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2494                 break;
2495         case MSR_IA32_P5_MC_ADDR:
2496         case MSR_IA32_P5_MC_TYPE:
2497         case MSR_IA32_MCG_CAP:
2498         case MSR_IA32_MCG_CTL:
2499         case MSR_IA32_MCG_STATUS:
2500         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2501                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2502         case MSR_K7_CLK_CTL:
2503                 /*
2504                  * Provide expected ramp-up count for K7. All other
2505                  * are set to zero, indicating minimum divisors for
2506                  * every field.
2507                  *
2508                  * This prevents guest kernels on AMD host with CPU
2509                  * type 6, model 8 and higher from exploding due to
2510                  * the rdmsr failing.
2511                  */
2512                 msr_info->data = 0x20000000;
2513                 break;
2514         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2515         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2516         case HV_X64_MSR_CRASH_CTL:
2517         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2518                 return kvm_hv_get_msr_common(vcpu,
2519                                              msr_info->index, &msr_info->data);
2520                 break;
2521         case MSR_IA32_BBL_CR_CTL3:
2522                 /* This legacy MSR exists but isn't fully documented in current
2523                  * silicon.  It is however accessed by winxp in very narrow
2524                  * scenarios where it sets bit #19, itself documented as
2525                  * a "reserved" bit.  Best effort attempt to source coherent
2526                  * read data here should the balance of the register be
2527                  * interpreted by the guest:
2528                  *
2529                  * L2 cache control register 3: 64GB range, 256KB size,
2530                  * enabled, latency 0x1, configured
2531                  */
2532                 msr_info->data = 0xbe702111;
2533                 break;
2534         case MSR_AMD64_OSVW_ID_LENGTH:
2535                 if (!guest_cpuid_has_osvw(vcpu))
2536                         return 1;
2537                 msr_info->data = vcpu->arch.osvw.length;
2538                 break;
2539         case MSR_AMD64_OSVW_STATUS:
2540                 if (!guest_cpuid_has_osvw(vcpu))
2541                         return 1;
2542                 msr_info->data = vcpu->arch.osvw.status;
2543                 break;
2544         case MSR_PLATFORM_INFO:
2545                 msr_info->data = vcpu->arch.msr_platform_info;
2546                 break;
2547         case MSR_MISC_FEATURES_ENABLES:
2548                 msr_info->data = vcpu->arch.msr_misc_features_enables;
2549                 break;
2550         default:
2551                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2552                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2553                 if (!ignore_msrs) {
2554                         vcpu_debug_ratelimited(vcpu, "unhandled rdmsr: 0x%x\n",
2555                                                msr_info->index);
2556                         return 1;
2557                 } else {
2558                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);
2559                         msr_info->data = 0;
2560                 }
2561                 break;
2562         }
2563         return 0;
2564 }
2565 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2566
2567 /*
2568  * Read or write a bunch of msrs. All parameters are kernel addresses.
2569  *
2570  * @return number of msrs set successfully.
2571  */
2572 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2573                     struct kvm_msr_entry *entries,
2574                     int (*do_msr)(struct kvm_vcpu *vcpu,
2575                                   unsigned index, u64 *data))
2576 {
2577         int i, idx;
2578
2579         idx = srcu_read_lock(&vcpu->kvm->srcu);
2580         for (i = 0; i < msrs->nmsrs; ++i)
2581                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2582                         break;
2583         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2584
2585         return i;
2586 }
2587
2588 /*
2589  * Read or write a bunch of msrs. Parameters are user addresses.
2590  *
2591  * @return number of msrs set successfully.
2592  */
2593 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2594                   int (*do_msr)(struct kvm_vcpu *vcpu,
2595                                 unsigned index, u64 *data),
2596                   int writeback)
2597 {
2598         struct kvm_msrs msrs;
2599         struct kvm_msr_entry *entries;
2600         int r, n;
2601         unsigned size;
2602
2603         r = -EFAULT;
2604         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2605                 goto out;
2606
2607         r = -E2BIG;
2608         if (msrs.nmsrs >= MAX_IO_MSRS)
2609                 goto out;
2610
2611         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2612         entries = memdup_user(user_msrs->entries, size);
2613         if (IS_ERR(entries)) {
2614                 r = PTR_ERR(entries);
2615                 goto out;
2616         }
2617
2618         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2619         if (r < 0)
2620                 goto out_free;
2621
2622         r = -EFAULT;
2623         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2624                 goto out_free;
2625
2626         r = n;
2627
2628 out_free:
2629         kfree(entries);
2630 out:
2631         return r;
2632 }
2633
2634 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2635 {
2636         int r;
2637
2638         switch (ext) {
2639         case KVM_CAP_IRQCHIP:
2640         case KVM_CAP_HLT:
2641         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2642         case KVM_CAP_SET_TSS_ADDR:
2643         case KVM_CAP_EXT_CPUID:
2644         case KVM_CAP_EXT_EMUL_CPUID:
2645         case KVM_CAP_CLOCKSOURCE:
2646         case KVM_CAP_PIT:
2647         case KVM_CAP_NOP_IO_DELAY:
2648         case KVM_CAP_MP_STATE:
2649         case KVM_CAP_SYNC_MMU:
2650         case KVM_CAP_USER_NMI:
2651         case KVM_CAP_REINJECT_CONTROL:
2652         case KVM_CAP_IRQ_INJECT_STATUS:
2653         case KVM_CAP_IOEVENTFD:
2654         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2655         case KVM_CAP_PIT2:
2656         case KVM_CAP_PIT_STATE2:
2657         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2658         case KVM_CAP_XEN_HVM:
2659         case KVM_CAP_VCPU_EVENTS:
2660         case KVM_CAP_HYPERV:
2661         case KVM_CAP_HYPERV_VAPIC:
2662         case KVM_CAP_HYPERV_SPIN:
2663         case KVM_CAP_HYPERV_SYNIC:
2664         case KVM_CAP_PCI_SEGMENT:
2665         case KVM_CAP_DEBUGREGS:
2666         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2667         case KVM_CAP_XSAVE:
2668         case KVM_CAP_ASYNC_PF:
2669         case KVM_CAP_GET_TSC_KHZ:
2670         case KVM_CAP_KVMCLOCK_CTRL:
2671         case KVM_CAP_READONLY_MEM:
2672         case KVM_CAP_HYPERV_TIME:
2673         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2674         case KVM_CAP_TSC_DEADLINE_TIMER:
2675         case KVM_CAP_ENABLE_CAP_VM:
2676         case KVM_CAP_DISABLE_QUIRKS:
2677         case KVM_CAP_SET_BOOT_CPU_ID:
2678         case KVM_CAP_SPLIT_IRQCHIP:
2679         case KVM_CAP_IMMEDIATE_EXIT:
2680                 r = 1;
2681                 break;
2682         case KVM_CAP_ADJUST_CLOCK:
2683                 r = KVM_CLOCK_TSC_STABLE;
2684                 break;
2685         case KVM_CAP_X86_GUEST_MWAIT:
2686                 r = kvm_mwait_in_guest();
2687                 break;
2688         case KVM_CAP_X86_SMM:
2689                 /* SMBASE is usually relocated above 1M on modern chipsets,
2690                  * and SMM handlers might indeed rely on 4G segment limits,
2691                  * so do not report SMM to be available if real mode is
2692                  * emulated via vm86 mode.  Still, do not go to great lengths
2693                  * to avoid userspace's usage of the feature, because it is a
2694                  * fringe case that is not enabled except via specific settings
2695                  * of the module parameters.
2696                  */
2697                 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2698                 break;
2699         case KVM_CAP_VAPIC:
2700                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2701                 break;
2702         case KVM_CAP_NR_VCPUS:
2703                 r = KVM_SOFT_MAX_VCPUS;
2704                 break;
2705         case KVM_CAP_MAX_VCPUS:
2706                 r = KVM_MAX_VCPUS;
2707                 break;
2708         case KVM_CAP_NR_MEMSLOTS:
2709                 r = KVM_USER_MEM_SLOTS;
2710                 break;
2711         case KVM_CAP_PV_MMU:    /* obsolete */
2712                 r = 0;
2713                 break;
2714         case KVM_CAP_MCE:
2715                 r = KVM_MAX_MCE_BANKS;
2716                 break;
2717         case KVM_CAP_XCRS:
2718                 r = boot_cpu_has(X86_FEATURE_XSAVE);
2719                 break;
2720         case KVM_CAP_TSC_CONTROL:
2721                 r = kvm_has_tsc_control;
2722                 break;
2723         case KVM_CAP_X2APIC_API:
2724                 r = KVM_X2APIC_API_VALID_FLAGS;
2725                 break;
2726         default:
2727                 r = 0;
2728                 break;
2729         }
2730         return r;
2731
2732 }
2733
2734 long kvm_arch_dev_ioctl(struct file *filp,
2735                         unsigned int ioctl, unsigned long arg)
2736 {
2737         void __user *argp = (void __user *)arg;
2738         long r;
2739
2740         switch (ioctl) {
2741         case KVM_GET_MSR_INDEX_LIST: {
2742                 struct kvm_msr_list __user *user_msr_list = argp;
2743                 struct kvm_msr_list msr_list;
2744                 unsigned n;
2745
2746                 r = -EFAULT;
2747                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2748                         goto out;
2749                 n = msr_list.nmsrs;
2750                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2751                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2752                         goto out;
2753                 r = -E2BIG;
2754                 if (n < msr_list.nmsrs)
2755                         goto out;
2756                 r = -EFAULT;
2757                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2758                                  num_msrs_to_save * sizeof(u32)))
2759                         goto out;
2760                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2761                                  &emulated_msrs,
2762                                  num_emulated_msrs * sizeof(u32)))
2763                         goto out;
2764                 r = 0;
2765                 break;
2766         }
2767         case KVM_GET_SUPPORTED_CPUID:
2768         case KVM_GET_EMULATED_CPUID: {
2769                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2770                 struct kvm_cpuid2 cpuid;
2771
2772                 r = -EFAULT;
2773                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2774                         goto out;
2775
2776                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2777                                             ioctl);
2778                 if (r)
2779                         goto out;
2780
2781                 r = -EFAULT;
2782                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2783                         goto out;
2784                 r = 0;
2785                 break;
2786         }
2787         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2788                 r = -EFAULT;
2789                 if (copy_to_user(argp, &kvm_mce_cap_supported,
2790                                  sizeof(kvm_mce_cap_supported)))
2791                         goto out;
2792                 r = 0;
2793                 break;
2794         }
2795         default:
2796                 r = -EINVAL;
2797         }
2798 out:
2799         return r;
2800 }
2801
2802 static void wbinvd_ipi(void *garbage)
2803 {
2804         wbinvd();
2805 }
2806
2807 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2808 {
2809         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2810 }
2811
2812 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2813 {
2814         /* Address WBINVD may be executed by guest */
2815         if (need_emulate_wbinvd(vcpu)) {
2816                 if (kvm_x86_ops->has_wbinvd_exit())
2817                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2818                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2819                         smp_call_function_single(vcpu->cpu,
2820                                         wbinvd_ipi, NULL, 1);
2821         }
2822
2823         kvm_x86_ops->vcpu_load(vcpu, cpu);
2824
2825         /* Apply any externally detected TSC adjustments (due to suspend) */
2826         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2827                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2828                 vcpu->arch.tsc_offset_adjustment = 0;
2829                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2830         }
2831
2832         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2833                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2834                                 rdtsc() - vcpu->arch.last_host_tsc;
2835                 if (tsc_delta < 0)
2836                         mark_tsc_unstable("KVM discovered backwards TSC");
2837
2838                 if (check_tsc_unstable()) {
2839                         u64 offset = kvm_compute_tsc_offset(vcpu,
2840                                                 vcpu->arch.last_guest_tsc);
2841                         kvm_vcpu_write_tsc_offset(vcpu, offset);
2842                         vcpu->arch.tsc_catchup = 1;
2843                 }
2844                 if (kvm_lapic_hv_timer_in_use(vcpu) &&
2845                                 kvm_x86_ops->set_hv_timer(vcpu,
2846                                         kvm_get_lapic_target_expiration_tsc(vcpu)))
2847                         kvm_lapic_switch_to_sw_timer(vcpu);
2848                 /*
2849                  * On a host with synchronized TSC, there is no need to update
2850                  * kvmclock on vcpu->cpu migration
2851                  */
2852                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2853                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2854                 if (vcpu->cpu != cpu)
2855                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
2856                 vcpu->cpu = cpu;
2857         }
2858
2859         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2860 }
2861
2862 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
2863 {
2864         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2865                 return;
2866
2867         vcpu->arch.st.steal.preempted = 1;
2868
2869         kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.st.stime,
2870                         &vcpu->arch.st.steal.preempted,
2871                         offsetof(struct kvm_steal_time, preempted),
2872                         sizeof(vcpu->arch.st.steal.preempted));
2873 }
2874
2875 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2876 {
2877         int idx;
2878         /*
2879          * Disable page faults because we're in atomic context here.
2880          * kvm_write_guest_offset_cached() would call might_fault()
2881          * that relies on pagefault_disable() to tell if there's a
2882          * bug. NOTE: the write to guest memory may not go through if
2883          * during postcopy live migration or if there's heavy guest
2884          * paging.
2885          */
2886         pagefault_disable();
2887         /*
2888          * kvm_memslots() will be called by
2889          * kvm_write_guest_offset_cached() so take the srcu lock.
2890          */
2891         idx = srcu_read_lock(&vcpu->kvm->srcu);
2892         kvm_steal_time_set_preempted(vcpu);
2893         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2894         pagefault_enable();
2895         kvm_x86_ops->vcpu_put(vcpu);
2896         kvm_put_guest_fpu(vcpu);
2897         vcpu->arch.last_host_tsc = rdtsc();
2898 }
2899
2900 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2901                                     struct kvm_lapic_state *s)
2902 {
2903         if (kvm_x86_ops->sync_pir_to_irr && vcpu->arch.apicv_active)
2904                 kvm_x86_ops->sync_pir_to_irr(vcpu);
2905
2906         return kvm_apic_get_state(vcpu, s);
2907 }
2908
2909 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2910                                     struct kvm_lapic_state *s)
2911 {
2912         int r;
2913
2914         r = kvm_apic_set_state(vcpu, s);
2915         if (r)
2916                 return r;
2917         update_cr8_intercept(vcpu);
2918
2919         return 0;
2920 }
2921
2922 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
2923 {
2924         return (!lapic_in_kernel(vcpu) ||
2925                 kvm_apic_accept_pic_intr(vcpu));
2926 }
2927
2928 /*
2929  * if userspace requested an interrupt window, check that the
2930  * interrupt window is open.
2931  *
2932  * No need to exit to userspace if we already have an interrupt queued.
2933  */
2934 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
2935 {
2936         return kvm_arch_interrupt_allowed(vcpu) &&
2937                 !kvm_cpu_has_interrupt(vcpu) &&
2938                 !kvm_event_needs_reinjection(vcpu) &&
2939                 kvm_cpu_accept_dm_intr(vcpu);
2940 }
2941
2942 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2943                                     struct kvm_interrupt *irq)
2944 {
2945         if (irq->irq >= KVM_NR_INTERRUPTS)
2946                 return -EINVAL;
2947
2948         if (!irqchip_in_kernel(vcpu->kvm)) {
2949                 kvm_queue_interrupt(vcpu, irq->irq, false);
2950                 kvm_make_request(KVM_REQ_EVENT, vcpu);
2951                 return 0;
2952         }
2953
2954         /*
2955          * With in-kernel LAPIC, we only use this to inject EXTINT, so
2956          * fail for in-kernel 8259.
2957          */
2958         if (pic_in_kernel(vcpu->kvm))
2959                 return -ENXIO;
2960
2961         if (vcpu->arch.pending_external_vector != -1)
2962                 return -EEXIST;
2963
2964         vcpu->arch.pending_external_vector = irq->irq;
2965         kvm_make_request(KVM_REQ_EVENT, vcpu);
2966         return 0;
2967 }
2968
2969 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2970 {
2971         kvm_inject_nmi(vcpu);
2972
2973         return 0;
2974 }
2975
2976 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
2977 {
2978         kvm_make_request(KVM_REQ_SMI, vcpu);
2979
2980         return 0;
2981 }
2982
2983 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2984                                            struct kvm_tpr_access_ctl *tac)
2985 {
2986         if (tac->flags)
2987                 return -EINVAL;
2988         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2989         return 0;
2990 }
2991
2992 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2993                                         u64 mcg_cap)
2994 {
2995         int r;
2996         unsigned bank_num = mcg_cap & 0xff, bank;
2997
2998         r = -EINVAL;
2999         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
3000                 goto out;
3001         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
3002                 goto out;
3003         r = 0;
3004         vcpu->arch.mcg_cap = mcg_cap;
3005         /* Init IA32_MCG_CTL to all 1s */
3006         if (mcg_cap & MCG_CTL_P)
3007                 vcpu->arch.mcg_ctl = ~(u64)0;
3008         /* Init IA32_MCi_CTL to all 1s */
3009         for (bank = 0; bank < bank_num; bank++)
3010                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3011
3012         if (kvm_x86_ops->setup_mce)
3013                 kvm_x86_ops->setup_mce(vcpu);
3014 out:
3015         return r;
3016 }
3017
3018 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3019                                       struct kvm_x86_mce *mce)
3020 {
3021         u64 mcg_cap = vcpu->arch.mcg_cap;
3022         unsigned bank_num = mcg_cap & 0xff;
3023         u64 *banks = vcpu->arch.mce_banks;
3024
3025         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3026                 return -EINVAL;
3027         /*
3028          * if IA32_MCG_CTL is not all 1s, the uncorrected error
3029          * reporting is disabled
3030          */
3031         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3032             vcpu->arch.mcg_ctl != ~(u64)0)
3033                 return 0;
3034         banks += 4 * mce->bank;
3035         /*
3036          * if IA32_MCi_CTL is not all 1s, the uncorrected error
3037          * reporting is disabled for the bank
3038          */
3039         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3040                 return 0;
3041         if (mce->status & MCI_STATUS_UC) {
3042                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3043                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3044                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3045                         return 0;
3046                 }
3047                 if (banks[1] & MCI_STATUS_VAL)
3048                         mce->status |= MCI_STATUS_OVER;
3049                 banks[2] = mce->addr;
3050                 banks[3] = mce->misc;
3051                 vcpu->arch.mcg_status = mce->mcg_status;
3052                 banks[1] = mce->status;
3053                 kvm_queue_exception(vcpu, MC_VECTOR);
3054         } else if (!(banks[1] & MCI_STATUS_VAL)
3055                    || !(banks[1] & MCI_STATUS_UC)) {
3056                 if (banks[1] & MCI_STATUS_VAL)
3057                         mce->status |= MCI_STATUS_OVER;
3058                 banks[2] = mce->addr;
3059                 banks[3] = mce->misc;
3060                 banks[1] = mce->status;
3061         } else
3062                 banks[1] |= MCI_STATUS_OVER;
3063         return 0;
3064 }
3065
3066 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3067                                                struct kvm_vcpu_events *events)
3068 {
3069         process_nmi(vcpu);
3070         events->exception.injected =
3071                 vcpu->arch.exception.pending &&
3072                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
3073         events->exception.nr = vcpu->arch.exception.nr;
3074         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3075         events->exception.pad = 0;
3076         events->exception.error_code = vcpu->arch.exception.error_code;
3077
3078         events->interrupt.injected =
3079                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
3080         events->interrupt.nr = vcpu->arch.interrupt.nr;
3081         events->interrupt.soft = 0;
3082         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3083
3084         events->nmi.injected = vcpu->arch.nmi_injected;
3085         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3086         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3087         events->nmi.pad = 0;
3088
3089         events->sipi_vector = 0; /* never valid when reporting to user space */
3090
3091         events->smi.smm = is_smm(vcpu);
3092         events->smi.pending = vcpu->arch.smi_pending;
3093         events->smi.smm_inside_nmi =
3094                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3095         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3096
3097         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3098                          | KVM_VCPUEVENT_VALID_SHADOW
3099                          | KVM_VCPUEVENT_VALID_SMM);
3100         memset(&events->reserved, 0, sizeof(events->reserved));
3101 }
3102
3103 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags);
3104
3105 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3106                                               struct kvm_vcpu_events *events)
3107 {
3108         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3109                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3110                               | KVM_VCPUEVENT_VALID_SHADOW
3111                               | KVM_VCPUEVENT_VALID_SMM))
3112                 return -EINVAL;
3113
3114         if (events->exception.injected &&
3115             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR ||
3116              is_guest_mode(vcpu)))
3117                 return -EINVAL;
3118
3119         /* INITs are latched while in SMM */
3120         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
3121             (events->smi.smm || events->smi.pending) &&
3122             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
3123                 return -EINVAL;
3124
3125         process_nmi(vcpu);
3126         vcpu->arch.exception.pending = events->exception.injected;
3127         vcpu->arch.exception.nr = events->exception.nr;
3128         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3129         vcpu->arch.exception.error_code = events->exception.error_code;
3130
3131         vcpu->arch.interrupt.pending = events->interrupt.injected;
3132         vcpu->arch.interrupt.nr = events->interrupt.nr;
3133         vcpu->arch.interrupt.soft = events->interrupt.soft;
3134         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3135                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3136                                                   events->interrupt.shadow);
3137
3138         vcpu->arch.nmi_injected = events->nmi.injected;
3139         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3140                 vcpu->arch.nmi_pending = events->nmi.pending;
3141         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3142
3143         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3144             lapic_in_kernel(vcpu))
3145                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3146
3147         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3148                 u32 hflags = vcpu->arch.hflags;
3149                 if (events->smi.smm)
3150                         hflags |= HF_SMM_MASK;
3151                 else
3152                         hflags &= ~HF_SMM_MASK;
3153                 kvm_set_hflags(vcpu, hflags);
3154
3155                 vcpu->arch.smi_pending = events->smi.pending;
3156                 if (events->smi.smm_inside_nmi)
3157                         vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3158                 else
3159                         vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3160                 if (lapic_in_kernel(vcpu)) {
3161                         if (events->smi.latched_init)
3162                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3163                         else
3164                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3165                 }
3166         }
3167
3168         kvm_make_request(KVM_REQ_EVENT, vcpu);
3169
3170         return 0;
3171 }
3172
3173 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3174                                              struct kvm_debugregs *dbgregs)
3175 {
3176         unsigned long val;
3177
3178         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3179         kvm_get_dr(vcpu, 6, &val);
3180         dbgregs->dr6 = val;
3181         dbgregs->dr7 = vcpu->arch.dr7;
3182         dbgregs->flags = 0;
3183         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3184 }
3185
3186 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3187                                             struct kvm_debugregs *dbgregs)
3188 {
3189         if (dbgregs->flags)
3190                 return -EINVAL;
3191
3192         if (dbgregs->dr6 & ~0xffffffffull)
3193                 return -EINVAL;
3194         if (dbgregs->dr7 & ~0xffffffffull)
3195                 return -EINVAL;
3196
3197         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3198         kvm_update_dr0123(vcpu);
3199         vcpu->arch.dr6 = dbgregs->dr6;
3200         kvm_update_dr6(vcpu);
3201         vcpu->arch.dr7 = dbgregs->dr7;
3202         kvm_update_dr7(vcpu);
3203
3204         return 0;
3205 }
3206
3207 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3208
3209 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3210 {
3211         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3212         u64 xstate_bv = xsave->header.xfeatures;
3213         u64 valid;
3214
3215         /*
3216          * Copy legacy XSAVE area, to avoid complications with CPUID
3217          * leaves 0 and 1 in the loop below.
3218          */
3219         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3220
3221         /* Set XSTATE_BV */
3222         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
3223         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3224
3225         /*
3226          * Copy each region from the possibly compacted offset to the
3227          * non-compacted offset.
3228          */
3229         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3230         while (valid) {
3231                 u64 feature = valid & -valid;
3232                 int index = fls64(feature) - 1;
3233                 void *src = get_xsave_addr(xsave, feature);
3234
3235                 if (src) {
3236                         u32 size, offset, ecx, edx;
3237                         cpuid_count(XSTATE_CPUID, index,
3238                                     &size, &offset, &ecx, &edx);
3239                         memcpy(dest + offset, src, size);
3240                 }
3241
3242                 valid -= feature;
3243         }
3244 }
3245
3246 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3247 {
3248         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3249         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3250         u64 valid;
3251
3252         /*
3253          * Copy legacy XSAVE area, to avoid complications with CPUID
3254          * leaves 0 and 1 in the loop below.
3255          */
3256         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3257
3258         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3259         xsave->header.xfeatures = xstate_bv;
3260         if (boot_cpu_has(X86_FEATURE_XSAVES))
3261                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3262
3263         /*
3264          * Copy each region from the non-compacted offset to the
3265          * possibly compacted offset.
3266          */
3267         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3268         while (valid) {
3269                 u64 feature = valid & -valid;
3270                 int index = fls64(feature) - 1;
3271                 void *dest = get_xsave_addr(xsave, feature);
3272
3273                 if (dest) {
3274                         u32 size, offset, ecx, edx;
3275                         cpuid_count(XSTATE_CPUID, index,
3276                                     &size, &offset, &ecx, &edx);
3277                         memcpy(dest, src + offset, size);
3278                 }
3279
3280                 valid -= feature;
3281         }
3282 }
3283
3284 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3285                                          struct kvm_xsave *guest_xsave)
3286 {
3287         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3288                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3289                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3290         } else {
3291                 memcpy(guest_xsave->region,
3292                         &vcpu->arch.guest_fpu.state.fxsave,
3293                         sizeof(struct fxregs_state));
3294                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3295                         XFEATURE_MASK_FPSSE;
3296         }
3297 }
3298
3299 #define XSAVE_MXCSR_OFFSET 24
3300
3301 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3302                                         struct kvm_xsave *guest_xsave)
3303 {
3304         u64 xstate_bv =
3305                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3306         u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
3307
3308         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3309                 /*
3310                  * Here we allow setting states that are not present in
3311                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3312                  * with old userspace.
3313                  */
3314                 if (xstate_bv & ~kvm_supported_xcr0() ||
3315                         mxcsr & ~mxcsr_feature_mask)
3316                         return -EINVAL;
3317                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3318         } else {
3319                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
3320                         mxcsr & ~mxcsr_feature_mask)
3321                         return -EINVAL;
3322                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3323                         guest_xsave->region, sizeof(struct fxregs_state));
3324         }
3325         return 0;
3326 }
3327
3328 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3329                                         struct kvm_xcrs *guest_xcrs)
3330 {
3331         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3332                 guest_xcrs->nr_xcrs = 0;
3333                 return;
3334         }
3335
3336         guest_xcrs->nr_xcrs = 1;
3337         guest_xcrs->flags = 0;
3338         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3339         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3340 }
3341
3342 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3343                                        struct kvm_xcrs *guest_xcrs)
3344 {
3345         int i, r = 0;
3346
3347         if (!boot_cpu_has(X86_FEATURE_XSAVE))
3348                 return -EINVAL;
3349
3350         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3351                 return -EINVAL;
3352
3353         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3354                 /* Only support XCR0 currently */
3355                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3356                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3357                                 guest_xcrs->xcrs[i].value);
3358                         break;
3359                 }
3360         if (r)
3361                 r = -EINVAL;
3362         return r;
3363 }
3364
3365 /*
3366  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3367  * stopped by the hypervisor.  This function will be called from the host only.
3368  * EINVAL is returned when the host attempts to set the flag for a guest that
3369  * does not support pv clocks.
3370  */
3371 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3372 {
3373         if (!vcpu->arch.pv_time_enabled)
3374                 return -EINVAL;
3375         vcpu->arch.pvclock_set_guest_stopped_request = true;
3376         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3377         return 0;
3378 }
3379
3380 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
3381                                      struct kvm_enable_cap *cap)
3382 {
3383         if (cap->flags)
3384                 return -EINVAL;
3385
3386         switch (cap->cap) {
3387         case KVM_CAP_HYPERV_SYNIC:
3388                 if (!irqchip_in_kernel(vcpu->kvm))
3389                         return -EINVAL;
3390                 return kvm_hv_activate_synic(vcpu);
3391         default:
3392                 return -EINVAL;
3393         }
3394 }
3395
3396 long kvm_arch_vcpu_ioctl(struct file *filp,
3397                          unsigned int ioctl, unsigned long arg)
3398 {
3399         struct kvm_vcpu *vcpu = filp->private_data;
3400         void __user *argp = (void __user *)arg;
3401         int r;
3402         union {
3403                 struct kvm_lapic_state *lapic;
3404                 struct kvm_xsave *xsave;
3405                 struct kvm_xcrs *xcrs;
3406                 void *buffer;
3407         } u;
3408
3409         u.buffer = NULL;
3410         switch (ioctl) {
3411         case KVM_GET_LAPIC: {
3412                 r = -EINVAL;
3413                 if (!lapic_in_kernel(vcpu))
3414                         goto out;
3415                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3416
3417                 r = -ENOMEM;
3418                 if (!u.lapic)
3419                         goto out;
3420                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3421                 if (r)
3422                         goto out;
3423                 r = -EFAULT;
3424                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3425                         goto out;
3426                 r = 0;
3427                 break;
3428         }
3429         case KVM_SET_LAPIC: {
3430                 r = -EINVAL;
3431                 if (!lapic_in_kernel(vcpu))
3432                         goto out;
3433                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3434                 if (IS_ERR(u.lapic))
3435                         return PTR_ERR(u.lapic);
3436
3437                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3438                 break;
3439         }
3440         case KVM_INTERRUPT: {
3441                 struct kvm_interrupt irq;
3442
3443                 r = -EFAULT;
3444                 if (copy_from_user(&irq, argp, sizeof irq))
3445                         goto out;
3446                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3447                 break;
3448         }
3449         case KVM_NMI: {
3450                 r = kvm_vcpu_ioctl_nmi(vcpu);
3451                 break;
3452         }
3453         case KVM_SMI: {
3454                 r = kvm_vcpu_ioctl_smi(vcpu);
3455                 break;
3456         }
3457         case KVM_SET_CPUID: {
3458                 struct kvm_cpuid __user *cpuid_arg = argp;
3459                 struct kvm_cpuid cpuid;
3460
3461                 r = -EFAULT;
3462                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3463                         goto out;
3464                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3465                 break;
3466         }
3467         case KVM_SET_CPUID2: {
3468                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3469                 struct kvm_cpuid2 cpuid;
3470
3471                 r = -EFAULT;
3472                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3473                         goto out;
3474                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3475                                               cpuid_arg->entries);
3476                 break;
3477         }
3478         case KVM_GET_CPUID2: {
3479                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3480                 struct kvm_cpuid2 cpuid;
3481
3482                 r = -EFAULT;
3483                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3484                         goto out;
3485                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3486                                               cpuid_arg->entries);
3487                 if (r)
3488                         goto out;
3489                 r = -EFAULT;
3490                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3491                         goto out;
3492                 r = 0;
3493                 break;
3494         }
3495         case KVM_GET_MSRS:
3496                 r = msr_io(vcpu, argp, do_get_msr, 1);
3497                 break;
3498         case KVM_SET_MSRS:
3499                 r = msr_io(vcpu, argp, do_set_msr, 0);
3500                 break;
3501         case KVM_TPR_ACCESS_REPORTING: {
3502                 struct kvm_tpr_access_ctl tac;
3503
3504                 r = -EFAULT;
3505                 if (copy_from_user(&tac, argp, sizeof tac))
3506                         goto out;
3507                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3508                 if (r)
3509                         goto out;
3510                 r = -EFAULT;
3511                 if (copy_to_user(argp, &tac, sizeof tac))
3512                         goto out;
3513                 r = 0;
3514                 break;
3515         };
3516         case KVM_SET_VAPIC_ADDR: {
3517                 struct kvm_vapic_addr va;
3518                 int idx;
3519
3520                 r = -EINVAL;
3521                 if (!lapic_in_kernel(vcpu))
3522                         goto out;
3523                 r = -EFAULT;
3524                 if (copy_from_user(&va, argp, sizeof va))
3525                         goto out;
3526                 idx = srcu_read_lock(&vcpu->kvm->srcu);
3527                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3528                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3529                 break;
3530         }
3531         case KVM_X86_SETUP_MCE: {
3532                 u64 mcg_cap;
3533
3534                 r = -EFAULT;
3535                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3536                         goto out;
3537                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3538                 break;
3539         }
3540         case KVM_X86_SET_MCE: {
3541                 struct kvm_x86_mce mce;
3542
3543                 r = -EFAULT;
3544                 if (copy_from_user(&mce, argp, sizeof mce))
3545                         goto out;
3546                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3547                 break;
3548         }
3549         case KVM_GET_VCPU_EVENTS: {
3550                 struct kvm_vcpu_events events;
3551
3552                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3553
3554                 r = -EFAULT;
3555                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3556                         break;
3557                 r = 0;
3558                 break;
3559         }
3560         case KVM_SET_VCPU_EVENTS: {
3561                 struct kvm_vcpu_events events;
3562
3563                 r = -EFAULT;
3564                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3565                         break;
3566
3567                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3568                 break;
3569         }
3570         case KVM_GET_DEBUGREGS: {
3571                 struct kvm_debugregs dbgregs;
3572
3573                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3574
3575                 r = -EFAULT;
3576                 if (copy_to_user(argp, &dbgregs,
3577                                  sizeof(struct kvm_debugregs)))
3578                         break;
3579                 r = 0;
3580                 break;
3581         }
3582         case KVM_SET_DEBUGREGS: {
3583                 struct kvm_debugregs dbgregs;
3584
3585                 r = -EFAULT;
3586                 if (copy_from_user(&dbgregs, argp,
3587                                    sizeof(struct kvm_debugregs)))
3588                         break;
3589
3590                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3591                 break;
3592         }
3593         case KVM_GET_XSAVE: {
3594                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3595                 r = -ENOMEM;
3596                 if (!u.xsave)
3597                         break;
3598
3599                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3600
3601                 r = -EFAULT;
3602                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3603                         break;
3604                 r = 0;
3605                 break;
3606         }
3607         case KVM_SET_XSAVE: {
3608                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3609                 if (IS_ERR(u.xsave))
3610                         return PTR_ERR(u.xsave);
3611
3612                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3613                 break;
3614         }
3615         case KVM_GET_XCRS: {
3616                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3617                 r = -ENOMEM;
3618                 if (!u.xcrs)
3619                         break;
3620
3621                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3622
3623                 r = -EFAULT;
3624                 if (copy_to_user(argp, u.xcrs,
3625                                  sizeof(struct kvm_xcrs)))
3626                         break;
3627                 r = 0;
3628                 break;
3629         }
3630         case KVM_SET_XCRS: {
3631                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3632                 if (IS_ERR(u.xcrs))
3633                         return PTR_ERR(u.xcrs);
3634
3635                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3636                 break;
3637         }
3638         case KVM_SET_TSC_KHZ: {
3639                 u32 user_tsc_khz;
3640
3641                 r = -EINVAL;
3642                 user_tsc_khz = (u32)arg;
3643
3644                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3645                         goto out;
3646
3647                 if (user_tsc_khz == 0)
3648                         user_tsc_khz = tsc_khz;
3649
3650                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
3651                         r = 0;
3652
3653                 goto out;
3654         }
3655         case KVM_GET_TSC_KHZ: {
3656                 r = vcpu->arch.virtual_tsc_khz;
3657                 goto out;
3658         }
3659         case KVM_KVMCLOCK_CTRL: {
3660                 r = kvm_set_guest_paused(vcpu);
3661                 goto out;
3662         }
3663         case KVM_ENABLE_CAP: {
3664                 struct kvm_enable_cap cap;
3665
3666                 r = -EFAULT;
3667                 if (copy_from_user(&cap, argp, sizeof(cap)))
3668                         goto out;
3669                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
3670                 break;
3671         }
3672         default:
3673                 r = -EINVAL;
3674         }
3675 out:
3676         kfree(u.buffer);
3677         return r;
3678 }
3679
3680 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3681 {
3682         return VM_FAULT_SIGBUS;
3683 }
3684
3685 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3686 {
3687         int ret;
3688
3689         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3690                 return -EINVAL;
3691         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3692         return ret;
3693 }
3694
3695 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3696                                               u64 ident_addr)
3697 {
3698         kvm->arch.ept_identity_map_addr = ident_addr;
3699         return 0;
3700 }
3701
3702 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3703                                           u32 kvm_nr_mmu_pages)
3704 {
3705         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3706                 return -EINVAL;
3707
3708         mutex_lock(&kvm->slots_lock);
3709
3710         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3711         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3712
3713         mutex_unlock(&kvm->slots_lock);
3714         return 0;
3715 }
3716
3717 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3718 {
3719         return kvm->arch.n_max_mmu_pages;
3720 }
3721
3722 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3723 {
3724         struct kvm_pic *pic = kvm->arch.vpic;
3725         int r;
3726
3727         r = 0;
3728         switch (chip->chip_id) {
3729         case KVM_IRQCHIP_PIC_MASTER:
3730                 memcpy(&chip->chip.pic, &pic->pics[0],
3731                         sizeof(struct kvm_pic_state));
3732                 break;
3733         case KVM_IRQCHIP_PIC_SLAVE:
3734                 memcpy(&chip->chip.pic, &pic->pics[1],
3735                         sizeof(struct kvm_pic_state));
3736                 break;
3737         case KVM_IRQCHIP_IOAPIC:
3738                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
3739                 break;
3740         default:
3741                 r = -EINVAL;
3742                 break;
3743         }
3744         return r;
3745 }
3746
3747 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3748 {
3749         struct kvm_pic *pic = kvm->arch.vpic;
3750         int r;
3751
3752         r = 0;
3753         switch (chip->chip_id) {
3754         case KVM_IRQCHIP_PIC_MASTER:
3755                 spin_lock(&pic->lock);
3756                 memcpy(&pic->pics[0], &chip->chip.pic,
3757                         sizeof(struct kvm_pic_state));
3758                 spin_unlock(&pic->lock);
3759                 break;
3760         case KVM_IRQCHIP_PIC_SLAVE:
3761                 spin_lock(&pic->lock);
3762                 memcpy(&pic->pics[1], &chip->chip.pic,
3763                         sizeof(struct kvm_pic_state));
3764                 spin_unlock(&pic->lock);
3765                 break;
3766         case KVM_IRQCHIP_IOAPIC:
3767                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
3768                 break;
3769         default:
3770                 r = -EINVAL;
3771                 break;
3772         }
3773         kvm_pic_update_irq(pic);
3774         return r;
3775 }
3776
3777 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3778 {
3779         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
3780
3781         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
3782
3783         mutex_lock(&kps->lock);
3784         memcpy(ps, &kps->channels, sizeof(*ps));
3785         mutex_unlock(&kps->lock);
3786         return 0;
3787 }
3788
3789 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3790 {
3791         int i;
3792         struct kvm_pit *pit = kvm->arch.vpit;
3793
3794         mutex_lock(&pit->pit_state.lock);
3795         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
3796         for (i = 0; i < 3; i++)
3797                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
3798         mutex_unlock(&pit->pit_state.lock);
3799         return 0;
3800 }
3801
3802 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3803 {
3804         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3805         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3806                 sizeof(ps->channels));
3807         ps->flags = kvm->arch.vpit->pit_state.flags;
3808         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3809         memset(&ps->reserved, 0, sizeof(ps->reserved));
3810         return 0;
3811 }
3812
3813 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3814 {
3815         int start = 0;
3816         int i;
3817         u32 prev_legacy, cur_legacy;
3818         struct kvm_pit *pit = kvm->arch.vpit;
3819
3820         mutex_lock(&pit->pit_state.lock);
3821         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3822         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3823         if (!prev_legacy && cur_legacy)
3824                 start = 1;
3825         memcpy(&pit->pit_state.channels, &ps->channels,
3826                sizeof(pit->pit_state.channels));
3827         pit->pit_state.flags = ps->flags;
3828         for (i = 0; i < 3; i++)
3829                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
3830                                    start && i == 0);
3831         mutex_unlock(&pit->pit_state.lock);
3832         return 0;
3833 }
3834
3835 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3836                                  struct kvm_reinject_control *control)
3837 {
3838         struct kvm_pit *pit = kvm->arch.vpit;
3839
3840         if (!pit)
3841                 return -ENXIO;
3842
3843         /* pit->pit_state.lock was overloaded to prevent userspace from getting
3844          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
3845          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
3846          */
3847         mutex_lock(&pit->pit_state.lock);
3848         kvm_pit_set_reinject(pit, control->pit_reinject);
3849         mutex_unlock(&pit->pit_state.lock);
3850
3851         return 0;
3852 }
3853
3854 /**
3855  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3856  * @kvm: kvm instance
3857  * @log: slot id and address to which we copy the log
3858  *
3859  * Steps 1-4 below provide general overview of dirty page logging. See
3860  * kvm_get_dirty_log_protect() function description for additional details.
3861  *
3862  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3863  * always flush the TLB (step 4) even if previous step failed  and the dirty
3864  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3865  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3866  * writes will be marked dirty for next log read.
3867  *
3868  *   1. Take a snapshot of the bit and clear it if needed.
3869  *   2. Write protect the corresponding page.
3870  *   3. Copy the snapshot to the userspace.
3871  *   4. Flush TLB's if needed.
3872  */
3873 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3874 {
3875         bool is_dirty = false;
3876         int r;
3877
3878         mutex_lock(&kvm->slots_lock);
3879
3880         /*
3881          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3882          */
3883         if (kvm_x86_ops->flush_log_dirty)
3884                 kvm_x86_ops->flush_log_dirty(kvm);
3885
3886         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3887
3888         /*
3889          * All the TLBs can be flushed out of mmu lock, see the comments in
3890          * kvm_mmu_slot_remove_write_access().
3891          */
3892         lockdep_assert_held(&kvm->slots_lock);
3893         if (is_dirty)
3894                 kvm_flush_remote_tlbs(kvm);
3895
3896         mutex_unlock(&kvm->slots_lock);
3897         return r;
3898 }
3899
3900 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3901                         bool line_status)
3902 {
3903         if (!irqchip_in_kernel(kvm))
3904                 return -ENXIO;
3905
3906         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3907                                         irq_event->irq, irq_event->level,
3908                                         line_status);
3909         return 0;
3910 }
3911
3912 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
3913                                    struct kvm_enable_cap *cap)
3914 {
3915         int r;
3916
3917         if (cap->flags)
3918                 return -EINVAL;
3919
3920         switch (cap->cap) {
3921         case KVM_CAP_DISABLE_QUIRKS:
3922                 kvm->arch.disabled_quirks = cap->args[0];
3923                 r = 0;
3924                 break;
3925         case KVM_CAP_SPLIT_IRQCHIP: {
3926                 mutex_lock(&kvm->lock);
3927                 r = -EINVAL;
3928                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
3929                         goto split_irqchip_unlock;
3930                 r = -EEXIST;
3931                 if (irqchip_in_kernel(kvm))
3932                         goto split_irqchip_unlock;
3933                 if (kvm->created_vcpus)
3934                         goto split_irqchip_unlock;
3935                 r = kvm_setup_empty_irq_routing(kvm);
3936                 if (r)
3937                         goto split_irqchip_unlock;
3938                 /* Pairs with irqchip_in_kernel. */
3939                 smp_wmb();
3940                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
3941                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
3942                 r = 0;
3943 split_irqchip_unlock:
3944                 mutex_unlock(&kvm->lock);
3945                 break;
3946         }
3947         case KVM_CAP_X2APIC_API:
3948                 r = -EINVAL;
3949                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
3950                         break;
3951
3952                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
3953                         kvm->arch.x2apic_format = true;
3954                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
3955                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
3956
3957                 r = 0;
3958                 break;
3959         default:
3960                 r = -EINVAL;
3961                 break;
3962         }
3963         return r;
3964 }
3965
3966 long kvm_arch_vm_ioctl(struct file *filp,
3967                        unsigned int ioctl, unsigned long arg)
3968 {
3969         struct kvm *kvm = filp->private_data;
3970         void __user *argp = (void __user *)arg;
3971         int r = -ENOTTY;
3972         /*
3973          * This union makes it completely explicit to gcc-3.x
3974          * that these two variables' stack usage should be
3975          * combined, not added together.
3976          */
3977         union {
3978                 struct kvm_pit_state ps;
3979                 struct kvm_pit_state2 ps2;
3980                 struct kvm_pit_config pit_config;
3981         } u;
3982
3983         switch (ioctl) {
3984         case KVM_SET_TSS_ADDR:
3985                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3986                 break;
3987         case KVM_SET_IDENTITY_MAP_ADDR: {
3988                 u64 ident_addr;
3989
3990                 r = -EFAULT;
3991                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3992                         goto out;
3993                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3994                 break;
3995         }
3996         case KVM_SET_NR_MMU_PAGES:
3997                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3998                 break;
3999         case KVM_GET_NR_MMU_PAGES:
4000                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
4001                 break;
4002         case KVM_CREATE_IRQCHIP: {
4003                 mutex_lock(&kvm->lock);
4004
4005                 r = -EEXIST;
4006                 if (irqchip_in_kernel(kvm))
4007                         goto create_irqchip_unlock;
4008
4009                 r = -EINVAL;
4010                 if (kvm->created_vcpus)
4011                         goto create_irqchip_unlock;
4012
4013                 r = kvm_pic_init(kvm);
4014                 if (r)
4015                         goto create_irqchip_unlock;
4016
4017                 r = kvm_ioapic_init(kvm);
4018                 if (r) {
4019                         kvm_pic_destroy(kvm);
4020                         goto create_irqchip_unlock;
4021                 }
4022
4023                 r = kvm_setup_default_irq_routing(kvm);
4024                 if (r) {
4025                         kvm_ioapic_destroy(kvm);
4026                         kvm_pic_destroy(kvm);
4027                         goto create_irqchip_unlock;
4028                 }
4029                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4030                 smp_wmb();
4031                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
4032         create_irqchip_unlock:
4033                 mutex_unlock(&kvm->lock);
4034                 break;
4035         }
4036         case KVM_CREATE_PIT:
4037                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
4038                 goto create_pit;
4039         case KVM_CREATE_PIT2:
4040                 r = -EFAULT;
4041                 if (copy_from_user(&u.pit_config, argp,
4042                                    sizeof(struct kvm_pit_config)))
4043                         goto out;
4044         create_pit:
4045                 mutex_lock(&kvm->lock);
4046                 r = -EEXIST;
4047                 if (kvm->arch.vpit)
4048                         goto create_pit_unlock;
4049                 r = -ENOMEM;
4050                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
4051                 if (kvm->arch.vpit)
4052                         r = 0;
4053         create_pit_unlock:
4054                 mutex_unlock(&kvm->lock);
4055                 break;
4056         case KVM_GET_IRQCHIP: {
4057                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4058                 struct kvm_irqchip *chip;
4059
4060                 chip = memdup_user(argp, sizeof(*chip));
4061                 if (IS_ERR(chip)) {
4062                         r = PTR_ERR(chip);
4063                         goto out;
4064                 }
4065
4066                 r = -ENXIO;
4067                 if (!irqchip_kernel(kvm))
4068                         goto get_irqchip_out;
4069                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
4070                 if (r)
4071                         goto get_irqchip_out;
4072                 r = -EFAULT;
4073                 if (copy_to_user(argp, chip, sizeof *chip))
4074                         goto get_irqchip_out;
4075                 r = 0;
4076         get_irqchip_out:
4077                 kfree(chip);
4078                 break;
4079         }
4080         case KVM_SET_IRQCHIP: {
4081                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4082                 struct kvm_irqchip *chip;
4083
4084                 chip = memdup_user(argp, sizeof(*chip));
4085                 if (IS_ERR(chip)) {
4086                         r = PTR_ERR(chip);
4087                         goto out;
4088                 }
4089
4090                 r = -ENXIO;
4091                 if (!irqchip_kernel(kvm))
4092                         goto set_irqchip_out;
4093                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4094                 if (r)
4095                         goto set_irqchip_out;
4096                 r = 0;
4097         set_irqchip_out:
4098                 kfree(chip);
4099                 break;
4100         }
4101         case KVM_GET_PIT: {
4102                 r = -EFAULT;
4103                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4104                         goto out;
4105                 r = -ENXIO;
4106                 if (!kvm->arch.vpit)
4107                         goto out;
4108                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4109                 if (r)
4110                         goto out;
4111                 r = -EFAULT;
4112                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4113                         goto out;
4114                 r = 0;
4115                 break;
4116         }
4117         case KVM_SET_PIT: {
4118                 r = -EFAULT;
4119                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
4120                         goto out;
4121                 r = -ENXIO;
4122                 if (!kvm->arch.vpit)
4123                         goto out;
4124                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4125                 break;
4126         }
4127         case KVM_GET_PIT2: {
4128                 r = -ENXIO;
4129                 if (!kvm->arch.vpit)
4130                         goto out;
4131                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4132                 if (r)
4133                         goto out;
4134                 r = -EFAULT;
4135                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4136                         goto out;
4137                 r = 0;
4138                 break;
4139         }
4140         case KVM_SET_PIT2: {
4141                 r = -EFAULT;
4142                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4143                         goto out;
4144                 r = -ENXIO;
4145                 if (!kvm->arch.vpit)
4146                         goto out;
4147                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4148                 break;
4149         }
4150         case KVM_REINJECT_CONTROL: {
4151                 struct kvm_reinject_control control;
4152                 r =  -EFAULT;
4153                 if (copy_from_user(&control, argp, sizeof(control)))
4154                         goto out;
4155                 r = kvm_vm_ioctl_reinject(kvm, &control);
4156                 break;
4157         }
4158         case KVM_SET_BOOT_CPU_ID:
4159                 r = 0;
4160                 mutex_lock(&kvm->lock);
4161                 if (kvm->created_vcpus)
4162                         r = -EBUSY;
4163                 else
4164                         kvm->arch.bsp_vcpu_id = arg;
4165                 mutex_unlock(&kvm->lock);
4166                 break;
4167         case KVM_XEN_HVM_CONFIG: {
4168                 r = -EFAULT;
4169                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
4170                                    sizeof(struct kvm_xen_hvm_config)))
4171                         goto out;
4172                 r = -EINVAL;
4173                 if (kvm->arch.xen_hvm_config.flags)
4174                         goto out;
4175                 r = 0;
4176                 break;
4177         }
4178         case KVM_SET_CLOCK: {
4179                 struct kvm_clock_data user_ns;
4180                 u64 now_ns;
4181
4182                 r = -EFAULT;
4183                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4184                         goto out;
4185
4186                 r = -EINVAL;
4187                 if (user_ns.flags)
4188                         goto out;
4189
4190                 r = 0;
4191                 now_ns = get_kvmclock_ns(kvm);
4192                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
4193                 kvm_gen_update_masterclock(kvm);
4194                 break;
4195         }
4196         case KVM_GET_CLOCK: {
4197                 struct kvm_clock_data user_ns;
4198                 u64 now_ns;
4199
4200                 now_ns = get_kvmclock_ns(kvm);
4201                 user_ns.clock = now_ns;
4202                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
4203                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4204
4205                 r = -EFAULT;
4206                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4207                         goto out;
4208                 r = 0;
4209                 break;
4210         }
4211         case KVM_ENABLE_CAP: {
4212                 struct kvm_enable_cap cap;
4213
4214                 r = -EFAULT;
4215                 if (copy_from_user(&cap, argp, sizeof(cap)))
4216                         goto out;
4217                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
4218                 break;
4219         }
4220         default:
4221                 r = -ENOTTY;
4222         }
4223 out:
4224         return r;
4225 }
4226
4227 static void kvm_init_msr_list(void)
4228 {
4229         u32 dummy[2];
4230         unsigned i, j;
4231
4232         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4233                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4234                         continue;
4235
4236                 /*
4237                  * Even MSRs that are valid in the host may not be exposed
4238                  * to the guests in some cases.
4239                  */
4240                 switch (msrs_to_save[i]) {
4241                 case MSR_IA32_BNDCFGS:
4242                         if (!kvm_x86_ops->mpx_supported())
4243                                 continue;
4244                         break;
4245                 case MSR_TSC_AUX:
4246                         if (!kvm_x86_ops->rdtscp_supported())
4247                                 continue;
4248                         break;
4249                 default:
4250                         break;
4251                 }
4252
4253                 if (j < i)
4254                         msrs_to_save[j] = msrs_to_save[i];
4255                 j++;
4256         }
4257         num_msrs_to_save = j;
4258
4259         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4260                 switch (emulated_msrs[i]) {
4261                 case MSR_IA32_SMBASE:
4262                         if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
4263                                 continue;
4264                         break;
4265                 default:
4266                         break;
4267                 }
4268
4269                 if (j < i)
4270                         emulated_msrs[j] = emulated_msrs[i];
4271                 j++;
4272         }
4273         num_emulated_msrs = j;
4274 }
4275
4276 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4277                            const void *v)
4278 {
4279         int handled = 0;
4280         int n;
4281
4282         do {
4283                 n = min(len, 8);
4284                 if (!(lapic_in_kernel(vcpu) &&
4285                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4286                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4287                         break;
4288                 handled += n;
4289                 addr += n;
4290                 len -= n;
4291                 v += n;
4292         } while (len);
4293
4294         return handled;
4295 }
4296
4297 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4298 {
4299         int handled = 0;
4300         int n;
4301
4302         do {
4303                 n = min(len, 8);
4304                 if (!(lapic_in_kernel(vcpu) &&
4305                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4306                                          addr, n, v))
4307                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4308                         break;
4309                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
4310                 handled += n;
4311                 addr += n;
4312                 len -= n;
4313                 v += n;
4314         } while (len);
4315
4316         return handled;
4317 }
4318
4319 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4320                         struct kvm_segment *var, int seg)
4321 {
4322         kvm_x86_ops->set_segment(vcpu, var, seg);
4323 }
4324
4325 void kvm_get_segment(struct kvm_vcpu *vcpu,
4326                      struct kvm_segment *var, int seg)
4327 {
4328         kvm_x86_ops->get_segment(vcpu, var, seg);
4329 }
4330
4331 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4332                            struct x86_exception *exception)
4333 {
4334         gpa_t t_gpa;
4335
4336         BUG_ON(!mmu_is_nested(vcpu));
4337
4338         /* NPT walks are always user-walks */
4339         access |= PFERR_USER_MASK;
4340         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4341
4342         return t_gpa;
4343 }
4344
4345 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4346                               struct x86_exception *exception)
4347 {
4348         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4349         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4350 }
4351
4352  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4353                                 struct x86_exception *exception)
4354 {
4355         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4356         access |= PFERR_FETCH_MASK;
4357         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4358 }
4359
4360 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4361                                struct x86_exception *exception)
4362 {
4363         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4364         access |= PFERR_WRITE_MASK;
4365         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4366 }
4367
4368 /* uses this to access any guest's mapped memory without checking CPL */
4369 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4370                                 struct x86_exception *exception)
4371 {
4372         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4373 }
4374
4375 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4376                                       struct kvm_vcpu *vcpu, u32 access,
4377                                       struct x86_exception *exception)
4378 {
4379         void *data = val;
4380         int r = X86EMUL_CONTINUE;
4381
4382         while (bytes) {
4383                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4384                                                             exception);
4385                 unsigned offset = addr & (PAGE_SIZE-1);
4386                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4387                 int ret;
4388
4389                 if (gpa == UNMAPPED_GVA)
4390                         return X86EMUL_PROPAGATE_FAULT;
4391                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4392                                                offset, toread);
4393                 if (ret < 0) {
4394                         r = X86EMUL_IO_NEEDED;
4395                         goto out;
4396                 }
4397
4398                 bytes -= toread;
4399                 data += toread;
4400                 addr += toread;
4401         }
4402 out:
4403         return r;
4404 }
4405
4406 /* used for instruction fetching */
4407 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4408                                 gva_t addr, void *val, unsigned int bytes,
4409                                 struct x86_exception *exception)
4410 {
4411         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4412         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4413         unsigned offset;
4414         int ret;
4415
4416         /* Inline kvm_read_guest_virt_helper for speed.  */
4417         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4418                                                     exception);
4419         if (unlikely(gpa == UNMAPPED_GVA))
4420                 return X86EMUL_PROPAGATE_FAULT;
4421
4422         offset = addr & (PAGE_SIZE-1);
4423         if (WARN_ON(offset + bytes > PAGE_SIZE))
4424                 bytes = (unsigned)PAGE_SIZE - offset;
4425         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4426                                        offset, bytes);
4427         if (unlikely(ret < 0))
4428                 return X86EMUL_IO_NEEDED;
4429
4430         return X86EMUL_CONTINUE;
4431 }
4432
4433 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4434                                gva_t addr, void *val, unsigned int bytes,
4435                                struct x86_exception *exception)
4436 {
4437         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4438         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4439
4440         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4441                                           exception);
4442 }
4443 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4444
4445 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4446                                       gva_t addr, void *val, unsigned int bytes,
4447                                       struct x86_exception *exception)
4448 {
4449         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4450         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4451 }
4452
4453 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
4454                 unsigned long addr, void *val, unsigned int bytes)
4455 {
4456         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4457         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
4458
4459         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
4460 }
4461
4462 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4463                                        gva_t addr, void *val,
4464                                        unsigned int bytes,
4465                                        struct x86_exception *exception)
4466 {
4467         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4468         void *data = val;
4469         int r = X86EMUL_CONTINUE;
4470
4471         while (bytes) {
4472                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4473                                                              PFERR_WRITE_MASK,
4474                                                              exception);
4475                 unsigned offset = addr & (PAGE_SIZE-1);
4476                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4477                 int ret;
4478
4479                 if (gpa == UNMAPPED_GVA)
4480                         return X86EMUL_PROPAGATE_FAULT;
4481                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4482                 if (ret < 0) {
4483                         r = X86EMUL_IO_NEEDED;
4484                         goto out;
4485                 }
4486
4487                 bytes -= towrite;
4488                 data += towrite;
4489                 addr += towrite;
4490         }
4491 out:
4492         return r;
4493 }
4494 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4495
4496 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4497                             gpa_t gpa, bool write)
4498 {
4499         /* For APIC access vmexit */
4500         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4501                 return 1;
4502
4503         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
4504                 trace_vcpu_match_mmio(gva, gpa, write, true);
4505                 return 1;
4506         }
4507
4508         return 0;
4509 }
4510
4511 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4512                                 gpa_t *gpa, struct x86_exception *exception,
4513                                 bool write)
4514 {
4515         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4516                 | (write ? PFERR_WRITE_MASK : 0);
4517
4518         /*
4519          * currently PKRU is only applied to ept enabled guest so
4520          * there is no pkey in EPT page table for L1 guest or EPT
4521          * shadow page table for L2 guest.
4522          */
4523         if (vcpu_match_mmio_gva(vcpu, gva)
4524             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4525                                  vcpu->arch.access, 0, access)) {
4526                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4527                                         (gva & (PAGE_SIZE - 1));
4528                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4529                 return 1;
4530         }
4531
4532         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4533
4534         if (*gpa == UNMAPPED_GVA)
4535                 return -1;
4536
4537         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
4538 }
4539
4540 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4541                         const void *val, int bytes)
4542 {
4543         int ret;
4544
4545         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4546         if (ret < 0)
4547                 return 0;
4548         kvm_page_track_write(vcpu, gpa, val, bytes);
4549         return 1;
4550 }
4551
4552 struct read_write_emulator_ops {
4553         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4554                                   int bytes);
4555         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4556                                   void *val, int bytes);
4557         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4558                                int bytes, void *val);
4559         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4560                                     void *val, int bytes);
4561         bool write;
4562 };
4563
4564 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4565 {
4566         if (vcpu->mmio_read_completed) {
4567                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4568                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4569                 vcpu->mmio_read_completed = 0;
4570                 return 1;
4571         }
4572
4573         return 0;
4574 }
4575
4576 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4577                         void *val, int bytes)
4578 {
4579         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4580 }
4581
4582 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4583                          void *val, int bytes)
4584 {
4585         return emulator_write_phys(vcpu, gpa, val, bytes);
4586 }
4587
4588 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4589 {
4590         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4591         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4592 }
4593
4594 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4595                           void *val, int bytes)
4596 {
4597         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4598         return X86EMUL_IO_NEEDED;
4599 }
4600
4601 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4602                            void *val, int bytes)
4603 {
4604         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4605
4606         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4607         return X86EMUL_CONTINUE;
4608 }
4609
4610 static const struct read_write_emulator_ops read_emultor = {
4611         .read_write_prepare = read_prepare,
4612         .read_write_emulate = read_emulate,
4613         .read_write_mmio = vcpu_mmio_read,
4614         .read_write_exit_mmio = read_exit_mmio,
4615 };
4616
4617 static const struct read_write_emulator_ops write_emultor = {
4618         .read_write_emulate = write_emulate,
4619         .read_write_mmio = write_mmio,
4620         .read_write_exit_mmio = write_exit_mmio,
4621         .write = true,
4622 };
4623
4624 static int emulator_read_write_onepage(unsigned long addr, void *val,
4625                                        unsigned int bytes,
4626                                        struct x86_exception *exception,
4627                                        struct kvm_vcpu *vcpu,
4628                                        const struct read_write_emulator_ops *ops)
4629 {
4630         gpa_t gpa;
4631         int handled, ret;
4632         bool write = ops->write;
4633         struct kvm_mmio_fragment *frag;
4634         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4635
4636         /*
4637          * If the exit was due to a NPF we may already have a GPA.
4638          * If the GPA is present, use it to avoid the GVA to GPA table walk.
4639          * Note, this cannot be used on string operations since string
4640          * operation using rep will only have the initial GPA from the NPF
4641          * occurred.
4642          */
4643         if (vcpu->arch.gpa_available &&
4644             emulator_can_use_gpa(ctxt) &&
4645             vcpu_is_mmio_gpa(vcpu, addr, exception->address, write) &&
4646             (addr & ~PAGE_MASK) == (exception->address & ~PAGE_MASK)) {
4647                 gpa = exception->address;
4648                 goto mmio;
4649         }
4650
4651         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4652
4653         if (ret < 0)
4654                 return X86EMUL_PROPAGATE_FAULT;
4655
4656         /* For APIC access vmexit */
4657         if (ret)
4658                 goto mmio;
4659
4660         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4661                 return X86EMUL_CONTINUE;
4662
4663 mmio:
4664         /*
4665          * Is this MMIO handled locally?
4666          */
4667         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4668         if (handled == bytes)
4669                 return X86EMUL_CONTINUE;
4670
4671         gpa += handled;
4672         bytes -= handled;
4673         val += handled;
4674
4675         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4676         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4677         frag->gpa = gpa;
4678         frag->data = val;
4679         frag->len = bytes;
4680         return X86EMUL_CONTINUE;
4681 }
4682
4683 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4684                         unsigned long addr,
4685                         void *val, unsigned int bytes,
4686                         struct x86_exception *exception,
4687                         const struct read_write_emulator_ops *ops)
4688 {
4689         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4690         gpa_t gpa;
4691         int rc;
4692
4693         if (ops->read_write_prepare &&
4694                   ops->read_write_prepare(vcpu, val, bytes))
4695                 return X86EMUL_CONTINUE;
4696
4697         vcpu->mmio_nr_fragments = 0;
4698
4699         /* Crossing a page boundary? */
4700         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4701                 int now;
4702
4703                 now = -addr & ~PAGE_MASK;
4704                 rc = emulator_read_write_onepage(addr, val, now, exception,
4705                                                  vcpu, ops);
4706
4707                 if (rc != X86EMUL_CONTINUE)
4708                         return rc;
4709                 addr += now;
4710                 if (ctxt->mode != X86EMUL_MODE_PROT64)
4711                         addr = (u32)addr;
4712                 val += now;
4713                 bytes -= now;
4714         }
4715
4716         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4717                                          vcpu, ops);
4718         if (rc != X86EMUL_CONTINUE)
4719                 return rc;
4720
4721         if (!vcpu->mmio_nr_fragments)
4722                 return rc;
4723
4724         gpa = vcpu->mmio_fragments[0].gpa;
4725
4726         vcpu->mmio_needed = 1;
4727         vcpu->mmio_cur_fragment = 0;
4728
4729         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4730         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4731         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4732         vcpu->run->mmio.phys_addr = gpa;
4733
4734         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4735 }
4736
4737 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4738                                   unsigned long addr,
4739                                   void *val,
4740                                   unsigned int bytes,
4741                                   struct x86_exception *exception)
4742 {
4743         return emulator_read_write(ctxt, addr, val, bytes,
4744                                    exception, &read_emultor);
4745 }
4746
4747 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4748                             unsigned long addr,
4749                             const void *val,
4750                             unsigned int bytes,
4751                             struct x86_exception *exception)
4752 {
4753         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4754                                    exception, &write_emultor);
4755 }
4756
4757 #define CMPXCHG_TYPE(t, ptr, old, new) \
4758         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4759
4760 #ifdef CONFIG_X86_64
4761 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4762 #else
4763 #  define CMPXCHG64(ptr, old, new) \
4764         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4765 #endif
4766
4767 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4768                                      unsigned long addr,
4769                                      const void *old,
4770                                      const void *new,
4771                                      unsigned int bytes,
4772                                      struct x86_exception *exception)
4773 {
4774         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4775         gpa_t gpa;
4776         struct page *page;
4777         char *kaddr;
4778         bool exchanged;
4779
4780         /* guests cmpxchg8b have to be emulated atomically */
4781         if (bytes > 8 || (bytes & (bytes - 1)))
4782                 goto emul_write;
4783
4784         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4785
4786         if (gpa == UNMAPPED_GVA ||
4787             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4788                 goto emul_write;
4789
4790         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4791                 goto emul_write;
4792
4793         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4794         if (is_error_page(page))
4795                 goto emul_write;
4796
4797         kaddr = kmap_atomic(page);
4798         kaddr += offset_in_page(gpa);
4799         switch (bytes) {
4800         case 1:
4801                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4802                 break;
4803         case 2:
4804                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4805                 break;
4806         case 4:
4807                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4808                 break;
4809         case 8:
4810                 exchanged = CMPXCHG64(kaddr, old, new);
4811                 break;
4812         default:
4813                 BUG();
4814         }
4815         kunmap_atomic(kaddr);
4816         kvm_release_page_dirty(page);
4817
4818         if (!exchanged)
4819                 return X86EMUL_CMPXCHG_FAILED;
4820
4821         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
4822         kvm_page_track_write(vcpu, gpa, new, bytes);
4823
4824         return X86EMUL_CONTINUE;
4825
4826 emul_write:
4827         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4828
4829         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4830 }
4831
4832 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4833 {
4834         int r = 0, i;
4835
4836         for (i = 0; i < vcpu->arch.pio.count; i++) {
4837                 if (vcpu->arch.pio.in)
4838                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4839                                             vcpu->arch.pio.size, pd);
4840                 else
4841                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4842                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
4843                                              pd);
4844                 if (r)
4845                         break;
4846                 pd += vcpu->arch.pio.size;
4847         }
4848         return r;
4849 }
4850
4851 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4852                                unsigned short port, void *val,
4853                                unsigned int count, bool in)
4854 {
4855         vcpu->arch.pio.port = port;
4856         vcpu->arch.pio.in = in;
4857         vcpu->arch.pio.count  = count;
4858         vcpu->arch.pio.size = size;
4859
4860         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4861                 vcpu->arch.pio.count = 0;
4862                 return 1;
4863         }
4864
4865         vcpu->run->exit_reason = KVM_EXIT_IO;
4866         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4867         vcpu->run->io.size = size;
4868         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4869         vcpu->run->io.count = count;
4870         vcpu->run->io.port = port;
4871
4872         return 0;
4873 }
4874
4875 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4876                                     int size, unsigned short port, void *val,
4877                                     unsigned int count)
4878 {
4879         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4880         int ret;
4881
4882         if (vcpu->arch.pio.count)
4883                 goto data_avail;
4884
4885         memset(vcpu->arch.pio_data, 0, size * count);
4886
4887         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4888         if (ret) {
4889 data_avail:
4890                 memcpy(val, vcpu->arch.pio_data, size * count);
4891                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4892                 vcpu->arch.pio.count = 0;
4893                 return 1;
4894         }
4895
4896         return 0;
4897 }
4898
4899 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4900                                      int size, unsigned short port,
4901                                      const void *val, unsigned int count)
4902 {
4903         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4904
4905         memcpy(vcpu->arch.pio_data, val, size * count);
4906         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4907         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4908 }
4909
4910 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4911 {
4912         return kvm_x86_ops->get_segment_base(vcpu, seg);
4913 }
4914
4915 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4916 {
4917         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4918 }
4919
4920 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4921 {
4922         if (!need_emulate_wbinvd(vcpu))
4923                 return X86EMUL_CONTINUE;
4924
4925         if (kvm_x86_ops->has_wbinvd_exit()) {
4926                 int cpu = get_cpu();
4927
4928                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4929                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4930                                 wbinvd_ipi, NULL, 1);
4931                 put_cpu();
4932                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4933         } else
4934                 wbinvd();
4935         return X86EMUL_CONTINUE;
4936 }
4937
4938 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4939 {
4940         kvm_emulate_wbinvd_noskip(vcpu);
4941         return kvm_skip_emulated_instruction(vcpu);
4942 }
4943 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4944
4945
4946
4947 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4948 {
4949         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
4950 }
4951
4952 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
4953                            unsigned long *dest)
4954 {
4955         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4956 }
4957
4958 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
4959                            unsigned long value)
4960 {
4961
4962         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4963 }
4964
4965 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4966 {
4967         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4968 }
4969
4970 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4971 {
4972         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4973         unsigned long value;
4974
4975         switch (cr) {
4976         case 0:
4977                 value = kvm_read_cr0(vcpu);
4978                 break;
4979         case 2:
4980                 value = vcpu->arch.cr2;
4981                 break;
4982         case 3:
4983                 value = kvm_read_cr3(vcpu);
4984                 break;
4985         case 4:
4986                 value = kvm_read_cr4(vcpu);
4987                 break;
4988         case 8:
4989                 value = kvm_get_cr8(vcpu);
4990                 break;
4991         default:
4992                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4993                 return 0;
4994         }
4995
4996         return value;
4997 }
4998
4999 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
5000 {
5001         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5002         int res = 0;
5003
5004         switch (cr) {
5005         case 0:
5006                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
5007                 break;
5008         case 2:
5009                 vcpu->arch.cr2 = val;
5010                 break;
5011         case 3:
5012                 res = kvm_set_cr3(vcpu, val);
5013                 break;
5014         case 4:
5015                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
5016                 break;
5017         case 8:
5018                 res = kvm_set_cr8(vcpu, val);
5019                 break;
5020         default:
5021                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5022                 res = -1;
5023         }
5024
5025         return res;
5026 }
5027
5028 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
5029 {
5030         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
5031 }
5032
5033 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5034 {
5035         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
5036 }
5037
5038 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5039 {
5040         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
5041 }
5042
5043 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5044 {
5045         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
5046 }
5047
5048 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5049 {
5050         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
5051 }
5052
5053 static unsigned long emulator_get_cached_segment_base(
5054         struct x86_emulate_ctxt *ctxt, int seg)
5055 {
5056         return get_segment_base(emul_to_vcpu(ctxt), seg);
5057 }
5058
5059 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
5060                                  struct desc_struct *desc, u32 *base3,
5061                                  int seg)
5062 {
5063         struct kvm_segment var;
5064
5065         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
5066         *selector = var.selector;
5067
5068         if (var.unusable) {
5069                 memset(desc, 0, sizeof(*desc));
5070                 if (base3)
5071                         *base3 = 0;
5072                 return false;
5073         }
5074
5075         if (var.g)
5076                 var.limit >>= 12;
5077         set_desc_limit(desc, var.limit);
5078         set_desc_base(desc, (unsigned long)var.base);
5079 #ifdef CONFIG_X86_64
5080         if (base3)
5081                 *base3 = var.base >> 32;
5082 #endif
5083         desc->type = var.type;
5084         desc->s = var.s;
5085         desc->dpl = var.dpl;
5086         desc->p = var.present;
5087         desc->avl = var.avl;
5088         desc->l = var.l;
5089         desc->d = var.db;
5090         desc->g = var.g;
5091
5092         return true;
5093 }
5094
5095 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
5096                                  struct desc_struct *desc, u32 base3,
5097                                  int seg)
5098 {
5099         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5100         struct kvm_segment var;
5101
5102         var.selector = selector;
5103         var.base = get_desc_base(desc);
5104 #ifdef CONFIG_X86_64
5105         var.base |= ((u64)base3) << 32;
5106 #endif
5107         var.limit = get_desc_limit(desc);
5108         if (desc->g)
5109                 var.limit = (var.limit << 12) | 0xfff;
5110         var.type = desc->type;
5111         var.dpl = desc->dpl;
5112         var.db = desc->d;
5113         var.s = desc->s;
5114         var.l = desc->l;
5115         var.g = desc->g;
5116         var.avl = desc->avl;
5117         var.present = desc->p;
5118         var.unusable = !var.present;
5119         var.padding = 0;
5120
5121         kvm_set_segment(vcpu, &var, seg);
5122         return;
5123 }
5124
5125 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
5126                             u32 msr_index, u64 *pdata)
5127 {
5128         struct msr_data msr;
5129         int r;
5130
5131         msr.index = msr_index;
5132         msr.host_initiated = false;
5133         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
5134         if (r)
5135                 return r;
5136
5137         *pdata = msr.data;
5138         return 0;
5139 }
5140
5141 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
5142                             u32 msr_index, u64 data)
5143 {
5144         struct msr_data msr;
5145
5146         msr.data = data;
5147         msr.index = msr_index;
5148         msr.host_initiated = false;
5149         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
5150 }
5151
5152 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
5153 {
5154         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5155
5156         return vcpu->arch.smbase;
5157 }
5158
5159 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
5160 {
5161         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5162
5163         vcpu->arch.smbase = smbase;
5164 }
5165
5166 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
5167                               u32 pmc)
5168 {
5169         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
5170 }
5171
5172 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
5173                              u32 pmc, u64 *pdata)
5174 {
5175         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
5176 }
5177
5178 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
5179 {
5180         emul_to_vcpu(ctxt)->arch.halt_request = 1;
5181 }
5182
5183 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
5184 {
5185         preempt_disable();
5186         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
5187 }
5188
5189 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
5190 {
5191         preempt_enable();
5192 }
5193
5194 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
5195                               struct x86_instruction_info *info,
5196                               enum x86_intercept_stage stage)
5197 {
5198         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
5199 }
5200
5201 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
5202                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
5203 {
5204         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
5205 }
5206
5207 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
5208 {
5209         return kvm_register_read(emul_to_vcpu(ctxt), reg);
5210 }
5211
5212 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
5213 {
5214         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
5215 }
5216
5217 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
5218 {
5219         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
5220 }
5221
5222 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
5223 {
5224         return emul_to_vcpu(ctxt)->arch.hflags;
5225 }
5226
5227 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
5228 {
5229         kvm_set_hflags(emul_to_vcpu(ctxt), emul_flags);
5230 }
5231
5232 static const struct x86_emulate_ops emulate_ops = {
5233         .read_gpr            = emulator_read_gpr,
5234         .write_gpr           = emulator_write_gpr,
5235         .read_std            = kvm_read_guest_virt_system,
5236         .write_std           = kvm_write_guest_virt_system,
5237         .read_phys           = kvm_read_guest_phys_system,
5238         .fetch               = kvm_fetch_guest_virt,
5239         .read_emulated       = emulator_read_emulated,
5240         .write_emulated      = emulator_write_emulated,
5241         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
5242         .invlpg              = emulator_invlpg,
5243         .pio_in_emulated     = emulator_pio_in_emulated,
5244         .pio_out_emulated    = emulator_pio_out_emulated,
5245         .get_segment         = emulator_get_segment,
5246         .set_segment         = emulator_set_segment,
5247         .get_cached_segment_base = emulator_get_cached_segment_base,
5248         .get_gdt             = emulator_get_gdt,
5249         .get_idt             = emulator_get_idt,
5250         .set_gdt             = emulator_set_gdt,
5251         .set_idt             = emulator_set_idt,
5252         .get_cr              = emulator_get_cr,
5253         .set_cr              = emulator_set_cr,
5254         .cpl                 = emulator_get_cpl,
5255         .get_dr              = emulator_get_dr,
5256         .set_dr              = emulator_set_dr,
5257         .get_smbase          = emulator_get_smbase,
5258         .set_smbase          = emulator_set_smbase,
5259         .set_msr             = emulator_set_msr,
5260         .get_msr             = emulator_get_msr,
5261         .check_pmc           = emulator_check_pmc,
5262         .read_pmc            = emulator_read_pmc,
5263         .halt                = emulator_halt,
5264         .wbinvd              = emulator_wbinvd,
5265         .fix_hypercall       = emulator_fix_hypercall,
5266         .get_fpu             = emulator_get_fpu,
5267         .put_fpu             = emulator_put_fpu,
5268         .intercept           = emulator_intercept,
5269         .get_cpuid           = emulator_get_cpuid,
5270         .set_nmi_mask        = emulator_set_nmi_mask,
5271         .get_hflags          = emulator_get_hflags,
5272         .set_hflags          = emulator_set_hflags,
5273 };
5274
5275 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5276 {
5277         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5278         /*
5279          * an sti; sti; sequence only disable interrupts for the first
5280          * instruction. So, if the last instruction, be it emulated or
5281          * not, left the system with the INT_STI flag enabled, it
5282          * means that the last instruction is an sti. We should not
5283          * leave the flag on in this case. The same goes for mov ss
5284          */
5285         if (int_shadow & mask)
5286                 mask = 0;
5287         if (unlikely(int_shadow || mask)) {
5288                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5289                 if (!mask)
5290                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5291         }
5292 }
5293
5294 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5295 {
5296         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5297         if (ctxt->exception.vector == PF_VECTOR)
5298                 return kvm_propagate_fault(vcpu, &ctxt->exception);
5299
5300         if (ctxt->exception.error_code_valid)
5301                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5302                                       ctxt->exception.error_code);
5303         else
5304                 kvm_queue_exception(vcpu, ctxt->exception.vector);
5305         return false;
5306 }
5307
5308 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5309 {
5310         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5311         int cs_db, cs_l;
5312
5313         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5314
5315         ctxt->eflags = kvm_get_rflags(vcpu);
5316         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
5317
5318         ctxt->eip = kvm_rip_read(vcpu);
5319         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5320                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5321                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5322                      cs_db                              ? X86EMUL_MODE_PROT32 :
5323                                                           X86EMUL_MODE_PROT16;
5324         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5325         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5326         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5327
5328         init_decode_cache(ctxt);
5329         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5330 }
5331
5332 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5333 {
5334         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5335         int ret;
5336
5337         init_emulate_ctxt(vcpu);
5338
5339         ctxt->op_bytes = 2;
5340         ctxt->ad_bytes = 2;
5341         ctxt->_eip = ctxt->eip + inc_eip;
5342         ret = emulate_int_real(ctxt, irq);
5343
5344         if (ret != X86EMUL_CONTINUE)
5345                 return EMULATE_FAIL;
5346
5347         ctxt->eip = ctxt->_eip;
5348         kvm_rip_write(vcpu, ctxt->eip);
5349         kvm_set_rflags(vcpu, ctxt->eflags);
5350
5351         if (irq == NMI_VECTOR)
5352                 vcpu->arch.nmi_pending = 0;
5353         else
5354                 vcpu->arch.interrupt.pending = false;
5355
5356         return EMULATE_DONE;
5357 }
5358 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5359
5360 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
5361 {
5362         int r = EMULATE_DONE;
5363
5364         ++vcpu->stat.insn_emulation_fail;
5365         trace_kvm_emulate_insn_failed(vcpu);
5366         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5367                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5368                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5369                 vcpu->run->internal.ndata = 0;
5370                 r = EMULATE_FAIL;
5371         }
5372         kvm_queue_exception(vcpu, UD_VECTOR);
5373
5374         return r;
5375 }
5376
5377 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5378                                   bool write_fault_to_shadow_pgtable,
5379                                   int emulation_type)
5380 {
5381         gpa_t gpa = cr2;
5382         kvm_pfn_t pfn;
5383
5384         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5385                 return false;
5386
5387         if (!vcpu->arch.mmu.direct_map) {
5388                 /*
5389                  * Write permission should be allowed since only
5390                  * write access need to be emulated.
5391                  */
5392                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5393
5394                 /*
5395                  * If the mapping is invalid in guest, let cpu retry
5396                  * it to generate fault.
5397                  */
5398                 if (gpa == UNMAPPED_GVA)
5399                         return true;
5400         }
5401
5402         /*
5403          * Do not retry the unhandleable instruction if it faults on the
5404          * readonly host memory, otherwise it will goto a infinite loop:
5405          * retry instruction -> write #PF -> emulation fail -> retry
5406          * instruction -> ...
5407          */
5408         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5409
5410         /*
5411          * If the instruction failed on the error pfn, it can not be fixed,
5412          * report the error to userspace.
5413          */
5414         if (is_error_noslot_pfn(pfn))
5415                 return false;
5416
5417         kvm_release_pfn_clean(pfn);
5418
5419         /* The instructions are well-emulated on direct mmu. */
5420         if (vcpu->arch.mmu.direct_map) {
5421                 unsigned int indirect_shadow_pages;
5422
5423                 spin_lock(&vcpu->kvm->mmu_lock);
5424                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5425                 spin_unlock(&vcpu->kvm->mmu_lock);
5426
5427                 if (indirect_shadow_pages)
5428                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5429
5430                 return true;
5431         }
5432
5433         /*
5434          * if emulation was due to access to shadowed page table
5435          * and it failed try to unshadow page and re-enter the
5436          * guest to let CPU execute the instruction.
5437          */
5438         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5439
5440         /*
5441          * If the access faults on its page table, it can not
5442          * be fixed by unprotecting shadow page and it should
5443          * be reported to userspace.
5444          */
5445         return !write_fault_to_shadow_pgtable;
5446 }
5447
5448 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5449                               unsigned long cr2,  int emulation_type)
5450 {
5451         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5452         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5453
5454         last_retry_eip = vcpu->arch.last_retry_eip;
5455         last_retry_addr = vcpu->arch.last_retry_addr;
5456
5457         /*
5458          * If the emulation is caused by #PF and it is non-page_table
5459          * writing instruction, it means the VM-EXIT is caused by shadow
5460          * page protected, we can zap the shadow page and retry this
5461          * instruction directly.
5462          *
5463          * Note: if the guest uses a non-page-table modifying instruction
5464          * on the PDE that points to the instruction, then we will unmap
5465          * the instruction and go to an infinite loop. So, we cache the
5466          * last retried eip and the last fault address, if we meet the eip
5467          * and the address again, we can break out of the potential infinite
5468          * loop.
5469          */
5470         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5471
5472         if (!(emulation_type & EMULTYPE_RETRY))
5473                 return false;
5474
5475         if (x86_page_table_writing_insn(ctxt))
5476                 return false;
5477
5478         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5479                 return false;
5480
5481         vcpu->arch.last_retry_eip = ctxt->eip;
5482         vcpu->arch.last_retry_addr = cr2;
5483
5484         if (!vcpu->arch.mmu.direct_map)
5485                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5486
5487         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5488
5489         return true;
5490 }
5491
5492 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5493 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5494
5495 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5496 {
5497         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5498                 /* This is a good place to trace that we are exiting SMM.  */
5499                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5500
5501                 /* Process a latched INIT or SMI, if any.  */
5502                 kvm_make_request(KVM_REQ_EVENT, vcpu);
5503         }
5504
5505         kvm_mmu_reset_context(vcpu);
5506 }
5507
5508 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5509 {
5510         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5511
5512         vcpu->arch.hflags = emul_flags;
5513
5514         if (changed & HF_SMM_MASK)
5515                 kvm_smm_changed(vcpu);
5516 }
5517
5518 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5519                                 unsigned long *db)
5520 {
5521         u32 dr6 = 0;
5522         int i;
5523         u32 enable, rwlen;
5524
5525         enable = dr7;
5526         rwlen = dr7 >> 16;
5527         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5528                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5529                         dr6 |= (1 << i);
5530         return dr6;
5531 }
5532
5533 static void kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu, int *r)
5534 {
5535         struct kvm_run *kvm_run = vcpu->run;
5536
5537         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5538                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
5539                 kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5540                 kvm_run->debug.arch.exception = DB_VECTOR;
5541                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
5542                 *r = EMULATE_USER_EXIT;
5543         } else {
5544                 /*
5545                  * "Certain debug exceptions may clear bit 0-3.  The
5546                  * remaining contents of the DR6 register are never
5547                  * cleared by the processor".
5548                  */
5549                 vcpu->arch.dr6 &= ~15;
5550                 vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5551                 kvm_queue_exception(vcpu, DB_VECTOR);
5552         }
5553 }
5554
5555 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
5556 {
5557         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5558         int r = EMULATE_DONE;
5559
5560         kvm_x86_ops->skip_emulated_instruction(vcpu);
5561
5562         /*
5563          * rflags is the old, "raw" value of the flags.  The new value has
5564          * not been saved yet.
5565          *
5566          * This is correct even for TF set by the guest, because "the
5567          * processor will not generate this exception after the instruction
5568          * that sets the TF flag".
5569          */
5570         if (unlikely(rflags & X86_EFLAGS_TF))
5571                 kvm_vcpu_do_singlestep(vcpu, &r);
5572         return r == EMULATE_DONE;
5573 }
5574 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
5575
5576 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5577 {
5578         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5579             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5580                 struct kvm_run *kvm_run = vcpu->run;
5581                 unsigned long eip = kvm_get_linear_rip(vcpu);
5582                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5583                                            vcpu->arch.guest_debug_dr7,
5584                                            vcpu->arch.eff_db);
5585
5586                 if (dr6 != 0) {
5587                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5588                         kvm_run->debug.arch.pc = eip;
5589                         kvm_run->debug.arch.exception = DB_VECTOR;
5590                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5591                         *r = EMULATE_USER_EXIT;
5592                         return true;
5593                 }
5594         }
5595
5596         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5597             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5598                 unsigned long eip = kvm_get_linear_rip(vcpu);
5599                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5600                                            vcpu->arch.dr7,
5601                                            vcpu->arch.db);
5602
5603                 if (dr6 != 0) {
5604                         vcpu->arch.dr6 &= ~15;
5605                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5606                         kvm_queue_exception(vcpu, DB_VECTOR);
5607                         *r = EMULATE_DONE;
5608                         return true;
5609                 }
5610         }
5611
5612         return false;
5613 }
5614
5615 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5616                             unsigned long cr2,
5617                             int emulation_type,
5618                             void *insn,
5619                             int insn_len)
5620 {
5621         int r;
5622         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5623         bool writeback = true;
5624         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5625
5626         /*
5627          * Clear write_fault_to_shadow_pgtable here to ensure it is
5628          * never reused.
5629          */
5630         vcpu->arch.write_fault_to_shadow_pgtable = false;
5631         kvm_clear_exception_queue(vcpu);
5632
5633         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5634                 init_emulate_ctxt(vcpu);
5635
5636                 /*
5637                  * We will reenter on the same instruction since
5638                  * we do not set complete_userspace_io.  This does not
5639                  * handle watchpoints yet, those would be handled in
5640                  * the emulate_ops.
5641                  */
5642                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5643                         return r;
5644
5645                 ctxt->interruptibility = 0;
5646                 ctxt->have_exception = false;
5647                 ctxt->exception.vector = -1;
5648                 ctxt->perm_ok = false;
5649
5650                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5651
5652                 r = x86_decode_insn(ctxt, insn, insn_len);
5653
5654                 trace_kvm_emulate_insn_start(vcpu);
5655                 ++vcpu->stat.insn_emulation;
5656                 if (r != EMULATION_OK)  {
5657                         if (emulation_type & EMULTYPE_TRAP_UD)
5658                                 return EMULATE_FAIL;
5659                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5660                                                 emulation_type))
5661                                 return EMULATE_DONE;
5662                         if (emulation_type & EMULTYPE_SKIP)
5663                                 return EMULATE_FAIL;
5664                         return handle_emulation_failure(vcpu);
5665                 }
5666         }
5667
5668         if (emulation_type & EMULTYPE_SKIP) {
5669                 kvm_rip_write(vcpu, ctxt->_eip);
5670                 if (ctxt->eflags & X86_EFLAGS_RF)
5671                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5672                 return EMULATE_DONE;
5673         }
5674
5675         if (retry_instruction(ctxt, cr2, emulation_type))
5676                 return EMULATE_DONE;
5677
5678         /* this is needed for vmware backdoor interface to work since it
5679            changes registers values  during IO operation */
5680         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5681                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5682                 emulator_invalidate_register_cache(ctxt);
5683         }
5684
5685 restart:
5686         /* Save the faulting GPA (cr2) in the address field */
5687         ctxt->exception.address = cr2;
5688
5689         r = x86_emulate_insn(ctxt);
5690
5691         if (r == EMULATION_INTERCEPTED)
5692                 return EMULATE_DONE;
5693
5694         if (r == EMULATION_FAILED) {
5695                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5696                                         emulation_type))
5697                         return EMULATE_DONE;
5698
5699                 return handle_emulation_failure(vcpu);
5700         }
5701
5702         if (ctxt->have_exception) {
5703                 r = EMULATE_DONE;
5704                 if (inject_emulated_exception(vcpu))
5705                         return r;
5706         } else if (vcpu->arch.pio.count) {
5707                 if (!vcpu->arch.pio.in) {
5708                         /* FIXME: return into emulator if single-stepping.  */
5709                         vcpu->arch.pio.count = 0;
5710                 } else {
5711                         writeback = false;
5712                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5713                 }
5714                 r = EMULATE_USER_EXIT;
5715         } else if (vcpu->mmio_needed) {
5716                 if (!vcpu->mmio_is_write)
5717                         writeback = false;
5718                 r = EMULATE_USER_EXIT;
5719                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5720         } else if (r == EMULATION_RESTART)
5721                 goto restart;
5722         else
5723                 r = EMULATE_DONE;
5724
5725         if (writeback) {
5726                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5727                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5728                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5729                 kvm_rip_write(vcpu, ctxt->eip);
5730                 if (r == EMULATE_DONE &&
5731                     (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
5732                         kvm_vcpu_do_singlestep(vcpu, &r);
5733                 if (!ctxt->have_exception ||
5734                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5735                         __kvm_set_rflags(vcpu, ctxt->eflags);
5736
5737                 /*
5738                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5739                  * do nothing, and it will be requested again as soon as
5740                  * the shadow expires.  But we still need to check here,
5741                  * because POPF has no interrupt shadow.
5742                  */
5743                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5744                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5745         } else
5746                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5747
5748         return r;
5749 }
5750 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5751
5752 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5753 {
5754         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5755         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5756                                             size, port, &val, 1);
5757         /* do not return to emulator after return from userspace */
5758         vcpu->arch.pio.count = 0;
5759         return ret;
5760 }
5761 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5762
5763 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
5764 {
5765         unsigned long val;
5766
5767         /* We should only ever be called with arch.pio.count equal to 1 */
5768         BUG_ON(vcpu->arch.pio.count != 1);
5769
5770         /* For size less than 4 we merge, else we zero extend */
5771         val = (vcpu->arch.pio.size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX)
5772                                         : 0;
5773
5774         /*
5775          * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
5776          * the copy and tracing
5777          */
5778         emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, vcpu->arch.pio.size,
5779                                  vcpu->arch.pio.port, &val, 1);
5780         kvm_register_write(vcpu, VCPU_REGS_RAX, val);
5781
5782         return 1;
5783 }
5784
5785 int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size, unsigned short port)
5786 {
5787         unsigned long val;
5788         int ret;
5789
5790         /* For size less than 4 we merge, else we zero extend */
5791         val = (size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX) : 0;
5792
5793         ret = emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, size, port,
5794                                        &val, 1);
5795         if (ret) {
5796                 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
5797                 return ret;
5798         }
5799
5800         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
5801
5802         return 0;
5803 }
5804 EXPORT_SYMBOL_GPL(kvm_fast_pio_in);
5805
5806 static int kvmclock_cpu_down_prep(unsigned int cpu)
5807 {
5808         __this_cpu_write(cpu_tsc_khz, 0);
5809         return 0;
5810 }
5811
5812 static void tsc_khz_changed(void *data)
5813 {
5814         struct cpufreq_freqs *freq = data;
5815         unsigned long khz = 0;
5816
5817         if (data)
5818                 khz = freq->new;
5819         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5820                 khz = cpufreq_quick_get(raw_smp_processor_id());
5821         if (!khz)
5822                 khz = tsc_khz;
5823         __this_cpu_write(cpu_tsc_khz, khz);
5824 }
5825
5826 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5827                                      void *data)
5828 {
5829         struct cpufreq_freqs *freq = data;
5830         struct kvm *kvm;
5831         struct kvm_vcpu *vcpu;
5832         int i, send_ipi = 0;
5833
5834         /*
5835          * We allow guests to temporarily run on slowing clocks,
5836          * provided we notify them after, or to run on accelerating
5837          * clocks, provided we notify them before.  Thus time never
5838          * goes backwards.
5839          *
5840          * However, we have a problem.  We can't atomically update
5841          * the frequency of a given CPU from this function; it is
5842          * merely a notifier, which can be called from any CPU.
5843          * Changing the TSC frequency at arbitrary points in time
5844          * requires a recomputation of local variables related to
5845          * the TSC for each VCPU.  We must flag these local variables
5846          * to be updated and be sure the update takes place with the
5847          * new frequency before any guests proceed.
5848          *
5849          * Unfortunately, the combination of hotplug CPU and frequency
5850          * change creates an intractable locking scenario; the order
5851          * of when these callouts happen is undefined with respect to
5852          * CPU hotplug, and they can race with each other.  As such,
5853          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5854          * undefined; you can actually have a CPU frequency change take
5855          * place in between the computation of X and the setting of the
5856          * variable.  To protect against this problem, all updates of
5857          * the per_cpu tsc_khz variable are done in an interrupt
5858          * protected IPI, and all callers wishing to update the value
5859          * must wait for a synchronous IPI to complete (which is trivial
5860          * if the caller is on the CPU already).  This establishes the
5861          * necessary total order on variable updates.
5862          *
5863          * Note that because a guest time update may take place
5864          * anytime after the setting of the VCPU's request bit, the
5865          * correct TSC value must be set before the request.  However,
5866          * to ensure the update actually makes it to any guest which
5867          * starts running in hardware virtualization between the set
5868          * and the acquisition of the spinlock, we must also ping the
5869          * CPU after setting the request bit.
5870          *
5871          */
5872
5873         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5874                 return 0;
5875         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5876                 return 0;
5877
5878         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5879
5880         spin_lock(&kvm_lock);
5881         list_for_each_entry(kvm, &vm_list, vm_list) {
5882                 kvm_for_each_vcpu(i, vcpu, kvm) {
5883                         if (vcpu->cpu != freq->cpu)
5884                                 continue;
5885                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5886                         if (vcpu->cpu != smp_processor_id())
5887                                 send_ipi = 1;
5888                 }
5889         }
5890         spin_unlock(&kvm_lock);
5891
5892         if (freq->old < freq->new && send_ipi) {
5893                 /*
5894                  * We upscale the frequency.  Must make the guest
5895                  * doesn't see old kvmclock values while running with
5896                  * the new frequency, otherwise we risk the guest sees
5897                  * time go backwards.
5898                  *
5899                  * In case we update the frequency for another cpu
5900                  * (which might be in guest context) send an interrupt
5901                  * to kick the cpu out of guest context.  Next time
5902                  * guest context is entered kvmclock will be updated,
5903                  * so the guest will not see stale values.
5904                  */
5905                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5906         }
5907         return 0;
5908 }
5909
5910 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5911         .notifier_call  = kvmclock_cpufreq_notifier
5912 };
5913
5914 static int kvmclock_cpu_online(unsigned int cpu)
5915 {
5916         tsc_khz_changed(NULL);
5917         return 0;
5918 }
5919
5920 static void kvm_timer_init(void)
5921 {
5922         max_tsc_khz = tsc_khz;
5923
5924         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5925 #ifdef CONFIG_CPU_FREQ
5926                 struct cpufreq_policy policy;
5927                 int cpu;
5928
5929                 memset(&policy, 0, sizeof(policy));
5930                 cpu = get_cpu();
5931                 cpufreq_get_policy(&policy, cpu);
5932                 if (policy.cpuinfo.max_freq)
5933                         max_tsc_khz = policy.cpuinfo.max_freq;
5934                 put_cpu();
5935 #endif
5936                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5937                                           CPUFREQ_TRANSITION_NOTIFIER);
5938         }
5939         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5940
5941         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
5942                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
5943 }
5944
5945 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5946
5947 int kvm_is_in_guest(void)
5948 {
5949         return __this_cpu_read(current_vcpu) != NULL;
5950 }
5951
5952 static int kvm_is_user_mode(void)
5953 {
5954         int user_mode = 3;
5955
5956         if (__this_cpu_read(current_vcpu))
5957                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5958
5959         return user_mode != 0;
5960 }
5961
5962 static unsigned long kvm_get_guest_ip(void)
5963 {
5964         unsigned long ip = 0;
5965
5966         if (__this_cpu_read(current_vcpu))
5967                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5968
5969         return ip;
5970 }
5971
5972 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5973         .is_in_guest            = kvm_is_in_guest,
5974         .is_user_mode           = kvm_is_user_mode,
5975         .get_guest_ip           = kvm_get_guest_ip,
5976 };
5977
5978 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5979 {
5980         __this_cpu_write(current_vcpu, vcpu);
5981 }
5982 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5983
5984 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5985 {
5986         __this_cpu_write(current_vcpu, NULL);
5987 }
5988 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5989
5990 static void kvm_set_mmio_spte_mask(void)
5991 {
5992         u64 mask;
5993         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5994
5995         /*
5996          * Set the reserved bits and the present bit of an paging-structure
5997          * entry to generate page fault with PFER.RSV = 1.
5998          */
5999          /* Mask the reserved physical address bits. */
6000         mask = rsvd_bits(maxphyaddr, 51);
6001
6002         /* Set the present bit. */
6003         mask |= 1ull;
6004
6005 #ifdef CONFIG_X86_64
6006         /*
6007          * If reserved bit is not supported, clear the present bit to disable
6008          * mmio page fault.
6009          */
6010         if (maxphyaddr == 52)
6011                 mask &= ~1ull;
6012 #endif
6013
6014         kvm_mmu_set_mmio_spte_mask(mask);
6015 }
6016
6017 #ifdef CONFIG_X86_64
6018 static void pvclock_gtod_update_fn(struct work_struct *work)
6019 {
6020         struct kvm *kvm;
6021
6022         struct kvm_vcpu *vcpu;
6023         int i;
6024
6025         spin_lock(&kvm_lock);
6026         list_for_each_entry(kvm, &vm_list, vm_list)
6027                 kvm_for_each_vcpu(i, vcpu, kvm)
6028                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
6029         atomic_set(&kvm_guest_has_master_clock, 0);
6030         spin_unlock(&kvm_lock);
6031 }
6032
6033 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
6034
6035 /*
6036  * Notification about pvclock gtod data update.
6037  */
6038 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
6039                                void *priv)
6040 {
6041         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
6042         struct timekeeper *tk = priv;
6043
6044         update_pvclock_gtod(tk);
6045
6046         /* disable master clock if host does not trust, or does not
6047          * use, TSC clocksource
6048          */
6049         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
6050             atomic_read(&kvm_guest_has_master_clock) != 0)
6051                 queue_work(system_long_wq, &pvclock_gtod_work);
6052
6053         return 0;
6054 }
6055
6056 static struct notifier_block pvclock_gtod_notifier = {
6057         .notifier_call = pvclock_gtod_notify,
6058 };
6059 #endif
6060
6061 int kvm_arch_init(void *opaque)
6062 {
6063         int r;
6064         struct kvm_x86_ops *ops = opaque;
6065
6066         if (kvm_x86_ops) {
6067                 printk(KERN_ERR "kvm: already loaded the other module\n");
6068                 r = -EEXIST;
6069                 goto out;
6070         }
6071
6072         if (!ops->cpu_has_kvm_support()) {
6073                 printk(KERN_ERR "kvm: no hardware support\n");
6074                 r = -EOPNOTSUPP;
6075                 goto out;
6076         }
6077         if (ops->disabled_by_bios()) {
6078                 printk(KERN_ERR "kvm: disabled by bios\n");
6079                 r = -EOPNOTSUPP;
6080                 goto out;
6081         }
6082
6083         r = -ENOMEM;
6084         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
6085         if (!shared_msrs) {
6086                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
6087                 goto out;
6088         }
6089
6090         r = kvm_mmu_module_init();
6091         if (r)
6092                 goto out_free_percpu;
6093
6094         kvm_set_mmio_spte_mask();
6095
6096         kvm_x86_ops = ops;
6097
6098         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
6099                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
6100                         PT_PRESENT_MASK, 0);
6101         kvm_timer_init();
6102
6103         perf_register_guest_info_callbacks(&kvm_guest_cbs);
6104
6105         if (boot_cpu_has(X86_FEATURE_XSAVE))
6106                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
6107
6108         kvm_lapic_init();
6109 #ifdef CONFIG_X86_64
6110         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
6111 #endif
6112
6113         return 0;
6114
6115 out_free_percpu:
6116         free_percpu(shared_msrs);
6117 out:
6118         return r;
6119 }
6120
6121 void kvm_arch_exit(void)
6122 {
6123         kvm_lapic_exit();
6124         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
6125
6126         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6127                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
6128                                             CPUFREQ_TRANSITION_NOTIFIER);
6129         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
6130 #ifdef CONFIG_X86_64
6131         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
6132 #endif
6133         kvm_x86_ops = NULL;
6134         kvm_mmu_module_exit();
6135         free_percpu(shared_msrs);
6136 }
6137
6138 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
6139 {
6140         ++vcpu->stat.halt_exits;
6141         if (lapic_in_kernel(vcpu)) {
6142                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
6143                 return 1;
6144         } else {
6145                 vcpu->run->exit_reason = KVM_EXIT_HLT;
6146                 return 0;
6147         }
6148 }
6149 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
6150
6151 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
6152 {
6153         int ret = kvm_skip_emulated_instruction(vcpu);
6154         /*
6155          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6156          * KVM_EXIT_DEBUG here.
6157          */
6158         return kvm_vcpu_halt(vcpu) && ret;
6159 }
6160 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
6161
6162 #ifdef CONFIG_X86_64
6163 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
6164                                 unsigned long clock_type)
6165 {
6166         struct kvm_clock_pairing clock_pairing;
6167         struct timespec ts;
6168         u64 cycle;
6169         int ret;
6170
6171         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
6172                 return -KVM_EOPNOTSUPP;
6173
6174         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
6175                 return -KVM_EOPNOTSUPP;
6176
6177         clock_pairing.sec = ts.tv_sec;
6178         clock_pairing.nsec = ts.tv_nsec;
6179         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
6180         clock_pairing.flags = 0;
6181
6182         ret = 0;
6183         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
6184                             sizeof(struct kvm_clock_pairing)))
6185                 ret = -KVM_EFAULT;
6186
6187         return ret;
6188 }
6189 #endif
6190
6191 /*
6192  * kvm_pv_kick_cpu_op:  Kick a vcpu.
6193  *
6194  * @apicid - apicid of vcpu to be kicked.
6195  */
6196 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
6197 {
6198         struct kvm_lapic_irq lapic_irq;
6199
6200         lapic_irq.shorthand = 0;
6201         lapic_irq.dest_mode = 0;
6202         lapic_irq.dest_id = apicid;
6203         lapic_irq.msi_redir_hint = false;
6204
6205         lapic_irq.delivery_mode = APIC_DM_REMRD;
6206         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
6207 }
6208
6209 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
6210 {
6211         vcpu->arch.apicv_active = false;
6212         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
6213 }
6214
6215 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
6216 {
6217         unsigned long nr, a0, a1, a2, a3, ret;
6218         int op_64_bit, r;
6219
6220         r = kvm_skip_emulated_instruction(vcpu);
6221
6222         if (kvm_hv_hypercall_enabled(vcpu->kvm))
6223                 return kvm_hv_hypercall(vcpu);
6224
6225         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
6226         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
6227         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
6228         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
6229         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
6230
6231         trace_kvm_hypercall(nr, a0, a1, a2, a3);
6232
6233         op_64_bit = is_64_bit_mode(vcpu);
6234         if (!op_64_bit) {
6235                 nr &= 0xFFFFFFFF;
6236                 a0 &= 0xFFFFFFFF;
6237                 a1 &= 0xFFFFFFFF;
6238                 a2 &= 0xFFFFFFFF;
6239                 a3 &= 0xFFFFFFFF;
6240         }
6241
6242         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
6243                 ret = -KVM_EPERM;
6244                 goto out;
6245         }
6246
6247         switch (nr) {
6248         case KVM_HC_VAPIC_POLL_IRQ:
6249                 ret = 0;
6250                 break;
6251         case KVM_HC_KICK_CPU:
6252                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
6253                 ret = 0;
6254                 break;
6255 #ifdef CONFIG_X86_64
6256         case KVM_HC_CLOCK_PAIRING:
6257                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
6258                 break;
6259 #endif
6260         default:
6261                 ret = -KVM_ENOSYS;
6262                 break;
6263         }
6264 out:
6265         if (!op_64_bit)
6266                 ret = (u32)ret;
6267         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
6268         ++vcpu->stat.hypercalls;
6269         return r;
6270 }
6271 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
6272
6273 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
6274 {
6275         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6276         char instruction[3];
6277         unsigned long rip = kvm_rip_read(vcpu);
6278
6279         kvm_x86_ops->patch_hypercall(vcpu, instruction);
6280
6281         return emulator_write_emulated(ctxt, rip, instruction, 3,
6282                 &ctxt->exception);
6283 }
6284
6285 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
6286 {
6287         return vcpu->run->request_interrupt_window &&
6288                 likely(!pic_in_kernel(vcpu->kvm));
6289 }
6290
6291 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
6292 {
6293         struct kvm_run *kvm_run = vcpu->run;
6294
6295         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
6296         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
6297         kvm_run->cr8 = kvm_get_cr8(vcpu);
6298         kvm_run->apic_base = kvm_get_apic_base(vcpu);
6299         kvm_run->ready_for_interrupt_injection =
6300                 pic_in_kernel(vcpu->kvm) ||
6301                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
6302 }
6303
6304 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
6305 {
6306         int max_irr, tpr;
6307
6308         if (!kvm_x86_ops->update_cr8_intercept)
6309                 return;
6310
6311         if (!lapic_in_kernel(vcpu))
6312                 return;
6313
6314         if (vcpu->arch.apicv_active)
6315                 return;
6316
6317         if (!vcpu->arch.apic->vapic_addr)
6318                 max_irr = kvm_lapic_find_highest_irr(vcpu);
6319         else
6320                 max_irr = -1;
6321
6322         if (max_irr != -1)
6323                 max_irr >>= 4;
6324
6325         tpr = kvm_lapic_get_cr8(vcpu);
6326
6327         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
6328 }
6329
6330 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
6331 {
6332         int r;
6333
6334         /* try to reinject previous events if any */
6335         if (vcpu->arch.exception.pending) {
6336                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
6337                                         vcpu->arch.exception.has_error_code,
6338                                         vcpu->arch.exception.error_code);
6339
6340                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
6341                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
6342                                              X86_EFLAGS_RF);
6343
6344                 if (vcpu->arch.exception.nr == DB_VECTOR &&
6345                     (vcpu->arch.dr7 & DR7_GD)) {
6346                         vcpu->arch.dr7 &= ~DR7_GD;
6347                         kvm_update_dr7(vcpu);
6348                 }
6349
6350                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
6351                                           vcpu->arch.exception.has_error_code,
6352                                           vcpu->arch.exception.error_code,
6353                                           vcpu->arch.exception.reinject);
6354                 return 0;
6355         }
6356
6357         if (vcpu->arch.nmi_injected) {
6358                 kvm_x86_ops->set_nmi(vcpu);
6359                 return 0;
6360         }
6361
6362         if (vcpu->arch.interrupt.pending) {
6363                 kvm_x86_ops->set_irq(vcpu);
6364                 return 0;
6365         }
6366
6367         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6368                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6369                 if (r != 0)
6370                         return r;
6371         }
6372
6373         /* try to inject new event if pending */
6374         if (vcpu->arch.smi_pending && !is_smm(vcpu)) {
6375                 vcpu->arch.smi_pending = false;
6376                 enter_smm(vcpu);
6377         } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
6378                 --vcpu->arch.nmi_pending;
6379                 vcpu->arch.nmi_injected = true;
6380                 kvm_x86_ops->set_nmi(vcpu);
6381         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6382                 /*
6383                  * Because interrupts can be injected asynchronously, we are
6384                  * calling check_nested_events again here to avoid a race condition.
6385                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6386                  * proposal and current concerns.  Perhaps we should be setting
6387                  * KVM_REQ_EVENT only on certain events and not unconditionally?
6388                  */
6389                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6390                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6391                         if (r != 0)
6392                                 return r;
6393                 }
6394                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6395                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6396                                             false);
6397                         kvm_x86_ops->set_irq(vcpu);
6398                 }
6399         }
6400
6401         return 0;
6402 }
6403
6404 static void process_nmi(struct kvm_vcpu *vcpu)
6405 {
6406         unsigned limit = 2;
6407
6408         /*
6409          * x86 is limited to one NMI running, and one NMI pending after it.
6410          * If an NMI is already in progress, limit further NMIs to just one.
6411          * Otherwise, allow two (and we'll inject the first one immediately).
6412          */
6413         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6414                 limit = 1;
6415
6416         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6417         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6418         kvm_make_request(KVM_REQ_EVENT, vcpu);
6419 }
6420
6421 #define put_smstate(type, buf, offset, val)                       \
6422         *(type *)((buf) + (offset) - 0x7e00) = val
6423
6424 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
6425 {
6426         u32 flags = 0;
6427         flags |= seg->g       << 23;
6428         flags |= seg->db      << 22;
6429         flags |= seg->l       << 21;
6430         flags |= seg->avl     << 20;
6431         flags |= seg->present << 15;
6432         flags |= seg->dpl     << 13;
6433         flags |= seg->s       << 12;
6434         flags |= seg->type    << 8;
6435         return flags;
6436 }
6437
6438 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
6439 {
6440         struct kvm_segment seg;
6441         int offset;
6442
6443         kvm_get_segment(vcpu, &seg, n);
6444         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
6445
6446         if (n < 3)
6447                 offset = 0x7f84 + n * 12;
6448         else
6449                 offset = 0x7f2c + (n - 3) * 12;
6450
6451         put_smstate(u32, buf, offset + 8, seg.base);
6452         put_smstate(u32, buf, offset + 4, seg.limit);
6453         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
6454 }
6455
6456 #ifdef CONFIG_X86_64
6457 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
6458 {
6459         struct kvm_segment seg;
6460         int offset;
6461         u16 flags;
6462
6463         kvm_get_segment(vcpu, &seg, n);
6464         offset = 0x7e00 + n * 16;
6465
6466         flags = enter_smm_get_segment_flags(&seg) >> 8;
6467         put_smstate(u16, buf, offset, seg.selector);
6468         put_smstate(u16, buf, offset + 2, flags);
6469         put_smstate(u32, buf, offset + 4, seg.limit);
6470         put_smstate(u64, buf, offset + 8, seg.base);
6471 }
6472 #endif
6473
6474 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6475 {
6476         struct desc_ptr dt;
6477         struct kvm_segment seg;
6478         unsigned long val;
6479         int i;
6480
6481         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6482         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6483         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6484         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6485
6486         for (i = 0; i < 8; i++)
6487                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6488
6489         kvm_get_dr(vcpu, 6, &val);
6490         put_smstate(u32, buf, 0x7fcc, (u32)val);
6491         kvm_get_dr(vcpu, 7, &val);
6492         put_smstate(u32, buf, 0x7fc8, (u32)val);
6493
6494         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6495         put_smstate(u32, buf, 0x7fc4, seg.selector);
6496         put_smstate(u32, buf, 0x7f64, seg.base);
6497         put_smstate(u32, buf, 0x7f60, seg.limit);
6498         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
6499
6500         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6501         put_smstate(u32, buf, 0x7fc0, seg.selector);
6502         put_smstate(u32, buf, 0x7f80, seg.base);
6503         put_smstate(u32, buf, 0x7f7c, seg.limit);
6504         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
6505
6506         kvm_x86_ops->get_gdt(vcpu, &dt);
6507         put_smstate(u32, buf, 0x7f74, dt.address);
6508         put_smstate(u32, buf, 0x7f70, dt.size);
6509
6510         kvm_x86_ops->get_idt(vcpu, &dt);
6511         put_smstate(u32, buf, 0x7f58, dt.address);
6512         put_smstate(u32, buf, 0x7f54, dt.size);
6513
6514         for (i = 0; i < 6; i++)
6515                 enter_smm_save_seg_32(vcpu, buf, i);
6516
6517         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6518
6519         /* revision id */
6520         put_smstate(u32, buf, 0x7efc, 0x00020000);
6521         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6522 }
6523
6524 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6525 {
6526 #ifdef CONFIG_X86_64
6527         struct desc_ptr dt;
6528         struct kvm_segment seg;
6529         unsigned long val;
6530         int i;
6531
6532         for (i = 0; i < 16; i++)
6533                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6534
6535         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6536         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6537
6538         kvm_get_dr(vcpu, 6, &val);
6539         put_smstate(u64, buf, 0x7f68, val);
6540         kvm_get_dr(vcpu, 7, &val);
6541         put_smstate(u64, buf, 0x7f60, val);
6542
6543         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6544         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6545         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6546
6547         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6548
6549         /* revision id */
6550         put_smstate(u32, buf, 0x7efc, 0x00020064);
6551
6552         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6553
6554         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6555         put_smstate(u16, buf, 0x7e90, seg.selector);
6556         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
6557         put_smstate(u32, buf, 0x7e94, seg.limit);
6558         put_smstate(u64, buf, 0x7e98, seg.base);
6559
6560         kvm_x86_ops->get_idt(vcpu, &dt);
6561         put_smstate(u32, buf, 0x7e84, dt.size);
6562         put_smstate(u64, buf, 0x7e88, dt.address);
6563
6564         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6565         put_smstate(u16, buf, 0x7e70, seg.selector);
6566         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
6567         put_smstate(u32, buf, 0x7e74, seg.limit);
6568         put_smstate(u64, buf, 0x7e78, seg.base);
6569
6570         kvm_x86_ops->get_gdt(vcpu, &dt);
6571         put_smstate(u32, buf, 0x7e64, dt.size);
6572         put_smstate(u64, buf, 0x7e68, dt.address);
6573
6574         for (i = 0; i < 6; i++)
6575                 enter_smm_save_seg_64(vcpu, buf, i);
6576 #else
6577         WARN_ON_ONCE(1);
6578 #endif
6579 }
6580
6581 static void enter_smm(struct kvm_vcpu *vcpu)
6582 {
6583         struct kvm_segment cs, ds;
6584         struct desc_ptr dt;
6585         char buf[512];
6586         u32 cr0;
6587
6588         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6589         vcpu->arch.hflags |= HF_SMM_MASK;
6590         memset(buf, 0, 512);
6591         if (guest_cpuid_has_longmode(vcpu))
6592                 enter_smm_save_state_64(vcpu, buf);
6593         else
6594                 enter_smm_save_state_32(vcpu, buf);
6595
6596         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6597
6598         if (kvm_x86_ops->get_nmi_mask(vcpu))
6599                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6600         else
6601                 kvm_x86_ops->set_nmi_mask(vcpu, true);
6602
6603         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6604         kvm_rip_write(vcpu, 0x8000);
6605
6606         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6607         kvm_x86_ops->set_cr0(vcpu, cr0);
6608         vcpu->arch.cr0 = cr0;
6609
6610         kvm_x86_ops->set_cr4(vcpu, 0);
6611
6612         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
6613         dt.address = dt.size = 0;
6614         kvm_x86_ops->set_idt(vcpu, &dt);
6615
6616         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6617
6618         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6619         cs.base = vcpu->arch.smbase;
6620
6621         ds.selector = 0;
6622         ds.base = 0;
6623
6624         cs.limit    = ds.limit = 0xffffffff;
6625         cs.type     = ds.type = 0x3;
6626         cs.dpl      = ds.dpl = 0;
6627         cs.db       = ds.db = 0;
6628         cs.s        = ds.s = 1;
6629         cs.l        = ds.l = 0;
6630         cs.g        = ds.g = 1;
6631         cs.avl      = ds.avl = 0;
6632         cs.present  = ds.present = 1;
6633         cs.unusable = ds.unusable = 0;
6634         cs.padding  = ds.padding = 0;
6635
6636         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6637         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6638         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6639         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
6640         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
6641         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
6642
6643         if (guest_cpuid_has_longmode(vcpu))
6644                 kvm_x86_ops->set_efer(vcpu, 0);
6645
6646         kvm_update_cpuid(vcpu);
6647         kvm_mmu_reset_context(vcpu);
6648 }
6649
6650 static void process_smi(struct kvm_vcpu *vcpu)
6651 {
6652         vcpu->arch.smi_pending = true;
6653         kvm_make_request(KVM_REQ_EVENT, vcpu);
6654 }
6655
6656 void kvm_make_scan_ioapic_request(struct kvm *kvm)
6657 {
6658         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
6659 }
6660
6661 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6662 {
6663         u64 eoi_exit_bitmap[4];
6664
6665         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6666                 return;
6667
6668         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
6669
6670         if (irqchip_split(vcpu->kvm))
6671                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
6672         else {
6673                 if (kvm_x86_ops->sync_pir_to_irr && vcpu->arch.apicv_active)
6674                         kvm_x86_ops->sync_pir_to_irr(vcpu);
6675                 kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
6676         }
6677         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
6678                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
6679         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
6680 }
6681
6682 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6683 {
6684         ++vcpu->stat.tlb_flush;
6685         kvm_x86_ops->tlb_flush(vcpu);
6686 }
6687
6688 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6689 {
6690         struct page *page = NULL;
6691
6692         if (!lapic_in_kernel(vcpu))
6693                 return;
6694
6695         if (!kvm_x86_ops->set_apic_access_page_addr)
6696                 return;
6697
6698         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6699         if (is_error_page(page))
6700                 return;
6701         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6702
6703         /*
6704          * Do not pin apic access page in memory, the MMU notifier
6705          * will call us again if it is migrated or swapped out.
6706          */
6707         put_page(page);
6708 }
6709 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6710
6711 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
6712                                            unsigned long address)
6713 {
6714         /*
6715          * The physical address of apic access page is stored in the VMCS.
6716          * Update it when it becomes invalid.
6717          */
6718         if (address == gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT))
6719                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6720 }
6721
6722 /*
6723  * Returns 1 to let vcpu_run() continue the guest execution loop without
6724  * exiting to the userspace.  Otherwise, the value will be returned to the
6725  * userspace.
6726  */
6727 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6728 {
6729         int r;
6730         bool req_int_win =
6731                 dm_request_for_irq_injection(vcpu) &&
6732                 kvm_cpu_accept_dm_intr(vcpu);
6733
6734         bool req_immediate_exit = false;
6735
6736         if (vcpu->requests) {
6737                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6738                         kvm_mmu_unload(vcpu);
6739                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6740                         __kvm_migrate_timers(vcpu);
6741                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6742                         kvm_gen_update_masterclock(vcpu->kvm);
6743                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6744                         kvm_gen_kvmclock_update(vcpu);
6745                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6746                         r = kvm_guest_time_update(vcpu);
6747                         if (unlikely(r))
6748                                 goto out;
6749                 }
6750                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6751                         kvm_mmu_sync_roots(vcpu);
6752                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6753                         kvm_vcpu_flush_tlb(vcpu);
6754                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6755                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6756                         r = 0;
6757                         goto out;
6758                 }
6759                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6760                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6761                         r = 0;
6762                         goto out;
6763                 }
6764                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6765                         /* Page is swapped out. Do synthetic halt */
6766                         vcpu->arch.apf.halted = true;
6767                         r = 1;
6768                         goto out;
6769                 }
6770                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6771                         record_steal_time(vcpu);
6772                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
6773                         process_smi(vcpu);
6774                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6775                         process_nmi(vcpu);
6776                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6777                         kvm_pmu_handle_event(vcpu);
6778                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6779                         kvm_pmu_deliver_pmi(vcpu);
6780                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
6781                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
6782                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
6783                                      vcpu->arch.ioapic_handled_vectors)) {
6784                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
6785                                 vcpu->run->eoi.vector =
6786                                                 vcpu->arch.pending_ioapic_eoi;
6787                                 r = 0;
6788                                 goto out;
6789                         }
6790                 }
6791                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6792                         vcpu_scan_ioapic(vcpu);
6793                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6794                         kvm_vcpu_reload_apic_access_page(vcpu);
6795                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
6796                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6797                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
6798                         r = 0;
6799                         goto out;
6800                 }
6801                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
6802                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6803                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
6804                         r = 0;
6805                         goto out;
6806                 }
6807                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
6808                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
6809                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
6810                         r = 0;
6811                         goto out;
6812                 }
6813
6814                 /*
6815                  * KVM_REQ_HV_STIMER has to be processed after
6816                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
6817                  * depend on the guest clock being up-to-date
6818                  */
6819                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
6820                         kvm_hv_process_stimers(vcpu);
6821         }
6822
6823         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6824                 ++vcpu->stat.req_event;
6825                 kvm_apic_accept_events(vcpu);
6826                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6827                         r = 1;
6828                         goto out;
6829                 }
6830
6831                 if (inject_pending_event(vcpu, req_int_win) != 0)
6832                         req_immediate_exit = true;
6833                 else {
6834                         /* Enable NMI/IRQ window open exits if needed.
6835                          *
6836                          * SMIs have two cases: 1) they can be nested, and
6837                          * then there is nothing to do here because RSM will
6838                          * cause a vmexit anyway; 2) or the SMI can be pending
6839                          * because inject_pending_event has completed the
6840                          * injection of an IRQ or NMI from the previous vmexit,
6841                          * and then we request an immediate exit to inject the SMI.
6842                          */
6843                         if (vcpu->arch.smi_pending && !is_smm(vcpu))
6844                                 req_immediate_exit = true;
6845                         if (vcpu->arch.nmi_pending)
6846                                 kvm_x86_ops->enable_nmi_window(vcpu);
6847                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6848                                 kvm_x86_ops->enable_irq_window(vcpu);
6849                 }
6850
6851                 if (kvm_lapic_enabled(vcpu)) {
6852                         update_cr8_intercept(vcpu);
6853                         kvm_lapic_sync_to_vapic(vcpu);
6854                 }
6855         }
6856
6857         r = kvm_mmu_reload(vcpu);
6858         if (unlikely(r)) {
6859                 goto cancel_injection;
6860         }
6861
6862         preempt_disable();
6863
6864         kvm_x86_ops->prepare_guest_switch(vcpu);
6865         kvm_load_guest_fpu(vcpu);
6866
6867         /*
6868          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
6869          * IPI are then delayed after guest entry, which ensures that they
6870          * result in virtual interrupt delivery.
6871          */
6872         local_irq_disable();
6873         vcpu->mode = IN_GUEST_MODE;
6874
6875         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6876
6877         /*
6878          * 1) We should set ->mode before checking ->requests.  Please see
6879          * the comment in kvm_vcpu_exiting_guest_mode().
6880          *
6881          * 2) For APICv, we should set ->mode before checking PIR.ON.  This
6882          * pairs with the memory barrier implicit in pi_test_and_set_on
6883          * (see vmx_deliver_posted_interrupt).
6884          *
6885          * 3) This also orders the write to mode from any reads to the page
6886          * tables done while the VCPU is running.  Please see the comment
6887          * in kvm_flush_remote_tlbs.
6888          */
6889         smp_mb__after_srcu_read_unlock();
6890
6891         /*
6892          * This handles the case where a posted interrupt was
6893          * notified with kvm_vcpu_kick.
6894          */
6895         if (kvm_lapic_enabled(vcpu)) {
6896                 if (kvm_x86_ops->sync_pir_to_irr && vcpu->arch.apicv_active)
6897                         kvm_x86_ops->sync_pir_to_irr(vcpu);
6898         }
6899
6900         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
6901             || need_resched() || signal_pending(current)) {
6902                 vcpu->mode = OUTSIDE_GUEST_MODE;
6903                 smp_wmb();
6904                 local_irq_enable();
6905                 preempt_enable();
6906                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6907                 r = 1;
6908                 goto cancel_injection;
6909         }
6910
6911         kvm_load_guest_xcr0(vcpu);
6912
6913         if (req_immediate_exit) {
6914                 kvm_make_request(KVM_REQ_EVENT, vcpu);
6915                 smp_send_reschedule(vcpu->cpu);
6916         }
6917
6918         trace_kvm_entry(vcpu->vcpu_id);
6919         wait_lapic_expire(vcpu);
6920         guest_enter_irqoff();
6921
6922         if (unlikely(vcpu->arch.switch_db_regs)) {
6923                 set_debugreg(0, 7);
6924                 set_debugreg(vcpu->arch.eff_db[0], 0);
6925                 set_debugreg(vcpu->arch.eff_db[1], 1);
6926                 set_debugreg(vcpu->arch.eff_db[2], 2);
6927                 set_debugreg(vcpu->arch.eff_db[3], 3);
6928                 set_debugreg(vcpu->arch.dr6, 6);
6929                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6930         }
6931
6932         kvm_x86_ops->run(vcpu);
6933
6934         /*
6935          * Do this here before restoring debug registers on the host.  And
6936          * since we do this before handling the vmexit, a DR access vmexit
6937          * can (a) read the correct value of the debug registers, (b) set
6938          * KVM_DEBUGREG_WONT_EXIT again.
6939          */
6940         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6941                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6942                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6943                 kvm_update_dr0123(vcpu);
6944                 kvm_update_dr6(vcpu);
6945                 kvm_update_dr7(vcpu);
6946                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6947         }
6948
6949         /*
6950          * If the guest has used debug registers, at least dr7
6951          * will be disabled while returning to the host.
6952          * If we don't have active breakpoints in the host, we don't
6953          * care about the messed up debug address registers. But if
6954          * we have some of them active, restore the old state.
6955          */
6956         if (hw_breakpoint_active())
6957                 hw_breakpoint_restore();
6958
6959         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
6960
6961         vcpu->mode = OUTSIDE_GUEST_MODE;
6962         smp_wmb();
6963
6964         kvm_put_guest_xcr0(vcpu);
6965
6966         kvm_x86_ops->handle_external_intr(vcpu);
6967
6968         ++vcpu->stat.exits;
6969
6970         guest_exit_irqoff();
6971
6972         local_irq_enable();
6973         preempt_enable();
6974
6975         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6976
6977         /*
6978          * Profile KVM exit RIPs:
6979          */
6980         if (unlikely(prof_on == KVM_PROFILING)) {
6981                 unsigned long rip = kvm_rip_read(vcpu);
6982                 profile_hit(KVM_PROFILING, (void *)rip);
6983         }
6984
6985         if (unlikely(vcpu->arch.tsc_always_catchup))
6986                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6987
6988         if (vcpu->arch.apic_attention)
6989                 kvm_lapic_sync_from_vapic(vcpu);
6990
6991         r = kvm_x86_ops->handle_exit(vcpu);
6992         return r;
6993
6994 cancel_injection:
6995         kvm_x86_ops->cancel_injection(vcpu);
6996         if (unlikely(vcpu->arch.apic_attention))
6997                 kvm_lapic_sync_from_vapic(vcpu);
6998 out:
6999         return r;
7000 }
7001
7002 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
7003 {
7004         if (!kvm_arch_vcpu_runnable(vcpu) &&
7005             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
7006                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7007                 kvm_vcpu_block(vcpu);
7008                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7009
7010                 if (kvm_x86_ops->post_block)
7011                         kvm_x86_ops->post_block(vcpu);
7012
7013                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
7014                         return 1;
7015         }
7016
7017         kvm_apic_accept_events(vcpu);
7018         switch(vcpu->arch.mp_state) {
7019         case KVM_MP_STATE_HALTED:
7020                 vcpu->arch.pv.pv_unhalted = false;
7021                 vcpu->arch.mp_state =
7022                         KVM_MP_STATE_RUNNABLE;
7023         case KVM_MP_STATE_RUNNABLE:
7024                 vcpu->arch.apf.halted = false;
7025                 break;
7026         case KVM_MP_STATE_INIT_RECEIVED:
7027                 break;
7028         default:
7029                 return -EINTR;
7030                 break;
7031         }
7032         return 1;
7033 }
7034
7035 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
7036 {
7037         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
7038                 kvm_x86_ops->check_nested_events(vcpu, false);
7039
7040         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7041                 !vcpu->arch.apf.halted);
7042 }
7043
7044 static int vcpu_run(struct kvm_vcpu *vcpu)
7045 {
7046         int r;
7047         struct kvm *kvm = vcpu->kvm;
7048
7049         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7050
7051         for (;;) {
7052                 if (kvm_vcpu_running(vcpu)) {
7053                         r = vcpu_enter_guest(vcpu);
7054                 } else {
7055                         r = vcpu_block(kvm, vcpu);
7056                 }
7057
7058                 if (r <= 0)
7059                         break;
7060
7061                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
7062                 if (kvm_cpu_has_pending_timer(vcpu))
7063                         kvm_inject_pending_timer_irqs(vcpu);
7064
7065                 if (dm_request_for_irq_injection(vcpu) &&
7066                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
7067                         r = 0;
7068                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
7069                         ++vcpu->stat.request_irq_exits;
7070                         break;
7071                 }
7072
7073                 kvm_check_async_pf_completion(vcpu);
7074
7075                 if (signal_pending(current)) {
7076                         r = -EINTR;
7077                         vcpu->run->exit_reason = KVM_EXIT_INTR;
7078                         ++vcpu->stat.signal_exits;
7079                         break;
7080                 }
7081                 if (need_resched()) {
7082                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7083                         cond_resched();
7084                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7085                 }
7086         }
7087
7088         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7089
7090         return r;
7091 }
7092
7093 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
7094 {
7095         int r;
7096         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7097         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
7098         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
7099         if (r != EMULATE_DONE)
7100                 return 0;
7101         return 1;
7102 }
7103
7104 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
7105 {
7106         BUG_ON(!vcpu->arch.pio.count);
7107
7108         return complete_emulated_io(vcpu);
7109 }
7110
7111 /*
7112  * Implements the following, as a state machine:
7113  *
7114  * read:
7115  *   for each fragment
7116  *     for each mmio piece in the fragment
7117  *       write gpa, len
7118  *       exit
7119  *       copy data
7120  *   execute insn
7121  *
7122  * write:
7123  *   for each fragment
7124  *     for each mmio piece in the fragment
7125  *       write gpa, len
7126  *       copy data
7127  *       exit
7128  */
7129 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
7130 {
7131         struct kvm_run *run = vcpu->run;
7132         struct kvm_mmio_fragment *frag;
7133         unsigned len;
7134
7135         BUG_ON(!vcpu->mmio_needed);
7136
7137         /* Complete previous fragment */
7138         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
7139         len = min(8u, frag->len);
7140         if (!vcpu->mmio_is_write)
7141                 memcpy(frag->data, run->mmio.data, len);
7142
7143         if (frag->len <= 8) {
7144                 /* Switch to the next fragment. */
7145                 frag++;
7146                 vcpu->mmio_cur_fragment++;
7147         } else {
7148                 /* Go forward to the next mmio piece. */
7149                 frag->data += len;
7150                 frag->gpa += len;
7151                 frag->len -= len;
7152         }
7153
7154         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
7155                 vcpu->mmio_needed = 0;
7156
7157                 /* FIXME: return into emulator if single-stepping.  */
7158                 if (vcpu->mmio_is_write)
7159                         return 1;
7160                 vcpu->mmio_read_completed = 1;
7161                 return complete_emulated_io(vcpu);
7162         }
7163
7164         run->exit_reason = KVM_EXIT_MMIO;
7165         run->mmio.phys_addr = frag->gpa;
7166         if (vcpu->mmio_is_write)
7167                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
7168         run->mmio.len = min(8u, frag->len);
7169         run->mmio.is_write = vcpu->mmio_is_write;
7170         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7171         return 0;
7172 }
7173
7174
7175 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
7176 {
7177         struct fpu *fpu = &current->thread.fpu;
7178         int r;
7179         sigset_t sigsaved;
7180
7181         fpu__activate_curr(fpu);
7182
7183         if (vcpu->sigset_active)
7184                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
7185
7186         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
7187                 kvm_vcpu_block(vcpu);
7188                 kvm_apic_accept_events(vcpu);
7189                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
7190                 r = -EAGAIN;
7191                 goto out;
7192         }
7193
7194         /* re-sync apic's tpr */
7195         if (!lapic_in_kernel(vcpu)) {
7196                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
7197                         r = -EINVAL;
7198                         goto out;
7199                 }
7200         }
7201
7202         if (unlikely(vcpu->arch.complete_userspace_io)) {
7203                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
7204                 vcpu->arch.complete_userspace_io = NULL;
7205                 r = cui(vcpu);
7206                 if (r <= 0)
7207                         goto out;
7208         } else
7209                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
7210
7211         if (kvm_run->immediate_exit)
7212                 r = -EINTR;
7213         else
7214                 r = vcpu_run(vcpu);
7215
7216 out:
7217         post_kvm_run_save(vcpu);
7218         if (vcpu->sigset_active)
7219                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
7220
7221         return r;
7222 }
7223
7224 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7225 {
7226         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
7227                 /*
7228                  * We are here if userspace calls get_regs() in the middle of
7229                  * instruction emulation. Registers state needs to be copied
7230                  * back from emulation context to vcpu. Userspace shouldn't do
7231                  * that usually, but some bad designed PV devices (vmware
7232                  * backdoor interface) need this to work
7233                  */
7234                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
7235                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7236         }
7237         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
7238         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
7239         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
7240         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
7241         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
7242         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
7243         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
7244         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
7245 #ifdef CONFIG_X86_64
7246         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
7247         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
7248         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
7249         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
7250         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
7251         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
7252         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
7253         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
7254 #endif
7255
7256         regs->rip = kvm_rip_read(vcpu);
7257         regs->rflags = kvm_get_rflags(vcpu);
7258
7259         return 0;
7260 }
7261
7262 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7263 {
7264         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
7265         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7266
7267         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
7268         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
7269         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
7270         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
7271         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
7272         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
7273         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
7274         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
7275 #ifdef CONFIG_X86_64
7276         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
7277         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
7278         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
7279         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
7280         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
7281         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
7282         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
7283         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
7284 #endif
7285
7286         kvm_rip_write(vcpu, regs->rip);
7287         kvm_set_rflags(vcpu, regs->rflags);
7288
7289         vcpu->arch.exception.pending = false;
7290
7291         kvm_make_request(KVM_REQ_EVENT, vcpu);
7292
7293         return 0;
7294 }
7295
7296 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
7297 {
7298         struct kvm_segment cs;
7299
7300         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7301         *db = cs.db;
7302         *l = cs.l;
7303 }
7304 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
7305
7306 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
7307                                   struct kvm_sregs *sregs)
7308 {
7309         struct desc_ptr dt;
7310
7311         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7312         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7313         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7314         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7315         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7316         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7317
7318         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7319         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7320
7321         kvm_x86_ops->get_idt(vcpu, &dt);
7322         sregs->idt.limit = dt.size;
7323         sregs->idt.base = dt.address;
7324         kvm_x86_ops->get_gdt(vcpu, &dt);
7325         sregs->gdt.limit = dt.size;
7326         sregs->gdt.base = dt.address;
7327
7328         sregs->cr0 = kvm_read_cr0(vcpu);
7329         sregs->cr2 = vcpu->arch.cr2;
7330         sregs->cr3 = kvm_read_cr3(vcpu);
7331         sregs->cr4 = kvm_read_cr4(vcpu);
7332         sregs->cr8 = kvm_get_cr8(vcpu);
7333         sregs->efer = vcpu->arch.efer;
7334         sregs->apic_base = kvm_get_apic_base(vcpu);
7335
7336         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
7337
7338         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
7339                 set_bit(vcpu->arch.interrupt.nr,
7340                         (unsigned long *)sregs->interrupt_bitmap);
7341
7342         return 0;
7343 }
7344
7345 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
7346                                     struct kvm_mp_state *mp_state)
7347 {
7348         kvm_apic_accept_events(vcpu);
7349         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
7350                                         vcpu->arch.pv.pv_unhalted)
7351                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
7352         else
7353                 mp_state->mp_state = vcpu->arch.mp_state;
7354
7355         return 0;
7356 }
7357
7358 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
7359                                     struct kvm_mp_state *mp_state)
7360 {
7361         if (!lapic_in_kernel(vcpu) &&
7362             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
7363                 return -EINVAL;
7364
7365         /* INITs are latched while in SMM */
7366         if ((is_smm(vcpu) || vcpu->arch.smi_pending) &&
7367             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
7368              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
7369                 return -EINVAL;
7370
7371         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
7372                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
7373                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
7374         } else
7375                 vcpu->arch.mp_state = mp_state->mp_state;
7376         kvm_make_request(KVM_REQ_EVENT, vcpu);
7377         return 0;
7378 }
7379
7380 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
7381                     int reason, bool has_error_code, u32 error_code)
7382 {
7383         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
7384         int ret;
7385
7386         init_emulate_ctxt(vcpu);
7387
7388         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
7389                                    has_error_code, error_code);
7390
7391         if (ret)
7392                 return EMULATE_FAIL;
7393
7394         kvm_rip_write(vcpu, ctxt->eip);
7395         kvm_set_rflags(vcpu, ctxt->eflags);
7396         kvm_make_request(KVM_REQ_EVENT, vcpu);
7397         return EMULATE_DONE;
7398 }
7399 EXPORT_SYMBOL_GPL(kvm_task_switch);
7400
7401 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
7402                                   struct kvm_sregs *sregs)
7403 {
7404         struct msr_data apic_base_msr;
7405         int mmu_reset_needed = 0;
7406         int pending_vec, max_bits, idx;
7407         struct desc_ptr dt;
7408
7409         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
7410                 return -EINVAL;
7411
7412         dt.size = sregs->idt.limit;
7413         dt.address = sregs->idt.base;
7414         kvm_x86_ops->set_idt(vcpu, &dt);
7415         dt.size = sregs->gdt.limit;
7416         dt.address = sregs->gdt.base;
7417         kvm_x86_ops->set_gdt(vcpu, &dt);
7418
7419         vcpu->arch.cr2 = sregs->cr2;
7420         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
7421         vcpu->arch.cr3 = sregs->cr3;
7422         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
7423
7424         kvm_set_cr8(vcpu, sregs->cr8);
7425
7426         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
7427         kvm_x86_ops->set_efer(vcpu, sregs->efer);
7428         apic_base_msr.data = sregs->apic_base;
7429         apic_base_msr.host_initiated = true;
7430         kvm_set_apic_base(vcpu, &apic_base_msr);
7431
7432         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
7433         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
7434         vcpu->arch.cr0 = sregs->cr0;
7435
7436         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
7437         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
7438         if (sregs->cr4 & (X86_CR4_OSXSAVE | X86_CR4_PKE))
7439                 kvm_update_cpuid(vcpu);
7440
7441         idx = srcu_read_lock(&vcpu->kvm->srcu);
7442         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
7443                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
7444                 mmu_reset_needed = 1;
7445         }
7446         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7447
7448         if (mmu_reset_needed)
7449                 kvm_mmu_reset_context(vcpu);
7450
7451         max_bits = KVM_NR_INTERRUPTS;
7452         pending_vec = find_first_bit(
7453                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
7454         if (pending_vec < max_bits) {
7455                 kvm_queue_interrupt(vcpu, pending_vec, false);
7456                 pr_debug("Set back pending irq %d\n", pending_vec);
7457         }
7458
7459         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7460         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7461         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7462         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7463         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7464         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7465
7466         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7467         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7468
7469         update_cr8_intercept(vcpu);
7470
7471         /* Older userspace won't unhalt the vcpu on reset. */
7472         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
7473             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
7474             !is_protmode(vcpu))
7475                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7476
7477         kvm_make_request(KVM_REQ_EVENT, vcpu);
7478
7479         return 0;
7480 }
7481
7482 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
7483                                         struct kvm_guest_debug *dbg)
7484 {
7485         unsigned long rflags;
7486         int i, r;
7487
7488         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
7489                 r = -EBUSY;
7490                 if (vcpu->arch.exception.pending)
7491                         goto out;
7492                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
7493                         kvm_queue_exception(vcpu, DB_VECTOR);
7494                 else
7495                         kvm_queue_exception(vcpu, BP_VECTOR);
7496         }
7497
7498         /*
7499          * Read rflags as long as potentially injected trace flags are still
7500          * filtered out.
7501          */
7502         rflags = kvm_get_rflags(vcpu);
7503
7504         vcpu->guest_debug = dbg->control;
7505         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
7506                 vcpu->guest_debug = 0;
7507
7508         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
7509                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
7510                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
7511                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
7512         } else {
7513                 for (i = 0; i < KVM_NR_DB_REGS; i++)
7514                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
7515         }
7516         kvm_update_dr7(vcpu);
7517
7518         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7519                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
7520                         get_segment_base(vcpu, VCPU_SREG_CS);
7521
7522         /*
7523          * Trigger an rflags update that will inject or remove the trace
7524          * flags.
7525          */
7526         kvm_set_rflags(vcpu, rflags);
7527
7528         kvm_x86_ops->update_bp_intercept(vcpu);
7529
7530         r = 0;
7531
7532 out:
7533
7534         return r;
7535 }
7536
7537 /*
7538  * Translate a guest virtual address to a guest physical address.
7539  */
7540 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
7541                                     struct kvm_translation *tr)
7542 {
7543         unsigned long vaddr = tr->linear_address;
7544         gpa_t gpa;
7545         int idx;
7546
7547         idx = srcu_read_lock(&vcpu->kvm->srcu);
7548         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
7549         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7550         tr->physical_address = gpa;
7551         tr->valid = gpa != UNMAPPED_GVA;
7552         tr->writeable = 1;
7553         tr->usermode = 0;
7554
7555         return 0;
7556 }
7557
7558 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7559 {
7560         struct fxregs_state *fxsave =
7561                         &vcpu->arch.guest_fpu.state.fxsave;
7562
7563         memcpy(fpu->fpr, fxsave->st_space, 128);
7564         fpu->fcw = fxsave->cwd;
7565         fpu->fsw = fxsave->swd;
7566         fpu->ftwx = fxsave->twd;
7567         fpu->last_opcode = fxsave->fop;
7568         fpu->last_ip = fxsave->rip;
7569         fpu->last_dp = fxsave->rdp;
7570         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
7571
7572         return 0;
7573 }
7574
7575 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7576 {
7577         struct fxregs_state *fxsave =
7578                         &vcpu->arch.guest_fpu.state.fxsave;
7579
7580         memcpy(fxsave->st_space, fpu->fpr, 128);
7581         fxsave->cwd = fpu->fcw;
7582         fxsave->swd = fpu->fsw;
7583         fxsave->twd = fpu->ftwx;
7584         fxsave->fop = fpu->last_opcode;
7585         fxsave->rip = fpu->last_ip;
7586         fxsave->rdp = fpu->last_dp;
7587         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
7588
7589         return 0;
7590 }
7591
7592 static void fx_init(struct kvm_vcpu *vcpu)
7593 {
7594         fpstate_init(&vcpu->arch.guest_fpu.state);
7595         if (boot_cpu_has(X86_FEATURE_XSAVES))
7596                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
7597                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
7598
7599         /*
7600          * Ensure guest xcr0 is valid for loading
7601          */
7602         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
7603
7604         vcpu->arch.cr0 |= X86_CR0_ET;
7605 }
7606
7607 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7608 {
7609         if (vcpu->guest_fpu_loaded)
7610                 return;
7611
7612         /*
7613          * Restore all possible states in the guest,
7614          * and assume host would use all available bits.
7615          * Guest xcr0 would be loaded later.
7616          */
7617         vcpu->guest_fpu_loaded = 1;
7618         __kernel_fpu_begin();
7619         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state);
7620         trace_kvm_fpu(1);
7621 }
7622
7623 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7624 {
7625         if (!vcpu->guest_fpu_loaded)
7626                 return;
7627
7628         vcpu->guest_fpu_loaded = 0;
7629         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
7630         __kernel_fpu_end();
7631         ++vcpu->stat.fpu_reload;
7632         trace_kvm_fpu(0);
7633 }
7634
7635 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7636 {
7637         void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
7638
7639         kvmclock_reset(vcpu);
7640
7641         kvm_x86_ops->vcpu_free(vcpu);
7642         free_cpumask_var(wbinvd_dirty_mask);
7643 }
7644
7645 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7646                                                 unsigned int id)
7647 {
7648         struct kvm_vcpu *vcpu;
7649
7650         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7651                 printk_once(KERN_WARNING
7652                 "kvm: SMP vm created on host with unstable TSC; "
7653                 "guest TSC will not be reliable\n");
7654
7655         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
7656
7657         return vcpu;
7658 }
7659
7660 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7661 {
7662         int r;
7663
7664         kvm_vcpu_mtrr_init(vcpu);
7665         r = vcpu_load(vcpu);
7666         if (r)
7667                 return r;
7668         kvm_vcpu_reset(vcpu, false);
7669         kvm_mmu_setup(vcpu);
7670         vcpu_put(vcpu);
7671         return r;
7672 }
7673
7674 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7675 {
7676         struct msr_data msr;
7677         struct kvm *kvm = vcpu->kvm;
7678
7679         if (vcpu_load(vcpu))
7680                 return;
7681         msr.data = 0x0;
7682         msr.index = MSR_IA32_TSC;
7683         msr.host_initiated = true;
7684         kvm_write_tsc(vcpu, &msr);
7685         vcpu_put(vcpu);
7686
7687         if (!kvmclock_periodic_sync)
7688                 return;
7689
7690         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7691                                         KVMCLOCK_SYNC_PERIOD);
7692 }
7693
7694 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7695 {
7696         int r;
7697         vcpu->arch.apf.msr_val = 0;
7698
7699         r = vcpu_load(vcpu);
7700         BUG_ON(r);
7701         kvm_mmu_unload(vcpu);
7702         vcpu_put(vcpu);
7703
7704         kvm_x86_ops->vcpu_free(vcpu);
7705 }
7706
7707 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
7708 {
7709         vcpu->arch.hflags = 0;
7710
7711         vcpu->arch.smi_pending = 0;
7712         atomic_set(&vcpu->arch.nmi_queued, 0);
7713         vcpu->arch.nmi_pending = 0;
7714         vcpu->arch.nmi_injected = false;
7715         kvm_clear_interrupt_queue(vcpu);
7716         kvm_clear_exception_queue(vcpu);
7717
7718         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7719         kvm_update_dr0123(vcpu);
7720         vcpu->arch.dr6 = DR6_INIT;
7721         kvm_update_dr6(vcpu);
7722         vcpu->arch.dr7 = DR7_FIXED_1;
7723         kvm_update_dr7(vcpu);
7724
7725         vcpu->arch.cr2 = 0;
7726
7727         kvm_make_request(KVM_REQ_EVENT, vcpu);
7728         vcpu->arch.apf.msr_val = 0;
7729         vcpu->arch.st.msr_val = 0;
7730
7731         kvmclock_reset(vcpu);
7732
7733         kvm_clear_async_pf_completion_queue(vcpu);
7734         kvm_async_pf_hash_reset(vcpu);
7735         vcpu->arch.apf.halted = false;
7736
7737         if (!init_event) {
7738                 kvm_pmu_reset(vcpu);
7739                 vcpu->arch.smbase = 0x30000;
7740
7741                 vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
7742                 vcpu->arch.msr_misc_features_enables = 0;
7743         }
7744
7745         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7746         vcpu->arch.regs_avail = ~0;
7747         vcpu->arch.regs_dirty = ~0;
7748
7749         kvm_x86_ops->vcpu_reset(vcpu, init_event);
7750 }
7751
7752 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7753 {
7754         struct kvm_segment cs;
7755
7756         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7757         cs.selector = vector << 8;
7758         cs.base = vector << 12;
7759         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7760         kvm_rip_write(vcpu, 0);
7761 }
7762
7763 int kvm_arch_hardware_enable(void)
7764 {
7765         struct kvm *kvm;
7766         struct kvm_vcpu *vcpu;
7767         int i;
7768         int ret;
7769         u64 local_tsc;
7770         u64 max_tsc = 0;
7771         bool stable, backwards_tsc = false;
7772
7773         kvm_shared_msr_cpu_online();
7774         ret = kvm_x86_ops->hardware_enable();
7775         if (ret != 0)
7776                 return ret;
7777
7778         local_tsc = rdtsc();
7779         stable = !check_tsc_unstable();
7780         list_for_each_entry(kvm, &vm_list, vm_list) {
7781                 kvm_for_each_vcpu(i, vcpu, kvm) {
7782                         if (!stable && vcpu->cpu == smp_processor_id())
7783                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7784                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7785                                 backwards_tsc = true;
7786                                 if (vcpu->arch.last_host_tsc > max_tsc)
7787                                         max_tsc = vcpu->arch.last_host_tsc;
7788                         }
7789                 }
7790         }
7791
7792         /*
7793          * Sometimes, even reliable TSCs go backwards.  This happens on
7794          * platforms that reset TSC during suspend or hibernate actions, but
7795          * maintain synchronization.  We must compensate.  Fortunately, we can
7796          * detect that condition here, which happens early in CPU bringup,
7797          * before any KVM threads can be running.  Unfortunately, we can't
7798          * bring the TSCs fully up to date with real time, as we aren't yet far
7799          * enough into CPU bringup that we know how much real time has actually
7800          * elapsed; our helper function, ktime_get_boot_ns() will be using boot
7801          * variables that haven't been updated yet.
7802          *
7803          * So we simply find the maximum observed TSC above, then record the
7804          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
7805          * the adjustment will be applied.  Note that we accumulate
7806          * adjustments, in case multiple suspend cycles happen before some VCPU
7807          * gets a chance to run again.  In the event that no KVM threads get a
7808          * chance to run, we will miss the entire elapsed period, as we'll have
7809          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7810          * loose cycle time.  This isn't too big a deal, since the loss will be
7811          * uniform across all VCPUs (not to mention the scenario is extremely
7812          * unlikely). It is possible that a second hibernate recovery happens
7813          * much faster than a first, causing the observed TSC here to be
7814          * smaller; this would require additional padding adjustment, which is
7815          * why we set last_host_tsc to the local tsc observed here.
7816          *
7817          * N.B. - this code below runs only on platforms with reliable TSC,
7818          * as that is the only way backwards_tsc is set above.  Also note
7819          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7820          * have the same delta_cyc adjustment applied if backwards_tsc
7821          * is detected.  Note further, this adjustment is only done once,
7822          * as we reset last_host_tsc on all VCPUs to stop this from being
7823          * called multiple times (one for each physical CPU bringup).
7824          *
7825          * Platforms with unreliable TSCs don't have to deal with this, they
7826          * will be compensated by the logic in vcpu_load, which sets the TSC to
7827          * catchup mode.  This will catchup all VCPUs to real time, but cannot
7828          * guarantee that they stay in perfect synchronization.
7829          */
7830         if (backwards_tsc) {
7831                 u64 delta_cyc = max_tsc - local_tsc;
7832                 backwards_tsc_observed = true;
7833                 list_for_each_entry(kvm, &vm_list, vm_list) {
7834                         kvm_for_each_vcpu(i, vcpu, kvm) {
7835                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7836                                 vcpu->arch.last_host_tsc = local_tsc;
7837                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7838                         }
7839
7840                         /*
7841                          * We have to disable TSC offset matching.. if you were
7842                          * booting a VM while issuing an S4 host suspend....
7843                          * you may have some problem.  Solving this issue is
7844                          * left as an exercise to the reader.
7845                          */
7846                         kvm->arch.last_tsc_nsec = 0;
7847                         kvm->arch.last_tsc_write = 0;
7848                 }
7849
7850         }
7851         return 0;
7852 }
7853
7854 void kvm_arch_hardware_disable(void)
7855 {
7856         kvm_x86_ops->hardware_disable();
7857         drop_user_return_notifiers();
7858 }
7859
7860 int kvm_arch_hardware_setup(void)
7861 {
7862         int r;
7863
7864         r = kvm_x86_ops->hardware_setup();
7865         if (r != 0)
7866                 return r;
7867
7868         if (kvm_has_tsc_control) {
7869                 /*
7870                  * Make sure the user can only configure tsc_khz values that
7871                  * fit into a signed integer.
7872                  * A min value is not calculated needed because it will always
7873                  * be 1 on all machines.
7874                  */
7875                 u64 max = min(0x7fffffffULL,
7876                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
7877                 kvm_max_guest_tsc_khz = max;
7878
7879                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
7880         }
7881
7882         kvm_init_msr_list();
7883         return 0;
7884 }
7885
7886 void kvm_arch_hardware_unsetup(void)
7887 {
7888         kvm_x86_ops->hardware_unsetup();
7889 }
7890
7891 void kvm_arch_check_processor_compat(void *rtn)
7892 {
7893         kvm_x86_ops->check_processor_compatibility(rtn);
7894 }
7895
7896 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
7897 {
7898         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
7899 }
7900 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
7901
7902 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
7903 {
7904         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
7905 }
7906
7907 struct static_key kvm_no_apic_vcpu __read_mostly;
7908 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
7909
7910 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7911 {
7912         struct page *page;
7913         struct kvm *kvm;
7914         int r;
7915
7916         BUG_ON(vcpu->kvm == NULL);
7917         kvm = vcpu->kvm;
7918
7919         vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv();
7920         vcpu->arch.pv.pv_unhalted = false;
7921         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7922         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_reset_bsp(vcpu))
7923                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7924         else
7925                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7926
7927         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7928         if (!page) {
7929                 r = -ENOMEM;
7930                 goto fail;
7931         }
7932         vcpu->arch.pio_data = page_address(page);
7933
7934         kvm_set_tsc_khz(vcpu, max_tsc_khz);
7935
7936         r = kvm_mmu_create(vcpu);
7937         if (r < 0)
7938                 goto fail_free_pio_data;
7939
7940         if (irqchip_in_kernel(kvm)) {
7941                 r = kvm_create_lapic(vcpu);
7942                 if (r < 0)
7943                         goto fail_mmu_destroy;
7944         } else
7945                 static_key_slow_inc(&kvm_no_apic_vcpu);
7946
7947         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7948                                        GFP_KERNEL);
7949         if (!vcpu->arch.mce_banks) {
7950                 r = -ENOMEM;
7951                 goto fail_free_lapic;
7952         }
7953         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7954
7955         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7956                 r = -ENOMEM;
7957                 goto fail_free_mce_banks;
7958         }
7959
7960         fx_init(vcpu);
7961
7962         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7963         vcpu->arch.pv_time_enabled = false;
7964
7965         vcpu->arch.guest_supported_xcr0 = 0;
7966         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7967
7968         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
7969
7970         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
7971
7972         kvm_async_pf_hash_reset(vcpu);
7973         kvm_pmu_init(vcpu);
7974
7975         vcpu->arch.pending_external_vector = -1;
7976
7977         kvm_hv_vcpu_init(vcpu);
7978
7979         return 0;
7980
7981 fail_free_mce_banks:
7982         kfree(vcpu->arch.mce_banks);
7983 fail_free_lapic:
7984         kvm_free_lapic(vcpu);
7985 fail_mmu_destroy:
7986         kvm_mmu_destroy(vcpu);
7987 fail_free_pio_data:
7988         free_page((unsigned long)vcpu->arch.pio_data);
7989 fail:
7990         return r;
7991 }
7992
7993 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
7994 {
7995         int idx;
7996
7997         kvm_hv_vcpu_uninit(vcpu);
7998         kvm_pmu_destroy(vcpu);
7999         kfree(vcpu->arch.mce_banks);
8000         kvm_free_lapic(vcpu);
8001         idx = srcu_read_lock(&vcpu->kvm->srcu);
8002         kvm_mmu_destroy(vcpu);
8003         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8004         free_page((unsigned long)vcpu->arch.pio_data);
8005         if (!lapic_in_kernel(vcpu))
8006                 static_key_slow_dec(&kvm_no_apic_vcpu);
8007 }
8008
8009 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
8010 {
8011         kvm_x86_ops->sched_in(vcpu, cpu);
8012 }
8013
8014 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
8015 {
8016         if (type)
8017                 return -EINVAL;
8018
8019         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
8020         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
8021         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
8022         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
8023         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
8024
8025         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
8026         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
8027         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
8028         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
8029                 &kvm->arch.irq_sources_bitmap);
8030
8031         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
8032         mutex_init(&kvm->arch.apic_map_lock);
8033         mutex_init(&kvm->arch.hyperv.hv_lock);
8034         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
8035
8036         kvm->arch.kvmclock_offset = -ktime_get_boot_ns();
8037         pvclock_update_vm_gtod_copy(kvm);
8038
8039         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
8040         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
8041
8042         kvm_page_track_init(kvm);
8043         kvm_mmu_init_vm(kvm);
8044
8045         if (kvm_x86_ops->vm_init)
8046                 return kvm_x86_ops->vm_init(kvm);
8047
8048         return 0;
8049 }
8050
8051 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
8052 {
8053         int r;
8054         r = vcpu_load(vcpu);
8055         BUG_ON(r);
8056         kvm_mmu_unload(vcpu);
8057         vcpu_put(vcpu);
8058 }
8059
8060 static void kvm_free_vcpus(struct kvm *kvm)
8061 {
8062         unsigned int i;
8063         struct kvm_vcpu *vcpu;
8064
8065         /*
8066          * Unpin any mmu pages first.
8067          */
8068         kvm_for_each_vcpu(i, vcpu, kvm) {
8069                 kvm_clear_async_pf_completion_queue(vcpu);
8070                 kvm_unload_vcpu_mmu(vcpu);
8071         }
8072         kvm_for_each_vcpu(i, vcpu, kvm)
8073                 kvm_arch_vcpu_free(vcpu);
8074
8075         mutex_lock(&kvm->lock);
8076         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
8077                 kvm->vcpus[i] = NULL;
8078
8079         atomic_set(&kvm->online_vcpus, 0);
8080         mutex_unlock(&kvm->lock);
8081 }
8082
8083 void kvm_arch_sync_events(struct kvm *kvm)
8084 {
8085         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
8086         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
8087         kvm_free_pit(kvm);
8088 }
8089
8090 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
8091 {
8092         int i, r;
8093         unsigned long hva;
8094         struct kvm_memslots *slots = kvm_memslots(kvm);
8095         struct kvm_memory_slot *slot, old;
8096
8097         /* Called with kvm->slots_lock held.  */
8098         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
8099                 return -EINVAL;
8100
8101         slot = id_to_memslot(slots, id);
8102         if (size) {
8103                 if (slot->npages)
8104                         return -EEXIST;
8105
8106                 /*
8107                  * MAP_SHARED to prevent internal slot pages from being moved
8108                  * by fork()/COW.
8109                  */
8110                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
8111                               MAP_SHARED | MAP_ANONYMOUS, 0);
8112                 if (IS_ERR((void *)hva))
8113                         return PTR_ERR((void *)hva);
8114         } else {
8115                 if (!slot->npages)
8116                         return 0;
8117
8118                 hva = 0;
8119         }
8120
8121         old = *slot;
8122         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
8123                 struct kvm_userspace_memory_region m;
8124
8125                 m.slot = id | (i << 16);
8126                 m.flags = 0;
8127                 m.guest_phys_addr = gpa;
8128                 m.userspace_addr = hva;
8129                 m.memory_size = size;
8130                 r = __kvm_set_memory_region(kvm, &m);
8131                 if (r < 0)
8132                         return r;
8133         }
8134
8135         if (!size) {
8136                 r = vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
8137                 WARN_ON(r < 0);
8138         }
8139
8140         return 0;
8141 }
8142 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
8143
8144 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
8145 {
8146         int r;
8147
8148         mutex_lock(&kvm->slots_lock);
8149         r = __x86_set_memory_region(kvm, id, gpa, size);
8150         mutex_unlock(&kvm->slots_lock);
8151
8152         return r;
8153 }
8154 EXPORT_SYMBOL_GPL(x86_set_memory_region);
8155
8156 void kvm_arch_destroy_vm(struct kvm *kvm)
8157 {
8158         if (current->mm == kvm->mm) {
8159                 /*
8160                  * Free memory regions allocated on behalf of userspace,
8161                  * unless the the memory map has changed due to process exit
8162                  * or fd copying.
8163                  */
8164                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
8165                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
8166                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
8167         }
8168         if (kvm_x86_ops->vm_destroy)
8169                 kvm_x86_ops->vm_destroy(kvm);
8170         kvm_pic_destroy(kvm);
8171         kvm_ioapic_destroy(kvm);
8172         kvm_free_vcpus(kvm);
8173         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
8174         kvm_mmu_uninit_vm(kvm);
8175         kvm_page_track_cleanup(kvm);
8176 }
8177
8178 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
8179                            struct kvm_memory_slot *dont)
8180 {
8181         int i;
8182
8183         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8184                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
8185                         kvfree(free->arch.rmap[i]);
8186                         free->arch.rmap[i] = NULL;
8187                 }
8188                 if (i == 0)
8189                         continue;
8190
8191                 if (!dont || free->arch.lpage_info[i - 1] !=
8192                              dont->arch.lpage_info[i - 1]) {
8193                         kvfree(free->arch.lpage_info[i - 1]);
8194                         free->arch.lpage_info[i - 1] = NULL;
8195                 }
8196         }
8197
8198         kvm_page_track_free_memslot(free, dont);
8199 }
8200
8201 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
8202                             unsigned long npages)
8203 {
8204         int i;
8205
8206         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8207                 struct kvm_lpage_info *linfo;
8208                 unsigned long ugfn;
8209                 int lpages;
8210                 int level = i + 1;
8211
8212                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
8213                                       slot->base_gfn, level) + 1;
8214
8215                 slot->arch.rmap[i] =
8216                         kvzalloc(lpages * sizeof(*slot->arch.rmap[i]), GFP_KERNEL);
8217                 if (!slot->arch.rmap[i])
8218                         goto out_free;
8219                 if (i == 0)
8220                         continue;
8221
8222                 linfo = kvzalloc(lpages * sizeof(*linfo), GFP_KERNEL);
8223                 if (!linfo)
8224                         goto out_free;
8225
8226                 slot->arch.lpage_info[i - 1] = linfo;
8227
8228                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
8229                         linfo[0].disallow_lpage = 1;
8230                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
8231                         linfo[lpages - 1].disallow_lpage = 1;
8232                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
8233                 /*
8234                  * If the gfn and userspace address are not aligned wrt each
8235                  * other, or if explicitly asked to, disable large page
8236                  * support for this slot
8237                  */
8238                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
8239                     !kvm_largepages_enabled()) {
8240                         unsigned long j;
8241
8242                         for (j = 0; j < lpages; ++j)
8243                                 linfo[j].disallow_lpage = 1;
8244                 }
8245         }
8246
8247         if (kvm_page_track_create_memslot(slot, npages))
8248                 goto out_free;
8249
8250         return 0;
8251
8252 out_free:
8253         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8254                 kvfree(slot->arch.rmap[i]);
8255                 slot->arch.rmap[i] = NULL;
8256                 if (i == 0)
8257                         continue;
8258
8259                 kvfree(slot->arch.lpage_info[i - 1]);
8260                 slot->arch.lpage_info[i - 1] = NULL;
8261         }
8262         return -ENOMEM;
8263 }
8264
8265 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
8266 {
8267         /*
8268          * memslots->generation has been incremented.
8269          * mmio generation may have reached its maximum value.
8270          */
8271         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
8272 }
8273
8274 int kvm_arch_prepare_memory_region(struct kvm *kvm,
8275                                 struct kvm_memory_slot *memslot,
8276                                 const struct kvm_userspace_memory_region *mem,
8277                                 enum kvm_mr_change change)
8278 {
8279         return 0;
8280 }
8281
8282 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
8283                                      struct kvm_memory_slot *new)
8284 {
8285         /* Still write protect RO slot */
8286         if (new->flags & KVM_MEM_READONLY) {
8287                 kvm_mmu_slot_remove_write_access(kvm, new);
8288                 return;
8289         }
8290
8291         /*
8292          * Call kvm_x86_ops dirty logging hooks when they are valid.
8293          *
8294          * kvm_x86_ops->slot_disable_log_dirty is called when:
8295          *
8296          *  - KVM_MR_CREATE with dirty logging is disabled
8297          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8298          *
8299          * The reason is, in case of PML, we need to set D-bit for any slots
8300          * with dirty logging disabled in order to eliminate unnecessary GPA
8301          * logging in PML buffer (and potential PML buffer full VMEXT). This
8302          * guarantees leaving PML enabled during guest's lifetime won't have
8303          * any additonal overhead from PML when guest is running with dirty
8304          * logging disabled for memory slots.
8305          *
8306          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8307          * to dirty logging mode.
8308          *
8309          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8310          *
8311          * In case of write protect:
8312          *
8313          * Write protect all pages for dirty logging.
8314          *
8315          * All the sptes including the large sptes which point to this
8316          * slot are set to readonly. We can not create any new large
8317          * spte on this slot until the end of the logging.
8318          *
8319          * See the comments in fast_page_fault().
8320          */
8321         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
8322                 if (kvm_x86_ops->slot_enable_log_dirty)
8323                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
8324                 else
8325                         kvm_mmu_slot_remove_write_access(kvm, new);
8326         } else {
8327                 if (kvm_x86_ops->slot_disable_log_dirty)
8328                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
8329         }
8330 }
8331
8332 void kvm_arch_commit_memory_region(struct kvm *kvm,
8333                                 const struct kvm_userspace_memory_region *mem,
8334                                 const struct kvm_memory_slot *old,
8335                                 const struct kvm_memory_slot *new,
8336                                 enum kvm_mr_change change)
8337 {
8338         int nr_mmu_pages = 0;
8339
8340         if (!kvm->arch.n_requested_mmu_pages)
8341                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
8342
8343         if (nr_mmu_pages)
8344                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
8345
8346         /*
8347          * Dirty logging tracks sptes in 4k granularity, meaning that large
8348          * sptes have to be split.  If live migration is successful, the guest
8349          * in the source machine will be destroyed and large sptes will be
8350          * created in the destination. However, if the guest continues to run
8351          * in the source machine (for example if live migration fails), small
8352          * sptes will remain around and cause bad performance.
8353          *
8354          * Scan sptes if dirty logging has been stopped, dropping those
8355          * which can be collapsed into a single large-page spte.  Later
8356          * page faults will create the large-page sptes.
8357          */
8358         if ((change != KVM_MR_DELETE) &&
8359                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
8360                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
8361                 kvm_mmu_zap_collapsible_sptes(kvm, new);
8362
8363         /*
8364          * Set up write protection and/or dirty logging for the new slot.
8365          *
8366          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8367          * been zapped so no dirty logging staff is needed for old slot. For
8368          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8369          * new and it's also covered when dealing with the new slot.
8370          *
8371          * FIXME: const-ify all uses of struct kvm_memory_slot.
8372          */
8373         if (change != KVM_MR_DELETE)
8374                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
8375 }
8376
8377 void kvm_arch_flush_shadow_all(struct kvm *kvm)
8378 {
8379         kvm_mmu_invalidate_zap_all_pages(kvm);
8380 }
8381
8382 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
8383                                    struct kvm_memory_slot *slot)
8384 {
8385         kvm_page_track_flush_slot(kvm, slot);
8386 }
8387
8388 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
8389 {
8390         if (!list_empty_careful(&vcpu->async_pf.done))
8391                 return true;
8392
8393         if (kvm_apic_has_events(vcpu))
8394                 return true;
8395
8396         if (vcpu->arch.pv.pv_unhalted)
8397                 return true;
8398
8399         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
8400             (vcpu->arch.nmi_pending &&
8401              kvm_x86_ops->nmi_allowed(vcpu)))
8402                 return true;
8403
8404         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
8405             (vcpu->arch.smi_pending && !is_smm(vcpu)))
8406                 return true;
8407
8408         if (kvm_arch_interrupt_allowed(vcpu) &&
8409             kvm_cpu_has_interrupt(vcpu))
8410                 return true;
8411
8412         if (kvm_hv_has_stimer_pending(vcpu))
8413                 return true;
8414
8415         return false;
8416 }
8417
8418 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
8419 {
8420         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
8421 }
8422
8423 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
8424 {
8425         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
8426 }
8427
8428 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
8429 {
8430         return kvm_x86_ops->interrupt_allowed(vcpu);
8431 }
8432
8433 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
8434 {
8435         if (is_64_bit_mode(vcpu))
8436                 return kvm_rip_read(vcpu);
8437         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
8438                      kvm_rip_read(vcpu));
8439 }
8440 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
8441
8442 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
8443 {
8444         return kvm_get_linear_rip(vcpu) == linear_rip;
8445 }
8446 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
8447
8448 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
8449 {
8450         unsigned long rflags;
8451
8452         rflags = kvm_x86_ops->get_rflags(vcpu);
8453         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8454                 rflags &= ~X86_EFLAGS_TF;
8455         return rflags;
8456 }
8457 EXPORT_SYMBOL_GPL(kvm_get_rflags);
8458
8459 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8460 {
8461         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
8462             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
8463                 rflags |= X86_EFLAGS_TF;
8464         kvm_x86_ops->set_rflags(vcpu, rflags);
8465 }
8466
8467 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8468 {
8469         __kvm_set_rflags(vcpu, rflags);
8470         kvm_make_request(KVM_REQ_EVENT, vcpu);
8471 }
8472 EXPORT_SYMBOL_GPL(kvm_set_rflags);
8473
8474 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
8475 {
8476         int r;
8477
8478         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
8479               work->wakeup_all)
8480                 return;
8481
8482         r = kvm_mmu_reload(vcpu);
8483         if (unlikely(r))
8484                 return;
8485
8486         if (!vcpu->arch.mmu.direct_map &&
8487               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
8488                 return;
8489
8490         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
8491 }
8492
8493 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
8494 {
8495         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
8496 }
8497
8498 static inline u32 kvm_async_pf_next_probe(u32 key)
8499 {
8500         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
8501 }
8502
8503 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8504 {
8505         u32 key = kvm_async_pf_hash_fn(gfn);
8506
8507         while (vcpu->arch.apf.gfns[key] != ~0)
8508                 key = kvm_async_pf_next_probe(key);
8509
8510         vcpu->arch.apf.gfns[key] = gfn;
8511 }
8512
8513 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
8514 {
8515         int i;
8516         u32 key = kvm_async_pf_hash_fn(gfn);
8517
8518         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
8519                      (vcpu->arch.apf.gfns[key] != gfn &&
8520                       vcpu->arch.apf.gfns[key] != ~0); i++)
8521                 key = kvm_async_pf_next_probe(key);
8522
8523         return key;
8524 }
8525
8526 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8527 {
8528         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
8529 }
8530
8531 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8532 {
8533         u32 i, j, k;
8534
8535         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
8536         while (true) {
8537                 vcpu->arch.apf.gfns[i] = ~0;
8538                 do {
8539                         j = kvm_async_pf_next_probe(j);
8540                         if (vcpu->arch.apf.gfns[j] == ~0)
8541                                 return;
8542                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
8543                         /*
8544                          * k lies cyclically in ]i,j]
8545                          * |    i.k.j |
8546                          * |....j i.k.| or  |.k..j i...|
8547                          */
8548                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
8549                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
8550                 i = j;
8551         }
8552 }
8553
8554 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
8555 {
8556
8557         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
8558                                       sizeof(val));
8559 }
8560
8561 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
8562                                      struct kvm_async_pf *work)
8563 {
8564         struct x86_exception fault;
8565
8566         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
8567         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
8568
8569         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
8570             (vcpu->arch.apf.send_user_only &&
8571              kvm_x86_ops->get_cpl(vcpu) == 0))
8572                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
8573         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
8574                 fault.vector = PF_VECTOR;
8575                 fault.error_code_valid = true;
8576                 fault.error_code = 0;
8577                 fault.nested_page_fault = false;
8578                 fault.address = work->arch.token;
8579                 kvm_inject_page_fault(vcpu, &fault);
8580         }
8581 }
8582
8583 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
8584                                  struct kvm_async_pf *work)
8585 {
8586         struct x86_exception fault;
8587
8588         if (work->wakeup_all)
8589                 work->arch.token = ~0; /* broadcast wakeup */
8590         else
8591                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
8592         trace_kvm_async_pf_ready(work->arch.token, work->gva);
8593
8594         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
8595             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
8596                 fault.vector = PF_VECTOR;
8597                 fault.error_code_valid = true;
8598                 fault.error_code = 0;
8599                 fault.nested_page_fault = false;
8600                 fault.address = work->arch.token;
8601                 kvm_inject_page_fault(vcpu, &fault);
8602         }
8603         vcpu->arch.apf.halted = false;
8604         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8605 }
8606
8607 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
8608 {
8609         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
8610                 return true;
8611         else
8612                 return kvm_can_do_async_pf(vcpu);
8613 }
8614
8615 void kvm_arch_start_assignment(struct kvm *kvm)
8616 {
8617         atomic_inc(&kvm->arch.assigned_device_count);
8618 }
8619 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
8620
8621 void kvm_arch_end_assignment(struct kvm *kvm)
8622 {
8623         atomic_dec(&kvm->arch.assigned_device_count);
8624 }
8625 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
8626
8627 bool kvm_arch_has_assigned_device(struct kvm *kvm)
8628 {
8629         return atomic_read(&kvm->arch.assigned_device_count);
8630 }
8631 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
8632
8633 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
8634 {
8635         atomic_inc(&kvm->arch.noncoherent_dma_count);
8636 }
8637 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
8638
8639 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
8640 {
8641         atomic_dec(&kvm->arch.noncoherent_dma_count);
8642 }
8643 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
8644
8645 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
8646 {
8647         return atomic_read(&kvm->arch.noncoherent_dma_count);
8648 }
8649 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
8650
8651 bool kvm_arch_has_irq_bypass(void)
8652 {
8653         return kvm_x86_ops->update_pi_irte != NULL;
8654 }
8655
8656 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
8657                                       struct irq_bypass_producer *prod)
8658 {
8659         struct kvm_kernel_irqfd *irqfd =
8660                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8661
8662         irqfd->producer = prod;
8663
8664         return kvm_x86_ops->update_pi_irte(irqfd->kvm,
8665                                            prod->irq, irqfd->gsi, 1);
8666 }
8667
8668 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
8669                                       struct irq_bypass_producer *prod)
8670 {
8671         int ret;
8672         struct kvm_kernel_irqfd *irqfd =
8673                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8674
8675         WARN_ON(irqfd->producer != prod);
8676         irqfd->producer = NULL;
8677
8678         /*
8679          * When producer of consumer is unregistered, we change back to
8680          * remapped mode, so we can re-use the current implementation
8681          * when the irq is masked/disabled or the consumer side (KVM
8682          * int this case doesn't want to receive the interrupts.
8683         */
8684         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
8685         if (ret)
8686                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
8687                        " fails: %d\n", irqfd->consumer.token, ret);
8688 }
8689
8690 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
8691                                    uint32_t guest_irq, bool set)
8692 {
8693         if (!kvm_x86_ops->update_pi_irte)
8694                 return -EINVAL;
8695
8696         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
8697 }
8698
8699 bool kvm_vector_hashing_enabled(void)
8700 {
8701         return vector_hashing;
8702 }
8703 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
8704
8705 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
8706 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
8707 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
8708 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
8709 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
8710 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
8711 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
8712 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
8713 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
8714 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
8715 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
8716 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
8717 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
8718 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
8719 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
8720 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
8721 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
8722 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
8723 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);