Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next-2.6
[sfrench/cifs-2.6.git] / arch / x86 / kvm / mmu.c
1 /*
2  * Kernel-based Virtual Machine driver for Linux
3  *
4  * This module enables machines with Intel VT-x extensions to run virtual
5  * machines without emulation or binary translation.
6  *
7  * MMU support
8  *
9  * Copyright (C) 2006 Qumranet, Inc.
10  * Copyright 2010 Red Hat, Inc. and/or its affilates.
11  *
12  * Authors:
13  *   Yaniv Kamay  <yaniv@qumranet.com>
14  *   Avi Kivity   <avi@qumranet.com>
15  *
16  * This work is licensed under the terms of the GNU GPL, version 2.  See
17  * the COPYING file in the top-level directory.
18  *
19  */
20
21 #include "mmu.h"
22 #include "x86.h"
23 #include "kvm_cache_regs.h"
24
25 #include <linux/kvm_host.h>
26 #include <linux/types.h>
27 #include <linux/string.h>
28 #include <linux/mm.h>
29 #include <linux/highmem.h>
30 #include <linux/module.h>
31 #include <linux/swap.h>
32 #include <linux/hugetlb.h>
33 #include <linux/compiler.h>
34 #include <linux/srcu.h>
35 #include <linux/slab.h>
36 #include <linux/uaccess.h>
37
38 #include <asm/page.h>
39 #include <asm/cmpxchg.h>
40 #include <asm/io.h>
41 #include <asm/vmx.h>
42
43 /*
44  * When setting this variable to true it enables Two-Dimensional-Paging
45  * where the hardware walks 2 page tables:
46  * 1. the guest-virtual to guest-physical
47  * 2. while doing 1. it walks guest-physical to host-physical
48  * If the hardware supports that we don't need to do shadow paging.
49  */
50 bool tdp_enabled = false;
51
52 #undef MMU_DEBUG
53
54 #undef AUDIT
55
56 #ifdef AUDIT
57 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
58 #else
59 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
60 #endif
61
62 #ifdef MMU_DEBUG
63
64 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
65 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
66
67 #else
68
69 #define pgprintk(x...) do { } while (0)
70 #define rmap_printk(x...) do { } while (0)
71
72 #endif
73
74 #if defined(MMU_DEBUG) || defined(AUDIT)
75 static int dbg = 0;
76 module_param(dbg, bool, 0644);
77 #endif
78
79 static int oos_shadow = 1;
80 module_param(oos_shadow, bool, 0644);
81
82 #ifndef MMU_DEBUG
83 #define ASSERT(x) do { } while (0)
84 #else
85 #define ASSERT(x)                                                       \
86         if (!(x)) {                                                     \
87                 printk(KERN_WARNING "assertion failed %s:%d: %s\n",     \
88                        __FILE__, __LINE__, #x);                         \
89         }
90 #endif
91
92 #define PT_FIRST_AVAIL_BITS_SHIFT 9
93 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
94
95 #define PT64_LEVEL_BITS 9
96
97 #define PT64_LEVEL_SHIFT(level) \
98                 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
99
100 #define PT64_LEVEL_MASK(level) \
101                 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
102
103 #define PT64_INDEX(address, level)\
104         (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
105
106
107 #define PT32_LEVEL_BITS 10
108
109 #define PT32_LEVEL_SHIFT(level) \
110                 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
111
112 #define PT32_LEVEL_MASK(level) \
113                 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
114 #define PT32_LVL_OFFSET_MASK(level) \
115         (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
116                                                 * PT32_LEVEL_BITS))) - 1))
117
118 #define PT32_INDEX(address, level)\
119         (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
120
121
122 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
123 #define PT64_DIR_BASE_ADDR_MASK \
124         (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
125 #define PT64_LVL_ADDR_MASK(level) \
126         (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
127                                                 * PT64_LEVEL_BITS))) - 1))
128 #define PT64_LVL_OFFSET_MASK(level) \
129         (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
130                                                 * PT64_LEVEL_BITS))) - 1))
131
132 #define PT32_BASE_ADDR_MASK PAGE_MASK
133 #define PT32_DIR_BASE_ADDR_MASK \
134         (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
135 #define PT32_LVL_ADDR_MASK(level) \
136         (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
137                                             * PT32_LEVEL_BITS))) - 1))
138
139 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
140                         | PT64_NX_MASK)
141
142 #define RMAP_EXT 4
143
144 #define ACC_EXEC_MASK    1
145 #define ACC_WRITE_MASK   PT_WRITABLE_MASK
146 #define ACC_USER_MASK    PT_USER_MASK
147 #define ACC_ALL          (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
148
149 #include <trace/events/kvm.h>
150
151 #define CREATE_TRACE_POINTS
152 #include "mmutrace.h"
153
154 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
155
156 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
157
158 struct kvm_rmap_desc {
159         u64 *sptes[RMAP_EXT];
160         struct kvm_rmap_desc *more;
161 };
162
163 struct kvm_shadow_walk_iterator {
164         u64 addr;
165         hpa_t shadow_addr;
166         int level;
167         u64 *sptep;
168         unsigned index;
169 };
170
171 #define for_each_shadow_entry(_vcpu, _addr, _walker)    \
172         for (shadow_walk_init(&(_walker), _vcpu, _addr);        \
173              shadow_walk_okay(&(_walker));                      \
174              shadow_walk_next(&(_walker)))
175
176 typedef void (*mmu_parent_walk_fn) (struct kvm_mmu_page *sp, u64 *spte);
177
178 static struct kmem_cache *pte_chain_cache;
179 static struct kmem_cache *rmap_desc_cache;
180 static struct kmem_cache *mmu_page_header_cache;
181
182 static u64 __read_mostly shadow_trap_nonpresent_pte;
183 static u64 __read_mostly shadow_notrap_nonpresent_pte;
184 static u64 __read_mostly shadow_base_present_pte;
185 static u64 __read_mostly shadow_nx_mask;
186 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
187 static u64 __read_mostly shadow_user_mask;
188 static u64 __read_mostly shadow_accessed_mask;
189 static u64 __read_mostly shadow_dirty_mask;
190
191 static inline u64 rsvd_bits(int s, int e)
192 {
193         return ((1ULL << (e - s + 1)) - 1) << s;
194 }
195
196 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
197 {
198         shadow_trap_nonpresent_pte = trap_pte;
199         shadow_notrap_nonpresent_pte = notrap_pte;
200 }
201 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
202
203 void kvm_mmu_set_base_ptes(u64 base_pte)
204 {
205         shadow_base_present_pte = base_pte;
206 }
207 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
208
209 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
210                 u64 dirty_mask, u64 nx_mask, u64 x_mask)
211 {
212         shadow_user_mask = user_mask;
213         shadow_accessed_mask = accessed_mask;
214         shadow_dirty_mask = dirty_mask;
215         shadow_nx_mask = nx_mask;
216         shadow_x_mask = x_mask;
217 }
218 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
219
220 static bool is_write_protection(struct kvm_vcpu *vcpu)
221 {
222         return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
223 }
224
225 static int is_cpuid_PSE36(void)
226 {
227         return 1;
228 }
229
230 static int is_nx(struct kvm_vcpu *vcpu)
231 {
232         return vcpu->arch.efer & EFER_NX;
233 }
234
235 static int is_shadow_present_pte(u64 pte)
236 {
237         return pte != shadow_trap_nonpresent_pte
238                 && pte != shadow_notrap_nonpresent_pte;
239 }
240
241 static int is_large_pte(u64 pte)
242 {
243         return pte & PT_PAGE_SIZE_MASK;
244 }
245
246 static int is_writable_pte(unsigned long pte)
247 {
248         return pte & PT_WRITABLE_MASK;
249 }
250
251 static int is_dirty_gpte(unsigned long pte)
252 {
253         return pte & PT_DIRTY_MASK;
254 }
255
256 static int is_rmap_spte(u64 pte)
257 {
258         return is_shadow_present_pte(pte);
259 }
260
261 static int is_last_spte(u64 pte, int level)
262 {
263         if (level == PT_PAGE_TABLE_LEVEL)
264                 return 1;
265         if (is_large_pte(pte))
266                 return 1;
267         return 0;
268 }
269
270 static pfn_t spte_to_pfn(u64 pte)
271 {
272         return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
273 }
274
275 static gfn_t pse36_gfn_delta(u32 gpte)
276 {
277         int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
278
279         return (gpte & PT32_DIR_PSE36_MASK) << shift;
280 }
281
282 static void __set_spte(u64 *sptep, u64 spte)
283 {
284 #ifdef CONFIG_X86_64
285         set_64bit((unsigned long *)sptep, spte);
286 #else
287         set_64bit((unsigned long long *)sptep, spte);
288 #endif
289 }
290
291 static u64 __xchg_spte(u64 *sptep, u64 new_spte)
292 {
293 #ifdef CONFIG_X86_64
294         return xchg(sptep, new_spte);
295 #else
296         u64 old_spte;
297
298         do {
299                 old_spte = *sptep;
300         } while (cmpxchg64(sptep, old_spte, new_spte) != old_spte);
301
302         return old_spte;
303 #endif
304 }
305
306 static void update_spte(u64 *sptep, u64 new_spte)
307 {
308         u64 old_spte;
309
310         if (!shadow_accessed_mask || (new_spte & shadow_accessed_mask) ||
311               !is_rmap_spte(*sptep))
312                 __set_spte(sptep, new_spte);
313         else {
314                 old_spte = __xchg_spte(sptep, new_spte);
315                 if (old_spte & shadow_accessed_mask)
316                         mark_page_accessed(pfn_to_page(spte_to_pfn(old_spte)));
317         }
318 }
319
320 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
321                                   struct kmem_cache *base_cache, int min)
322 {
323         void *obj;
324
325         if (cache->nobjs >= min)
326                 return 0;
327         while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
328                 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
329                 if (!obj)
330                         return -ENOMEM;
331                 cache->objects[cache->nobjs++] = obj;
332         }
333         return 0;
334 }
335
336 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc,
337                                   struct kmem_cache *cache)
338 {
339         while (mc->nobjs)
340                 kmem_cache_free(cache, mc->objects[--mc->nobjs]);
341 }
342
343 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
344                                        int min)
345 {
346         struct page *page;
347
348         if (cache->nobjs >= min)
349                 return 0;
350         while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
351                 page = alloc_page(GFP_KERNEL);
352                 if (!page)
353                         return -ENOMEM;
354                 cache->objects[cache->nobjs++] = page_address(page);
355         }
356         return 0;
357 }
358
359 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
360 {
361         while (mc->nobjs)
362                 free_page((unsigned long)mc->objects[--mc->nobjs]);
363 }
364
365 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
366 {
367         int r;
368
369         r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
370                                    pte_chain_cache, 4);
371         if (r)
372                 goto out;
373         r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
374                                    rmap_desc_cache, 4);
375         if (r)
376                 goto out;
377         r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
378         if (r)
379                 goto out;
380         r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
381                                    mmu_page_header_cache, 4);
382 out:
383         return r;
384 }
385
386 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
387 {
388         mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache, pte_chain_cache);
389         mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache, rmap_desc_cache);
390         mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
391         mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache,
392                                 mmu_page_header_cache);
393 }
394
395 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
396                                     size_t size)
397 {
398         void *p;
399
400         BUG_ON(!mc->nobjs);
401         p = mc->objects[--mc->nobjs];
402         return p;
403 }
404
405 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
406 {
407         return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
408                                       sizeof(struct kvm_pte_chain));
409 }
410
411 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
412 {
413         kmem_cache_free(pte_chain_cache, pc);
414 }
415
416 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
417 {
418         return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
419                                       sizeof(struct kvm_rmap_desc));
420 }
421
422 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
423 {
424         kmem_cache_free(rmap_desc_cache, rd);
425 }
426
427 static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index)
428 {
429         if (!sp->role.direct)
430                 return sp->gfns[index];
431
432         return sp->gfn + (index << ((sp->role.level - 1) * PT64_LEVEL_BITS));
433 }
434
435 static void kvm_mmu_page_set_gfn(struct kvm_mmu_page *sp, int index, gfn_t gfn)
436 {
437         if (sp->role.direct)
438                 BUG_ON(gfn != kvm_mmu_page_get_gfn(sp, index));
439         else
440                 sp->gfns[index] = gfn;
441 }
442
443 /*
444  * Return the pointer to the largepage write count for a given
445  * gfn, handling slots that are not large page aligned.
446  */
447 static int *slot_largepage_idx(gfn_t gfn,
448                                struct kvm_memory_slot *slot,
449                                int level)
450 {
451         unsigned long idx;
452
453         idx = (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
454               (slot->base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
455         return &slot->lpage_info[level - 2][idx].write_count;
456 }
457
458 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
459 {
460         struct kvm_memory_slot *slot;
461         int *write_count;
462         int i;
463
464         slot = gfn_to_memslot(kvm, gfn);
465         for (i = PT_DIRECTORY_LEVEL;
466              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
467                 write_count   = slot_largepage_idx(gfn, slot, i);
468                 *write_count += 1;
469         }
470 }
471
472 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
473 {
474         struct kvm_memory_slot *slot;
475         int *write_count;
476         int i;
477
478         slot = gfn_to_memslot(kvm, gfn);
479         for (i = PT_DIRECTORY_LEVEL;
480              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
481                 write_count   = slot_largepage_idx(gfn, slot, i);
482                 *write_count -= 1;
483                 WARN_ON(*write_count < 0);
484         }
485 }
486
487 static int has_wrprotected_page(struct kvm *kvm,
488                                 gfn_t gfn,
489                                 int level)
490 {
491         struct kvm_memory_slot *slot;
492         int *largepage_idx;
493
494         slot = gfn_to_memslot(kvm, gfn);
495         if (slot) {
496                 largepage_idx = slot_largepage_idx(gfn, slot, level);
497                 return *largepage_idx;
498         }
499
500         return 1;
501 }
502
503 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
504 {
505         unsigned long page_size;
506         int i, ret = 0;
507
508         page_size = kvm_host_page_size(kvm, gfn);
509
510         for (i = PT_PAGE_TABLE_LEVEL;
511              i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
512                 if (page_size >= KVM_HPAGE_SIZE(i))
513                         ret = i;
514                 else
515                         break;
516         }
517
518         return ret;
519 }
520
521 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
522 {
523         struct kvm_memory_slot *slot;
524         int host_level, level, max_level;
525
526         slot = gfn_to_memslot(vcpu->kvm, large_gfn);
527         if (slot && slot->dirty_bitmap)
528                 return PT_PAGE_TABLE_LEVEL;
529
530         host_level = host_mapping_level(vcpu->kvm, large_gfn);
531
532         if (host_level == PT_PAGE_TABLE_LEVEL)
533                 return host_level;
534
535         max_level = kvm_x86_ops->get_lpage_level() < host_level ?
536                 kvm_x86_ops->get_lpage_level() : host_level;
537
538         for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
539                 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
540                         break;
541
542         return level - 1;
543 }
544
545 /*
546  * Take gfn and return the reverse mapping to it.
547  */
548
549 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
550 {
551         struct kvm_memory_slot *slot;
552         unsigned long idx;
553
554         slot = gfn_to_memslot(kvm, gfn);
555         if (likely(level == PT_PAGE_TABLE_LEVEL))
556                 return &slot->rmap[gfn - slot->base_gfn];
557
558         idx = (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
559                 (slot->base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
560
561         return &slot->lpage_info[level - 2][idx].rmap_pde;
562 }
563
564 /*
565  * Reverse mapping data structures:
566  *
567  * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
568  * that points to page_address(page).
569  *
570  * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
571  * containing more mappings.
572  *
573  * Returns the number of rmap entries before the spte was added or zero if
574  * the spte was not added.
575  *
576  */
577 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
578 {
579         struct kvm_mmu_page *sp;
580         struct kvm_rmap_desc *desc;
581         unsigned long *rmapp;
582         int i, count = 0;
583
584         if (!is_rmap_spte(*spte))
585                 return count;
586         sp = page_header(__pa(spte));
587         kvm_mmu_page_set_gfn(sp, spte - sp->spt, gfn);
588         rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
589         if (!*rmapp) {
590                 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
591                 *rmapp = (unsigned long)spte;
592         } else if (!(*rmapp & 1)) {
593                 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
594                 desc = mmu_alloc_rmap_desc(vcpu);
595                 desc->sptes[0] = (u64 *)*rmapp;
596                 desc->sptes[1] = spte;
597                 *rmapp = (unsigned long)desc | 1;
598         } else {
599                 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
600                 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
601                 while (desc->sptes[RMAP_EXT-1] && desc->more) {
602                         desc = desc->more;
603                         count += RMAP_EXT;
604                 }
605                 if (desc->sptes[RMAP_EXT-1]) {
606                         desc->more = mmu_alloc_rmap_desc(vcpu);
607                         desc = desc->more;
608                 }
609                 for (i = 0; desc->sptes[i]; ++i)
610                         ;
611                 desc->sptes[i] = spte;
612         }
613         return count;
614 }
615
616 static void rmap_desc_remove_entry(unsigned long *rmapp,
617                                    struct kvm_rmap_desc *desc,
618                                    int i,
619                                    struct kvm_rmap_desc *prev_desc)
620 {
621         int j;
622
623         for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
624                 ;
625         desc->sptes[i] = desc->sptes[j];
626         desc->sptes[j] = NULL;
627         if (j != 0)
628                 return;
629         if (!prev_desc && !desc->more)
630                 *rmapp = (unsigned long)desc->sptes[0];
631         else
632                 if (prev_desc)
633                         prev_desc->more = desc->more;
634                 else
635                         *rmapp = (unsigned long)desc->more | 1;
636         mmu_free_rmap_desc(desc);
637 }
638
639 static void rmap_remove(struct kvm *kvm, u64 *spte)
640 {
641         struct kvm_rmap_desc *desc;
642         struct kvm_rmap_desc *prev_desc;
643         struct kvm_mmu_page *sp;
644         gfn_t gfn;
645         unsigned long *rmapp;
646         int i;
647
648         sp = page_header(__pa(spte));
649         gfn = kvm_mmu_page_get_gfn(sp, spte - sp->spt);
650         rmapp = gfn_to_rmap(kvm, gfn, sp->role.level);
651         if (!*rmapp) {
652                 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
653                 BUG();
654         } else if (!(*rmapp & 1)) {
655                 rmap_printk("rmap_remove:  %p %llx 1->0\n", spte, *spte);
656                 if ((u64 *)*rmapp != spte) {
657                         printk(KERN_ERR "rmap_remove:  %p %llx 1->BUG\n",
658                                spte, *spte);
659                         BUG();
660                 }
661                 *rmapp = 0;
662         } else {
663                 rmap_printk("rmap_remove:  %p %llx many->many\n", spte, *spte);
664                 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
665                 prev_desc = NULL;
666                 while (desc) {
667                         for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
668                                 if (desc->sptes[i] == spte) {
669                                         rmap_desc_remove_entry(rmapp,
670                                                                desc, i,
671                                                                prev_desc);
672                                         return;
673                                 }
674                         prev_desc = desc;
675                         desc = desc->more;
676                 }
677                 pr_err("rmap_remove: %p %llx many->many\n", spte, *spte);
678                 BUG();
679         }
680 }
681
682 static void set_spte_track_bits(u64 *sptep, u64 new_spte)
683 {
684         pfn_t pfn;
685         u64 old_spte = *sptep;
686
687         if (!shadow_accessed_mask || !is_shadow_present_pte(old_spte) ||
688               old_spte & shadow_accessed_mask) {
689                 __set_spte(sptep, new_spte);
690         } else
691                 old_spte = __xchg_spte(sptep, new_spte);
692
693         if (!is_rmap_spte(old_spte))
694                 return;
695         pfn = spte_to_pfn(old_spte);
696         if (!shadow_accessed_mask || old_spte & shadow_accessed_mask)
697                 kvm_set_pfn_accessed(pfn);
698         if (is_writable_pte(old_spte))
699                 kvm_set_pfn_dirty(pfn);
700 }
701
702 static void drop_spte(struct kvm *kvm, u64 *sptep, u64 new_spte)
703 {
704         set_spte_track_bits(sptep, new_spte);
705         rmap_remove(kvm, sptep);
706 }
707
708 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
709 {
710         struct kvm_rmap_desc *desc;
711         u64 *prev_spte;
712         int i;
713
714         if (!*rmapp)
715                 return NULL;
716         else if (!(*rmapp & 1)) {
717                 if (!spte)
718                         return (u64 *)*rmapp;
719                 return NULL;
720         }
721         desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
722         prev_spte = NULL;
723         while (desc) {
724                 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
725                         if (prev_spte == spte)
726                                 return desc->sptes[i];
727                         prev_spte = desc->sptes[i];
728                 }
729                 desc = desc->more;
730         }
731         return NULL;
732 }
733
734 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
735 {
736         unsigned long *rmapp;
737         u64 *spte;
738         int i, write_protected = 0;
739
740         rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
741
742         spte = rmap_next(kvm, rmapp, NULL);
743         while (spte) {
744                 BUG_ON(!spte);
745                 BUG_ON(!(*spte & PT_PRESENT_MASK));
746                 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
747                 if (is_writable_pte(*spte)) {
748                         update_spte(spte, *spte & ~PT_WRITABLE_MASK);
749                         write_protected = 1;
750                 }
751                 spte = rmap_next(kvm, rmapp, spte);
752         }
753         if (write_protected) {
754                 pfn_t pfn;
755
756                 spte = rmap_next(kvm, rmapp, NULL);
757                 pfn = spte_to_pfn(*spte);
758                 kvm_set_pfn_dirty(pfn);
759         }
760
761         /* check for huge page mappings */
762         for (i = PT_DIRECTORY_LEVEL;
763              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
764                 rmapp = gfn_to_rmap(kvm, gfn, i);
765                 spte = rmap_next(kvm, rmapp, NULL);
766                 while (spte) {
767                         BUG_ON(!spte);
768                         BUG_ON(!(*spte & PT_PRESENT_MASK));
769                         BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
770                         pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
771                         if (is_writable_pte(*spte)) {
772                                 drop_spte(kvm, spte,
773                                           shadow_trap_nonpresent_pte);
774                                 --kvm->stat.lpages;
775                                 spte = NULL;
776                                 write_protected = 1;
777                         }
778                         spte = rmap_next(kvm, rmapp, spte);
779                 }
780         }
781
782         return write_protected;
783 }
784
785 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
786                            unsigned long data)
787 {
788         u64 *spte;
789         int need_tlb_flush = 0;
790
791         while ((spte = rmap_next(kvm, rmapp, NULL))) {
792                 BUG_ON(!(*spte & PT_PRESENT_MASK));
793                 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
794                 drop_spte(kvm, spte, shadow_trap_nonpresent_pte);
795                 need_tlb_flush = 1;
796         }
797         return need_tlb_flush;
798 }
799
800 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
801                              unsigned long data)
802 {
803         int need_flush = 0;
804         u64 *spte, new_spte;
805         pte_t *ptep = (pte_t *)data;
806         pfn_t new_pfn;
807
808         WARN_ON(pte_huge(*ptep));
809         new_pfn = pte_pfn(*ptep);
810         spte = rmap_next(kvm, rmapp, NULL);
811         while (spte) {
812                 BUG_ON(!is_shadow_present_pte(*spte));
813                 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
814                 need_flush = 1;
815                 if (pte_write(*ptep)) {
816                         drop_spte(kvm, spte, shadow_trap_nonpresent_pte);
817                         spte = rmap_next(kvm, rmapp, NULL);
818                 } else {
819                         new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
820                         new_spte |= (u64)new_pfn << PAGE_SHIFT;
821
822                         new_spte &= ~PT_WRITABLE_MASK;
823                         new_spte &= ~SPTE_HOST_WRITEABLE;
824                         new_spte &= ~shadow_accessed_mask;
825                         set_spte_track_bits(spte, new_spte);
826                         spte = rmap_next(kvm, rmapp, spte);
827                 }
828         }
829         if (need_flush)
830                 kvm_flush_remote_tlbs(kvm);
831
832         return 0;
833 }
834
835 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
836                           unsigned long data,
837                           int (*handler)(struct kvm *kvm, unsigned long *rmapp,
838                                          unsigned long data))
839 {
840         int i, j;
841         int ret;
842         int retval = 0;
843         struct kvm_memslots *slots;
844
845         slots = kvm_memslots(kvm);
846
847         for (i = 0; i < slots->nmemslots; i++) {
848                 struct kvm_memory_slot *memslot = &slots->memslots[i];
849                 unsigned long start = memslot->userspace_addr;
850                 unsigned long end;
851
852                 end = start + (memslot->npages << PAGE_SHIFT);
853                 if (hva >= start && hva < end) {
854                         gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
855
856                         ret = handler(kvm, &memslot->rmap[gfn_offset], data);
857
858                         for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
859                                 unsigned long idx;
860                                 int sh;
861
862                                 sh = KVM_HPAGE_GFN_SHIFT(PT_DIRECTORY_LEVEL+j);
863                                 idx = ((memslot->base_gfn+gfn_offset) >> sh) -
864                                         (memslot->base_gfn >> sh);
865                                 ret |= handler(kvm,
866                                         &memslot->lpage_info[j][idx].rmap_pde,
867                                         data);
868                         }
869                         trace_kvm_age_page(hva, memslot, ret);
870                         retval |= ret;
871                 }
872         }
873
874         return retval;
875 }
876
877 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
878 {
879         return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
880 }
881
882 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
883 {
884         kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
885 }
886
887 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
888                          unsigned long data)
889 {
890         u64 *spte;
891         int young = 0;
892
893         /*
894          * Emulate the accessed bit for EPT, by checking if this page has
895          * an EPT mapping, and clearing it if it does. On the next access,
896          * a new EPT mapping will be established.
897          * This has some overhead, but not as much as the cost of swapping
898          * out actively used pages or breaking up actively used hugepages.
899          */
900         if (!shadow_accessed_mask)
901                 return kvm_unmap_rmapp(kvm, rmapp, data);
902
903         spte = rmap_next(kvm, rmapp, NULL);
904         while (spte) {
905                 int _young;
906                 u64 _spte = *spte;
907                 BUG_ON(!(_spte & PT_PRESENT_MASK));
908                 _young = _spte & PT_ACCESSED_MASK;
909                 if (_young) {
910                         young = 1;
911                         clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
912                 }
913                 spte = rmap_next(kvm, rmapp, spte);
914         }
915         return young;
916 }
917
918 #define RMAP_RECYCLE_THRESHOLD 1000
919
920 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
921 {
922         unsigned long *rmapp;
923         struct kvm_mmu_page *sp;
924
925         sp = page_header(__pa(spte));
926
927         rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
928
929         kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
930         kvm_flush_remote_tlbs(vcpu->kvm);
931 }
932
933 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
934 {
935         return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
936 }
937
938 #ifdef MMU_DEBUG
939 static int is_empty_shadow_page(u64 *spt)
940 {
941         u64 *pos;
942         u64 *end;
943
944         for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
945                 if (is_shadow_present_pte(*pos)) {
946                         printk(KERN_ERR "%s: %p %llx\n", __func__,
947                                pos, *pos);
948                         return 0;
949                 }
950         return 1;
951 }
952 #endif
953
954 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
955 {
956         ASSERT(is_empty_shadow_page(sp->spt));
957         hlist_del(&sp->hash_link);
958         list_del(&sp->link);
959         __free_page(virt_to_page(sp->spt));
960         if (!sp->role.direct)
961                 __free_page(virt_to_page(sp->gfns));
962         kmem_cache_free(mmu_page_header_cache, sp);
963         ++kvm->arch.n_free_mmu_pages;
964 }
965
966 static unsigned kvm_page_table_hashfn(gfn_t gfn)
967 {
968         return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
969 }
970
971 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
972                                                u64 *parent_pte, int direct)
973 {
974         struct kvm_mmu_page *sp;
975
976         sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
977         sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
978         if (!direct)
979                 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache,
980                                                   PAGE_SIZE);
981         set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
982         list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
983         bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
984         sp->multimapped = 0;
985         sp->parent_pte = parent_pte;
986         --vcpu->kvm->arch.n_free_mmu_pages;
987         return sp;
988 }
989
990 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
991                                     struct kvm_mmu_page *sp, u64 *parent_pte)
992 {
993         struct kvm_pte_chain *pte_chain;
994         struct hlist_node *node;
995         int i;
996
997         if (!parent_pte)
998                 return;
999         if (!sp->multimapped) {
1000                 u64 *old = sp->parent_pte;
1001
1002                 if (!old) {
1003                         sp->parent_pte = parent_pte;
1004                         return;
1005                 }
1006                 sp->multimapped = 1;
1007                 pte_chain = mmu_alloc_pte_chain(vcpu);
1008                 INIT_HLIST_HEAD(&sp->parent_ptes);
1009                 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
1010                 pte_chain->parent_ptes[0] = old;
1011         }
1012         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
1013                 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
1014                         continue;
1015                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
1016                         if (!pte_chain->parent_ptes[i]) {
1017                                 pte_chain->parent_ptes[i] = parent_pte;
1018                                 return;
1019                         }
1020         }
1021         pte_chain = mmu_alloc_pte_chain(vcpu);
1022         BUG_ON(!pte_chain);
1023         hlist_add_head(&pte_chain->link, &sp->parent_ptes);
1024         pte_chain->parent_ptes[0] = parent_pte;
1025 }
1026
1027 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
1028                                        u64 *parent_pte)
1029 {
1030         struct kvm_pte_chain *pte_chain;
1031         struct hlist_node *node;
1032         int i;
1033
1034         if (!sp->multimapped) {
1035                 BUG_ON(sp->parent_pte != parent_pte);
1036                 sp->parent_pte = NULL;
1037                 return;
1038         }
1039         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1040                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1041                         if (!pte_chain->parent_ptes[i])
1042                                 break;
1043                         if (pte_chain->parent_ptes[i] != parent_pte)
1044                                 continue;
1045                         while (i + 1 < NR_PTE_CHAIN_ENTRIES
1046                                 && pte_chain->parent_ptes[i + 1]) {
1047                                 pte_chain->parent_ptes[i]
1048                                         = pte_chain->parent_ptes[i + 1];
1049                                 ++i;
1050                         }
1051                         pte_chain->parent_ptes[i] = NULL;
1052                         if (i == 0) {
1053                                 hlist_del(&pte_chain->link);
1054                                 mmu_free_pte_chain(pte_chain);
1055                                 if (hlist_empty(&sp->parent_ptes)) {
1056                                         sp->multimapped = 0;
1057                                         sp->parent_pte = NULL;
1058                                 }
1059                         }
1060                         return;
1061                 }
1062         BUG();
1063 }
1064
1065 static void mmu_parent_walk(struct kvm_mmu_page *sp, mmu_parent_walk_fn fn)
1066 {
1067         struct kvm_pte_chain *pte_chain;
1068         struct hlist_node *node;
1069         struct kvm_mmu_page *parent_sp;
1070         int i;
1071
1072         if (!sp->multimapped && sp->parent_pte) {
1073                 parent_sp = page_header(__pa(sp->parent_pte));
1074                 fn(parent_sp, sp->parent_pte);
1075                 return;
1076         }
1077
1078         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1079                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1080                         u64 *spte = pte_chain->parent_ptes[i];
1081
1082                         if (!spte)
1083                                 break;
1084                         parent_sp = page_header(__pa(spte));
1085                         fn(parent_sp, spte);
1086                 }
1087 }
1088
1089 static void mark_unsync(struct kvm_mmu_page *sp, u64 *spte);
1090 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp)
1091 {
1092         mmu_parent_walk(sp, mark_unsync);
1093 }
1094
1095 static void mark_unsync(struct kvm_mmu_page *sp, u64 *spte)
1096 {
1097         unsigned int index;
1098
1099         index = spte - sp->spt;
1100         if (__test_and_set_bit(index, sp->unsync_child_bitmap))
1101                 return;
1102         if (sp->unsync_children++)
1103                 return;
1104         kvm_mmu_mark_parents_unsync(sp);
1105 }
1106
1107 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1108                                     struct kvm_mmu_page *sp)
1109 {
1110         int i;
1111
1112         for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1113                 sp->spt[i] = shadow_trap_nonpresent_pte;
1114 }
1115
1116 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1117                                struct kvm_mmu_page *sp, bool clear_unsync)
1118 {
1119         return 1;
1120 }
1121
1122 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1123 {
1124 }
1125
1126 #define KVM_PAGE_ARRAY_NR 16
1127
1128 struct kvm_mmu_pages {
1129         struct mmu_page_and_offset {
1130                 struct kvm_mmu_page *sp;
1131                 unsigned int idx;
1132         } page[KVM_PAGE_ARRAY_NR];
1133         unsigned int nr;
1134 };
1135
1136 #define for_each_unsync_children(bitmap, idx)           \
1137         for (idx = find_first_bit(bitmap, 512);         \
1138              idx < 512;                                 \
1139              idx = find_next_bit(bitmap, 512, idx+1))
1140
1141 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1142                          int idx)
1143 {
1144         int i;
1145
1146         if (sp->unsync)
1147                 for (i=0; i < pvec->nr; i++)
1148                         if (pvec->page[i].sp == sp)
1149                                 return 0;
1150
1151         pvec->page[pvec->nr].sp = sp;
1152         pvec->page[pvec->nr].idx = idx;
1153         pvec->nr++;
1154         return (pvec->nr == KVM_PAGE_ARRAY_NR);
1155 }
1156
1157 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1158                            struct kvm_mmu_pages *pvec)
1159 {
1160         int i, ret, nr_unsync_leaf = 0;
1161
1162         for_each_unsync_children(sp->unsync_child_bitmap, i) {
1163                 struct kvm_mmu_page *child;
1164                 u64 ent = sp->spt[i];
1165
1166                 if (!is_shadow_present_pte(ent) || is_large_pte(ent))
1167                         goto clear_child_bitmap;
1168
1169                 child = page_header(ent & PT64_BASE_ADDR_MASK);
1170
1171                 if (child->unsync_children) {
1172                         if (mmu_pages_add(pvec, child, i))
1173                                 return -ENOSPC;
1174
1175                         ret = __mmu_unsync_walk(child, pvec);
1176                         if (!ret)
1177                                 goto clear_child_bitmap;
1178                         else if (ret > 0)
1179                                 nr_unsync_leaf += ret;
1180                         else
1181                                 return ret;
1182                 } else if (child->unsync) {
1183                         nr_unsync_leaf++;
1184                         if (mmu_pages_add(pvec, child, i))
1185                                 return -ENOSPC;
1186                 } else
1187                          goto clear_child_bitmap;
1188
1189                 continue;
1190
1191 clear_child_bitmap:
1192                 __clear_bit(i, sp->unsync_child_bitmap);
1193                 sp->unsync_children--;
1194                 WARN_ON((int)sp->unsync_children < 0);
1195         }
1196
1197
1198         return nr_unsync_leaf;
1199 }
1200
1201 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1202                            struct kvm_mmu_pages *pvec)
1203 {
1204         if (!sp->unsync_children)
1205                 return 0;
1206
1207         mmu_pages_add(pvec, sp, 0);
1208         return __mmu_unsync_walk(sp, pvec);
1209 }
1210
1211 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1212 {
1213         WARN_ON(!sp->unsync);
1214         trace_kvm_mmu_sync_page(sp);
1215         sp->unsync = 0;
1216         --kvm->stat.mmu_unsync;
1217 }
1218
1219 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1220                                     struct list_head *invalid_list);
1221 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1222                                     struct list_head *invalid_list);
1223
1224 #define for_each_gfn_sp(kvm, sp, gfn, pos)                              \
1225   hlist_for_each_entry(sp, pos,                                         \
1226    &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link)   \
1227         if ((sp)->gfn != (gfn)) {} else
1228
1229 #define for_each_gfn_indirect_valid_sp(kvm, sp, gfn, pos)               \
1230   hlist_for_each_entry(sp, pos,                                         \
1231    &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link)   \
1232                 if ((sp)->gfn != (gfn) || (sp)->role.direct ||          \
1233                         (sp)->role.invalid) {} else
1234
1235 /* @sp->gfn should be write-protected at the call site */
1236 static int __kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1237                            struct list_head *invalid_list, bool clear_unsync)
1238 {
1239         if (sp->role.cr4_pae != !!is_pae(vcpu)) {
1240                 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1241                 return 1;
1242         }
1243
1244         if (clear_unsync)
1245                 kvm_unlink_unsync_page(vcpu->kvm, sp);
1246
1247         if (vcpu->arch.mmu.sync_page(vcpu, sp, clear_unsync)) {
1248                 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1249                 return 1;
1250         }
1251
1252         kvm_mmu_flush_tlb(vcpu);
1253         return 0;
1254 }
1255
1256 static int kvm_sync_page_transient(struct kvm_vcpu *vcpu,
1257                                    struct kvm_mmu_page *sp)
1258 {
1259         LIST_HEAD(invalid_list);
1260         int ret;
1261
1262         ret = __kvm_sync_page(vcpu, sp, &invalid_list, false);
1263         if (ret)
1264                 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1265
1266         return ret;
1267 }
1268
1269 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1270                          struct list_head *invalid_list)
1271 {
1272         return __kvm_sync_page(vcpu, sp, invalid_list, true);
1273 }
1274
1275 /* @gfn should be write-protected at the call site */
1276 static void kvm_sync_pages(struct kvm_vcpu *vcpu,  gfn_t gfn)
1277 {
1278         struct kvm_mmu_page *s;
1279         struct hlist_node *node;
1280         LIST_HEAD(invalid_list);
1281         bool flush = false;
1282
1283         for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1284                 if (!s->unsync)
1285                         continue;
1286
1287                 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1288                 if ((s->role.cr4_pae != !!is_pae(vcpu)) ||
1289                         (vcpu->arch.mmu.sync_page(vcpu, s, true))) {
1290                         kvm_mmu_prepare_zap_page(vcpu->kvm, s, &invalid_list);
1291                         continue;
1292                 }
1293                 kvm_unlink_unsync_page(vcpu->kvm, s);
1294                 flush = true;
1295         }
1296
1297         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1298         if (flush)
1299                 kvm_mmu_flush_tlb(vcpu);
1300 }
1301
1302 struct mmu_page_path {
1303         struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1304         unsigned int idx[PT64_ROOT_LEVEL-1];
1305 };
1306
1307 #define for_each_sp(pvec, sp, parents, i)                       \
1308                 for (i = mmu_pages_next(&pvec, &parents, -1),   \
1309                         sp = pvec.page[i].sp;                   \
1310                         i < pvec.nr && ({ sp = pvec.page[i].sp; 1;});   \
1311                         i = mmu_pages_next(&pvec, &parents, i))
1312
1313 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1314                           struct mmu_page_path *parents,
1315                           int i)
1316 {
1317         int n;
1318
1319         for (n = i+1; n < pvec->nr; n++) {
1320                 struct kvm_mmu_page *sp = pvec->page[n].sp;
1321
1322                 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1323                         parents->idx[0] = pvec->page[n].idx;
1324                         return n;
1325                 }
1326
1327                 parents->parent[sp->role.level-2] = sp;
1328                 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1329         }
1330
1331         return n;
1332 }
1333
1334 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1335 {
1336         struct kvm_mmu_page *sp;
1337         unsigned int level = 0;
1338
1339         do {
1340                 unsigned int idx = parents->idx[level];
1341
1342                 sp = parents->parent[level];
1343                 if (!sp)
1344                         return;
1345
1346                 --sp->unsync_children;
1347                 WARN_ON((int)sp->unsync_children < 0);
1348                 __clear_bit(idx, sp->unsync_child_bitmap);
1349                 level++;
1350         } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1351 }
1352
1353 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1354                                struct mmu_page_path *parents,
1355                                struct kvm_mmu_pages *pvec)
1356 {
1357         parents->parent[parent->role.level-1] = NULL;
1358         pvec->nr = 0;
1359 }
1360
1361 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1362                               struct kvm_mmu_page *parent)
1363 {
1364         int i;
1365         struct kvm_mmu_page *sp;
1366         struct mmu_page_path parents;
1367         struct kvm_mmu_pages pages;
1368         LIST_HEAD(invalid_list);
1369
1370         kvm_mmu_pages_init(parent, &parents, &pages);
1371         while (mmu_unsync_walk(parent, &pages)) {
1372                 int protected = 0;
1373
1374                 for_each_sp(pages, sp, parents, i)
1375                         protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1376
1377                 if (protected)
1378                         kvm_flush_remote_tlbs(vcpu->kvm);
1379
1380                 for_each_sp(pages, sp, parents, i) {
1381                         kvm_sync_page(vcpu, sp, &invalid_list);
1382                         mmu_pages_clear_parents(&parents);
1383                 }
1384                 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1385                 cond_resched_lock(&vcpu->kvm->mmu_lock);
1386                 kvm_mmu_pages_init(parent, &parents, &pages);
1387         }
1388 }
1389
1390 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1391                                              gfn_t gfn,
1392                                              gva_t gaddr,
1393                                              unsigned level,
1394                                              int direct,
1395                                              unsigned access,
1396                                              u64 *parent_pte)
1397 {
1398         union kvm_mmu_page_role role;
1399         unsigned quadrant;
1400         struct kvm_mmu_page *sp;
1401         struct hlist_node *node;
1402         bool need_sync = false;
1403
1404         role = vcpu->arch.mmu.base_role;
1405         role.level = level;
1406         role.direct = direct;
1407         if (role.direct)
1408                 role.cr4_pae = 0;
1409         role.access = access;
1410         if (!tdp_enabled && vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1411                 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1412                 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1413                 role.quadrant = quadrant;
1414         }
1415         for_each_gfn_sp(vcpu->kvm, sp, gfn, node) {
1416                 if (!need_sync && sp->unsync)
1417                         need_sync = true;
1418
1419                 if (sp->role.word != role.word)
1420                         continue;
1421
1422                 if (sp->unsync && kvm_sync_page_transient(vcpu, sp))
1423                         break;
1424
1425                 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1426                 if (sp->unsync_children) {
1427                         kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1428                         kvm_mmu_mark_parents_unsync(sp);
1429                 } else if (sp->unsync)
1430                         kvm_mmu_mark_parents_unsync(sp);
1431
1432                 trace_kvm_mmu_get_page(sp, false);
1433                 return sp;
1434         }
1435         ++vcpu->kvm->stat.mmu_cache_miss;
1436         sp = kvm_mmu_alloc_page(vcpu, parent_pte, direct);
1437         if (!sp)
1438                 return sp;
1439         sp->gfn = gfn;
1440         sp->role = role;
1441         hlist_add_head(&sp->hash_link,
1442                 &vcpu->kvm->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)]);
1443         if (!direct) {
1444                 if (rmap_write_protect(vcpu->kvm, gfn))
1445                         kvm_flush_remote_tlbs(vcpu->kvm);
1446                 if (level > PT_PAGE_TABLE_LEVEL && need_sync)
1447                         kvm_sync_pages(vcpu, gfn);
1448
1449                 account_shadowed(vcpu->kvm, gfn);
1450         }
1451         if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1452                 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1453         else
1454                 nonpaging_prefetch_page(vcpu, sp);
1455         trace_kvm_mmu_get_page(sp, true);
1456         return sp;
1457 }
1458
1459 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1460                              struct kvm_vcpu *vcpu, u64 addr)
1461 {
1462         iterator->addr = addr;
1463         iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1464         iterator->level = vcpu->arch.mmu.shadow_root_level;
1465         if (iterator->level == PT32E_ROOT_LEVEL) {
1466                 iterator->shadow_addr
1467                         = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1468                 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1469                 --iterator->level;
1470                 if (!iterator->shadow_addr)
1471                         iterator->level = 0;
1472         }
1473 }
1474
1475 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1476 {
1477         if (iterator->level < PT_PAGE_TABLE_LEVEL)
1478                 return false;
1479
1480         if (iterator->level == PT_PAGE_TABLE_LEVEL)
1481                 if (is_large_pte(*iterator->sptep))
1482                         return false;
1483
1484         iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1485         iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1486         return true;
1487 }
1488
1489 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1490 {
1491         iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1492         --iterator->level;
1493 }
1494
1495 static void link_shadow_page(u64 *sptep, struct kvm_mmu_page *sp)
1496 {
1497         u64 spte;
1498
1499         spte = __pa(sp->spt)
1500                 | PT_PRESENT_MASK | PT_ACCESSED_MASK
1501                 | PT_WRITABLE_MASK | PT_USER_MASK;
1502         __set_spte(sptep, spte);
1503 }
1504
1505 static void drop_large_spte(struct kvm_vcpu *vcpu, u64 *sptep)
1506 {
1507         if (is_large_pte(*sptep)) {
1508                 drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
1509                 kvm_flush_remote_tlbs(vcpu->kvm);
1510         }
1511 }
1512
1513 static void validate_direct_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1514                                    unsigned direct_access)
1515 {
1516         if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep)) {
1517                 struct kvm_mmu_page *child;
1518
1519                 /*
1520                  * For the direct sp, if the guest pte's dirty bit
1521                  * changed form clean to dirty, it will corrupt the
1522                  * sp's access: allow writable in the read-only sp,
1523                  * so we should update the spte at this point to get
1524                  * a new sp with the correct access.
1525                  */
1526                 child = page_header(*sptep & PT64_BASE_ADDR_MASK);
1527                 if (child->role.access == direct_access)
1528                         return;
1529
1530                 mmu_page_remove_parent_pte(child, sptep);
1531                 __set_spte(sptep, shadow_trap_nonpresent_pte);
1532                 kvm_flush_remote_tlbs(vcpu->kvm);
1533         }
1534 }
1535
1536 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1537                                          struct kvm_mmu_page *sp)
1538 {
1539         unsigned i;
1540         u64 *pt;
1541         u64 ent;
1542
1543         pt = sp->spt;
1544
1545         for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1546                 ent = pt[i];
1547
1548                 if (is_shadow_present_pte(ent)) {
1549                         if (!is_last_spte(ent, sp->role.level)) {
1550                                 ent &= PT64_BASE_ADDR_MASK;
1551                                 mmu_page_remove_parent_pte(page_header(ent),
1552                                                            &pt[i]);
1553                         } else {
1554                                 if (is_large_pte(ent))
1555                                         --kvm->stat.lpages;
1556                                 drop_spte(kvm, &pt[i],
1557                                           shadow_trap_nonpresent_pte);
1558                         }
1559                 }
1560                 pt[i] = shadow_trap_nonpresent_pte;
1561         }
1562 }
1563
1564 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1565 {
1566         mmu_page_remove_parent_pte(sp, parent_pte);
1567 }
1568
1569 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1570 {
1571         int i;
1572         struct kvm_vcpu *vcpu;
1573
1574         kvm_for_each_vcpu(i, vcpu, kvm)
1575                 vcpu->arch.last_pte_updated = NULL;
1576 }
1577
1578 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1579 {
1580         u64 *parent_pte;
1581
1582         while (sp->multimapped || sp->parent_pte) {
1583                 if (!sp->multimapped)
1584                         parent_pte = sp->parent_pte;
1585                 else {
1586                         struct kvm_pte_chain *chain;
1587
1588                         chain = container_of(sp->parent_ptes.first,
1589                                              struct kvm_pte_chain, link);
1590                         parent_pte = chain->parent_ptes[0];
1591                 }
1592                 BUG_ON(!parent_pte);
1593                 kvm_mmu_put_page(sp, parent_pte);
1594                 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1595         }
1596 }
1597
1598 static int mmu_zap_unsync_children(struct kvm *kvm,
1599                                    struct kvm_mmu_page *parent,
1600                                    struct list_head *invalid_list)
1601 {
1602         int i, zapped = 0;
1603         struct mmu_page_path parents;
1604         struct kvm_mmu_pages pages;
1605
1606         if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1607                 return 0;
1608
1609         kvm_mmu_pages_init(parent, &parents, &pages);
1610         while (mmu_unsync_walk(parent, &pages)) {
1611                 struct kvm_mmu_page *sp;
1612
1613                 for_each_sp(pages, sp, parents, i) {
1614                         kvm_mmu_prepare_zap_page(kvm, sp, invalid_list);
1615                         mmu_pages_clear_parents(&parents);
1616                         zapped++;
1617                 }
1618                 kvm_mmu_pages_init(parent, &parents, &pages);
1619         }
1620
1621         return zapped;
1622 }
1623
1624 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1625                                     struct list_head *invalid_list)
1626 {
1627         int ret;
1628
1629         trace_kvm_mmu_prepare_zap_page(sp);
1630         ++kvm->stat.mmu_shadow_zapped;
1631         ret = mmu_zap_unsync_children(kvm, sp, invalid_list);
1632         kvm_mmu_page_unlink_children(kvm, sp);
1633         kvm_mmu_unlink_parents(kvm, sp);
1634         if (!sp->role.invalid && !sp->role.direct)
1635                 unaccount_shadowed(kvm, sp->gfn);
1636         if (sp->unsync)
1637                 kvm_unlink_unsync_page(kvm, sp);
1638         if (!sp->root_count) {
1639                 /* Count self */
1640                 ret++;
1641                 list_move(&sp->link, invalid_list);
1642         } else {
1643                 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1644                 kvm_reload_remote_mmus(kvm);
1645         }
1646
1647         sp->role.invalid = 1;
1648         kvm_mmu_reset_last_pte_updated(kvm);
1649         return ret;
1650 }
1651
1652 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1653                                     struct list_head *invalid_list)
1654 {
1655         struct kvm_mmu_page *sp;
1656
1657         if (list_empty(invalid_list))
1658                 return;
1659
1660         kvm_flush_remote_tlbs(kvm);
1661
1662         do {
1663                 sp = list_first_entry(invalid_list, struct kvm_mmu_page, link);
1664                 WARN_ON(!sp->role.invalid || sp->root_count);
1665                 kvm_mmu_free_page(kvm, sp);
1666         } while (!list_empty(invalid_list));
1667
1668 }
1669
1670 /*
1671  * Changing the number of mmu pages allocated to the vm
1672  * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1673  */
1674 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1675 {
1676         int used_pages;
1677         LIST_HEAD(invalid_list);
1678
1679         used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
1680         used_pages = max(0, used_pages);
1681
1682         /*
1683          * If we set the number of mmu pages to be smaller be than the
1684          * number of actived pages , we must to free some mmu pages before we
1685          * change the value
1686          */
1687
1688         if (used_pages > kvm_nr_mmu_pages) {
1689                 while (used_pages > kvm_nr_mmu_pages &&
1690                         !list_empty(&kvm->arch.active_mmu_pages)) {
1691                         struct kvm_mmu_page *page;
1692
1693                         page = container_of(kvm->arch.active_mmu_pages.prev,
1694                                             struct kvm_mmu_page, link);
1695                         used_pages -= kvm_mmu_prepare_zap_page(kvm, page,
1696                                                                &invalid_list);
1697                 }
1698                 kvm_mmu_commit_zap_page(kvm, &invalid_list);
1699                 kvm_nr_mmu_pages = used_pages;
1700                 kvm->arch.n_free_mmu_pages = 0;
1701         }
1702         else
1703                 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1704                                          - kvm->arch.n_alloc_mmu_pages;
1705
1706         kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1707 }
1708
1709 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1710 {
1711         struct kvm_mmu_page *sp;
1712         struct hlist_node *node;
1713         LIST_HEAD(invalid_list);
1714         int r;
1715
1716         pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1717         r = 0;
1718
1719         for_each_gfn_indirect_valid_sp(kvm, sp, gfn, node) {
1720                 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1721                          sp->role.word);
1722                 r = 1;
1723                 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
1724         }
1725         kvm_mmu_commit_zap_page(kvm, &invalid_list);
1726         return r;
1727 }
1728
1729 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1730 {
1731         struct kvm_mmu_page *sp;
1732         struct hlist_node *node;
1733         LIST_HEAD(invalid_list);
1734
1735         for_each_gfn_indirect_valid_sp(kvm, sp, gfn, node) {
1736                 pgprintk("%s: zap %lx %x\n",
1737                          __func__, gfn, sp->role.word);
1738                 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
1739         }
1740         kvm_mmu_commit_zap_page(kvm, &invalid_list);
1741 }
1742
1743 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1744 {
1745         int slot = memslot_id(kvm, gfn);
1746         struct kvm_mmu_page *sp = page_header(__pa(pte));
1747
1748         __set_bit(slot, sp->slot_bitmap);
1749 }
1750
1751 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1752 {
1753         int i;
1754         u64 *pt = sp->spt;
1755
1756         if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1757                 return;
1758
1759         for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1760                 if (pt[i] == shadow_notrap_nonpresent_pte)
1761                         __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1762         }
1763 }
1764
1765 /*
1766  * The function is based on mtrr_type_lookup() in
1767  * arch/x86/kernel/cpu/mtrr/generic.c
1768  */
1769 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1770                          u64 start, u64 end)
1771 {
1772         int i;
1773         u64 base, mask;
1774         u8 prev_match, curr_match;
1775         int num_var_ranges = KVM_NR_VAR_MTRR;
1776
1777         if (!mtrr_state->enabled)
1778                 return 0xFF;
1779
1780         /* Make end inclusive end, instead of exclusive */
1781         end--;
1782
1783         /* Look in fixed ranges. Just return the type as per start */
1784         if (mtrr_state->have_fixed && (start < 0x100000)) {
1785                 int idx;
1786
1787                 if (start < 0x80000) {
1788                         idx = 0;
1789                         idx += (start >> 16);
1790                         return mtrr_state->fixed_ranges[idx];
1791                 } else if (start < 0xC0000) {
1792                         idx = 1 * 8;
1793                         idx += ((start - 0x80000) >> 14);
1794                         return mtrr_state->fixed_ranges[idx];
1795                 } else if (start < 0x1000000) {
1796                         idx = 3 * 8;
1797                         idx += ((start - 0xC0000) >> 12);
1798                         return mtrr_state->fixed_ranges[idx];
1799                 }
1800         }
1801
1802         /*
1803          * Look in variable ranges
1804          * Look of multiple ranges matching this address and pick type
1805          * as per MTRR precedence
1806          */
1807         if (!(mtrr_state->enabled & 2))
1808                 return mtrr_state->def_type;
1809
1810         prev_match = 0xFF;
1811         for (i = 0; i < num_var_ranges; ++i) {
1812                 unsigned short start_state, end_state;
1813
1814                 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1815                         continue;
1816
1817                 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1818                        (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1819                 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1820                        (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1821
1822                 start_state = ((start & mask) == (base & mask));
1823                 end_state = ((end & mask) == (base & mask));
1824                 if (start_state != end_state)
1825                         return 0xFE;
1826
1827                 if ((start & mask) != (base & mask))
1828                         continue;
1829
1830                 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1831                 if (prev_match == 0xFF) {
1832                         prev_match = curr_match;
1833                         continue;
1834                 }
1835
1836                 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1837                     curr_match == MTRR_TYPE_UNCACHABLE)
1838                         return MTRR_TYPE_UNCACHABLE;
1839
1840                 if ((prev_match == MTRR_TYPE_WRBACK &&
1841                      curr_match == MTRR_TYPE_WRTHROUGH) ||
1842                     (prev_match == MTRR_TYPE_WRTHROUGH &&
1843                      curr_match == MTRR_TYPE_WRBACK)) {
1844                         prev_match = MTRR_TYPE_WRTHROUGH;
1845                         curr_match = MTRR_TYPE_WRTHROUGH;
1846                 }
1847
1848                 if (prev_match != curr_match)
1849                         return MTRR_TYPE_UNCACHABLE;
1850         }
1851
1852         if (prev_match != 0xFF)
1853                 return prev_match;
1854
1855         return mtrr_state->def_type;
1856 }
1857
1858 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1859 {
1860         u8 mtrr;
1861
1862         mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1863                              (gfn << PAGE_SHIFT) + PAGE_SIZE);
1864         if (mtrr == 0xfe || mtrr == 0xff)
1865                 mtrr = MTRR_TYPE_WRBACK;
1866         return mtrr;
1867 }
1868 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1869
1870 static void __kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1871 {
1872         trace_kvm_mmu_unsync_page(sp);
1873         ++vcpu->kvm->stat.mmu_unsync;
1874         sp->unsync = 1;
1875
1876         kvm_mmu_mark_parents_unsync(sp);
1877         mmu_convert_notrap(sp);
1878 }
1879
1880 static void kvm_unsync_pages(struct kvm_vcpu *vcpu,  gfn_t gfn)
1881 {
1882         struct kvm_mmu_page *s;
1883         struct hlist_node *node;
1884
1885         for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1886                 if (s->unsync)
1887                         continue;
1888                 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1889                 __kvm_unsync_page(vcpu, s);
1890         }
1891 }
1892
1893 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1894                                   bool can_unsync)
1895 {
1896         struct kvm_mmu_page *s;
1897         struct hlist_node *node;
1898         bool need_unsync = false;
1899
1900         for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1901                 if (!can_unsync)
1902                         return 1;
1903
1904                 if (s->role.level != PT_PAGE_TABLE_LEVEL)
1905                         return 1;
1906
1907                 if (!need_unsync && !s->unsync) {
1908                         if (!oos_shadow)
1909                                 return 1;
1910                         need_unsync = true;
1911                 }
1912         }
1913         if (need_unsync)
1914                 kvm_unsync_pages(vcpu, gfn);
1915         return 0;
1916 }
1917
1918 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1919                     unsigned pte_access, int user_fault,
1920                     int write_fault, int dirty, int level,
1921                     gfn_t gfn, pfn_t pfn, bool speculative,
1922                     bool can_unsync, bool reset_host_protection)
1923 {
1924         u64 spte;
1925         int ret = 0;
1926
1927         /*
1928          * We don't set the accessed bit, since we sometimes want to see
1929          * whether the guest actually used the pte (in order to detect
1930          * demand paging).
1931          */
1932         spte = shadow_base_present_pte | shadow_dirty_mask;
1933         if (!speculative)
1934                 spte |= shadow_accessed_mask;
1935         if (!dirty)
1936                 pte_access &= ~ACC_WRITE_MASK;
1937         if (pte_access & ACC_EXEC_MASK)
1938                 spte |= shadow_x_mask;
1939         else
1940                 spte |= shadow_nx_mask;
1941         if (pte_access & ACC_USER_MASK)
1942                 spte |= shadow_user_mask;
1943         if (level > PT_PAGE_TABLE_LEVEL)
1944                 spte |= PT_PAGE_SIZE_MASK;
1945         if (tdp_enabled)
1946                 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1947                         kvm_is_mmio_pfn(pfn));
1948
1949         if (reset_host_protection)
1950                 spte |= SPTE_HOST_WRITEABLE;
1951
1952         spte |= (u64)pfn << PAGE_SHIFT;
1953
1954         if ((pte_access & ACC_WRITE_MASK)
1955             || (!tdp_enabled && write_fault && !is_write_protection(vcpu)
1956                 && !user_fault)) {
1957
1958                 if (level > PT_PAGE_TABLE_LEVEL &&
1959                     has_wrprotected_page(vcpu->kvm, gfn, level)) {
1960                         ret = 1;
1961                         drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
1962                         goto done;
1963                 }
1964
1965                 spte |= PT_WRITABLE_MASK;
1966
1967                 if (!tdp_enabled && !(pte_access & ACC_WRITE_MASK))
1968                         spte &= ~PT_USER_MASK;
1969
1970                 /*
1971                  * Optimization: for pte sync, if spte was writable the hash
1972                  * lookup is unnecessary (and expensive). Write protection
1973                  * is responsibility of mmu_get_page / kvm_sync_page.
1974                  * Same reasoning can be applied to dirty page accounting.
1975                  */
1976                 if (!can_unsync && is_writable_pte(*sptep))
1977                         goto set_pte;
1978
1979                 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1980                         pgprintk("%s: found shadow page for %lx, marking ro\n",
1981                                  __func__, gfn);
1982                         ret = 1;
1983                         pte_access &= ~ACC_WRITE_MASK;
1984                         if (is_writable_pte(spte))
1985                                 spte &= ~PT_WRITABLE_MASK;
1986                 }
1987         }
1988
1989         if (pte_access & ACC_WRITE_MASK)
1990                 mark_page_dirty(vcpu->kvm, gfn);
1991
1992 set_pte:
1993         if (is_writable_pte(*sptep) && !is_writable_pte(spte))
1994                 kvm_set_pfn_dirty(pfn);
1995         update_spte(sptep, spte);
1996 done:
1997         return ret;
1998 }
1999
2000 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
2001                          unsigned pt_access, unsigned pte_access,
2002                          int user_fault, int write_fault, int dirty,
2003                          int *ptwrite, int level, gfn_t gfn,
2004                          pfn_t pfn, bool speculative,
2005                          bool reset_host_protection)
2006 {
2007         int was_rmapped = 0;
2008         int rmap_count;
2009
2010         pgprintk("%s: spte %llx access %x write_fault %d"
2011                  " user_fault %d gfn %lx\n",
2012                  __func__, *sptep, pt_access,
2013                  write_fault, user_fault, gfn);
2014
2015         if (is_rmap_spte(*sptep)) {
2016                 /*
2017                  * If we overwrite a PTE page pointer with a 2MB PMD, unlink
2018                  * the parent of the now unreachable PTE.
2019                  */
2020                 if (level > PT_PAGE_TABLE_LEVEL &&
2021                     !is_large_pte(*sptep)) {
2022                         struct kvm_mmu_page *child;
2023                         u64 pte = *sptep;
2024
2025                         child = page_header(pte & PT64_BASE_ADDR_MASK);
2026                         mmu_page_remove_parent_pte(child, sptep);
2027                         __set_spte(sptep, shadow_trap_nonpresent_pte);
2028                         kvm_flush_remote_tlbs(vcpu->kvm);
2029                 } else if (pfn != spte_to_pfn(*sptep)) {
2030                         pgprintk("hfn old %lx new %lx\n",
2031                                  spte_to_pfn(*sptep), pfn);
2032                         drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
2033                         kvm_flush_remote_tlbs(vcpu->kvm);
2034                 } else
2035                         was_rmapped = 1;
2036         }
2037
2038         if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
2039                       dirty, level, gfn, pfn, speculative, true,
2040                       reset_host_protection)) {
2041                 if (write_fault)
2042                         *ptwrite = 1;
2043                 kvm_mmu_flush_tlb(vcpu);
2044         }
2045
2046         pgprintk("%s: setting spte %llx\n", __func__, *sptep);
2047         pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
2048                  is_large_pte(*sptep)? "2MB" : "4kB",
2049                  *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
2050                  *sptep, sptep);
2051         if (!was_rmapped && is_large_pte(*sptep))
2052                 ++vcpu->kvm->stat.lpages;
2053
2054         page_header_update_slot(vcpu->kvm, sptep, gfn);
2055         if (!was_rmapped) {
2056                 rmap_count = rmap_add(vcpu, sptep, gfn);
2057                 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
2058                         rmap_recycle(vcpu, sptep, gfn);
2059         }
2060         kvm_release_pfn_clean(pfn);
2061         if (speculative) {
2062                 vcpu->arch.last_pte_updated = sptep;
2063                 vcpu->arch.last_pte_gfn = gfn;
2064         }
2065 }
2066
2067 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
2068 {
2069 }
2070
2071 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
2072                         int level, gfn_t gfn, pfn_t pfn)
2073 {
2074         struct kvm_shadow_walk_iterator iterator;
2075         struct kvm_mmu_page *sp;
2076         int pt_write = 0;
2077         gfn_t pseudo_gfn;
2078
2079         for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
2080                 if (iterator.level == level) {
2081                         mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
2082                                      0, write, 1, &pt_write,
2083                                      level, gfn, pfn, false, true);
2084                         ++vcpu->stat.pf_fixed;
2085                         break;
2086                 }
2087
2088                 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
2089                         u64 base_addr = iterator.addr;
2090
2091                         base_addr &= PT64_LVL_ADDR_MASK(iterator.level);
2092                         pseudo_gfn = base_addr >> PAGE_SHIFT;
2093                         sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
2094                                               iterator.level - 1,
2095                                               1, ACC_ALL, iterator.sptep);
2096                         if (!sp) {
2097                                 pgprintk("nonpaging_map: ENOMEM\n");
2098                                 kvm_release_pfn_clean(pfn);
2099                                 return -ENOMEM;
2100                         }
2101
2102                         __set_spte(iterator.sptep,
2103                                    __pa(sp->spt)
2104                                    | PT_PRESENT_MASK | PT_WRITABLE_MASK
2105                                    | shadow_user_mask | shadow_x_mask);
2106                 }
2107         }
2108         return pt_write;
2109 }
2110
2111 static void kvm_send_hwpoison_signal(struct kvm *kvm, gfn_t gfn)
2112 {
2113         char buf[1];
2114         void __user *hva;
2115         int r;
2116
2117         /* Touch the page, so send SIGBUS */
2118         hva = (void __user *)gfn_to_hva(kvm, gfn);
2119         r = copy_from_user(buf, hva, 1);
2120 }
2121
2122 static int kvm_handle_bad_page(struct kvm *kvm, gfn_t gfn, pfn_t pfn)
2123 {
2124         kvm_release_pfn_clean(pfn);
2125         if (is_hwpoison_pfn(pfn)) {
2126                 kvm_send_hwpoison_signal(kvm, gfn);
2127                 return 0;
2128         } else if (is_fault_pfn(pfn))
2129                 return -EFAULT;
2130
2131         return 1;
2132 }
2133
2134 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
2135 {
2136         int r;
2137         int level;
2138         pfn_t pfn;
2139         unsigned long mmu_seq;
2140
2141         level = mapping_level(vcpu, gfn);
2142
2143         /*
2144          * This path builds a PAE pagetable - so we can map 2mb pages at
2145          * maximum. Therefore check if the level is larger than that.
2146          */
2147         if (level > PT_DIRECTORY_LEVEL)
2148                 level = PT_DIRECTORY_LEVEL;
2149
2150         gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2151
2152         mmu_seq = vcpu->kvm->mmu_notifier_seq;
2153         smp_rmb();
2154         pfn = gfn_to_pfn(vcpu->kvm, gfn);
2155
2156         /* mmio */
2157         if (is_error_pfn(pfn))
2158                 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2159
2160         spin_lock(&vcpu->kvm->mmu_lock);
2161         if (mmu_notifier_retry(vcpu, mmu_seq))
2162                 goto out_unlock;
2163         kvm_mmu_free_some_pages(vcpu);
2164         r = __direct_map(vcpu, v, write, level, gfn, pfn);
2165         spin_unlock(&vcpu->kvm->mmu_lock);
2166
2167
2168         return r;
2169
2170 out_unlock:
2171         spin_unlock(&vcpu->kvm->mmu_lock);
2172         kvm_release_pfn_clean(pfn);
2173         return 0;
2174 }
2175
2176
2177 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2178 {
2179         int i;
2180         struct kvm_mmu_page *sp;
2181         LIST_HEAD(invalid_list);
2182
2183         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2184                 return;
2185         spin_lock(&vcpu->kvm->mmu_lock);
2186         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2187                 hpa_t root = vcpu->arch.mmu.root_hpa;
2188
2189                 sp = page_header(root);
2190                 --sp->root_count;
2191                 if (!sp->root_count && sp->role.invalid) {
2192                         kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list);
2193                         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2194                 }
2195                 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2196                 spin_unlock(&vcpu->kvm->mmu_lock);
2197                 return;
2198         }
2199         for (i = 0; i < 4; ++i) {
2200                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2201
2202                 if (root) {
2203                         root &= PT64_BASE_ADDR_MASK;
2204                         sp = page_header(root);
2205                         --sp->root_count;
2206                         if (!sp->root_count && sp->role.invalid)
2207                                 kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2208                                                          &invalid_list);
2209                 }
2210                 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2211         }
2212         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2213         spin_unlock(&vcpu->kvm->mmu_lock);
2214         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2215 }
2216
2217 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2218 {
2219         int ret = 0;
2220
2221         if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2222                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2223                 ret = 1;
2224         }
2225
2226         return ret;
2227 }
2228
2229 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2230 {
2231         int i;
2232         gfn_t root_gfn;
2233         struct kvm_mmu_page *sp;
2234         int direct = 0;
2235         u64 pdptr;
2236
2237         root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
2238
2239         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2240                 hpa_t root = vcpu->arch.mmu.root_hpa;
2241
2242                 ASSERT(!VALID_PAGE(root));
2243                 if (mmu_check_root(vcpu, root_gfn))
2244                         return 1;
2245                 if (tdp_enabled) {
2246                         direct = 1;
2247                         root_gfn = 0;
2248                 }
2249                 spin_lock(&vcpu->kvm->mmu_lock);
2250                 kvm_mmu_free_some_pages(vcpu);
2251                 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
2252                                       PT64_ROOT_LEVEL, direct,
2253                                       ACC_ALL, NULL);
2254                 root = __pa(sp->spt);
2255                 ++sp->root_count;
2256                 spin_unlock(&vcpu->kvm->mmu_lock);
2257                 vcpu->arch.mmu.root_hpa = root;
2258                 return 0;
2259         }
2260         direct = !is_paging(vcpu);
2261         for (i = 0; i < 4; ++i) {
2262                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2263
2264                 ASSERT(!VALID_PAGE(root));
2265                 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2266                         pdptr = kvm_pdptr_read(vcpu, i);
2267                         if (!is_present_gpte(pdptr)) {
2268                                 vcpu->arch.mmu.pae_root[i] = 0;
2269                                 continue;
2270                         }
2271                         root_gfn = pdptr >> PAGE_SHIFT;
2272                 } else if (vcpu->arch.mmu.root_level == 0)
2273                         root_gfn = 0;
2274                 if (mmu_check_root(vcpu, root_gfn))
2275                         return 1;
2276                 if (tdp_enabled) {
2277                         direct = 1;
2278                         root_gfn = i << 30;
2279                 }
2280                 spin_lock(&vcpu->kvm->mmu_lock);
2281                 kvm_mmu_free_some_pages(vcpu);
2282                 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2283                                       PT32_ROOT_LEVEL, direct,
2284                                       ACC_ALL, NULL);
2285                 root = __pa(sp->spt);
2286                 ++sp->root_count;
2287                 spin_unlock(&vcpu->kvm->mmu_lock);
2288
2289                 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2290         }
2291         vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2292         return 0;
2293 }
2294
2295 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2296 {
2297         int i;
2298         struct kvm_mmu_page *sp;
2299
2300         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2301                 return;
2302         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2303                 hpa_t root = vcpu->arch.mmu.root_hpa;
2304                 sp = page_header(root);
2305                 mmu_sync_children(vcpu, sp);
2306                 return;
2307         }
2308         for (i = 0; i < 4; ++i) {
2309                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2310
2311                 if (root && VALID_PAGE(root)) {
2312                         root &= PT64_BASE_ADDR_MASK;
2313                         sp = page_header(root);
2314                         mmu_sync_children(vcpu, sp);
2315                 }
2316         }
2317 }
2318
2319 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2320 {
2321         spin_lock(&vcpu->kvm->mmu_lock);
2322         mmu_sync_roots(vcpu);
2323         spin_unlock(&vcpu->kvm->mmu_lock);
2324 }
2325
2326 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
2327                                   u32 access, u32 *error)
2328 {
2329         if (error)
2330                 *error = 0;
2331         return vaddr;
2332 }
2333
2334 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2335                                 u32 error_code)
2336 {
2337         gfn_t gfn;
2338         int r;
2339
2340         pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2341         r = mmu_topup_memory_caches(vcpu);
2342         if (r)
2343                 return r;
2344
2345         ASSERT(vcpu);
2346         ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2347
2348         gfn = gva >> PAGE_SHIFT;
2349
2350         return nonpaging_map(vcpu, gva & PAGE_MASK,
2351                              error_code & PFERR_WRITE_MASK, gfn);
2352 }
2353
2354 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2355                                 u32 error_code)
2356 {
2357         pfn_t pfn;
2358         int r;
2359         int level;
2360         gfn_t gfn = gpa >> PAGE_SHIFT;
2361         unsigned long mmu_seq;
2362
2363         ASSERT(vcpu);
2364         ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2365
2366         r = mmu_topup_memory_caches(vcpu);
2367         if (r)
2368                 return r;
2369
2370         level = mapping_level(vcpu, gfn);
2371
2372         gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2373
2374         mmu_seq = vcpu->kvm->mmu_notifier_seq;
2375         smp_rmb();
2376         pfn = gfn_to_pfn(vcpu->kvm, gfn);
2377         if (is_error_pfn(pfn))
2378                 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2379         spin_lock(&vcpu->kvm->mmu_lock);
2380         if (mmu_notifier_retry(vcpu, mmu_seq))
2381                 goto out_unlock;
2382         kvm_mmu_free_some_pages(vcpu);
2383         r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2384                          level, gfn, pfn);
2385         spin_unlock(&vcpu->kvm->mmu_lock);
2386
2387         return r;
2388
2389 out_unlock:
2390         spin_unlock(&vcpu->kvm->mmu_lock);
2391         kvm_release_pfn_clean(pfn);
2392         return 0;
2393 }
2394
2395 static void nonpaging_free(struct kvm_vcpu *vcpu)
2396 {
2397         mmu_free_roots(vcpu);
2398 }
2399
2400 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2401 {
2402         struct kvm_mmu *context = &vcpu->arch.mmu;
2403
2404         context->new_cr3 = nonpaging_new_cr3;
2405         context->page_fault = nonpaging_page_fault;
2406         context->gva_to_gpa = nonpaging_gva_to_gpa;
2407         context->free = nonpaging_free;
2408         context->prefetch_page = nonpaging_prefetch_page;
2409         context->sync_page = nonpaging_sync_page;
2410         context->invlpg = nonpaging_invlpg;
2411         context->root_level = 0;
2412         context->shadow_root_level = PT32E_ROOT_LEVEL;
2413         context->root_hpa = INVALID_PAGE;
2414         return 0;
2415 }
2416
2417 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2418 {
2419         ++vcpu->stat.tlb_flush;
2420         kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
2421 }
2422
2423 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2424 {
2425         pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2426         mmu_free_roots(vcpu);
2427 }
2428
2429 static void inject_page_fault(struct kvm_vcpu *vcpu,
2430                               u64 addr,
2431                               u32 err_code)
2432 {
2433         kvm_inject_page_fault(vcpu, addr, err_code);
2434 }
2435
2436 static void paging_free(struct kvm_vcpu *vcpu)
2437 {
2438         nonpaging_free(vcpu);
2439 }
2440
2441 static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2442 {
2443         int bit7;
2444
2445         bit7 = (gpte >> 7) & 1;
2446         return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2447 }
2448
2449 #define PTTYPE 64
2450 #include "paging_tmpl.h"
2451 #undef PTTYPE
2452
2453 #define PTTYPE 32
2454 #include "paging_tmpl.h"
2455 #undef PTTYPE
2456
2457 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2458 {
2459         struct kvm_mmu *context = &vcpu->arch.mmu;
2460         int maxphyaddr = cpuid_maxphyaddr(vcpu);
2461         u64 exb_bit_rsvd = 0;
2462
2463         if (!is_nx(vcpu))
2464                 exb_bit_rsvd = rsvd_bits(63, 63);
2465         switch (level) {
2466         case PT32_ROOT_LEVEL:
2467                 /* no rsvd bits for 2 level 4K page table entries */
2468                 context->rsvd_bits_mask[0][1] = 0;
2469                 context->rsvd_bits_mask[0][0] = 0;
2470                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2471
2472                 if (!is_pse(vcpu)) {
2473                         context->rsvd_bits_mask[1][1] = 0;
2474                         break;
2475                 }
2476
2477                 if (is_cpuid_PSE36())
2478                         /* 36bits PSE 4MB page */
2479                         context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2480                 else
2481                         /* 32 bits PSE 4MB page */
2482                         context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2483                 break;
2484         case PT32E_ROOT_LEVEL:
2485                 context->rsvd_bits_mask[0][2] =
2486                         rsvd_bits(maxphyaddr, 63) |
2487                         rsvd_bits(7, 8) | rsvd_bits(1, 2);      /* PDPTE */
2488                 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2489                         rsvd_bits(maxphyaddr, 62);      /* PDE */
2490                 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2491                         rsvd_bits(maxphyaddr, 62);      /* PTE */
2492                 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2493                         rsvd_bits(maxphyaddr, 62) |
2494                         rsvd_bits(13, 20);              /* large page */
2495                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2496                 break;
2497         case PT64_ROOT_LEVEL:
2498                 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2499                         rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2500                 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2501                         rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2502                 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2503                         rsvd_bits(maxphyaddr, 51);
2504                 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2505                         rsvd_bits(maxphyaddr, 51);
2506                 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2507                 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2508                         rsvd_bits(maxphyaddr, 51) |
2509                         rsvd_bits(13, 29);
2510                 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2511                         rsvd_bits(maxphyaddr, 51) |
2512                         rsvd_bits(13, 20);              /* large page */
2513                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2514                 break;
2515         }
2516 }
2517
2518 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2519 {
2520         struct kvm_mmu *context = &vcpu->arch.mmu;
2521
2522         ASSERT(is_pae(vcpu));
2523         context->new_cr3 = paging_new_cr3;
2524         context->page_fault = paging64_page_fault;
2525         context->gva_to_gpa = paging64_gva_to_gpa;
2526         context->prefetch_page = paging64_prefetch_page;
2527         context->sync_page = paging64_sync_page;
2528         context->invlpg = paging64_invlpg;
2529         context->free = paging_free;
2530         context->root_level = level;
2531         context->shadow_root_level = level;
2532         context->root_hpa = INVALID_PAGE;
2533         return 0;
2534 }
2535
2536 static int paging64_init_context(struct kvm_vcpu *vcpu)
2537 {
2538         reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2539         return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2540 }
2541
2542 static int paging32_init_context(struct kvm_vcpu *vcpu)
2543 {
2544         struct kvm_mmu *context = &vcpu->arch.mmu;
2545
2546         reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2547         context->new_cr3 = paging_new_cr3;
2548         context->page_fault = paging32_page_fault;
2549         context->gva_to_gpa = paging32_gva_to_gpa;
2550         context->free = paging_free;
2551         context->prefetch_page = paging32_prefetch_page;
2552         context->sync_page = paging32_sync_page;
2553         context->invlpg = paging32_invlpg;
2554         context->root_level = PT32_ROOT_LEVEL;
2555         context->shadow_root_level = PT32E_ROOT_LEVEL;
2556         context->root_hpa = INVALID_PAGE;
2557         return 0;
2558 }
2559
2560 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2561 {
2562         reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2563         return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2564 }
2565
2566 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2567 {
2568         struct kvm_mmu *context = &vcpu->arch.mmu;
2569
2570         context->new_cr3 = nonpaging_new_cr3;
2571         context->page_fault = tdp_page_fault;
2572         context->free = nonpaging_free;
2573         context->prefetch_page = nonpaging_prefetch_page;
2574         context->sync_page = nonpaging_sync_page;
2575         context->invlpg = nonpaging_invlpg;
2576         context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2577         context->root_hpa = INVALID_PAGE;
2578
2579         if (!is_paging(vcpu)) {
2580                 context->gva_to_gpa = nonpaging_gva_to_gpa;
2581                 context->root_level = 0;
2582         } else if (is_long_mode(vcpu)) {
2583                 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2584                 context->gva_to_gpa = paging64_gva_to_gpa;
2585                 context->root_level = PT64_ROOT_LEVEL;
2586         } else if (is_pae(vcpu)) {
2587                 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2588                 context->gva_to_gpa = paging64_gva_to_gpa;
2589                 context->root_level = PT32E_ROOT_LEVEL;
2590         } else {
2591                 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2592                 context->gva_to_gpa = paging32_gva_to_gpa;
2593                 context->root_level = PT32_ROOT_LEVEL;
2594         }
2595
2596         return 0;
2597 }
2598
2599 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2600 {
2601         int r;
2602
2603         ASSERT(vcpu);
2604         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2605
2606         if (!is_paging(vcpu))
2607                 r = nonpaging_init_context(vcpu);
2608         else if (is_long_mode(vcpu))
2609                 r = paging64_init_context(vcpu);
2610         else if (is_pae(vcpu))
2611                 r = paging32E_init_context(vcpu);
2612         else
2613                 r = paging32_init_context(vcpu);
2614
2615         vcpu->arch.mmu.base_role.cr4_pae = !!is_pae(vcpu);
2616         vcpu->arch.mmu.base_role.cr0_wp = is_write_protection(vcpu);
2617
2618         return r;
2619 }
2620
2621 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2622 {
2623         vcpu->arch.update_pte.pfn = bad_pfn;
2624
2625         if (tdp_enabled)
2626                 return init_kvm_tdp_mmu(vcpu);
2627         else
2628                 return init_kvm_softmmu(vcpu);
2629 }
2630
2631 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2632 {
2633         ASSERT(vcpu);
2634         if (VALID_PAGE(vcpu->arch.mmu.root_hpa))
2635                 /* mmu.free() should set root_hpa = INVALID_PAGE */
2636                 vcpu->arch.mmu.free(vcpu);
2637 }
2638
2639 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2640 {
2641         destroy_kvm_mmu(vcpu);
2642         return init_kvm_mmu(vcpu);
2643 }
2644 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2645
2646 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2647 {
2648         int r;
2649
2650         r = mmu_topup_memory_caches(vcpu);
2651         if (r)
2652                 goto out;
2653         r = mmu_alloc_roots(vcpu);
2654         spin_lock(&vcpu->kvm->mmu_lock);
2655         mmu_sync_roots(vcpu);
2656         spin_unlock(&vcpu->kvm->mmu_lock);
2657         if (r)
2658                 goto out;
2659         /* set_cr3() should ensure TLB has been flushed */
2660         kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2661 out:
2662         return r;
2663 }
2664 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2665
2666 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2667 {
2668         mmu_free_roots(vcpu);
2669 }
2670
2671 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2672                                   struct kvm_mmu_page *sp,
2673                                   u64 *spte)
2674 {
2675         u64 pte;
2676         struct kvm_mmu_page *child;
2677
2678         pte = *spte;
2679         if (is_shadow_present_pte(pte)) {
2680                 if (is_last_spte(pte, sp->role.level))
2681                         drop_spte(vcpu->kvm, spte, shadow_trap_nonpresent_pte);
2682                 else {
2683                         child = page_header(pte & PT64_BASE_ADDR_MASK);
2684                         mmu_page_remove_parent_pte(child, spte);
2685                 }
2686         }
2687         __set_spte(spte, shadow_trap_nonpresent_pte);
2688         if (is_large_pte(pte))
2689                 --vcpu->kvm->stat.lpages;
2690 }
2691
2692 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2693                                   struct kvm_mmu_page *sp,
2694                                   u64 *spte,
2695                                   const void *new)
2696 {
2697         if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2698                 ++vcpu->kvm->stat.mmu_pde_zapped;
2699                 return;
2700         }
2701
2702         if (is_rsvd_bits_set(vcpu, *(u64 *)new, PT_PAGE_TABLE_LEVEL))
2703                 return;
2704
2705         ++vcpu->kvm->stat.mmu_pte_updated;
2706         if (!sp->role.cr4_pae)
2707                 paging32_update_pte(vcpu, sp, spte, new);
2708         else
2709                 paging64_update_pte(vcpu, sp, spte, new);
2710 }
2711
2712 static bool need_remote_flush(u64 old, u64 new)
2713 {
2714         if (!is_shadow_present_pte(old))
2715                 return false;
2716         if (!is_shadow_present_pte(new))
2717                 return true;
2718         if ((old ^ new) & PT64_BASE_ADDR_MASK)
2719                 return true;
2720         old ^= PT64_NX_MASK;
2721         new ^= PT64_NX_MASK;
2722         return (old & ~new & PT64_PERM_MASK) != 0;
2723 }
2724
2725 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, bool zap_page,
2726                                     bool remote_flush, bool local_flush)
2727 {
2728         if (zap_page)
2729                 return;
2730
2731         if (remote_flush)
2732                 kvm_flush_remote_tlbs(vcpu->kvm);
2733         else if (local_flush)
2734                 kvm_mmu_flush_tlb(vcpu);
2735 }
2736
2737 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2738 {
2739         u64 *spte = vcpu->arch.last_pte_updated;
2740
2741         return !!(spte && (*spte & shadow_accessed_mask));
2742 }
2743
2744 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2745                                           u64 gpte)
2746 {
2747         gfn_t gfn;
2748         pfn_t pfn;
2749
2750         if (!is_present_gpte(gpte))
2751                 return;
2752         gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2753
2754         vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2755         smp_rmb();
2756         pfn = gfn_to_pfn(vcpu->kvm, gfn);
2757
2758         if (is_error_pfn(pfn)) {
2759                 kvm_release_pfn_clean(pfn);
2760                 return;
2761         }
2762         vcpu->arch.update_pte.gfn = gfn;
2763         vcpu->arch.update_pte.pfn = pfn;
2764 }
2765
2766 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2767 {
2768         u64 *spte = vcpu->arch.last_pte_updated;
2769
2770         if (spte
2771             && vcpu->arch.last_pte_gfn == gfn
2772             && shadow_accessed_mask
2773             && !(*spte & shadow_accessed_mask)
2774             && is_shadow_present_pte(*spte))
2775                 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2776 }
2777
2778 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2779                        const u8 *new, int bytes,
2780                        bool guest_initiated)
2781 {
2782         gfn_t gfn = gpa >> PAGE_SHIFT;
2783         union kvm_mmu_page_role mask = { .word = 0 };
2784         struct kvm_mmu_page *sp;
2785         struct hlist_node *node;
2786         LIST_HEAD(invalid_list);
2787         u64 entry, gentry;
2788         u64 *spte;
2789         unsigned offset = offset_in_page(gpa);
2790         unsigned pte_size;
2791         unsigned page_offset;
2792         unsigned misaligned;
2793         unsigned quadrant;
2794         int level;
2795         int flooded = 0;
2796         int npte;
2797         int r;
2798         int invlpg_counter;
2799         bool remote_flush, local_flush, zap_page;
2800
2801         zap_page = remote_flush = local_flush = false;
2802
2803         pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2804
2805         invlpg_counter = atomic_read(&vcpu->kvm->arch.invlpg_counter);
2806
2807         /*
2808          * Assume that the pte write on a page table of the same type
2809          * as the current vcpu paging mode.  This is nearly always true
2810          * (might be false while changing modes).  Note it is verified later
2811          * by update_pte().
2812          */
2813         if ((is_pae(vcpu) && bytes == 4) || !new) {
2814                 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2815                 if (is_pae(vcpu)) {
2816                         gpa &= ~(gpa_t)7;
2817                         bytes = 8;
2818                 }
2819                 r = kvm_read_guest(vcpu->kvm, gpa, &gentry, min(bytes, 8));
2820                 if (r)
2821                         gentry = 0;
2822                 new = (const u8 *)&gentry;
2823         }
2824
2825         switch (bytes) {
2826         case 4:
2827                 gentry = *(const u32 *)new;
2828                 break;
2829         case 8:
2830                 gentry = *(const u64 *)new;
2831                 break;
2832         default:
2833                 gentry = 0;
2834                 break;
2835         }
2836
2837         mmu_guess_page_from_pte_write(vcpu, gpa, gentry);
2838         spin_lock(&vcpu->kvm->mmu_lock);
2839         if (atomic_read(&vcpu->kvm->arch.invlpg_counter) != invlpg_counter)
2840                 gentry = 0;
2841         kvm_mmu_access_page(vcpu, gfn);
2842         kvm_mmu_free_some_pages(vcpu);
2843         ++vcpu->kvm->stat.mmu_pte_write;
2844         kvm_mmu_audit(vcpu, "pre pte write");
2845         if (guest_initiated) {
2846                 if (gfn == vcpu->arch.last_pt_write_gfn
2847                     && !last_updated_pte_accessed(vcpu)) {
2848                         ++vcpu->arch.last_pt_write_count;
2849                         if (vcpu->arch.last_pt_write_count >= 3)
2850                                 flooded = 1;
2851                 } else {
2852                         vcpu->arch.last_pt_write_gfn = gfn;
2853                         vcpu->arch.last_pt_write_count = 1;
2854                         vcpu->arch.last_pte_updated = NULL;
2855                 }
2856         }
2857
2858         mask.cr0_wp = mask.cr4_pae = mask.nxe = 1;
2859         for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn, node) {
2860                 pte_size = sp->role.cr4_pae ? 8 : 4;
2861                 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2862                 misaligned |= bytes < 4;
2863                 if (misaligned || flooded) {
2864                         /*
2865                          * Misaligned accesses are too much trouble to fix
2866                          * up; also, they usually indicate a page is not used
2867                          * as a page table.
2868                          *
2869                          * If we're seeing too many writes to a page,
2870                          * it may no longer be a page table, or we may be
2871                          * forking, in which case it is better to unmap the
2872                          * page.
2873                          */
2874                         pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2875                                  gpa, bytes, sp->role.word);
2876                         zap_page |= !!kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2877                                                      &invalid_list);
2878                         ++vcpu->kvm->stat.mmu_flooded;
2879                         continue;
2880                 }
2881                 page_offset = offset;
2882                 level = sp->role.level;
2883                 npte = 1;
2884                 if (!sp->role.cr4_pae) {
2885                         page_offset <<= 1;      /* 32->64 */
2886                         /*
2887                          * A 32-bit pde maps 4MB while the shadow pdes map
2888                          * only 2MB.  So we need to double the offset again
2889                          * and zap two pdes instead of one.
2890                          */
2891                         if (level == PT32_ROOT_LEVEL) {
2892                                 page_offset &= ~7; /* kill rounding error */
2893                                 page_offset <<= 1;
2894                                 npte = 2;
2895                         }
2896                         quadrant = page_offset >> PAGE_SHIFT;
2897                         page_offset &= ~PAGE_MASK;
2898                         if (quadrant != sp->role.quadrant)
2899                                 continue;
2900                 }
2901                 local_flush = true;
2902                 spte = &sp->spt[page_offset / sizeof(*spte)];
2903                 while (npte--) {
2904                         entry = *spte;
2905                         mmu_pte_write_zap_pte(vcpu, sp, spte);
2906                         if (gentry &&
2907                               !((sp->role.word ^ vcpu->arch.mmu.base_role.word)
2908                               & mask.word))
2909                                 mmu_pte_write_new_pte(vcpu, sp, spte, &gentry);
2910                         if (!remote_flush && need_remote_flush(entry, *spte))
2911                                 remote_flush = true;
2912                         ++spte;
2913                 }
2914         }
2915         mmu_pte_write_flush_tlb(vcpu, zap_page, remote_flush, local_flush);
2916         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2917         kvm_mmu_audit(vcpu, "post pte write");
2918         spin_unlock(&vcpu->kvm->mmu_lock);
2919         if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2920                 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2921                 vcpu->arch.update_pte.pfn = bad_pfn;
2922         }
2923 }
2924
2925 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2926 {
2927         gpa_t gpa;
2928         int r;
2929
2930         if (tdp_enabled)
2931                 return 0;
2932
2933         gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
2934
2935         spin_lock(&vcpu->kvm->mmu_lock);
2936         r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2937         spin_unlock(&vcpu->kvm->mmu_lock);
2938         return r;
2939 }
2940 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2941
2942 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2943 {
2944         int free_pages;
2945         LIST_HEAD(invalid_list);
2946
2947         free_pages = vcpu->kvm->arch.n_free_mmu_pages;
2948         while (free_pages < KVM_REFILL_PAGES &&
2949                !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2950                 struct kvm_mmu_page *sp;
2951
2952                 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2953                                   struct kvm_mmu_page, link);
2954                 free_pages += kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2955                                                        &invalid_list);
2956                 ++vcpu->kvm->stat.mmu_recycled;
2957         }
2958         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2959 }
2960
2961 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2962 {
2963         int r;
2964         enum emulation_result er;
2965
2966         r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2967         if (r < 0)
2968                 goto out;
2969
2970         if (!r) {
2971                 r = 1;
2972                 goto out;
2973         }
2974
2975         r = mmu_topup_memory_caches(vcpu);
2976         if (r)
2977                 goto out;
2978
2979         er = emulate_instruction(vcpu, cr2, error_code, 0);
2980
2981         switch (er) {
2982         case EMULATE_DONE:
2983                 return 1;
2984         case EMULATE_DO_MMIO:
2985                 ++vcpu->stat.mmio_exits;
2986                 /* fall through */
2987         case EMULATE_FAIL:
2988                 return 0;
2989         default:
2990                 BUG();
2991         }
2992 out:
2993         return r;
2994 }
2995 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2996
2997 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2998 {
2999         vcpu->arch.mmu.invlpg(vcpu, gva);
3000         kvm_mmu_flush_tlb(vcpu);
3001         ++vcpu->stat.invlpg;
3002 }
3003 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
3004
3005 void kvm_enable_tdp(void)
3006 {
3007         tdp_enabled = true;
3008 }
3009 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
3010
3011 void kvm_disable_tdp(void)
3012 {
3013         tdp_enabled = false;
3014 }
3015 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
3016
3017 static void free_mmu_pages(struct kvm_vcpu *vcpu)
3018 {
3019         free_page((unsigned long)vcpu->arch.mmu.pae_root);
3020 }
3021
3022 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
3023 {
3024         struct page *page;
3025         int i;
3026
3027         ASSERT(vcpu);
3028
3029         /*
3030          * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
3031          * Therefore we need to allocate shadow page tables in the first
3032          * 4GB of memory, which happens to fit the DMA32 zone.
3033          */
3034         page = alloc_page(GFP_KERNEL | __GFP_DMA32);
3035         if (!page)
3036                 return -ENOMEM;
3037
3038         vcpu->arch.mmu.pae_root = page_address(page);
3039         for (i = 0; i < 4; ++i)
3040                 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
3041
3042         return 0;
3043 }
3044
3045 int kvm_mmu_create(struct kvm_vcpu *vcpu)
3046 {
3047         ASSERT(vcpu);
3048         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3049
3050         return alloc_mmu_pages(vcpu);
3051 }
3052
3053 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
3054 {
3055         ASSERT(vcpu);
3056         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3057
3058         return init_kvm_mmu(vcpu);
3059 }
3060
3061 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
3062 {
3063         ASSERT(vcpu);
3064
3065         destroy_kvm_mmu(vcpu);
3066         free_mmu_pages(vcpu);
3067         mmu_free_memory_caches(vcpu);
3068 }
3069
3070 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
3071 {
3072         struct kvm_mmu_page *sp;
3073
3074         list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
3075                 int i;
3076                 u64 *pt;
3077
3078                 if (!test_bit(slot, sp->slot_bitmap))
3079                         continue;
3080
3081                 pt = sp->spt;
3082                 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
3083                         /* avoid RMW */
3084                         if (is_writable_pte(pt[i]))
3085                                 pt[i] &= ~PT_WRITABLE_MASK;
3086         }
3087         kvm_flush_remote_tlbs(kvm);
3088 }
3089
3090 void kvm_mmu_zap_all(struct kvm *kvm)
3091 {
3092         struct kvm_mmu_page *sp, *node;
3093         LIST_HEAD(invalid_list);
3094
3095         spin_lock(&kvm->mmu_lock);
3096 restart:
3097         list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
3098                 if (kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list))
3099                         goto restart;
3100
3101         kvm_mmu_commit_zap_page(kvm, &invalid_list);
3102         spin_unlock(&kvm->mmu_lock);
3103 }
3104
3105 static int kvm_mmu_remove_some_alloc_mmu_pages(struct kvm *kvm,
3106                                                struct list_head *invalid_list)
3107 {
3108         struct kvm_mmu_page *page;
3109
3110         page = container_of(kvm->arch.active_mmu_pages.prev,
3111                             struct kvm_mmu_page, link);
3112         return kvm_mmu_prepare_zap_page(kvm, page, invalid_list);
3113 }
3114
3115 static int mmu_shrink(struct shrinker *shrink, int nr_to_scan, gfp_t gfp_mask)
3116 {
3117         struct kvm *kvm;
3118         struct kvm *kvm_freed = NULL;
3119         int cache_count = 0;
3120
3121         spin_lock(&kvm_lock);
3122
3123         list_for_each_entry(kvm, &vm_list, vm_list) {
3124                 int npages, idx, freed_pages;
3125                 LIST_HEAD(invalid_list);
3126
3127                 idx = srcu_read_lock(&kvm->srcu);
3128                 spin_lock(&kvm->mmu_lock);
3129                 npages = kvm->arch.n_alloc_mmu_pages -
3130                          kvm->arch.n_free_mmu_pages;
3131                 cache_count += npages;
3132                 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
3133                         freed_pages = kvm_mmu_remove_some_alloc_mmu_pages(kvm,
3134                                                           &invalid_list);
3135                         cache_count -= freed_pages;
3136                         kvm_freed = kvm;
3137                 }
3138                 nr_to_scan--;
3139
3140                 kvm_mmu_commit_zap_page(kvm, &invalid_list);
3141                 spin_unlock(&kvm->mmu_lock);
3142                 srcu_read_unlock(&kvm->srcu, idx);
3143         }
3144         if (kvm_freed)
3145                 list_move_tail(&kvm_freed->vm_list, &vm_list);
3146
3147         spin_unlock(&kvm_lock);
3148
3149         return cache_count;
3150 }
3151
3152 static struct shrinker mmu_shrinker = {
3153         .shrink = mmu_shrink,
3154         .seeks = DEFAULT_SEEKS * 10,
3155 };
3156
3157 static void mmu_destroy_caches(void)
3158 {
3159         if (pte_chain_cache)
3160                 kmem_cache_destroy(pte_chain_cache);
3161         if (rmap_desc_cache)
3162                 kmem_cache_destroy(rmap_desc_cache);
3163         if (mmu_page_header_cache)
3164                 kmem_cache_destroy(mmu_page_header_cache);
3165 }
3166
3167 void kvm_mmu_module_exit(void)
3168 {
3169         mmu_destroy_caches();
3170         unregister_shrinker(&mmu_shrinker);
3171 }
3172
3173 int kvm_mmu_module_init(void)
3174 {
3175         pte_chain_cache = kmem_cache_create("kvm_pte_chain",
3176                                             sizeof(struct kvm_pte_chain),
3177                                             0, 0, NULL);
3178         if (!pte_chain_cache)
3179                 goto nomem;
3180         rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
3181                                             sizeof(struct kvm_rmap_desc),
3182                                             0, 0, NULL);
3183         if (!rmap_desc_cache)
3184                 goto nomem;
3185
3186         mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
3187                                                   sizeof(struct kvm_mmu_page),
3188                                                   0, 0, NULL);
3189         if (!mmu_page_header_cache)
3190                 goto nomem;
3191
3192         register_shrinker(&mmu_shrinker);
3193
3194         return 0;
3195
3196 nomem:
3197         mmu_destroy_caches();
3198         return -ENOMEM;
3199 }
3200
3201 /*
3202  * Caculate mmu pages needed for kvm.
3203  */
3204 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
3205 {
3206         int i;
3207         unsigned int nr_mmu_pages;
3208         unsigned int  nr_pages = 0;
3209         struct kvm_memslots *slots;
3210
3211         slots = kvm_memslots(kvm);
3212
3213         for (i = 0; i < slots->nmemslots; i++)
3214                 nr_pages += slots->memslots[i].npages;
3215
3216         nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3217         nr_mmu_pages = max(nr_mmu_pages,
3218                         (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3219
3220         return nr_mmu_pages;
3221 }
3222
3223 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3224                                 unsigned len)
3225 {
3226         if (len > buffer->len)
3227                 return NULL;
3228         return buffer->ptr;
3229 }
3230
3231 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3232                                 unsigned len)
3233 {
3234         void *ret;
3235
3236         ret = pv_mmu_peek_buffer(buffer, len);
3237         if (!ret)
3238                 return ret;
3239         buffer->ptr += len;
3240         buffer->len -= len;
3241         buffer->processed += len;
3242         return ret;
3243 }
3244
3245 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3246                              gpa_t addr, gpa_t value)
3247 {
3248         int bytes = 8;
3249         int r;
3250
3251         if (!is_long_mode(vcpu) && !is_pae(vcpu))
3252                 bytes = 4;
3253
3254         r = mmu_topup_memory_caches(vcpu);
3255         if (r)
3256                 return r;
3257
3258         if (!emulator_write_phys(vcpu, addr, &value, bytes))
3259                 return -EFAULT;
3260
3261         return 1;
3262 }
3263
3264 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3265 {
3266         (void)kvm_set_cr3(vcpu, vcpu->arch.cr3);
3267         return 1;
3268 }
3269
3270 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3271 {
3272         spin_lock(&vcpu->kvm->mmu_lock);
3273         mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3274         spin_unlock(&vcpu->kvm->mmu_lock);
3275         return 1;
3276 }
3277
3278 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3279                              struct kvm_pv_mmu_op_buffer *buffer)
3280 {
3281         struct kvm_mmu_op_header *header;
3282
3283         header = pv_mmu_peek_buffer(buffer, sizeof *header);
3284         if (!header)
3285                 return 0;
3286         switch (header->op) {
3287         case KVM_MMU_OP_WRITE_PTE: {
3288                 struct kvm_mmu_op_write_pte *wpte;
3289
3290                 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3291                 if (!wpte)
3292                         return 0;
3293                 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3294                                         wpte->pte_val);
3295         }
3296         case KVM_MMU_OP_FLUSH_TLB: {
3297                 struct kvm_mmu_op_flush_tlb *ftlb;
3298
3299                 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3300                 if (!ftlb)
3301                         return 0;
3302                 return kvm_pv_mmu_flush_tlb(vcpu);
3303         }
3304         case KVM_MMU_OP_RELEASE_PT: {
3305                 struct kvm_mmu_op_release_pt *rpt;
3306
3307                 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3308                 if (!rpt)
3309                         return 0;
3310                 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3311         }
3312         default: return 0;
3313         }
3314 }
3315
3316 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3317                   gpa_t addr, unsigned long *ret)
3318 {
3319         int r;
3320         struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3321
3322         buffer->ptr = buffer->buf;
3323         buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3324         buffer->processed = 0;
3325
3326         r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3327         if (r)
3328                 goto out;
3329
3330         while (buffer->len) {
3331                 r = kvm_pv_mmu_op_one(vcpu, buffer);
3332                 if (r < 0)
3333                         goto out;
3334                 if (r == 0)
3335                         break;
3336         }
3337
3338         r = 1;
3339 out:
3340         *ret = buffer->processed;
3341         return r;
3342 }
3343
3344 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3345 {
3346         struct kvm_shadow_walk_iterator iterator;
3347         int nr_sptes = 0;
3348
3349         spin_lock(&vcpu->kvm->mmu_lock);
3350         for_each_shadow_entry(vcpu, addr, iterator) {
3351                 sptes[iterator.level-1] = *iterator.sptep;
3352                 nr_sptes++;
3353                 if (!is_shadow_present_pte(*iterator.sptep))
3354                         break;
3355         }
3356         spin_unlock(&vcpu->kvm->mmu_lock);
3357
3358         return nr_sptes;
3359 }
3360 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3361
3362 #ifdef AUDIT
3363
3364 static const char *audit_msg;
3365
3366 static gva_t canonicalize(gva_t gva)
3367 {
3368 #ifdef CONFIG_X86_64
3369         gva = (long long)(gva << 16) >> 16;
3370 #endif
3371         return gva;
3372 }
3373
3374
3375 typedef void (*inspect_spte_fn) (struct kvm *kvm, u64 *sptep);
3376
3377 static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3378                             inspect_spte_fn fn)
3379 {
3380         int i;
3381
3382         for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3383                 u64 ent = sp->spt[i];
3384
3385                 if (is_shadow_present_pte(ent)) {
3386                         if (!is_last_spte(ent, sp->role.level)) {
3387                                 struct kvm_mmu_page *child;
3388                                 child = page_header(ent & PT64_BASE_ADDR_MASK);
3389                                 __mmu_spte_walk(kvm, child, fn);
3390                         } else
3391                                 fn(kvm, &sp->spt[i]);
3392                 }
3393         }
3394 }
3395
3396 static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3397 {
3398         int i;
3399         struct kvm_mmu_page *sp;
3400
3401         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3402                 return;
3403         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3404                 hpa_t root = vcpu->arch.mmu.root_hpa;
3405                 sp = page_header(root);
3406                 __mmu_spte_walk(vcpu->kvm, sp, fn);
3407                 return;
3408         }
3409         for (i = 0; i < 4; ++i) {
3410                 hpa_t root = vcpu->arch.mmu.pae_root[i];
3411
3412                 if (root && VALID_PAGE(root)) {
3413                         root &= PT64_BASE_ADDR_MASK;
3414                         sp = page_header(root);
3415                         __mmu_spte_walk(vcpu->kvm, sp, fn);
3416                 }
3417         }
3418         return;
3419 }
3420
3421 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3422                                 gva_t va, int level)
3423 {
3424         u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3425         int i;
3426         gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3427
3428         for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3429                 u64 ent = pt[i];
3430
3431                 if (ent == shadow_trap_nonpresent_pte)
3432                         continue;
3433
3434                 va = canonicalize(va);
3435                 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3436                         audit_mappings_page(vcpu, ent, va, level - 1);
3437                 else {
3438                         gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, va, NULL);
3439                         gfn_t gfn = gpa >> PAGE_SHIFT;
3440                         pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3441                         hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
3442
3443                         if (is_error_pfn(pfn)) {
3444                                 kvm_release_pfn_clean(pfn);
3445                                 continue;
3446                         }
3447
3448                         if (is_shadow_present_pte(ent)
3449                             && (ent & PT64_BASE_ADDR_MASK) != hpa)
3450                                 printk(KERN_ERR "xx audit error: (%s) levels %d"
3451                                        " gva %lx gpa %llx hpa %llx ent %llx %d\n",
3452                                        audit_msg, vcpu->arch.mmu.root_level,
3453                                        va, gpa, hpa, ent,
3454                                        is_shadow_present_pte(ent));
3455                         else if (ent == shadow_notrap_nonpresent_pte
3456                                  && !is_error_hpa(hpa))
3457                                 printk(KERN_ERR "audit: (%s) notrap shadow,"
3458                                        " valid guest gva %lx\n", audit_msg, va);
3459                         kvm_release_pfn_clean(pfn);
3460
3461                 }
3462         }
3463 }
3464
3465 static void audit_mappings(struct kvm_vcpu *vcpu)
3466 {
3467         unsigned i;
3468
3469         if (vcpu->arch.mmu.root_level == 4)
3470                 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3471         else
3472                 for (i = 0; i < 4; ++i)
3473                         if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3474                                 audit_mappings_page(vcpu,
3475                                                     vcpu->arch.mmu.pae_root[i],
3476                                                     i << 30,
3477                                                     2);
3478 }
3479
3480 static int count_rmaps(struct kvm_vcpu *vcpu)
3481 {
3482         struct kvm *kvm = vcpu->kvm;
3483         struct kvm_memslots *slots;
3484         int nmaps = 0;
3485         int i, j, k, idx;
3486
3487         idx = srcu_read_lock(&kvm->srcu);
3488         slots = kvm_memslots(kvm);
3489         for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3490                 struct kvm_memory_slot *m = &slots->memslots[i];
3491                 struct kvm_rmap_desc *d;
3492
3493                 for (j = 0; j < m->npages; ++j) {
3494                         unsigned long *rmapp = &m->rmap[j];
3495
3496                         if (!*rmapp)
3497                                 continue;
3498                         if (!(*rmapp & 1)) {
3499                                 ++nmaps;
3500                                 continue;
3501                         }
3502                         d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3503                         while (d) {
3504                                 for (k = 0; k < RMAP_EXT; ++k)
3505                                         if (d->sptes[k])
3506                                                 ++nmaps;
3507                                         else
3508                                                 break;
3509                                 d = d->more;
3510                         }
3511                 }
3512         }
3513         srcu_read_unlock(&kvm->srcu, idx);
3514         return nmaps;
3515 }
3516
3517 void inspect_spte_has_rmap(struct kvm *kvm, u64 *sptep)
3518 {
3519         unsigned long *rmapp;
3520         struct kvm_mmu_page *rev_sp;
3521         gfn_t gfn;
3522
3523         if (is_writable_pte(*sptep)) {
3524                 rev_sp = page_header(__pa(sptep));
3525                 gfn = kvm_mmu_page_get_gfn(rev_sp, sptep - rev_sp->spt);
3526
3527                 if (!gfn_to_memslot(kvm, gfn)) {
3528                         if (!printk_ratelimit())
3529                                 return;
3530                         printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3531                                          audit_msg, gfn);
3532                         printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3533                                audit_msg, (long int)(sptep - rev_sp->spt),
3534                                         rev_sp->gfn);
3535                         dump_stack();
3536                         return;
3537                 }
3538
3539                 rmapp = gfn_to_rmap(kvm, gfn, rev_sp->role.level);
3540                 if (!*rmapp) {
3541                         if (!printk_ratelimit())
3542                                 return;
3543                         printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3544                                          audit_msg, *sptep);
3545                         dump_stack();
3546                 }
3547         }
3548
3549 }
3550
3551 void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3552 {
3553         mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3554 }
3555
3556 static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
3557 {
3558         struct kvm_mmu_page *sp;
3559         int i;
3560
3561         list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3562                 u64 *pt = sp->spt;
3563
3564                 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3565                         continue;
3566
3567                 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3568                         u64 ent = pt[i];
3569
3570                         if (!(ent & PT_PRESENT_MASK))
3571                                 continue;
3572                         if (!is_writable_pte(ent))
3573                                 continue;
3574                         inspect_spte_has_rmap(vcpu->kvm, &pt[i]);
3575                 }
3576         }
3577         return;
3578 }
3579
3580 static void audit_rmap(struct kvm_vcpu *vcpu)
3581 {
3582         check_writable_mappings_rmap(vcpu);
3583         count_rmaps(vcpu);
3584 }
3585
3586 static void audit_write_protection(struct kvm_vcpu *vcpu)
3587 {
3588         struct kvm_mmu_page *sp;
3589         struct kvm_memory_slot *slot;
3590         unsigned long *rmapp;
3591         u64 *spte;
3592         gfn_t gfn;
3593
3594         list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3595                 if (sp->role.direct)
3596                         continue;
3597                 if (sp->unsync)
3598                         continue;
3599
3600                 slot = gfn_to_memslot(vcpu->kvm, sp->gfn);
3601                 rmapp = &slot->rmap[gfn - slot->base_gfn];
3602
3603                 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3604                 while (spte) {
3605                         if (is_writable_pte(*spte))
3606                                 printk(KERN_ERR "%s: (%s) shadow page has "
3607                                 "writable mappings: gfn %lx role %x\n",
3608                                __func__, audit_msg, sp->gfn,
3609                                sp->role.word);
3610                         spte = rmap_next(vcpu->kvm, rmapp, spte);
3611                 }
3612         }
3613 }
3614
3615 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3616 {
3617         int olddbg = dbg;
3618
3619         dbg = 0;
3620         audit_msg = msg;
3621         audit_rmap(vcpu);
3622         audit_write_protection(vcpu);
3623         if (strcmp("pre pte write", audit_msg) != 0)
3624                 audit_mappings(vcpu);
3625         audit_writable_sptes_have_rmaps(vcpu);
3626         dbg = olddbg;
3627 }
3628
3629 #endif