Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm
[sfrench/cifs-2.6.git] / arch / x86 / kvm / ioapic.c
1 /*
2  *  Copyright (C) 2001  MandrakeSoft S.A.
3  *  Copyright 2010 Red Hat, Inc. and/or its affiliates.
4  *
5  *    MandrakeSoft S.A.
6  *    43, rue d'Aboukir
7  *    75002 Paris - France
8  *    http://www.linux-mandrake.com/
9  *    http://www.mandrakesoft.com/
10  *
11  *  This library is free software; you can redistribute it and/or
12  *  modify it under the terms of the GNU Lesser General Public
13  *  License as published by the Free Software Foundation; either
14  *  version 2 of the License, or (at your option) any later version.
15  *
16  *  This library is distributed in the hope that it will be useful,
17  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
18  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
19  *  Lesser General Public License for more details.
20  *
21  *  You should have received a copy of the GNU Lesser General Public
22  *  License along with this library; if not, write to the Free Software
23  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
24  *
25  *  Yunhong Jiang <yunhong.jiang@intel.com>
26  *  Yaozu (Eddie) Dong <eddie.dong@intel.com>
27  *  Based on Xen 3.1 code.
28  */
29
30 #include <linux/kvm_host.h>
31 #include <linux/kvm.h>
32 #include <linux/mm.h>
33 #include <linux/highmem.h>
34 #include <linux/smp.h>
35 #include <linux/hrtimer.h>
36 #include <linux/io.h>
37 #include <linux/slab.h>
38 #include <linux/export.h>
39 #include <asm/processor.h>
40 #include <asm/page.h>
41 #include <asm/current.h>
42 #include <trace/events/kvm.h>
43
44 #include "ioapic.h"
45 #include "lapic.h"
46 #include "irq.h"
47
48 #if 0
49 #define ioapic_debug(fmt,arg...) printk(KERN_WARNING fmt,##arg)
50 #else
51 #define ioapic_debug(fmt, arg...)
52 #endif
53 static int ioapic_service(struct kvm_ioapic *vioapic, int irq,
54                 bool line_status);
55
56 static unsigned long ioapic_read_indirect(struct kvm_ioapic *ioapic,
57                                           unsigned long addr,
58                                           unsigned long length)
59 {
60         unsigned long result = 0;
61
62         switch (ioapic->ioregsel) {
63         case IOAPIC_REG_VERSION:
64                 result = ((((IOAPIC_NUM_PINS - 1) & 0xff) << 16)
65                           | (IOAPIC_VERSION_ID & 0xff));
66                 break;
67
68         case IOAPIC_REG_APIC_ID:
69         case IOAPIC_REG_ARB_ID:
70                 result = ((ioapic->id & 0xf) << 24);
71                 break;
72
73         default:
74                 {
75                         u32 redir_index = (ioapic->ioregsel - 0x10) >> 1;
76                         u64 redir_content;
77
78                         if (redir_index < IOAPIC_NUM_PINS)
79                                 redir_content =
80                                         ioapic->redirtbl[redir_index].bits;
81                         else
82                                 redir_content = ~0ULL;
83
84                         result = (ioapic->ioregsel & 0x1) ?
85                             (redir_content >> 32) & 0xffffffff :
86                             redir_content & 0xffffffff;
87                         break;
88                 }
89         }
90
91         return result;
92 }
93
94 static void rtc_irq_eoi_tracking_reset(struct kvm_ioapic *ioapic)
95 {
96         ioapic->rtc_status.pending_eoi = 0;
97         bitmap_zero(ioapic->rtc_status.dest_map, KVM_MAX_VCPUS);
98 }
99
100 static void kvm_rtc_eoi_tracking_restore_all(struct kvm_ioapic *ioapic);
101
102 static void rtc_status_pending_eoi_check_valid(struct kvm_ioapic *ioapic)
103 {
104         if (WARN_ON(ioapic->rtc_status.pending_eoi < 0))
105                 kvm_rtc_eoi_tracking_restore_all(ioapic);
106 }
107
108 static void __rtc_irq_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
109 {
110         bool new_val, old_val;
111         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
112         union kvm_ioapic_redirect_entry *e;
113
114         e = &ioapic->redirtbl[RTC_GSI];
115         if (!kvm_apic_match_dest(vcpu, NULL, 0, e->fields.dest_id,
116                                 e->fields.dest_mode))
117                 return;
118
119         new_val = kvm_apic_pending_eoi(vcpu, e->fields.vector);
120         old_val = test_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map);
121
122         if (new_val == old_val)
123                 return;
124
125         if (new_val) {
126                 __set_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map);
127                 ioapic->rtc_status.pending_eoi++;
128         } else {
129                 __clear_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map);
130                 ioapic->rtc_status.pending_eoi--;
131                 rtc_status_pending_eoi_check_valid(ioapic);
132         }
133 }
134
135 void kvm_rtc_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
136 {
137         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
138
139         spin_lock(&ioapic->lock);
140         __rtc_irq_eoi_tracking_restore_one(vcpu);
141         spin_unlock(&ioapic->lock);
142 }
143
144 static void kvm_rtc_eoi_tracking_restore_all(struct kvm_ioapic *ioapic)
145 {
146         struct kvm_vcpu *vcpu;
147         int i;
148
149         if (RTC_GSI >= IOAPIC_NUM_PINS)
150                 return;
151
152         rtc_irq_eoi_tracking_reset(ioapic);
153         kvm_for_each_vcpu(i, vcpu, ioapic->kvm)
154             __rtc_irq_eoi_tracking_restore_one(vcpu);
155 }
156
157 static void rtc_irq_eoi(struct kvm_ioapic *ioapic, struct kvm_vcpu *vcpu)
158 {
159         if (test_and_clear_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map)) {
160                 --ioapic->rtc_status.pending_eoi;
161                 rtc_status_pending_eoi_check_valid(ioapic);
162         }
163 }
164
165 static bool rtc_irq_check_coalesced(struct kvm_ioapic *ioapic)
166 {
167         if (ioapic->rtc_status.pending_eoi > 0)
168                 return true; /* coalesced */
169
170         return false;
171 }
172
173 static int ioapic_set_irq(struct kvm_ioapic *ioapic, unsigned int irq,
174                 int irq_level, bool line_status)
175 {
176         union kvm_ioapic_redirect_entry entry;
177         u32 mask = 1 << irq;
178         u32 old_irr;
179         int edge, ret;
180
181         entry = ioapic->redirtbl[irq];
182         edge = (entry.fields.trig_mode == IOAPIC_EDGE_TRIG);
183
184         if (!irq_level) {
185                 ioapic->irr &= ~mask;
186                 ret = 1;
187                 goto out;
188         }
189
190         /*
191          * Return 0 for coalesced interrupts; for edge-triggered interrupts,
192          * this only happens if a previous edge has not been delivered due
193          * do masking.  For level interrupts, the remote_irr field tells
194          * us if the interrupt is waiting for an EOI.
195          *
196          * RTC is special: it is edge-triggered, but userspace likes to know
197          * if it has been already ack-ed via EOI because coalesced RTC
198          * interrupts lead to time drift in Windows guests.  So we track
199          * EOI manually for the RTC interrupt.
200          */
201         if (irq == RTC_GSI && line_status &&
202                 rtc_irq_check_coalesced(ioapic)) {
203                 ret = 0;
204                 goto out;
205         }
206
207         old_irr = ioapic->irr;
208         ioapic->irr |= mask;
209         if (edge)
210                 ioapic->irr_delivered &= ~mask;
211         if ((edge && old_irr == ioapic->irr) ||
212             (!edge && entry.fields.remote_irr)) {
213                 ret = 0;
214                 goto out;
215         }
216
217         ret = ioapic_service(ioapic, irq, line_status);
218
219 out:
220         trace_kvm_ioapic_set_irq(entry.bits, irq, ret == 0);
221         return ret;
222 }
223
224 static void kvm_ioapic_inject_all(struct kvm_ioapic *ioapic, unsigned long irr)
225 {
226         u32 idx;
227
228         rtc_irq_eoi_tracking_reset(ioapic);
229         for_each_set_bit(idx, &irr, IOAPIC_NUM_PINS)
230                 ioapic_set_irq(ioapic, idx, 1, true);
231
232         kvm_rtc_eoi_tracking_restore_all(ioapic);
233 }
234
235
236 static void update_handled_vectors(struct kvm_ioapic *ioapic)
237 {
238         DECLARE_BITMAP(handled_vectors, 256);
239         int i;
240
241         memset(handled_vectors, 0, sizeof(handled_vectors));
242         for (i = 0; i < IOAPIC_NUM_PINS; ++i)
243                 __set_bit(ioapic->redirtbl[i].fields.vector, handled_vectors);
244         memcpy(ioapic->handled_vectors, handled_vectors,
245                sizeof(handled_vectors));
246         smp_wmb();
247 }
248
249 void kvm_ioapic_scan_entry(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap,
250                         u32 *tmr)
251 {
252         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
253         union kvm_ioapic_redirect_entry *e;
254         int index;
255
256         spin_lock(&ioapic->lock);
257         for (index = 0; index < IOAPIC_NUM_PINS; index++) {
258                 e = &ioapic->redirtbl[index];
259                 if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG ||
260                     kvm_irq_has_notifier(ioapic->kvm, KVM_IRQCHIP_IOAPIC, index) ||
261                     index == RTC_GSI) {
262                         if (kvm_apic_match_dest(vcpu, NULL, 0,
263                                 e->fields.dest_id, e->fields.dest_mode)) {
264                                 __set_bit(e->fields.vector,
265                                         (unsigned long *)eoi_exit_bitmap);
266                                 if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG)
267                                         __set_bit(e->fields.vector,
268                                                 (unsigned long *)tmr);
269                         }
270                 }
271         }
272         spin_unlock(&ioapic->lock);
273 }
274
275 void kvm_vcpu_request_scan_ioapic(struct kvm *kvm)
276 {
277         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
278
279         if (!ioapic)
280                 return;
281         kvm_make_scan_ioapic_request(kvm);
282 }
283
284 static void ioapic_write_indirect(struct kvm_ioapic *ioapic, u32 val)
285 {
286         unsigned index;
287         bool mask_before, mask_after;
288         union kvm_ioapic_redirect_entry *e;
289
290         switch (ioapic->ioregsel) {
291         case IOAPIC_REG_VERSION:
292                 /* Writes are ignored. */
293                 break;
294
295         case IOAPIC_REG_APIC_ID:
296                 ioapic->id = (val >> 24) & 0xf;
297                 break;
298
299         case IOAPIC_REG_ARB_ID:
300                 break;
301
302         default:
303                 index = (ioapic->ioregsel - 0x10) >> 1;
304
305                 ioapic_debug("change redir index %x val %x\n", index, val);
306                 if (index >= IOAPIC_NUM_PINS)
307                         return;
308                 e = &ioapic->redirtbl[index];
309                 mask_before = e->fields.mask;
310                 if (ioapic->ioregsel & 1) {
311                         e->bits &= 0xffffffff;
312                         e->bits |= (u64) val << 32;
313                 } else {
314                         e->bits &= ~0xffffffffULL;
315                         e->bits |= (u32) val;
316                         e->fields.remote_irr = 0;
317                 }
318                 update_handled_vectors(ioapic);
319                 mask_after = e->fields.mask;
320                 if (mask_before != mask_after)
321                         kvm_fire_mask_notifiers(ioapic->kvm, KVM_IRQCHIP_IOAPIC, index, mask_after);
322                 if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG
323                     && ioapic->irr & (1 << index))
324                         ioapic_service(ioapic, index, false);
325                 kvm_vcpu_request_scan_ioapic(ioapic->kvm);
326                 break;
327         }
328 }
329
330 static int ioapic_service(struct kvm_ioapic *ioapic, int irq, bool line_status)
331 {
332         union kvm_ioapic_redirect_entry *entry = &ioapic->redirtbl[irq];
333         struct kvm_lapic_irq irqe;
334         int ret;
335
336         if (entry->fields.mask)
337                 return -1;
338
339         ioapic_debug("dest=%x dest_mode=%x delivery_mode=%x "
340                      "vector=%x trig_mode=%x\n",
341                      entry->fields.dest_id, entry->fields.dest_mode,
342                      entry->fields.delivery_mode, entry->fields.vector,
343                      entry->fields.trig_mode);
344
345         irqe.dest_id = entry->fields.dest_id;
346         irqe.vector = entry->fields.vector;
347         irqe.dest_mode = entry->fields.dest_mode;
348         irqe.trig_mode = entry->fields.trig_mode;
349         irqe.delivery_mode = entry->fields.delivery_mode << 8;
350         irqe.level = 1;
351         irqe.shorthand = 0;
352
353         if (irqe.trig_mode == IOAPIC_EDGE_TRIG)
354                 ioapic->irr_delivered |= 1 << irq;
355
356         if (irq == RTC_GSI && line_status) {
357                 /*
358                  * pending_eoi cannot ever become negative (see
359                  * rtc_status_pending_eoi_check_valid) and the caller
360                  * ensures that it is only called if it is >= zero, namely
361                  * if rtc_irq_check_coalesced returns false).
362                  */
363                 BUG_ON(ioapic->rtc_status.pending_eoi != 0);
364                 ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe,
365                                 ioapic->rtc_status.dest_map);
366                 ioapic->rtc_status.pending_eoi = (ret < 0 ? 0 : ret);
367         } else
368                 ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe, NULL);
369
370         if (ret && irqe.trig_mode == IOAPIC_LEVEL_TRIG)
371                 entry->fields.remote_irr = 1;
372
373         return ret;
374 }
375
376 int kvm_ioapic_set_irq(struct kvm_ioapic *ioapic, int irq, int irq_source_id,
377                        int level, bool line_status)
378 {
379         int ret, irq_level;
380
381         BUG_ON(irq < 0 || irq >= IOAPIC_NUM_PINS);
382
383         spin_lock(&ioapic->lock);
384         irq_level = __kvm_irq_line_state(&ioapic->irq_states[irq],
385                                          irq_source_id, level);
386         ret = ioapic_set_irq(ioapic, irq, irq_level, line_status);
387
388         spin_unlock(&ioapic->lock);
389
390         return ret;
391 }
392
393 void kvm_ioapic_clear_all(struct kvm_ioapic *ioapic, int irq_source_id)
394 {
395         int i;
396
397         spin_lock(&ioapic->lock);
398         for (i = 0; i < KVM_IOAPIC_NUM_PINS; i++)
399                 __clear_bit(irq_source_id, &ioapic->irq_states[i]);
400         spin_unlock(&ioapic->lock);
401 }
402
403 static void kvm_ioapic_eoi_inject_work(struct work_struct *work)
404 {
405         int i;
406         struct kvm_ioapic *ioapic = container_of(work, struct kvm_ioapic,
407                                                  eoi_inject.work);
408         spin_lock(&ioapic->lock);
409         for (i = 0; i < IOAPIC_NUM_PINS; i++) {
410                 union kvm_ioapic_redirect_entry *ent = &ioapic->redirtbl[i];
411
412                 if (ent->fields.trig_mode != IOAPIC_LEVEL_TRIG)
413                         continue;
414
415                 if (ioapic->irr & (1 << i) && !ent->fields.remote_irr)
416                         ioapic_service(ioapic, i, false);
417         }
418         spin_unlock(&ioapic->lock);
419 }
420
421 #define IOAPIC_SUCCESSIVE_IRQ_MAX_COUNT 10000
422
423 static void __kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu,
424                         struct kvm_ioapic *ioapic, int vector, int trigger_mode)
425 {
426         int i;
427         struct kvm_lapic *apic = vcpu->arch.apic;
428
429         for (i = 0; i < IOAPIC_NUM_PINS; i++) {
430                 union kvm_ioapic_redirect_entry *ent = &ioapic->redirtbl[i];
431
432                 if (ent->fields.vector != vector)
433                         continue;
434
435                 if (i == RTC_GSI)
436                         rtc_irq_eoi(ioapic, vcpu);
437                 /*
438                  * We are dropping lock while calling ack notifiers because ack
439                  * notifier callbacks for assigned devices call into IOAPIC
440                  * recursively. Since remote_irr is cleared only after call
441                  * to notifiers if the same vector will be delivered while lock
442                  * is dropped it will be put into irr and will be delivered
443                  * after ack notifier returns.
444                  */
445                 spin_unlock(&ioapic->lock);
446                 kvm_notify_acked_irq(ioapic->kvm, KVM_IRQCHIP_IOAPIC, i);
447                 spin_lock(&ioapic->lock);
448
449                 if (trigger_mode != IOAPIC_LEVEL_TRIG ||
450                     kvm_apic_get_reg(apic, APIC_SPIV) & APIC_SPIV_DIRECTED_EOI)
451                         continue;
452
453                 ASSERT(ent->fields.trig_mode == IOAPIC_LEVEL_TRIG);
454                 ent->fields.remote_irr = 0;
455                 if (!ent->fields.mask && (ioapic->irr & (1 << i))) {
456                         ++ioapic->irq_eoi[i];
457                         if (ioapic->irq_eoi[i] == IOAPIC_SUCCESSIVE_IRQ_MAX_COUNT) {
458                                 /*
459                                  * Real hardware does not deliver the interrupt
460                                  * immediately during eoi broadcast, and this
461                                  * lets a buggy guest make slow progress
462                                  * even if it does not correctly handle a
463                                  * level-triggered interrupt.  Emulate this
464                                  * behavior if we detect an interrupt storm.
465                                  */
466                                 schedule_delayed_work(&ioapic->eoi_inject, HZ / 100);
467                                 ioapic->irq_eoi[i] = 0;
468                                 trace_kvm_ioapic_delayed_eoi_inj(ent->bits);
469                         } else {
470                                 ioapic_service(ioapic, i, false);
471                         }
472                 } else {
473                         ioapic->irq_eoi[i] = 0;
474                 }
475         }
476 }
477
478 void kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu, int vector, int trigger_mode)
479 {
480         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
481
482         spin_lock(&ioapic->lock);
483         __kvm_ioapic_update_eoi(vcpu, ioapic, vector, trigger_mode);
484         spin_unlock(&ioapic->lock);
485 }
486
487 static inline struct kvm_ioapic *to_ioapic(struct kvm_io_device *dev)
488 {
489         return container_of(dev, struct kvm_ioapic, dev);
490 }
491
492 static inline int ioapic_in_range(struct kvm_ioapic *ioapic, gpa_t addr)
493 {
494         return ((addr >= ioapic->base_address &&
495                  (addr < ioapic->base_address + IOAPIC_MEM_LENGTH)));
496 }
497
498 static int ioapic_mmio_read(struct kvm_vcpu *vcpu, struct kvm_io_device *this,
499                                 gpa_t addr, int len, void *val)
500 {
501         struct kvm_ioapic *ioapic = to_ioapic(this);
502         u32 result;
503         if (!ioapic_in_range(ioapic, addr))
504                 return -EOPNOTSUPP;
505
506         ioapic_debug("addr %lx\n", (unsigned long)addr);
507         ASSERT(!(addr & 0xf));  /* check alignment */
508
509         addr &= 0xff;
510         spin_lock(&ioapic->lock);
511         switch (addr) {
512         case IOAPIC_REG_SELECT:
513                 result = ioapic->ioregsel;
514                 break;
515
516         case IOAPIC_REG_WINDOW:
517                 result = ioapic_read_indirect(ioapic, addr, len);
518                 break;
519
520         default:
521                 result = 0;
522                 break;
523         }
524         spin_unlock(&ioapic->lock);
525
526         switch (len) {
527         case 8:
528                 *(u64 *) val = result;
529                 break;
530         case 1:
531         case 2:
532         case 4:
533                 memcpy(val, (char *)&result, len);
534                 break;
535         default:
536                 printk(KERN_WARNING "ioapic: wrong length %d\n", len);
537         }
538         return 0;
539 }
540
541 static int ioapic_mmio_write(struct kvm_vcpu *vcpu, struct kvm_io_device *this,
542                                  gpa_t addr, int len, const void *val)
543 {
544         struct kvm_ioapic *ioapic = to_ioapic(this);
545         u32 data;
546         if (!ioapic_in_range(ioapic, addr))
547                 return -EOPNOTSUPP;
548
549         ioapic_debug("ioapic_mmio_write addr=%p len=%d val=%p\n",
550                      (void*)addr, len, val);
551         ASSERT(!(addr & 0xf));  /* check alignment */
552
553         switch (len) {
554         case 8:
555         case 4:
556                 data = *(u32 *) val;
557                 break;
558         case 2:
559                 data = *(u16 *) val;
560                 break;
561         case 1:
562                 data = *(u8  *) val;
563                 break;
564         default:
565                 printk(KERN_WARNING "ioapic: Unsupported size %d\n", len);
566                 return 0;
567         }
568
569         addr &= 0xff;
570         spin_lock(&ioapic->lock);
571         switch (addr) {
572         case IOAPIC_REG_SELECT:
573                 ioapic->ioregsel = data & 0xFF; /* 8-bit register */
574                 break;
575
576         case IOAPIC_REG_WINDOW:
577                 ioapic_write_indirect(ioapic, data);
578                 break;
579
580         default:
581                 break;
582         }
583         spin_unlock(&ioapic->lock);
584         return 0;
585 }
586
587 static void kvm_ioapic_reset(struct kvm_ioapic *ioapic)
588 {
589         int i;
590
591         cancel_delayed_work_sync(&ioapic->eoi_inject);
592         for (i = 0; i < IOAPIC_NUM_PINS; i++)
593                 ioapic->redirtbl[i].fields.mask = 1;
594         ioapic->base_address = IOAPIC_DEFAULT_BASE_ADDRESS;
595         ioapic->ioregsel = 0;
596         ioapic->irr = 0;
597         ioapic->irr_delivered = 0;
598         ioapic->id = 0;
599         memset(ioapic->irq_eoi, 0x00, IOAPIC_NUM_PINS);
600         rtc_irq_eoi_tracking_reset(ioapic);
601         update_handled_vectors(ioapic);
602 }
603
604 static const struct kvm_io_device_ops ioapic_mmio_ops = {
605         .read     = ioapic_mmio_read,
606         .write    = ioapic_mmio_write,
607 };
608
609 int kvm_ioapic_init(struct kvm *kvm)
610 {
611         struct kvm_ioapic *ioapic;
612         int ret;
613
614         ioapic = kzalloc(sizeof(struct kvm_ioapic), GFP_KERNEL);
615         if (!ioapic)
616                 return -ENOMEM;
617         spin_lock_init(&ioapic->lock);
618         INIT_DELAYED_WORK(&ioapic->eoi_inject, kvm_ioapic_eoi_inject_work);
619         kvm->arch.vioapic = ioapic;
620         kvm_ioapic_reset(ioapic);
621         kvm_iodevice_init(&ioapic->dev, &ioapic_mmio_ops);
622         ioapic->kvm = kvm;
623         mutex_lock(&kvm->slots_lock);
624         ret = kvm_io_bus_register_dev(kvm, KVM_MMIO_BUS, ioapic->base_address,
625                                       IOAPIC_MEM_LENGTH, &ioapic->dev);
626         mutex_unlock(&kvm->slots_lock);
627         if (ret < 0) {
628                 kvm->arch.vioapic = NULL;
629                 kfree(ioapic);
630         }
631
632         return ret;
633 }
634
635 void kvm_ioapic_destroy(struct kvm *kvm)
636 {
637         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
638
639         cancel_delayed_work_sync(&ioapic->eoi_inject);
640         if (ioapic) {
641                 kvm_io_bus_unregister_dev(kvm, KVM_MMIO_BUS, &ioapic->dev);
642                 kvm->arch.vioapic = NULL;
643                 kfree(ioapic);
644         }
645 }
646
647 int kvm_get_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state)
648 {
649         struct kvm_ioapic *ioapic = ioapic_irqchip(kvm);
650         if (!ioapic)
651                 return -EINVAL;
652
653         spin_lock(&ioapic->lock);
654         memcpy(state, ioapic, sizeof(struct kvm_ioapic_state));
655         state->irr &= ~ioapic->irr_delivered;
656         spin_unlock(&ioapic->lock);
657         return 0;
658 }
659
660 int kvm_set_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state)
661 {
662         struct kvm_ioapic *ioapic = ioapic_irqchip(kvm);
663         if (!ioapic)
664                 return -EINVAL;
665
666         spin_lock(&ioapic->lock);
667         memcpy(ioapic, state, sizeof(struct kvm_ioapic_state));
668         ioapic->irr = 0;
669         ioapic->irr_delivered = 0;
670         update_handled_vectors(ioapic);
671         kvm_vcpu_request_scan_ioapic(kvm);
672         kvm_ioapic_inject_all(ioapic, state->irr);
673         spin_unlock(&ioapic->lock);
674         return 0;
675 }