f14cfd9d1f94c1a634833da25e86eea9cb43b864
[sfrench/cifs-2.6.git] / arch / x86 / kernel / tsc_32.c
1 #include <linux/sched.h>
2 #include <linux/clocksource.h>
3 #include <linux/workqueue.h>
4 #include <linux/cpufreq.h>
5 #include <linux/jiffies.h>
6 #include <linux/init.h>
7 #include <linux/dmi.h>
8 #include <linux/percpu.h>
9
10 #include <asm/delay.h>
11 #include <asm/tsc.h>
12 #include <asm/io.h>
13 #include <asm/timer.h>
14
15 #include "mach_timer.h"
16
17 static int tsc_enabled;
18
19 /*
20  * On some systems the TSC frequency does not
21  * change with the cpu frequency. So we need
22  * an extra value to store the TSC freq
23  */
24 unsigned int tsc_khz;
25 EXPORT_SYMBOL_GPL(tsc_khz);
26
27 #ifdef CONFIG_X86_TSC
28 static int __init tsc_setup(char *str)
29 {
30         printk(KERN_WARNING "notsc: Kernel compiled with CONFIG_X86_TSC, "
31                                 "cannot disable TSC completely.\n");
32         mark_tsc_unstable("user disabled TSC");
33         return 1;
34 }
35 #else
36 /*
37  * disable flag for tsc. Takes effect by clearing the TSC cpu flag
38  * in cpu/common.c
39  */
40 static int __init tsc_setup(char *str)
41 {
42         setup_clear_cpu_cap(X86_FEATURE_TSC);
43         return 1;
44 }
45 #endif
46
47 __setup("notsc", tsc_setup);
48
49 /*
50  * code to mark and check if the TSC is unstable
51  * due to cpufreq or due to unsynced TSCs
52  */
53 static int tsc_unstable;
54
55 int check_tsc_unstable(void)
56 {
57         return tsc_unstable;
58 }
59 EXPORT_SYMBOL_GPL(check_tsc_unstable);
60
61 /* Accelerators for sched_clock()
62  * convert from cycles(64bits) => nanoseconds (64bits)
63  *  basic equation:
64  *              ns = cycles / (freq / ns_per_sec)
65  *              ns = cycles * (ns_per_sec / freq)
66  *              ns = cycles * (10^9 / (cpu_khz * 10^3))
67  *              ns = cycles * (10^6 / cpu_khz)
68  *
69  *      Then we use scaling math (suggested by george@mvista.com) to get:
70  *              ns = cycles * (10^6 * SC / cpu_khz) / SC
71  *              ns = cycles * cyc2ns_scale / SC
72  *
73  *      And since SC is a constant power of two, we can convert the div
74  *  into a shift.
75  *
76  *  We can use khz divisor instead of mhz to keep a better precision, since
77  *  cyc2ns_scale is limited to 10^6 * 2^10, which fits in 32 bits.
78  *  (mathieu.desnoyers@polymtl.ca)
79  *
80  *                      -johnstul@us.ibm.com "math is hard, lets go shopping!"
81  */
82
83 DEFINE_PER_CPU(unsigned long, cyc2ns);
84
85 static void set_cyc2ns_scale(unsigned long cpu_khz, int cpu)
86 {
87         unsigned long flags, prev_scale, *scale;
88         unsigned long long tsc_now, ns_now;
89
90         local_irq_save(flags);
91         sched_clock_idle_sleep_event();
92
93         scale = &per_cpu(cyc2ns, cpu);
94
95         rdtscll(tsc_now);
96         ns_now = __cycles_2_ns(tsc_now);
97
98         prev_scale = *scale;
99         if (cpu_khz)
100                 *scale = (NSEC_PER_MSEC << CYC2NS_SCALE_FACTOR)/cpu_khz;
101
102         /*
103          * Start smoothly with the new frequency:
104          */
105         sched_clock_idle_wakeup_event(0);
106         local_irq_restore(flags);
107 }
108
109 /*
110  * Scheduler clock - returns current time in nanosec units.
111  */
112 unsigned long long native_sched_clock(void)
113 {
114         unsigned long long this_offset;
115
116         /*
117          * Fall back to jiffies if there's no TSC available:
118          * ( But note that we still use it if the TSC is marked
119          *   unstable. We do this because unlike Time Of Day,
120          *   the scheduler clock tolerates small errors and it's
121          *   very important for it to be as fast as the platform
122          *   can achive it. )
123          */
124         if (unlikely(!tsc_enabled && !tsc_unstable))
125                 /* No locking but a rare wrong value is not a big deal: */
126                 return (jiffies_64 - INITIAL_JIFFIES) * (1000000000 / HZ);
127
128         /* read the Time Stamp Counter: */
129         rdtscll(this_offset);
130
131         /* return the value in ns */
132         return cycles_2_ns(this_offset);
133 }
134
135 /* We need to define a real function for sched_clock, to override the
136    weak default version */
137 #ifdef CONFIG_PARAVIRT
138 unsigned long long sched_clock(void)
139 {
140         return paravirt_sched_clock();
141 }
142 #else
143 unsigned long long sched_clock(void)
144         __attribute__((alias("native_sched_clock")));
145 #endif
146
147 unsigned long native_calculate_cpu_khz(void)
148 {
149         unsigned long long start, end;
150         unsigned long count;
151         u64 delta64 = (u64)ULLONG_MAX;
152         int i;
153         unsigned long flags;
154
155         local_irq_save(flags);
156
157         /* run 3 times to ensure the cache is warm and to get an accurate reading */
158         for (i = 0; i < 3; i++) {
159                 mach_prepare_counter();
160                 rdtscll(start);
161                 mach_countup(&count);
162                 rdtscll(end);
163
164                 /*
165                  * Error: ECTCNEVERSET
166                  * The CTC wasn't reliable: we got a hit on the very first read,
167                  * or the CPU was so fast/slow that the quotient wouldn't fit in
168                  * 32 bits..
169                  */
170                 if (count <= 1)
171                         continue;
172
173                 /* cpu freq too slow: */
174                 if ((end - start) <= CALIBRATE_TIME_MSEC)
175                         continue;
176
177                 /*
178                  * We want the minimum time of all runs in case one of them
179                  * is inaccurate due to SMI or other delay
180                  */
181                 delta64 = min(delta64, (end - start));
182         }
183
184         /* cpu freq too fast (or every run was bad): */
185         if (delta64 > (1ULL<<32))
186                 goto err;
187
188         delta64 += CALIBRATE_TIME_MSEC/2; /* round for do_div */
189         do_div(delta64,CALIBRATE_TIME_MSEC);
190
191         local_irq_restore(flags);
192         return (unsigned long)delta64;
193 err:
194         local_irq_restore(flags);
195         return 0;
196 }
197
198 int recalibrate_cpu_khz(void)
199 {
200 #ifndef CONFIG_SMP
201         unsigned long cpu_khz_old = cpu_khz;
202
203         if (cpu_has_tsc) {
204                 cpu_khz = calculate_cpu_khz();
205                 tsc_khz = cpu_khz;
206                 cpu_data(0).loops_per_jiffy =
207                         cpufreq_scale(cpu_data(0).loops_per_jiffy,
208                                         cpu_khz_old, cpu_khz);
209                 return 0;
210         } else
211                 return -ENODEV;
212 #else
213         return -ENODEV;
214 #endif
215 }
216
217 EXPORT_SYMBOL(recalibrate_cpu_khz);
218
219 #ifdef CONFIG_CPU_FREQ
220
221 /*
222  * if the CPU frequency is scaled, TSC-based delays will need a different
223  * loops_per_jiffy value to function properly.
224  */
225 static unsigned int ref_freq = 0;
226 static unsigned long loops_per_jiffy_ref = 0;
227 static unsigned long cpu_khz_ref = 0;
228
229 static int
230 time_cpufreq_notifier(struct notifier_block *nb, unsigned long val, void *data)
231 {
232         struct cpufreq_freqs *freq = data;
233
234         if (!ref_freq) {
235                 if (!freq->old){
236                         ref_freq = freq->new;
237                         return 0;
238                 }
239                 ref_freq = freq->old;
240                 loops_per_jiffy_ref = cpu_data(freq->cpu).loops_per_jiffy;
241                 cpu_khz_ref = cpu_khz;
242         }
243
244         if ((val == CPUFREQ_PRECHANGE  && freq->old < freq->new) ||
245             (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
246             (val == CPUFREQ_RESUMECHANGE)) {
247                 if (!(freq->flags & CPUFREQ_CONST_LOOPS))
248                         cpu_data(freq->cpu).loops_per_jiffy =
249                                 cpufreq_scale(loops_per_jiffy_ref,
250                                                 ref_freq, freq->new);
251
252                 if (cpu_khz) {
253
254                         if (num_online_cpus() == 1)
255                                 cpu_khz = cpufreq_scale(cpu_khz_ref,
256                                                 ref_freq, freq->new);
257                         if (!(freq->flags & CPUFREQ_CONST_LOOPS)) {
258                                 tsc_khz = cpu_khz;
259                                 preempt_disable();
260                                 set_cyc2ns_scale(cpu_khz, smp_processor_id());
261                                 preempt_enable();
262                                 /*
263                                  * TSC based sched_clock turns
264                                  * to junk w/ cpufreq
265                                  */
266                                 mark_tsc_unstable("cpufreq changes");
267                         }
268                 }
269         }
270
271         return 0;
272 }
273
274 static struct notifier_block time_cpufreq_notifier_block = {
275         .notifier_call  = time_cpufreq_notifier
276 };
277
278 static int __init cpufreq_tsc(void)
279 {
280         return cpufreq_register_notifier(&time_cpufreq_notifier_block,
281                                          CPUFREQ_TRANSITION_NOTIFIER);
282 }
283 core_initcall(cpufreq_tsc);
284
285 #endif
286
287 /* clock source code */
288
289 static unsigned long current_tsc_khz = 0;
290
291 static cycle_t read_tsc(void)
292 {
293         cycle_t ret;
294
295         rdtscll(ret);
296
297         return ret;
298 }
299
300 static struct clocksource clocksource_tsc = {
301         .name                   = "tsc",
302         .rating                 = 300,
303         .read                   = read_tsc,
304         .mask                   = CLOCKSOURCE_MASK(64),
305         .mult                   = 0, /* to be set */
306         .shift                  = 22,
307         .flags                  = CLOCK_SOURCE_IS_CONTINUOUS |
308                                   CLOCK_SOURCE_MUST_VERIFY,
309 };
310
311 void mark_tsc_unstable(char *reason)
312 {
313         if (!tsc_unstable) {
314                 tsc_unstable = 1;
315                 tsc_enabled = 0;
316                 printk("Marking TSC unstable due to: %s.\n", reason);
317                 /* Can be called before registration */
318                 if (clocksource_tsc.mult)
319                         clocksource_change_rating(&clocksource_tsc, 0);
320                 else
321                         clocksource_tsc.rating = 0;
322         }
323 }
324 EXPORT_SYMBOL_GPL(mark_tsc_unstable);
325
326 static int __init dmi_mark_tsc_unstable(const struct dmi_system_id *d)
327 {
328         printk(KERN_NOTICE "%s detected: marking TSC unstable.\n",
329                        d->ident);
330         tsc_unstable = 1;
331         return 0;
332 }
333
334 /* List of systems that have known TSC problems */
335 static struct dmi_system_id __initdata bad_tsc_dmi_table[] = {
336         {
337          .callback = dmi_mark_tsc_unstable,
338          .ident = "IBM Thinkpad 380XD",
339          .matches = {
340                      DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
341                      DMI_MATCH(DMI_BOARD_NAME, "2635FA0"),
342                      },
343          },
344          {}
345 };
346
347 /*
348  * Make an educated guess if the TSC is trustworthy and synchronized
349  * over all CPUs.
350  */
351 __cpuinit int unsynchronized_tsc(void)
352 {
353         if (!cpu_has_tsc || tsc_unstable)
354                 return 1;
355
356         /* Anything with constant TSC should be synchronized */
357         if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
358                 return 0;
359
360         /*
361          * Intel systems are normally all synchronized.
362          * Exceptions must mark TSC as unstable:
363          */
364         if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) {
365                 /* assume multi socket systems are not synchronized: */
366                 if (num_possible_cpus() > 1)
367                         tsc_unstable = 1;
368         }
369         return tsc_unstable;
370 }
371
372 /*
373  * Geode_LX - the OLPC CPU has a possibly a very reliable TSC
374  */
375 #ifdef CONFIG_MGEODE_LX
376 /* RTSC counts during suspend */
377 #define RTSC_SUSP 0x100
378
379 static void __init check_geode_tsc_reliable(void)
380 {
381         unsigned long res_low, res_high;
382
383         rdmsr_safe(MSR_GEODE_BUSCONT_CONF0, &res_low, &res_high);
384         if (res_low & RTSC_SUSP)
385                 clocksource_tsc.flags &= ~CLOCK_SOURCE_MUST_VERIFY;
386 }
387 #else
388 static inline void check_geode_tsc_reliable(void) { }
389 #endif
390
391
392 void __init tsc_init(void)
393 {
394         int cpu;
395
396         if (!cpu_has_tsc)
397                 goto out_no_tsc;
398
399         cpu_khz = calculate_cpu_khz();
400         tsc_khz = cpu_khz;
401
402         if (!cpu_khz)
403                 goto out_no_tsc;
404
405         printk("Detected %lu.%03lu MHz processor.\n",
406                                 (unsigned long)cpu_khz / 1000,
407                                 (unsigned long)cpu_khz % 1000);
408
409         /*
410          * Secondary CPUs do not run through tsc_init(), so set up
411          * all the scale factors for all CPUs, assuming the same
412          * speed as the bootup CPU. (cpufreq notifiers will fix this
413          * up if their speed diverges)
414          */
415         for_each_possible_cpu(cpu)
416                 set_cyc2ns_scale(cpu_khz, cpu);
417
418         use_tsc_delay();
419
420         /* Check and install the TSC clocksource */
421         dmi_check_system(bad_tsc_dmi_table);
422
423         unsynchronized_tsc();
424         check_geode_tsc_reliable();
425         current_tsc_khz = tsc_khz;
426         clocksource_tsc.mult = clocksource_khz2mult(current_tsc_khz,
427                                                         clocksource_tsc.shift);
428         /* lower the rating if we already know its unstable: */
429         if (check_tsc_unstable()) {
430                 clocksource_tsc.rating = 0;
431                 clocksource_tsc.flags &= ~CLOCK_SOURCE_IS_CONTINUOUS;
432         } else
433                 tsc_enabled = 1;
434
435         clocksource_register(&clocksource_tsc);
436
437         return;
438
439 out_no_tsc:
440         setup_clear_cpu_cap(X86_FEATURE_TSC);
441 }