2 * x86 SMP booting functions
4 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
5 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
7 * Much of the core SMP work is based on previous work by Thomas Radke, to
8 * whom a great many thanks are extended.
10 * Thanks to Intel for making available several different Pentium,
11 * Pentium Pro and Pentium-II/Xeon MP machines.
12 * Original development of Linux SMP code supported by Caldera.
14 * This code is released under the GNU General Public License version 2 or
18 * Felix Koop : NR_CPUS used properly
19 * Jose Renau : Handle single CPU case.
20 * Alan Cox : By repeated request 8) - Total BogoMIPS report.
21 * Greg Wright : Fix for kernel stacks panic.
22 * Erich Boleyn : MP v1.4 and additional changes.
23 * Matthias Sattler : Changes for 2.1 kernel map.
24 * Michel Lespinasse : Changes for 2.1 kernel map.
25 * Michael Chastain : Change trampoline.S to gnu as.
26 * Alan Cox : Dumb bug: 'B' step PPro's are fine
27 * Ingo Molnar : Added APIC timers, based on code
29 * Ingo Molnar : various cleanups and rewrites
30 * Tigran Aivazian : fixed "0.00 in /proc/uptime on SMP" bug.
31 * Maciej W. Rozycki : Bits for genuine 82489DX APICs
32 * Martin J. Bligh : Added support for multi-quad systems
33 * Dave Jones : Report invalid combinations of Athlon CPUs.
34 * Rusty Russell : Hacked into shape for new "hotplug" boot process. */
36 #include <linux/module.h>
37 #include <linux/init.h>
38 #include <linux/kernel.h>
41 #include <linux/sched.h>
42 #include <linux/kernel_stat.h>
43 #include <linux/bootmem.h>
44 #include <linux/notifier.h>
45 #include <linux/cpu.h>
46 #include <linux/percpu.h>
47 #include <linux/nmi.h>
49 #include <linux/delay.h>
50 #include <linux/mc146818rtc.h>
51 #include <asm/tlbflush.h>
53 #include <asm/arch_hooks.h>
56 #include <mach_apic.h>
57 #include <mach_wakecpu.h>
58 #include <smpboot_hooks.h>
62 extern int smp_b_stepping;
64 static cpumask_t smp_commenced_mask;
66 /* which logical CPU number maps to which CPU (physical APIC ID) */
67 u16 x86_cpu_to_apicid_init[NR_CPUS] __initdata =
68 { [0 ... NR_CPUS-1] = BAD_APICID };
69 void *x86_cpu_to_apicid_early_ptr;
70 DEFINE_PER_CPU(u16, x86_cpu_to_apicid) = BAD_APICID;
71 EXPORT_PER_CPU_SYMBOL(x86_cpu_to_apicid);
73 u8 apicid_2_node[MAX_APICID];
75 static void map_cpu_to_logical_apicid(void);
77 /* State of each CPU. */
78 DEFINE_PER_CPU(int, cpu_state) = { 0 };
80 static atomic_t init_deasserted;
82 static void __cpuinit smp_callin(void)
85 unsigned long timeout;
88 * If waken up by an INIT in an 82489DX configuration
89 * we may get here before an INIT-deassert IPI reaches
90 * our local APIC. We have to wait for the IPI or we'll
91 * lock up on an APIC access.
93 wait_for_init_deassert(&init_deasserted);
96 * (This works even if the APIC is not enabled.)
98 phys_id = GET_APIC_ID(apic_read(APIC_ID));
99 cpuid = smp_processor_id();
100 if (cpu_isset(cpuid, cpu_callin_map)) {
101 printk("huh, phys CPU#%d, CPU#%d already present??\n",
105 Dprintk("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid, phys_id);
108 * STARTUP IPIs are fragile beasts as they might sometimes
109 * trigger some glue motherboard logic. Complete APIC bus
110 * silence for 1 second, this overestimates the time the
111 * boot CPU is spending to send the up to 2 STARTUP IPIs
112 * by a factor of two. This should be enough.
116 * Waiting 2s total for startup (udelay is not yet working)
118 timeout = jiffies + 2*HZ;
119 while (time_before(jiffies, timeout)) {
121 * Has the boot CPU finished it's STARTUP sequence?
123 if (cpu_isset(cpuid, cpu_callout_map))
128 if (!time_before(jiffies, timeout)) {
129 printk("BUG: CPU%d started up but did not get a callout!\n",
135 * the boot CPU has finished the init stage and is spinning
136 * on callin_map until we finish. We are free to set up this
137 * CPU, first the APIC. (this is probably redundant on most
141 Dprintk("CALLIN, before setup_local_APIC().\n");
142 smp_callin_clear_local_apic();
144 map_cpu_to_logical_apicid();
150 Dprintk("Stack at about %p\n",&cpuid);
153 * Save our processor parameters
155 smp_store_cpu_info(cpuid);
158 * Allow the master to continue.
160 cpu_set(cpuid, cpu_callin_map);
166 * Activate a secondary processor.
168 static void __cpuinit start_secondary(void *unused)
171 * Don't put *anything* before cpu_init(), SMP booting is too
172 * fragile that we want to limit the things done here to the
173 * most necessary things.
181 while (!cpu_isset(smp_processor_id(), smp_commenced_mask))
184 /* otherwise gcc will move up smp_processor_id before the cpu_init */
187 * Check TSC synchronization with the BP:
189 check_tsc_sync_target();
191 if (nmi_watchdog == NMI_IO_APIC) {
192 disable_8259A_irq(0);
193 enable_NMI_through_LVT0();
197 * low-memory mappings have been cleared, flush them from
198 * the local TLBs too.
202 /* This must be done before setting cpu_online_map */
203 set_cpu_sibling_map(raw_smp_processor_id());
207 * We need to hold call_lock, so there is no inconsistency
208 * between the time smp_call_function() determines number of
209 * IPI recipients, and the time when the determination is made
210 * for which cpus receive the IPI. Holding this
211 * lock helps us to not include this cpu in a currently in progress
212 * smp_call_function().
214 lock_ipi_call_lock();
215 cpu_set(smp_processor_id(), cpu_online_map);
216 unlock_ipi_call_lock();
217 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
219 setup_secondary_clock();
226 * Everything has been set up for the secondary
227 * CPUs - they just need to reload everything
228 * from the task structure
229 * This function must not return.
231 void __devinit initialize_secondary(void)
234 * We don't actually need to load the full TSS,
235 * basically just the stack pointer and the ip.
242 :"m" (current->thread.sp),"m" (current->thread.ip));
245 /* Static state in head.S used to set up a CPU */
253 /* which logical CPUs are on which nodes */
254 cpumask_t node_to_cpumask_map[MAX_NUMNODES] __read_mostly =
255 { [0 ... MAX_NUMNODES-1] = CPU_MASK_NONE };
256 EXPORT_SYMBOL(node_to_cpumask_map);
257 /* which node each logical CPU is on */
258 int cpu_to_node_map[NR_CPUS] __read_mostly = { [0 ... NR_CPUS-1] = 0 };
259 EXPORT_SYMBOL(cpu_to_node_map);
261 /* set up a mapping between cpu and node. */
262 static inline void map_cpu_to_node(int cpu, int node)
264 printk("Mapping cpu %d to node %d\n", cpu, node);
265 cpu_set(cpu, node_to_cpumask_map[node]);
266 cpu_to_node_map[cpu] = node;
269 /* undo a mapping between cpu and node. */
270 static inline void unmap_cpu_to_node(int cpu)
274 printk("Unmapping cpu %d from all nodes\n", cpu);
275 for (node = 0; node < MAX_NUMNODES; node ++)
276 cpu_clear(cpu, node_to_cpumask_map[node]);
277 cpu_to_node_map[cpu] = 0;
279 #else /* !CONFIG_NUMA */
281 #define map_cpu_to_node(cpu, node) ({})
282 #define unmap_cpu_to_node(cpu) ({})
284 #endif /* CONFIG_NUMA */
286 u8 cpu_2_logical_apicid[NR_CPUS] __read_mostly = { [0 ... NR_CPUS-1] = BAD_APICID };
288 static void map_cpu_to_logical_apicid(void)
290 int cpu = smp_processor_id();
291 int apicid = logical_smp_processor_id();
292 int node = apicid_to_node(apicid);
294 if (!node_online(node))
295 node = first_online_node;
297 cpu_2_logical_apicid[cpu] = apicid;
298 map_cpu_to_node(cpu, node);
301 static void unmap_cpu_to_logical_apicid(int cpu)
303 cpu_2_logical_apicid[cpu] = BAD_APICID;
304 unmap_cpu_to_node(cpu);
307 static inline void __inquire_remote_apic(int apicid)
309 unsigned i, regs[] = { APIC_ID >> 4, APIC_LVR >> 4, APIC_SPIV >> 4 };
310 char *names[] = { "ID", "VERSION", "SPIV" };
314 printk(KERN_INFO "Inquiring remote APIC #%d...\n", apicid);
316 for (i = 0; i < ARRAY_SIZE(regs); i++) {
317 printk(KERN_INFO "... APIC #%d %s: ", apicid, names[i]);
322 status = safe_apic_wait_icr_idle();
325 "a previous APIC delivery may have failed\n");
327 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(apicid));
328 apic_write_around(APIC_ICR, APIC_DM_REMRD | regs[i]);
333 status = apic_read(APIC_ICR) & APIC_ICR_RR_MASK;
334 } while (status == APIC_ICR_RR_INPROG && timeout++ < 1000);
337 case APIC_ICR_RR_VALID:
338 status = apic_read(APIC_RRR);
339 printk(KERN_CONT "%08x\n", status);
342 printk(KERN_CONT "failed\n");
347 #ifdef WAKE_SECONDARY_VIA_NMI
349 * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
350 * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
351 * won't ... remember to clear down the APIC, etc later.
354 wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip)
356 unsigned long send_status, accept_status = 0;
360 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(logical_apicid));
362 /* Boot on the stack */
363 /* Kick the second */
364 apic_write_around(APIC_ICR, APIC_DM_NMI | APIC_DEST_LOGICAL);
366 Dprintk("Waiting for send to finish...\n");
367 send_status = safe_apic_wait_icr_idle();
370 * Give the other CPU some time to accept the IPI.
374 * Due to the Pentium erratum 3AP.
376 maxlvt = lapic_get_maxlvt();
378 apic_read_around(APIC_SPIV);
379 apic_write(APIC_ESR, 0);
381 accept_status = (apic_read(APIC_ESR) & 0xEF);
382 Dprintk("NMI sent.\n");
385 printk("APIC never delivered???\n");
387 printk("APIC delivery error (%lx).\n", accept_status);
389 return (send_status | accept_status);
391 #endif /* WAKE_SECONDARY_VIA_NMI */
393 #ifdef WAKE_SECONDARY_VIA_INIT
395 wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip)
397 unsigned long send_status, accept_status = 0;
398 int maxlvt, num_starts, j;
401 * Be paranoid about clearing APIC errors.
403 if (APIC_INTEGRATED(apic_version[phys_apicid])) {
404 apic_read_around(APIC_SPIV);
405 apic_write(APIC_ESR, 0);
409 Dprintk("Asserting INIT.\n");
412 * Turn INIT on target chip
414 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
419 apic_write_around(APIC_ICR, APIC_INT_LEVELTRIG | APIC_INT_ASSERT
422 Dprintk("Waiting for send to finish...\n");
423 send_status = safe_apic_wait_icr_idle();
427 Dprintk("Deasserting INIT.\n");
430 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
433 apic_write_around(APIC_ICR, APIC_INT_LEVELTRIG | APIC_DM_INIT);
435 Dprintk("Waiting for send to finish...\n");
436 send_status = safe_apic_wait_icr_idle();
439 atomic_set(&init_deasserted, 1);
442 * Should we send STARTUP IPIs ?
444 * Determine this based on the APIC version.
445 * If we don't have an integrated APIC, don't send the STARTUP IPIs.
447 if (APIC_INTEGRATED(apic_version[phys_apicid]))
453 * Paravirt / VMI wants a startup IPI hook here to set up the
454 * target processor state.
456 startup_ipi_hook(phys_apicid, (unsigned long) start_secondary,
457 (unsigned long) stack_start.sp);
460 * Run STARTUP IPI loop.
462 Dprintk("#startup loops: %d.\n", num_starts);
464 maxlvt = lapic_get_maxlvt();
466 for (j = 1; j <= num_starts; j++) {
467 Dprintk("Sending STARTUP #%d.\n",j);
468 apic_read_around(APIC_SPIV);
469 apic_write(APIC_ESR, 0);
471 Dprintk("After apic_write.\n");
478 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
480 /* Boot on the stack */
481 /* Kick the second */
482 apic_write_around(APIC_ICR, APIC_DM_STARTUP
483 | (start_eip >> 12));
486 * Give the other CPU some time to accept the IPI.
490 Dprintk("Startup point 1.\n");
492 Dprintk("Waiting for send to finish...\n");
493 send_status = safe_apic_wait_icr_idle();
496 * Give the other CPU some time to accept the IPI.
500 * Due to the Pentium erratum 3AP.
503 apic_read_around(APIC_SPIV);
504 apic_write(APIC_ESR, 0);
506 accept_status = (apic_read(APIC_ESR) & 0xEF);
507 if (send_status || accept_status)
510 Dprintk("After Startup.\n");
513 printk("APIC never delivered???\n");
515 printk("APIC delivery error (%lx).\n", accept_status);
517 return (send_status | accept_status);
519 #endif /* WAKE_SECONDARY_VIA_INIT */
521 extern cpumask_t cpu_initialized;
522 static inline int alloc_cpu_id(void)
526 cpus_complement(tmp_map, cpu_present_map);
527 cpu = first_cpu(tmp_map);
533 #ifdef CONFIG_HOTPLUG_CPU
534 static struct task_struct * __cpuinitdata cpu_idle_tasks[NR_CPUS];
535 static inline struct task_struct * __cpuinit alloc_idle_task(int cpu)
537 struct task_struct *idle;
539 if ((idle = cpu_idle_tasks[cpu]) != NULL) {
540 /* initialize thread_struct. we really want to avoid destroy
543 idle->thread.sp = (unsigned long)task_pt_regs(idle);
544 init_idle(idle, cpu);
547 idle = fork_idle(cpu);
550 cpu_idle_tasks[cpu] = idle;
554 #define alloc_idle_task(cpu) fork_idle(cpu)
557 static int __cpuinit do_boot_cpu(int apicid, int cpu)
559 * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad
560 * (ie clustered apic addressing mode), this is a LOGICAL apic ID.
561 * Returns zero if CPU booted OK, else error code from wakeup_secondary_cpu.
564 struct task_struct *idle;
565 unsigned long boot_error;
567 unsigned long start_eip;
568 unsigned short nmi_high = 0, nmi_low = 0;
571 * Save current MTRR state in case it was changed since early boot
572 * (e.g. by the ACPI SMI) to initialize new CPUs with MTRRs in sync:
577 * We can't use kernel_thread since we must avoid to
578 * reschedule the child.
580 idle = alloc_idle_task(cpu);
582 panic("failed fork for CPU %d", cpu);
585 per_cpu(current_task, cpu) = idle;
586 early_gdt_descr.address = (unsigned long)get_cpu_gdt_table(cpu);
588 idle->thread.ip = (unsigned long) start_secondary;
589 /* start_eip had better be page-aligned! */
590 start_eip = setup_trampoline();
593 alternatives_smp_switch(1);
595 /* So we see what's up */
596 printk("Booting processor %d/%d ip %lx\n", cpu, apicid, start_eip);
597 /* Stack for startup_32 can be just as for start_secondary onwards */
598 stack_start.sp = (void *) idle->thread.sp;
602 per_cpu(x86_cpu_to_apicid, cpu) = apicid;
604 * This grunge runs the startup process for
605 * the targeted processor.
608 atomic_set(&init_deasserted, 0);
610 Dprintk("Setting warm reset code and vector.\n");
612 store_NMI_vector(&nmi_high, &nmi_low);
614 smpboot_setup_warm_reset_vector(start_eip);
617 * Starting actual IPI sequence...
619 boot_error = wakeup_secondary_cpu(apicid, start_eip);
623 * allow APs to start initializing.
625 Dprintk("Before Callout %d.\n", cpu);
626 cpu_set(cpu, cpu_callout_map);
627 Dprintk("After Callout %d.\n", cpu);
630 * Wait 5s total for a response
632 for (timeout = 0; timeout < 50000; timeout++) {
633 if (cpu_isset(cpu, cpu_callin_map))
634 break; /* It has booted */
638 if (cpu_isset(cpu, cpu_callin_map)) {
639 /* number CPUs logically, starting from 1 (BSP is 0) */
641 printk("CPU%d: ", cpu);
642 print_cpu_info(&cpu_data(cpu));
643 Dprintk("CPU has booted.\n");
646 if (*((volatile unsigned char *)trampoline_base)
648 /* trampoline started but...? */
649 printk("Stuck ??\n");
651 /* trampoline code not run */
652 printk("Not responding.\n");
653 inquire_remote_apic(apicid);
658 /* Try to put things back the way they were before ... */
659 unmap_cpu_to_logical_apicid(cpu);
660 cpu_clear(cpu, cpu_callout_map); /* was set here (do_boot_cpu()) */
661 cpu_clear(cpu, cpu_initialized); /* was set by cpu_init() */
664 per_cpu(x86_cpu_to_apicid, cpu) = apicid;
665 cpu_set(cpu, cpu_present_map);
668 /* mark "stuck" area as not stuck */
669 *((volatile unsigned long *)trampoline_base) = 0;
674 #ifdef CONFIG_HOTPLUG_CPU
675 void cpu_exit_clear(void)
677 int cpu = raw_smp_processor_id();
685 cpu_clear(cpu, cpu_callout_map);
686 cpu_clear(cpu, cpu_callin_map);
688 cpu_clear(cpu, smp_commenced_mask);
689 unmap_cpu_to_logical_apicid(cpu);
692 struct warm_boot_cpu_info {
693 struct completion *complete;
694 struct work_struct task;
699 static void __cpuinit do_warm_boot_cpu(struct work_struct *work)
701 struct warm_boot_cpu_info *info =
702 container_of(work, struct warm_boot_cpu_info, task);
703 do_boot_cpu(info->apicid, info->cpu);
704 complete(info->complete);
707 static int __cpuinit __smp_prepare_cpu(int cpu)
709 DECLARE_COMPLETION_ONSTACK(done);
710 struct warm_boot_cpu_info info;
713 apicid = per_cpu(x86_cpu_to_apicid, cpu);
714 if (apicid == BAD_APICID) {
719 info.complete = &done;
720 info.apicid = apicid;
722 INIT_WORK(&info.task, do_warm_boot_cpu);
724 /* init low mem mapping */
725 clone_pgd_range(swapper_pg_dir, swapper_pg_dir + USER_PGD_PTRS,
726 min_t(unsigned long, KERNEL_PGD_PTRS, USER_PGD_PTRS));
728 schedule_work(&info.task);
729 wait_for_completion(&done);
738 static int boot_cpu_logical_apicid;
739 /* Where the IO area was mapped on multiquad, always 0 otherwise */
741 #ifdef CONFIG_X86_NUMAQ
742 EXPORT_SYMBOL(xquad_portio);
745 static int __init smp_sanity_check(unsigned max_cpus)
748 * If we couldn't find an SMP configuration at boot time,
749 * get out of here now!
751 if (!smp_found_config && !acpi_lapic) {
752 printk(KERN_NOTICE "SMP motherboard not detected.\n");
753 smpboot_clear_io_apic_irqs();
754 phys_cpu_present_map = physid_mask_of_physid(0);
755 if (APIC_init_uniprocessor())
756 printk(KERN_NOTICE "Local APIC not detected."
757 " Using dummy APIC emulation.\n");
758 map_cpu_to_logical_apicid();
759 cpu_set(0, per_cpu(cpu_sibling_map, 0));
760 cpu_set(0, per_cpu(cpu_core_map, 0));
765 * Should not be necessary because the MP table should list the boot
766 * CPU too, but we do it for the sake of robustness anyway.
767 * Makes no sense to do this check in clustered apic mode, so skip it
769 if (!check_phys_apicid_present(boot_cpu_physical_apicid)) {
770 printk("weird, boot CPU (#%d) not listed by the BIOS.\n",
771 boot_cpu_physical_apicid);
772 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
776 * If we couldn't find a local APIC, then get out of here now!
778 if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid]) && !cpu_has_apic) {
779 printk(KERN_ERR "BIOS bug, local APIC #%d not detected!...\n",
780 boot_cpu_physical_apicid);
781 printk(KERN_ERR "... forcing use of dummy APIC emulation. (tell your hw vendor)\n");
782 smpboot_clear_io_apic_irqs();
783 phys_cpu_present_map = physid_mask_of_physid(0);
784 map_cpu_to_logical_apicid();
785 cpu_set(0, per_cpu(cpu_sibling_map, 0));
786 cpu_set(0, per_cpu(cpu_core_map, 0));
793 * If SMP should be disabled, then really disable it!
796 smp_found_config = 0;
797 printk(KERN_INFO "SMP mode deactivated, forcing use of dummy APIC emulation.\n");
799 if (nmi_watchdog == NMI_LOCAL_APIC) {
800 printk(KERN_INFO "activating minimal APIC for NMI watchdog use.\n");
804 smpboot_clear_io_apic_irqs();
805 phys_cpu_present_map = physid_mask_of_physid(0);
806 map_cpu_to_logical_apicid();
807 cpu_set(0, per_cpu(cpu_sibling_map, 0));
808 cpu_set(0, per_cpu(cpu_core_map, 0));
816 * Cycle through the processors sending APIC IPIs to boot each.
818 static void __init smp_boot_cpus(unsigned int max_cpus)
820 int apicid, cpu, bit, kicked;
821 unsigned long bogosum = 0;
824 * Setup boot CPU information
826 smp_store_cpu_info(0); /* Final full version of the data */
827 printk(KERN_INFO "CPU%d: ", 0);
828 print_cpu_info(&cpu_data(0));
830 boot_cpu_physical_apicid = GET_APIC_ID(apic_read(APIC_ID));
831 boot_cpu_logical_apicid = logical_smp_processor_id();
832 per_cpu(x86_cpu_to_apicid, 0) = boot_cpu_physical_apicid;
834 current_thread_info()->cpu = 0;
836 set_cpu_sibling_map(0);
838 smp_sanity_check(max_cpus);
841 map_cpu_to_logical_apicid();
844 setup_portio_remap();
847 * Scan the CPU present map and fire up the other CPUs via do_boot_cpu
849 * In clustered apic mode, phys_cpu_present_map is a constructed thus:
850 * bits 0-3 are quad0, 4-7 are quad1, etc. A perverse twist on the
853 Dprintk("CPU present map: %lx\n", physids_coerce(phys_cpu_present_map));
856 for (bit = 0; kicked < NR_CPUS && bit < MAX_APICS; bit++) {
857 apicid = cpu_present_to_apicid(bit);
859 * Don't even attempt to start the boot CPU!
861 if ((apicid == boot_cpu_apicid) || (apicid == BAD_APICID))
864 if (!check_apicid_present(bit))
866 if (max_cpus <= cpucount+1)
869 if (((cpu = alloc_cpu_id()) <= 0) || do_boot_cpu(apicid, cpu))
870 printk("CPU #%d not responding - cannot use it.\n",
877 * Cleanup possible dangling ends...
879 smpboot_restore_warm_reset_vector();
882 * Allow the user to impress friends.
884 Dprintk("Before bogomips.\n");
885 for_each_possible_cpu(cpu)
886 if (cpu_isset(cpu, cpu_callout_map))
887 bogosum += cpu_data(cpu).loops_per_jiffy;
889 "Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
892 (bogosum/(5000/HZ))%100);
894 Dprintk("Before bogocount - setting activated=1.\n");
897 printk(KERN_WARNING "WARNING: SMP operation may be unreliable with B stepping processors.\n");
900 * Don't taint if we are running SMP kernel on a single non-MP
903 if (tainted & TAINT_UNSAFE_SMP) {
905 printk (KERN_INFO "WARNING: This combination of AMD processors is not suitable for SMP.\n");
907 tainted &= ~TAINT_UNSAFE_SMP;
910 Dprintk("Boot done.\n");
913 * construct cpu_sibling_map, so that we can tell sibling CPUs
916 for_each_possible_cpu(cpu) {
917 cpus_clear(per_cpu(cpu_sibling_map, cpu));
918 cpus_clear(per_cpu(cpu_core_map, cpu));
921 cpu_set(0, per_cpu(cpu_sibling_map, 0));
922 cpu_set(0, per_cpu(cpu_core_map, 0));
924 smpboot_setup_io_apic();
929 /* These are wrappers to interface to the new boot process. Someone
930 who understands all this stuff should rewrite it properly. --RR 15/Jul/02 */
931 void __init native_smp_prepare_cpus(unsigned int max_cpus)
933 smp_commenced_mask = cpumask_of_cpu(0);
934 cpu_callin_map = cpumask_of_cpu(0);
936 smp_boot_cpus(max_cpus);
939 void __init native_smp_prepare_boot_cpu(void)
941 unsigned int cpu = smp_processor_id();
946 cpu_set(cpu, cpu_online_map);
947 cpu_set(cpu, cpu_callout_map);
948 cpu_set(cpu, cpu_present_map);
949 cpu_set(cpu, cpu_possible_map);
950 __get_cpu_var(cpu_state) = CPU_ONLINE;
953 int __cpuinit native_cpu_up(unsigned int cpu)
956 #ifdef CONFIG_HOTPLUG_CPU
960 * We do warm boot only on cpus that had booted earlier
961 * Otherwise cold boot is all handled from smp_boot_cpus().
962 * cpu_callin_map is set during AP kickstart process. Its reset
963 * when a cpu is taken offline from cpu_exit_clear().
965 if (!cpu_isset(cpu, cpu_callin_map))
966 ret = __smp_prepare_cpu(cpu);
972 /* In case one didn't come up */
973 if (!cpu_isset(cpu, cpu_callin_map)) {
974 printk(KERN_DEBUG "skipping cpu%d, didn't come online\n", cpu);
978 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
979 /* Unleash the CPU! */
980 cpu_set(cpu, smp_commenced_mask);
983 * Check TSC synchronization with the AP (keep irqs disabled
986 local_irq_save(flags);
987 check_tsc_sync_source(cpu);
988 local_irq_restore(flags);
990 while (!cpu_isset(cpu, cpu_online_map)) {
992 touch_nmi_watchdog();
998 void __init native_smp_cpus_done(unsigned int max_cpus)
1000 #ifdef CONFIG_X86_IO_APIC
1001 setup_ioapic_dest();
1006 void __init smp_intr_init(void)
1009 * IRQ0 must be given a fixed assignment and initialized,
1010 * because it's used before the IO-APIC is set up.
1012 set_intr_gate(FIRST_DEVICE_VECTOR, interrupt[0]);
1015 * The reschedule interrupt is a CPU-to-CPU reschedule-helper
1016 * IPI, driven by wakeup.
1018 set_intr_gate(RESCHEDULE_VECTOR, reschedule_interrupt);
1020 /* IPI for invalidation */
1021 set_intr_gate(INVALIDATE_TLB_VECTOR, invalidate_interrupt);
1023 /* IPI for generic function call */
1024 set_intr_gate(CALL_FUNCTION_VECTOR, call_function_interrupt);