x86: integrate start_secondary
[sfrench/cifs-2.6.git] / arch / x86 / kernel / smpboot.c
1 #include <linux/init.h>
2 #include <linux/smp.h>
3 #include <linux/module.h>
4 #include <linux/sched.h>
5 #include <linux/percpu.h>
6 #include <linux/bootmem.h>
7 #include <linux/err.h>
8 #include <linux/nmi.h>
9
10 #include <asm/desc.h>
11 #include <asm/nmi.h>
12 #include <asm/irq.h>
13 #include <asm/smp.h>
14 #include <asm/cpu.h>
15 #include <asm/numa.h>
16 #include <asm/pgtable.h>
17 #include <asm/tlbflush.h>
18 #include <asm/mtrr.h>
19 #include <asm/nmi.h>
20 #include <asm/vmi.h>
21 #include <linux/mc146818rtc.h>
22
23 #include <mach_apic.h>
24 #include <mach_wakecpu.h>
25 #include <smpboot_hooks.h>
26
27 /* Store all idle threads, this can be reused instead of creating
28 * a new thread. Also avoids complicated thread destroy functionality
29 * for idle threads.
30 */
31 #ifdef CONFIG_HOTPLUG_CPU
32 /*
33  * Needed only for CONFIG_HOTPLUG_CPU because __cpuinitdata is
34  * removed after init for !CONFIG_HOTPLUG_CPU.
35  */
36 static DEFINE_PER_CPU(struct task_struct *, idle_thread_array);
37 #define get_idle_for_cpu(x)      (per_cpu(idle_thread_array, x))
38 #define set_idle_for_cpu(x, p)   (per_cpu(idle_thread_array, x) = (p))
39 #else
40 struct task_struct *idle_thread_array[NR_CPUS] __cpuinitdata ;
41 #define get_idle_for_cpu(x)      (idle_thread_array[(x)])
42 #define set_idle_for_cpu(x, p)   (idle_thread_array[(x)] = (p))
43 #endif
44
45 /* Number of siblings per CPU package */
46 int smp_num_siblings = 1;
47 EXPORT_SYMBOL(smp_num_siblings);
48
49 /* Last level cache ID of each logical CPU */
50 DEFINE_PER_CPU(u16, cpu_llc_id) = BAD_APICID;
51
52 /* bitmap of online cpus */
53 cpumask_t cpu_online_map __read_mostly;
54 EXPORT_SYMBOL(cpu_online_map);
55
56 cpumask_t cpu_callin_map;
57 cpumask_t cpu_callout_map;
58 cpumask_t cpu_possible_map;
59 EXPORT_SYMBOL(cpu_possible_map);
60
61 /* representing HT siblings of each logical CPU */
62 DEFINE_PER_CPU(cpumask_t, cpu_sibling_map);
63 EXPORT_PER_CPU_SYMBOL(cpu_sibling_map);
64
65 /* representing HT and core siblings of each logical CPU */
66 DEFINE_PER_CPU(cpumask_t, cpu_core_map);
67 EXPORT_PER_CPU_SYMBOL(cpu_core_map);
68
69 /* Per CPU bogomips and other parameters */
70 DEFINE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86, cpu_info);
71 EXPORT_PER_CPU_SYMBOL(cpu_info);
72
73 static atomic_t init_deasserted;
74
75 /* ready for x86_64, no harm for x86, since it will overwrite after alloc */
76 unsigned char *trampoline_base = __va(SMP_TRAMPOLINE_BASE);
77
78 /* representing cpus for which sibling maps can be computed */
79 static cpumask_t cpu_sibling_setup_map;
80
81 /* Set if we find a B stepping CPU */
82 int __cpuinitdata smp_b_stepping;
83
84 #if defined(CONFIG_NUMA) && defined(CONFIG_X86_32)
85
86 /* which logical CPUs are on which nodes */
87 cpumask_t node_to_cpumask_map[MAX_NUMNODES] __read_mostly =
88                                 { [0 ... MAX_NUMNODES-1] = CPU_MASK_NONE };
89 EXPORT_SYMBOL(node_to_cpumask_map);
90 /* which node each logical CPU is on */
91 int cpu_to_node_map[NR_CPUS] __read_mostly = { [0 ... NR_CPUS-1] = 0 };
92 EXPORT_SYMBOL(cpu_to_node_map);
93
94 /* set up a mapping between cpu and node. */
95 static void map_cpu_to_node(int cpu, int node)
96 {
97         printk(KERN_INFO "Mapping cpu %d to node %d\n", cpu, node);
98         cpu_set(cpu, node_to_cpumask_map[node]);
99         cpu_to_node_map[cpu] = node;
100 }
101
102 /* undo a mapping between cpu and node. */
103 static void unmap_cpu_to_node(int cpu)
104 {
105         int node;
106
107         printk(KERN_INFO "Unmapping cpu %d from all nodes\n", cpu);
108         for (node = 0; node < MAX_NUMNODES; node++)
109                 cpu_clear(cpu, node_to_cpumask_map[node]);
110         cpu_to_node_map[cpu] = 0;
111 }
112 #else /* !(CONFIG_NUMA && CONFIG_X86_32) */
113 #define map_cpu_to_node(cpu, node)      ({})
114 #define unmap_cpu_to_node(cpu)  ({})
115 #endif
116
117 #ifdef CONFIG_X86_32
118 u8 cpu_2_logical_apicid[NR_CPUS] __read_mostly =
119                                         { [0 ... NR_CPUS-1] = BAD_APICID };
120
121 void map_cpu_to_logical_apicid(void)
122 {
123         int cpu = smp_processor_id();
124         int apicid = logical_smp_processor_id();
125         int node = apicid_to_node(apicid);
126
127         if (!node_online(node))
128                 node = first_online_node;
129
130         cpu_2_logical_apicid[cpu] = apicid;
131         map_cpu_to_node(cpu, node);
132 }
133
134 void unmap_cpu_to_logical_apicid(int cpu)
135 {
136         cpu_2_logical_apicid[cpu] = BAD_APICID;
137         unmap_cpu_to_node(cpu);
138 }
139 #else
140 #define unmap_cpu_to_logical_apicid(cpu) do {} while (0)
141 #define map_cpu_to_logical_apicid()  do {} while (0)
142 #endif
143
144 /*
145  * Report back to the Boot Processor.
146  * Running on AP.
147  */
148 void __cpuinit smp_callin(void)
149 {
150         int cpuid, phys_id;
151         unsigned long timeout;
152
153         /*
154          * If waken up by an INIT in an 82489DX configuration
155          * we may get here before an INIT-deassert IPI reaches
156          * our local APIC.  We have to wait for the IPI or we'll
157          * lock up on an APIC access.
158          */
159         wait_for_init_deassert(&init_deasserted);
160
161         /*
162          * (This works even if the APIC is not enabled.)
163          */
164         phys_id = GET_APIC_ID(apic_read(APIC_ID));
165         cpuid = smp_processor_id();
166         if (cpu_isset(cpuid, cpu_callin_map)) {
167                 panic("%s: phys CPU#%d, CPU#%d already present??\n", __func__,
168                                         phys_id, cpuid);
169         }
170         Dprintk("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid, phys_id);
171
172         /*
173          * STARTUP IPIs are fragile beasts as they might sometimes
174          * trigger some glue motherboard logic. Complete APIC bus
175          * silence for 1 second, this overestimates the time the
176          * boot CPU is spending to send the up to 2 STARTUP IPIs
177          * by a factor of two. This should be enough.
178          */
179
180         /*
181          * Waiting 2s total for startup (udelay is not yet working)
182          */
183         timeout = jiffies + 2*HZ;
184         while (time_before(jiffies, timeout)) {
185                 /*
186                  * Has the boot CPU finished it's STARTUP sequence?
187                  */
188                 if (cpu_isset(cpuid, cpu_callout_map))
189                         break;
190                 cpu_relax();
191         }
192
193         if (!time_before(jiffies, timeout)) {
194                 panic("%s: CPU%d started up but did not get a callout!\n",
195                       __func__, cpuid);
196         }
197
198         /*
199          * the boot CPU has finished the init stage and is spinning
200          * on callin_map until we finish. We are free to set up this
201          * CPU, first the APIC. (this is probably redundant on most
202          * boards)
203          */
204
205         Dprintk("CALLIN, before setup_local_APIC().\n");
206         smp_callin_clear_local_apic();
207         setup_local_APIC();
208         end_local_APIC_setup();
209         map_cpu_to_logical_apicid();
210
211         /*
212          * Get our bogomips.
213          *
214          * Need to enable IRQs because it can take longer and then
215          * the NMI watchdog might kill us.
216          */
217         local_irq_enable();
218         calibrate_delay();
219         local_irq_disable();
220         Dprintk("Stack at about %p\n", &cpuid);
221
222         /*
223          * Save our processor parameters
224          */
225         smp_store_cpu_info(cpuid);
226
227         /*
228          * Allow the master to continue.
229          */
230         cpu_set(cpuid, cpu_callin_map);
231 }
232
233 /*
234  * Activate a secondary processor.
235  */
236 void __cpuinit start_secondary(void *unused)
237 {
238         /*
239          * Don't put *anything* before cpu_init(), SMP booting is too
240          * fragile that we want to limit the things done here to the
241          * most necessary things.
242          */
243 #ifdef CONFIG_VMI
244         vmi_bringup();
245 #endif
246         cpu_init();
247         preempt_disable();
248         smp_callin();
249
250         /* otherwise gcc will move up smp_processor_id before the cpu_init */
251         barrier();
252         /*
253          * Check TSC synchronization with the BP:
254          */
255         check_tsc_sync_target();
256
257         if (nmi_watchdog == NMI_IO_APIC) {
258                 disable_8259A_irq(0);
259                 enable_NMI_through_LVT0();
260                 enable_8259A_irq(0);
261         }
262
263         /* This must be done before setting cpu_online_map */
264         set_cpu_sibling_map(raw_smp_processor_id());
265         wmb();
266
267         /*
268          * We need to hold call_lock, so there is no inconsistency
269          * between the time smp_call_function() determines number of
270          * IPI recipients, and the time when the determination is made
271          * for which cpus receive the IPI. Holding this
272          * lock helps us to not include this cpu in a currently in progress
273          * smp_call_function().
274          */
275         lock_ipi_call_lock();
276 #ifdef CONFIG_X86_64
277         spin_lock(&vector_lock);
278
279         /* Setup the per cpu irq handling data structures */
280         __setup_vector_irq(smp_processor_id());
281         /*
282          * Allow the master to continue.
283          */
284         spin_unlock(&vector_lock);
285 #endif
286         cpu_set(smp_processor_id(), cpu_online_map);
287         unlock_ipi_call_lock();
288         per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
289
290         setup_secondary_clock();
291
292         wmb();
293         cpu_idle();
294 }
295
296 #ifdef CONFIG_X86_32
297 /*
298  * Everything has been set up for the secondary
299  * CPUs - they just need to reload everything
300  * from the task structure
301  * This function must not return.
302  */
303 void __devinit initialize_secondary(void)
304 {
305         /*
306          * We don't actually need to load the full TSS,
307          * basically just the stack pointer and the ip.
308          */
309
310         asm volatile(
311                 "movl %0,%%esp\n\t"
312                 "jmp *%1"
313                 :
314                 :"m" (current->thread.sp), "m" (current->thread.ip));
315 }
316 #endif
317
318 static void __cpuinit smp_apply_quirks(struct cpuinfo_x86 *c)
319 {
320 #ifdef CONFIG_X86_32
321         /*
322          * Mask B, Pentium, but not Pentium MMX
323          */
324         if (c->x86_vendor == X86_VENDOR_INTEL &&
325             c->x86 == 5 &&
326             c->x86_mask >= 1 && c->x86_mask <= 4 &&
327             c->x86_model <= 3)
328                 /*
329                  * Remember we have B step Pentia with bugs
330                  */
331                 smp_b_stepping = 1;
332
333         /*
334          * Certain Athlons might work (for various values of 'work') in SMP
335          * but they are not certified as MP capable.
336          */
337         if ((c->x86_vendor == X86_VENDOR_AMD) && (c->x86 == 6)) {
338
339                 if (num_possible_cpus() == 1)
340                         goto valid_k7;
341
342                 /* Athlon 660/661 is valid. */
343                 if ((c->x86_model == 6) && ((c->x86_mask == 0) ||
344                     (c->x86_mask == 1)))
345                         goto valid_k7;
346
347                 /* Duron 670 is valid */
348                 if ((c->x86_model == 7) && (c->x86_mask == 0))
349                         goto valid_k7;
350
351                 /*
352                  * Athlon 662, Duron 671, and Athlon >model 7 have capability
353                  * bit. It's worth noting that the A5 stepping (662) of some
354                  * Athlon XP's have the MP bit set.
355                  * See http://www.heise.de/newsticker/data/jow-18.10.01-000 for
356                  * more.
357                  */
358                 if (((c->x86_model == 6) && (c->x86_mask >= 2)) ||
359                     ((c->x86_model == 7) && (c->x86_mask >= 1)) ||
360                      (c->x86_model > 7))
361                         if (cpu_has_mp)
362                                 goto valid_k7;
363
364                 /* If we get here, not a certified SMP capable AMD system. */
365                 add_taint(TAINT_UNSAFE_SMP);
366         }
367
368 valid_k7:
369         ;
370 #endif
371 }
372
373 void smp_checks(void)
374 {
375         if (smp_b_stepping)
376                 printk(KERN_WARNING "WARNING: SMP operation may be unreliable"
377                                     "with B stepping processors.\n");
378
379         /*
380          * Don't taint if we are running SMP kernel on a single non-MP
381          * approved Athlon
382          */
383         if (tainted & TAINT_UNSAFE_SMP) {
384                 if (num_online_cpus())
385                         printk(KERN_INFO "WARNING: This combination of AMD"
386                                 "processors is not suitable for SMP.\n");
387                 else
388                         tainted &= ~TAINT_UNSAFE_SMP;
389         }
390 }
391
392 /*
393  * The bootstrap kernel entry code has set these up. Save them for
394  * a given CPU
395  */
396
397 void __cpuinit smp_store_cpu_info(int id)
398 {
399         struct cpuinfo_x86 *c = &cpu_data(id);
400
401         *c = boot_cpu_data;
402         c->cpu_index = id;
403         if (id != 0)
404                 identify_secondary_cpu(c);
405         smp_apply_quirks(c);
406 }
407
408
409 void __cpuinit set_cpu_sibling_map(int cpu)
410 {
411         int i;
412         struct cpuinfo_x86 *c = &cpu_data(cpu);
413
414         cpu_set(cpu, cpu_sibling_setup_map);
415
416         if (smp_num_siblings > 1) {
417                 for_each_cpu_mask(i, cpu_sibling_setup_map) {
418                         if (c->phys_proc_id == cpu_data(i).phys_proc_id &&
419                             c->cpu_core_id == cpu_data(i).cpu_core_id) {
420                                 cpu_set(i, per_cpu(cpu_sibling_map, cpu));
421                                 cpu_set(cpu, per_cpu(cpu_sibling_map, i));
422                                 cpu_set(i, per_cpu(cpu_core_map, cpu));
423                                 cpu_set(cpu, per_cpu(cpu_core_map, i));
424                                 cpu_set(i, c->llc_shared_map);
425                                 cpu_set(cpu, cpu_data(i).llc_shared_map);
426                         }
427                 }
428         } else {
429                 cpu_set(cpu, per_cpu(cpu_sibling_map, cpu));
430         }
431
432         cpu_set(cpu, c->llc_shared_map);
433
434         if (current_cpu_data.x86_max_cores == 1) {
435                 per_cpu(cpu_core_map, cpu) = per_cpu(cpu_sibling_map, cpu);
436                 c->booted_cores = 1;
437                 return;
438         }
439
440         for_each_cpu_mask(i, cpu_sibling_setup_map) {
441                 if (per_cpu(cpu_llc_id, cpu) != BAD_APICID &&
442                     per_cpu(cpu_llc_id, cpu) == per_cpu(cpu_llc_id, i)) {
443                         cpu_set(i, c->llc_shared_map);
444                         cpu_set(cpu, cpu_data(i).llc_shared_map);
445                 }
446                 if (c->phys_proc_id == cpu_data(i).phys_proc_id) {
447                         cpu_set(i, per_cpu(cpu_core_map, cpu));
448                         cpu_set(cpu, per_cpu(cpu_core_map, i));
449                         /*
450                          *  Does this new cpu bringup a new core?
451                          */
452                         if (cpus_weight(per_cpu(cpu_sibling_map, cpu)) == 1) {
453                                 /*
454                                  * for each core in package, increment
455                                  * the booted_cores for this new cpu
456                                  */
457                                 if (first_cpu(per_cpu(cpu_sibling_map, i)) == i)
458                                         c->booted_cores++;
459                                 /*
460                                  * increment the core count for all
461                                  * the other cpus in this package
462                                  */
463                                 if (i != cpu)
464                                         cpu_data(i).booted_cores++;
465                         } else if (i != cpu && !c->booted_cores)
466                                 c->booted_cores = cpu_data(i).booted_cores;
467                 }
468         }
469 }
470
471 /* maps the cpu to the sched domain representing multi-core */
472 cpumask_t cpu_coregroup_map(int cpu)
473 {
474         struct cpuinfo_x86 *c = &cpu_data(cpu);
475         /*
476          * For perf, we return last level cache shared map.
477          * And for power savings, we return cpu_core_map
478          */
479         if (sched_mc_power_savings || sched_smt_power_savings)
480                 return per_cpu(cpu_core_map, cpu);
481         else
482                 return c->llc_shared_map;
483 }
484
485 /*
486  * Currently trivial. Write the real->protected mode
487  * bootstrap into the page concerned. The caller
488  * has made sure it's suitably aligned.
489  */
490
491 unsigned long __cpuinit setup_trampoline(void)
492 {
493         memcpy(trampoline_base, trampoline_data,
494                trampoline_end - trampoline_data);
495         return virt_to_phys(trampoline_base);
496 }
497
498 #ifdef CONFIG_X86_32
499 /*
500  * We are called very early to get the low memory for the
501  * SMP bootup trampoline page.
502  */
503 void __init smp_alloc_memory(void)
504 {
505         trampoline_base = alloc_bootmem_low_pages(PAGE_SIZE);
506         /*
507          * Has to be in very low memory so we can execute
508          * real-mode AP code.
509          */
510         if (__pa(trampoline_base) >= 0x9F000)
511                 BUG();
512 }
513 #endif
514
515 void impress_friends(void)
516 {
517         int cpu;
518         unsigned long bogosum = 0;
519         /*
520          * Allow the user to impress friends.
521          */
522         Dprintk("Before bogomips.\n");
523         for_each_possible_cpu(cpu)
524                 if (cpu_isset(cpu, cpu_callout_map))
525                         bogosum += cpu_data(cpu).loops_per_jiffy;
526         printk(KERN_INFO
527                 "Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
528                 num_online_cpus(),
529                 bogosum/(500000/HZ),
530                 (bogosum/(5000/HZ))%100);
531
532         Dprintk("Before bogocount - setting activated=1.\n");
533 }
534
535 static inline void __inquire_remote_apic(int apicid)
536 {
537         unsigned i, regs[] = { APIC_ID >> 4, APIC_LVR >> 4, APIC_SPIV >> 4 };
538         char *names[] = { "ID", "VERSION", "SPIV" };
539         int timeout;
540         u32 status;
541
542         printk(KERN_INFO "Inquiring remote APIC #%d...\n", apicid);
543
544         for (i = 0; i < ARRAY_SIZE(regs); i++) {
545                 printk(KERN_INFO "... APIC #%d %s: ", apicid, names[i]);
546
547                 /*
548                  * Wait for idle.
549                  */
550                 status = safe_apic_wait_icr_idle();
551                 if (status)
552                         printk(KERN_CONT
553                                "a previous APIC delivery may have failed\n");
554
555                 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(apicid));
556                 apic_write_around(APIC_ICR, APIC_DM_REMRD | regs[i]);
557
558                 timeout = 0;
559                 do {
560                         udelay(100);
561                         status = apic_read(APIC_ICR) & APIC_ICR_RR_MASK;
562                 } while (status == APIC_ICR_RR_INPROG && timeout++ < 1000);
563
564                 switch (status) {
565                 case APIC_ICR_RR_VALID:
566                         status = apic_read(APIC_RRR);
567                         printk(KERN_CONT "%08x\n", status);
568                         break;
569                 default:
570                         printk(KERN_CONT "failed\n");
571                 }
572         }
573 }
574
575 #ifdef WAKE_SECONDARY_VIA_NMI
576 /*
577  * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
578  * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
579  * won't ... remember to clear down the APIC, etc later.
580  */
581 static int __devinit
582 wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip)
583 {
584         unsigned long send_status, accept_status = 0;
585         int maxlvt;
586
587         /* Target chip */
588         apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(logical_apicid));
589
590         /* Boot on the stack */
591         /* Kick the second */
592         apic_write_around(APIC_ICR, APIC_DM_NMI | APIC_DEST_LOGICAL);
593
594         Dprintk("Waiting for send to finish...\n");
595         send_status = safe_apic_wait_icr_idle();
596
597         /*
598          * Give the other CPU some time to accept the IPI.
599          */
600         udelay(200);
601         /*
602          * Due to the Pentium erratum 3AP.
603          */
604         maxlvt = lapic_get_maxlvt();
605         if (maxlvt > 3) {
606                 apic_read_around(APIC_SPIV);
607                 apic_write(APIC_ESR, 0);
608         }
609         accept_status = (apic_read(APIC_ESR) & 0xEF);
610         Dprintk("NMI sent.\n");
611
612         if (send_status)
613                 printk(KERN_ERR "APIC never delivered???\n");
614         if (accept_status)
615                 printk(KERN_ERR "APIC delivery error (%lx).\n", accept_status);
616
617         return (send_status | accept_status);
618 }
619 #endif  /* WAKE_SECONDARY_VIA_NMI */
620
621 #ifdef WAKE_SECONDARY_VIA_INIT
622 static int __devinit
623 wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip)
624 {
625         unsigned long send_status, accept_status = 0;
626         int maxlvt, num_starts, j;
627
628         /*
629          * Be paranoid about clearing APIC errors.
630          */
631         if (APIC_INTEGRATED(apic_version[phys_apicid])) {
632                 apic_read_around(APIC_SPIV);
633                 apic_write(APIC_ESR, 0);
634                 apic_read(APIC_ESR);
635         }
636
637         Dprintk("Asserting INIT.\n");
638
639         /*
640          * Turn INIT on target chip
641          */
642         apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
643
644         /*
645          * Send IPI
646          */
647         apic_write_around(APIC_ICR, APIC_INT_LEVELTRIG | APIC_INT_ASSERT
648                                 | APIC_DM_INIT);
649
650         Dprintk("Waiting for send to finish...\n");
651         send_status = safe_apic_wait_icr_idle();
652
653         mdelay(10);
654
655         Dprintk("Deasserting INIT.\n");
656
657         /* Target chip */
658         apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
659
660         /* Send IPI */
661         apic_write_around(APIC_ICR, APIC_INT_LEVELTRIG | APIC_DM_INIT);
662
663         Dprintk("Waiting for send to finish...\n");
664         send_status = safe_apic_wait_icr_idle();
665
666         mb();
667         atomic_set(&init_deasserted, 1);
668
669         /*
670          * Should we send STARTUP IPIs ?
671          *
672          * Determine this based on the APIC version.
673          * If we don't have an integrated APIC, don't send the STARTUP IPIs.
674          */
675         if (APIC_INTEGRATED(apic_version[phys_apicid]))
676                 num_starts = 2;
677         else
678                 num_starts = 0;
679
680         /*
681          * Paravirt / VMI wants a startup IPI hook here to set up the
682          * target processor state.
683          */
684         startup_ipi_hook(phys_apicid, (unsigned long) start_secondary,
685 #ifdef CONFIG_X86_64
686                          (unsigned long)init_rsp);
687 #else
688                          (unsigned long)stack_start.sp);
689 #endif
690
691         /*
692          * Run STARTUP IPI loop.
693          */
694         Dprintk("#startup loops: %d.\n", num_starts);
695
696         maxlvt = lapic_get_maxlvt();
697
698         for (j = 1; j <= num_starts; j++) {
699                 Dprintk("Sending STARTUP #%d.\n", j);
700                 apic_read_around(APIC_SPIV);
701                 apic_write(APIC_ESR, 0);
702                 apic_read(APIC_ESR);
703                 Dprintk("After apic_write.\n");
704
705                 /*
706                  * STARTUP IPI
707                  */
708
709                 /* Target chip */
710                 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
711
712                 /* Boot on the stack */
713                 /* Kick the second */
714                 apic_write_around(APIC_ICR, APIC_DM_STARTUP
715                                         | (start_eip >> 12));
716
717                 /*
718                  * Give the other CPU some time to accept the IPI.
719                  */
720                 udelay(300);
721
722                 Dprintk("Startup point 1.\n");
723
724                 Dprintk("Waiting for send to finish...\n");
725                 send_status = safe_apic_wait_icr_idle();
726
727                 /*
728                  * Give the other CPU some time to accept the IPI.
729                  */
730                 udelay(200);
731                 /*
732                  * Due to the Pentium erratum 3AP.
733                  */
734                 if (maxlvt > 3) {
735                         apic_read_around(APIC_SPIV);
736                         apic_write(APIC_ESR, 0);
737                 }
738                 accept_status = (apic_read(APIC_ESR) & 0xEF);
739                 if (send_status || accept_status)
740                         break;
741         }
742         Dprintk("After Startup.\n");
743
744         if (send_status)
745                 printk(KERN_ERR "APIC never delivered???\n");
746         if (accept_status)
747                 printk(KERN_ERR "APIC delivery error (%lx).\n", accept_status);
748
749         return (send_status | accept_status);
750 }
751 #endif  /* WAKE_SECONDARY_VIA_INIT */
752
753 struct create_idle {
754         struct work_struct work;
755         struct task_struct *idle;
756         struct completion done;
757         int cpu;
758 };
759
760 static void __cpuinit do_fork_idle(struct work_struct *work)
761 {
762         struct create_idle *c_idle =
763                 container_of(work, struct create_idle, work);
764
765         c_idle->idle = fork_idle(c_idle->cpu);
766         complete(&c_idle->done);
767 }
768
769 static int __cpuinit do_boot_cpu(int apicid, int cpu)
770 /*
771  * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad
772  * (ie clustered apic addressing mode), this is a LOGICAL apic ID.
773  * Returns zero if CPU booted OK, else error code from wakeup_secondary_cpu.
774  */
775 {
776         unsigned long boot_error = 0;
777         int timeout;
778         unsigned long start_ip;
779         unsigned short nmi_high = 0, nmi_low = 0;
780         struct create_idle c_idle = {
781                 .cpu = cpu,
782                 .done = COMPLETION_INITIALIZER_ONSTACK(c_idle.done),
783         };
784         INIT_WORK(&c_idle.work, do_fork_idle);
785 #ifdef CONFIG_X86_64
786         /* allocate memory for gdts of secondary cpus. Hotplug is considered */
787         if (!cpu_gdt_descr[cpu].address &&
788                 !(cpu_gdt_descr[cpu].address = get_zeroed_page(GFP_KERNEL))) {
789                 printk(KERN_ERR "Failed to allocate GDT for CPU %d\n", cpu);
790                 return -1;
791         }
792
793         /* Allocate node local memory for AP pdas */
794         if (cpu_pda(cpu) == &boot_cpu_pda[cpu]) {
795                 struct x8664_pda *newpda, *pda;
796                 int node = cpu_to_node(cpu);
797                 pda = cpu_pda(cpu);
798                 newpda = kmalloc_node(sizeof(struct x8664_pda), GFP_ATOMIC,
799                                       node);
800                 if (newpda) {
801                         memcpy(newpda, pda, sizeof(struct x8664_pda));
802                         cpu_pda(cpu) = newpda;
803                 } else
804                         printk(KERN_ERR
805                 "Could not allocate node local PDA for CPU %d on node %d\n",
806                                 cpu, node);
807         }
808 #endif
809
810         alternatives_smp_switch(1);
811
812         c_idle.idle = get_idle_for_cpu(cpu);
813
814         /*
815          * We can't use kernel_thread since we must avoid to
816          * reschedule the child.
817          */
818         if (c_idle.idle) {
819                 c_idle.idle->thread.sp = (unsigned long) (((struct pt_regs *)
820                         (THREAD_SIZE +  task_stack_page(c_idle.idle))) - 1);
821                 init_idle(c_idle.idle, cpu);
822                 goto do_rest;
823         }
824
825         if (!keventd_up() || current_is_keventd())
826                 c_idle.work.func(&c_idle.work);
827         else {
828                 schedule_work(&c_idle.work);
829                 wait_for_completion(&c_idle.done);
830         }
831
832         if (IS_ERR(c_idle.idle)) {
833                 printk("failed fork for CPU %d\n", cpu);
834                 return PTR_ERR(c_idle.idle);
835         }
836
837         set_idle_for_cpu(cpu, c_idle.idle);
838 do_rest:
839 #ifdef CONFIG_X86_32
840         per_cpu(current_task, cpu) = c_idle.idle;
841         init_gdt(cpu);
842         early_gdt_descr.address = (unsigned long)get_cpu_gdt_table(cpu);
843         c_idle.idle->thread.ip = (unsigned long) start_secondary;
844         /* Stack for startup_32 can be just as for start_secondary onwards */
845         stack_start.sp = (void *) c_idle.idle->thread.sp;
846         irq_ctx_init(cpu);
847 #else
848         cpu_pda(cpu)->pcurrent = c_idle.idle;
849         init_rsp = c_idle.idle->thread.sp;
850         load_sp0(&per_cpu(init_tss, cpu), &c_idle.idle->thread);
851         initial_code = (unsigned long)start_secondary;
852         clear_tsk_thread_flag(c_idle.idle, TIF_FORK);
853 #endif
854
855         /* start_ip had better be page-aligned! */
856         start_ip = setup_trampoline();
857
858         /* So we see what's up   */
859         printk(KERN_INFO "Booting processor %d/%d ip %lx\n",
860                           cpu, apicid, start_ip);
861
862         /*
863          * This grunge runs the startup process for
864          * the targeted processor.
865          */
866
867         atomic_set(&init_deasserted, 0);
868
869         Dprintk("Setting warm reset code and vector.\n");
870
871         store_NMI_vector(&nmi_high, &nmi_low);
872
873         smpboot_setup_warm_reset_vector(start_ip);
874         /*
875          * Be paranoid about clearing APIC errors.
876          */
877         apic_write(APIC_ESR, 0);
878         apic_read(APIC_ESR);
879
880
881         /*
882          * Starting actual IPI sequence...
883          */
884         boot_error = wakeup_secondary_cpu(apicid, start_ip);
885
886         if (!boot_error) {
887                 /*
888                  * allow APs to start initializing.
889                  */
890                 Dprintk("Before Callout %d.\n", cpu);
891                 cpu_set(cpu, cpu_callout_map);
892                 Dprintk("After Callout %d.\n", cpu);
893
894                 /*
895                  * Wait 5s total for a response
896                  */
897                 for (timeout = 0; timeout < 50000; timeout++) {
898                         if (cpu_isset(cpu, cpu_callin_map))
899                                 break;  /* It has booted */
900                         udelay(100);
901                 }
902
903                 if (cpu_isset(cpu, cpu_callin_map)) {
904                         /* number CPUs logically, starting from 1 (BSP is 0) */
905                         Dprintk("OK.\n");
906                         printk(KERN_INFO "CPU%d: ", cpu);
907                         print_cpu_info(&cpu_data(cpu));
908                         Dprintk("CPU has booted.\n");
909                 } else {
910                         boot_error = 1;
911                         if (*((volatile unsigned char *)trampoline_base)
912                                         == 0xA5)
913                                 /* trampoline started but...? */
914                                 printk(KERN_ERR "Stuck ??\n");
915                         else
916                                 /* trampoline code not run */
917                                 printk(KERN_ERR "Not responding.\n");
918                         inquire_remote_apic(apicid);
919                 }
920         }
921
922         if (boot_error) {
923                 /* Try to put things back the way they were before ... */
924                 unmap_cpu_to_logical_apicid(cpu);
925 #ifdef CONFIG_X86_64
926                 clear_node_cpumask(cpu); /* was set by numa_add_cpu */
927 #endif
928                 cpu_clear(cpu, cpu_callout_map); /* was set by do_boot_cpu() */
929                 cpu_clear(cpu, cpu_initialized); /* was set by cpu_init() */
930                 cpu_clear(cpu, cpu_possible_map);
931                 cpu_clear(cpu, cpu_present_map);
932                 per_cpu(x86_cpu_to_apicid, cpu) = BAD_APICID;
933         }
934
935         /* mark "stuck" area as not stuck */
936         *((volatile unsigned long *)trampoline_base) = 0;
937
938         return boot_error;
939 }
940
941 int __cpuinit native_cpu_up(unsigned int cpu)
942 {
943         int apicid = cpu_present_to_apicid(cpu);
944         unsigned long flags;
945         int err;
946
947         WARN_ON(irqs_disabled());
948
949         Dprintk("++++++++++++++++++++=_---CPU UP  %u\n", cpu);
950
951         if (apicid == BAD_APICID || apicid == boot_cpu_physical_apicid ||
952             !physid_isset(apicid, phys_cpu_present_map)) {
953                 printk(KERN_ERR "%s: bad cpu %d\n", __func__, cpu);
954                 return -EINVAL;
955         }
956
957         /*
958          * Already booted CPU?
959          */
960         if (cpu_isset(cpu, cpu_callin_map)) {
961                 Dprintk("do_boot_cpu %d Already started\n", cpu);
962                 return -ENOSYS;
963         }
964
965         /*
966          * Save current MTRR state in case it was changed since early boot
967          * (e.g. by the ACPI SMI) to initialize new CPUs with MTRRs in sync:
968          */
969         mtrr_save_state();
970
971         per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
972
973 #ifdef CONFIG_X86_32
974         /* init low mem mapping */
975         clone_pgd_range(swapper_pg_dir, swapper_pg_dir + USER_PGD_PTRS,
976                         min_t(unsigned long, KERNEL_PGD_PTRS, USER_PGD_PTRS));
977         flush_tlb_all();
978 #endif
979
980         err = do_boot_cpu(apicid, cpu);
981         if (err < 0) {
982                 Dprintk("do_boot_cpu failed %d\n", err);
983                 return err;
984         }
985
986         /*
987          * Check TSC synchronization with the AP (keep irqs disabled
988          * while doing so):
989          */
990         local_irq_save(flags);
991         check_tsc_sync_source(cpu);
992         local_irq_restore(flags);
993
994         while (!cpu_isset(cpu, cpu_online_map)) {
995                 cpu_relax();
996                 touch_nmi_watchdog();
997         }
998
999         return 0;
1000 }
1001
1002 #ifdef CONFIG_HOTPLUG_CPU
1003 void remove_siblinginfo(int cpu)
1004 {
1005         int sibling;
1006         struct cpuinfo_x86 *c = &cpu_data(cpu);
1007
1008         for_each_cpu_mask(sibling, per_cpu(cpu_core_map, cpu)) {
1009                 cpu_clear(cpu, per_cpu(cpu_core_map, sibling));
1010                 /*/
1011                  * last thread sibling in this cpu core going down
1012                  */
1013                 if (cpus_weight(per_cpu(cpu_sibling_map, cpu)) == 1)
1014                         cpu_data(sibling).booted_cores--;
1015         }
1016
1017         for_each_cpu_mask(sibling, per_cpu(cpu_sibling_map, cpu))
1018                 cpu_clear(cpu, per_cpu(cpu_sibling_map, sibling));
1019         cpus_clear(per_cpu(cpu_sibling_map, cpu));
1020         cpus_clear(per_cpu(cpu_core_map, cpu));
1021         c->phys_proc_id = 0;
1022         c->cpu_core_id = 0;
1023         cpu_clear(cpu, cpu_sibling_setup_map);
1024 }
1025
1026 int additional_cpus __initdata = -1;
1027
1028 static __init int setup_additional_cpus(char *s)
1029 {
1030         return s && get_option(&s, &additional_cpus) ? 0 : -EINVAL;
1031 }
1032 early_param("additional_cpus", setup_additional_cpus);
1033
1034 /*
1035  * cpu_possible_map should be static, it cannot change as cpu's
1036  * are onlined, or offlined. The reason is per-cpu data-structures
1037  * are allocated by some modules at init time, and dont expect to
1038  * do this dynamically on cpu arrival/departure.
1039  * cpu_present_map on the other hand can change dynamically.
1040  * In case when cpu_hotplug is not compiled, then we resort to current
1041  * behaviour, which is cpu_possible == cpu_present.
1042  * - Ashok Raj
1043  *
1044  * Three ways to find out the number of additional hotplug CPUs:
1045  * - If the BIOS specified disabled CPUs in ACPI/mptables use that.
1046  * - The user can overwrite it with additional_cpus=NUM
1047  * - Otherwise don't reserve additional CPUs.
1048  * We do this because additional CPUs waste a lot of memory.
1049  * -AK
1050  */
1051 __init void prefill_possible_map(void)
1052 {
1053         int i;
1054         int possible;
1055
1056         if (additional_cpus == -1) {
1057                 if (disabled_cpus > 0)
1058                         additional_cpus = disabled_cpus;
1059                 else
1060                         additional_cpus = 0;
1061         }
1062         possible = num_processors + additional_cpus;
1063         if (possible > NR_CPUS)
1064                 possible = NR_CPUS;
1065
1066         printk(KERN_INFO "SMP: Allowing %d CPUs, %d hotplug CPUs\n",
1067                 possible, max_t(int, possible - num_processors, 0));
1068
1069         for (i = 0; i < possible; i++)
1070                 cpu_set(i, cpu_possible_map);
1071 }
1072
1073 static void __ref remove_cpu_from_maps(int cpu)
1074 {
1075         cpu_clear(cpu, cpu_online_map);
1076 #ifdef CONFIG_X86_64
1077         cpu_clear(cpu, cpu_callout_map);
1078         cpu_clear(cpu, cpu_callin_map);
1079         /* was set by cpu_init() */
1080         clear_bit(cpu, (unsigned long *)&cpu_initialized);
1081         clear_node_cpumask(cpu);
1082 #endif
1083 }
1084
1085 int __cpu_disable(void)
1086 {
1087         int cpu = smp_processor_id();
1088
1089         /*
1090          * Perhaps use cpufreq to drop frequency, but that could go
1091          * into generic code.
1092          *
1093          * We won't take down the boot processor on i386 due to some
1094          * interrupts only being able to be serviced by the BSP.
1095          * Especially so if we're not using an IOAPIC   -zwane
1096          */
1097         if (cpu == 0)
1098                 return -EBUSY;
1099
1100         if (nmi_watchdog == NMI_LOCAL_APIC)
1101                 stop_apic_nmi_watchdog(NULL);
1102         clear_local_APIC();
1103
1104         /*
1105          * HACK:
1106          * Allow any queued timer interrupts to get serviced
1107          * This is only a temporary solution until we cleanup
1108          * fixup_irqs as we do for IA64.
1109          */
1110         local_irq_enable();
1111         mdelay(1);
1112
1113         local_irq_disable();
1114         remove_siblinginfo(cpu);
1115
1116         /* It's now safe to remove this processor from the online map */
1117         remove_cpu_from_maps(cpu);
1118         fixup_irqs(cpu_online_map);
1119         return 0;
1120 }
1121
1122 void __cpu_die(unsigned int cpu)
1123 {
1124         /* We don't do anything here: idle task is faking death itself. */
1125         unsigned int i;
1126
1127         for (i = 0; i < 10; i++) {
1128                 /* They ack this in play_dead by setting CPU_DEAD */
1129                 if (per_cpu(cpu_state, cpu) == CPU_DEAD) {
1130                         printk(KERN_INFO "CPU %d is now offline\n", cpu);
1131                         if (1 == num_online_cpus())
1132                                 alternatives_smp_switch(0);
1133                         return;
1134                 }
1135                 msleep(100);
1136         }
1137         printk(KERN_ERR "CPU %u didn't die...\n", cpu);
1138 }
1139 #else /* ... !CONFIG_HOTPLUG_CPU */
1140 int __cpu_disable(void)
1141 {
1142         return -ENOSYS;
1143 }
1144
1145 void __cpu_die(unsigned int cpu)
1146 {
1147         /* We said "no" in __cpu_disable */
1148         BUG();
1149 }
1150 #endif
1151
1152 /*
1153  * If the BIOS enumerates physical processors before logical,
1154  * maxcpus=N at enumeration-time can be used to disable HT.
1155  */
1156 static int __init parse_maxcpus(char *arg)
1157 {
1158         extern unsigned int maxcpus;
1159
1160         maxcpus = simple_strtoul(arg, NULL, 0);
1161         return 0;
1162 }
1163 early_param("maxcpus", parse_maxcpus);