2 * Intel CPU Microcode Update Driver for Linux
4 * Copyright (C) 2000-2006 Tigran Aivazian <aivazian.tigran@gmail.com>
5 * 2006 Shaohua Li <shaohua.li@intel.com>
7 * Intel CPU microcode early update for Linux
9 * Copyright (C) 2012 Fenghua Yu <fenghua.yu@intel.com>
10 * H Peter Anvin" <hpa@zytor.com>
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version
15 * 2 of the License, or (at your option) any later version.
19 * This needs to be before all headers so that pr_debug in printk.h doesn't turn
20 * printk calls into no_printk().
24 #define pr_fmt(fmt) "microcode: " fmt
26 #include <linux/earlycpio.h>
27 #include <linux/firmware.h>
28 #include <linux/uaccess.h>
29 #include <linux/vmalloc.h>
30 #include <linux/initrd.h>
31 #include <linux/kernel.h>
32 #include <linux/slab.h>
33 #include <linux/cpu.h>
36 #include <asm/microcode_intel.h>
37 #include <asm/processor.h>
38 #include <asm/tlbflush.h>
39 #include <asm/setup.h>
42 static const char ucode_path[] = "kernel/x86/microcode/GenuineIntel.bin";
44 /* Current microcode patch used in early patching on the APs. */
45 static struct microcode_intel *intel_ucode_patch;
47 static inline bool cpu_signatures_match(unsigned int s1, unsigned int p1,
48 unsigned int s2, unsigned int p2)
53 /* Processor flags are either both 0 ... */
57 /* ... or they intersect. */
62 * Returns 1 if update has been found, 0 otherwise.
64 static int find_matching_signature(void *mc, unsigned int csig, int cpf)
66 struct microcode_header_intel *mc_hdr = mc;
67 struct extended_sigtable *ext_hdr;
68 struct extended_signature *ext_sig;
71 if (cpu_signatures_match(csig, cpf, mc_hdr->sig, mc_hdr->pf))
74 /* Look for ext. headers: */
75 if (get_totalsize(mc_hdr) <= get_datasize(mc_hdr) + MC_HEADER_SIZE)
78 ext_hdr = mc + get_datasize(mc_hdr) + MC_HEADER_SIZE;
79 ext_sig = (void *)ext_hdr + EXT_HEADER_SIZE;
81 for (i = 0; i < ext_hdr->count; i++) {
82 if (cpu_signatures_match(csig, cpf, ext_sig->sig, ext_sig->pf))
90 * Returns 1 if update has been found, 0 otherwise.
92 static int has_newer_microcode(void *mc, unsigned int csig, int cpf, int new_rev)
94 struct microcode_header_intel *mc_hdr = mc;
96 if (mc_hdr->rev <= new_rev)
99 return find_matching_signature(mc, csig, cpf);
103 * Given CPU signature and a microcode patch, this function finds if the
104 * microcode patch has matching family and model with the CPU.
106 * %true - if there's a match
109 static bool microcode_matches(struct microcode_header_intel *mc_header,
112 unsigned long total_size = get_totalsize(mc_header);
113 unsigned long data_size = get_datasize(mc_header);
114 struct extended_sigtable *ext_header;
115 unsigned int fam_ucode, model_ucode;
116 struct extended_signature *ext_sig;
117 unsigned int fam, model;
120 fam = x86_family(sig);
121 model = x86_model(sig);
123 fam_ucode = x86_family(mc_header->sig);
124 model_ucode = x86_model(mc_header->sig);
126 if (fam == fam_ucode && model == model_ucode)
129 /* Look for ext. headers: */
130 if (total_size <= data_size + MC_HEADER_SIZE)
133 ext_header = (void *) mc_header + data_size + MC_HEADER_SIZE;
134 ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
135 ext_sigcount = ext_header->count;
137 for (i = 0; i < ext_sigcount; i++) {
138 fam_ucode = x86_family(ext_sig->sig);
139 model_ucode = x86_model(ext_sig->sig);
141 if (fam == fam_ucode && model == model_ucode)
149 static struct ucode_patch *memdup_patch(void *data, unsigned int size)
151 struct ucode_patch *p;
153 p = kzalloc(sizeof(struct ucode_patch), GFP_KERNEL);
157 p->data = kmemdup(data, size, GFP_KERNEL);
166 static void save_microcode_patch(void *data, unsigned int size)
168 struct microcode_header_intel *mc_hdr, *mc_saved_hdr;
169 struct ucode_patch *iter, *tmp, *p = NULL;
170 bool prev_found = false;
171 unsigned int sig, pf;
173 mc_hdr = (struct microcode_header_intel *)data;
175 list_for_each_entry_safe(iter, tmp, µcode_cache, plist) {
176 mc_saved_hdr = (struct microcode_header_intel *)iter->data;
177 sig = mc_saved_hdr->sig;
178 pf = mc_saved_hdr->pf;
180 if (find_matching_signature(data, sig, pf)) {
183 if (mc_hdr->rev <= mc_saved_hdr->rev)
186 p = memdup_patch(data, size);
188 pr_err("Error allocating buffer %p\n", data);
190 list_replace(&iter->plist, &p->plist);
195 * There weren't any previous patches found in the list cache; save the
199 p = memdup_patch(data, size);
201 pr_err("Error allocating buffer for %p\n", data);
203 list_add_tail(&p->plist, µcode_cache);
210 * Save for early loading. On 32-bit, that needs to be a physical
211 * address as the APs are running from physical addresses, before
212 * paging has been enabled.
214 if (IS_ENABLED(CONFIG_X86_32))
215 intel_ucode_patch = (struct microcode_intel *)__pa_nodebug(p->data);
217 intel_ucode_patch = p->data;
220 static int microcode_sanity_check(void *mc, int print_err)
222 unsigned long total_size, data_size, ext_table_size;
223 struct microcode_header_intel *mc_header = mc;
224 struct extended_sigtable *ext_header = NULL;
225 u32 sum, orig_sum, ext_sigcount = 0, i;
226 struct extended_signature *ext_sig;
228 total_size = get_totalsize(mc_header);
229 data_size = get_datasize(mc_header);
231 if (data_size + MC_HEADER_SIZE > total_size) {
233 pr_err("Error: bad microcode data file size.\n");
237 if (mc_header->ldrver != 1 || mc_header->hdrver != 1) {
239 pr_err("Error: invalid/unknown microcode update format.\n");
243 ext_table_size = total_size - (MC_HEADER_SIZE + data_size);
244 if (ext_table_size) {
245 u32 ext_table_sum = 0;
248 if ((ext_table_size < EXT_HEADER_SIZE)
249 || ((ext_table_size - EXT_HEADER_SIZE) % EXT_SIGNATURE_SIZE)) {
251 pr_err("Error: truncated extended signature table.\n");
255 ext_header = mc + MC_HEADER_SIZE + data_size;
256 if (ext_table_size != exttable_size(ext_header)) {
258 pr_err("Error: extended signature table size mismatch.\n");
262 ext_sigcount = ext_header->count;
265 * Check extended table checksum: the sum of all dwords that
266 * comprise a valid table must be 0.
268 ext_tablep = (u32 *)ext_header;
270 i = ext_table_size / sizeof(u32);
272 ext_table_sum += ext_tablep[i];
276 pr_warn("Bad extended signature table checksum, aborting.\n");
282 * Calculate the checksum of update data and header. The checksum of
283 * valid update data and header including the extended signature table
287 i = (MC_HEADER_SIZE + data_size) / sizeof(u32);
289 orig_sum += ((u32 *)mc)[i];
293 pr_err("Bad microcode data checksum, aborting.\n");
301 * Check extended signature checksum: 0 => valid.
303 for (i = 0; i < ext_sigcount; i++) {
304 ext_sig = (void *)ext_header + EXT_HEADER_SIZE +
305 EXT_SIGNATURE_SIZE * i;
307 sum = (mc_header->sig + mc_header->pf + mc_header->cksum) -
308 (ext_sig->sig + ext_sig->pf + ext_sig->cksum);
311 pr_err("Bad extended signature checksum, aborting.\n");
319 * Get microcode matching with BSP's model. Only CPUs with the same model as
320 * BSP can stay in the platform.
322 static struct microcode_intel *
323 scan_microcode(void *data, size_t size, struct ucode_cpu_info *uci, bool save)
325 struct microcode_header_intel *mc_header;
326 struct microcode_intel *patch = NULL;
327 unsigned int mc_size;
330 if (size < sizeof(struct microcode_header_intel))
333 mc_header = (struct microcode_header_intel *)data;
335 mc_size = get_totalsize(mc_header);
338 microcode_sanity_check(data, 0) < 0)
343 if (!microcode_matches(mc_header, uci->cpu_sig.sig)) {
349 save_microcode_patch(data, mc_size);
355 if (!has_newer_microcode(data,
362 struct microcode_header_intel *phdr = &patch->hdr;
364 if (!has_newer_microcode(data,
371 /* We have a newer patch, save it. */
384 static int collect_cpu_info_early(struct ucode_cpu_info *uci)
387 unsigned int family, model;
388 struct cpu_signature csig = { 0 };
389 unsigned int eax, ebx, ecx, edx;
391 memset(uci, 0, sizeof(*uci));
395 native_cpuid(&eax, &ebx, &ecx, &edx);
398 family = x86_family(eax);
399 model = x86_model(eax);
401 if ((model >= 5) || (family > 6)) {
402 /* get processor flags from MSR 0x17 */
403 native_rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
404 csig.pf = 1 << ((val[1] >> 18) & 7);
407 csig.rev = intel_get_microcode_revision();
415 static void show_saved_mc(void)
419 unsigned int sig, pf, rev, total_size, data_size, date;
420 struct ucode_cpu_info uci;
421 struct ucode_patch *p;
423 if (list_empty(µcode_cache)) {
424 pr_debug("no microcode data saved.\n");
428 collect_cpu_info_early(&uci);
430 sig = uci.cpu_sig.sig;
432 rev = uci.cpu_sig.rev;
433 pr_debug("CPU: sig=0x%x, pf=0x%x, rev=0x%x\n", sig, pf, rev);
435 list_for_each_entry(p, µcode_cache, plist) {
436 struct microcode_header_intel *mc_saved_header;
437 struct extended_sigtable *ext_header;
438 struct extended_signature *ext_sig;
441 mc_saved_header = (struct microcode_header_intel *)p->data;
443 sig = mc_saved_header->sig;
444 pf = mc_saved_header->pf;
445 rev = mc_saved_header->rev;
446 date = mc_saved_header->date;
448 total_size = get_totalsize(mc_saved_header);
449 data_size = get_datasize(mc_saved_header);
451 pr_debug("mc_saved[%d]: sig=0x%x, pf=0x%x, rev=0x%x, total size=0x%x, date = %04x-%02x-%02x\n",
452 i++, sig, pf, rev, total_size,
455 (date >> 16) & 0xff);
457 /* Look for ext. headers: */
458 if (total_size <= data_size + MC_HEADER_SIZE)
461 ext_header = (void *)mc_saved_header + data_size + MC_HEADER_SIZE;
462 ext_sigcount = ext_header->count;
463 ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
465 for (j = 0; j < ext_sigcount; j++) {
469 pr_debug("\tExtended[%d]: sig=0x%x, pf=0x%x\n",
479 * Save this microcode patch. It will be loaded early when a CPU is
480 * hot-added or resumes.
482 static void save_mc_for_early(u8 *mc, unsigned int size)
484 #ifdef CONFIG_HOTPLUG_CPU
485 /* Synchronization during CPU hotplug. */
486 static DEFINE_MUTEX(x86_cpu_microcode_mutex);
488 mutex_lock(&x86_cpu_microcode_mutex);
490 save_microcode_patch(mc, size);
493 mutex_unlock(&x86_cpu_microcode_mutex);
497 static bool load_builtin_intel_microcode(struct cpio_data *cp)
499 unsigned int eax = 1, ebx, ecx = 0, edx;
502 if (IS_ENABLED(CONFIG_X86_32))
505 native_cpuid(&eax, &ebx, &ecx, &edx);
507 sprintf(name, "intel-ucode/%02x-%02x-%02x",
508 x86_family(eax), x86_model(eax), x86_stepping(eax));
510 return get_builtin_firmware(cp, name);
514 * Print ucode update info.
517 print_ucode_info(struct ucode_cpu_info *uci, unsigned int date)
519 pr_info_once("microcode updated early to revision 0x%x, date = %04x-%02x-%02x\n",
523 (date >> 16) & 0xff);
528 static int delay_ucode_info;
529 static int current_mc_date;
532 * Print early updated ucode info after printk works. This is delayed info dump.
534 void show_ucode_info_early(void)
536 struct ucode_cpu_info uci;
538 if (delay_ucode_info) {
539 collect_cpu_info_early(&uci);
540 print_ucode_info(&uci, current_mc_date);
541 delay_ucode_info = 0;
546 * At this point, we can not call printk() yet. Delay printing microcode info in
547 * show_ucode_info_early() until printk() works.
549 static void print_ucode(struct ucode_cpu_info *uci)
551 struct microcode_intel *mc;
552 int *delay_ucode_info_p;
553 int *current_mc_date_p;
559 delay_ucode_info_p = (int *)__pa_nodebug(&delay_ucode_info);
560 current_mc_date_p = (int *)__pa_nodebug(¤t_mc_date);
562 *delay_ucode_info_p = 1;
563 *current_mc_date_p = mc->hdr.date;
568 * Flush global tlb. We only do this in x86_64 where paging has been enabled
569 * already and PGE should be enabled as well.
571 static inline void flush_tlb_early(void)
573 __native_flush_tlb_global_irq_disabled();
576 static inline void print_ucode(struct ucode_cpu_info *uci)
578 struct microcode_intel *mc;
584 print_ucode_info(uci, mc->hdr.date);
588 static int apply_microcode_early(struct ucode_cpu_info *uci, bool early)
590 struct microcode_intel *mc;
597 /* write microcode via MSR 0x79 */
598 native_wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)mc->bits);
600 rev = intel_get_microcode_revision();
601 if (rev != mc->hdr.rev)
605 /* Flush global tlb. This is precaution. */
608 uci->cpu_sig.rev = rev;
613 print_ucode_info(uci, mc->hdr.date);
618 int __init save_microcode_in_initrd_intel(void)
620 struct ucode_cpu_info uci;
624 * initrd is going away, clear patch ptr. We will scan the microcode one
625 * last time before jettisoning and save a patch, if found. Then we will
626 * update that pointer too, with a stable patch address to use when
627 * resuming the cores.
629 intel_ucode_patch = NULL;
631 if (!load_builtin_intel_microcode(&cp))
632 cp = find_microcode_in_initrd(ucode_path, false);
634 if (!(cp.data && cp.size))
637 collect_cpu_info_early(&uci);
639 scan_microcode(cp.data, cp.size, &uci, true);
647 * @res_patch, output: a pointer to the patch we found.
649 static struct microcode_intel *__load_ucode_intel(struct ucode_cpu_info *uci)
651 static const char *path;
655 if (IS_ENABLED(CONFIG_X86_32)) {
656 path = (const char *)__pa_nodebug(ucode_path);
663 /* try built-in microcode first */
664 if (!load_builtin_intel_microcode(&cp))
665 cp = find_microcode_in_initrd(path, use_pa);
667 if (!(cp.data && cp.size))
670 collect_cpu_info_early(uci);
672 return scan_microcode(cp.data, cp.size, uci, false);
675 void __init load_ucode_intel_bsp(void)
677 struct microcode_intel *patch;
678 struct ucode_cpu_info uci;
680 patch = __load_ucode_intel(&uci);
686 apply_microcode_early(&uci, true);
689 void load_ucode_intel_ap(void)
691 struct microcode_intel *patch, **iup;
692 struct ucode_cpu_info uci;
694 if (IS_ENABLED(CONFIG_X86_32))
695 iup = (struct microcode_intel **) __pa_nodebug(&intel_ucode_patch);
697 iup = &intel_ucode_patch;
701 patch = __load_ucode_intel(&uci);
710 if (apply_microcode_early(&uci, true)) {
711 /* Mixed-silicon system? Try to refetch the proper patch: */
718 static struct microcode_intel *find_patch(struct ucode_cpu_info *uci)
720 struct microcode_header_intel *phdr;
721 struct ucode_patch *iter, *tmp;
723 list_for_each_entry_safe(iter, tmp, µcode_cache, plist) {
725 phdr = (struct microcode_header_intel *)iter->data;
727 if (phdr->rev <= uci->cpu_sig.rev)
730 if (!find_matching_signature(phdr,
740 void reload_ucode_intel(void)
742 struct microcode_intel *p;
743 struct ucode_cpu_info uci;
745 collect_cpu_info_early(&uci);
747 p = find_patch(&uci);
753 apply_microcode_early(&uci, false);
756 static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
758 static struct cpu_signature prev;
759 struct cpuinfo_x86 *c = &cpu_data(cpu_num);
762 memset(csig, 0, sizeof(*csig));
764 csig->sig = cpuid_eax(0x00000001);
766 if ((c->x86_model >= 5) || (c->x86 > 6)) {
767 /* get processor flags from MSR 0x17 */
768 rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
769 csig->pf = 1 << ((val[1] >> 18) & 7);
772 csig->rev = c->microcode;
774 /* No extra locking on prev, races are harmless. */
775 if (csig->sig != prev.sig || csig->pf != prev.pf || csig->rev != prev.rev) {
776 pr_info("sig=0x%x, pf=0x%x, revision=0x%x\n",
777 csig->sig, csig->pf, csig->rev);
784 static int apply_microcode_intel(int cpu)
786 struct microcode_intel *mc;
787 struct ucode_cpu_info *uci;
788 struct cpuinfo_x86 *c;
792 /* We should bind the task to the CPU */
793 if (WARN_ON(raw_smp_processor_id() != cpu))
796 uci = ucode_cpu_info + cpu;
799 /* Look for a newer patch in our cache: */
800 mc = find_patch(uci);
805 /* write microcode via MSR 0x79 */
806 wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)mc->bits);
808 rev = intel_get_microcode_revision();
810 if (rev != mc->hdr.rev) {
811 pr_err("CPU%d update to revision 0x%x failed\n",
816 if (rev != prev_rev) {
817 pr_info("updated to revision 0x%x, date = %04x-%02x-%02x\n",
819 mc->hdr.date & 0xffff,
821 (mc->hdr.date >> 16) & 0xff);
827 uci->cpu_sig.rev = rev;
833 static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size,
834 int (*get_ucode_data)(void *, const void *, size_t))
836 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
837 u8 *ucode_ptr = data, *new_mc = NULL, *mc = NULL;
838 int new_rev = uci->cpu_sig.rev;
839 unsigned int leftover = size;
840 unsigned int curr_mc_size = 0, new_mc_size = 0;
841 unsigned int csig, cpf;
844 struct microcode_header_intel mc_header;
845 unsigned int mc_size;
847 if (leftover < sizeof(mc_header)) {
848 pr_err("error! Truncated header in microcode data file\n");
852 if (get_ucode_data(&mc_header, ucode_ptr, sizeof(mc_header)))
855 mc_size = get_totalsize(&mc_header);
856 if (!mc_size || mc_size > leftover) {
857 pr_err("error! Bad data in microcode data file\n");
861 /* For performance reasons, reuse mc area when possible */
862 if (!mc || mc_size > curr_mc_size) {
864 mc = vmalloc(mc_size);
867 curr_mc_size = mc_size;
870 if (get_ucode_data(mc, ucode_ptr, mc_size) ||
871 microcode_sanity_check(mc, 1) < 0) {
875 csig = uci->cpu_sig.sig;
876 cpf = uci->cpu_sig.pf;
877 if (has_newer_microcode(mc, csig, cpf, new_rev)) {
879 new_rev = mc_header.rev;
881 new_mc_size = mc_size;
882 mc = NULL; /* trigger new vmalloc */
885 ucode_ptr += mc_size;
900 uci->mc = (struct microcode_intel *)new_mc;
903 * If early loading microcode is supported, save this mc into
904 * permanent memory. So it will be loaded early when a CPU is hot added
907 save_mc_for_early(new_mc, new_mc_size);
909 pr_debug("CPU%d found a matching microcode update with version 0x%x (current=0x%x)\n",
910 cpu, new_rev, uci->cpu_sig.rev);
915 static int get_ucode_fw(void *to, const void *from, size_t n)
921 static enum ucode_state request_microcode_fw(int cpu, struct device *device,
925 struct cpuinfo_x86 *c = &cpu_data(cpu);
926 const struct firmware *firmware;
927 enum ucode_state ret;
929 sprintf(name, "intel-ucode/%02x-%02x-%02x",
930 c->x86, c->x86_model, c->x86_mask);
932 if (request_firmware_direct(&firmware, name, device)) {
933 pr_debug("data file %s load failed\n", name);
937 ret = generic_load_microcode(cpu, (void *)firmware->data,
938 firmware->size, &get_ucode_fw);
940 release_firmware(firmware);
945 static int get_ucode_user(void *to, const void *from, size_t n)
947 return copy_from_user(to, from, n);
950 static enum ucode_state
951 request_microcode_user(int cpu, const void __user *buf, size_t size)
953 return generic_load_microcode(cpu, (void *)buf, size, &get_ucode_user);
956 static struct microcode_ops microcode_intel_ops = {
957 .request_microcode_user = request_microcode_user,
958 .request_microcode_fw = request_microcode_fw,
959 .collect_cpu_info = collect_cpu_info,
960 .apply_microcode = apply_microcode_intel,
963 struct microcode_ops * __init init_intel_microcode(void)
965 struct cpuinfo_x86 *c = &boot_cpu_data;
967 if (c->x86_vendor != X86_VENDOR_INTEL || c->x86 < 6 ||
968 cpu_has(c, X86_FEATURE_IA64)) {
969 pr_err("Intel CPU family 0x%x not supported\n", c->x86);
973 return µcode_intel_ops;