arch/x86/kernel/cpu/cpufreq/speedstep-ich.c

   1 /*
   2  * (C) 2001  Dave Jones, Arjan van de ven.
   3  * (C) 2002 - 2003  Dominik Brodowski <linux@brodo.de>
   4  *
   5  *  Licensed under the terms of the GNU GPL License version 2.
   6  *  Based upon reverse engineered information, and on Intel documentation
   7  *  for chipsets ICH2-M and ICH3-M.
   8  *
   9  *  Many thanks to Ducrot Bruno for finding and fixing the last
  10  *  "missing link" for ICH2-M/ICH3-M support, and to Thomas Winkler
  11  *  for extensive testing.
  12  *
  13  *  BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
  14  */
  15
  16
  17 /*********************************************************************
  18  *                        SPEEDSTEP - DEFINITIONS                    *
  19  *********************************************************************/
  20
  21 #include <linux/kernel.h>
  22 #include <linux/module.h>
  23 #include <linux/init.h>
  24 #include <linux/cpufreq.h>
  25 #include <linux/pci.h>
  26 #include <linux/sched.h>
  27
  28 #include "speedstep-lib.h"
  29
  30
  31 /* speedstep_chipset:
  32  *   It is necessary to know which chipset is used. As accesses to
  33  * this device occur at various places in this module, we need a
  34  * static struct pci_dev * pointing to that device.
  35  */
  36 static struct pci_dev *speedstep_chipset_dev;
  37
  38
  39 /* speedstep_processor
  40  */
  41 static enum speedstep_processor speedstep_processor;
  42
  43 static u32 pmbase;
  44
  45 /*
  46  *   There are only two frequency states for each processor. Values
  47  * are in kHz for the time being.
  48  */
  49 static struct cpufreq_frequency_table speedstep_freqs[] = {
  50         {SPEEDSTEP_HIGH,        0},
  51         {SPEEDSTEP_LOW,         0},
  52         {0,                     CPUFREQ_TABLE_END},
  53 };
  54
  55
  56 #define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
  57                 "speedstep-ich", msg)
  58
  59
  60 /**
  61  * speedstep_find_register - read the PMBASE address
  62  *
  63  * Returns: -ENODEV if no register could be found
  64  */
  65 static int speedstep_find_register(void)
  66 {
  67         if (!speedstep_chipset_dev)
  68                 return -ENODEV;
  69
  70         /* get PMBASE */
  71         pci_read_config_dword(speedstep_chipset_dev, 0x40, &pmbase);
  72         if (!(pmbase & 0x01)) {
  73                 printk(KERN_ERR "speedstep-ich: could not find speedstep register\n");
  74                 return -ENODEV;
  75         }
  76
  77         pmbase &= 0xFFFFFFFE;
  78         if (!pmbase) {
  79                 printk(KERN_ERR "speedstep-ich: could not find speedstep register\n");
  80                 return -ENODEV;
  81         }
  82
  83         dprintk("pmbase is 0x%x\n", pmbase);
  84         return 0;
  85 }
  86
  87 /**
  88  * speedstep_set_state - set the SpeedStep state
  89  * @state: new processor frequency state (SPEEDSTEP_LOW or SPEEDSTEP_HIGH)
  90  *
  91  *   Tries to change the SpeedStep state.  Can be called from
  92  *   smp_call_function_single.
  93  */
  94 static void speedstep_set_state(unsigned int state)
  95 {
  96         u8 pm2_blk;
  97         u8 value;
  98         unsigned long flags;
  99
 100         if (state > 0x1)
 101                 return;
 102
 103         /* Disable IRQs */
 104         local_irq_save(flags);
 105
 106         /* read state */
 107         value = inb(pmbase + 0x50);
 108
 109         dprintk("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value);
 110
 111         /* write new state */
 112         value &= 0xFE;
 113         value |= state;
 114
 115         dprintk("writing 0x%x to pmbase 0x%x + 0x50\n", value, pmbase);
 116
 117         /* Disable bus master arbitration */
 118         pm2_blk = inb(pmbase + 0x20);
 119         pm2_blk |= 0x01;
 120         outb(pm2_blk, (pmbase + 0x20));
 121
 122         /* Actual transition */
 123         outb(value, (pmbase + 0x50));
 124
 125         /* Restore bus master arbitration */
 126         pm2_blk &= 0xfe;
 127         outb(pm2_blk, (pmbase + 0x20));
 128
 129         /* check if transition was successful */
 130         value = inb(pmbase + 0x50);
 131
 132         /* Enable IRQs */
 133         local_irq_restore(flags);
 134
 135         dprintk("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value);
 136
 137         if (state == (value & 0x1))
 138                 dprintk("change to %u MHz succeeded\n",
 139                         speedstep_get_frequency(speedstep_processor) / 1000);
 140         else
 141                 printk(KERN_ERR "cpufreq: change failed - I/O error\n");
 142
 143         return;
 144 }
 145
 146 /* Wrapper for smp_call_function_single. */
 147 static void _speedstep_set_state(void *_state)
 148 {
 149         speedstep_set_state(*(unsigned int *)_state);
 150 }
 151
 152 /**
 153  * speedstep_activate - activate SpeedStep control in the chipset
 154  *
 155  *   Tries to activate the SpeedStep status and control registers.
 156  * Returns -EINVAL on an unsupported chipset, and zero on success.
 157  */
 158 static int speedstep_activate(void)
 159 {
 160         u16 value = 0;
 161
 162         if (!speedstep_chipset_dev)
 163                 return -EINVAL;
 164
 165         pci_read_config_word(speedstep_chipset_dev, 0x00A0, &value);
 166         if (!(value & 0x08)) {
 167                 value |= 0x08;
 168                 dprintk("activating SpeedStep (TM) registers\n");
 169                 pci_write_config_word(speedstep_chipset_dev, 0x00A0, value);
 170         }
 171
 172         return 0;
 173 }
 174
 175
 176 /**
 177  * speedstep_detect_chipset - detect the Southbridge which contains SpeedStep logic
 178  *
 179  *   Detects ICH2-M, ICH3-M and ICH4-M so far. The pci_dev points to
 180  * the LPC bridge / PM module which contains all power-management
 181  * functions. Returns the SPEEDSTEP_CHIPSET_-number for the detected
 182  * chipset, or zero on failure.
 183  */
 184 static unsigned int speedstep_detect_chipset(void)
 185 {
 186         speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
 187                               PCI_DEVICE_ID_INTEL_82801DB_12,
 188                               PCI_ANY_ID, PCI_ANY_ID,
 189                               NULL);
 190         if (speedstep_chipset_dev)
 191                 return 4; /* 4-M */
 192
 193         speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
 194                               PCI_DEVICE_ID_INTEL_82801CA_12,
 195                               PCI_ANY_ID, PCI_ANY_ID,
 196                               NULL);
 197         if (speedstep_chipset_dev)
 198                 return 3; /* 3-M */
 199
 200
 201         speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
 202                               PCI_DEVICE_ID_INTEL_82801BA_10,
 203                               PCI_ANY_ID, PCI_ANY_ID,
 204                               NULL);
 205         if (speedstep_chipset_dev) {
 206                 /* speedstep.c causes lockups on Dell Inspirons 8000 and
 207                  * 8100 which use a pretty old revision of the 82815
 208                  * host brige. Abort on these systems.
 209                  */
 210                 static struct pci_dev *hostbridge;
 211
 212                 hostbridge  = pci_get_subsys(PCI_VENDOR_ID_INTEL,
 213                               PCI_DEVICE_ID_INTEL_82815_MC,
 214                               PCI_ANY_ID, PCI_ANY_ID,
 215                               NULL);
 216
 217                 if (!hostbridge)
 218                         return 2; /* 2-M */
 219
 220                 if (hostbridge->revision < 5) {
 221                         dprintk("hostbridge does not support speedstep\n");
 222                         speedstep_chipset_dev = NULL;
 223                         pci_dev_put(hostbridge);
 224                         return 0;
 225                 }
 226
 227                 pci_dev_put(hostbridge);
 228                 return 2; /* 2-M */
 229         }
 230
 231         return 0;
 232 }
 233
 234 static void get_freq_data(void *_speed)
 235 {
 236         unsigned int *speed = _speed;
 237
 238         *speed = speedstep_get_frequency(speedstep_processor);
 239 }
 240
 241 static unsigned int speedstep_get(unsigned int cpu)
 242 {
 243         unsigned int speed;
 244
 245         /* You're supposed to ensure CPU is online. */
 246         if (smp_call_function_single(cpu, get_freq_data, &speed, 1) != 0)
 247                 BUG();
 248
 249         dprintk("detected %u kHz as current frequency\n", speed);
 250         return speed;
 251 }
 252
 253 /**
 254  * speedstep_target - set a new CPUFreq policy
 255  * @policy: new policy
 256  * @target_freq: the target frequency
 257  * @relation: how that frequency relates to achieved frequency
 258  *      (CPUFREQ_RELATION_L or CPUFREQ_RELATION_H)
 259  *
 260  * Sets a new CPUFreq policy.
 261  */
 262 static int speedstep_target(struct cpufreq_policy *policy,
 263                              unsigned int target_freq,
 264                              unsigned int relation)
 265 {
 266         unsigned int newstate = 0, policy_cpu;
 267         struct cpufreq_freqs freqs;
 268         int i;
 269
 270         if (cpufreq_frequency_table_target(policy, &speedstep_freqs[0],
 271                                 target_freq, relation, &newstate))
 272                 return -EINVAL;
 273
 274         policy_cpu = cpumask_any_and(policy->cpus, cpu_online_mask);
 275         freqs.old = speedstep_get(policy_cpu);
 276         freqs.new = speedstep_freqs[newstate].frequency;
 277         freqs.cpu = policy->cpu;
 278
 279         dprintk("transiting from %u to %u kHz\n", freqs.old, freqs.new);
 280
 281         /* no transition necessary */
 282         if (freqs.old == freqs.new)
 283                 return 0;
 284
 285         for_each_cpu(i, policy->cpus) {
 286                 freqs.cpu = i;
 287                 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
 288         }
 289
 290         smp_call_function_single(policy_cpu, _speedstep_set_state, &newstate,
 291                                  true);
 292
 293         for_each_cpu(i, policy->cpus) {
 294                 freqs.cpu = i;
 295                 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
 296         }
 297
 298         return 0;
 299 }
 300
 301
 302 /**
 303  * speedstep_verify - verifies a new CPUFreq policy
 304  * @policy: new policy
 305  *
 306  * Limit must be within speedstep_low_freq and speedstep_high_freq, with
 307  * at least one border included.
 308  */
 309 static int speedstep_verify(struct cpufreq_policy *policy)
 310 {
 311         return cpufreq_frequency_table_verify(policy, &speedstep_freqs[0]);
 312 }
 313
 314 struct get_freqs {
 315         struct cpufreq_policy *policy;
 316         int ret;
 317 };
 318
 319 static void get_freqs_on_cpu(void *_get_freqs)
 320 {
 321         struct get_freqs *get_freqs = _get_freqs;
 322
 323         get_freqs->ret =
 324                 speedstep_get_freqs(speedstep_processor,
 325                             &speedstep_freqs[SPEEDSTEP_LOW].frequency,
 326                             &speedstep_freqs[SPEEDSTEP_HIGH].frequency,
 327                             &get_freqs->policy->cpuinfo.transition_latency,
 328                             &speedstep_set_state);
 329 }
 330
 331 static int speedstep_cpu_init(struct cpufreq_policy *policy)
 332 {
 333         int result;
 334         unsigned int policy_cpu, speed;
 335         struct get_freqs gf;
 336
 337         /* only run on CPU to be set, or on its sibling */
 338 #ifdef CONFIG_SMP
 339         cpumask_copy(policy->cpus, cpu_sibling_mask(policy->cpu));
 340 #endif
 341         policy_cpu = cpumask_any_and(policy->cpus, cpu_online_mask);
 342
 343         /* detect low and high frequency and transition latency */
 344         gf.policy = policy;
 345         smp_call_function_single(policy_cpu, get_freqs_on_cpu, &gf, 1);
 346         if (gf.ret)
 347                 return gf.ret;
 348
 349         /* get current speed setting */
 350         speed = speedstep_get(policy_cpu);
 351         if (!speed)
 352                 return -EIO;
 353
 354         dprintk("currently at %s speed setting - %i MHz\n",
 355                 (speed == speedstep_freqs[SPEEDSTEP_LOW].frequency)
 356                 ? "low" : "high",
 357                 (speed / 1000));
 358
 359         /* cpuinfo and default policy values */
 360         policy->cur = speed;
 361
 362         result = cpufreq_frequency_table_cpuinfo(policy, speedstep_freqs);
 363         if (result)
 364                 return result;
 365
 366         cpufreq_frequency_table_get_attr(speedstep_freqs, policy->cpu);
 367
 368         return 0;
 369 }
 370
 371
 372 static int speedstep_cpu_exit(struct cpufreq_policy *policy)
 373 {
 374         cpufreq_frequency_table_put_attr(policy->cpu);
 375         return 0;
 376 }
 377
 378 static struct freq_attr *speedstep_attr[] = {
 379         &cpufreq_freq_attr_scaling_available_freqs,
 380         NULL,
 381 };
 382
 383
 384 static struct cpufreq_driver speedstep_driver = {
 385         .name   = "speedstep-ich",
 386         .verify = speedstep_verify,
 387         .target = speedstep_target,
 388         .init   = speedstep_cpu_init,
 389         .exit   = speedstep_cpu_exit,
 390         .get    = speedstep_get,
 391         .owner  = THIS_MODULE,
 392         .attr   = speedstep_attr,
 393 };
 394
 395
 396 /**
 397  * speedstep_init - initializes the SpeedStep CPUFreq driver
 398  *
 399  *   Initializes the SpeedStep support. Returns -ENODEV on unsupported
 400  * devices, -EINVAL on problems during initiatization, and zero on
 401  * success.
 402  */
 403 static int __init speedstep_init(void)
 404 {
 405         /* detect processor */
 406         speedstep_processor = speedstep_detect_processor();
 407         if (!speedstep_processor) {
 408                 dprintk("Intel(R) SpeedStep(TM) capable processor "
 409                                 "not found\n");
 410                 return -ENODEV;
 411         }
 412
 413         /* detect chipset */
 414         if (!speedstep_detect_chipset()) {
 415                 dprintk("Intel(R) SpeedStep(TM) for this chipset not "
 416                                 "(yet) available.\n");
 417                 return -ENODEV;
 418         }
 419
 420         /* activate speedstep support */
 421         if (speedstep_activate()) {
 422                 pci_dev_put(speedstep_chipset_dev);
 423                 return -EINVAL;
 424         }
 425
 426         if (speedstep_find_register())
 427                 return -ENODEV;
 428
 429         return cpufreq_register_driver(&speedstep_driver);
 430 }
 431
 432
 433 /**
 434  * speedstep_exit - unregisters SpeedStep support
 435  *
 436  *   Unregisters SpeedStep support.
 437  */
 438 static void __exit speedstep_exit(void)
 439 {
 440         pci_dev_put(speedstep_chipset_dev);
 441         cpufreq_unregister_driver(&speedstep_driver);
 442 }
 443
 444
 445 MODULE_AUTHOR("Dave Jones <davej@redhat.com>, "
 446                 "Dominik Brodowski <linux@brodo.de>");
 447 MODULE_DESCRIPTION("Speedstep driver for Intel mobile processors on chipsets "
 448                 "with ICH-M southbridges.");
 449 MODULE_LICENSE("GPL");
 450
 451 module_init(speedstep_init);
 452 module_exit(speedstep_exit);