arch/x86/include/asm/paravirt.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef _ASM_X86_PARAVIRT_H
   3 #define _ASM_X86_PARAVIRT_H
   4 /* Various instructions on x86 need to be replaced for
   5  * para-virtualization: those hooks are defined here. */
   6
   7 #ifdef CONFIG_PARAVIRT
   8 #include <asm/pgtable_types.h>
   9 #include <asm/asm.h>
  10
  11 #include <asm/paravirt_types.h>
  12
  13 #ifndef __ASSEMBLY__
  14 #include <linux/bug.h>
  15 #include <linux/types.h>
  16 #include <linux/cpumask.h>
  17 #include <asm/frame.h>
  18
  19 static inline void load_sp0(unsigned long sp0)
  20 {
  21         PVOP_VCALL1(pv_cpu_ops.load_sp0, sp0);
  22 }
  23
  24 /* The paravirtualized CPUID instruction. */
  25 static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
  26                            unsigned int *ecx, unsigned int *edx)
  27 {
  28         PVOP_VCALL4(pv_cpu_ops.cpuid, eax, ebx, ecx, edx);
  29 }
  30
  31 /*
  32  * These special macros can be used to get or set a debugging register
  33  */
  34 static inline unsigned long paravirt_get_debugreg(int reg)
  35 {
  36         return PVOP_CALL1(unsigned long, pv_cpu_ops.get_debugreg, reg);
  37 }
  38 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
  39 static inline void set_debugreg(unsigned long val, int reg)
  40 {
  41         PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val);
  42 }
  43
  44 static inline unsigned long read_cr0(void)
  45 {
  46         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0);
  47 }
  48
  49 static inline void write_cr0(unsigned long x)
  50 {
  51         PVOP_VCALL1(pv_cpu_ops.write_cr0, x);
  52 }
  53
  54 static inline unsigned long read_cr2(void)
  55 {
  56         return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr2);
  57 }
  58
  59 static inline void write_cr2(unsigned long x)
  60 {
  61         PVOP_VCALL1(pv_mmu_ops.write_cr2, x);
  62 }
  63
  64 static inline unsigned long __read_cr3(void)
  65 {
  66         return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr3);
  67 }
  68
  69 static inline void write_cr3(unsigned long x)
  70 {
  71         PVOP_VCALL1(pv_mmu_ops.write_cr3, x);
  72 }
  73
  74 static inline void __write_cr4(unsigned long x)
  75 {
  76         PVOP_VCALL1(pv_cpu_ops.write_cr4, x);
  77 }
  78
  79 #ifdef CONFIG_X86_64
  80 static inline unsigned long read_cr8(void)
  81 {
  82         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr8);
  83 }
  84
  85 static inline void write_cr8(unsigned long x)
  86 {
  87         PVOP_VCALL1(pv_cpu_ops.write_cr8, x);
  88 }
  89 #endif
  90
  91 static inline void arch_safe_halt(void)
  92 {
  93         PVOP_VCALL0(pv_irq_ops.safe_halt);
  94 }
  95
  96 static inline void halt(void)
  97 {
  98         PVOP_VCALL0(pv_irq_ops.halt);
  99 }
 100
 101 static inline void wbinvd(void)
 102 {
 103         PVOP_VCALL0(pv_cpu_ops.wbinvd);
 104 }
 105
 106 #define get_kernel_rpl()  (pv_info.kernel_rpl)
 107
 108 static inline u64 paravirt_read_msr(unsigned msr)
 109 {
 110         return PVOP_CALL1(u64, pv_cpu_ops.read_msr, msr);
 111 }
 112
 113 static inline void paravirt_write_msr(unsigned msr,
 114                                       unsigned low, unsigned high)
 115 {
 116         PVOP_VCALL3(pv_cpu_ops.write_msr, msr, low, high);
 117 }
 118
 119 static inline u64 paravirt_read_msr_safe(unsigned msr, int *err)
 120 {
 121         return PVOP_CALL2(u64, pv_cpu_ops.read_msr_safe, msr, err);
 122 }
 123
 124 static inline int paravirt_write_msr_safe(unsigned msr,
 125                                           unsigned low, unsigned high)
 126 {
 127         return PVOP_CALL3(int, pv_cpu_ops.write_msr_safe, msr, low, high);
 128 }
 129
 130 #define rdmsr(msr, val1, val2)                  \
 131 do {                                            \
 132         u64 _l = paravirt_read_msr(msr);        \
 133         val1 = (u32)_l;                         \
 134         val2 = _l >> 32;                        \
 135 } while (0)
 136
 137 #define wrmsr(msr, val1, val2)                  \
 138 do {                                            \
 139         paravirt_write_msr(msr, val1, val2);    \
 140 } while (0)
 141
 142 #define rdmsrl(msr, val)                        \
 143 do {                                            \
 144         val = paravirt_read_msr(msr);           \
 145 } while (0)
 146
 147 static inline void wrmsrl(unsigned msr, u64 val)
 148 {
 149         wrmsr(msr, (u32)val, (u32)(val>>32));
 150 }
 151
 152 #define wrmsr_safe(msr, a, b)   paravirt_write_msr_safe(msr, a, b)
 153
 154 /* rdmsr with exception handling */
 155 #define rdmsr_safe(msr, a, b)                           \
 156 ({                                                      \
 157         int _err;                                       \
 158         u64 _l = paravirt_read_msr_safe(msr, &_err);    \
 159         (*a) = (u32)_l;                                 \
 160         (*b) = _l >> 32;                                \
 161         _err;                                           \
 162 })
 163
 164 static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
 165 {
 166         int err;
 167
 168         *p = paravirt_read_msr_safe(msr, &err);
 169         return err;
 170 }
 171
 172 static inline unsigned long long paravirt_sched_clock(void)
 173 {
 174         return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock);
 175 }
 176
 177 struct static_key;
 178 extern struct static_key paravirt_steal_enabled;
 179 extern struct static_key paravirt_steal_rq_enabled;
 180
 181 static inline u64 paravirt_steal_clock(int cpu)
 182 {
 183         return PVOP_CALL1(u64, pv_time_ops.steal_clock, cpu);
 184 }
 185
 186 static inline unsigned long long paravirt_read_pmc(int counter)
 187 {
 188         return PVOP_CALL1(u64, pv_cpu_ops.read_pmc, counter);
 189 }
 190
 191 #define rdpmc(counter, low, high)               \
 192 do {                                            \
 193         u64 _l = paravirt_read_pmc(counter);    \
 194         low = (u32)_l;                          \
 195         high = _l >> 32;                        \
 196 } while (0)
 197
 198 #define rdpmcl(counter, val) ((val) = paravirt_read_pmc(counter))
 199
 200 static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
 201 {
 202         PVOP_VCALL2(pv_cpu_ops.alloc_ldt, ldt, entries);
 203 }
 204
 205 static inline void paravirt_free_ldt(struct desc_struct *ldt, unsigned entries)
 206 {
 207         PVOP_VCALL2(pv_cpu_ops.free_ldt, ldt, entries);
 208 }
 209
 210 static inline void load_TR_desc(void)
 211 {
 212         PVOP_VCALL0(pv_cpu_ops.load_tr_desc);
 213 }
 214 static inline void load_gdt(const struct desc_ptr *dtr)
 215 {
 216         PVOP_VCALL1(pv_cpu_ops.load_gdt, dtr);
 217 }
 218 static inline void load_idt(const struct desc_ptr *dtr)
 219 {
 220         PVOP_VCALL1(pv_cpu_ops.load_idt, dtr);
 221 }
 222 static inline void set_ldt(const void *addr, unsigned entries)
 223 {
 224         PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries);
 225 }
 226 static inline unsigned long paravirt_store_tr(void)
 227 {
 228         return PVOP_CALL0(unsigned long, pv_cpu_ops.store_tr);
 229 }
 230 #define store_tr(tr)    ((tr) = paravirt_store_tr())
 231 static inline void load_TLS(struct thread_struct *t, unsigned cpu)
 232 {
 233         PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu);
 234 }
 235
 236 #ifdef CONFIG_X86_64
 237 static inline void load_gs_index(unsigned int gs)
 238 {
 239         PVOP_VCALL1(pv_cpu_ops.load_gs_index, gs);
 240 }
 241 #endif
 242
 243 static inline void write_ldt_entry(struct desc_struct *dt, int entry,
 244                                    const void *desc)
 245 {
 246         PVOP_VCALL3(pv_cpu_ops.write_ldt_entry, dt, entry, desc);
 247 }
 248
 249 static inline void write_gdt_entry(struct desc_struct *dt, int entry,
 250                                    void *desc, int type)
 251 {
 252         PVOP_VCALL4(pv_cpu_ops.write_gdt_entry, dt, entry, desc, type);
 253 }
 254
 255 static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
 256 {
 257         PVOP_VCALL3(pv_cpu_ops.write_idt_entry, dt, entry, g);
 258 }
 259 static inline void set_iopl_mask(unsigned mask)
 260 {
 261         PVOP_VCALL1(pv_cpu_ops.set_iopl_mask, mask);
 262 }
 263
 264 /* The paravirtualized I/O functions */
 265 static inline void slow_down_io(void)
 266 {
 267         pv_cpu_ops.io_delay();
 268 #ifdef REALLY_SLOW_IO
 269         pv_cpu_ops.io_delay();
 270         pv_cpu_ops.io_delay();
 271         pv_cpu_ops.io_delay();
 272 #endif
 273 }
 274
 275 static inline void paravirt_activate_mm(struct mm_struct *prev,
 276                                         struct mm_struct *next)
 277 {
 278         PVOP_VCALL2(pv_mmu_ops.activate_mm, prev, next);
 279 }
 280
 281 static inline void paravirt_arch_dup_mmap(struct mm_struct *oldmm,
 282                                           struct mm_struct *mm)
 283 {
 284         PVOP_VCALL2(pv_mmu_ops.dup_mmap, oldmm, mm);
 285 }
 286
 287 static inline void paravirt_arch_exit_mmap(struct mm_struct *mm)
 288 {
 289         PVOP_VCALL1(pv_mmu_ops.exit_mmap, mm);
 290 }
 291
 292 static inline void __flush_tlb(void)
 293 {
 294         PVOP_VCALL0(pv_mmu_ops.flush_tlb_user);
 295 }
 296 static inline void __flush_tlb_global(void)
 297 {
 298         PVOP_VCALL0(pv_mmu_ops.flush_tlb_kernel);
 299 }
 300 static inline void __flush_tlb_single(unsigned long addr)
 301 {
 302         PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr);
 303 }
 304
 305 static inline void flush_tlb_others(const struct cpumask *cpumask,
 306                                     const struct flush_tlb_info *info)
 307 {
 308         PVOP_VCALL2(pv_mmu_ops.flush_tlb_others, cpumask, info);
 309 }
 310
 311 static inline int paravirt_pgd_alloc(struct mm_struct *mm)
 312 {
 313         return PVOP_CALL1(int, pv_mmu_ops.pgd_alloc, mm);
 314 }
 315
 316 static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd)
 317 {
 318         PVOP_VCALL2(pv_mmu_ops.pgd_free, mm, pgd);
 319 }
 320
 321 static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned long pfn)
 322 {
 323         PVOP_VCALL2(pv_mmu_ops.alloc_pte, mm, pfn);
 324 }
 325 static inline void paravirt_release_pte(unsigned long pfn)
 326 {
 327         PVOP_VCALL1(pv_mmu_ops.release_pte, pfn);
 328 }
 329
 330 static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
 331 {
 332         PVOP_VCALL2(pv_mmu_ops.alloc_pmd, mm, pfn);
 333 }
 334
 335 static inline void paravirt_release_pmd(unsigned long pfn)
 336 {
 337         PVOP_VCALL1(pv_mmu_ops.release_pmd, pfn);
 338 }
 339
 340 static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned long pfn)
 341 {
 342         PVOP_VCALL2(pv_mmu_ops.alloc_pud, mm, pfn);
 343 }
 344 static inline void paravirt_release_pud(unsigned long pfn)
 345 {
 346         PVOP_VCALL1(pv_mmu_ops.release_pud, pfn);
 347 }
 348
 349 static inline void paravirt_alloc_p4d(struct mm_struct *mm, unsigned long pfn)
 350 {
 351         PVOP_VCALL2(pv_mmu_ops.alloc_p4d, mm, pfn);
 352 }
 353
 354 static inline void paravirt_release_p4d(unsigned long pfn)
 355 {
 356         PVOP_VCALL1(pv_mmu_ops.release_p4d, pfn);
 357 }
 358
 359 static inline pte_t __pte(pteval_t val)
 360 {
 361         pteval_t ret;
 362
 363         if (sizeof(pteval_t) > sizeof(long))
 364                 ret = PVOP_CALLEE2(pteval_t,
 365                                    pv_mmu_ops.make_pte,
 366                                    val, (u64)val >> 32);
 367         else
 368                 ret = PVOP_CALLEE1(pteval_t,
 369                                    pv_mmu_ops.make_pte,
 370                                    val);
 371
 372         return (pte_t) { .pte = ret };
 373 }
 374
 375 static inline pteval_t pte_val(pte_t pte)
 376 {
 377         pteval_t ret;
 378
 379         if (sizeof(pteval_t) > sizeof(long))
 380                 ret = PVOP_CALLEE2(pteval_t, pv_mmu_ops.pte_val,
 381                                    pte.pte, (u64)pte.pte >> 32);
 382         else
 383                 ret = PVOP_CALLEE1(pteval_t, pv_mmu_ops.pte_val,
 384                                    pte.pte);
 385
 386         return ret;
 387 }
 388
 389 static inline pgd_t __pgd(pgdval_t val)
 390 {
 391         pgdval_t ret;
 392
 393         if (sizeof(pgdval_t) > sizeof(long))
 394                 ret = PVOP_CALLEE2(pgdval_t, pv_mmu_ops.make_pgd,
 395                                    val, (u64)val >> 32);
 396         else
 397                 ret = PVOP_CALLEE1(pgdval_t, pv_mmu_ops.make_pgd,
 398                                    val);
 399
 400         return (pgd_t) { ret };
 401 }
 402
 403 static inline pgdval_t pgd_val(pgd_t pgd)
 404 {
 405         pgdval_t ret;
 406
 407         if (sizeof(pgdval_t) > sizeof(long))
 408                 ret =  PVOP_CALLEE2(pgdval_t, pv_mmu_ops.pgd_val,
 409                                     pgd.pgd, (u64)pgd.pgd >> 32);
 410         else
 411                 ret =  PVOP_CALLEE1(pgdval_t, pv_mmu_ops.pgd_val,
 412                                     pgd.pgd);
 413
 414         return ret;
 415 }
 416
 417 #define  __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
 418 static inline pte_t ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr,
 419                                            pte_t *ptep)
 420 {
 421         pteval_t ret;
 422
 423         ret = PVOP_CALL3(pteval_t, pv_mmu_ops.ptep_modify_prot_start,
 424                          mm, addr, ptep);
 425
 426         return (pte_t) { .pte = ret };
 427 }
 428
 429 static inline void ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
 430                                            pte_t *ptep, pte_t pte)
 431 {
 432         if (sizeof(pteval_t) > sizeof(long))
 433                 /* 5 arg words */
 434                 pv_mmu_ops.ptep_modify_prot_commit(mm, addr, ptep, pte);
 435         else
 436                 PVOP_VCALL4(pv_mmu_ops.ptep_modify_prot_commit,
 437                             mm, addr, ptep, pte.pte);
 438 }
 439
 440 static inline void set_pte(pte_t *ptep, pte_t pte)
 441 {
 442         if (sizeof(pteval_t) > sizeof(long))
 443                 PVOP_VCALL3(pv_mmu_ops.set_pte, ptep,
 444                             pte.pte, (u64)pte.pte >> 32);
 445         else
 446                 PVOP_VCALL2(pv_mmu_ops.set_pte, ptep,
 447                             pte.pte);
 448 }
 449
 450 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
 451                               pte_t *ptep, pte_t pte)
 452 {
 453         if (sizeof(pteval_t) > sizeof(long))
 454                 /* 5 arg words */
 455                 pv_mmu_ops.set_pte_at(mm, addr, ptep, pte);
 456         else
 457                 PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pte.pte);
 458 }
 459
 460 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
 461 {
 462         pmdval_t val = native_pmd_val(pmd);
 463
 464         if (sizeof(pmdval_t) > sizeof(long))
 465                 PVOP_VCALL3(pv_mmu_ops.set_pmd, pmdp, val, (u64)val >> 32);
 466         else
 467                 PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, val);
 468 }
 469
 470 #if CONFIG_PGTABLE_LEVELS >= 3
 471 static inline pmd_t __pmd(pmdval_t val)
 472 {
 473         pmdval_t ret;
 474
 475         if (sizeof(pmdval_t) > sizeof(long))
 476                 ret = PVOP_CALLEE2(pmdval_t, pv_mmu_ops.make_pmd,
 477                                    val, (u64)val >> 32);
 478         else
 479                 ret = PVOP_CALLEE1(pmdval_t, pv_mmu_ops.make_pmd,
 480                                    val);
 481
 482         return (pmd_t) { ret };
 483 }
 484
 485 static inline pmdval_t pmd_val(pmd_t pmd)
 486 {
 487         pmdval_t ret;
 488
 489         if (sizeof(pmdval_t) > sizeof(long))
 490                 ret =  PVOP_CALLEE2(pmdval_t, pv_mmu_ops.pmd_val,
 491                                     pmd.pmd, (u64)pmd.pmd >> 32);
 492         else
 493                 ret =  PVOP_CALLEE1(pmdval_t, pv_mmu_ops.pmd_val,
 494                                     pmd.pmd);
 495
 496         return ret;
 497 }
 498
 499 static inline void set_pud(pud_t *pudp, pud_t pud)
 500 {
 501         pudval_t val = native_pud_val(pud);
 502
 503         if (sizeof(pudval_t) > sizeof(long))
 504                 PVOP_VCALL3(pv_mmu_ops.set_pud, pudp,
 505                             val, (u64)val >> 32);
 506         else
 507                 PVOP_VCALL2(pv_mmu_ops.set_pud, pudp,
 508                             val);
 509 }
 510 #if CONFIG_PGTABLE_LEVELS >= 4
 511 static inline pud_t __pud(pudval_t val)
 512 {
 513         pudval_t ret;
 514
 515         if (sizeof(pudval_t) > sizeof(long))
 516                 ret = PVOP_CALLEE2(pudval_t, pv_mmu_ops.make_pud,
 517                                    val, (u64)val >> 32);
 518         else
 519                 ret = PVOP_CALLEE1(pudval_t, pv_mmu_ops.make_pud,
 520                                    val);
 521
 522         return (pud_t) { ret };
 523 }
 524
 525 static inline pudval_t pud_val(pud_t pud)
 526 {
 527         pudval_t ret;
 528
 529         if (sizeof(pudval_t) > sizeof(long))
 530                 ret =  PVOP_CALLEE2(pudval_t, pv_mmu_ops.pud_val,
 531                                     pud.pud, (u64)pud.pud >> 32);
 532         else
 533                 ret =  PVOP_CALLEE1(pudval_t, pv_mmu_ops.pud_val,
 534                                     pud.pud);
 535
 536         return ret;
 537 }
 538
 539 static inline void pud_clear(pud_t *pudp)
 540 {
 541         set_pud(pudp, __pud(0));
 542 }
 543
 544 static inline void set_p4d(p4d_t *p4dp, p4d_t p4d)
 545 {
 546         p4dval_t val = native_p4d_val(p4d);
 547
 548         if (sizeof(p4dval_t) > sizeof(long))
 549                 PVOP_VCALL3(pv_mmu_ops.set_p4d, p4dp,
 550                             val, (u64)val >> 32);
 551         else
 552                 PVOP_VCALL2(pv_mmu_ops.set_p4d, p4dp,
 553                             val);
 554 }
 555
 556 #if CONFIG_PGTABLE_LEVELS >= 5
 557
 558 static inline p4d_t __p4d(p4dval_t val)
 559 {
 560         p4dval_t ret = PVOP_CALLEE1(p4dval_t, pv_mmu_ops.make_p4d, val);
 561
 562         return (p4d_t) { ret };
 563 }
 564
 565 static inline p4dval_t p4d_val(p4d_t p4d)
 566 {
 567         return PVOP_CALLEE1(p4dval_t, pv_mmu_ops.p4d_val, p4d.p4d);
 568 }
 569
 570 static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
 571 {
 572         pgdval_t val = native_pgd_val(pgd);
 573
 574         PVOP_VCALL2(pv_mmu_ops.set_pgd, pgdp, val);
 575 }
 576
 577 static inline void pgd_clear(pgd_t *pgdp)
 578 {
 579         set_pgd(pgdp, __pgd(0));
 580 }
 581
 582 #endif  /* CONFIG_PGTABLE_LEVELS == 5 */
 583
 584 static inline void p4d_clear(p4d_t *p4dp)
 585 {
 586         set_p4d(p4dp, __p4d(0));
 587 }
 588
 589 #endif  /* CONFIG_PGTABLE_LEVELS == 4 */
 590
 591 #endif  /* CONFIG_PGTABLE_LEVELS >= 3 */
 592
 593 #ifdef CONFIG_X86_PAE
 594 /* Special-case pte-setting operations for PAE, which can't update a
 595    64-bit pte atomically */
 596 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
 597 {
 598         PVOP_VCALL3(pv_mmu_ops.set_pte_atomic, ptep,
 599                     pte.pte, pte.pte >> 32);
 600 }
 601
 602 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
 603                              pte_t *ptep)
 604 {
 605         PVOP_VCALL3(pv_mmu_ops.pte_clear, mm, addr, ptep);
 606 }
 607
 608 static inline void pmd_clear(pmd_t *pmdp)
 609 {
 610         PVOP_VCALL1(pv_mmu_ops.pmd_clear, pmdp);
 611 }
 612 #else  /* !CONFIG_X86_PAE */
 613 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
 614 {
 615         set_pte(ptep, pte);
 616 }
 617
 618 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
 619                              pte_t *ptep)
 620 {
 621         set_pte_at(mm, addr, ptep, __pte(0));
 622 }
 623
 624 static inline void pmd_clear(pmd_t *pmdp)
 625 {
 626         set_pmd(pmdp, __pmd(0));
 627 }
 628 #endif  /* CONFIG_X86_PAE */
 629
 630 #define  __HAVE_ARCH_START_CONTEXT_SWITCH
 631 static inline void arch_start_context_switch(struct task_struct *prev)
 632 {
 633         PVOP_VCALL1(pv_cpu_ops.start_context_switch, prev);
 634 }
 635
 636 static inline void arch_end_context_switch(struct task_struct *next)
 637 {
 638         PVOP_VCALL1(pv_cpu_ops.end_context_switch, next);
 639 }
 640
 641 #define  __HAVE_ARCH_ENTER_LAZY_MMU_MODE
 642 static inline void arch_enter_lazy_mmu_mode(void)
 643 {
 644         PVOP_VCALL0(pv_mmu_ops.lazy_mode.enter);
 645 }
 646
 647 static inline void arch_leave_lazy_mmu_mode(void)
 648 {
 649         PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave);
 650 }
 651
 652 static inline void arch_flush_lazy_mmu_mode(void)
 653 {
 654         PVOP_VCALL0(pv_mmu_ops.lazy_mode.flush);
 655 }
 656
 657 static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
 658                                 phys_addr_t phys, pgprot_t flags)
 659 {
 660         pv_mmu_ops.set_fixmap(idx, phys, flags);
 661 }
 662
 663 #if defined(CONFIG_SMP) && defined(CONFIG_PARAVIRT_SPINLOCKS)
 664
 665 static __always_inline void pv_queued_spin_lock_slowpath(struct qspinlock *lock,
 666                                                         u32 val)
 667 {
 668         PVOP_VCALL2(pv_lock_ops.queued_spin_lock_slowpath, lock, val);
 669 }
 670
 671 static __always_inline void pv_queued_spin_unlock(struct qspinlock *lock)
 672 {
 673         PVOP_VCALLEE1(pv_lock_ops.queued_spin_unlock, lock);
 674 }
 675
 676 static __always_inline void pv_wait(u8 *ptr, u8 val)
 677 {
 678         PVOP_VCALL2(pv_lock_ops.wait, ptr, val);
 679 }
 680
 681 static __always_inline void pv_kick(int cpu)
 682 {
 683         PVOP_VCALL1(pv_lock_ops.kick, cpu);
 684 }
 685
 686 static __always_inline bool pv_vcpu_is_preempted(long cpu)
 687 {
 688         return PVOP_CALLEE1(bool, pv_lock_ops.vcpu_is_preempted, cpu);
 689 }
 690
 691 #endif /* SMP && PARAVIRT_SPINLOCKS */
 692
 693 #ifdef CONFIG_X86_32
 694 #define PV_SAVE_REGS "pushl %ecx; pushl %edx;"
 695 #define PV_RESTORE_REGS "popl %edx; popl %ecx;"
 696
 697 /* save and restore all caller-save registers, except return value */
 698 #define PV_SAVE_ALL_CALLER_REGS         "pushl %ecx;"
 699 #define PV_RESTORE_ALL_CALLER_REGS      "popl  %ecx;"
 700
 701 #define PV_FLAGS_ARG "0"
 702 #define PV_EXTRA_CLOBBERS
 703 #define PV_VEXTRA_CLOBBERS
 704 #else
 705 /* save and restore all caller-save registers, except return value */
 706 #define PV_SAVE_ALL_CALLER_REGS                                         \
 707         "push %rcx;"                                                    \
 708         "push %rdx;"                                                    \
 709         "push %rsi;"                                                    \
 710         "push %rdi;"                                                    \
 711         "push %r8;"                                                     \
 712         "push %r9;"                                                     \
 713         "push %r10;"                                                    \
 714         "push %r11;"
 715 #define PV_RESTORE_ALL_CALLER_REGS                                      \
 716         "pop %r11;"                                                     \
 717         "pop %r10;"                                                     \
 718         "pop %r9;"                                                      \
 719         "pop %r8;"                                                      \
 720         "pop %rdi;"                                                     \
 721         "pop %rsi;"                                                     \
 722         "pop %rdx;"                                                     \
 723         "pop %rcx;"
 724
 725 /* We save some registers, but all of them, that's too much. We clobber all
 726  * caller saved registers but the argument parameter */
 727 #define PV_SAVE_REGS "pushq %%rdi;"
 728 #define PV_RESTORE_REGS "popq %%rdi;"
 729 #define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx", "rsi"
 730 #define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx", "rsi"
 731 #define PV_FLAGS_ARG "D"
 732 #endif
 733
 734 /*
 735  * Generate a thunk around a function which saves all caller-save
 736  * registers except for the return value.  This allows C functions to
 737  * be called from assembler code where fewer than normal registers are
 738  * available.  It may also help code generation around calls from C
 739  * code if the common case doesn't use many registers.
 740  *
 741  * When a callee is wrapped in a thunk, the caller can assume that all
 742  * arg regs and all scratch registers are preserved across the
 743  * call. The return value in rax/eax will not be saved, even for void
 744  * functions.
 745  */
 746 #define PV_THUNK_NAME(func) "__raw_callee_save_" #func
 747 #define PV_CALLEE_SAVE_REGS_THUNK(func)                                 \
 748         extern typeof(func) __raw_callee_save_##func;                   \
 749                                                                         \
 750         asm(".pushsection .text;"                                       \
 751             ".globl " PV_THUNK_NAME(func) ";"                           \
 752             ".type " PV_THUNK_NAME(func) ", @function;"                 \
 753             PV_THUNK_NAME(func) ":"                                     \
 754             FRAME_BEGIN                                                 \
 755             PV_SAVE_ALL_CALLER_REGS                                     \
 756             "call " #func ";"                                           \
 757             PV_RESTORE_ALL_CALLER_REGS                                  \
 758             FRAME_END                                                   \
 759             "ret;"                                                      \
 760             ".popsection")
 761
 762 /* Get a reference to a callee-save function */
 763 #define PV_CALLEE_SAVE(func)                                            \
 764         ((struct paravirt_callee_save) { __raw_callee_save_##func })
 765
 766 /* Promise that "func" already uses the right calling convention */
 767 #define __PV_IS_CALLEE_SAVE(func)                       \
 768         ((struct paravirt_callee_save) { func })
 769
 770 static inline notrace unsigned long arch_local_save_flags(void)
 771 {
 772         return PVOP_CALLEE0(unsigned long, pv_irq_ops.save_fl);
 773 }
 774
 775 static inline notrace void arch_local_irq_restore(unsigned long f)
 776 {
 777         PVOP_VCALLEE1(pv_irq_ops.restore_fl, f);
 778 }
 779
 780 static inline notrace void arch_local_irq_disable(void)
 781 {
 782         PVOP_VCALLEE0(pv_irq_ops.irq_disable);
 783 }
 784
 785 static inline notrace void arch_local_irq_enable(void)
 786 {
 787         PVOP_VCALLEE0(pv_irq_ops.irq_enable);
 788 }
 789
 790 static inline notrace unsigned long arch_local_irq_save(void)
 791 {
 792         unsigned long f;
 793
 794         f = arch_local_save_flags();
 795         arch_local_irq_disable();
 796         return f;
 797 }
 798
 799
 800 /* Make sure as little as possible of this mess escapes. */
 801 #undef PARAVIRT_CALL
 802 #undef __PVOP_CALL
 803 #undef __PVOP_VCALL
 804 #undef PVOP_VCALL0
 805 #undef PVOP_CALL0
 806 #undef PVOP_VCALL1
 807 #undef PVOP_CALL1
 808 #undef PVOP_VCALL2
 809 #undef PVOP_CALL2
 810 #undef PVOP_VCALL3
 811 #undef PVOP_CALL3
 812 #undef PVOP_VCALL4
 813 #undef PVOP_CALL4
 814
 815 extern void default_banner(void);
 816
 817 #else  /* __ASSEMBLY__ */
 818
 819 #define _PVSITE(ptype, clobbers, ops, word, algn)       \
 820 771:;                                           \
 821         ops;                                    \
 822 772:;                                           \
 823         .pushsection .parainstructions,"a";     \
 824          .align algn;                           \
 825          word 771b;                             \
 826          .byte ptype;                           \
 827          .byte 772b-771b;                       \
 828          .short clobbers;                       \
 829         .popsection
 830
 831
 832 #define COND_PUSH(set, mask, reg)                       \
 833         .if ((~(set)) & mask); push %reg; .endif
 834 #define COND_POP(set, mask, reg)                        \
 835         .if ((~(set)) & mask); pop %reg; .endif
 836
 837 #ifdef CONFIG_X86_64
 838
 839 #define PV_SAVE_REGS(set)                       \
 840         COND_PUSH(set, CLBR_RAX, rax);          \
 841         COND_PUSH(set, CLBR_RCX, rcx);          \
 842         COND_PUSH(set, CLBR_RDX, rdx);          \
 843         COND_PUSH(set, CLBR_RSI, rsi);          \
 844         COND_PUSH(set, CLBR_RDI, rdi);          \
 845         COND_PUSH(set, CLBR_R8, r8);            \
 846         COND_PUSH(set, CLBR_R9, r9);            \
 847         COND_PUSH(set, CLBR_R10, r10);          \
 848         COND_PUSH(set, CLBR_R11, r11)
 849 #define PV_RESTORE_REGS(set)                    \
 850         COND_POP(set, CLBR_R11, r11);           \
 851         COND_POP(set, CLBR_R10, r10);           \
 852         COND_POP(set, CLBR_R9, r9);             \
 853         COND_POP(set, CLBR_R8, r8);             \
 854         COND_POP(set, CLBR_RDI, rdi);           \
 855         COND_POP(set, CLBR_RSI, rsi);           \
 856         COND_POP(set, CLBR_RDX, rdx);           \
 857         COND_POP(set, CLBR_RCX, rcx);           \
 858         COND_POP(set, CLBR_RAX, rax)
 859
 860 #define PARA_PATCH(struct, off)        ((PARAVIRT_PATCH_##struct + (off)) / 8)
 861 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
 862 #define PARA_INDIRECT(addr)     *addr(%rip)
 863 #else
 864 #define PV_SAVE_REGS(set)                       \
 865         COND_PUSH(set, CLBR_EAX, eax);          \
 866         COND_PUSH(set, CLBR_EDI, edi);          \
 867         COND_PUSH(set, CLBR_ECX, ecx);          \
 868         COND_PUSH(set, CLBR_EDX, edx)
 869 #define PV_RESTORE_REGS(set)                    \
 870         COND_POP(set, CLBR_EDX, edx);           \
 871         COND_POP(set, CLBR_ECX, ecx);           \
 872         COND_POP(set, CLBR_EDI, edi);           \
 873         COND_POP(set, CLBR_EAX, eax)
 874
 875 #define PARA_PATCH(struct, off)        ((PARAVIRT_PATCH_##struct + (off)) / 4)
 876 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
 877 #define PARA_INDIRECT(addr)     *%cs:addr
 878 #endif
 879
 880 #define INTERRUPT_RETURN                                                \
 881         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE,       \
 882                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_iret))
 883
 884 #define DISABLE_INTERRUPTS(clobbers)                                    \
 885         PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
 886                   PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE);            \
 887                   call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable);    \
 888                   PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
 889
 890 #define ENABLE_INTERRUPTS(clobbers)                                     \
 891         PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers,  \
 892                   PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE);            \
 893                   call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable);     \
 894                   PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
 895
 896 #ifdef CONFIG_X86_32
 897 #define GET_CR0_INTO_EAX                                \
 898         push %ecx; push %edx;                           \
 899         call PARA_INDIRECT(pv_cpu_ops+PV_CPU_read_cr0); \
 900         pop %edx; pop %ecx
 901 #else   /* !CONFIG_X86_32 */
 902
 903 /*
 904  * If swapgs is used while the userspace stack is still current,
 905  * there's no way to call a pvop.  The PV replacement *must* be
 906  * inlined, or the swapgs instruction must be trapped and emulated.
 907  */
 908 #define SWAPGS_UNSAFE_STACK                                             \
 909         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE,     \
 910                   swapgs)
 911
 912 /*
 913  * Note: swapgs is very special, and in practise is either going to be
 914  * implemented with a single "swapgs" instruction or something very
 915  * special.  Either way, we don't need to save any registers for
 916  * it.
 917  */
 918 #define SWAPGS                                                          \
 919         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE,     \
 920                   call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs)          \
 921                  )
 922
 923 #define GET_CR2_INTO_RAX                                \
 924         call PARA_INDIRECT(pv_mmu_ops+PV_MMU_read_cr2)
 925
 926 #define USERGS_SYSRET64                                                 \
 927         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret64),       \
 928                   CLBR_NONE,                                            \
 929                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret64))
 930 #endif  /* CONFIG_X86_32 */
 931
 932 #endif /* __ASSEMBLY__ */
 933 #else  /* CONFIG_PARAVIRT */
 934 # define default_banner x86_init_noop
 935 #ifndef __ASSEMBLY__
 936 static inline void paravirt_arch_dup_mmap(struct mm_struct *oldmm,
 937                                           struct mm_struct *mm)
 938 {
 939 }
 940
 941 static inline void paravirt_arch_exit_mmap(struct mm_struct *mm)
 942 {
 943 }
 944 #endif /* __ASSEMBLY__ */
 945 #endif /* !CONFIG_PARAVIRT */
 946 #endif /* _ASM_X86_PARAVIRT_H */