1 #ifndef _ASM_X86_MPSPEC_H
2 #define _ASM_X86_MPSPEC_H
4 #include <linux/init.h>
6 #include <asm/mpspec_def.h>
8 extern int apic_version[MAX_APICS];
14 * Summit or generic (i.e. installer) kernels need lots of bus entries.
15 * Maximum 256 PCI busses, plus 1 ISA bus in each of 4 cabinets.
17 #if CONFIG_BASE_SMALL == 0
18 # define MAX_MP_BUSSES 260
20 # define MAX_MP_BUSSES 32
23 #define MAX_IRQ_SOURCES 256
25 extern unsigned int def_to_bigsmp;
26 extern u8 apicid_2_node[];
28 #ifdef CONFIG_X86_NUMAQ
29 extern int mp_bus_id_to_node[MAX_MP_BUSSES];
30 extern int mp_bus_id_to_local[MAX_MP_BUSSES];
31 extern int quad_local_to_mp_bus_id [NR_CPUS/4][4];
34 #define MAX_APICID 256
36 #else /* CONFIG_X86_64: */
38 #define MAX_MP_BUSSES 256
39 /* Each PCI slot may be a combo card with its own bus. 4 IRQ pins per slot. */
40 #define MAX_IRQ_SOURCES (MAX_MP_BUSSES * 4)
42 #endif /* CONFIG_X86_64 */
44 extern void early_find_smp_config(void);
45 extern void early_get_smp_config(void);
47 #if defined(CONFIG_MCA) || defined(CONFIG_EISA)
48 extern int mp_bus_id_to_type[MAX_MP_BUSSES];
51 extern DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES);
53 extern unsigned int boot_cpu_physical_apicid;
54 extern unsigned int max_physical_apicid;
55 extern int smp_found_config;
56 extern int mpc_default_type;
57 extern unsigned long mp_lapic_addr;
59 extern void get_smp_config(void);
61 #ifdef CONFIG_X86_MPPARSE
62 extern void find_smp_config(void);
63 extern void early_reserve_e820_mpc_new(void);
65 static inline void find_smp_config(void) { }
66 static inline void early_reserve_e820_mpc_new(void) { }
69 void __cpuinit generic_processor_info(int apicid, int version);
71 extern void mp_register_ioapic(int id, u32 address, u32 gsi_base);
72 extern void mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger,
74 extern void mp_config_acpi_legacy_irqs(void);
76 extern int mp_register_gsi(struct device *dev, u32 gsi, int edge_level,
78 extern int acpi_probe_gsi(void);
79 #ifdef CONFIG_X86_IO_APIC
80 extern int mp_find_ioapic(int gsi);
81 extern int mp_find_ioapic_pin(int ioapic, int gsi);
83 #else /* !CONFIG_ACPI: */
84 static inline int acpi_probe_gsi(void)
88 #endif /* CONFIG_ACPI */
90 #ifdef CONFIG_X86_MPPARSE
91 extern int enable_update_mptable;
93 static inline int enable_update_mptable(void)
99 #define PHYSID_ARRAY_SIZE BITS_TO_LONGS(MAX_APICS)
102 unsigned long mask[PHYSID_ARRAY_SIZE];
105 typedef struct physid_mask physid_mask_t;
107 #define physid_set(physid, map) set_bit(physid, (map).mask)
108 #define physid_clear(physid, map) clear_bit(physid, (map).mask)
109 #define physid_isset(physid, map) test_bit(physid, (map).mask)
110 #define physid_test_and_set(physid, map) \
111 test_and_set_bit(physid, (map).mask)
113 #define physids_and(dst, src1, src2) \
114 bitmap_and((dst).mask, (src1).mask, (src2).mask, MAX_APICS)
116 #define physids_or(dst, src1, src2) \
117 bitmap_or((dst).mask, (src1).mask, (src2).mask, MAX_APICS)
119 #define physids_clear(map) \
120 bitmap_zero((map).mask, MAX_APICS)
122 #define physids_complement(dst, src) \
123 bitmap_complement((dst).mask, (src).mask, MAX_APICS)
125 #define physids_empty(map) \
126 bitmap_empty((map).mask, MAX_APICS)
128 #define physids_equal(map1, map2) \
129 bitmap_equal((map1).mask, (map2).mask, MAX_APICS)
131 #define physids_weight(map) \
132 bitmap_weight((map).mask, MAX_APICS)
134 #define physids_shift_right(d, s, n) \
135 bitmap_shift_right((d).mask, (s).mask, n, MAX_APICS)
137 #define physids_shift_left(d, s, n) \
138 bitmap_shift_left((d).mask, (s).mask, n, MAX_APICS)
140 #define physids_coerce(map) ((map).mask[0])
142 #define physids_promote(physids) \
144 physid_mask_t __physid_mask = PHYSID_MASK_NONE; \
145 __physid_mask.mask[0] = physids; \
149 /* Note: will create very large stack frames if physid_mask_t is big */
150 #define physid_mask_of_physid(physid) \
152 physid_mask_t __physid_mask = PHYSID_MASK_NONE; \
153 physid_set(physid, __physid_mask); \
157 static inline void physid_set_mask_of_physid(int physid, physid_mask_t *map)
160 physid_set(physid, *map);
163 #define PHYSID_MASK_ALL { {[0 ... PHYSID_ARRAY_SIZE-1] = ~0UL} }
164 #define PHYSID_MASK_NONE { {[0 ... PHYSID_ARRAY_SIZE-1] = 0UL} }
166 extern physid_mask_t phys_cpu_present_map;
168 extern int generic_mps_oem_check(struct mpc_table *, char *, char *);
170 extern int default_acpi_madt_oem_check(char *, char *);
172 #endif /* _ASM_X86_MPSPEC_H */