Merge remote-tracking branches 'asoc/topic/wm9712', 'asoc/topic/wm9713' and 'asoc...
[sfrench/cifs-2.6.git] / arch / x86 / include / asm / intel-family.h
1 #ifndef _ASM_X86_INTEL_FAMILY_H
2 #define _ASM_X86_INTEL_FAMILY_H
3
4 /*
5  * "Big Core" Processors (Branded as Core, Xeon, etc...)
6  *
7  * The "_X" parts are generally the EP and EX Xeons, or the
8  * "Extreme" ones, like Broadwell-E.
9  *
10  * Things ending in "2" are usually because we have no better
11  * name for them.  There's no processor called "SILVERMONT2".
12  */
13
14 #define INTEL_FAM6_CORE_YONAH           0x0E
15 #define INTEL_FAM6_CORE2_MEROM          0x0F
16 #define INTEL_FAM6_CORE2_MEROM_L        0x16
17 #define INTEL_FAM6_CORE2_PENRYN         0x17
18 #define INTEL_FAM6_CORE2_DUNNINGTON     0x1D
19
20 #define INTEL_FAM6_NEHALEM              0x1E
21 #define INTEL_FAM6_NEHALEM_G            0x1F /* Auburndale / Havendale */
22 #define INTEL_FAM6_NEHALEM_EP           0x1A
23 #define INTEL_FAM6_NEHALEM_EX           0x2E
24 #define INTEL_FAM6_WESTMERE             0x25
25 #define INTEL_FAM6_WESTMERE_EP          0x2C
26 #define INTEL_FAM6_WESTMERE_EX          0x2F
27
28 #define INTEL_FAM6_SANDYBRIDGE          0x2A
29 #define INTEL_FAM6_SANDYBRIDGE_X        0x2D
30 #define INTEL_FAM6_IVYBRIDGE            0x3A
31 #define INTEL_FAM6_IVYBRIDGE_X          0x3E
32
33 #define INTEL_FAM6_HASWELL_CORE         0x3C
34 #define INTEL_FAM6_HASWELL_X            0x3F
35 #define INTEL_FAM6_HASWELL_ULT          0x45
36 #define INTEL_FAM6_HASWELL_GT3E         0x46
37
38 #define INTEL_FAM6_BROADWELL_CORE       0x3D
39 #define INTEL_FAM6_BROADWELL_XEON_D     0x56
40 #define INTEL_FAM6_BROADWELL_GT3E       0x47
41 #define INTEL_FAM6_BROADWELL_X          0x4F
42
43 #define INTEL_FAM6_SKYLAKE_MOBILE       0x4E
44 #define INTEL_FAM6_SKYLAKE_DESKTOP      0x5E
45 #define INTEL_FAM6_SKYLAKE_X            0x55
46 #define INTEL_FAM6_KABYLAKE_MOBILE      0x8E
47 #define INTEL_FAM6_KABYLAKE_DESKTOP     0x9E
48
49 /* "Small Core" Processors (Atom) */
50
51 #define INTEL_FAM6_ATOM_PINEVIEW        0x1C
52 #define INTEL_FAM6_ATOM_LINCROFT        0x26
53 #define INTEL_FAM6_ATOM_PENWELL         0x27
54 #define INTEL_FAM6_ATOM_CLOVERVIEW      0x35
55 #define INTEL_FAM6_ATOM_CEDARVIEW       0x36
56 #define INTEL_FAM6_ATOM_SILVERMONT1     0x37 /* BayTrail/BYT / Valleyview */
57 #define INTEL_FAM6_ATOM_SILVERMONT2     0x4D /* Avaton/Rangely */
58 #define INTEL_FAM6_ATOM_AIRMONT         0x4C /* CherryTrail / Braswell */
59 #define INTEL_FAM6_ATOM_MERRIFIELD      0x4A /* Tangier */
60 #define INTEL_FAM6_ATOM_MOOREFIELD      0x5A /* Annidale */
61 #define INTEL_FAM6_ATOM_GOLDMONT        0x5C
62 #define INTEL_FAM6_ATOM_DENVERTON       0x5F /* Goldmont Microserver */
63
64 /* Xeon Phi */
65
66 #define INTEL_FAM6_XEON_PHI_KNL         0x57 /* Knights Landing */
67 #define INTEL_FAM6_XEON_PHI_KNM         0x85 /* Knights Mill */
68
69 #endif /* _ASM_X86_INTEL_FAMILY_H */