1 #ifndef _ASM_X86_APIC_H
2 #define _ASM_X86_APIC_H
4 #include <linux/cpumask.h>
6 #include <asm/alternative.h>
7 #include <asm/cpufeature.h>
8 #include <asm/apicdef.h>
9 #include <linux/atomic.h>
10 #include <asm/fixmap.h>
11 #include <asm/mpspec.h>
14 #define ARCH_APICTIMER_STOPS_ON_C3 1
20 #define APIC_VERBOSE 1
23 /* Macros for apic_extnmi which controls external NMI masking */
24 #define APIC_EXTNMI_BSP 0 /* Default */
25 #define APIC_EXTNMI_ALL 1
26 #define APIC_EXTNMI_NONE 2
29 * Define the default level of output to be very little
30 * This can be turned up by using apic=verbose for more
31 * information and apic=debug for _lots_ of information.
32 * apic_verbosity is defined in apic.c
34 #define apic_printk(v, s, a...) do { \
35 if ((v) <= apic_verbosity) \
40 #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
41 extern void generic_apic_probe(void);
43 static inline void generic_apic_probe(void)
48 #ifdef CONFIG_X86_LOCAL_APIC
50 extern unsigned int apic_verbosity;
51 extern int local_apic_timer_c2_ok;
53 extern int disable_apic;
54 extern unsigned int lapic_timer_frequency;
56 extern enum apic_intr_mode_id apic_intr_mode;
57 enum apic_intr_mode_id {
60 APIC_VIRTUAL_WIRE_NO_CONFIG,
62 APIC_SYMMETRIC_IO_NO_ROUTING
66 extern void __inquire_remote_apic(int apicid);
67 #else /* CONFIG_SMP */
68 static inline void __inquire_remote_apic(int apicid)
71 #endif /* CONFIG_SMP */
73 static inline void default_inquire_remote_apic(int apicid)
75 if (apic_verbosity >= APIC_DEBUG)
76 __inquire_remote_apic(apicid);
80 * With 82489DX we can't rely on apic feature bit
81 * retrieved via cpuid but still have to deal with
82 * such an apic chip so we assume that SMP configuration
83 * is found from MP table (64bit case uses ACPI mostly
84 * which set smp presence flag as well so we are safe
85 * to use this helper too).
87 static inline bool apic_from_smp_config(void)
89 return smp_found_config && !disable_apic;
93 * Basic functions accessing APICs.
95 #ifdef CONFIG_PARAVIRT
96 #include <asm/paravirt.h>
99 extern int setup_profiling_timer(unsigned int);
101 static inline void native_apic_mem_write(u32 reg, u32 v)
103 volatile u32 *addr = (volatile u32 *)(APIC_BASE + reg);
105 alternative_io("movl %0, %P1", "xchgl %0, %P1", X86_BUG_11AP,
106 ASM_OUTPUT2("=r" (v), "=m" (*addr)),
107 ASM_OUTPUT2("0" (v), "m" (*addr)));
110 static inline u32 native_apic_mem_read(u32 reg)
112 return *((volatile u32 *)(APIC_BASE + reg));
115 extern void native_apic_wait_icr_idle(void);
116 extern u32 native_safe_apic_wait_icr_idle(void);
117 extern void native_apic_icr_write(u32 low, u32 id);
118 extern u64 native_apic_icr_read(void);
120 static inline bool apic_is_x2apic_enabled(void)
124 if (rdmsrl_safe(MSR_IA32_APICBASE, &msr))
126 return msr & X2APIC_ENABLE;
129 extern void enable_IR_x2apic(void);
131 extern int get_physical_broadcast(void);
133 extern int lapic_get_maxlvt(void);
134 extern void clear_local_APIC(void);
135 extern void disconnect_bsp_APIC(int virt_wire_setup);
136 extern void disable_local_APIC(void);
137 extern void lapic_shutdown(void);
138 extern void sync_Arb_IDs(void);
139 extern void apic_intr_mode_init(void);
140 extern void setup_local_APIC(void);
141 extern void init_apic_mappings(void);
142 void register_lapic_address(unsigned long address);
143 extern void setup_boot_APIC_clock(void);
144 extern void setup_secondary_APIC_clock(void);
145 extern void lapic_update_tsc_freq(void);
148 static inline int apic_force_enable(unsigned long addr)
153 extern int apic_force_enable(unsigned long addr);
156 extern void apic_bsp_setup(bool upmode);
157 extern void apic_ap_setup(void);
160 * On 32bit this is mach-xxx local
163 extern int apic_is_clustered_box(void);
165 static inline int apic_is_clustered_box(void)
171 extern int setup_APIC_eilvt(u8 lvt_off, u8 vector, u8 msg_type, u8 mask);
172 extern void lapic_assign_system_vectors(void);
173 extern void lapic_assign_legacy_vector(unsigned int isairq, bool replace);
174 extern void lapic_online(void);
175 extern void lapic_offline(void);
177 #else /* !CONFIG_X86_LOCAL_APIC */
178 static inline void lapic_shutdown(void) { }
179 #define local_apic_timer_c2_ok 1
180 static inline void init_apic_mappings(void) { }
181 static inline void disable_local_APIC(void) { }
182 # define setup_boot_APIC_clock x86_init_noop
183 # define setup_secondary_APIC_clock x86_init_noop
184 static inline void lapic_update_tsc_freq(void) { }
185 static inline void apic_intr_mode_init(void) { }
186 static inline void lapic_assign_system_vectors(void) { }
187 static inline void lapic_assign_legacy_vector(unsigned int i, bool r) { }
188 #endif /* !CONFIG_X86_LOCAL_APIC */
190 #ifdef CONFIG_X86_X2APIC
192 * Make previous memory operations globally visible before
193 * sending the IPI through x2apic wrmsr. We need a serializing instruction or
196 static inline void x2apic_wrmsr_fence(void)
198 asm volatile("mfence" : : : "memory");
201 static inline void native_apic_msr_write(u32 reg, u32 v)
203 if (reg == APIC_DFR || reg == APIC_ID || reg == APIC_LDR ||
207 wrmsr(APIC_BASE_MSR + (reg >> 4), v, 0);
210 static inline void native_apic_msr_eoi_write(u32 reg, u32 v)
212 __wrmsr(APIC_BASE_MSR + (APIC_EOI >> 4), APIC_EOI_ACK, 0);
215 static inline u32 native_apic_msr_read(u32 reg)
222 rdmsrl(APIC_BASE_MSR + (reg >> 4), msr);
226 static inline void native_x2apic_wait_icr_idle(void)
228 /* no need to wait for icr idle in x2apic */
232 static inline u32 native_safe_x2apic_wait_icr_idle(void)
234 /* no need to wait for icr idle in x2apic */
238 static inline void native_x2apic_icr_write(u32 low, u32 id)
240 wrmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), ((__u64) id) << 32 | low);
243 static inline u64 native_x2apic_icr_read(void)
247 rdmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), val);
251 extern int x2apic_mode;
252 extern int x2apic_phys;
253 extern void __init check_x2apic(void);
254 extern void x2apic_setup(void);
255 static inline int x2apic_enabled(void)
257 return boot_cpu_has(X86_FEATURE_X2APIC) && apic_is_x2apic_enabled();
260 #define x2apic_supported() (boot_cpu_has(X86_FEATURE_X2APIC))
261 #else /* !CONFIG_X86_X2APIC */
262 static inline void check_x2apic(void) { }
263 static inline void x2apic_setup(void) { }
264 static inline int x2apic_enabled(void) { return 0; }
266 #define x2apic_mode (0)
267 #define x2apic_supported() (0)
268 #endif /* !CONFIG_X86_X2APIC */
273 * Copyright 2004 James Cleverdon, IBM.
274 * Subject to the GNU Public License, v.2
276 * Generic APIC sub-arch data struct.
278 * Hacked for x86-64 by James Cleverdon from i386 architecture code by
279 * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and
283 /* Hotpath functions first */
284 void (*eoi_write)(u32 reg, u32 v);
285 void (*native_eoi_write)(u32 reg, u32 v);
286 void (*write)(u32 reg, u32 v);
287 u32 (*read)(u32 reg);
289 /* IPI related functions */
290 void (*wait_icr_idle)(void);
291 u32 (*safe_wait_icr_idle)(void);
293 void (*send_IPI)(int cpu, int vector);
294 void (*send_IPI_mask)(const struct cpumask *mask, int vector);
295 void (*send_IPI_mask_allbutself)(const struct cpumask *msk, int vec);
296 void (*send_IPI_allbutself)(int vector);
297 void (*send_IPI_all)(int vector);
298 void (*send_IPI_self)(int vector);
300 /* dest_logical is used by the IPI functions */
303 u32 irq_delivery_mode;
306 /* Functions and data related to vector allocation */
307 void (*vector_allocation_domain)(int cpu, struct cpumask *retmask,
308 const struct cpumask *mask);
309 int (*cpu_mask_to_apicid)(const struct cpumask *cpumask,
310 struct irq_data *irqdata,
311 unsigned int *apicid);
312 u32 (*calc_dest_apicid)(unsigned int cpu);
314 /* ICR related functions */
315 u64 (*icr_read)(void);
316 void (*icr_write)(u32 low, u32 high);
318 /* Probe, setup and smpboot functions */
320 int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id);
321 int (*apic_id_valid)(int apicid);
322 int (*apic_id_registered)(void);
324 bool (*check_apicid_used)(physid_mask_t *map, int apicid);
325 void (*init_apic_ldr)(void);
326 void (*ioapic_phys_id_map)(physid_mask_t *phys_map, physid_mask_t *retmap);
327 void (*setup_apic_routing)(void);
328 int (*cpu_present_to_apicid)(int mps_cpu);
329 void (*apicid_to_cpu_present)(int phys_apicid, physid_mask_t *retmap);
330 int (*check_phys_apicid_present)(int phys_apicid);
331 int (*phys_pkg_id)(int cpuid_apic, int index_msb);
333 u32 (*get_apic_id)(unsigned long x);
334 u32 (*set_apic_id)(unsigned int id);
336 /* wakeup_secondary_cpu */
337 int (*wakeup_secondary_cpu)(int apicid, unsigned long start_eip);
339 void (*inquire_remote_apic)(int apicid);
343 * Called very early during boot from get_smp_config(). It should
344 * return the logical apicid. x86_[bios]_cpu_to_apicid is
345 * initialized before this function is called.
347 * If logical apicid can't be determined that early, the function
348 * may return BAD_APICID. Logical apicid will be configured after
349 * init_apic_ldr() while bringing up CPUs. Note that NUMA affinity
350 * won't be applied properly during early boot in this case.
352 int (*x86_32_early_logical_apicid)(int cpu);
358 * Pointer to the local APIC driver in use on this system (there's
359 * always just one such driver in use - the kernel decides via an
360 * early probing process which one it picks - and then sticks to it):
362 extern struct apic *apic;
365 * APIC drivers are probed based on how they are listed in the .apicdrivers
366 * section. So the order is important and enforced by the ordering
367 * of different apic driver files in the Makefile.
369 * For the files having two apic drivers, we use apic_drivers()
370 * to enforce the order with in them.
372 #define apic_driver(sym) \
373 static const struct apic *__apicdrivers_##sym __used \
374 __aligned(sizeof(struct apic *)) \
375 __section(.apicdrivers) = { &sym }
377 #define apic_drivers(sym1, sym2) \
378 static struct apic *__apicdrivers_##sym1##sym2[2] __used \
379 __aligned(sizeof(struct apic *)) \
380 __section(.apicdrivers) = { &sym1, &sym2 }
382 extern struct apic *__apicdrivers[], *__apicdrivers_end[];
385 * APIC functionality to boot other CPUs - only used on SMP:
388 extern int wakeup_secondary_cpu_via_nmi(int apicid, unsigned long start_eip);
389 extern int lapic_can_unplug_cpu(void);
392 #ifdef CONFIG_X86_LOCAL_APIC
394 static inline u32 apic_read(u32 reg)
396 return apic->read(reg);
399 static inline void apic_write(u32 reg, u32 val)
401 apic->write(reg, val);
404 static inline void apic_eoi(void)
406 apic->eoi_write(APIC_EOI, APIC_EOI_ACK);
409 static inline u64 apic_icr_read(void)
411 return apic->icr_read();
414 static inline void apic_icr_write(u32 low, u32 high)
416 apic->icr_write(low, high);
419 static inline void apic_wait_icr_idle(void)
421 apic->wait_icr_idle();
424 static inline u32 safe_apic_wait_icr_idle(void)
426 return apic->safe_wait_icr_idle();
429 extern void __init apic_set_eoi_write(void (*eoi_write)(u32 reg, u32 v));
431 #else /* CONFIG_X86_LOCAL_APIC */
433 static inline u32 apic_read(u32 reg) { return 0; }
434 static inline void apic_write(u32 reg, u32 val) { }
435 static inline void apic_eoi(void) { }
436 static inline u64 apic_icr_read(void) { return 0; }
437 static inline void apic_icr_write(u32 low, u32 high) { }
438 static inline void apic_wait_icr_idle(void) { }
439 static inline u32 safe_apic_wait_icr_idle(void) { return 0; }
440 static inline void apic_set_eoi_write(void (*eoi_write)(u32 reg, u32 v)) {}
442 #endif /* CONFIG_X86_LOCAL_APIC */
444 static inline void ack_APIC_irq(void)
447 * ack_APIC_irq() actually gets compiled as a single instruction
453 static inline unsigned default_get_apic_id(unsigned long x)
455 unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR));
457 if (APIC_XAPIC(ver) || boot_cpu_has(X86_FEATURE_EXTD_APICID))
458 return (x >> 24) & 0xFF;
460 return (x >> 24) & 0x0F;
464 * Warm reset vector position:
466 #define TRAMPOLINE_PHYS_LOW 0x467
467 #define TRAMPOLINE_PHYS_HIGH 0x469
470 extern void apic_send_IPI_self(int vector);
472 DECLARE_PER_CPU(int, x2apic_extra_bits);
475 extern void generic_bigsmp_probe(void);
477 #ifdef CONFIG_X86_LOCAL_APIC
481 #define APIC_DFR_VALUE (APIC_DFR_FLAT)
483 DECLARE_EARLY_PER_CPU_READ_MOSTLY(u16, x86_bios_cpu_apicid);
485 extern struct apic apic_noop;
487 static inline unsigned int read_apic_id(void)
489 unsigned int reg = apic_read(APIC_ID);
491 return apic->get_apic_id(reg);
494 extern int default_apic_id_valid(int apicid);
495 extern int default_acpi_madt_oem_check(char *, char *);
496 extern void default_setup_apic_routing(void);
498 extern u32 apic_default_calc_apicid(unsigned int cpu);
499 extern u32 apic_flat_calc_apicid(unsigned int cpu);
501 extern int flat_cpu_mask_to_apicid(const struct cpumask *cpumask,
502 struct irq_data *irqdata,
503 unsigned int *apicid);
504 extern int default_cpu_mask_to_apicid(const struct cpumask *cpumask,
505 struct irq_data *irqdata,
506 unsigned int *apicid);
507 extern bool default_check_apicid_used(physid_mask_t *map, int apicid);
508 extern void flat_vector_allocation_domain(int cpu, struct cpumask *retmask,
509 const struct cpumask *mask);
510 extern void default_vector_allocation_domain(int cpu, struct cpumask *retmask,
511 const struct cpumask *mask);
512 extern void default_ioapic_phys_id_map(physid_mask_t *phys_map, physid_mask_t *retmap);
513 extern int default_cpu_present_to_apicid(int mps_cpu);
514 extern int default_check_phys_apicid_present(int phys_apicid);
516 #endif /* CONFIG_X86_LOCAL_APIC */
518 extern void irq_enter(void);
519 extern void irq_exit(void);
521 static inline void entering_irq(void)
526 static inline void entering_ack_irq(void)
532 static inline void ipi_entering_ack_irq(void)
538 static inline void exiting_irq(void)
543 static inline void exiting_ack_irq(void)
549 extern void ioapic_zap_locks(void);
551 #endif /* _ASM_X86_APIC_H */