1 #include <linux/module.h>
2 #include <linux/slab.h>
4 #include <asm/apicdef.h>
6 #include <linux/perf_event.h>
7 #include "../perf_event.h"
9 #define UNCORE_PMU_NAME_LEN 32
10 #define UNCORE_PMU_HRTIMER_INTERVAL (60LL * NSEC_PER_SEC)
11 #define UNCORE_SNB_IMC_HRTIMER_INTERVAL (5ULL * NSEC_PER_SEC)
13 #define UNCORE_FIXED_EVENT 0xff
14 #define UNCORE_PMC_IDX_MAX_GENERIC 8
15 #define UNCORE_PMC_IDX_FIXED UNCORE_PMC_IDX_MAX_GENERIC
16 #define UNCORE_PMC_IDX_MAX (UNCORE_PMC_IDX_FIXED + 1)
18 #define UNCORE_PCI_DEV_FULL_DATA(dev, func, type, idx) \
19 ((dev << 24) | (func << 16) | (type << 8) | idx)
20 #define UNCORE_PCI_DEV_DATA(type, idx) ((type << 8) | idx)
21 #define UNCORE_PCI_DEV_DEV(data) ((data >> 24) & 0xff)
22 #define UNCORE_PCI_DEV_FUNC(data) ((data >> 16) & 0xff)
23 #define UNCORE_PCI_DEV_TYPE(data) ((data >> 8) & 0xff)
24 #define UNCORE_PCI_DEV_IDX(data) (data & 0xff)
25 #define UNCORE_EXTRA_PCI_DEV 0xff
26 #define UNCORE_EXTRA_PCI_DEV_MAX 3
28 #define UNCORE_EVENT_CONSTRAINT(c, n) EVENT_CONSTRAINT(c, n, 0xff)
30 struct pci_extra_dev {
31 struct pci_dev *dev[UNCORE_EXTRA_PCI_DEV_MAX];
34 struct intel_uncore_ops;
35 struct intel_uncore_pmu;
36 struct intel_uncore_box;
37 struct uncore_event_desc;
39 struct intel_uncore_type {
52 unsigned num_shared_regs:8;
53 unsigned single_fixed:1;
54 unsigned pair_ctr_ctl:1;
55 unsigned *msr_offsets;
56 struct event_constraint unconstrainted;
57 struct event_constraint *constraints;
58 struct intel_uncore_pmu *pmus;
59 struct intel_uncore_ops *ops;
60 struct uncore_event_desc *event_descs;
61 const struct attribute_group *attr_groups[4];
62 struct pmu *pmu; /* for custom pmu ops */
65 #define pmu_group attr_groups[0]
66 #define format_group attr_groups[1]
67 #define events_group attr_groups[2]
69 struct intel_uncore_ops {
70 void (*init_box)(struct intel_uncore_box *);
71 void (*exit_box)(struct intel_uncore_box *);
72 void (*disable_box)(struct intel_uncore_box *);
73 void (*enable_box)(struct intel_uncore_box *);
74 void (*disable_event)(struct intel_uncore_box *, struct perf_event *);
75 void (*enable_event)(struct intel_uncore_box *, struct perf_event *);
76 u64 (*read_counter)(struct intel_uncore_box *, struct perf_event *);
77 int (*hw_config)(struct intel_uncore_box *, struct perf_event *);
78 struct event_constraint *(*get_constraint)(struct intel_uncore_box *,
80 void (*put_constraint)(struct intel_uncore_box *, struct perf_event *);
83 struct intel_uncore_pmu {
85 char name[UNCORE_PMU_NAME_LEN];
90 struct intel_uncore_type *type;
91 struct intel_uncore_box **boxes;
94 struct intel_uncore_extra_reg {
96 u64 config, config1, config2;
100 struct intel_uncore_box {
103 int n_active; /* number of active events */
105 int cpu; /* cpu to collect events */
108 struct perf_event *events[UNCORE_PMC_IDX_MAX];
109 struct perf_event *event_list[UNCORE_PMC_IDX_MAX];
110 struct event_constraint *event_constraint[UNCORE_PMC_IDX_MAX];
111 unsigned long active_mask[BITS_TO_LONGS(UNCORE_PMC_IDX_MAX)];
112 u64 tags[UNCORE_PMC_IDX_MAX];
113 struct pci_dev *pci_dev;
114 struct intel_uncore_pmu *pmu;
115 u64 hrtimer_duration; /* hrtimer timeout for this box */
116 struct hrtimer hrtimer;
117 struct list_head list;
118 struct list_head active_list;
120 struct intel_uncore_extra_reg shared_regs[0];
123 #define UNCORE_BOX_FLAG_INITIATED 0
125 struct uncore_event_desc {
126 struct kobj_attribute attr;
131 struct list_head list;
133 int pbus_to_physid[256];
136 struct pci2phy_map *__find_pci2phy_map(int segment);
138 ssize_t uncore_event_show(struct kobject *kobj,
139 struct kobj_attribute *attr, char *buf);
141 #define INTEL_UNCORE_EVENT_DESC(_name, _config) \
143 .attr = __ATTR(_name, 0444, uncore_event_show, NULL), \
147 #define DEFINE_UNCORE_FORMAT_ATTR(_var, _name, _format) \
148 static ssize_t __uncore_##_var##_show(struct kobject *kobj, \
149 struct kobj_attribute *attr, \
152 BUILD_BUG_ON(sizeof(_format) >= PAGE_SIZE); \
153 return sprintf(page, _format "\n"); \
155 static struct kobj_attribute format_attr_##_var = \
156 __ATTR(_name, 0444, __uncore_##_var##_show, NULL)
158 static inline unsigned uncore_pci_box_ctl(struct intel_uncore_box *box)
160 return box->pmu->type->box_ctl;
163 static inline unsigned uncore_pci_fixed_ctl(struct intel_uncore_box *box)
165 return box->pmu->type->fixed_ctl;
168 static inline unsigned uncore_pci_fixed_ctr(struct intel_uncore_box *box)
170 return box->pmu->type->fixed_ctr;
174 unsigned uncore_pci_event_ctl(struct intel_uncore_box *box, int idx)
176 return idx * 4 + box->pmu->type->event_ctl;
180 unsigned uncore_pci_perf_ctr(struct intel_uncore_box *box, int idx)
182 return idx * 8 + box->pmu->type->perf_ctr;
185 static inline unsigned uncore_msr_box_offset(struct intel_uncore_box *box)
187 struct intel_uncore_pmu *pmu = box->pmu;
188 return pmu->type->msr_offsets ?
189 pmu->type->msr_offsets[pmu->pmu_idx] :
190 pmu->type->msr_offset * pmu->pmu_idx;
193 static inline unsigned uncore_msr_box_ctl(struct intel_uncore_box *box)
195 if (!box->pmu->type->box_ctl)
197 return box->pmu->type->box_ctl + uncore_msr_box_offset(box);
200 static inline unsigned uncore_msr_fixed_ctl(struct intel_uncore_box *box)
202 if (!box->pmu->type->fixed_ctl)
204 return box->pmu->type->fixed_ctl + uncore_msr_box_offset(box);
207 static inline unsigned uncore_msr_fixed_ctr(struct intel_uncore_box *box)
209 return box->pmu->type->fixed_ctr + uncore_msr_box_offset(box);
213 unsigned uncore_msr_event_ctl(struct intel_uncore_box *box, int idx)
215 return box->pmu->type->event_ctl +
216 (box->pmu->type->pair_ctr_ctl ? 2 * idx : idx) +
217 uncore_msr_box_offset(box);
221 unsigned uncore_msr_perf_ctr(struct intel_uncore_box *box, int idx)
223 return box->pmu->type->perf_ctr +
224 (box->pmu->type->pair_ctr_ctl ? 2 * idx : idx) +
225 uncore_msr_box_offset(box);
229 unsigned uncore_fixed_ctl(struct intel_uncore_box *box)
232 return uncore_pci_fixed_ctl(box);
234 return uncore_msr_fixed_ctl(box);
238 unsigned uncore_fixed_ctr(struct intel_uncore_box *box)
241 return uncore_pci_fixed_ctr(box);
243 return uncore_msr_fixed_ctr(box);
247 unsigned uncore_event_ctl(struct intel_uncore_box *box, int idx)
250 return uncore_pci_event_ctl(box, idx);
252 return uncore_msr_event_ctl(box, idx);
256 unsigned uncore_perf_ctr(struct intel_uncore_box *box, int idx)
259 return uncore_pci_perf_ctr(box, idx);
261 return uncore_msr_perf_ctr(box, idx);
264 static inline int uncore_perf_ctr_bits(struct intel_uncore_box *box)
266 return box->pmu->type->perf_ctr_bits;
269 static inline int uncore_fixed_ctr_bits(struct intel_uncore_box *box)
271 return box->pmu->type->fixed_ctr_bits;
274 static inline int uncore_num_counters(struct intel_uncore_box *box)
276 return box->pmu->type->num_counters;
279 static inline void uncore_disable_box(struct intel_uncore_box *box)
281 if (box->pmu->type->ops->disable_box)
282 box->pmu->type->ops->disable_box(box);
285 static inline void uncore_enable_box(struct intel_uncore_box *box)
287 if (box->pmu->type->ops->enable_box)
288 box->pmu->type->ops->enable_box(box);
291 static inline void uncore_disable_event(struct intel_uncore_box *box,
292 struct perf_event *event)
294 box->pmu->type->ops->disable_event(box, event);
297 static inline void uncore_enable_event(struct intel_uncore_box *box,
298 struct perf_event *event)
300 box->pmu->type->ops->enable_event(box, event);
303 static inline u64 uncore_read_counter(struct intel_uncore_box *box,
304 struct perf_event *event)
306 return box->pmu->type->ops->read_counter(box, event);
309 static inline void uncore_box_init(struct intel_uncore_box *box)
311 if (!test_and_set_bit(UNCORE_BOX_FLAG_INITIATED, &box->flags)) {
312 if (box->pmu->type->ops->init_box)
313 box->pmu->type->ops->init_box(box);
317 static inline void uncore_box_exit(struct intel_uncore_box *box)
319 if (test_and_clear_bit(UNCORE_BOX_FLAG_INITIATED, &box->flags)) {
320 if (box->pmu->type->ops->exit_box)
321 box->pmu->type->ops->exit_box(box);
325 static inline bool uncore_box_is_fake(struct intel_uncore_box *box)
327 return (box->pkgid < 0);
330 static inline struct intel_uncore_pmu *uncore_event_to_pmu(struct perf_event *event)
332 return container_of(event->pmu, struct intel_uncore_pmu, pmu);
335 static inline struct intel_uncore_box *uncore_event_to_box(struct perf_event *event)
337 return event->pmu_private;
340 struct intel_uncore_box *uncore_pmu_to_box(struct intel_uncore_pmu *pmu, int cpu);
341 u64 uncore_msr_read_counter(struct intel_uncore_box *box, struct perf_event *event);
342 void uncore_pmu_start_hrtimer(struct intel_uncore_box *box);
343 void uncore_pmu_cancel_hrtimer(struct intel_uncore_box *box);
344 void uncore_pmu_event_read(struct perf_event *event);
345 void uncore_perf_event_update(struct intel_uncore_box *box, struct perf_event *event);
346 struct event_constraint *
347 uncore_get_constraint(struct intel_uncore_box *box, struct perf_event *event);
348 void uncore_put_constraint(struct intel_uncore_box *box, struct perf_event *event);
349 u64 uncore_shared_reg_config(struct intel_uncore_box *box, int idx);
351 extern struct intel_uncore_type **uncore_msr_uncores;
352 extern struct intel_uncore_type **uncore_pci_uncores;
353 extern struct pci_driver *uncore_pci_driver;
354 extern raw_spinlock_t pci2phy_map_lock;
355 extern struct list_head pci2phy_map_head;
356 extern struct pci_extra_dev *uncore_extra_pci_dev;
357 extern struct event_constraint uncore_constraint_empty;
359 /* perf_event_intel_uncore_snb.c */
360 int snb_uncore_pci_init(void);
361 int ivb_uncore_pci_init(void);
362 int hsw_uncore_pci_init(void);
363 int bdw_uncore_pci_init(void);
364 int skl_uncore_pci_init(void);
365 void snb_uncore_cpu_init(void);
366 void nhm_uncore_cpu_init(void);
367 void skl_uncore_cpu_init(void);
368 int snb_pci2phy_map_init(int devid);
370 /* perf_event_intel_uncore_snbep.c */
371 int snbep_uncore_pci_init(void);
372 void snbep_uncore_cpu_init(void);
373 int ivbep_uncore_pci_init(void);
374 void ivbep_uncore_cpu_init(void);
375 int hswep_uncore_pci_init(void);
376 void hswep_uncore_cpu_init(void);
377 int bdx_uncore_pci_init(void);
378 void bdx_uncore_cpu_init(void);
379 int knl_uncore_pci_init(void);
380 void knl_uncore_cpu_init(void);
382 /* perf_event_intel_uncore_nhmex.c */
383 void nhmex_uncore_cpu_init(void);