1 // Copyright 2010 Tilera Corporation. All Rights Reserved.
3 // This program is free software; you can redistribute it and/or
4 // modify it under the terms of the GNU General Public License
5 // as published by the Free Software Foundation, version 2.
7 // This program is distributed in the hope that it will be useful, but
8 // WITHOUT ANY WARRANTY; without even the implied warranty of
9 // MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
10 // NON INFRINGEMENT. See the GNU General Public License for
15 //! Some low-level simulator definitions.
18 #ifndef __ARCH_SIM_DEF_H__
19 #define __ARCH_SIM_DEF_H__
22 //! Internal: the low bits of the SIM_CONTROL_* SPR values specify
23 //! the operation to perform, and the remaining bits are
24 //! an operation-specific parameter (often unused).
26 #define _SIM_CONTROL_OPERATOR_BITS 8
29 //== Values which can be written to SPR_SIM_CONTROL.
31 //! If written to SPR_SIM_CONTROL, stops profiling.
33 #define SIM_CONTROL_PROFILER_DISABLE 0
35 //! If written to SPR_SIM_CONTROL, starts profiling.
37 #define SIM_CONTROL_PROFILER_ENABLE 1
39 //! If written to SPR_SIM_CONTROL, clears profiling counters.
41 #define SIM_CONTROL_PROFILER_CLEAR 2
43 //! If written to SPR_SIM_CONTROL, checkpoints the simulator.
45 #define SIM_CONTROL_CHECKPOINT 3
47 //! If written to SPR_SIM_CONTROL, combined with a mask (shifted by 8),
48 //! sets the tracing mask to the given mask. See "sim_set_tracing()".
50 #define SIM_CONTROL_SET_TRACING 4
52 //! If written to SPR_SIM_CONTROL, combined with a mask (shifted by 8),
53 //! dumps the requested items of machine state to the log.
55 #define SIM_CONTROL_DUMP 5
57 //! If written to SPR_SIM_CONTROL, clears chip-level profiling counters.
59 #define SIM_CONTROL_PROFILER_CHIP_CLEAR 6
61 //! If written to SPR_SIM_CONTROL, disables chip-level profiling.
63 #define SIM_CONTROL_PROFILER_CHIP_DISABLE 7
65 //! If written to SPR_SIM_CONTROL, enables chip-level profiling.
67 #define SIM_CONTROL_PROFILER_CHIP_ENABLE 8
69 //! If written to SPR_SIM_CONTROL, enables chip-level functional mode
71 #define SIM_CONTROL_ENABLE_FUNCTIONAL 9
73 //! If written to SPR_SIM_CONTROL, disables chip-level functional mode.
75 #define SIM_CONTROL_DISABLE_FUNCTIONAL 10
77 //! If written to SPR_SIM_CONTROL, enables chip-level functional mode.
78 //! All tiles must perform this write for functional mode to be enabled.
79 //! Ignored in naked boot mode unless --functional is specified.
80 //! WARNING: Only the hypervisor startup code should use this!
82 #define SIM_CONTROL_ENABLE_FUNCTIONAL_BARRIER 11
84 //! If written to SPR_SIM_CONTROL, combined with a character (shifted by 8),
85 //! writes a string directly to the simulator output. Written to once for
86 //! each character in the string, plus a final NUL. Instead of NUL,
87 //! you can also use "SIM_PUTC_FLUSH_STRING" or "SIM_PUTC_FLUSH_BINARY".
89 // ISSUE: Document the meaning of "newline", and the handling of NUL.
91 #define SIM_CONTROL_PUTC 12
93 //! If written to SPR_SIM_CONTROL, clears the --grind-coherence state for
94 //! this core. This is intended to be used before a loop that will
95 //! invalidate the cache by loading new data and evicting all current data.
96 //! Generally speaking, this API should only be used by system code.
98 #define SIM_CONTROL_GRINDER_CLEAR 13
100 //! If written to SPR_SIM_CONTROL, shuts down the simulator.
102 #define SIM_CONTROL_SHUTDOWN 14
104 //! If written to SPR_SIM_CONTROL, combined with a pid (shifted by 8),
105 //! indicates that a fork syscall just created the given process.
107 #define SIM_CONTROL_OS_FORK 15
109 //! If written to SPR_SIM_CONTROL, combined with a pid (shifted by 8),
110 //! indicates that an exit syscall was just executed by the given process.
112 #define SIM_CONTROL_OS_EXIT 16
114 //! If written to SPR_SIM_CONTROL, combined with a pid (shifted by 8),
115 //! indicates that the OS just switched to the given process.
117 #define SIM_CONTROL_OS_SWITCH 17
119 //! If written to SPR_SIM_CONTROL, combined with a character (shifted by 8),
120 //! indicates that an exec syscall was just executed. Written to once for
121 //! each character in the executable name, plus a final NUL.
123 #define SIM_CONTROL_OS_EXEC 18
125 //! If written to SPR_SIM_CONTROL, combined with a character (shifted by 8),
126 //! indicates that an interpreter (PT_INTERP) was loaded. Written to once
127 //! for each character in "ADDR:PATH", plus a final NUL, where "ADDR" is a
128 //! hex load address starting with "0x", and "PATH" is the executable name.
130 #define SIM_CONTROL_OS_INTERP 19
132 //! If written to SPR_SIM_CONTROL, combined with a character (shifted by 8),
133 //! indicates that a dll was loaded. Written to once for each character
134 //! in "ADDR:PATH", plus a final NUL, where "ADDR" is a hexadecimal load
135 //! address starting with "0x", and "PATH" is the executable name.
137 #define SIM_CONTROL_DLOPEN 20
139 //! If written to SPR_SIM_CONTROL, combined with a character (shifted by 8),
140 //! indicates that a dll was unloaded. Written to once for each character
141 //! in "ADDR", plus a final NUL, where "ADDR" is a hexadecimal load
142 //! address starting with "0x".
144 #define SIM_CONTROL_DLCLOSE 21
146 //! If written to SPR_SIM_CONTROL, combined with a flag (shifted by 8),
147 //! indicates whether to allow data reads to remotely-cached
148 //! dirty cache lines to be cached locally without grinder warnings or
149 //! assertions (used by Linux kernel fast memcpy).
151 #define SIM_CONTROL_ALLOW_MULTIPLE_CACHING 22
153 //! If written to SPR_SIM_CONTROL, enables memory tracing.
155 #define SIM_CONTROL_ENABLE_MEM_LOGGING 23
157 //! If written to SPR_SIM_CONTROL, disables memory tracing.
159 #define SIM_CONTROL_DISABLE_MEM_LOGGING 24
161 //! If written to SPR_SIM_CONTROL, changes the shaping parameters of one of
162 //! the gbe or xgbe shims. Must specify the shim id, the type, the units, and
163 //! the rate, as defined in SIM_SHAPING_SPR_ARG.
165 #define SIM_CONTROL_SHAPING 25
167 //! If written to SPR_SIM_CONTROL, combined with character (shifted by 8),
168 //! requests that a simulator command be executed. Written to once for each
169 //! character in the command, plus a final NUL.
171 #define SIM_CONTROL_COMMAND 26
173 //! If written to SPR_SIM_CONTROL, indicates that the simulated system
174 //! is panicking, to allow debugging via --debug-on-panic.
176 #define SIM_CONTROL_PANIC 27
178 //! If written to SPR_SIM_CONTROL, triggers a simulator syscall.
179 //! See "sim_syscall()" for more info.
181 #define SIM_CONTROL_SYSCALL 32
183 //! If written to SPR_SIM_CONTROL, combined with a pid (shifted by 8),
184 //! provides the pid that subsequent SIM_CONTROL_OS_FORK writes should
185 //! use as the pid, rather than the default previous SIM_CONTROL_OS_SWITCH.
187 #define SIM_CONTROL_OS_FORK_PARENT 33
189 //! If written to SPR_SIM_CONTROL, combined with a mPIPE shim number
190 //! (shifted by 8), clears the pending magic data section. The cleared
191 //! pending magic data section and any subsequently appended magic bytes
192 //! will only take effect when the classifier blast programmer is run.
193 #define SIM_CONTROL_CLEAR_MPIPE_MAGIC_BYTES 34
195 //! If written to SPR_SIM_CONTROL, combined with a mPIPE shim number
196 //! (shifted by 8) and a byte of data (shifted by 16), appends that byte
197 //! to the shim's pending magic data section. The pending magic data
198 //! section takes effect when the classifier blast programmer is run.
199 #define SIM_CONTROL_APPEND_MPIPE_MAGIC_BYTE 35
201 //! If written to SPR_SIM_CONTROL, combined with a mPIPE shim number
202 //! (shifted by 8), an enable=1/disable=0 bit (shifted by 16), and a
203 //! mask of links (shifted by 32), enable or disable the corresponding
205 #define SIM_CONTROL_ENABLE_MPIPE_LINK_MAGIC_BYTE 36
207 //== Syscall numbers for use with "sim_syscall()".
209 //! Syscall number for sim_add_watchpoint().
211 #define SIM_SYSCALL_ADD_WATCHPOINT 2
213 //! Syscall number for sim_remove_watchpoint().
215 #define SIM_SYSCALL_REMOVE_WATCHPOINT 3
217 //! Syscall number for sim_query_watchpoint().
219 #define SIM_SYSCALL_QUERY_WATCHPOINT 4
221 //! Syscall number that asserts that the cache lines whose 64-bit PA
222 //! is passed as the second argument to sim_syscall(), and over a
223 //! range passed as the third argument, are no longer in cache.
224 //! The simulator raises an error if this is not the case.
226 #define SIM_SYSCALL_VALIDATE_LINES_EVICTED 5
229 //== Bit masks which can be shifted by 8, combined with
230 //== SIM_CONTROL_SET_TRACING, and written to SPR_SIM_CONTROL.
232 //! @addtogroup arch_sim
235 //! Enable --trace-cycle when passed to simulator_set_tracing().
237 #define SIM_TRACE_CYCLES 0x01
239 //! Enable --trace-router when passed to simulator_set_tracing().
241 #define SIM_TRACE_ROUTER 0x02
243 //! Enable --trace-register-writes when passed to simulator_set_tracing().
245 #define SIM_TRACE_REGISTER_WRITES 0x04
247 //! Enable --trace-disasm when passed to simulator_set_tracing().
249 #define SIM_TRACE_DISASM 0x08
251 //! Enable --trace-stall-info when passed to simulator_set_tracing().
253 #define SIM_TRACE_STALL_INFO 0x10
255 //! Enable --trace-memory-controller when passed to simulator_set_tracing().
257 #define SIM_TRACE_MEMORY_CONTROLLER 0x20
259 //! Enable --trace-l2 when passed to simulator_set_tracing().
261 #define SIM_TRACE_L2_CACHE 0x40
263 //! Enable --trace-lines when passed to simulator_set_tracing().
265 #define SIM_TRACE_LINES 0x80
267 //! Turn off all tracing when passed to simulator_set_tracing().
269 #define SIM_TRACE_NONE 0
271 //! Turn on all tracing when passed to simulator_set_tracing().
273 #define SIM_TRACE_ALL (-1)
277 //! Computes the value to write to SPR_SIM_CONTROL to set tracing flags.
279 #define SIM_TRACE_SPR_ARG(mask) \
280 (SIM_CONTROL_SET_TRACING | ((mask) << _SIM_CONTROL_OPERATOR_BITS))
283 //== Bit masks which can be shifted by 8, combined with
284 //== SIM_CONTROL_DUMP, and written to SPR_SIM_CONTROL.
286 //! @addtogroup arch_sim
289 //! Dump the general-purpose registers.
291 #define SIM_DUMP_REGS 0x001
295 #define SIM_DUMP_SPRS 0x002
299 #define SIM_DUMP_ITLB 0x004
303 #define SIM_DUMP_DTLB 0x008
305 //! Dump the L1 I-cache.
307 #define SIM_DUMP_L1I 0x010
309 //! Dump the L1 D-cache.
311 #define SIM_DUMP_L1D 0x020
313 //! Dump the L2 cache.
315 #define SIM_DUMP_L2 0x040
317 //! Dump the switch registers.
319 #define SIM_DUMP_SNREGS 0x080
321 //! Dump the switch ITLB.
323 #define SIM_DUMP_SNITLB 0x100
325 //! Dump the switch L1 I-cache.
327 #define SIM_DUMP_SNL1I 0x200
329 //! Dump the current backtrace.
331 #define SIM_DUMP_BACKTRACE 0x400
333 //! Only dump valid lines in caches.
335 #define SIM_DUMP_VALID_LINES 0x800
337 //! Dump everything that is dumpable.
339 #define SIM_DUMP_ALL (-1 & ~SIM_DUMP_VALID_LINES)
343 //! Computes the value to write to SPR_SIM_CONTROL to dump machine state.
345 #define SIM_DUMP_SPR_ARG(mask) \
346 (SIM_CONTROL_DUMP | ((mask) << _SIM_CONTROL_OPERATOR_BITS))
349 //== Bit masks which can be shifted by 8, combined with
350 //== SIM_CONTROL_PROFILER_CHIP_xxx, and written to SPR_SIM_CONTROL.
352 //! @addtogroup arch_sim
355 //! Use with with SIM_PROFILER_CHIP_xxx to control the memory controllers.
357 #define SIM_CHIP_MEMCTL 0x001
359 //! Use with with SIM_PROFILER_CHIP_xxx to control the XAUI interface.
361 #define SIM_CHIP_XAUI 0x002
363 //! Use with with SIM_PROFILER_CHIP_xxx to control the PCIe interface.
365 #define SIM_CHIP_PCIE 0x004
367 //! Use with with SIM_PROFILER_CHIP_xxx to control the MPIPE interface.
369 #define SIM_CHIP_MPIPE 0x008
371 //! Reference all chip devices.
373 #define SIM_CHIP_ALL (-1)
377 //! Computes the value to write to SPR_SIM_CONTROL to clear chip statistics.
379 #define SIM_PROFILER_CHIP_CLEAR_SPR_ARG(mask) \
380 (SIM_CONTROL_PROFILER_CHIP_CLEAR | ((mask) << _SIM_CONTROL_OPERATOR_BITS))
382 //! Computes the value to write to SPR_SIM_CONTROL to disable chip statistics.
384 #define SIM_PROFILER_CHIP_DISABLE_SPR_ARG(mask) \
385 (SIM_CONTROL_PROFILER_CHIP_DISABLE | ((mask) << _SIM_CONTROL_OPERATOR_BITS))
387 //! Computes the value to write to SPR_SIM_CONTROL to enable chip statistics.
389 #define SIM_PROFILER_CHIP_ENABLE_SPR_ARG(mask) \
390 (SIM_CONTROL_PROFILER_CHIP_ENABLE | ((mask) << _SIM_CONTROL_OPERATOR_BITS))
394 // Shim bitrate controls.
396 //! The number of bits used to store the shim id.
398 #define SIM_CONTROL_SHAPING_SHIM_ID_BITS 3
400 //! @addtogroup arch_sim
403 //! Change the gbe 0 bitrate.
405 #define SIM_CONTROL_SHAPING_GBE_0 0x0
407 //! Change the gbe 1 bitrate.
409 #define SIM_CONTROL_SHAPING_GBE_1 0x1
411 //! Change the gbe 2 bitrate.
413 #define SIM_CONTROL_SHAPING_GBE_2 0x2
415 //! Change the gbe 3 bitrate.
417 #define SIM_CONTROL_SHAPING_GBE_3 0x3
419 //! Change the xgbe 0 bitrate.
421 #define SIM_CONTROL_SHAPING_XGBE_0 0x4
423 //! Change the xgbe 1 bitrate.
425 #define SIM_CONTROL_SHAPING_XGBE_1 0x5
427 //! The type of shaping to do.
429 #define SIM_CONTROL_SHAPING_TYPE_BITS 2
431 //! Control the multiplier.
433 #define SIM_CONTROL_SHAPING_MULTIPLIER 0
437 #define SIM_CONTROL_SHAPING_PPS 1
441 #define SIM_CONTROL_SHAPING_BPS 2
443 //! The number of bits for the units for the shaping parameter.
445 #define SIM_CONTROL_SHAPING_UNITS_BITS 2
447 //! Provide a number in single units.
449 #define SIM_CONTROL_SHAPING_UNITS_SINGLE 0
451 //! Provide a number in kilo units.
453 #define SIM_CONTROL_SHAPING_UNITS_KILO 1
455 //! Provide a number in mega units.
457 #define SIM_CONTROL_SHAPING_UNITS_MEGA 2
459 //! Provide a number in giga units.
461 #define SIM_CONTROL_SHAPING_UNITS_GIGA 3
465 //! How many bits are available for the rate.
467 #define SIM_CONTROL_SHAPING_RATE_BITS \
468 (32 - (_SIM_CONTROL_OPERATOR_BITS + \
469 SIM_CONTROL_SHAPING_SHIM_ID_BITS + \
470 SIM_CONTROL_SHAPING_TYPE_BITS + \
471 SIM_CONTROL_SHAPING_UNITS_BITS))
473 //! Computes the value to write to SPR_SIM_CONTROL to change a bitrate.
475 #define SIM_SHAPING_SPR_ARG(shim, type, units, rate) \
476 (SIM_CONTROL_SHAPING | \
478 ((type) << (SIM_CONTROL_SHAPING_SHIM_ID_BITS)) | \
479 ((units) << (SIM_CONTROL_SHAPING_SHIM_ID_BITS + \
480 SIM_CONTROL_SHAPING_TYPE_BITS)) | \
481 ((rate) << (SIM_CONTROL_SHAPING_SHIM_ID_BITS + \
482 SIM_CONTROL_SHAPING_TYPE_BITS + \
483 SIM_CONTROL_SHAPING_UNITS_BITS))) << _SIM_CONTROL_OPERATOR_BITS)
486 //== Values returned when reading SPR_SIM_CONTROL.
487 // ISSUE: These names should share a longer common prefix.
489 //! When reading SPR_SIM_CONTROL, the mask of simulator tracing bits
490 //! (SIM_TRACE_xxx values).
492 #define SIM_TRACE_FLAG_MASK 0xFFFF
494 //! When reading SPR_SIM_CONTROL, the mask for whether profiling is enabled.
496 #define SIM_PROFILER_ENABLED_MASK 0x10000
499 //== Special arguments for "SIM_CONTROL_PUTC".
501 //! Flag value for forcing a PUTC string-flush, including
502 //! coordinate/cycle prefix and newline.
504 #define SIM_PUTC_FLUSH_STRING 0x100
506 //! Flag value for forcing a PUTC binary-data-flush, which skips the
507 //! prefix and does not append a newline.
509 #define SIM_PUTC_FLUSH_BINARY 0x101
512 #endif //__ARCH_SIM_DEF_H__