arch/sparc64/kernel/time.c

   1 /* $Id: time.c,v 1.42 2002/01/23 14:33:55 davem Exp $
   2  * time.c: UltraSparc timer and TOD clock support.
   3  *
   4  * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
   5  * Copyright (C) 1998 Eddie C. Dost   (ecd@skynet.be)
   6  *
   7  * Based largely on code which is:
   8  *
   9  * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
  10  */
  11
  12 #include <linux/errno.h>
  13 #include <linux/module.h>
  14 #include <linux/sched.h>
  15 #include <linux/kernel.h>
  16 #include <linux/param.h>
  17 #include <linux/string.h>
  18 #include <linux/mm.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/time.h>
  21 #include <linux/timex.h>
  22 #include <linux/init.h>
  23 #include <linux/ioport.h>
  24 #include <linux/mc146818rtc.h>
  25 #include <linux/delay.h>
  26 #include <linux/profile.h>
  27 #include <linux/bcd.h>
  28 #include <linux/jiffies.h>
  29 #include <linux/cpufreq.h>
  30 #include <linux/percpu.h>
  31 #include <linux/miscdevice.h>
  32 #include <linux/rtc.h>
  33 #include <linux/kernel_stat.h>
  34 #include <linux/clockchips.h>
  35 #include <linux/clocksource.h>
  36
  37 #include <asm/oplib.h>
  38 #include <asm/mostek.h>
  39 #include <asm/timer.h>
  40 #include <asm/irq.h>
  41 #include <asm/io.h>
  42 #include <asm/prom.h>
  43 #include <asm/of_device.h>
  44 #include <asm/starfire.h>
  45 #include <asm/smp.h>
  46 #include <asm/sections.h>
  47 #include <asm/cpudata.h>
  48 #include <asm/uaccess.h>
  49 #include <asm/irq_regs.h>
  50
  51 DEFINE_SPINLOCK(mostek_lock);
  52 DEFINE_SPINLOCK(rtc_lock);
  53 void __iomem *mstk48t02_regs = NULL;
  54 #ifdef CONFIG_PCI
  55 unsigned long ds1287_regs = 0UL;
  56 static void __iomem *bq4802_regs;
  57 #endif
  58
  59 static void __iomem *mstk48t08_regs;
  60 static void __iomem *mstk48t59_regs;
  61
  62 static int set_rtc_mmss(unsigned long);
  63
  64 #define TICK_PRIV_BIT   (1UL << 63)
  65 #define TICKCMP_IRQ_BIT (1UL << 63)
  66
  67 #ifdef CONFIG_SMP
  68 unsigned long profile_pc(struct pt_regs *regs)
  69 {
  70         unsigned long pc = instruction_pointer(regs);
  71
  72         if (in_lock_functions(pc))
  73                 return regs->u_regs[UREG_RETPC];
  74         return pc;
  75 }
  76 EXPORT_SYMBOL(profile_pc);
  77 #endif
  78
  79 static void tick_disable_protection(void)
  80 {
  81         /* Set things up so user can access tick register for profiling
  82          * purposes.  Also workaround BB_ERRATA_1 by doing a dummy
  83          * read back of %tick after writing it.
  84          */
  85         __asm__ __volatile__(
  86         "       ba,pt   %%xcc, 1f\n"
  87         "        nop\n"
  88         "       .align  64\n"
  89         "1:     rd      %%tick, %%g2\n"
  90         "       add     %%g2, 6, %%g2\n"
  91         "       andn    %%g2, %0, %%g2\n"
  92         "       wrpr    %%g2, 0, %%tick\n"
  93         "       rdpr    %%tick, %%g0"
  94         : /* no outputs */
  95         : "r" (TICK_PRIV_BIT)
  96         : "g2");
  97 }
  98
  99 static void tick_disable_irq(void)
 100 {
 101         __asm__ __volatile__(
 102         "       ba,pt   %%xcc, 1f\n"
 103         "        nop\n"
 104         "       .align  64\n"
 105         "1:     wr      %0, 0x0, %%tick_cmpr\n"
 106         "       rd      %%tick_cmpr, %%g0"
 107         : /* no outputs */
 108         : "r" (TICKCMP_IRQ_BIT));
 109 }
 110
 111 static void tick_init_tick(void)
 112 {
 113         tick_disable_protection();
 114         tick_disable_irq();
 115 }
 116
 117 static unsigned long tick_get_tick(void)
 118 {
 119         unsigned long ret;
 120
 121         __asm__ __volatile__("rd        %%tick, %0\n\t"
 122                              "mov       %0, %0"
 123                              : "=r" (ret));
 124
 125         return ret & ~TICK_PRIV_BIT;
 126 }
 127
 128 static int tick_add_compare(unsigned long adj)
 129 {
 130         unsigned long orig_tick, new_tick, new_compare;
 131
 132         __asm__ __volatile__("rd        %%tick, %0"
 133                              : "=r" (orig_tick));
 134
 135         orig_tick &= ~TICKCMP_IRQ_BIT;
 136
 137         /* Workaround for Spitfire Errata (#54 I think??), I discovered
 138          * this via Sun BugID 4008234, mentioned in Solaris-2.5.1 patch
 139          * number 103640.
 140          *
 141          * On Blackbird writes to %tick_cmpr can fail, the
 142          * workaround seems to be to execute the wr instruction
 143          * at the start of an I-cache line, and perform a dummy
 144          * read back from %tick_cmpr right after writing to it. -DaveM
 145          */
 146         __asm__ __volatile__("ba,pt     %%xcc, 1f\n\t"
 147                              " add      %1, %2, %0\n\t"
 148                              ".align    64\n"
 149                              "1:\n\t"
 150                              "wr        %0, 0, %%tick_cmpr\n\t"
 151                              "rd        %%tick_cmpr, %%g0\n\t"
 152                              : "=r" (new_compare)
 153                              : "r" (orig_tick), "r" (adj));
 154
 155         __asm__ __volatile__("rd        %%tick, %0"
 156                              : "=r" (new_tick));
 157         new_tick &= ~TICKCMP_IRQ_BIT;
 158
 159         return ((long)(new_tick - (orig_tick+adj))) > 0L;
 160 }
 161
 162 static unsigned long tick_add_tick(unsigned long adj)
 163 {
 164         unsigned long new_tick;
 165
 166         /* Also need to handle Blackbird bug here too. */
 167         __asm__ __volatile__("rd        %%tick, %0\n\t"
 168                              "add       %0, %1, %0\n\t"
 169                              "wrpr      %0, 0, %%tick\n\t"
 170                              : "=&r" (new_tick)
 171                              : "r" (adj));
 172
 173         return new_tick;
 174 }
 175
 176 static struct sparc64_tick_ops tick_operations __read_mostly = {
 177         .name           =       "tick",
 178         .init_tick      =       tick_init_tick,
 179         .disable_irq    =       tick_disable_irq,
 180         .get_tick       =       tick_get_tick,
 181         .add_tick       =       tick_add_tick,
 182         .add_compare    =       tick_add_compare,
 183         .softint_mask   =       1UL << 0,
 184 };
 185
 186 struct sparc64_tick_ops *tick_ops __read_mostly = &tick_operations;
 187
 188 static void stick_disable_irq(void)
 189 {
 190         __asm__ __volatile__(
 191         "wr     %0, 0x0, %%asr25"
 192         : /* no outputs */
 193         : "r" (TICKCMP_IRQ_BIT));
 194 }
 195
 196 static void stick_init_tick(void)
 197 {
 198         /* Writes to the %tick and %stick register are not
 199          * allowed on sun4v.  The Hypervisor controls that
 200          * bit, per-strand.
 201          */
 202         if (tlb_type != hypervisor) {
 203                 tick_disable_protection();
 204                 tick_disable_irq();
 205
 206                 /* Let the user get at STICK too. */
 207                 __asm__ __volatile__(
 208                 "       rd      %%asr24, %%g2\n"
 209                 "       andn    %%g2, %0, %%g2\n"
 210                 "       wr      %%g2, 0, %%asr24"
 211                 : /* no outputs */
 212                 : "r" (TICK_PRIV_BIT)
 213                 : "g1", "g2");
 214         }
 215
 216         stick_disable_irq();
 217 }
 218
 219 static unsigned long stick_get_tick(void)
 220 {
 221         unsigned long ret;
 222
 223         __asm__ __volatile__("rd        %%asr24, %0"
 224                              : "=r" (ret));
 225
 226         return ret & ~TICK_PRIV_BIT;
 227 }
 228
 229 static unsigned long stick_add_tick(unsigned long adj)
 230 {
 231         unsigned long new_tick;
 232
 233         __asm__ __volatile__("rd        %%asr24, %0\n\t"
 234                              "add       %0, %1, %0\n\t"
 235                              "wr        %0, 0, %%asr24\n\t"
 236                              : "=&r" (new_tick)
 237                              : "r" (adj));
 238
 239         return new_tick;
 240 }
 241
 242 static int stick_add_compare(unsigned long adj)
 243 {
 244         unsigned long orig_tick, new_tick;
 245
 246         __asm__ __volatile__("rd        %%asr24, %0"
 247                              : "=r" (orig_tick));
 248         orig_tick &= ~TICKCMP_IRQ_BIT;
 249
 250         __asm__ __volatile__("wr        %0, 0, %%asr25"
 251                              : /* no outputs */
 252                              : "r" (orig_tick + adj));
 253
 254         __asm__ __volatile__("rd        %%asr24, %0"
 255                              : "=r" (new_tick));
 256         new_tick &= ~TICKCMP_IRQ_BIT;
 257
 258         return ((long)(new_tick - (orig_tick+adj))) > 0L;
 259 }
 260
 261 static struct sparc64_tick_ops stick_operations __read_mostly = {
 262         .name           =       "stick",
 263         .init_tick      =       stick_init_tick,
 264         .disable_irq    =       stick_disable_irq,
 265         .get_tick       =       stick_get_tick,
 266         .add_tick       =       stick_add_tick,
 267         .add_compare    =       stick_add_compare,
 268         .softint_mask   =       1UL << 16,
 269 };
 270
 271 /* On Hummingbird the STICK/STICK_CMPR register is implemented
 272  * in I/O space.  There are two 64-bit registers each, the
 273  * first holds the low 32-bits of the value and the second holds
 274  * the high 32-bits.
 275  *
 276  * Since STICK is constantly updating, we have to access it carefully.
 277  *
 278  * The sequence we use to read is:
 279  * 1) read high
 280  * 2) read low
 281  * 3) read high again, if it rolled re-read both low and high again.
 282  *
 283  * Writing STICK safely is also tricky:
 284  * 1) write low to zero
 285  * 2) write high
 286  * 3) write low
 287  */
 288 #define HBIRD_STICKCMP_ADDR     0x1fe0000f060UL
 289 #define HBIRD_STICK_ADDR        0x1fe0000f070UL
 290
 291 static unsigned long __hbird_read_stick(void)
 292 {
 293         unsigned long ret, tmp1, tmp2, tmp3;
 294         unsigned long addr = HBIRD_STICK_ADDR+8;
 295
 296         __asm__ __volatile__("ldxa      [%1] %5, %2\n"
 297                              "1:\n\t"
 298                              "sub       %1, 0x8, %1\n\t"
 299                              "ldxa      [%1] %5, %3\n\t"
 300                              "add       %1, 0x8, %1\n\t"
 301                              "ldxa      [%1] %5, %4\n\t"
 302                              "cmp       %4, %2\n\t"
 303                              "bne,a,pn  %%xcc, 1b\n\t"
 304                              " mov      %4, %2\n\t"
 305                              "sllx      %4, 32, %4\n\t"
 306                              "or        %3, %4, %0\n\t"
 307                              : "=&r" (ret), "=&r" (addr),
 308                                "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3)
 309                              : "i" (ASI_PHYS_BYPASS_EC_E), "1" (addr));
 310
 311         return ret;
 312 }
 313
 314 static void __hbird_write_stick(unsigned long val)
 315 {
 316         unsigned long low = (val & 0xffffffffUL);
 317         unsigned long high = (val >> 32UL);
 318         unsigned long addr = HBIRD_STICK_ADDR;
 319
 320         __asm__ __volatile__("stxa      %%g0, [%0] %4\n\t"
 321                              "add       %0, 0x8, %0\n\t"
 322                              "stxa      %3, [%0] %4\n\t"
 323                              "sub       %0, 0x8, %0\n\t"
 324                              "stxa      %2, [%0] %4"
 325                              : "=&r" (addr)
 326                              : "0" (addr), "r" (low), "r" (high),
 327                                "i" (ASI_PHYS_BYPASS_EC_E));
 328 }
 329
 330 static void __hbird_write_compare(unsigned long val)
 331 {
 332         unsigned long low = (val & 0xffffffffUL);
 333         unsigned long high = (val >> 32UL);
 334         unsigned long addr = HBIRD_STICKCMP_ADDR + 0x8UL;
 335
 336         __asm__ __volatile__("stxa      %3, [%0] %4\n\t"
 337                              "sub       %0, 0x8, %0\n\t"
 338                              "stxa      %2, [%0] %4"
 339                              : "=&r" (addr)
 340                              : "0" (addr), "r" (low), "r" (high),
 341                                "i" (ASI_PHYS_BYPASS_EC_E));
 342 }
 343
 344 static void hbtick_disable_irq(void)
 345 {
 346         __hbird_write_compare(TICKCMP_IRQ_BIT);
 347 }
 348
 349 static void hbtick_init_tick(void)
 350 {
 351         tick_disable_protection();
 352
 353         /* XXX This seems to be necessary to 'jumpstart' Hummingbird
 354          * XXX into actually sending STICK interrupts.  I think because
 355          * XXX of how we store %tick_cmpr in head.S this somehow resets the
 356          * XXX {TICK + STICK} interrupt mux.  -DaveM
 357          */
 358         __hbird_write_stick(__hbird_read_stick());
 359
 360         hbtick_disable_irq();
 361 }
 362
 363 static unsigned long hbtick_get_tick(void)
 364 {
 365         return __hbird_read_stick() & ~TICK_PRIV_BIT;
 366 }
 367
 368 static unsigned long hbtick_add_tick(unsigned long adj)
 369 {
 370         unsigned long val;
 371
 372         val = __hbird_read_stick() + adj;
 373         __hbird_write_stick(val);
 374
 375         return val;
 376 }
 377
 378 static int hbtick_add_compare(unsigned long adj)
 379 {
 380         unsigned long val = __hbird_read_stick();
 381         unsigned long val2;
 382
 383         val &= ~TICKCMP_IRQ_BIT;
 384         val += adj;
 385         __hbird_write_compare(val);
 386
 387         val2 = __hbird_read_stick() & ~TICKCMP_IRQ_BIT;
 388
 389         return ((long)(val2 - val)) > 0L;
 390 }
 391
 392 static struct sparc64_tick_ops hbtick_operations __read_mostly = {
 393         .name           =       "hbtick",
 394         .init_tick      =       hbtick_init_tick,
 395         .disable_irq    =       hbtick_disable_irq,
 396         .get_tick       =       hbtick_get_tick,
 397         .add_tick       =       hbtick_add_tick,
 398         .add_compare    =       hbtick_add_compare,
 399         .softint_mask   =       1UL << 0,
 400 };
 401
 402 static unsigned long timer_ticks_per_nsec_quotient __read_mostly;
 403
 404 int update_persistent_clock(struct timespec now)
 405 {
 406         return set_rtc_mmss(now.tv_sec);
 407 }
 408
 409 /* Kick start a stopped clock (procedure from the Sun NVRAM/hostid FAQ). */
 410 static void __init kick_start_clock(void)
 411 {
 412         void __iomem *regs = mstk48t02_regs;
 413         u8 sec, tmp;
 414         int i, count;
 415
 416         prom_printf("CLOCK: Clock was stopped. Kick start ");
 417
 418         spin_lock_irq(&mostek_lock);
 419
 420         /* Turn on the kick start bit to start the oscillator. */
 421         tmp = mostek_read(regs + MOSTEK_CREG);
 422         tmp |= MSTK_CREG_WRITE;
 423         mostek_write(regs + MOSTEK_CREG, tmp);
 424         tmp = mostek_read(regs + MOSTEK_SEC);
 425         tmp &= ~MSTK_STOP;
 426         mostek_write(regs + MOSTEK_SEC, tmp);
 427         tmp = mostek_read(regs + MOSTEK_HOUR);
 428         tmp |= MSTK_KICK_START;
 429         mostek_write(regs + MOSTEK_HOUR, tmp);
 430         tmp = mostek_read(regs + MOSTEK_CREG);
 431         tmp &= ~MSTK_CREG_WRITE;
 432         mostek_write(regs + MOSTEK_CREG, tmp);
 433
 434         spin_unlock_irq(&mostek_lock);
 435
 436         /* Delay to allow the clock oscillator to start. */
 437         sec = MSTK_REG_SEC(regs);
 438         for (i = 0; i < 3; i++) {
 439                 while (sec == MSTK_REG_SEC(regs))
 440                         for (count = 0; count < 100000; count++)
 441                                 /* nothing */ ;
 442                 prom_printf(".");
 443                 sec = MSTK_REG_SEC(regs);
 444         }
 445         prom_printf("\n");
 446
 447         spin_lock_irq(&mostek_lock);
 448
 449         /* Turn off kick start and set a "valid" time and date. */
 450         tmp = mostek_read(regs + MOSTEK_CREG);
 451         tmp |= MSTK_CREG_WRITE;
 452         mostek_write(regs + MOSTEK_CREG, tmp);
 453         tmp = mostek_read(regs + MOSTEK_HOUR);
 454         tmp &= ~MSTK_KICK_START;
 455         mostek_write(regs + MOSTEK_HOUR, tmp);
 456         MSTK_SET_REG_SEC(regs,0);
 457         MSTK_SET_REG_MIN(regs,0);
 458         MSTK_SET_REG_HOUR(regs,0);
 459         MSTK_SET_REG_DOW(regs,5);
 460         MSTK_SET_REG_DOM(regs,1);
 461         MSTK_SET_REG_MONTH(regs,8);
 462         MSTK_SET_REG_YEAR(regs,1996 - MSTK_YEAR_ZERO);
 463         tmp = mostek_read(regs + MOSTEK_CREG);
 464         tmp &= ~MSTK_CREG_WRITE;
 465         mostek_write(regs + MOSTEK_CREG, tmp);
 466
 467         spin_unlock_irq(&mostek_lock);
 468
 469         /* Ensure the kick start bit is off. If it isn't, turn it off. */
 470         while (mostek_read(regs + MOSTEK_HOUR) & MSTK_KICK_START) {
 471                 prom_printf("CLOCK: Kick start still on!\n");
 472
 473                 spin_lock_irq(&mostek_lock);
 474
 475                 tmp = mostek_read(regs + MOSTEK_CREG);
 476                 tmp |= MSTK_CREG_WRITE;
 477                 mostek_write(regs + MOSTEK_CREG, tmp);
 478
 479                 tmp = mostek_read(regs + MOSTEK_HOUR);
 480                 tmp &= ~MSTK_KICK_START;
 481                 mostek_write(regs + MOSTEK_HOUR, tmp);
 482
 483                 tmp = mostek_read(regs + MOSTEK_CREG);
 484                 tmp &= ~MSTK_CREG_WRITE;
 485                 mostek_write(regs + MOSTEK_CREG, tmp);
 486
 487                 spin_unlock_irq(&mostek_lock);
 488         }
 489
 490         prom_printf("CLOCK: Kick start procedure successful.\n");
 491 }
 492
 493 /* Return nonzero if the clock chip battery is low. */
 494 static int __init has_low_battery(void)
 495 {
 496         void __iomem *regs = mstk48t02_regs;
 497         u8 data1, data2;
 498
 499         spin_lock_irq(&mostek_lock);
 500
 501         data1 = mostek_read(regs + MOSTEK_EEPROM);      /* Read some data. */
 502         mostek_write(regs + MOSTEK_EEPROM, ~data1);     /* Write back the complement. */
 503         data2 = mostek_read(regs + MOSTEK_EEPROM);      /* Read back the complement. */
 504         mostek_write(regs + MOSTEK_EEPROM, data1);      /* Restore original value. */
 505
 506         spin_unlock_irq(&mostek_lock);
 507
 508         return (data1 == data2);        /* Was the write blocked? */
 509 }
 510
 511 /* Probe for the real time clock chip. */
 512 static void __init set_system_time(void)
 513 {
 514         unsigned int year, mon, day, hour, min, sec;
 515         void __iomem *mregs = mstk48t02_regs;
 516 #ifdef CONFIG_PCI
 517         unsigned long dregs = ds1287_regs;
 518         void __iomem *bregs = bq4802_regs;
 519 #else
 520         unsigned long dregs = 0UL;
 521         void __iomem *bregs = 0UL;
 522 #endif
 523         u8 tmp;
 524
 525         if (!mregs && !dregs && !bregs) {
 526                 prom_printf("Something wrong, clock regs not mapped yet.\n");
 527                 prom_halt();
 528         }
 529
 530         if (mregs) {
 531                 spin_lock_irq(&mostek_lock);
 532
 533                 /* Traditional Mostek chip. */
 534                 tmp = mostek_read(mregs + MOSTEK_CREG);
 535                 tmp |= MSTK_CREG_READ;
 536                 mostek_write(mregs + MOSTEK_CREG, tmp);
 537
 538                 sec = MSTK_REG_SEC(mregs);
 539                 min = MSTK_REG_MIN(mregs);
 540                 hour = MSTK_REG_HOUR(mregs);
 541                 day = MSTK_REG_DOM(mregs);
 542                 mon = MSTK_REG_MONTH(mregs);
 543                 year = MSTK_CVT_YEAR( MSTK_REG_YEAR(mregs) );
 544         } else if (bregs) {
 545                 unsigned char val = readb(bregs + 0x0e);
 546                 unsigned int century;
 547
 548                 /* BQ4802 RTC chip. */
 549
 550                 writeb(val | 0x08, bregs + 0x0e);
 551
 552                 sec  = readb(bregs + 0x00);
 553                 min  = readb(bregs + 0x02);
 554                 hour = readb(bregs + 0x04);
 555                 day  = readb(bregs + 0x06);
 556                 mon  = readb(bregs + 0x09);
 557                 year = readb(bregs + 0x0a);
 558                 century = readb(bregs + 0x0f);
 559
 560                 writeb(val, bregs + 0x0e);
 561
 562                 BCD_TO_BIN(sec);
 563                 BCD_TO_BIN(min);
 564                 BCD_TO_BIN(hour);
 565                 BCD_TO_BIN(day);
 566                 BCD_TO_BIN(mon);
 567                 BCD_TO_BIN(year);
 568                 BCD_TO_BIN(century);
 569
 570                 year += (century * 100);
 571         } else {
 572                 /* Dallas 12887 RTC chip. */
 573
 574                 do {
 575                         sec  = CMOS_READ(RTC_SECONDS);
 576                         min  = CMOS_READ(RTC_MINUTES);
 577                         hour = CMOS_READ(RTC_HOURS);
 578                         day  = CMOS_READ(RTC_DAY_OF_MONTH);
 579                         mon  = CMOS_READ(RTC_MONTH);
 580                         year = CMOS_READ(RTC_YEAR);
 581                 } while (sec != CMOS_READ(RTC_SECONDS));
 582
 583                 if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
 584                         BCD_TO_BIN(sec);
 585                         BCD_TO_BIN(min);
 586                         BCD_TO_BIN(hour);
 587                         BCD_TO_BIN(day);
 588                         BCD_TO_BIN(mon);
 589                         BCD_TO_BIN(year);
 590                 }
 591                 if ((year += 1900) < 1970)
 592                         year += 100;
 593         }
 594
 595         xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
 596         xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
 597         set_normalized_timespec(&wall_to_monotonic,
 598                                 -xtime.tv_sec, -xtime.tv_nsec);
 599
 600         if (mregs) {
 601                 tmp = mostek_read(mregs + MOSTEK_CREG);
 602                 tmp &= ~MSTK_CREG_READ;
 603                 mostek_write(mregs + MOSTEK_CREG, tmp);
 604
 605                 spin_unlock_irq(&mostek_lock);
 606         }
 607 }
 608
 609 /* davem suggests we keep this within the 4M locked kernel image */
 610 static u32 starfire_get_time(void)
 611 {
 612         static char obp_gettod[32];
 613         static u32 unix_tod;
 614
 615         sprintf(obp_gettod, "h# %08x unix-gettod",
 616                 (unsigned int) (long) &unix_tod);
 617         prom_feval(obp_gettod);
 618
 619         return unix_tod;
 620 }
 621
 622 static int starfire_set_time(u32 val)
 623 {
 624         /* Do nothing, time is set using the service processor
 625          * console on this platform.
 626          */
 627         return 0;
 628 }
 629
 630 static u32 hypervisor_get_time(void)
 631 {
 632         unsigned long ret, time;
 633         int retries = 10000;
 634
 635 retry:
 636         ret = sun4v_tod_get(&time);
 637         if (ret == HV_EOK)
 638                 return time;
 639         if (ret == HV_EWOULDBLOCK) {
 640                 if (--retries > 0) {
 641                         udelay(100);
 642                         goto retry;
 643                 }
 644                 printk(KERN_WARNING "SUN4V: tod_get() timed out.\n");
 645                 return 0;
 646         }
 647         printk(KERN_WARNING "SUN4V: tod_get() not supported.\n");
 648         return 0;
 649 }
 650
 651 static int hypervisor_set_time(u32 secs)
 652 {
 653         unsigned long ret;
 654         int retries = 10000;
 655
 656 retry:
 657         ret = sun4v_tod_set(secs);
 658         if (ret == HV_EOK)
 659                 return 0;
 660         if (ret == HV_EWOULDBLOCK) {
 661                 if (--retries > 0) {
 662                         udelay(100);
 663                         goto retry;
 664                 }
 665                 printk(KERN_WARNING "SUN4V: tod_set() timed out.\n");
 666                 return -EAGAIN;
 667         }
 668         printk(KERN_WARNING "SUN4V: tod_set() not supported.\n");
 669         return -EOPNOTSUPP;
 670 }
 671
 672 static int __init clock_model_matches(const char *model)
 673 {
 674         if (strcmp(model, "mk48t02") &&
 675             strcmp(model, "mk48t08") &&
 676             strcmp(model, "mk48t59") &&
 677             strcmp(model, "m5819") &&
 678             strcmp(model, "m5819p") &&
 679             strcmp(model, "m5823") &&
 680             strcmp(model, "ds1287") &&
 681             strcmp(model, "bq4802"))
 682                 return 0;
 683
 684         return 1;
 685 }
 686
 687 static int __devinit clock_probe(struct of_device *op, const struct of_device_id *match)
 688 {
 689         struct device_node *dp = op->node;
 690         const char *model = of_get_property(dp, "model", NULL);
 691         const char *compat = of_get_property(dp, "compatible", NULL);
 692         unsigned long size, flags;
 693         void __iomem *regs;
 694
 695         if (!model)
 696                 model = compat;
 697
 698         if (!model || !clock_model_matches(model))
 699                 return -ENODEV;
 700
 701         /* On an Enterprise system there can be multiple mostek clocks.
 702          * We should only match the one that is on the central FHC bus.
 703          */
 704         if (!strcmp(dp->parent->name, "fhc") &&
 705             strcmp(dp->parent->parent->name, "central") != 0)
 706                 return -ENODEV;
 707
 708         size = (op->resource[0].end - op->resource[0].start) + 1;
 709         regs = of_ioremap(&op->resource[0], 0, size, "clock");
 710         if (!regs)
 711                 return -ENOMEM;
 712
 713 #ifdef CONFIG_PCI
 714         if (!strcmp(model, "ds1287") ||
 715             !strcmp(model, "m5819") ||
 716             !strcmp(model, "m5819p") ||
 717             !strcmp(model, "m5823")) {
 718                 ds1287_regs = (unsigned long) regs;
 719         } else if (!strcmp(model, "bq4802")) {
 720                 bq4802_regs = regs;
 721         } else
 722 #endif
 723         if (model[5] == '0' && model[6] == '2') {
 724                 mstk48t02_regs = regs;
 725         } else if(model[5] == '0' && model[6] == '8') {
 726                 mstk48t08_regs = regs;
 727                 mstk48t02_regs = mstk48t08_regs + MOSTEK_48T08_48T02;
 728         } else {
 729                 mstk48t59_regs = regs;
 730                 mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02;
 731         }
 732
 733         printk(KERN_INFO "%s: Clock regs at %p\n", dp->full_name, regs);
 734
 735         local_irq_save(flags);
 736
 737         if (mstk48t02_regs != NULL) {
 738                 /* Report a low battery voltage condition. */
 739                 if (has_low_battery())
 740                         prom_printf("NVRAM: Low battery voltage!\n");
 741
 742                 /* Kick start the clock if it is completely stopped. */
 743                 if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
 744                         kick_start_clock();
 745         }
 746
 747         set_system_time();
 748
 749         local_irq_restore(flags);
 750
 751         return 0;
 752 }
 753
 754 static struct of_device_id clock_match[] = {
 755         {
 756                 .name = "eeprom",
 757         },
 758         {
 759                 .name = "rtc",
 760         },
 761         {},
 762 };
 763
 764 static struct of_platform_driver clock_driver = {
 765         .match_table    = clock_match,
 766         .probe          = clock_probe,
 767         .driver         = {
 768                 .name   = "clock",
 769         },
 770 };
 771
 772 static int __init clock_init(void)
 773 {
 774         if (this_is_starfire) {
 775                 xtime.tv_sec = starfire_get_time();
 776                 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
 777                 set_normalized_timespec(&wall_to_monotonic,
 778                                         -xtime.tv_sec, -xtime.tv_nsec);
 779                 return 0;
 780         }
 781         if (tlb_type == hypervisor) {
 782                 xtime.tv_sec = hypervisor_get_time();
 783                 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
 784                 set_normalized_timespec(&wall_to_monotonic,
 785                                         -xtime.tv_sec, -xtime.tv_nsec);
 786                 return 0;
 787         }
 788
 789         return of_register_driver(&clock_driver, &of_platform_bus_type);
 790 }
 791
 792 /* Must be after subsys_initcall() so that busses are probed.  Must
 793  * be before device_initcall() because things like the RTC driver
 794  * need to see the clock registers.
 795  */
 796 fs_initcall(clock_init);
 797
 798 /* This is gets the master TICK_INT timer going. */
 799 static unsigned long sparc64_init_timers(void)
 800 {
 801         struct device_node *dp;
 802         unsigned long clock;
 803
 804         dp = of_find_node_by_path("/");
 805         if (tlb_type == spitfire) {
 806                 unsigned long ver, manuf, impl;
 807
 808                 __asm__ __volatile__ ("rdpr %%ver, %0"
 809                                       : "=&r" (ver));
 810                 manuf = ((ver >> 48) & 0xffff);
 811                 impl = ((ver >> 32) & 0xffff);
 812                 if (manuf == 0x17 && impl == 0x13) {
 813                         /* Hummingbird, aka Ultra-IIe */
 814                         tick_ops = &hbtick_operations;
 815                         clock = of_getintprop_default(dp, "stick-frequency", 0);
 816                 } else {
 817                         tick_ops = &tick_operations;
 818                         clock = local_cpu_data().clock_tick;
 819                 }
 820         } else {
 821                 tick_ops = &stick_operations;
 822                 clock = of_getintprop_default(dp, "stick-frequency", 0);
 823         }
 824
 825         return clock;
 826 }
 827
 828 struct freq_table {
 829         unsigned long clock_tick_ref;
 830         unsigned int ref_freq;
 831 };
 832 static DEFINE_PER_CPU(struct freq_table, sparc64_freq_table) = { 0, 0 };
 833
 834 unsigned long sparc64_get_clock_tick(unsigned int cpu)
 835 {
 836         struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);
 837
 838         if (ft->clock_tick_ref)
 839                 return ft->clock_tick_ref;
 840         return cpu_data(cpu).clock_tick;
 841 }
 842
 843 #ifdef CONFIG_CPU_FREQ
 844
 845 static int sparc64_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
 846                                     void *data)
 847 {
 848         struct cpufreq_freqs *freq = data;
 849         unsigned int cpu = freq->cpu;
 850         struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);
 851
 852         if (!ft->ref_freq) {
 853                 ft->ref_freq = freq->old;
 854                 ft->clock_tick_ref = cpu_data(cpu).clock_tick;
 855         }
 856         if ((val == CPUFREQ_PRECHANGE  && freq->old < freq->new) ||
 857             (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
 858             (val == CPUFREQ_RESUMECHANGE)) {
 859                 cpu_data(cpu).clock_tick =
 860                         cpufreq_scale(ft->clock_tick_ref,
 861                                       ft->ref_freq,
 862                                       freq->new);
 863         }
 864
 865         return 0;
 866 }
 867
 868 static struct notifier_block sparc64_cpufreq_notifier_block = {
 869         .notifier_call  = sparc64_cpufreq_notifier
 870 };
 871
 872 #endif /* CONFIG_CPU_FREQ */
 873
 874 static int sparc64_next_event(unsigned long delta,
 875                               struct clock_event_device *evt)
 876 {
 877         return tick_ops->add_compare(delta) ? -ETIME : 0;
 878 }
 879
 880 static void sparc64_timer_setup(enum clock_event_mode mode,
 881                                 struct clock_event_device *evt)
 882 {
 883         switch (mode) {
 884         case CLOCK_EVT_MODE_ONESHOT:
 885         case CLOCK_EVT_MODE_RESUME:
 886                 break;
 887
 888         case CLOCK_EVT_MODE_SHUTDOWN:
 889                 tick_ops->disable_irq();
 890                 break;
 891
 892         case CLOCK_EVT_MODE_PERIODIC:
 893         case CLOCK_EVT_MODE_UNUSED:
 894                 WARN_ON(1);
 895                 break;
 896         };
 897 }
 898
 899 static struct clock_event_device sparc64_clockevent = {
 900         .features       = CLOCK_EVT_FEAT_ONESHOT,
 901         .set_mode       = sparc64_timer_setup,
 902         .set_next_event = sparc64_next_event,
 903         .rating         = 100,
 904         .shift          = 30,
 905         .irq            = -1,
 906 };
 907 static DEFINE_PER_CPU(struct clock_event_device, sparc64_events);
 908
 909 void timer_interrupt(int irq, struct pt_regs *regs)
 910 {
 911         struct pt_regs *old_regs = set_irq_regs(regs);
 912         unsigned long tick_mask = tick_ops->softint_mask;
 913         int cpu = smp_processor_id();
 914         struct clock_event_device *evt = &per_cpu(sparc64_events, cpu);
 915
 916         clear_softint(tick_mask);
 917
 918         irq_enter();
 919
 920         kstat_this_cpu.irqs[0]++;
 921
 922         if (unlikely(!evt->event_handler)) {
 923                 printk(KERN_WARNING
 924                        "Spurious SPARC64 timer interrupt on cpu %d\n", cpu);
 925         } else
 926                 evt->event_handler(evt);
 927
 928         irq_exit();
 929
 930         set_irq_regs(old_regs);
 931 }
 932
 933 void __devinit setup_sparc64_timer(void)
 934 {
 935         struct clock_event_device *sevt;
 936         unsigned long pstate;
 937
 938         /* Guarantee that the following sequences execute
 939          * uninterrupted.
 940          */
 941         __asm__ __volatile__("rdpr      %%pstate, %0\n\t"
 942                              "wrpr      %0, %1, %%pstate"
 943                              : "=r" (pstate)
 944                              : "i" (PSTATE_IE));
 945
 946         tick_ops->init_tick();
 947
 948         /* Restore PSTATE_IE. */
 949         __asm__ __volatile__("wrpr      %0, 0x0, %%pstate"
 950                              : /* no outputs */
 951                              : "r" (pstate));
 952
 953         sevt = &__get_cpu_var(sparc64_events);
 954
 955         memcpy(sevt, &sparc64_clockevent, sizeof(*sevt));
 956         sevt->cpumask = cpumask_of_cpu(smp_processor_id());
 957
 958         clockevents_register_device(sevt);
 959 }
 960
 961 #define SPARC64_NSEC_PER_CYC_SHIFT      10UL
 962
 963 static struct clocksource clocksource_tick = {
 964         .rating         = 100,
 965         .mask           = CLOCKSOURCE_MASK(64),
 966         .shift          = 16,
 967         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
 968 };
 969
 970 static void __init setup_clockevent_multiplier(unsigned long hz)
 971 {
 972         unsigned long mult, shift = 32;
 973
 974         while (1) {
 975                 mult = div_sc(hz, NSEC_PER_SEC, shift);
 976                 if (mult && (mult >> 32UL) == 0UL)
 977                         break;
 978
 979                 shift--;
 980         }
 981
 982         sparc64_clockevent.shift = shift;
 983         sparc64_clockevent.mult = mult;
 984 }
 985
 986 static unsigned long tb_ticks_per_usec __read_mostly;
 987
 988 void __delay(unsigned long loops)
 989 {
 990         unsigned long bclock, now;
 991
 992         bclock = tick_ops->get_tick();
 993         do {
 994                 now = tick_ops->get_tick();
 995         } while ((now-bclock) < loops);
 996 }
 997 EXPORT_SYMBOL(__delay);
 998
 999 void udelay(unsigned long usecs)
1000 {
1001         __delay(tb_ticks_per_usec * usecs);
1002 }
1003 EXPORT_SYMBOL(udelay);
1004
1005 void __init time_init(void)
1006 {
1007         unsigned long clock = sparc64_init_timers();
1008
1009         tb_ticks_per_usec = clock / USEC_PER_SEC;
1010
1011         timer_ticks_per_nsec_quotient =
1012                 clocksource_hz2mult(clock, SPARC64_NSEC_PER_CYC_SHIFT);
1013
1014         clocksource_tick.name = tick_ops->name;
1015         clocksource_tick.mult =
1016                 clocksource_hz2mult(clock,
1017                                     clocksource_tick.shift);
1018         clocksource_tick.read = tick_ops->get_tick;
1019
1020         printk("clocksource: mult[%x] shift[%d]\n",
1021                clocksource_tick.mult, clocksource_tick.shift);
1022
1023         clocksource_register(&clocksource_tick);
1024
1025         sparc64_clockevent.name = tick_ops->name;
1026
1027         setup_clockevent_multiplier(clock);
1028
1029         sparc64_clockevent.max_delta_ns =
1030                 clockevent_delta2ns(0x7fffffffffffffff, &sparc64_clockevent);
1031         sparc64_clockevent.min_delta_ns =
1032                 clockevent_delta2ns(0xF, &sparc64_clockevent);
1033
1034         printk("clockevent: mult[%lx] shift[%d]\n",
1035                sparc64_clockevent.mult, sparc64_clockevent.shift);
1036
1037         setup_sparc64_timer();
1038
1039 #ifdef CONFIG_CPU_FREQ
1040         cpufreq_register_notifier(&sparc64_cpufreq_notifier_block,
1041                                   CPUFREQ_TRANSITION_NOTIFIER);
1042 #endif
1043 }
1044
1045 unsigned long long sched_clock(void)
1046 {
1047         unsigned long ticks = tick_ops->get_tick();
1048
1049         return (ticks * timer_ticks_per_nsec_quotient)
1050                 >> SPARC64_NSEC_PER_CYC_SHIFT;
1051 }
1052
1053 static int set_rtc_mmss(unsigned long nowtime)
1054 {
1055         int real_seconds, real_minutes, chip_minutes;
1056         void __iomem *mregs = mstk48t02_regs;
1057 #ifdef CONFIG_PCI
1058         unsigned long dregs = ds1287_regs;
1059         void __iomem *bregs = bq4802_regs;
1060 #else
1061         unsigned long dregs = 0UL;
1062         void __iomem *bregs = 0UL;
1063 #endif
1064         unsigned long flags;
1065         u8 tmp;
1066
1067         /*
1068          * Not having a register set can lead to trouble.
1069          * Also starfire doesn't have a tod clock.
1070          */
1071         if (!mregs && !dregs && !bregs)
1072                 return -1;
1073
1074         if (mregs) {
1075                 spin_lock_irqsave(&mostek_lock, flags);
1076
1077                 /* Read the current RTC minutes. */
1078                 tmp = mostek_read(mregs + MOSTEK_CREG);
1079                 tmp |= MSTK_CREG_READ;
1080                 mostek_write(mregs + MOSTEK_CREG, tmp);
1081
1082                 chip_minutes = MSTK_REG_MIN(mregs);
1083
1084                 tmp = mostek_read(mregs + MOSTEK_CREG);
1085                 tmp &= ~MSTK_CREG_READ;
1086                 mostek_write(mregs + MOSTEK_CREG, tmp);
1087
1088                 /*
1089                  * since we're only adjusting minutes and seconds,
1090                  * don't interfere with hour overflow. This avoids
1091                  * messing with unknown time zones but requires your
1092                  * RTC not to be off by more than 15 minutes
1093                  */
1094                 real_seconds = nowtime % 60;
1095                 real_minutes = nowtime / 60;
1096                 if (((abs(real_minutes - chip_minutes) + 15)/30) & 1)
1097                         real_minutes += 30;     /* correct for half hour time zone */
1098                 real_minutes %= 60;
1099
1100                 if (abs(real_minutes - chip_minutes) < 30) {
1101                         tmp = mostek_read(mregs + MOSTEK_CREG);
1102                         tmp |= MSTK_CREG_WRITE;
1103                         mostek_write(mregs + MOSTEK_CREG, tmp);
1104
1105                         MSTK_SET_REG_SEC(mregs,real_seconds);
1106                         MSTK_SET_REG_MIN(mregs,real_minutes);
1107
1108                         tmp = mostek_read(mregs + MOSTEK_CREG);
1109                         tmp &= ~MSTK_CREG_WRITE;
1110                         mostek_write(mregs + MOSTEK_CREG, tmp);
1111
1112                         spin_unlock_irqrestore(&mostek_lock, flags);
1113
1114                         return 0;
1115                 } else {
1116                         spin_unlock_irqrestore(&mostek_lock, flags);
1117
1118                         return -1;
1119                 }
1120         } else if (bregs) {
1121                 int retval = 0;
1122                 unsigned char val = readb(bregs + 0x0e);
1123
1124                 /* BQ4802 RTC chip. */
1125
1126                 writeb(val | 0x08, bregs + 0x0e);
1127
1128                 chip_minutes = readb(bregs + 0x02);
1129                 BCD_TO_BIN(chip_minutes);
1130                 real_seconds = nowtime % 60;
1131                 real_minutes = nowtime / 60;
1132                 if (((abs(real_minutes - chip_minutes) + 15)/30) & 1)
1133                         real_minutes += 30;
1134                 real_minutes %= 60;
1135
1136                 if (abs(real_minutes - chip_minutes) < 30) {
1137                         BIN_TO_BCD(real_seconds);
1138                         BIN_TO_BCD(real_minutes);
1139                         writeb(real_seconds, bregs + 0x00);
1140                         writeb(real_minutes, bregs + 0x02);
1141                 } else {
1142                         printk(KERN_WARNING
1143                                "set_rtc_mmss: can't update from %d to %d\n",
1144                                chip_minutes, real_minutes);
1145                         retval = -1;
1146                 }
1147
1148                 writeb(val, bregs + 0x0e);
1149
1150                 return retval;
1151         } else {
1152                 int retval = 0;
1153                 unsigned char save_control, save_freq_select;
1154
1155                 /* Stolen from arch/i386/kernel/time.c, see there for
1156                  * credits and descriptive comments.
1157                  */
1158                 spin_lock_irqsave(&rtc_lock, flags);
1159                 save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being set */
1160                 CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
1161
1162                 save_freq_select = CMOS_READ(RTC_FREQ_SELECT); /* stop and reset prescaler */
1163                 CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
1164
1165                 chip_minutes = CMOS_READ(RTC_MINUTES);
1166                 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
1167                         BCD_TO_BIN(chip_minutes);
1168                 real_seconds = nowtime % 60;
1169                 real_minutes = nowtime / 60;
1170                 if (((abs(real_minutes - chip_minutes) + 15)/30) & 1)
1171                         real_minutes += 30;
1172                 real_minutes %= 60;
1173
1174                 if (abs(real_minutes - chip_minutes) < 30) {
1175                         if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
1176                                 BIN_TO_BCD(real_seconds);
1177                                 BIN_TO_BCD(real_minutes);
1178                         }
1179                         CMOS_WRITE(real_seconds,RTC_SECONDS);
1180                         CMOS_WRITE(real_minutes,RTC_MINUTES);
1181                 } else {
1182                         printk(KERN_WARNING
1183                                "set_rtc_mmss: can't update from %d to %d\n",
1184                                chip_minutes, real_minutes);
1185                         retval = -1;
1186                 }
1187
1188                 CMOS_WRITE(save_control, RTC_CONTROL);
1189                 CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
1190                 spin_unlock_irqrestore(&rtc_lock, flags);
1191
1192                 return retval;
1193         }
1194 }
1195
1196 #define RTC_IS_OPEN             0x01    /* means /dev/rtc is in use     */
1197 static unsigned char mini_rtc_status;   /* bitmapped status byte.       */
1198
1199 #define FEBRUARY        2
1200 #define STARTOFTIME     1970
1201 #define SECDAY          86400L
1202 #define SECYR           (SECDAY * 365)
1203 #define leapyear(year)          ((year) % 4 == 0 && \
1204                                  ((year) % 100 != 0 || (year) % 400 == 0))
1205 #define days_in_year(a)         (leapyear(a) ? 366 : 365)
1206 #define days_in_month(a)        (month_days[(a) - 1])
1207
1208 static int month_days[12] = {
1209         31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31
1210 };
1211
1212 /*
1213  * This only works for the Gregorian calendar - i.e. after 1752 (in the UK)
1214  */
1215 static void GregorianDay(struct rtc_time * tm)
1216 {
1217         int leapsToDate;
1218         int lastYear;
1219         int day;
1220         int MonthOffset[] = { 0, 31, 59, 90, 120, 151, 181, 212, 243, 273, 304, 334 };
1221
1222         lastYear = tm->tm_year - 1;
1223
1224         /*
1225          * Number of leap corrections to apply up to end of last year
1226          */
1227         leapsToDate = lastYear / 4 - lastYear / 100 + lastYear / 400;
1228
1229         /*
1230          * This year is a leap year if it is divisible by 4 except when it is
1231          * divisible by 100 unless it is divisible by 400
1232          *
1233          * e.g. 1904 was a leap year, 1900 was not, 1996 is, and 2000 was
1234          */
1235         day = tm->tm_mon > 2 && leapyear(tm->tm_year);
1236
1237         day += lastYear*365 + leapsToDate + MonthOffset[tm->tm_mon-1] +
1238                    tm->tm_mday;
1239
1240         tm->tm_wday = day % 7;
1241 }
1242
1243 static void to_tm(int tim, struct rtc_time *tm)
1244 {
1245         register int    i;
1246         register long   hms, day;
1247
1248         day = tim / SECDAY;
1249         hms = tim % SECDAY;
1250
1251         /* Hours, minutes, seconds are easy */
1252         tm->tm_hour = hms / 3600;
1253         tm->tm_min = (hms % 3600) / 60;
1254         tm->tm_sec = (hms % 3600) % 60;
1255
1256         /* Number of years in days */
1257         for (i = STARTOFTIME; day >= days_in_year(i); i++)
1258                 day -= days_in_year(i);
1259         tm->tm_year = i;
1260
1261         /* Number of months in days left */
1262         if (leapyear(tm->tm_year))
1263                 days_in_month(FEBRUARY) = 29;
1264         for (i = 1; day >= days_in_month(i); i++)
1265                 day -= days_in_month(i);
1266         days_in_month(FEBRUARY) = 28;
1267         tm->tm_mon = i;
1268
1269         /* Days are what is left over (+1) from all that. */
1270         tm->tm_mday = day + 1;
1271
1272         /*
1273          * Determine the day of week
1274          */
1275         GregorianDay(tm);
1276 }
1277
1278 /* Both Starfire and SUN4V give us seconds since Jan 1st, 1970,
1279  * aka Unix time.  So we have to convert to/from rtc_time.
1280  */
1281 static void starfire_get_rtc_time(struct rtc_time *time)
1282 {
1283         u32 seconds = starfire_get_time();
1284
1285         to_tm(seconds, time);
1286         time->tm_year -= 1900;
1287         time->tm_mon -= 1;
1288 }
1289
1290 static int starfire_set_rtc_time(struct rtc_time *time)
1291 {
1292         u32 seconds = mktime(time->tm_year + 1900, time->tm_mon + 1,
1293                              time->tm_mday, time->tm_hour,
1294                              time->tm_min, time->tm_sec);
1295
1296         return starfire_set_time(seconds);
1297 }
1298
1299 static void hypervisor_get_rtc_time(struct rtc_time *time)
1300 {
1301         u32 seconds = hypervisor_get_time();
1302
1303         to_tm(seconds, time);
1304         time->tm_year -= 1900;
1305         time->tm_mon -= 1;
1306 }
1307
1308 static int hypervisor_set_rtc_time(struct rtc_time *time)
1309 {
1310         u32 seconds = mktime(time->tm_year + 1900, time->tm_mon + 1,
1311                              time->tm_mday, time->tm_hour,
1312                              time->tm_min, time->tm_sec);
1313
1314         return hypervisor_set_time(seconds);
1315 }
1316
1317 #ifdef CONFIG_PCI
1318 static void bq4802_get_rtc_time(struct rtc_time *time)
1319 {
1320         unsigned char val = readb(bq4802_regs + 0x0e);
1321         unsigned int century;
1322
1323         writeb(val | 0x08, bq4802_regs + 0x0e);
1324
1325         time->tm_sec = readb(bq4802_regs + 0x00);
1326         time->tm_min = readb(bq4802_regs + 0x02);
1327         time->tm_hour = readb(bq4802_regs + 0x04);
1328         time->tm_mday = readb(bq4802_regs + 0x06);
1329         time->tm_mon = readb(bq4802_regs + 0x09);
1330         time->tm_year = readb(bq4802_regs + 0x0a);
1331         time->tm_wday = readb(bq4802_regs + 0x08);
1332         century = readb(bq4802_regs + 0x0f);
1333
1334         writeb(val, bq4802_regs + 0x0e);
1335
1336         BCD_TO_BIN(time->tm_sec);
1337         BCD_TO_BIN(time->tm_min);
1338         BCD_TO_BIN(time->tm_hour);
1339         BCD_TO_BIN(time->tm_mday);
1340         BCD_TO_BIN(time->tm_mon);
1341         BCD_TO_BIN(time->tm_year);
1342         BCD_TO_BIN(time->tm_wday);
1343         BCD_TO_BIN(century);
1344
1345         time->tm_year += (century * 100);
1346         time->tm_year -= 1900;
1347
1348         time->tm_mon--;
1349 }
1350
1351 static int bq4802_set_rtc_time(struct rtc_time *time)
1352 {
1353         unsigned char val = readb(bq4802_regs + 0x0e);
1354         unsigned char sec, min, hrs, day, mon, yrs, century;
1355         unsigned int year;
1356
1357         year = time->tm_year + 1900;
1358         century = year / 100;
1359         yrs = year % 100;
1360
1361         mon = time->tm_mon + 1;   /* tm_mon starts at zero */
1362         day = time->tm_mday;
1363         hrs = time->tm_hour;
1364         min = time->tm_min;
1365         sec = time->tm_sec;
1366
1367         BIN_TO_BCD(sec);
1368         BIN_TO_BCD(min);
1369         BIN_TO_BCD(hrs);
1370         BIN_TO_BCD(day);
1371         BIN_TO_BCD(mon);
1372         BIN_TO_BCD(yrs);
1373         BIN_TO_BCD(century);
1374
1375         writeb(val | 0x08, bq4802_regs + 0x0e);
1376
1377         writeb(sec, bq4802_regs + 0x00);
1378         writeb(min, bq4802_regs + 0x02);
1379         writeb(hrs, bq4802_regs + 0x04);
1380         writeb(day, bq4802_regs + 0x06);
1381         writeb(mon, bq4802_regs + 0x09);
1382         writeb(yrs, bq4802_regs + 0x0a);
1383         writeb(century, bq4802_regs + 0x0f);
1384
1385         writeb(val, bq4802_regs + 0x0e);
1386
1387         return 0;
1388 }
1389
1390 static void cmos_get_rtc_time(struct rtc_time *rtc_tm)
1391 {
1392         unsigned char ctrl;
1393
1394         rtc_tm->tm_sec = CMOS_READ(RTC_SECONDS);
1395         rtc_tm->tm_min = CMOS_READ(RTC_MINUTES);
1396         rtc_tm->tm_hour = CMOS_READ(RTC_HOURS);
1397         rtc_tm->tm_mday = CMOS_READ(RTC_DAY_OF_MONTH);
1398         rtc_tm->tm_mon = CMOS_READ(RTC_MONTH);
1399         rtc_tm->tm_year = CMOS_READ(RTC_YEAR);
1400         rtc_tm->tm_wday = CMOS_READ(RTC_DAY_OF_WEEK);
1401
1402         ctrl = CMOS_READ(RTC_CONTROL);
1403         if (!(ctrl & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
1404                 BCD_TO_BIN(rtc_tm->tm_sec);
1405                 BCD_TO_BIN(rtc_tm->tm_min);
1406                 BCD_TO_BIN(rtc_tm->tm_hour);
1407                 BCD_TO_BIN(rtc_tm->tm_mday);
1408                 BCD_TO_BIN(rtc_tm->tm_mon);
1409                 BCD_TO_BIN(rtc_tm->tm_year);
1410                 BCD_TO_BIN(rtc_tm->tm_wday);
1411         }
1412
1413         if (rtc_tm->tm_year <= 69)
1414                 rtc_tm->tm_year += 100;
1415
1416         rtc_tm->tm_mon--;
1417 }
1418
1419 static int cmos_set_rtc_time(struct rtc_time *rtc_tm)
1420 {
1421         unsigned char mon, day, hrs, min, sec;
1422         unsigned char save_control, save_freq_select;
1423         unsigned int yrs;
1424
1425         yrs = rtc_tm->tm_year;
1426         mon = rtc_tm->tm_mon + 1;
1427         day = rtc_tm->tm_mday;
1428         hrs = rtc_tm->tm_hour;
1429         min = rtc_tm->tm_min;
1430         sec = rtc_tm->tm_sec;
1431
1432         if (yrs >= 100)
1433                 yrs -= 100;
1434
1435         if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
1436                 BIN_TO_BCD(sec);
1437                 BIN_TO_BCD(min);
1438                 BIN_TO_BCD(hrs);
1439                 BIN_TO_BCD(day);
1440                 BIN_TO_BCD(mon);
1441                 BIN_TO_BCD(yrs);
1442         }
1443
1444         save_control = CMOS_READ(RTC_CONTROL);
1445         CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
1446         save_freq_select = CMOS_READ(RTC_FREQ_SELECT);
1447         CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
1448
1449         CMOS_WRITE(yrs, RTC_YEAR);
1450         CMOS_WRITE(mon, RTC_MONTH);
1451         CMOS_WRITE(day, RTC_DAY_OF_MONTH);
1452         CMOS_WRITE(hrs, RTC_HOURS);
1453         CMOS_WRITE(min, RTC_MINUTES);
1454         CMOS_WRITE(sec, RTC_SECONDS);
1455
1456         CMOS_WRITE(save_control, RTC_CONTROL);
1457         CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
1458
1459         return 0;
1460 }
1461 #endif /* CONFIG_PCI */
1462
1463 static void mostek_get_rtc_time(struct rtc_time *rtc_tm)
1464 {
1465         void __iomem *regs = mstk48t02_regs;
1466         u8 tmp;
1467
1468         spin_lock_irq(&mostek_lock);
1469
1470         tmp = mostek_read(regs + MOSTEK_CREG);
1471         tmp |= MSTK_CREG_READ;
1472         mostek_write(regs + MOSTEK_CREG, tmp);
1473
1474         rtc_tm->tm_sec = MSTK_REG_SEC(regs);
1475         rtc_tm->tm_min = MSTK_REG_MIN(regs);
1476         rtc_tm->tm_hour = MSTK_REG_HOUR(regs);
1477         rtc_tm->tm_mday = MSTK_REG_DOM(regs);
1478         rtc_tm->tm_mon = MSTK_REG_MONTH(regs);
1479         rtc_tm->tm_year = MSTK_CVT_YEAR( MSTK_REG_YEAR(regs) );
1480         rtc_tm->tm_wday = MSTK_REG_DOW(regs);
1481
1482         tmp = mostek_read(regs + MOSTEK_CREG);
1483         tmp &= ~MSTK_CREG_READ;
1484         mostek_write(regs + MOSTEK_CREG, tmp);
1485
1486         spin_unlock_irq(&mostek_lock);
1487
1488         rtc_tm->tm_mon--;
1489         rtc_tm->tm_wday--;
1490         rtc_tm->tm_year -= 1900;
1491 }
1492
1493 static int mostek_set_rtc_time(struct rtc_time *rtc_tm)
1494 {
1495         unsigned char mon, day, hrs, min, sec, wday;
1496         void __iomem *regs = mstk48t02_regs;
1497         unsigned int yrs;
1498         u8 tmp;
1499
1500         yrs = rtc_tm->tm_year + 1900;
1501         mon = rtc_tm->tm_mon + 1;
1502         day = rtc_tm->tm_mday;
1503         wday = rtc_tm->tm_wday + 1;
1504         hrs = rtc_tm->tm_hour;
1505         min = rtc_tm->tm_min;
1506         sec = rtc_tm->tm_sec;
1507
1508         spin_lock_irq(&mostek_lock);
1509
1510         tmp = mostek_read(regs + MOSTEK_CREG);
1511         tmp |= MSTK_CREG_WRITE;
1512         mostek_write(regs + MOSTEK_CREG, tmp);
1513
1514         MSTK_SET_REG_SEC(regs, sec);
1515         MSTK_SET_REG_MIN(regs, min);
1516         MSTK_SET_REG_HOUR(regs, hrs);
1517         MSTK_SET_REG_DOW(regs, wday);
1518         MSTK_SET_REG_DOM(regs, day);
1519         MSTK_SET_REG_MONTH(regs, mon);
1520         MSTK_SET_REG_YEAR(regs, yrs - MSTK_YEAR_ZERO);
1521
1522         tmp = mostek_read(regs + MOSTEK_CREG);
1523         tmp &= ~MSTK_CREG_WRITE;
1524         mostek_write(regs + MOSTEK_CREG, tmp);
1525
1526         spin_unlock_irq(&mostek_lock);
1527
1528         return 0;
1529 }
1530
1531 struct mini_rtc_ops {
1532         void (*get_rtc_time)(struct rtc_time *);
1533         int (*set_rtc_time)(struct rtc_time *);
1534 };
1535
1536 static struct mini_rtc_ops starfire_rtc_ops = {
1537         .get_rtc_time = starfire_get_rtc_time,
1538         .set_rtc_time = starfire_set_rtc_time,
1539 };
1540
1541 static struct mini_rtc_ops hypervisor_rtc_ops = {
1542         .get_rtc_time = hypervisor_get_rtc_time,
1543         .set_rtc_time = hypervisor_set_rtc_time,
1544 };
1545
1546 #ifdef CONFIG_PCI
1547 static struct mini_rtc_ops bq4802_rtc_ops = {
1548         .get_rtc_time = bq4802_get_rtc_time,
1549         .set_rtc_time = bq4802_set_rtc_time,
1550 };
1551
1552 static struct mini_rtc_ops cmos_rtc_ops = {
1553         .get_rtc_time = cmos_get_rtc_time,
1554         .set_rtc_time = cmos_set_rtc_time,
1555 };
1556 #endif /* CONFIG_PCI */
1557
1558 static struct mini_rtc_ops mostek_rtc_ops = {
1559         .get_rtc_time = mostek_get_rtc_time,
1560         .set_rtc_time = mostek_set_rtc_time,
1561 };
1562
1563 static struct mini_rtc_ops *mini_rtc_ops;
1564
1565 static inline void mini_get_rtc_time(struct rtc_time *time)
1566 {
1567         unsigned long flags;
1568
1569         spin_lock_irqsave(&rtc_lock, flags);
1570         mini_rtc_ops->get_rtc_time(time);
1571         spin_unlock_irqrestore(&rtc_lock, flags);
1572 }
1573
1574 static inline int mini_set_rtc_time(struct rtc_time *time)
1575 {
1576         unsigned long flags;
1577         int err;
1578
1579         spin_lock_irqsave(&rtc_lock, flags);
1580         err = mini_rtc_ops->set_rtc_time(time);
1581         spin_unlock_irqrestore(&rtc_lock, flags);
1582
1583         return err;
1584 }
1585
1586 static int mini_rtc_ioctl(struct inode *inode, struct file *file,
1587                           unsigned int cmd, unsigned long arg)
1588 {
1589         struct rtc_time wtime;
1590         void __user *argp = (void __user *)arg;
1591
1592         switch (cmd) {
1593
1594         case RTC_PLL_GET:
1595                 return -EINVAL;
1596
1597         case RTC_PLL_SET:
1598                 return -EINVAL;
1599
1600         case RTC_UIE_OFF:       /* disable ints from RTC updates.       */
1601                 return 0;
1602
1603         case RTC_UIE_ON:        /* enable ints for RTC updates. */
1604                 return -EINVAL;
1605
1606         case RTC_RD_TIME:       /* Read the time/date from RTC  */
1607                 /* this doesn't get week-day, who cares */
1608                 memset(&wtime, 0, sizeof(wtime));
1609                 mini_get_rtc_time(&wtime);
1610
1611                 return copy_to_user(argp, &wtime, sizeof(wtime)) ? -EFAULT : 0;
1612
1613         case RTC_SET_TIME:      /* Set the RTC */
1614             {
1615                 int year, days;
1616
1617                 if (!capable(CAP_SYS_TIME))
1618                         return -EACCES;
1619
1620                 if (copy_from_user(&wtime, argp, sizeof(wtime)))
1621                         return -EFAULT;
1622
1623                 year = wtime.tm_year + 1900;
1624                 days = month_days[wtime.tm_mon] +
1625                        ((wtime.tm_mon == 1) && leapyear(year));
1626
1627                 if ((wtime.tm_mon < 0 || wtime.tm_mon > 11) ||
1628                     (wtime.tm_mday < 1))
1629                         return -EINVAL;
1630
1631                 if (wtime.tm_mday < 0 || wtime.tm_mday > days)
1632                         return -EINVAL;
1633
1634                 if (wtime.tm_hour < 0 || wtime.tm_hour >= 24 ||
1635                     wtime.tm_min < 0 || wtime.tm_min >= 60 ||
1636                     wtime.tm_sec < 0 || wtime.tm_sec >= 60)
1637                         return -EINVAL;
1638
1639                 return mini_set_rtc_time(&wtime);
1640             }
1641         }
1642
1643         return -EINVAL;
1644 }
1645
1646 static int mini_rtc_open(struct inode *inode, struct file *file)
1647 {
1648         if (mini_rtc_status & RTC_IS_OPEN)
1649                 return -EBUSY;
1650
1651         mini_rtc_status |= RTC_IS_OPEN;
1652
1653         return 0;
1654 }
1655
1656 static int mini_rtc_release(struct inode *inode, struct file *file)
1657 {
1658         mini_rtc_status &= ~RTC_IS_OPEN;
1659         return 0;
1660 }
1661
1662
1663 static const struct file_operations mini_rtc_fops = {
1664         .owner          = THIS_MODULE,
1665         .ioctl          = mini_rtc_ioctl,
1666         .open           = mini_rtc_open,
1667         .release        = mini_rtc_release,
1668 };
1669
1670 static struct miscdevice rtc_mini_dev =
1671 {
1672         .minor          = RTC_MINOR,
1673         .name           = "rtc",
1674         .fops           = &mini_rtc_fops,
1675 };
1676
1677 static int __init rtc_mini_init(void)
1678 {
1679         int retval;
1680
1681         if (tlb_type == hypervisor)
1682                 mini_rtc_ops = &hypervisor_rtc_ops;
1683         else if (this_is_starfire)
1684                 mini_rtc_ops = &starfire_rtc_ops;
1685 #ifdef CONFIG_PCI
1686         else if (bq4802_regs)
1687                 mini_rtc_ops = &bq4802_rtc_ops;
1688         else if (ds1287_regs)
1689                 mini_rtc_ops = &cmos_rtc_ops;
1690 #endif /* CONFIG_PCI */
1691         else if (mstk48t02_regs)
1692                 mini_rtc_ops = &mostek_rtc_ops;
1693         else
1694                 return -ENODEV;
1695
1696         printk(KERN_INFO "Mini RTC Driver\n");
1697
1698         retval = misc_register(&rtc_mini_dev);
1699         if (retval < 0)
1700                 return retval;
1701
1702         return 0;
1703 }
1704
1705 static void __exit rtc_mini_exit(void)
1706 {
1707         misc_deregister(&rtc_mini_dev);
1708 }
1709
1710 int __devinit read_current_timer(unsigned long *timer_val)
1711 {
1712         *timer_val = tick_ops->get_tick();
1713         return 0;
1714 }
1715
1716 module_init(rtc_mini_init);
1717 module_exit(rtc_mini_exit);