arch/sparc64/kernel/prom.c

   1 /*
   2  * Procedures for creating, accessing and interpreting the device tree.
   3  *
   4  * Paul Mackerras       August 1996.
   5  * Copyright (C) 1996-2005 Paul Mackerras.
   6  *
   7  *  Adapted for 64bit PowerPC by Dave Engebretsen and Peter Bergner.
   8  *    {engebret|bergner}@us.ibm.com
   9  *
  10  *  Adapted for sparc64 by David S. Miller davem@davemloft.net
  11  *
  12  *      This program is free software; you can redistribute it and/or
  13  *      modify it under the terms of the GNU General Public License
  14  *      as published by the Free Software Foundation; either version
  15  *      2 of the License, or (at your option) any later version.
  16  */
  17
  18 #include <linux/kernel.h>
  19 #include <linux/types.h>
  20 #include <linux/string.h>
  21 #include <linux/mm.h>
  22 #include <linux/bootmem.h>
  23 #include <linux/module.h>
  24
  25 #include <asm/prom.h>
  26 #include <asm/of_device.h>
  27 #include <asm/oplib.h>
  28 #include <asm/irq.h>
  29 #include <asm/asi.h>
  30 #include <asm/upa.h>
  31
  32 static struct device_node *allnodes;
  33
  34 /* use when traversing tree through the allnext, child, sibling,
  35  * or parent members of struct device_node.
  36  */
  37 static DEFINE_RWLOCK(devtree_lock);
  38
  39 int of_device_is_compatible(struct device_node *device, const char *compat)
  40 {
  41         const char* cp;
  42         int cplen, l;
  43
  44         cp = (char *) of_get_property(device, "compatible", &cplen);
  45         if (cp == NULL)
  46                 return 0;
  47         while (cplen > 0) {
  48                 if (strncmp(cp, compat, strlen(compat)) == 0)
  49                         return 1;
  50                 l = strlen(cp) + 1;
  51                 cp += l;
  52                 cplen -= l;
  53         }
  54
  55         return 0;
  56 }
  57 EXPORT_SYMBOL(of_device_is_compatible);
  58
  59 struct device_node *of_get_parent(const struct device_node *node)
  60 {
  61         struct device_node *np;
  62
  63         if (!node)
  64                 return NULL;
  65
  66         np = node->parent;
  67
  68         return np;
  69 }
  70 EXPORT_SYMBOL(of_get_parent);
  71
  72 struct device_node *of_get_next_child(const struct device_node *node,
  73         struct device_node *prev)
  74 {
  75         struct device_node *next;
  76
  77         next = prev ? prev->sibling : node->child;
  78         for (; next != 0; next = next->sibling) {
  79                 break;
  80         }
  81
  82         return next;
  83 }
  84 EXPORT_SYMBOL(of_get_next_child);
  85
  86 struct device_node *of_find_node_by_path(const char *path)
  87 {
  88         struct device_node *np = allnodes;
  89
  90         for (; np != 0; np = np->allnext) {
  91                 if (np->full_name != 0 && strcmp(np->full_name, path) == 0)
  92                         break;
  93         }
  94
  95         return np;
  96 }
  97 EXPORT_SYMBOL(of_find_node_by_path);
  98
  99 struct device_node *of_find_node_by_phandle(phandle handle)
 100 {
 101         struct device_node *np;
 102
 103         for (np = allnodes; np != 0; np = np->allnext)
 104                 if (np->node == handle)
 105                         break;
 106
 107         return np;
 108 }
 109 EXPORT_SYMBOL(of_find_node_by_phandle);
 110
 111 struct device_node *of_find_node_by_name(struct device_node *from,
 112         const char *name)
 113 {
 114         struct device_node *np;
 115
 116         np = from ? from->allnext : allnodes;
 117         for (; np != NULL; np = np->allnext)
 118                 if (np->name != NULL && strcmp(np->name, name) == 0)
 119                         break;
 120
 121         return np;
 122 }
 123 EXPORT_SYMBOL(of_find_node_by_name);
 124
 125 struct device_node *of_find_node_by_type(struct device_node *from,
 126         const char *type)
 127 {
 128         struct device_node *np;
 129
 130         np = from ? from->allnext : allnodes;
 131         for (; np != 0; np = np->allnext)
 132                 if (np->type != 0 && strcmp(np->type, type) == 0)
 133                         break;
 134
 135         return np;
 136 }
 137 EXPORT_SYMBOL(of_find_node_by_type);
 138
 139 struct device_node *of_find_compatible_node(struct device_node *from,
 140         const char *type, const char *compatible)
 141 {
 142         struct device_node *np;
 143
 144         np = from ? from->allnext : allnodes;
 145         for (; np != 0; np = np->allnext) {
 146                 if (type != NULL
 147                     && !(np->type != 0 && strcmp(np->type, type) == 0))
 148                         continue;
 149                 if (of_device_is_compatible(np, compatible))
 150                         break;
 151         }
 152
 153         return np;
 154 }
 155 EXPORT_SYMBOL(of_find_compatible_node);
 156
 157 struct property *of_find_property(struct device_node *np, const char *name,
 158                                   int *lenp)
 159 {
 160         struct property *pp;
 161
 162         for (pp = np->properties; pp != 0; pp = pp->next) {
 163                 if (strcmp(pp->name, name) == 0) {
 164                         if (lenp != 0)
 165                                 *lenp = pp->length;
 166                         break;
 167                 }
 168         }
 169         return pp;
 170 }
 171 EXPORT_SYMBOL(of_find_property);
 172
 173 /*
 174  * Find a property with a given name for a given node
 175  * and return the value.
 176  */
 177 void *of_get_property(struct device_node *np, const char *name, int *lenp)
 178 {
 179         struct property *pp = of_find_property(np,name,lenp);
 180         return pp ? pp->value : NULL;
 181 }
 182 EXPORT_SYMBOL(of_get_property);
 183
 184 int of_getintprop_default(struct device_node *np, const char *name, int def)
 185 {
 186         struct property *prop;
 187         int len;
 188
 189         prop = of_find_property(np, name, &len);
 190         if (!prop || len != 4)
 191                 return def;
 192
 193         return *(int *) prop->value;
 194 }
 195 EXPORT_SYMBOL(of_getintprop_default);
 196
 197 int of_n_addr_cells(struct device_node *np)
 198 {
 199         int* ip;
 200         do {
 201                 if (np->parent)
 202                         np = np->parent;
 203                 ip = of_get_property(np, "#address-cells", NULL);
 204                 if (ip != NULL)
 205                         return *ip;
 206         } while (np->parent);
 207         /* No #address-cells property for the root node, default to 2 */
 208         return 2;
 209 }
 210 EXPORT_SYMBOL(of_n_addr_cells);
 211
 212 int of_n_size_cells(struct device_node *np)
 213 {
 214         int* ip;
 215         do {
 216                 if (np->parent)
 217                         np = np->parent;
 218                 ip = of_get_property(np, "#size-cells", NULL);
 219                 if (ip != NULL)
 220                         return *ip;
 221         } while (np->parent);
 222         /* No #size-cells property for the root node, default to 1 */
 223         return 1;
 224 }
 225 EXPORT_SYMBOL(of_n_size_cells);
 226
 227 int of_set_property(struct device_node *dp, const char *name, void *val, int len)
 228 {
 229         struct property **prevp;
 230         void *new_val;
 231         int err;
 232
 233         new_val = kmalloc(len, GFP_KERNEL);
 234         if (!new_val)
 235                 return -ENOMEM;
 236
 237         memcpy(new_val, val, len);
 238
 239         err = -ENODEV;
 240
 241         write_lock(&devtree_lock);
 242         prevp = &dp->properties;
 243         while (*prevp) {
 244                 struct property *prop = *prevp;
 245
 246                 if (!strcmp(prop->name, name)) {
 247                         void *old_val = prop->value;
 248                         int ret;
 249
 250                         ret = prom_setprop(dp->node, name, val, len);
 251                         err = -EINVAL;
 252                         if (ret >= 0) {
 253                                 prop->value = new_val;
 254                                 prop->length = len;
 255
 256                                 if (OF_IS_DYNAMIC(prop))
 257                                         kfree(old_val);
 258
 259                                 OF_MARK_DYNAMIC(prop);
 260
 261                                 err = 0;
 262                         }
 263                         break;
 264                 }
 265                 prevp = &(*prevp)->next;
 266         }
 267         write_unlock(&devtree_lock);
 268
 269         /* XXX Upate procfs if necessary... */
 270
 271         return err;
 272 }
 273 EXPORT_SYMBOL(of_set_property);
 274
 275 static unsigned int prom_early_allocated;
 276
 277 static void * __init prom_early_alloc(unsigned long size)
 278 {
 279         void *ret;
 280
 281         ret = __alloc_bootmem(size, SMP_CACHE_BYTES, 0UL);
 282         if (ret != NULL)
 283                 memset(ret, 0, size);
 284
 285         prom_early_allocated += size;
 286
 287         return ret;
 288 }
 289
 290 #ifdef CONFIG_PCI
 291 /* PSYCHO interrupt mapping support. */
 292 #define PSYCHO_IMAP_A_SLOT0     0x0c00UL
 293 #define PSYCHO_IMAP_B_SLOT0     0x0c20UL
 294 static unsigned long psycho_pcislot_imap_offset(unsigned long ino)
 295 {
 296         unsigned int bus =  (ino & 0x10) >> 4;
 297         unsigned int slot = (ino & 0x0c) >> 2;
 298
 299         if (bus == 0)
 300                 return PSYCHO_IMAP_A_SLOT0 + (slot * 8);
 301         else
 302                 return PSYCHO_IMAP_B_SLOT0 + (slot * 8);
 303 }
 304
 305 #define PSYCHO_IMAP_SCSI        0x1000UL
 306 #define PSYCHO_IMAP_ETH         0x1008UL
 307 #define PSYCHO_IMAP_BPP         0x1010UL
 308 #define PSYCHO_IMAP_AU_REC      0x1018UL
 309 #define PSYCHO_IMAP_AU_PLAY     0x1020UL
 310 #define PSYCHO_IMAP_PFAIL       0x1028UL
 311 #define PSYCHO_IMAP_KMS         0x1030UL
 312 #define PSYCHO_IMAP_FLPY        0x1038UL
 313 #define PSYCHO_IMAP_SHW         0x1040UL
 314 #define PSYCHO_IMAP_KBD         0x1048UL
 315 #define PSYCHO_IMAP_MS          0x1050UL
 316 #define PSYCHO_IMAP_SER         0x1058UL
 317 #define PSYCHO_IMAP_TIM0        0x1060UL
 318 #define PSYCHO_IMAP_TIM1        0x1068UL
 319 #define PSYCHO_IMAP_UE          0x1070UL
 320 #define PSYCHO_IMAP_CE          0x1078UL
 321 #define PSYCHO_IMAP_A_ERR       0x1080UL
 322 #define PSYCHO_IMAP_B_ERR       0x1088UL
 323 #define PSYCHO_IMAP_PMGMT       0x1090UL
 324 #define PSYCHO_IMAP_GFX         0x1098UL
 325 #define PSYCHO_IMAP_EUPA        0x10a0UL
 326
 327 static unsigned long __psycho_onboard_imap_off[] = {
 328 /*0x20*/        PSYCHO_IMAP_SCSI,
 329 /*0x21*/        PSYCHO_IMAP_ETH,
 330 /*0x22*/        PSYCHO_IMAP_BPP,
 331 /*0x23*/        PSYCHO_IMAP_AU_REC,
 332 /*0x24*/        PSYCHO_IMAP_AU_PLAY,
 333 /*0x25*/        PSYCHO_IMAP_PFAIL,
 334 /*0x26*/        PSYCHO_IMAP_KMS,
 335 /*0x27*/        PSYCHO_IMAP_FLPY,
 336 /*0x28*/        PSYCHO_IMAP_SHW,
 337 /*0x29*/        PSYCHO_IMAP_KBD,
 338 /*0x2a*/        PSYCHO_IMAP_MS,
 339 /*0x2b*/        PSYCHO_IMAP_SER,
 340 /*0x2c*/        PSYCHO_IMAP_TIM0,
 341 /*0x2d*/        PSYCHO_IMAP_TIM1,
 342 /*0x2e*/        PSYCHO_IMAP_UE,
 343 /*0x2f*/        PSYCHO_IMAP_CE,
 344 /*0x30*/        PSYCHO_IMAP_A_ERR,
 345 /*0x31*/        PSYCHO_IMAP_B_ERR,
 346 /*0x32*/        PSYCHO_IMAP_PMGMT,
 347 /*0x33*/        PSYCHO_IMAP_GFX,
 348 /*0x34*/        PSYCHO_IMAP_EUPA,
 349 };
 350 #define PSYCHO_ONBOARD_IRQ_BASE         0x20
 351 #define PSYCHO_ONBOARD_IRQ_LAST         0x34
 352 #define psycho_onboard_imap_offset(__ino) \
 353         __psycho_onboard_imap_off[(__ino) - PSYCHO_ONBOARD_IRQ_BASE]
 354
 355 #define PSYCHO_ICLR_A_SLOT0     0x1400UL
 356 #define PSYCHO_ICLR_SCSI        0x1800UL
 357
 358 #define psycho_iclr_offset(ino)                                       \
 359         ((ino & 0x20) ? (PSYCHO_ICLR_SCSI + (((ino) & 0x1f) << 3)) :  \
 360                         (PSYCHO_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
 361
 362 static unsigned int psycho_irq_build(struct device_node *dp,
 363                                      unsigned int ino,
 364                                      void *_data)
 365 {
 366         unsigned long controller_regs = (unsigned long) _data;
 367         unsigned long imap, iclr;
 368         unsigned long imap_off, iclr_off;
 369         int inofixup = 0;
 370
 371         ino &= 0x3f;
 372         if (ino < PSYCHO_ONBOARD_IRQ_BASE) {
 373                 /* PCI slot */
 374                 imap_off = psycho_pcislot_imap_offset(ino);
 375         } else {
 376                 /* Onboard device */
 377                 if (ino > PSYCHO_ONBOARD_IRQ_LAST) {
 378                         prom_printf("psycho_irq_build: Wacky INO [%x]\n", ino);
 379                         prom_halt();
 380                 }
 381                 imap_off = psycho_onboard_imap_offset(ino);
 382         }
 383
 384         /* Now build the IRQ bucket. */
 385         imap = controller_regs + imap_off;
 386         imap += 4;
 387
 388         iclr_off = psycho_iclr_offset(ino);
 389         iclr = controller_regs + iclr_off;
 390         iclr += 4;
 391
 392         if ((ino & 0x20) == 0)
 393                 inofixup = ino & 0x03;
 394
 395         return build_irq(inofixup, iclr, imap);
 396 }
 397
 398 static void psycho_irq_trans_init(struct device_node *dp)
 399 {
 400         struct linux_prom64_registers *regs;
 401
 402         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 403         dp->irq_trans->irq_build = psycho_irq_build;
 404
 405         regs = of_get_property(dp, "reg", NULL);
 406         dp->irq_trans->data = (void *) regs[2].phys_addr;
 407 }
 408
 409 #define sabre_read(__reg) \
 410 ({      u64 __ret; \
 411         __asm__ __volatile__("ldxa [%1] %2, %0" \
 412                              : "=r" (__ret) \
 413                              : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
 414                              : "memory"); \
 415         __ret; \
 416 })
 417
 418 struct sabre_irq_data {
 419         unsigned long controller_regs;
 420         unsigned int pci_first_busno;
 421 };
 422 #define SABRE_CONFIGSPACE       0x001000000UL
 423 #define SABRE_WRSYNC            0x1c20UL
 424
 425 #define SABRE_CONFIG_BASE(CONFIG_SPACE) \
 426         (CONFIG_SPACE | (1UL << 24))
 427 #define SABRE_CONFIG_ENCODE(BUS, DEVFN, REG)    \
 428         (((unsigned long)(BUS)   << 16) |       \
 429          ((unsigned long)(DEVFN) << 8)  |       \
 430          ((unsigned long)(REG)))
 431
 432 /* When a device lives behind a bridge deeper in the PCI bus topology
 433  * than APB, a special sequence must run to make sure all pending DMA
 434  * transfers at the time of IRQ delivery are visible in the coherency
 435  * domain by the cpu.  This sequence is to perform a read on the far
 436  * side of the non-APB bridge, then perform a read of Sabre's DMA
 437  * write-sync register.
 438  */
 439 static void sabre_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
 440 {
 441         unsigned int phys_hi = (unsigned int) (unsigned long) _arg1;
 442         struct sabre_irq_data *irq_data = _arg2;
 443         unsigned long controller_regs = irq_data->controller_regs;
 444         unsigned long sync_reg = controller_regs + SABRE_WRSYNC;
 445         unsigned long config_space = controller_regs + SABRE_CONFIGSPACE;
 446         unsigned int bus, devfn;
 447         u16 _unused;
 448
 449         config_space = SABRE_CONFIG_BASE(config_space);
 450
 451         bus = (phys_hi >> 16) & 0xff;
 452         devfn = (phys_hi >> 8) & 0xff;
 453
 454         config_space |= SABRE_CONFIG_ENCODE(bus, devfn, 0x00);
 455
 456         __asm__ __volatile__("membar #Sync\n\t"
 457                              "lduha [%1] %2, %0\n\t"
 458                              "membar #Sync"
 459                              : "=r" (_unused)
 460                              : "r" ((u16 *) config_space),
 461                                "i" (ASI_PHYS_BYPASS_EC_E_L)
 462                              : "memory");
 463
 464         sabre_read(sync_reg);
 465 }
 466
 467 #define SABRE_IMAP_A_SLOT0      0x0c00UL
 468 #define SABRE_IMAP_B_SLOT0      0x0c20UL
 469 #define SABRE_IMAP_SCSI         0x1000UL
 470 #define SABRE_IMAP_ETH          0x1008UL
 471 #define SABRE_IMAP_BPP          0x1010UL
 472 #define SABRE_IMAP_AU_REC       0x1018UL
 473 #define SABRE_IMAP_AU_PLAY      0x1020UL
 474 #define SABRE_IMAP_PFAIL        0x1028UL
 475 #define SABRE_IMAP_KMS          0x1030UL
 476 #define SABRE_IMAP_FLPY         0x1038UL
 477 #define SABRE_IMAP_SHW          0x1040UL
 478 #define SABRE_IMAP_KBD          0x1048UL
 479 #define SABRE_IMAP_MS           0x1050UL
 480 #define SABRE_IMAP_SER          0x1058UL
 481 #define SABRE_IMAP_UE           0x1070UL
 482 #define SABRE_IMAP_CE           0x1078UL
 483 #define SABRE_IMAP_PCIERR       0x1080UL
 484 #define SABRE_IMAP_GFX          0x1098UL
 485 #define SABRE_IMAP_EUPA         0x10a0UL
 486 #define SABRE_ICLR_A_SLOT0      0x1400UL
 487 #define SABRE_ICLR_B_SLOT0      0x1480UL
 488 #define SABRE_ICLR_SCSI         0x1800UL
 489 #define SABRE_ICLR_ETH          0x1808UL
 490 #define SABRE_ICLR_BPP          0x1810UL
 491 #define SABRE_ICLR_AU_REC       0x1818UL
 492 #define SABRE_ICLR_AU_PLAY      0x1820UL
 493 #define SABRE_ICLR_PFAIL        0x1828UL
 494 #define SABRE_ICLR_KMS          0x1830UL
 495 #define SABRE_ICLR_FLPY         0x1838UL
 496 #define SABRE_ICLR_SHW          0x1840UL
 497 #define SABRE_ICLR_KBD          0x1848UL
 498 #define SABRE_ICLR_MS           0x1850UL
 499 #define SABRE_ICLR_SER          0x1858UL
 500 #define SABRE_ICLR_UE           0x1870UL
 501 #define SABRE_ICLR_CE           0x1878UL
 502 #define SABRE_ICLR_PCIERR       0x1880UL
 503
 504 static unsigned long sabre_pcislot_imap_offset(unsigned long ino)
 505 {
 506         unsigned int bus =  (ino & 0x10) >> 4;
 507         unsigned int slot = (ino & 0x0c) >> 2;
 508
 509         if (bus == 0)
 510                 return SABRE_IMAP_A_SLOT0 + (slot * 8);
 511         else
 512                 return SABRE_IMAP_B_SLOT0 + (slot * 8);
 513 }
 514
 515 static unsigned long __sabre_onboard_imap_off[] = {
 516 /*0x20*/        SABRE_IMAP_SCSI,
 517 /*0x21*/        SABRE_IMAP_ETH,
 518 /*0x22*/        SABRE_IMAP_BPP,
 519 /*0x23*/        SABRE_IMAP_AU_REC,
 520 /*0x24*/        SABRE_IMAP_AU_PLAY,
 521 /*0x25*/        SABRE_IMAP_PFAIL,
 522 /*0x26*/        SABRE_IMAP_KMS,
 523 /*0x27*/        SABRE_IMAP_FLPY,
 524 /*0x28*/        SABRE_IMAP_SHW,
 525 /*0x29*/        SABRE_IMAP_KBD,
 526 /*0x2a*/        SABRE_IMAP_MS,
 527 /*0x2b*/        SABRE_IMAP_SER,
 528 /*0x2c*/        0 /* reserved */,
 529 /*0x2d*/        0 /* reserved */,
 530 /*0x2e*/        SABRE_IMAP_UE,
 531 /*0x2f*/        SABRE_IMAP_CE,
 532 /*0x30*/        SABRE_IMAP_PCIERR,
 533 /*0x31*/        0 /* reserved */,
 534 /*0x32*/        0 /* reserved */,
 535 /*0x33*/        SABRE_IMAP_GFX,
 536 /*0x34*/        SABRE_IMAP_EUPA,
 537 };
 538 #define SABRE_ONBOARD_IRQ_BASE          0x20
 539 #define SABRE_ONBOARD_IRQ_LAST          0x30
 540 #define sabre_onboard_imap_offset(__ino) \
 541         __sabre_onboard_imap_off[(__ino) - SABRE_ONBOARD_IRQ_BASE]
 542
 543 #define sabre_iclr_offset(ino)                                        \
 544         ((ino & 0x20) ? (SABRE_ICLR_SCSI + (((ino) & 0x1f) << 3)) :  \
 545                         (SABRE_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
 546
 547 static int sabre_device_needs_wsync(struct device_node *dp)
 548 {
 549         struct device_node *parent = dp->parent;
 550         char *parent_model, *parent_compat;
 551
 552         /* This traversal up towards the root is meant to
 553          * handle two cases:
 554          *
 555          * 1) non-PCI bus sitting under PCI, such as 'ebus'
 556          * 2) the PCI controller interrupts themselves, which
 557          *    will use the sabre_irq_build but do not need
 558          *    the DMA synchronization handling
 559          */
 560         while (parent) {
 561                 if (!strcmp(parent->type, "pci"))
 562                         break;
 563                 parent = parent->parent;
 564         }
 565
 566         if (!parent)
 567                 return 0;
 568
 569         parent_model = of_get_property(parent,
 570                                        "model", NULL);
 571         if (parent_model &&
 572             (!strcmp(parent_model, "SUNW,sabre") ||
 573              !strcmp(parent_model, "SUNW,simba")))
 574                 return 0;
 575
 576         parent_compat = of_get_property(parent,
 577                                         "compatible", NULL);
 578         if (parent_compat &&
 579             (!strcmp(parent_compat, "pci108e,a000") ||
 580              !strcmp(parent_compat, "pci108e,a001")))
 581                 return 0;
 582
 583         return 1;
 584 }
 585
 586 static unsigned int sabre_irq_build(struct device_node *dp,
 587                                     unsigned int ino,
 588                                     void *_data)
 589 {
 590         struct sabre_irq_data *irq_data = _data;
 591         unsigned long controller_regs = irq_data->controller_regs;
 592         struct linux_prom_pci_registers *regs;
 593         unsigned long imap, iclr;
 594         unsigned long imap_off, iclr_off;
 595         int inofixup = 0;
 596         int virt_irq;
 597
 598         ino &= 0x3f;
 599         if (ino < SABRE_ONBOARD_IRQ_BASE) {
 600                 /* PCI slot */
 601                 imap_off = sabre_pcislot_imap_offset(ino);
 602         } else {
 603                 /* onboard device */
 604                 if (ino > SABRE_ONBOARD_IRQ_LAST) {
 605                         prom_printf("sabre_irq_build: Wacky INO [%x]\n", ino);
 606                         prom_halt();
 607                 }
 608                 imap_off = sabre_onboard_imap_offset(ino);
 609         }
 610
 611         /* Now build the IRQ bucket. */
 612         imap = controller_regs + imap_off;
 613         imap += 4;
 614
 615         iclr_off = sabre_iclr_offset(ino);
 616         iclr = controller_regs + iclr_off;
 617         iclr += 4;
 618
 619         if ((ino & 0x20) == 0)
 620                 inofixup = ino & 0x03;
 621
 622         virt_irq = build_irq(inofixup, iclr, imap);
 623
 624         /* If the parent device is a PCI<->PCI bridge other than
 625          * APB, we have to install a pre-handler to ensure that
 626          * all pending DMA is drained before the interrupt handler
 627          * is run.
 628          */
 629         regs = of_get_property(dp, "reg", NULL);
 630         if (regs && sabre_device_needs_wsync(dp)) {
 631                 irq_install_pre_handler(virt_irq,
 632                                         sabre_wsync_handler,
 633                                         (void *) (long) regs->phys_hi,
 634                                         (void *) irq_data);
 635         }
 636
 637         return virt_irq;
 638 }
 639
 640 static void sabre_irq_trans_init(struct device_node *dp)
 641 {
 642         struct linux_prom64_registers *regs;
 643         struct sabre_irq_data *irq_data;
 644         u32 *busrange;
 645
 646         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 647         dp->irq_trans->irq_build = sabre_irq_build;
 648
 649         irq_data = prom_early_alloc(sizeof(struct sabre_irq_data));
 650
 651         regs = of_get_property(dp, "reg", NULL);
 652         irq_data->controller_regs = regs[0].phys_addr;
 653
 654         busrange = of_get_property(dp, "bus-range", NULL);
 655         irq_data->pci_first_busno = busrange[0];
 656
 657         dp->irq_trans->data = irq_data;
 658 }
 659
 660 /* SCHIZO interrupt mapping support.  Unlike Psycho, for this controller the
 661  * imap/iclr registers are per-PBM.
 662  */
 663 #define SCHIZO_IMAP_BASE        0x1000UL
 664 #define SCHIZO_ICLR_BASE        0x1400UL
 665
 666 static unsigned long schizo_imap_offset(unsigned long ino)
 667 {
 668         return SCHIZO_IMAP_BASE + (ino * 8UL);
 669 }
 670
 671 static unsigned long schizo_iclr_offset(unsigned long ino)
 672 {
 673         return SCHIZO_ICLR_BASE + (ino * 8UL);
 674 }
 675
 676 static unsigned long schizo_ino_to_iclr(unsigned long pbm_regs,
 677                                         unsigned int ino)
 678 {
 679         return pbm_regs + schizo_iclr_offset(ino) + 4;
 680 }
 681
 682 static unsigned long schizo_ino_to_imap(unsigned long pbm_regs,
 683                                         unsigned int ino)
 684 {
 685         return pbm_regs + schizo_imap_offset(ino) + 4;
 686 }
 687
 688 #define schizo_read(__reg) \
 689 ({      u64 __ret; \
 690         __asm__ __volatile__("ldxa [%1] %2, %0" \
 691                              : "=r" (__ret) \
 692                              : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
 693                              : "memory"); \
 694         __ret; \
 695 })
 696 #define schizo_write(__reg, __val) \
 697         __asm__ __volatile__("stxa %0, [%1] %2" \
 698                              : /* no outputs */ \
 699                              : "r" (__val), "r" (__reg), \
 700                                "i" (ASI_PHYS_BYPASS_EC_E) \
 701                              : "memory")
 702
 703 static void tomatillo_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
 704 {
 705         unsigned long sync_reg = (unsigned long) _arg2;
 706         u64 mask = 1UL << (ino & IMAP_INO);
 707         u64 val;
 708         int limit;
 709
 710         schizo_write(sync_reg, mask);
 711
 712         limit = 100000;
 713         val = 0;
 714         while (--limit) {
 715                 val = schizo_read(sync_reg);
 716                 if (!(val & mask))
 717                         break;
 718         }
 719         if (limit <= 0) {
 720                 printk("tomatillo_wsync_handler: DMA won't sync [%lx:%lx]\n",
 721                        val, mask);
 722         }
 723
 724         if (_arg1) {
 725                 static unsigned char cacheline[64]
 726                         __attribute__ ((aligned (64)));
 727
 728                 __asm__ __volatile__("rd %%fprs, %0\n\t"
 729                                      "or %0, %4, %1\n\t"
 730                                      "wr %1, 0x0, %%fprs\n\t"
 731                                      "stda %%f0, [%5] %6\n\t"
 732                                      "wr %0, 0x0, %%fprs\n\t"
 733                                      "membar #Sync"
 734                                      : "=&r" (mask), "=&r" (val)
 735                                      : "0" (mask), "1" (val),
 736                                      "i" (FPRS_FEF), "r" (&cacheline[0]),
 737                                      "i" (ASI_BLK_COMMIT_P));
 738         }
 739 }
 740
 741 struct schizo_irq_data {
 742         unsigned long pbm_regs;
 743         unsigned long sync_reg;
 744         u32 portid;
 745         int chip_version;
 746 };
 747
 748 static unsigned int schizo_irq_build(struct device_node *dp,
 749                                      unsigned int ino,
 750                                      void *_data)
 751 {
 752         struct schizo_irq_data *irq_data = _data;
 753         unsigned long pbm_regs = irq_data->pbm_regs;
 754         unsigned long imap, iclr;
 755         int ign_fixup;
 756         int virt_irq;
 757         int is_tomatillo;
 758
 759         ino &= 0x3f;
 760
 761         /* Now build the IRQ bucket. */
 762         imap = schizo_ino_to_imap(pbm_regs, ino);
 763         iclr = schizo_ino_to_iclr(pbm_regs, ino);
 764
 765         /* On Schizo, no inofixup occurs.  This is because each
 766          * INO has it's own IMAP register.  On Psycho and Sabre
 767          * there is only one IMAP register for each PCI slot even
 768          * though four different INOs can be generated by each
 769          * PCI slot.
 770          *
 771          * But, for JBUS variants (essentially, Tomatillo), we have
 772          * to fixup the lowest bit of the interrupt group number.
 773          */
 774         ign_fixup = 0;
 775
 776         is_tomatillo = (irq_data->sync_reg != 0UL);
 777
 778         if (is_tomatillo) {
 779                 if (irq_data->portid & 1)
 780                         ign_fixup = (1 << 6);
 781         }
 782
 783         virt_irq = build_irq(ign_fixup, iclr, imap);
 784
 785         if (is_tomatillo) {
 786                 irq_install_pre_handler(virt_irq,
 787                                         tomatillo_wsync_handler,
 788                                         ((irq_data->chip_version <= 4) ?
 789                                          (void *) 1 : (void *) 0),
 790                                         (void *) irq_data->sync_reg);
 791         }
 792
 793         return virt_irq;
 794 }
 795
 796 static void schizo_irq_trans_init(struct device_node *dp)
 797 {
 798         struct linux_prom64_registers *regs;
 799         struct schizo_irq_data *irq_data;
 800
 801         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 802         dp->irq_trans->irq_build = schizo_irq_build;
 803
 804         irq_data = prom_early_alloc(sizeof(struct schizo_irq_data));
 805
 806         regs = of_get_property(dp, "reg", NULL);
 807         dp->irq_trans->data = irq_data;
 808
 809         irq_data->pbm_regs = regs[0].phys_addr;
 810         irq_data->sync_reg = regs[3].phys_addr + 0x1a18UL;
 811         irq_data->portid = of_getintprop_default(dp, "portid", 0);
 812         irq_data->chip_version = of_getintprop_default(dp, "version#", 0);
 813 }
 814
 815 static unsigned int pci_sun4v_irq_build(struct device_node *dp,
 816                                         unsigned int devino,
 817                                         void *_data)
 818 {
 819         u32 devhandle = (u32) (unsigned long) _data;
 820
 821         return sun4v_build_irq(devhandle, devino);
 822 }
 823
 824 static void pci_sun4v_irq_trans_init(struct device_node *dp)
 825 {
 826         struct linux_prom64_registers *regs;
 827
 828         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 829         dp->irq_trans->irq_build = pci_sun4v_irq_build;
 830
 831         regs = of_get_property(dp, "reg", NULL);
 832         dp->irq_trans->data = (void *) (unsigned long)
 833                 ((regs->phys_addr >> 32UL) & 0x0fffffff);
 834 }
 835 #endif /* CONFIG_PCI */
 836
 837 #ifdef CONFIG_SBUS
 838 /* INO number to IMAP register offset for SYSIO external IRQ's.
 839  * This should conform to both Sunfire/Wildfire server and Fusion
 840  * desktop designs.
 841  */
 842 #define SYSIO_IMAP_SLOT0        0x2c04UL
 843 #define SYSIO_IMAP_SLOT1        0x2c0cUL
 844 #define SYSIO_IMAP_SLOT2        0x2c14UL
 845 #define SYSIO_IMAP_SLOT3        0x2c1cUL
 846 #define SYSIO_IMAP_SCSI         0x3004UL
 847 #define SYSIO_IMAP_ETH          0x300cUL
 848 #define SYSIO_IMAP_BPP          0x3014UL
 849 #define SYSIO_IMAP_AUDIO        0x301cUL
 850 #define SYSIO_IMAP_PFAIL        0x3024UL
 851 #define SYSIO_IMAP_KMS          0x302cUL
 852 #define SYSIO_IMAP_FLPY         0x3034UL
 853 #define SYSIO_IMAP_SHW          0x303cUL
 854 #define SYSIO_IMAP_KBD          0x3044UL
 855 #define SYSIO_IMAP_MS           0x304cUL
 856 #define SYSIO_IMAP_SER          0x3054UL
 857 #define SYSIO_IMAP_TIM0         0x3064UL
 858 #define SYSIO_IMAP_TIM1         0x306cUL
 859 #define SYSIO_IMAP_UE           0x3074UL
 860 #define SYSIO_IMAP_CE           0x307cUL
 861 #define SYSIO_IMAP_SBERR        0x3084UL
 862 #define SYSIO_IMAP_PMGMT        0x308cUL
 863 #define SYSIO_IMAP_GFX          0x3094UL
 864 #define SYSIO_IMAP_EUPA         0x309cUL
 865
 866 #define bogon     ((unsigned long) -1)
 867 static unsigned long sysio_irq_offsets[] = {
 868         /* SBUS Slot 0 --> 3, level 1 --> 7 */
 869         SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
 870         SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
 871         SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
 872         SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
 873         SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
 874         SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
 875         SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
 876         SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
 877
 878         /* Onboard devices (not relevant/used on SunFire). */
 879         SYSIO_IMAP_SCSI,
 880         SYSIO_IMAP_ETH,
 881         SYSIO_IMAP_BPP,
 882         bogon,
 883         SYSIO_IMAP_AUDIO,
 884         SYSIO_IMAP_PFAIL,
 885         bogon,
 886         bogon,
 887         SYSIO_IMAP_KMS,
 888         SYSIO_IMAP_FLPY,
 889         SYSIO_IMAP_SHW,
 890         SYSIO_IMAP_KBD,
 891         SYSIO_IMAP_MS,
 892         SYSIO_IMAP_SER,
 893         bogon,
 894         bogon,
 895         SYSIO_IMAP_TIM0,
 896         SYSIO_IMAP_TIM1,
 897         bogon,
 898         bogon,
 899         SYSIO_IMAP_UE,
 900         SYSIO_IMAP_CE,
 901         SYSIO_IMAP_SBERR,
 902         SYSIO_IMAP_PMGMT,
 903         SYSIO_IMAP_GFX,
 904         SYSIO_IMAP_EUPA,
 905 };
 906
 907 #undef bogon
 908
 909 #define NUM_SYSIO_OFFSETS ARRAY_SIZE(sysio_irq_offsets)
 910
 911 /* Convert Interrupt Mapping register pointer to associated
 912  * Interrupt Clear register pointer, SYSIO specific version.
 913  */
 914 #define SYSIO_ICLR_UNUSED0      0x3400UL
 915 #define SYSIO_ICLR_SLOT0        0x340cUL
 916 #define SYSIO_ICLR_SLOT1        0x344cUL
 917 #define SYSIO_ICLR_SLOT2        0x348cUL
 918 #define SYSIO_ICLR_SLOT3        0x34ccUL
 919 static unsigned long sysio_imap_to_iclr(unsigned long imap)
 920 {
 921         unsigned long diff = SYSIO_ICLR_UNUSED0 - SYSIO_IMAP_SLOT0;
 922         return imap + diff;
 923 }
 924
 925 static unsigned int sbus_of_build_irq(struct device_node *dp,
 926                                       unsigned int ino,
 927                                       void *_data)
 928 {
 929         unsigned long reg_base = (unsigned long) _data;
 930         struct linux_prom_registers *regs;
 931         unsigned long imap, iclr;
 932         int sbus_slot = 0;
 933         int sbus_level = 0;
 934
 935         ino &= 0x3f;
 936
 937         regs = of_get_property(dp, "reg", NULL);
 938         if (regs)
 939                 sbus_slot = regs->which_io;
 940
 941         if (ino < 0x20)
 942                 ino += (sbus_slot * 8);
 943
 944         imap = sysio_irq_offsets[ino];
 945         if (imap == ((unsigned long)-1)) {
 946                 prom_printf("get_irq_translations: Bad SYSIO INO[%x]\n",
 947                             ino);
 948                 prom_halt();
 949         }
 950         imap += reg_base;
 951
 952         /* SYSIO inconsistency.  For external SLOTS, we have to select
 953          * the right ICLR register based upon the lower SBUS irq level
 954          * bits.
 955          */
 956         if (ino >= 0x20) {
 957                 iclr = sysio_imap_to_iclr(imap);
 958         } else {
 959                 sbus_level = ino & 0x7;
 960
 961                 switch(sbus_slot) {
 962                 case 0:
 963                         iclr = reg_base + SYSIO_ICLR_SLOT0;
 964                         break;
 965                 case 1:
 966                         iclr = reg_base + SYSIO_ICLR_SLOT1;
 967                         break;
 968                 case 2:
 969                         iclr = reg_base + SYSIO_ICLR_SLOT2;
 970                         break;
 971                 default:
 972                 case 3:
 973                         iclr = reg_base + SYSIO_ICLR_SLOT3;
 974                         break;
 975                 };
 976
 977                 iclr += ((unsigned long)sbus_level - 1UL) * 8UL;
 978         }
 979         return build_irq(sbus_level, iclr, imap);
 980 }
 981
 982 static void sbus_irq_trans_init(struct device_node *dp)
 983 {
 984         struct linux_prom64_registers *regs;
 985
 986         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 987         dp->irq_trans->irq_build = sbus_of_build_irq;
 988
 989         regs = of_get_property(dp, "reg", NULL);
 990         dp->irq_trans->data = (void *) (unsigned long) regs->phys_addr;
 991 }
 992 #endif /* CONFIG_SBUS */
 993
 994
 995 static unsigned int central_build_irq(struct device_node *dp,
 996                                       unsigned int ino,
 997                                       void *_data)
 998 {
 999         struct device_node *central_dp = _data;
1000         struct of_device *central_op = of_find_device_by_node(central_dp);
1001         struct resource *res;
1002         unsigned long imap, iclr;
1003         u32 tmp;
1004
1005         if (!strcmp(dp->name, "eeprom")) {
1006                 res = &central_op->resource[5];
1007         } else if (!strcmp(dp->name, "zs")) {
1008                 res = &central_op->resource[4];
1009         } else if (!strcmp(dp->name, "clock-board")) {
1010                 res = &central_op->resource[3];
1011         } else {
1012                 return ino;
1013         }
1014
1015         imap = res->start + 0x00UL;
1016         iclr = res->start + 0x10UL;
1017
1018         /* Set the INO state to idle, and disable.  */
1019         upa_writel(0, iclr);
1020         upa_readl(iclr);
1021
1022         tmp = upa_readl(imap);
1023         tmp &= ~0x80000000;
1024         upa_writel(tmp, imap);
1025
1026         return build_irq(0, iclr, imap);
1027 }
1028
1029 static void central_irq_trans_init(struct device_node *dp)
1030 {
1031         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
1032         dp->irq_trans->irq_build = central_build_irq;
1033
1034         dp->irq_trans->data = dp;
1035 }
1036
1037 struct irq_trans {
1038         const char *name;
1039         void (*init)(struct device_node *);
1040 };
1041
1042 #ifdef CONFIG_PCI
1043 static struct irq_trans pci_irq_trans_table[] = {
1044         { "SUNW,sabre", sabre_irq_trans_init },
1045         { "pci108e,a000", sabre_irq_trans_init },
1046         { "pci108e,a001", sabre_irq_trans_init },
1047         { "SUNW,psycho", psycho_irq_trans_init },
1048         { "pci108e,8000", psycho_irq_trans_init },
1049         { "SUNW,schizo", schizo_irq_trans_init },
1050         { "pci108e,8001", schizo_irq_trans_init },
1051         { "SUNW,schizo+", schizo_irq_trans_init },
1052         { "pci108e,8002", schizo_irq_trans_init },
1053         { "SUNW,tomatillo", schizo_irq_trans_init },
1054         { "pci108e,a801", schizo_irq_trans_init },
1055         { "SUNW,sun4v-pci", pci_sun4v_irq_trans_init },
1056 };
1057 #endif
1058
1059 static unsigned int sun4v_vdev_irq_build(struct device_node *dp,
1060                                          unsigned int devino,
1061                                          void *_data)
1062 {
1063         u32 devhandle = (u32) (unsigned long) _data;
1064
1065         return sun4v_build_irq(devhandle, devino);
1066 }
1067
1068 static void sun4v_vdev_irq_trans_init(struct device_node *dp)
1069 {
1070         struct linux_prom64_registers *regs;
1071
1072         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
1073         dp->irq_trans->irq_build = sun4v_vdev_irq_build;
1074
1075         regs = of_get_property(dp, "reg", NULL);
1076         dp->irq_trans->data = (void *) (unsigned long)
1077                 ((regs->phys_addr >> 32UL) & 0x0fffffff);
1078 }
1079
1080 static void irq_trans_init(struct device_node *dp)
1081 {
1082         const char *model;
1083 #ifdef CONFIG_PCI
1084         int i;
1085 #endif
1086
1087         model = of_get_property(dp, "model", NULL);
1088         if (!model)
1089                 model = of_get_property(dp, "compatible", NULL);
1090         if (!model)
1091                 return;
1092
1093 #ifdef CONFIG_PCI
1094         for (i = 0; i < ARRAY_SIZE(pci_irq_trans_table); i++) {
1095                 struct irq_trans *t = &pci_irq_trans_table[i];
1096
1097                 if (!strcmp(model, t->name))
1098                         return t->init(dp);
1099         }
1100 #endif
1101 #ifdef CONFIG_SBUS
1102         if (!strcmp(dp->name, "sbus") ||
1103             !strcmp(dp->name, "sbi"))
1104                 return sbus_irq_trans_init(dp);
1105 #endif
1106         if (!strcmp(dp->name, "central"))
1107                 return central_irq_trans_init(dp->child);
1108         if (!strcmp(dp->name, "virtual-devices"))
1109                 return sun4v_vdev_irq_trans_init(dp);
1110 }
1111
1112 static int is_root_node(const struct device_node *dp)
1113 {
1114         if (!dp)
1115                 return 0;
1116
1117         return (dp->parent == NULL);
1118 }
1119
1120 /* The following routines deal with the black magic of fully naming a
1121  * node.
1122  *
1123  * Certain well known named nodes are just the simple name string.
1124  *
1125  * Actual devices have an address specifier appended to the base name
1126  * string, like this "foo@addr".  The "addr" can be in any number of
1127  * formats, and the platform plus the type of the node determine the
1128  * format and how it is constructed.
1129  *
1130  * For children of the ROOT node, the naming convention is fixed and
1131  * determined by whether this is a sun4u or sun4v system.
1132  *
1133  * For children of other nodes, it is bus type specific.  So
1134  * we walk up the tree until we discover a "device_type" property
1135  * we recognize and we go from there.
1136  *
1137  * As an example, the boot device on my workstation has a full path:
1138  *
1139  *      /pci@1e,600000/ide@d/disk@0,0:c
1140  */
1141 static void __init sun4v_path_component(struct device_node *dp, char *tmp_buf)
1142 {
1143         struct linux_prom64_registers *regs;
1144         struct property *rprop;
1145         u32 high_bits, low_bits, type;
1146
1147         rprop = of_find_property(dp, "reg", NULL);
1148         if (!rprop)
1149                 return;
1150
1151         regs = rprop->value;
1152         if (!is_root_node(dp->parent)) {
1153                 sprintf(tmp_buf, "%s@%x,%x",
1154                         dp->name,
1155                         (unsigned int) (regs->phys_addr >> 32UL),
1156                         (unsigned int) (regs->phys_addr & 0xffffffffUL));
1157                 return;
1158         }
1159
1160         type = regs->phys_addr >> 60UL;
1161         high_bits = (regs->phys_addr >> 32UL) & 0x0fffffffUL;
1162         low_bits = (regs->phys_addr & 0xffffffffUL);
1163
1164         if (type == 0 || type == 8) {
1165                 const char *prefix = (type == 0) ? "m" : "i";
1166
1167                 if (low_bits)
1168                         sprintf(tmp_buf, "%s@%s%x,%x",
1169                                 dp->name, prefix,
1170                                 high_bits, low_bits);
1171                 else
1172                         sprintf(tmp_buf, "%s@%s%x",
1173                                 dp->name,
1174                                 prefix,
1175                                 high_bits);
1176         } else if (type == 12) {
1177                 sprintf(tmp_buf, "%s@%x",
1178                         dp->name, high_bits);
1179         }
1180 }
1181
1182 static void __init sun4u_path_component(struct device_node *dp, char *tmp_buf)
1183 {
1184         struct linux_prom64_registers *regs;
1185         struct property *prop;
1186
1187         prop = of_find_property(dp, "reg", NULL);
1188         if (!prop)
1189                 return;
1190
1191         regs = prop->value;
1192         if (!is_root_node(dp->parent)) {
1193                 sprintf(tmp_buf, "%s@%x,%x",
1194                         dp->name,
1195                         (unsigned int) (regs->phys_addr >> 32UL),
1196                         (unsigned int) (regs->phys_addr & 0xffffffffUL));
1197                 return;
1198         }
1199
1200         prop = of_find_property(dp, "upa-portid", NULL);
1201         if (!prop)
1202                 prop = of_find_property(dp, "portid", NULL);
1203         if (prop) {
1204                 unsigned long mask = 0xffffffffUL;
1205
1206                 if (tlb_type >= cheetah)
1207                         mask = 0x7fffff;
1208
1209                 sprintf(tmp_buf, "%s@%x,%x",
1210                         dp->name,
1211                         *(u32 *)prop->value,
1212                         (unsigned int) (regs->phys_addr & mask));
1213         }
1214 }
1215
1216 /* "name@slot,offset"  */
1217 static void __init sbus_path_component(struct device_node *dp, char *tmp_buf)
1218 {
1219         struct linux_prom_registers *regs;
1220         struct property *prop;
1221
1222         prop = of_find_property(dp, "reg", NULL);
1223         if (!prop)
1224                 return;
1225
1226         regs = prop->value;
1227         sprintf(tmp_buf, "%s@%x,%x",
1228                 dp->name,
1229                 regs->which_io,
1230                 regs->phys_addr);
1231 }
1232
1233 /* "name@devnum[,func]" */
1234 static void __init pci_path_component(struct device_node *dp, char *tmp_buf)
1235 {
1236         struct linux_prom_pci_registers *regs;
1237         struct property *prop;
1238         unsigned int devfn;
1239
1240         prop = of_find_property(dp, "reg", NULL);
1241         if (!prop)
1242                 return;
1243
1244         regs = prop->value;
1245         devfn = (regs->phys_hi >> 8) & 0xff;
1246         if (devfn & 0x07) {
1247                 sprintf(tmp_buf, "%s@%x,%x",
1248                         dp->name,
1249                         devfn >> 3,
1250                         devfn & 0x07);
1251         } else {
1252                 sprintf(tmp_buf, "%s@%x",
1253                         dp->name,
1254                         devfn >> 3);
1255         }
1256 }
1257
1258 /* "name@UPA_PORTID,offset" */
1259 static void __init upa_path_component(struct device_node *dp, char *tmp_buf)
1260 {
1261         struct linux_prom64_registers *regs;
1262         struct property *prop;
1263
1264         prop = of_find_property(dp, "reg", NULL);
1265         if (!prop)
1266                 return;
1267
1268         regs = prop->value;
1269
1270         prop = of_find_property(dp, "upa-portid", NULL);
1271         if (!prop)
1272                 return;
1273
1274         sprintf(tmp_buf, "%s@%x,%x",
1275                 dp->name,
1276                 *(u32 *) prop->value,
1277                 (unsigned int) (regs->phys_addr & 0xffffffffUL));
1278 }
1279
1280 /* "name@reg" */
1281 static void __init vdev_path_component(struct device_node *dp, char *tmp_buf)
1282 {
1283         struct property *prop;
1284         u32 *regs;
1285
1286         prop = of_find_property(dp, "reg", NULL);
1287         if (!prop)
1288                 return;
1289
1290         regs = prop->value;
1291
1292         sprintf(tmp_buf, "%s@%x", dp->name, *regs);
1293 }
1294
1295 /* "name@addrhi,addrlo" */
1296 static void __init ebus_path_component(struct device_node *dp, char *tmp_buf)
1297 {
1298         struct linux_prom64_registers *regs;
1299         struct property *prop;
1300
1301         prop = of_find_property(dp, "reg", NULL);
1302         if (!prop)
1303                 return;
1304
1305         regs = prop->value;
1306
1307         sprintf(tmp_buf, "%s@%x,%x",
1308                 dp->name,
1309                 (unsigned int) (regs->phys_addr >> 32UL),
1310                 (unsigned int) (regs->phys_addr & 0xffffffffUL));
1311 }
1312
1313 /* "name@bus,addr" */
1314 static void __init i2c_path_component(struct device_node *dp, char *tmp_buf)
1315 {
1316         struct property *prop;
1317         u32 *regs;
1318
1319         prop = of_find_property(dp, "reg", NULL);
1320         if (!prop)
1321                 return;
1322
1323         regs = prop->value;
1324
1325         /* This actually isn't right... should look at the #address-cells
1326          * property of the i2c bus node etc. etc.
1327          */
1328         sprintf(tmp_buf, "%s@%x,%x",
1329                 dp->name, regs[0], regs[1]);
1330 }
1331
1332 /* "name@reg0[,reg1]" */
1333 static void __init usb_path_component(struct device_node *dp, char *tmp_buf)
1334 {
1335         struct property *prop;
1336         u32 *regs;
1337
1338         prop = of_find_property(dp, "reg", NULL);
1339         if (!prop)
1340                 return;
1341
1342         regs = prop->value;
1343
1344         if (prop->length == sizeof(u32) || regs[1] == 1) {
1345                 sprintf(tmp_buf, "%s@%x",
1346                         dp->name, regs[0]);
1347         } else {
1348                 sprintf(tmp_buf, "%s@%x,%x",
1349                         dp->name, regs[0], regs[1]);
1350         }
1351 }
1352
1353 /* "name@reg0reg1[,reg2reg3]" */
1354 static void __init ieee1394_path_component(struct device_node *dp, char *tmp_buf)
1355 {
1356         struct property *prop;
1357         u32 *regs;
1358
1359         prop = of_find_property(dp, "reg", NULL);
1360         if (!prop)
1361                 return;
1362
1363         regs = prop->value;
1364
1365         if (regs[2] || regs[3]) {
1366                 sprintf(tmp_buf, "%s@%08x%08x,%04x%08x",
1367                         dp->name, regs[0], regs[1], regs[2], regs[3]);
1368         } else {
1369                 sprintf(tmp_buf, "%s@%08x%08x",
1370                         dp->name, regs[0], regs[1]);
1371         }
1372 }
1373
1374 static void __init __build_path_component(struct device_node *dp, char *tmp_buf)
1375 {
1376         struct device_node *parent = dp->parent;
1377
1378         if (parent != NULL) {
1379                 if (!strcmp(parent->type, "pci") ||
1380                     !strcmp(parent->type, "pciex"))
1381                         return pci_path_component(dp, tmp_buf);
1382                 if (!strcmp(parent->type, "sbus"))
1383                         return sbus_path_component(dp, tmp_buf);
1384                 if (!strcmp(parent->type, "upa"))
1385                         return upa_path_component(dp, tmp_buf);
1386                 if (!strcmp(parent->type, "ebus"))
1387                         return ebus_path_component(dp, tmp_buf);
1388                 if (!strcmp(parent->name, "usb") ||
1389                     !strcmp(parent->name, "hub"))
1390                         return usb_path_component(dp, tmp_buf);
1391                 if (!strcmp(parent->type, "i2c"))
1392                         return i2c_path_component(dp, tmp_buf);
1393                 if (!strcmp(parent->type, "firewire"))
1394                         return ieee1394_path_component(dp, tmp_buf);
1395                 if (!strcmp(parent->type, "virtual-devices"))
1396                         return vdev_path_component(dp, tmp_buf);
1397
1398                 /* "isa" is handled with platform naming */
1399         }
1400
1401         /* Use platform naming convention.  */
1402         if (tlb_type == hypervisor)
1403                 return sun4v_path_component(dp, tmp_buf);
1404         else
1405                 return sun4u_path_component(dp, tmp_buf);
1406 }
1407
1408 static char * __init build_path_component(struct device_node *dp)
1409 {
1410         char tmp_buf[64], *n;
1411
1412         tmp_buf[0] = '\0';
1413         __build_path_component(dp, tmp_buf);
1414         if (tmp_buf[0] == '\0')
1415                 strcpy(tmp_buf, dp->name);
1416
1417         n = prom_early_alloc(strlen(tmp_buf) + 1);
1418         strcpy(n, tmp_buf);
1419
1420         return n;
1421 }
1422
1423 static char * __init build_full_name(struct device_node *dp)
1424 {
1425         int len, ourlen, plen;
1426         char *n;
1427
1428         plen = strlen(dp->parent->full_name);
1429         ourlen = strlen(dp->path_component_name);
1430         len = ourlen + plen + 2;
1431
1432         n = prom_early_alloc(len);
1433         strcpy(n, dp->parent->full_name);
1434         if (!is_root_node(dp->parent)) {
1435                 strcpy(n + plen, "/");
1436                 plen++;
1437         }
1438         strcpy(n + plen, dp->path_component_name);
1439
1440         return n;
1441 }
1442
1443 static unsigned int unique_id;
1444
1445 static struct property * __init build_one_prop(phandle node, char *prev, char *special_name, void *special_val, int special_len)
1446 {
1447         static struct property *tmp = NULL;
1448         struct property *p;
1449
1450         if (tmp) {
1451                 p = tmp;
1452                 memset(p, 0, sizeof(*p) + 32);
1453                 tmp = NULL;
1454         } else {
1455                 p = prom_early_alloc(sizeof(struct property) + 32);
1456                 p->unique_id = unique_id++;
1457         }
1458
1459         p->name = (char *) (p + 1);
1460         if (special_name) {
1461                 strcpy(p->name, special_name);
1462                 p->length = special_len;
1463                 p->value = prom_early_alloc(special_len);
1464                 memcpy(p->value, special_val, special_len);
1465         } else {
1466                 if (prev == NULL) {
1467                         prom_firstprop(node, p->name);
1468                 } else {
1469                         prom_nextprop(node, prev, p->name);
1470                 }
1471                 if (strlen(p->name) == 0) {
1472                         tmp = p;
1473                         return NULL;
1474                 }
1475                 p->length = prom_getproplen(node, p->name);
1476                 if (p->length <= 0) {
1477                         p->length = 0;
1478                 } else {
1479                         p->value = prom_early_alloc(p->length + 1);
1480                         prom_getproperty(node, p->name, p->value, p->length);
1481                         ((unsigned char *)p->value)[p->length] = '\0';
1482                 }
1483         }
1484         return p;
1485 }
1486
1487 static struct property * __init build_prop_list(phandle node)
1488 {
1489         struct property *head, *tail;
1490
1491         head = tail = build_one_prop(node, NULL,
1492                                      ".node", &node, sizeof(node));
1493
1494         tail->next = build_one_prop(node, NULL, NULL, NULL, 0);
1495         tail = tail->next;
1496         while(tail) {
1497                 tail->next = build_one_prop(node, tail->name,
1498                                             NULL, NULL, 0);
1499                 tail = tail->next;
1500         }
1501
1502         return head;
1503 }
1504
1505 static char * __init get_one_property(phandle node, const char *name)
1506 {
1507         char *buf = "<NULL>";
1508         int len;
1509
1510         len = prom_getproplen(node, name);
1511         if (len > 0) {
1512                 buf = prom_early_alloc(len);
1513                 prom_getproperty(node, name, buf, len);
1514         }
1515
1516         return buf;
1517 }
1518
1519 static struct device_node * __init create_node(phandle node)
1520 {
1521         struct device_node *dp;
1522
1523         if (!node)
1524                 return NULL;
1525
1526         dp = prom_early_alloc(sizeof(*dp));
1527         dp->unique_id = unique_id++;
1528
1529         kref_init(&dp->kref);
1530
1531         dp->name = get_one_property(node, "name");
1532         dp->type = get_one_property(node, "device_type");
1533         dp->node = node;
1534
1535         dp->properties = build_prop_list(node);
1536
1537         irq_trans_init(dp);
1538
1539         return dp;
1540 }
1541
1542 static struct device_node * __init build_tree(struct device_node *parent, phandle node, struct device_node ***nextp)
1543 {
1544         struct device_node *dp;
1545
1546         dp = create_node(node);
1547         if (dp) {
1548                 *(*nextp) = dp;
1549                 *nextp = &dp->allnext;
1550
1551                 dp->parent = parent;
1552                 dp->path_component_name = build_path_component(dp);
1553                 dp->full_name = build_full_name(dp);
1554
1555                 dp->child = build_tree(dp, prom_getchild(node), nextp);
1556
1557                 dp->sibling = build_tree(parent, prom_getsibling(node), nextp);
1558         }
1559
1560         return dp;
1561 }
1562
1563 void __init prom_build_devicetree(void)
1564 {
1565         struct device_node **nextp;
1566
1567         allnodes = create_node(prom_root_node);
1568         allnodes->path_component_name = "";
1569         allnodes->full_name = "/";
1570
1571         nextp = &allnodes->allnext;
1572         allnodes->child = build_tree(allnodes,
1573                                      prom_getchild(allnodes->node),
1574                                      &nextp);
1575         printk("PROM: Built device tree with %u bytes of memory.\n",
1576                prom_early_allocated);
1577 }