arch/sparc64/kernel/irq.c

   1 /* irq.c: UltraSparc IRQ handling/init/registry.
   2  *
   3  * Copyright (C) 1997, 2007  David S. Miller  (davem@davemloft.net)
   4  * Copyright (C) 1998  Eddie C. Dost    (ecd@skynet.be)
   5  * Copyright (C) 1998  Jakub Jelinek    (jj@ultra.linux.cz)
   6  */
   7
   8 #include <linux/module.h>
   9 #include <linux/sched.h>
  10 #include <linux/ptrace.h>
  11 #include <linux/errno.h>
  12 #include <linux/kernel_stat.h>
  13 #include <linux/signal.h>
  14 #include <linux/mm.h>
  15 #include <linux/interrupt.h>
  16 #include <linux/slab.h>
  17 #include <linux/random.h>
  18 #include <linux/init.h>
  19 #include <linux/delay.h>
  20 #include <linux/proc_fs.h>
  21 #include <linux/seq_file.h>
  22 #include <linux/bootmem.h>
  23 #include <linux/irq.h>
  24 #include <linux/msi.h>
  25
  26 #include <asm/ptrace.h>
  27 #include <asm/processor.h>
  28 #include <asm/atomic.h>
  29 #include <asm/system.h>
  30 #include <asm/irq.h>
  31 #include <asm/io.h>
  32 #include <asm/sbus.h>
  33 #include <asm/iommu.h>
  34 #include <asm/upa.h>
  35 #include <asm/oplib.h>
  36 #include <asm/prom.h>
  37 #include <asm/timer.h>
  38 #include <asm/smp.h>
  39 #include <asm/starfire.h>
  40 #include <asm/uaccess.h>
  41 #include <asm/cache.h>
  42 #include <asm/cpudata.h>
  43 #include <asm/auxio.h>
  44 #include <asm/head.h>
  45 #include <asm/hypervisor.h>
  46
  47 /* UPA nodes send interrupt packet to UltraSparc with first data reg
  48  * value low 5 (7 on Starfire) bits holding the IRQ identifier being
  49  * delivered.  We must translate this into a non-vector IRQ so we can
  50  * set the softint on this cpu.
  51  *
  52  * To make processing these packets efficient and race free we use
  53  * an array of irq buckets below.  The interrupt vector handler in
  54  * entry.S feeds incoming packets into per-cpu pil-indexed lists.
  55  * The IVEC handler does not need to act atomically, the PIL dispatch
  56  * code uses CAS to get an atomic snapshot of the list and clear it
  57  * at the same time.
  58  *
  59  * If you make changes to ino_bucket, please update hand coded assembler
  60  * of the vectored interrupt trap handler(s) in entry.S and sun4v_ivec.S
  61  */
  62 struct ino_bucket {
  63         /* Next handler in per-CPU IRQ worklist.  We know that
  64          * bucket pointers have the high 32-bits clear, so to
  65          * save space we only store the bits we need.
  66          */
  67 /*0x00*/unsigned int irq_chain;
  68
  69         /* Virtual interrupt number assigned to this INO.  */
  70 /*0x04*/unsigned int virt_irq;
  71 };
  72
  73 #define NUM_IVECS       (IMAP_INR + 1)
  74 struct ino_bucket ivector_table[NUM_IVECS] __attribute__ ((aligned (SMP_CACHE_BYTES)));
  75
  76 #define __irq_ino(irq) \
  77         (((struct ino_bucket *)(unsigned long)(irq)) - &ivector_table[0])
  78 #define __bucket(irq) ((struct ino_bucket *)(unsigned long)(irq))
  79 #define __irq(bucket) ((unsigned int)(unsigned long)(bucket))
  80
  81 /* This has to be in the main kernel image, it cannot be
  82  * turned into per-cpu data.  The reason is that the main
  83  * kernel image is locked into the TLB and this structure
  84  * is accessed from the vectored interrupt trap handler.  If
  85  * access to this structure takes a TLB miss it could cause
  86  * the 5-level sparc v9 trap stack to overflow.
  87  */
  88 #define irq_work(__cpu) &(trap_block[(__cpu)].irq_worklist)
  89
  90 static unsigned int virt_to_real_irq_table[NR_IRQS];
  91
  92 static unsigned char virt_irq_alloc(unsigned int real_irq)
  93 {
  94         unsigned char ent;
  95
  96         BUILD_BUG_ON(NR_IRQS >= 256);
  97
  98         for (ent = 1; ent < NR_IRQS; ent++) {
  99                 if (!virt_to_real_irq_table[ent])
 100                         break;
 101         }
 102         if (ent >= NR_IRQS) {
 103                 printk(KERN_ERR "IRQ: Out of virtual IRQs.\n");
 104                 return 0;
 105         }
 106
 107         virt_to_real_irq_table[ent] = real_irq;
 108
 109         return ent;
 110 }
 111
 112 #ifdef CONFIG_PCI_MSI
 113 static void virt_irq_free(unsigned int virt_irq)
 114 {
 115         unsigned int real_irq;
 116
 117         if (virt_irq >= NR_IRQS)
 118                 return;
 119
 120         real_irq = virt_to_real_irq_table[virt_irq];
 121         virt_to_real_irq_table[virt_irq] = 0;
 122
 123         __bucket(real_irq)->virt_irq = 0;
 124 }
 125 #endif
 126
 127 static unsigned int virt_to_real_irq(unsigned char virt_irq)
 128 {
 129         return virt_to_real_irq_table[virt_irq];
 130 }
 131
 132 /*
 133  * /proc/interrupts printing:
 134  */
 135
 136 int show_interrupts(struct seq_file *p, void *v)
 137 {
 138         int i = *(loff_t *) v, j;
 139         struct irqaction * action;
 140         unsigned long flags;
 141
 142         if (i == 0) {
 143                 seq_printf(p, "           ");
 144                 for_each_online_cpu(j)
 145                         seq_printf(p, "CPU%d       ",j);
 146                 seq_putc(p, '\n');
 147         }
 148
 149         if (i < NR_IRQS) {
 150                 spin_lock_irqsave(&irq_desc[i].lock, flags);
 151                 action = irq_desc[i].action;
 152                 if (!action)
 153                         goto skip;
 154                 seq_printf(p, "%3d: ",i);
 155 #ifndef CONFIG_SMP
 156                 seq_printf(p, "%10u ", kstat_irqs(i));
 157 #else
 158                 for_each_online_cpu(j)
 159                         seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
 160 #endif
 161                 seq_printf(p, " %9s", irq_desc[i].chip->typename);
 162                 seq_printf(p, "  %s", action->name);
 163
 164                 for (action=action->next; action; action = action->next)
 165                         seq_printf(p, ", %s", action->name);
 166
 167                 seq_putc(p, '\n');
 168 skip:
 169                 spin_unlock_irqrestore(&irq_desc[i].lock, flags);
 170         }
 171         return 0;
 172 }
 173
 174 static unsigned int sun4u_compute_tid(unsigned long imap, unsigned long cpuid)
 175 {
 176         unsigned int tid;
 177
 178         if (this_is_starfire) {
 179                 tid = starfire_translate(imap, cpuid);
 180                 tid <<= IMAP_TID_SHIFT;
 181                 tid &= IMAP_TID_UPA;
 182         } else {
 183                 if (tlb_type == cheetah || tlb_type == cheetah_plus) {
 184                         unsigned long ver;
 185
 186                         __asm__ ("rdpr %%ver, %0" : "=r" (ver));
 187                         if ((ver >> 32UL) == __JALAPENO_ID ||
 188                             (ver >> 32UL) == __SERRANO_ID) {
 189                                 tid = cpuid << IMAP_TID_SHIFT;
 190                                 tid &= IMAP_TID_JBUS;
 191                         } else {
 192                                 unsigned int a = cpuid & 0x1f;
 193                                 unsigned int n = (cpuid >> 5) & 0x1f;
 194
 195                                 tid = ((a << IMAP_AID_SHIFT) |
 196                                        (n << IMAP_NID_SHIFT));
 197                                 tid &= (IMAP_AID_SAFARI |
 198                                         IMAP_NID_SAFARI);;
 199                         }
 200                 } else {
 201                         tid = cpuid << IMAP_TID_SHIFT;
 202                         tid &= IMAP_TID_UPA;
 203                 }
 204         }
 205
 206         return tid;
 207 }
 208
 209 struct irq_handler_data {
 210         unsigned long   iclr;
 211         unsigned long   imap;
 212
 213         void            (*pre_handler)(unsigned int, void *, void *);
 214         void            *pre_handler_arg1;
 215         void            *pre_handler_arg2;
 216 };
 217
 218 static inline struct ino_bucket *virt_irq_to_bucket(unsigned int virt_irq)
 219 {
 220         unsigned int real_irq = virt_to_real_irq(virt_irq);
 221         struct ino_bucket *bucket = NULL;
 222
 223         if (likely(real_irq))
 224                 bucket = __bucket(real_irq);
 225
 226         return bucket;
 227 }
 228
 229 #ifdef CONFIG_SMP
 230 static int irq_choose_cpu(unsigned int virt_irq)
 231 {
 232         cpumask_t mask = irq_desc[virt_irq].affinity;
 233         int cpuid;
 234
 235         if (cpus_equal(mask, CPU_MASK_ALL)) {
 236                 static int irq_rover;
 237                 static DEFINE_SPINLOCK(irq_rover_lock);
 238                 unsigned long flags;
 239
 240                 /* Round-robin distribution... */
 241         do_round_robin:
 242                 spin_lock_irqsave(&irq_rover_lock, flags);
 243
 244                 while (!cpu_online(irq_rover)) {
 245                         if (++irq_rover >= NR_CPUS)
 246                                 irq_rover = 0;
 247                 }
 248                 cpuid = irq_rover;
 249                 do {
 250                         if (++irq_rover >= NR_CPUS)
 251                                 irq_rover = 0;
 252                 } while (!cpu_online(irq_rover));
 253
 254                 spin_unlock_irqrestore(&irq_rover_lock, flags);
 255         } else {
 256                 cpumask_t tmp;
 257
 258                 cpus_and(tmp, cpu_online_map, mask);
 259
 260                 if (cpus_empty(tmp))
 261                         goto do_round_robin;
 262
 263                 cpuid = first_cpu(tmp);
 264         }
 265
 266         return cpuid;
 267 }
 268 #else
 269 static int irq_choose_cpu(unsigned int virt_irq)
 270 {
 271         return real_hard_smp_processor_id();
 272 }
 273 #endif
 274
 275 static void sun4u_irq_enable(unsigned int virt_irq)
 276 {
 277         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
 278
 279         if (likely(data)) {
 280                 unsigned long cpuid, imap, val;
 281                 unsigned int tid;
 282
 283                 cpuid = irq_choose_cpu(virt_irq);
 284                 imap = data->imap;
 285
 286                 tid = sun4u_compute_tid(imap, cpuid);
 287
 288                 val = upa_readq(imap);
 289                 val &= ~(IMAP_TID_UPA | IMAP_TID_JBUS |
 290                          IMAP_AID_SAFARI | IMAP_NID_SAFARI);
 291                 val |= tid | IMAP_VALID;
 292                 upa_writeq(val, imap);
 293         }
 294 }
 295
 296 static void sun4u_irq_disable(unsigned int virt_irq)
 297 {
 298         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
 299
 300         if (likely(data)) {
 301                 unsigned long imap = data->imap;
 302                 u32 tmp = upa_readq(imap);
 303
 304                 tmp &= ~IMAP_VALID;
 305                 upa_writeq(tmp, imap);
 306         }
 307 }
 308
 309 static void sun4u_irq_end(unsigned int virt_irq)
 310 {
 311         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
 312
 313         if (likely(data))
 314                 upa_writeq(ICLR_IDLE, data->iclr);
 315 }
 316
 317 static void sun4v_irq_enable(unsigned int virt_irq)
 318 {
 319         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
 320         unsigned int ino = bucket - &ivector_table[0];
 321
 322         if (likely(bucket)) {
 323                 unsigned long cpuid;
 324                 int err;
 325
 326                 cpuid = irq_choose_cpu(virt_irq);
 327
 328                 err = sun4v_intr_settarget(ino, cpuid);
 329                 if (err != HV_EOK)
 330                         printk("sun4v_intr_settarget(%x,%lu): err(%d)\n",
 331                                ino, cpuid, err);
 332                 err = sun4v_intr_setenabled(ino, HV_INTR_ENABLED);
 333                 if (err != HV_EOK)
 334                         printk("sun4v_intr_setenabled(%x): err(%d)\n",
 335                                ino, err);
 336         }
 337 }
 338
 339 static void sun4v_irq_disable(unsigned int virt_irq)
 340 {
 341         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
 342         unsigned int ino = bucket - &ivector_table[0];
 343
 344         if (likely(bucket)) {
 345                 int err;
 346
 347                 err = sun4v_intr_setenabled(ino, HV_INTR_DISABLED);
 348                 if (err != HV_EOK)
 349                         printk("sun4v_intr_setenabled(%x): "
 350                                "err(%d)\n", ino, err);
 351         }
 352 }
 353
 354 #ifdef CONFIG_PCI_MSI
 355 static void sun4v_msi_enable(unsigned int virt_irq)
 356 {
 357         sun4v_irq_enable(virt_irq);
 358         unmask_msi_irq(virt_irq);
 359 }
 360
 361 static void sun4v_msi_disable(unsigned int virt_irq)
 362 {
 363         mask_msi_irq(virt_irq);
 364         sun4v_irq_disable(virt_irq);
 365 }
 366 #endif
 367
 368 static void sun4v_irq_end(unsigned int virt_irq)
 369 {
 370         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
 371         unsigned int ino = bucket - &ivector_table[0];
 372
 373         if (likely(bucket)) {
 374                 int err;
 375
 376                 err = sun4v_intr_setstate(ino, HV_INTR_STATE_IDLE);
 377                 if (err != HV_EOK)
 378                         printk("sun4v_intr_setstate(%x): "
 379                                "err(%d)\n", ino, err);
 380         }
 381 }
 382
 383 static void sun4v_virq_enable(unsigned int virt_irq)
 384 {
 385         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
 386         unsigned int ino = bucket - &ivector_table[0];
 387
 388         if (likely(bucket)) {
 389                 unsigned long cpuid, dev_handle, dev_ino;
 390                 int err;
 391
 392                 cpuid = irq_choose_cpu(virt_irq);
 393
 394                 dev_handle = ino & IMAP_IGN;
 395                 dev_ino = ino & IMAP_INO;
 396
 397                 err = sun4v_vintr_set_target(dev_handle, dev_ino, cpuid);
 398                 if (err != HV_EOK)
 399                         printk("sun4v_vintr_set_target(%lx,%lx,%lu): "
 400                                "err(%d)\n",
 401                                dev_handle, dev_ino, cpuid, err);
 402                 err = sun4v_vintr_set_state(dev_handle, dev_ino,
 403                                             HV_INTR_ENABLED);
 404                 if (err != HV_EOK)
 405                         printk("sun4v_vintr_set_state(%lx,%lx,"
 406                                "HV_INTR_ENABLED): err(%d)\n",
 407                                dev_handle, dev_ino, err);
 408         }
 409 }
 410
 411 static void sun4v_virq_disable(unsigned int virt_irq)
 412 {
 413         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
 414         unsigned int ino = bucket - &ivector_table[0];
 415
 416         if (likely(bucket)) {
 417                 unsigned long dev_handle, dev_ino;
 418                 int err;
 419
 420                 dev_handle = ino & IMAP_IGN;
 421                 dev_ino = ino & IMAP_INO;
 422
 423                 err = sun4v_vintr_set_state(dev_handle, dev_ino,
 424                                             HV_INTR_DISABLED);
 425                 if (err != HV_EOK)
 426                         printk("sun4v_vintr_set_state(%lx,%lx,"
 427                                "HV_INTR_DISABLED): err(%d)\n",
 428                                dev_handle, dev_ino, err);
 429         }
 430 }
 431
 432 static void sun4v_virq_end(unsigned int virt_irq)
 433 {
 434         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
 435         unsigned int ino = bucket - &ivector_table[0];
 436
 437         if (likely(bucket)) {
 438                 unsigned long dev_handle, dev_ino;
 439                 int err;
 440
 441                 dev_handle = ino & IMAP_IGN;
 442                 dev_ino = ino & IMAP_INO;
 443
 444                 err = sun4v_vintr_set_state(dev_handle, dev_ino,
 445                                             HV_INTR_STATE_IDLE);
 446                 if (err != HV_EOK)
 447                         printk("sun4v_vintr_set_state(%lx,%lx,"
 448                                 "HV_INTR_STATE_IDLE): err(%d)\n",
 449                                dev_handle, dev_ino, err);
 450         }
 451 }
 452
 453 static void run_pre_handler(unsigned int virt_irq)
 454 {
 455         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
 456         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
 457
 458         if (likely(data->pre_handler)) {
 459                 data->pre_handler(__irq_ino(__irq(bucket)),
 460                                   data->pre_handler_arg1,
 461                                   data->pre_handler_arg2);
 462         }
 463 }
 464
 465 static struct irq_chip sun4u_irq = {
 466         .typename       = "sun4u",
 467         .enable         = sun4u_irq_enable,
 468         .disable        = sun4u_irq_disable,
 469         .end            = sun4u_irq_end,
 470 };
 471
 472 static struct irq_chip sun4u_irq_ack = {
 473         .typename       = "sun4u+ack",
 474         .enable         = sun4u_irq_enable,
 475         .disable        = sun4u_irq_disable,
 476         .ack            = run_pre_handler,
 477         .end            = sun4u_irq_end,
 478 };
 479
 480 static struct irq_chip sun4v_irq = {
 481         .typename       = "sun4v",
 482         .enable         = sun4v_irq_enable,
 483         .disable        = sun4v_irq_disable,
 484         .end            = sun4v_irq_end,
 485 };
 486
 487 static struct irq_chip sun4v_irq_ack = {
 488         .typename       = "sun4v+ack",
 489         .enable         = sun4v_irq_enable,
 490         .disable        = sun4v_irq_disable,
 491         .ack            = run_pre_handler,
 492         .end            = sun4v_irq_end,
 493 };
 494
 495 #ifdef CONFIG_PCI_MSI
 496 static struct irq_chip sun4v_msi = {
 497         .typename       = "sun4v+msi",
 498         .mask           = mask_msi_irq,
 499         .unmask         = unmask_msi_irq,
 500         .enable         = sun4v_msi_enable,
 501         .disable        = sun4v_msi_disable,
 502         .ack            = run_pre_handler,
 503         .end            = sun4v_irq_end,
 504 };
 505 #endif
 506
 507 static struct irq_chip sun4v_virq = {
 508         .typename       = "vsun4v",
 509         .enable         = sun4v_virq_enable,
 510         .disable        = sun4v_virq_disable,
 511         .end            = sun4v_virq_end,
 512 };
 513
 514 static struct irq_chip sun4v_virq_ack = {
 515         .typename       = "vsun4v+ack",
 516         .enable         = sun4v_virq_enable,
 517         .disable        = sun4v_virq_disable,
 518         .ack            = run_pre_handler,
 519         .end            = sun4v_virq_end,
 520 };
 521
 522 void irq_install_pre_handler(int virt_irq,
 523                              void (*func)(unsigned int, void *, void *),
 524                              void *arg1, void *arg2)
 525 {
 526         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
 527         struct irq_chip *chip;
 528
 529         data->pre_handler = func;
 530         data->pre_handler_arg1 = arg1;
 531         data->pre_handler_arg2 = arg2;
 532
 533         chip = get_irq_chip(virt_irq);
 534         if (chip == &sun4u_irq_ack ||
 535             chip == &sun4v_irq_ack ||
 536             chip == &sun4v_virq_ack
 537 #ifdef CONFIG_PCI_MSI
 538             || chip == &sun4v_msi
 539 #endif
 540             )
 541                 return;
 542
 543         chip = (chip == &sun4u_irq ?
 544                 &sun4u_irq_ack :
 545                 (chip == &sun4v_irq ?
 546                  &sun4v_irq_ack : &sun4v_virq_ack));
 547         set_irq_chip(virt_irq, chip);
 548 }
 549
 550 unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap)
 551 {
 552         struct ino_bucket *bucket;
 553         struct irq_handler_data *data;
 554         int ino;
 555
 556         BUG_ON(tlb_type == hypervisor);
 557
 558         ino = (upa_readq(imap) & (IMAP_IGN | IMAP_INO)) + inofixup;
 559         bucket = &ivector_table[ino];
 560         if (!bucket->virt_irq) {
 561                 bucket->virt_irq = virt_irq_alloc(__irq(bucket));
 562                 set_irq_chip(bucket->virt_irq, &sun4u_irq);
 563         }
 564
 565         data = get_irq_chip_data(bucket->virt_irq);
 566         if (unlikely(data))
 567                 goto out;
 568
 569         data = kzalloc(sizeof(struct irq_handler_data), GFP_ATOMIC);
 570         if (unlikely(!data)) {
 571                 prom_printf("IRQ: kzalloc(irq_handler_data) failed.\n");
 572                 prom_halt();
 573         }
 574         set_irq_chip_data(bucket->virt_irq, data);
 575
 576         data->imap  = imap;
 577         data->iclr  = iclr;
 578
 579 out:
 580         return bucket->virt_irq;
 581 }
 582
 583 static unsigned int sun4v_build_common(unsigned long sysino,
 584                                        struct irq_chip *chip)
 585 {
 586         struct ino_bucket *bucket;
 587         struct irq_handler_data *data;
 588
 589         BUG_ON(tlb_type != hypervisor);
 590
 591         bucket = &ivector_table[sysino];
 592         if (!bucket->virt_irq) {
 593                 bucket->virt_irq = virt_irq_alloc(__irq(bucket));
 594                 set_irq_chip(bucket->virt_irq, chip);
 595         }
 596
 597         data = get_irq_chip_data(bucket->virt_irq);
 598         if (unlikely(data))
 599                 goto out;
 600
 601         data = kzalloc(sizeof(struct irq_handler_data), GFP_ATOMIC);
 602         if (unlikely(!data)) {
 603                 prom_printf("IRQ: kzalloc(irq_handler_data) failed.\n");
 604                 prom_halt();
 605         }
 606         set_irq_chip_data(bucket->virt_irq, data);
 607
 608         /* Catch accidental accesses to these things.  IMAP/ICLR handling
 609          * is done by hypervisor calls on sun4v platforms, not by direct
 610          * register accesses.
 611          */
 612         data->imap = ~0UL;
 613         data->iclr = ~0UL;
 614
 615 out:
 616         return bucket->virt_irq;
 617 }
 618
 619 unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino)
 620 {
 621         unsigned long sysino = sun4v_devino_to_sysino(devhandle, devino);
 622
 623         return sun4v_build_common(sysino, &sun4v_irq);
 624 }
 625
 626 unsigned int sun4v_build_virq(u32 devhandle, unsigned int devino)
 627 {
 628         unsigned long sysino, hv_err;
 629
 630         BUG_ON(devhandle & ~IMAP_IGN);
 631         BUG_ON(devino & ~IMAP_INO);
 632
 633         sysino = devhandle | devino;
 634
 635         hv_err = sun4v_vintr_set_cookie(devhandle, devino, sysino);
 636         if (hv_err) {
 637                 prom_printf("IRQ: Fatal, cannot set cookie for [%x:%x] "
 638                             "err=%lu\n", devhandle, devino, hv_err);
 639                 prom_halt();
 640         }
 641
 642         return sun4v_build_common(sysino, &sun4v_virq);
 643 }
 644
 645 #ifdef CONFIG_PCI_MSI
 646 unsigned int sun4v_build_msi(u32 devhandle, unsigned int *virt_irq_p,
 647                              unsigned int msi_start, unsigned int msi_end)
 648 {
 649         struct ino_bucket *bucket;
 650         struct irq_handler_data *data;
 651         unsigned long sysino;
 652         unsigned int devino;
 653
 654         BUG_ON(tlb_type != hypervisor);
 655
 656         /* Find a free devino in the given range.  */
 657         for (devino = msi_start; devino < msi_end; devino++) {
 658                 sysino = sun4v_devino_to_sysino(devhandle, devino);
 659                 bucket = &ivector_table[sysino];
 660                 if (!bucket->virt_irq)
 661                         break;
 662         }
 663         if (devino >= msi_end)
 664                 return 0;
 665
 666         sysino = sun4v_devino_to_sysino(devhandle, devino);
 667         bucket = &ivector_table[sysino];
 668         bucket->virt_irq = virt_irq_alloc(__irq(bucket));
 669         *virt_irq_p = bucket->virt_irq;
 670         set_irq_chip(bucket->virt_irq, &sun4v_msi);
 671
 672         data = get_irq_chip_data(bucket->virt_irq);
 673         if (unlikely(data))
 674                 return devino;
 675
 676         data = kzalloc(sizeof(struct irq_handler_data), GFP_ATOMIC);
 677         if (unlikely(!data)) {
 678                 prom_printf("IRQ: kzalloc(irq_handler_data) failed.\n");
 679                 prom_halt();
 680         }
 681         set_irq_chip_data(bucket->virt_irq, data);
 682
 683         data->imap = ~0UL;
 684         data->iclr = ~0UL;
 685
 686         return devino;
 687 }
 688
 689 void sun4v_destroy_msi(unsigned int virt_irq)
 690 {
 691         virt_irq_free(virt_irq);
 692 }
 693 #endif
 694
 695 void ack_bad_irq(unsigned int virt_irq)
 696 {
 697         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
 698         unsigned int ino = 0xdeadbeef;
 699
 700         if (bucket)
 701                 ino = bucket - &ivector_table[0];
 702
 703         printk(KERN_CRIT "Unexpected IRQ from ino[%x] virt_irq[%u]\n",
 704                ino, virt_irq);
 705 }
 706
 707 void handler_irq(int irq, struct pt_regs *regs)
 708 {
 709         struct ino_bucket *bucket;
 710         struct pt_regs *old_regs;
 711
 712         clear_softint(1 << irq);
 713
 714         old_regs = set_irq_regs(regs);
 715         irq_enter();
 716
 717         /* Sliiiick... */
 718         bucket = __bucket(xchg32(irq_work(smp_processor_id()), 0));
 719         while (bucket) {
 720                 struct ino_bucket *next = __bucket(bucket->irq_chain);
 721
 722                 bucket->irq_chain = 0;
 723                 __do_IRQ(bucket->virt_irq);
 724
 725                 bucket = next;
 726         }
 727
 728         irq_exit();
 729         set_irq_regs(old_regs);
 730 }
 731
 732 struct sun5_timer {
 733         u64     count0;
 734         u64     limit0;
 735         u64     count1;
 736         u64     limit1;
 737 };
 738
 739 static struct sun5_timer *prom_timers;
 740 static u64 prom_limit0, prom_limit1;
 741
 742 static void map_prom_timers(void)
 743 {
 744         struct device_node *dp;
 745         const unsigned int *addr;
 746
 747         /* PROM timer node hangs out in the top level of device siblings... */
 748         dp = of_find_node_by_path("/");
 749         dp = dp->child;
 750         while (dp) {
 751                 if (!strcmp(dp->name, "counter-timer"))
 752                         break;
 753                 dp = dp->sibling;
 754         }
 755
 756         /* Assume if node is not present, PROM uses different tick mechanism
 757          * which we should not care about.
 758          */
 759         if (!dp) {
 760                 prom_timers = (struct sun5_timer *) 0;
 761                 return;
 762         }
 763
 764         /* If PROM is really using this, it must be mapped by him. */
 765         addr = of_get_property(dp, "address", NULL);
 766         if (!addr) {
 767                 prom_printf("PROM does not have timer mapped, trying to continue.\n");
 768                 prom_timers = (struct sun5_timer *) 0;
 769                 return;
 770         }
 771         prom_timers = (struct sun5_timer *) ((unsigned long)addr[0]);
 772 }
 773
 774 static void kill_prom_timer(void)
 775 {
 776         if (!prom_timers)
 777                 return;
 778
 779         /* Save them away for later. */
 780         prom_limit0 = prom_timers->limit0;
 781         prom_limit1 = prom_timers->limit1;
 782
 783         /* Just as in sun4c/sun4m PROM uses timer which ticks at IRQ 14.
 784          * We turn both off here just to be paranoid.
 785          */
 786         prom_timers->limit0 = 0;
 787         prom_timers->limit1 = 0;
 788
 789         /* Wheee, eat the interrupt packet too... */
 790         __asm__ __volatile__(
 791 "       mov     0x40, %%g2\n"
 792 "       ldxa    [%%g0] %0, %%g1\n"
 793 "       ldxa    [%%g2] %1, %%g1\n"
 794 "       stxa    %%g0, [%%g0] %0\n"
 795 "       membar  #Sync\n"
 796         : /* no outputs */
 797         : "i" (ASI_INTR_RECEIVE), "i" (ASI_INTR_R)
 798         : "g1", "g2");
 799 }
 800
 801 void init_irqwork_curcpu(void)
 802 {
 803         int cpu = hard_smp_processor_id();
 804
 805         trap_block[cpu].irq_worklist = 0;
 806 }
 807
 808 /* Please be very careful with register_one_mondo() and
 809  * sun4v_register_mondo_queues().
 810  *
 811  * On SMP this gets invoked from the CPU trampoline before
 812  * the cpu has fully taken over the trap table from OBP,
 813  * and it's kernel stack + %g6 thread register state is
 814  * not fully cooked yet.
 815  *
 816  * Therefore you cannot make any OBP calls, not even prom_printf,
 817  * from these two routines.
 818  */
 819 static void __cpuinit register_one_mondo(unsigned long paddr, unsigned long type, unsigned long qmask)
 820 {
 821         unsigned long num_entries = (qmask + 1) / 64;
 822         unsigned long status;
 823
 824         status = sun4v_cpu_qconf(type, paddr, num_entries);
 825         if (status != HV_EOK) {
 826                 prom_printf("SUN4V: sun4v_cpu_qconf(%lu:%lx:%lu) failed, "
 827                             "err %lu\n", type, paddr, num_entries, status);
 828                 prom_halt();
 829         }
 830 }
 831
 832 static void __cpuinit sun4v_register_mondo_queues(int this_cpu)
 833 {
 834         struct trap_per_cpu *tb = &trap_block[this_cpu];
 835
 836         register_one_mondo(tb->cpu_mondo_pa, HV_CPU_QUEUE_CPU_MONDO,
 837                            tb->cpu_mondo_qmask);
 838         register_one_mondo(tb->dev_mondo_pa, HV_CPU_QUEUE_DEVICE_MONDO,
 839                            tb->dev_mondo_qmask);
 840         register_one_mondo(tb->resum_mondo_pa, HV_CPU_QUEUE_RES_ERROR,
 841                            tb->resum_qmask);
 842         register_one_mondo(tb->nonresum_mondo_pa, HV_CPU_QUEUE_NONRES_ERROR,
 843                            tb->nonresum_qmask);
 844 }
 845
 846 static void __cpuinit alloc_one_mondo(unsigned long *pa_ptr, unsigned long qmask, int use_bootmem)
 847 {
 848         unsigned long size = PAGE_ALIGN(qmask + 1);
 849         unsigned long order = get_order(size);
 850         void *p = NULL;
 851
 852         if (use_bootmem) {
 853                 p = __alloc_bootmem_low(size, size, 0);
 854         } else {
 855                 struct page *page = alloc_pages(GFP_ATOMIC | __GFP_ZERO, order);
 856                 if (page)
 857                         p = page_address(page);
 858         }
 859
 860         if (!p) {
 861                 prom_printf("SUN4V: Error, cannot allocate mondo queue.\n");
 862                 prom_halt();
 863         }
 864
 865         *pa_ptr = __pa(p);
 866 }
 867
 868 static void __cpuinit alloc_one_kbuf(unsigned long *pa_ptr, unsigned long qmask, int use_bootmem)
 869 {
 870         unsigned long size = PAGE_ALIGN(qmask + 1);
 871         unsigned long order = get_order(size);
 872         void *p = NULL;
 873
 874         if (use_bootmem) {
 875                 p = __alloc_bootmem_low(size, size, 0);
 876         } else {
 877                 struct page *page = alloc_pages(GFP_ATOMIC | __GFP_ZERO, order);
 878                 if (page)
 879                         p = page_address(page);
 880         }
 881
 882         if (!p) {
 883                 prom_printf("SUN4V: Error, cannot allocate kbuf page.\n");
 884                 prom_halt();
 885         }
 886
 887         *pa_ptr = __pa(p);
 888 }
 889
 890 static void __cpuinit init_cpu_send_mondo_info(struct trap_per_cpu *tb, int use_bootmem)
 891 {
 892 #ifdef CONFIG_SMP
 893         void *page;
 894
 895         BUILD_BUG_ON((NR_CPUS * sizeof(u16)) > (PAGE_SIZE - 64));
 896
 897         if (use_bootmem)
 898                 page = alloc_bootmem_low_pages(PAGE_SIZE);
 899         else
 900                 page = (void *) get_zeroed_page(GFP_ATOMIC);
 901
 902         if (!page) {
 903                 prom_printf("SUN4V: Error, cannot allocate cpu mondo page.\n");
 904                 prom_halt();
 905         }
 906
 907         tb->cpu_mondo_block_pa = __pa(page);
 908         tb->cpu_list_pa = __pa(page + 64);
 909 #endif
 910 }
 911
 912 /* Allocate and register the mondo and error queues for this cpu.  */
 913 void __cpuinit sun4v_init_mondo_queues(int use_bootmem, int cpu, int alloc, int load)
 914 {
 915         struct trap_per_cpu *tb = &trap_block[cpu];
 916
 917         if (alloc) {
 918                 alloc_one_mondo(&tb->cpu_mondo_pa, tb->cpu_mondo_qmask, use_bootmem);
 919                 alloc_one_mondo(&tb->dev_mondo_pa, tb->dev_mondo_qmask, use_bootmem);
 920                 alloc_one_mondo(&tb->resum_mondo_pa, tb->resum_qmask, use_bootmem);
 921                 alloc_one_kbuf(&tb->resum_kernel_buf_pa, tb->resum_qmask, use_bootmem);
 922                 alloc_one_mondo(&tb->nonresum_mondo_pa, tb->nonresum_qmask, use_bootmem);
 923                 alloc_one_kbuf(&tb->nonresum_kernel_buf_pa, tb->nonresum_qmask, use_bootmem);
 924
 925                 init_cpu_send_mondo_info(tb, use_bootmem);
 926         }
 927
 928         if (load) {
 929                 if (cpu != hard_smp_processor_id()) {
 930                         prom_printf("SUN4V: init mondo on cpu %d not %d\n",
 931                                     cpu, hard_smp_processor_id());
 932                         prom_halt();
 933                 }
 934                 sun4v_register_mondo_queues(cpu);
 935         }
 936 }
 937
 938 static struct irqaction timer_irq_action = {
 939         .name = "timer",
 940 };
 941
 942 /* Only invoked on boot processor. */
 943 void __init init_IRQ(void)
 944 {
 945         map_prom_timers();
 946         kill_prom_timer();
 947         memset(&ivector_table[0], 0, sizeof(ivector_table));
 948
 949         if (tlb_type == hypervisor)
 950                 sun4v_init_mondo_queues(1, hard_smp_processor_id(), 1, 1);
 951
 952         /* We need to clear any IRQ's pending in the soft interrupt
 953          * registers, a spurious one could be left around from the
 954          * PROM timer which we just disabled.
 955          */
 956         clear_softint(get_softint());
 957
 958         /* Now that ivector table is initialized, it is safe
 959          * to receive IRQ vector traps.  We will normally take
 960          * one or two right now, in case some device PROM used
 961          * to boot us wants to speak to us.  We just ignore them.
 962          */
 963         __asm__ __volatile__("rdpr      %%pstate, %%g1\n\t"
 964                              "or        %%g1, %0, %%g1\n\t"
 965                              "wrpr      %%g1, 0x0, %%pstate"
 966                              : /* No outputs */
 967                              : "i" (PSTATE_IE)
 968                              : "g1");
 969
 970         irq_desc[0].action = &timer_irq_action;
 971 }