arch/sparc/kernel/irq_64.c

   1 /* irq.c: UltraSparc IRQ handling/init/registry.
   2  *
   3  * Copyright (C) 1997, 2007, 2008 David S. Miller (davem@davemloft.net)
   4  * Copyright (C) 1998  Eddie C. Dost    (ecd@skynet.be)
   5  * Copyright (C) 1998  Jakub Jelinek    (jj@ultra.linux.cz)
   6  */
   7
   8 #include <linux/module.h>
   9 #include <linux/sched.h>
  10 #include <linux/linkage.h>
  11 #include <linux/ptrace.h>
  12 #include <linux/errno.h>
  13 #include <linux/kernel_stat.h>
  14 #include <linux/signal.h>
  15 #include <linux/mm.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/slab.h>
  18 #include <linux/random.h>
  19 #include <linux/init.h>
  20 #include <linux/delay.h>
  21 #include <linux/proc_fs.h>
  22 #include <linux/seq_file.h>
  23 #include <linux/bootmem.h>
  24 #include <linux/irq.h>
  25
  26 #include <asm/ptrace.h>
  27 #include <asm/processor.h>
  28 #include <asm/atomic.h>
  29 #include <asm/system.h>
  30 #include <asm/irq.h>
  31 #include <asm/io.h>
  32 #include <asm/iommu.h>
  33 #include <asm/upa.h>
  34 #include <asm/oplib.h>
  35 #include <asm/prom.h>
  36 #include <asm/timer.h>
  37 #include <asm/smp.h>
  38 #include <asm/starfire.h>
  39 #include <asm/uaccess.h>
  40 #include <asm/cache.h>
  41 #include <asm/cpudata.h>
  42 #include <asm/auxio.h>
  43 #include <asm/head.h>
  44 #include <asm/hypervisor.h>
  45 #include <asm/cacheflush.h>
  46
  47 #include "entry.h"
  48
  49 #define NUM_IVECS       (IMAP_INR + 1)
  50
  51 struct ino_bucket *ivector_table;
  52 unsigned long ivector_table_pa;
  53
  54 /* On several sun4u processors, it is illegal to mix bypass and
  55  * non-bypass accesses.  Therefore we access all INO buckets
  56  * using bypass accesses only.
  57  */
  58 static unsigned long bucket_get_chain_pa(unsigned long bucket_pa)
  59 {
  60         unsigned long ret;
  61
  62         __asm__ __volatile__("ldxa      [%1] %2, %0"
  63                              : "=&r" (ret)
  64                              : "r" (bucket_pa +
  65                                     offsetof(struct ino_bucket,
  66                                              __irq_chain_pa)),
  67                                "i" (ASI_PHYS_USE_EC));
  68
  69         return ret;
  70 }
  71
  72 static void bucket_clear_chain_pa(unsigned long bucket_pa)
  73 {
  74         __asm__ __volatile__("stxa      %%g0, [%0] %1"
  75                              : /* no outputs */
  76                              : "r" (bucket_pa +
  77                                     offsetof(struct ino_bucket,
  78                                              __irq_chain_pa)),
  79                                "i" (ASI_PHYS_USE_EC));
  80 }
  81
  82 static unsigned int bucket_get_virt_irq(unsigned long bucket_pa)
  83 {
  84         unsigned int ret;
  85
  86         __asm__ __volatile__("lduwa     [%1] %2, %0"
  87                              : "=&r" (ret)
  88                              : "r" (bucket_pa +
  89                                     offsetof(struct ino_bucket,
  90                                              __virt_irq)),
  91                                "i" (ASI_PHYS_USE_EC));
  92
  93         return ret;
  94 }
  95
  96 static void bucket_set_virt_irq(unsigned long bucket_pa,
  97                                 unsigned int virt_irq)
  98 {
  99         __asm__ __volatile__("stwa      %0, [%1] %2"
 100                              : /* no outputs */
 101                              : "r" (virt_irq),
 102                                "r" (bucket_pa +
 103                                     offsetof(struct ino_bucket,
 104                                              __virt_irq)),
 105                                "i" (ASI_PHYS_USE_EC));
 106 }
 107
 108 #define irq_work_pa(__cpu)      &(trap_block[(__cpu)].irq_worklist_pa)
 109
 110 static struct {
 111         unsigned int dev_handle;
 112         unsigned int dev_ino;
 113         unsigned int in_use;
 114 } virt_irq_table[NR_IRQS];
 115 static DEFINE_SPINLOCK(virt_irq_alloc_lock);
 116
 117 unsigned char virt_irq_alloc(unsigned int dev_handle,
 118                              unsigned int dev_ino)
 119 {
 120         unsigned long flags;
 121         unsigned char ent;
 122
 123         BUILD_BUG_ON(NR_IRQS >= 256);
 124
 125         spin_lock_irqsave(&virt_irq_alloc_lock, flags);
 126
 127         for (ent = 1; ent < NR_IRQS; ent++) {
 128                 if (!virt_irq_table[ent].in_use)
 129                         break;
 130         }
 131         if (ent >= NR_IRQS) {
 132                 printk(KERN_ERR "IRQ: Out of virtual IRQs.\n");
 133                 ent = 0;
 134         } else {
 135                 virt_irq_table[ent].dev_handle = dev_handle;
 136                 virt_irq_table[ent].dev_ino = dev_ino;
 137                 virt_irq_table[ent].in_use = 1;
 138         }
 139
 140         spin_unlock_irqrestore(&virt_irq_alloc_lock, flags);
 141
 142         return ent;
 143 }
 144
 145 #ifdef CONFIG_PCI_MSI
 146 void virt_irq_free(unsigned int virt_irq)
 147 {
 148         unsigned long flags;
 149
 150         if (virt_irq >= NR_IRQS)
 151                 return;
 152
 153         spin_lock_irqsave(&virt_irq_alloc_lock, flags);
 154
 155         virt_irq_table[virt_irq].in_use = 0;
 156
 157         spin_unlock_irqrestore(&virt_irq_alloc_lock, flags);
 158 }
 159 #endif
 160
 161 /*
 162  * /proc/interrupts printing:
 163  */
 164
 165 int show_interrupts(struct seq_file *p, void *v)
 166 {
 167         int i = *(loff_t *) v, j;
 168         struct irqaction * action;
 169         unsigned long flags;
 170
 171         if (i == 0) {
 172                 seq_printf(p, "           ");
 173                 for_each_online_cpu(j)
 174                         seq_printf(p, "CPU%d       ",j);
 175                 seq_putc(p, '\n');
 176         }
 177
 178         if (i < NR_IRQS) {
 179                 spin_lock_irqsave(&irq_desc[i].lock, flags);
 180                 action = irq_desc[i].action;
 181                 if (!action)
 182                         goto skip;
 183                 seq_printf(p, "%3d: ",i);
 184 #ifndef CONFIG_SMP
 185                 seq_printf(p, "%10u ", kstat_irqs(i));
 186 #else
 187                 for_each_online_cpu(j)
 188                         seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
 189 #endif
 190                 seq_printf(p, " %9s", irq_desc[i].chip->typename);
 191                 seq_printf(p, "  %s", action->name);
 192
 193                 for (action=action->next; action; action = action->next)
 194                         seq_printf(p, ", %s", action->name);
 195
 196                 seq_putc(p, '\n');
 197 skip:
 198                 spin_unlock_irqrestore(&irq_desc[i].lock, flags);
 199         } else if (i == NR_IRQS) {
 200                 seq_printf(p, "NMI: ");
 201                 for_each_online_cpu(j)
 202                         seq_printf(p, "%10u ", cpu_data(j).__nmi_count);
 203                 seq_printf(p, "     Non-maskable interrupts\n");
 204         }
 205         return 0;
 206 }
 207
 208 static unsigned int sun4u_compute_tid(unsigned long imap, unsigned long cpuid)
 209 {
 210         unsigned int tid;
 211
 212         if (this_is_starfire) {
 213                 tid = starfire_translate(imap, cpuid);
 214                 tid <<= IMAP_TID_SHIFT;
 215                 tid &= IMAP_TID_UPA;
 216         } else {
 217                 if (tlb_type == cheetah || tlb_type == cheetah_plus) {
 218                         unsigned long ver;
 219
 220                         __asm__ ("rdpr %%ver, %0" : "=r" (ver));
 221                         if ((ver >> 32UL) == __JALAPENO_ID ||
 222                             (ver >> 32UL) == __SERRANO_ID) {
 223                                 tid = cpuid << IMAP_TID_SHIFT;
 224                                 tid &= IMAP_TID_JBUS;
 225                         } else {
 226                                 unsigned int a = cpuid & 0x1f;
 227                                 unsigned int n = (cpuid >> 5) & 0x1f;
 228
 229                                 tid = ((a << IMAP_AID_SHIFT) |
 230                                        (n << IMAP_NID_SHIFT));
 231                                 tid &= (IMAP_AID_SAFARI |
 232                                         IMAP_NID_SAFARI);;
 233                         }
 234                 } else {
 235                         tid = cpuid << IMAP_TID_SHIFT;
 236                         tid &= IMAP_TID_UPA;
 237                 }
 238         }
 239
 240         return tid;
 241 }
 242
 243 struct irq_handler_data {
 244         unsigned long   iclr;
 245         unsigned long   imap;
 246
 247         void            (*pre_handler)(unsigned int, void *, void *);
 248         void            *arg1;
 249         void            *arg2;
 250 };
 251
 252 #ifdef CONFIG_SMP
 253 static int irq_choose_cpu(unsigned int virt_irq)
 254 {
 255         cpumask_t mask;
 256         int cpuid;
 257
 258         cpumask_copy(&mask, irq_desc[virt_irq].affinity);
 259         if (cpus_equal(mask, CPU_MASK_ALL)) {
 260                 static int irq_rover;
 261                 static DEFINE_SPINLOCK(irq_rover_lock);
 262                 unsigned long flags;
 263
 264                 /* Round-robin distribution... */
 265         do_round_robin:
 266                 spin_lock_irqsave(&irq_rover_lock, flags);
 267
 268                 while (!cpu_online(irq_rover)) {
 269                         if (++irq_rover >= nr_cpu_ids)
 270                                 irq_rover = 0;
 271                 }
 272                 cpuid = irq_rover;
 273                 do {
 274                         if (++irq_rover >= nr_cpu_ids)
 275                                 irq_rover = 0;
 276                 } while (!cpu_online(irq_rover));
 277
 278                 spin_unlock_irqrestore(&irq_rover_lock, flags);
 279         } else {
 280                 cpumask_t tmp;
 281
 282                 cpus_and(tmp, cpu_online_map, mask);
 283
 284                 if (cpus_empty(tmp))
 285                         goto do_round_robin;
 286
 287                 cpuid = first_cpu(tmp);
 288         }
 289
 290         return cpuid;
 291 }
 292 #else
 293 static int irq_choose_cpu(unsigned int virt_irq)
 294 {
 295         return real_hard_smp_processor_id();
 296 }
 297 #endif
 298
 299 static void sun4u_irq_enable(unsigned int virt_irq)
 300 {
 301         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
 302
 303         if (likely(data)) {
 304                 unsigned long cpuid, imap, val;
 305                 unsigned int tid;
 306
 307                 cpuid = irq_choose_cpu(virt_irq);
 308                 imap = data->imap;
 309
 310                 tid = sun4u_compute_tid(imap, cpuid);
 311
 312                 val = upa_readq(imap);
 313                 val &= ~(IMAP_TID_UPA | IMAP_TID_JBUS |
 314                          IMAP_AID_SAFARI | IMAP_NID_SAFARI);
 315                 val |= tid | IMAP_VALID;
 316                 upa_writeq(val, imap);
 317                 upa_writeq(ICLR_IDLE, data->iclr);
 318         }
 319 }
 320
 321 static int sun4u_set_affinity(unsigned int virt_irq,
 322                                const struct cpumask *mask)
 323 {
 324         sun4u_irq_enable(virt_irq);
 325
 326         return 0;
 327 }
 328
 329 /* Don't do anything.  The desc->status check for IRQ_DISABLED in
 330  * handler_irq() will skip the handler call and that will leave the
 331  * interrupt in the sent state.  The next ->enable() call will hit the
 332  * ICLR register to reset the state machine.
 333  *
 334  * This scheme is necessary, instead of clearing the Valid bit in the
 335  * IMAP register, to handle the case of IMAP registers being shared by
 336  * multiple INOs (and thus ICLR registers).  Since we use a different
 337  * virtual IRQ for each shared IMAP instance, the generic code thinks
 338  * there is only one user so it prematurely calls ->disable() on
 339  * free_irq().
 340  *
 341  * We have to provide an explicit ->disable() method instead of using
 342  * NULL to get the default.  The reason is that if the generic code
 343  * sees that, it also hooks up a default ->shutdown method which
 344  * invokes ->mask() which we do not want.  See irq_chip_set_defaults().
 345  */
 346 static void sun4u_irq_disable(unsigned int virt_irq)
 347 {
 348 }
 349
 350 static void sun4u_irq_eoi(unsigned int virt_irq)
 351 {
 352         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
 353         struct irq_desc *desc = irq_desc + virt_irq;
 354
 355         if (unlikely(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
 356                 return;
 357
 358         if (likely(data))
 359                 upa_writeq(ICLR_IDLE, data->iclr);
 360 }
 361
 362 static void sun4v_irq_enable(unsigned int virt_irq)
 363 {
 364         unsigned int ino = virt_irq_table[virt_irq].dev_ino;
 365         unsigned long cpuid = irq_choose_cpu(virt_irq);
 366         int err;
 367
 368         err = sun4v_intr_settarget(ino, cpuid);
 369         if (err != HV_EOK)
 370                 printk(KERN_ERR "sun4v_intr_settarget(%x,%lu): "
 371                        "err(%d)\n", ino, cpuid, err);
 372         err = sun4v_intr_setstate(ino, HV_INTR_STATE_IDLE);
 373         if (err != HV_EOK)
 374                 printk(KERN_ERR "sun4v_intr_setstate(%x): "
 375                        "err(%d)\n", ino, err);
 376         err = sun4v_intr_setenabled(ino, HV_INTR_ENABLED);
 377         if (err != HV_EOK)
 378                 printk(KERN_ERR "sun4v_intr_setenabled(%x): err(%d)\n",
 379                        ino, err);
 380 }
 381
 382 static int sun4v_set_affinity(unsigned int virt_irq,
 383                                const struct cpumask *mask)
 384 {
 385         unsigned int ino = virt_irq_table[virt_irq].dev_ino;
 386         unsigned long cpuid = irq_choose_cpu(virt_irq);
 387         int err;
 388
 389         err = sun4v_intr_settarget(ino, cpuid);
 390         if (err != HV_EOK)
 391                 printk(KERN_ERR "sun4v_intr_settarget(%x,%lu): "
 392                        "err(%d)\n", ino, cpuid, err);
 393
 394         return 0;
 395 }
 396
 397 static void sun4v_irq_disable(unsigned int virt_irq)
 398 {
 399         unsigned int ino = virt_irq_table[virt_irq].dev_ino;
 400         int err;
 401
 402         err = sun4v_intr_setenabled(ino, HV_INTR_DISABLED);
 403         if (err != HV_EOK)
 404                 printk(KERN_ERR "sun4v_intr_setenabled(%x): "
 405                        "err(%d)\n", ino, err);
 406 }
 407
 408 static void sun4v_irq_eoi(unsigned int virt_irq)
 409 {
 410         unsigned int ino = virt_irq_table[virt_irq].dev_ino;
 411         struct irq_desc *desc = irq_desc + virt_irq;
 412         int err;
 413
 414         if (unlikely(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
 415                 return;
 416
 417         err = sun4v_intr_setstate(ino, HV_INTR_STATE_IDLE);
 418         if (err != HV_EOK)
 419                 printk(KERN_ERR "sun4v_intr_setstate(%x): "
 420                        "err(%d)\n", ino, err);
 421 }
 422
 423 static void sun4v_virq_enable(unsigned int virt_irq)
 424 {
 425         unsigned long cpuid, dev_handle, dev_ino;
 426         int err;
 427
 428         cpuid = irq_choose_cpu(virt_irq);
 429
 430         dev_handle = virt_irq_table[virt_irq].dev_handle;
 431         dev_ino = virt_irq_table[virt_irq].dev_ino;
 432
 433         err = sun4v_vintr_set_target(dev_handle, dev_ino, cpuid);
 434         if (err != HV_EOK)
 435                 printk(KERN_ERR "sun4v_vintr_set_target(%lx,%lx,%lu): "
 436                        "err(%d)\n",
 437                        dev_handle, dev_ino, cpuid, err);
 438         err = sun4v_vintr_set_state(dev_handle, dev_ino,
 439                                     HV_INTR_STATE_IDLE);
 440         if (err != HV_EOK)
 441                 printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
 442                        "HV_INTR_STATE_IDLE): err(%d)\n",
 443                        dev_handle, dev_ino, err);
 444         err = sun4v_vintr_set_valid(dev_handle, dev_ino,
 445                                     HV_INTR_ENABLED);
 446         if (err != HV_EOK)
 447                 printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
 448                        "HV_INTR_ENABLED): err(%d)\n",
 449                        dev_handle, dev_ino, err);
 450 }
 451
 452 static int sun4v_virt_set_affinity(unsigned int virt_irq,
 453                                     const struct cpumask *mask)
 454 {
 455         unsigned long cpuid, dev_handle, dev_ino;
 456         int err;
 457
 458         cpuid = irq_choose_cpu(virt_irq);
 459
 460         dev_handle = virt_irq_table[virt_irq].dev_handle;
 461         dev_ino = virt_irq_table[virt_irq].dev_ino;
 462
 463         err = sun4v_vintr_set_target(dev_handle, dev_ino, cpuid);
 464         if (err != HV_EOK)
 465                 printk(KERN_ERR "sun4v_vintr_set_target(%lx,%lx,%lu): "
 466                        "err(%d)\n",
 467                        dev_handle, dev_ino, cpuid, err);
 468
 469         return 0;
 470 }
 471
 472 static void sun4v_virq_disable(unsigned int virt_irq)
 473 {
 474         unsigned long dev_handle, dev_ino;
 475         int err;
 476
 477         dev_handle = virt_irq_table[virt_irq].dev_handle;
 478         dev_ino = virt_irq_table[virt_irq].dev_ino;
 479
 480         err = sun4v_vintr_set_valid(dev_handle, dev_ino,
 481                                     HV_INTR_DISABLED);
 482         if (err != HV_EOK)
 483                 printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
 484                        "HV_INTR_DISABLED): err(%d)\n",
 485                        dev_handle, dev_ino, err);
 486 }
 487
 488 static void sun4v_virq_eoi(unsigned int virt_irq)
 489 {
 490         struct irq_desc *desc = irq_desc + virt_irq;
 491         unsigned long dev_handle, dev_ino;
 492         int err;
 493
 494         if (unlikely(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
 495                 return;
 496
 497         dev_handle = virt_irq_table[virt_irq].dev_handle;
 498         dev_ino = virt_irq_table[virt_irq].dev_ino;
 499
 500         err = sun4v_vintr_set_state(dev_handle, dev_ino,
 501                                     HV_INTR_STATE_IDLE);
 502         if (err != HV_EOK)
 503                 printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
 504                        "HV_INTR_STATE_IDLE): err(%d)\n",
 505                        dev_handle, dev_ino, err);
 506 }
 507
 508 static struct irq_chip sun4u_irq = {
 509         .typename       = "sun4u",
 510         .enable         = sun4u_irq_enable,
 511         .disable        = sun4u_irq_disable,
 512         .eoi            = sun4u_irq_eoi,
 513         .set_affinity   = sun4u_set_affinity,
 514 };
 515
 516 static struct irq_chip sun4v_irq = {
 517         .typename       = "sun4v",
 518         .enable         = sun4v_irq_enable,
 519         .disable        = sun4v_irq_disable,
 520         .eoi            = sun4v_irq_eoi,
 521         .set_affinity   = sun4v_set_affinity,
 522 };
 523
 524 static struct irq_chip sun4v_virq = {
 525         .typename       = "vsun4v",
 526         .enable         = sun4v_virq_enable,
 527         .disable        = sun4v_virq_disable,
 528         .eoi            = sun4v_virq_eoi,
 529         .set_affinity   = sun4v_virt_set_affinity,
 530 };
 531
 532 static void pre_flow_handler(unsigned int virt_irq,
 533                                       struct irq_desc *desc)
 534 {
 535         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
 536         unsigned int ino = virt_irq_table[virt_irq].dev_ino;
 537
 538         data->pre_handler(ino, data->arg1, data->arg2);
 539
 540         handle_fasteoi_irq(virt_irq, desc);
 541 }
 542
 543 void irq_install_pre_handler(int virt_irq,
 544                              void (*func)(unsigned int, void *, void *),
 545                              void *arg1, void *arg2)
 546 {
 547         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
 548         struct irq_desc *desc = irq_desc + virt_irq;
 549
 550         data->pre_handler = func;
 551         data->arg1 = arg1;
 552         data->arg2 = arg2;
 553
 554         desc->handle_irq = pre_flow_handler;
 555 }
 556
 557 unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap)
 558 {
 559         struct ino_bucket *bucket;
 560         struct irq_handler_data *data;
 561         unsigned int virt_irq;
 562         int ino;
 563
 564         BUG_ON(tlb_type == hypervisor);
 565
 566         ino = (upa_readq(imap) & (IMAP_IGN | IMAP_INO)) + inofixup;
 567         bucket = &ivector_table[ino];
 568         virt_irq = bucket_get_virt_irq(__pa(bucket));
 569         if (!virt_irq) {
 570                 virt_irq = virt_irq_alloc(0, ino);
 571                 bucket_set_virt_irq(__pa(bucket), virt_irq);
 572                 set_irq_chip_and_handler_name(virt_irq,
 573                                               &sun4u_irq,
 574                                               handle_fasteoi_irq,
 575                                               "IVEC");
 576         }
 577
 578         data = get_irq_chip_data(virt_irq);
 579         if (unlikely(data))
 580                 goto out;
 581
 582         data = kzalloc(sizeof(struct irq_handler_data), GFP_ATOMIC);
 583         if (unlikely(!data)) {
 584                 prom_printf("IRQ: kzalloc(irq_handler_data) failed.\n");
 585                 prom_halt();
 586         }
 587         set_irq_chip_data(virt_irq, data);
 588
 589         data->imap  = imap;
 590         data->iclr  = iclr;
 591
 592 out:
 593         return virt_irq;
 594 }
 595
 596 static unsigned int sun4v_build_common(unsigned long sysino,
 597                                        struct irq_chip *chip)
 598 {
 599         struct ino_bucket *bucket;
 600         struct irq_handler_data *data;
 601         unsigned int virt_irq;
 602
 603         BUG_ON(tlb_type != hypervisor);
 604
 605         bucket = &ivector_table[sysino];
 606         virt_irq = bucket_get_virt_irq(__pa(bucket));
 607         if (!virt_irq) {
 608                 virt_irq = virt_irq_alloc(0, sysino);
 609                 bucket_set_virt_irq(__pa(bucket), virt_irq);
 610                 set_irq_chip_and_handler_name(virt_irq, chip,
 611                                               handle_fasteoi_irq,
 612                                               "IVEC");
 613         }
 614
 615         data = get_irq_chip_data(virt_irq);
 616         if (unlikely(data))
 617                 goto out;
 618
 619         data = kzalloc(sizeof(struct irq_handler_data), GFP_ATOMIC);
 620         if (unlikely(!data)) {
 621                 prom_printf("IRQ: kzalloc(irq_handler_data) failed.\n");
 622                 prom_halt();
 623         }
 624         set_irq_chip_data(virt_irq, data);
 625
 626         /* Catch accidental accesses to these things.  IMAP/ICLR handling
 627          * is done by hypervisor calls on sun4v platforms, not by direct
 628          * register accesses.
 629          */
 630         data->imap = ~0UL;
 631         data->iclr = ~0UL;
 632
 633 out:
 634         return virt_irq;
 635 }
 636
 637 unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino)
 638 {
 639         unsigned long sysino = sun4v_devino_to_sysino(devhandle, devino);
 640
 641         return sun4v_build_common(sysino, &sun4v_irq);
 642 }
 643
 644 unsigned int sun4v_build_virq(u32 devhandle, unsigned int devino)
 645 {
 646         struct irq_handler_data *data;
 647         unsigned long hv_err, cookie;
 648         struct ino_bucket *bucket;
 649         struct irq_desc *desc;
 650         unsigned int virt_irq;
 651
 652         bucket = kzalloc(sizeof(struct ino_bucket), GFP_ATOMIC);
 653         if (unlikely(!bucket))
 654                 return 0;
 655         __flush_dcache_range((unsigned long) bucket,
 656                              ((unsigned long) bucket +
 657                               sizeof(struct ino_bucket)));
 658
 659         virt_irq = virt_irq_alloc(devhandle, devino);
 660         bucket_set_virt_irq(__pa(bucket), virt_irq);
 661
 662         set_irq_chip_and_handler_name(virt_irq, &sun4v_virq,
 663                                       handle_fasteoi_irq,
 664                                       "IVEC");
 665
 666         data = kzalloc(sizeof(struct irq_handler_data), GFP_ATOMIC);
 667         if (unlikely(!data))
 668                 return 0;
 669
 670         /* In order to make the LDC channel startup sequence easier,
 671          * especially wrt. locking, we do not let request_irq() enable
 672          * the interrupt.
 673          */
 674         desc = irq_desc + virt_irq;
 675         desc->status |= IRQ_NOAUTOEN;
 676
 677         set_irq_chip_data(virt_irq, data);
 678
 679         /* Catch accidental accesses to these things.  IMAP/ICLR handling
 680          * is done by hypervisor calls on sun4v platforms, not by direct
 681          * register accesses.
 682          */
 683         data->imap = ~0UL;
 684         data->iclr = ~0UL;
 685
 686         cookie = ~__pa(bucket);
 687         hv_err = sun4v_vintr_set_cookie(devhandle, devino, cookie);
 688         if (hv_err) {
 689                 prom_printf("IRQ: Fatal, cannot set cookie for [%x:%x] "
 690                             "err=%lu\n", devhandle, devino, hv_err);
 691                 prom_halt();
 692         }
 693
 694         return virt_irq;
 695 }
 696
 697 void ack_bad_irq(unsigned int virt_irq)
 698 {
 699         unsigned int ino = virt_irq_table[virt_irq].dev_ino;
 700
 701         if (!ino)
 702                 ino = 0xdeadbeef;
 703
 704         printk(KERN_CRIT "Unexpected IRQ from ino[%x] virt_irq[%u]\n",
 705                ino, virt_irq);
 706 }
 707
 708 void *hardirq_stack[NR_CPUS];
 709 void *softirq_stack[NR_CPUS];
 710
 711 static __attribute__((always_inline)) void *set_hardirq_stack(void)
 712 {
 713         void *orig_sp, *sp = hardirq_stack[smp_processor_id()];
 714
 715         __asm__ __volatile__("mov %%sp, %0" : "=r" (orig_sp));
 716         if (orig_sp < sp ||
 717             orig_sp > (sp + THREAD_SIZE)) {
 718                 sp += THREAD_SIZE - 192 - STACK_BIAS;
 719                 __asm__ __volatile__("mov %0, %%sp" : : "r" (sp));
 720         }
 721
 722         return orig_sp;
 723 }
 724 static __attribute__((always_inline)) void restore_hardirq_stack(void *orig_sp)
 725 {
 726         __asm__ __volatile__("mov %0, %%sp" : : "r" (orig_sp));
 727 }
 728
 729 void handler_irq(int irq, struct pt_regs *regs)
 730 {
 731         unsigned long pstate, bucket_pa;
 732         struct pt_regs *old_regs;
 733         void *orig_sp;
 734
 735         clear_softint(1 << irq);
 736
 737         old_regs = set_irq_regs(regs);
 738         irq_enter();
 739
 740         /* Grab an atomic snapshot of the pending IVECs.  */
 741         __asm__ __volatile__("rdpr      %%pstate, %0\n\t"
 742                              "wrpr      %0, %3, %%pstate\n\t"
 743                              "ldx       [%2], %1\n\t"
 744                              "stx       %%g0, [%2]\n\t"
 745                              "wrpr      %0, 0x0, %%pstate\n\t"
 746                              : "=&r" (pstate), "=&r" (bucket_pa)
 747                              : "r" (irq_work_pa(smp_processor_id())),
 748                                "i" (PSTATE_IE)
 749                              : "memory");
 750
 751         orig_sp = set_hardirq_stack();
 752
 753         while (bucket_pa) {
 754                 struct irq_desc *desc;
 755                 unsigned long next_pa;
 756                 unsigned int virt_irq;
 757
 758                 next_pa = bucket_get_chain_pa(bucket_pa);
 759                 virt_irq = bucket_get_virt_irq(bucket_pa);
 760                 bucket_clear_chain_pa(bucket_pa);
 761
 762                 desc = irq_desc + virt_irq;
 763
 764                 if (!(desc->status & IRQ_DISABLED))
 765                         desc->handle_irq(virt_irq, desc);
 766
 767                 bucket_pa = next_pa;
 768         }
 769
 770         restore_hardirq_stack(orig_sp);
 771
 772         irq_exit();
 773         set_irq_regs(old_regs);
 774 }
 775
 776 void do_softirq(void)
 777 {
 778         unsigned long flags;
 779
 780         if (in_interrupt())
 781                 return;
 782
 783         local_irq_save(flags);
 784
 785         if (local_softirq_pending()) {
 786                 void *orig_sp, *sp = softirq_stack[smp_processor_id()];
 787
 788                 sp += THREAD_SIZE - 192 - STACK_BIAS;
 789
 790                 __asm__ __volatile__("mov %%sp, %0\n\t"
 791                                      "mov %1, %%sp"
 792                                      : "=&r" (orig_sp)
 793                                      : "r" (sp));
 794                 __do_softirq();
 795                 __asm__ __volatile__("mov %0, %%sp"
 796                                      : : "r" (orig_sp));
 797         }
 798
 799         local_irq_restore(flags);
 800 }
 801
 802 #ifdef CONFIG_HOTPLUG_CPU
 803 void fixup_irqs(void)
 804 {
 805         unsigned int irq;
 806
 807         for (irq = 0; irq < NR_IRQS; irq++) {
 808                 unsigned long flags;
 809
 810                 spin_lock_irqsave(&irq_desc[irq].lock, flags);
 811                 if (irq_desc[irq].action &&
 812                     !(irq_desc[irq].status & IRQ_PER_CPU)) {
 813                         if (irq_desc[irq].chip->set_affinity)
 814                                 irq_desc[irq].chip->set_affinity(irq,
 815                                         irq_desc[irq].affinity);
 816                 }
 817                 spin_unlock_irqrestore(&irq_desc[irq].lock, flags);
 818         }
 819
 820         tick_ops->disable_irq();
 821 }
 822 #endif
 823
 824 struct sun5_timer {
 825         u64     count0;
 826         u64     limit0;
 827         u64     count1;
 828         u64     limit1;
 829 };
 830
 831 static struct sun5_timer *prom_timers;
 832 static u64 prom_limit0, prom_limit1;
 833
 834 static void map_prom_timers(void)
 835 {
 836         struct device_node *dp;
 837         const unsigned int *addr;
 838
 839         /* PROM timer node hangs out in the top level of device siblings... */
 840         dp = of_find_node_by_path("/");
 841         dp = dp->child;
 842         while (dp) {
 843                 if (!strcmp(dp->name, "counter-timer"))
 844                         break;
 845                 dp = dp->sibling;
 846         }
 847
 848         /* Assume if node is not present, PROM uses different tick mechanism
 849          * which we should not care about.
 850          */
 851         if (!dp) {
 852                 prom_timers = (struct sun5_timer *) 0;
 853                 return;
 854         }
 855
 856         /* If PROM is really using this, it must be mapped by him. */
 857         addr = of_get_property(dp, "address", NULL);
 858         if (!addr) {
 859                 prom_printf("PROM does not have timer mapped, trying to continue.\n");
 860                 prom_timers = (struct sun5_timer *) 0;
 861                 return;
 862         }
 863         prom_timers = (struct sun5_timer *) ((unsigned long)addr[0]);
 864 }
 865
 866 static void kill_prom_timer(void)
 867 {
 868         if (!prom_timers)
 869                 return;
 870
 871         /* Save them away for later. */
 872         prom_limit0 = prom_timers->limit0;
 873         prom_limit1 = prom_timers->limit1;
 874
 875         /* Just as in sun4c/sun4m PROM uses timer which ticks at IRQ 14.
 876          * We turn both off here just to be paranoid.
 877          */
 878         prom_timers->limit0 = 0;
 879         prom_timers->limit1 = 0;
 880
 881         /* Wheee, eat the interrupt packet too... */
 882         __asm__ __volatile__(
 883 "       mov     0x40, %%g2\n"
 884 "       ldxa    [%%g0] %0, %%g1\n"
 885 "       ldxa    [%%g2] %1, %%g1\n"
 886 "       stxa    %%g0, [%%g0] %0\n"
 887 "       membar  #Sync\n"
 888         : /* no outputs */
 889         : "i" (ASI_INTR_RECEIVE), "i" (ASI_INTR_R)
 890         : "g1", "g2");
 891 }
 892
 893 void notrace init_irqwork_curcpu(void)
 894 {
 895         int cpu = hard_smp_processor_id();
 896
 897         trap_block[cpu].irq_worklist_pa = 0UL;
 898 }
 899
 900 /* Please be very careful with register_one_mondo() and
 901  * sun4v_register_mondo_queues().
 902  *
 903  * On SMP this gets invoked from the CPU trampoline before
 904  * the cpu has fully taken over the trap table from OBP,
 905  * and it's kernel stack + %g6 thread register state is
 906  * not fully cooked yet.
 907  *
 908  * Therefore you cannot make any OBP calls, not even prom_printf,
 909  * from these two routines.
 910  */
 911 static void __cpuinit register_one_mondo(unsigned long paddr, unsigned long type, unsigned long qmask)
 912 {
 913         unsigned long num_entries = (qmask + 1) / 64;
 914         unsigned long status;
 915
 916         status = sun4v_cpu_qconf(type, paddr, num_entries);
 917         if (status != HV_EOK) {
 918                 prom_printf("SUN4V: sun4v_cpu_qconf(%lu:%lx:%lu) failed, "
 919                             "err %lu\n", type, paddr, num_entries, status);
 920                 prom_halt();
 921         }
 922 }
 923
 924 void __cpuinit notrace sun4v_register_mondo_queues(int this_cpu)
 925 {
 926         struct trap_per_cpu *tb = &trap_block[this_cpu];
 927
 928         register_one_mondo(tb->cpu_mondo_pa, HV_CPU_QUEUE_CPU_MONDO,
 929                            tb->cpu_mondo_qmask);
 930         register_one_mondo(tb->dev_mondo_pa, HV_CPU_QUEUE_DEVICE_MONDO,
 931                            tb->dev_mondo_qmask);
 932         register_one_mondo(tb->resum_mondo_pa, HV_CPU_QUEUE_RES_ERROR,
 933                            tb->resum_qmask);
 934         register_one_mondo(tb->nonresum_mondo_pa, HV_CPU_QUEUE_NONRES_ERROR,
 935                            tb->nonresum_qmask);
 936 }
 937
 938 static void __init alloc_one_mondo(unsigned long *pa_ptr, unsigned long qmask)
 939 {
 940         unsigned long size = PAGE_ALIGN(qmask + 1);
 941         void *p = __alloc_bootmem(size, size, 0);
 942         if (!p) {
 943                 prom_printf("SUN4V: Error, cannot allocate mondo queue.\n");
 944                 prom_halt();
 945         }
 946
 947         *pa_ptr = __pa(p);
 948 }
 949
 950 static void __init alloc_one_kbuf(unsigned long *pa_ptr, unsigned long qmask)
 951 {
 952         unsigned long size = PAGE_ALIGN(qmask + 1);
 953         void *p = __alloc_bootmem(size, size, 0);
 954
 955         if (!p) {
 956                 prom_printf("SUN4V: Error, cannot allocate kbuf page.\n");
 957                 prom_halt();
 958         }
 959
 960         *pa_ptr = __pa(p);
 961 }
 962
 963 static void __init init_cpu_send_mondo_info(struct trap_per_cpu *tb)
 964 {
 965 #ifdef CONFIG_SMP
 966         void *page;
 967
 968         BUILD_BUG_ON((NR_CPUS * sizeof(u16)) > (PAGE_SIZE - 64));
 969
 970         page = alloc_bootmem_pages(PAGE_SIZE);
 971         if (!page) {
 972                 prom_printf("SUN4V: Error, cannot allocate cpu mondo page.\n");
 973                 prom_halt();
 974         }
 975
 976         tb->cpu_mondo_block_pa = __pa(page);
 977         tb->cpu_list_pa = __pa(page + 64);
 978 #endif
 979 }
 980
 981 /* Allocate mondo and error queues for all possible cpus.  */
 982 static void __init sun4v_init_mondo_queues(void)
 983 {
 984         int cpu;
 985
 986         for_each_possible_cpu(cpu) {
 987                 struct trap_per_cpu *tb = &trap_block[cpu];
 988
 989                 alloc_one_mondo(&tb->cpu_mondo_pa, tb->cpu_mondo_qmask);
 990                 alloc_one_mondo(&tb->dev_mondo_pa, tb->dev_mondo_qmask);
 991                 alloc_one_mondo(&tb->resum_mondo_pa, tb->resum_qmask);
 992                 alloc_one_kbuf(&tb->resum_kernel_buf_pa, tb->resum_qmask);
 993                 alloc_one_mondo(&tb->nonresum_mondo_pa, tb->nonresum_qmask);
 994                 alloc_one_kbuf(&tb->nonresum_kernel_buf_pa,
 995                                tb->nonresum_qmask);
 996         }
 997 }
 998
 999 static void __init init_send_mondo_info(void)
1000 {
1001         int cpu;
1002
1003         for_each_possible_cpu(cpu) {
1004                 struct trap_per_cpu *tb = &trap_block[cpu];
1005
1006                 init_cpu_send_mondo_info(tb);
1007         }
1008 }
1009
1010 static struct irqaction timer_irq_action = {
1011         .name = "timer",
1012 };
1013
1014 /* Only invoked on boot processor. */
1015 void __init init_IRQ(void)
1016 {
1017         unsigned long size;
1018
1019         map_prom_timers();
1020         kill_prom_timer();
1021
1022         size = sizeof(struct ino_bucket) * NUM_IVECS;
1023         ivector_table = alloc_bootmem(size);
1024         if (!ivector_table) {
1025                 prom_printf("Fatal error, cannot allocate ivector_table\n");
1026                 prom_halt();
1027         }
1028         __flush_dcache_range((unsigned long) ivector_table,
1029                              ((unsigned long) ivector_table) + size);
1030
1031         ivector_table_pa = __pa(ivector_table);
1032
1033         if (tlb_type == hypervisor)
1034                 sun4v_init_mondo_queues();
1035
1036         init_send_mondo_info();
1037
1038         if (tlb_type == hypervisor) {
1039                 /* Load up the boot cpu's entries.  */
1040                 sun4v_register_mondo_queues(hard_smp_processor_id());
1041         }
1042
1043         /* We need to clear any IRQ's pending in the soft interrupt
1044          * registers, a spurious one could be left around from the
1045          * PROM timer which we just disabled.
1046          */
1047         clear_softint(get_softint());
1048
1049         /* Now that ivector table is initialized, it is safe
1050          * to receive IRQ vector traps.  We will normally take
1051          * one or two right now, in case some device PROM used
1052          * to boot us wants to speak to us.  We just ignore them.
1053          */
1054         __asm__ __volatile__("rdpr      %%pstate, %%g1\n\t"
1055                              "or        %%g1, %0, %%g1\n\t"
1056                              "wrpr      %%g1, 0x0, %%pstate"
1057                              : /* No outputs */
1058                              : "i" (PSTATE_IE)
1059                              : "g1");
1060
1061         irq_desc[0].action = &timer_irq_action;
1062 }