arch/sh/boards/mach-se/7722/irq.c

   1 /*
   2  * linux/arch/sh/boards/se/7722/irq.c
   3  *
   4  * Copyright (C) 2007  Nobuhiro Iwamatsu
   5  *
   6  * Hitachi UL SolutionEngine 7722 Support.
   7  *
   8  * This file is subject to the terms and conditions of the GNU General Public
   9  * License.  See the file "COPYING" in the main directory of this archive
  10  * for more details.
  11  */
  12 #include <linux/init.h>
  13 #include <linux/irq.h>
  14 #include <linux/interrupt.h>
  15 #include <asm/irq.h>
  16 #include <asm/io.h>
  17 #include <mach-se/mach/se7722.h>
  18
  19 unsigned int se7722_fpga_irq[SE7722_FPGA_IRQ_NR] = { 0, };
  20
  21 static void disable_se7722_irq(unsigned int irq)
  22 {
  23         unsigned int bit = (unsigned int)get_irq_chip_data(irq);
  24         ctrl_outw(ctrl_inw(IRQ01_MASK) | 1 << bit, IRQ01_MASK);
  25 }
  26
  27 static void enable_se7722_irq(unsigned int irq)
  28 {
  29         unsigned int bit = (unsigned int)get_irq_chip_data(irq);
  30         ctrl_outw(ctrl_inw(IRQ01_MASK) & ~(1 << bit), IRQ01_MASK);
  31 }
  32
  33 static struct irq_chip se7722_irq_chip __read_mostly = {
  34         .name           = "SE7722-FPGA",
  35         .mask           = disable_se7722_irq,
  36         .unmask         = enable_se7722_irq,
  37         .mask_ack       = disable_se7722_irq,
  38 };
  39
  40 static void se7722_irq_demux(unsigned int irq, struct irq_desc *desc)
  41 {
  42         unsigned short intv = ctrl_inw(IRQ01_STS);
  43         unsigned int ext_irq = 0;
  44
  45         intv &= (1 << SE7722_FPGA_IRQ_NR) - 1;
  46
  47         for (; intv; intv >>= 1, ext_irq++) {
  48                 if (!(intv & 1))
  49                         continue;
  50
  51                 generic_handle_irq(se7722_fpga_irq[ext_irq]);
  52         }
  53 }
  54
  55 /*
  56  * Initialize IRQ setting
  57  */
  58 void __init init_se7722_IRQ(void)
  59 {
  60         int i, irq;
  61
  62         ctrl_outw(0, IRQ01_MASK);       /* disable all irqs */
  63         ctrl_outw(0x2000, 0xb03fffec);  /* mrshpc irq enable */
  64
  65         for (i = 0; i < SE7722_FPGA_IRQ_NR; i++) {
  66                 irq = create_irq();
  67                 if (irq < 0)
  68                         return;
  69                 se7722_fpga_irq[i] = irq;
  70
  71                 set_irq_chip_and_handler_name(se7722_fpga_irq[i],
  72                                               &se7722_irq_chip,
  73                                               handle_level_irq, "level");
  74
  75                 set_irq_chip_data(se7722_fpga_irq[i], (void *)i);
  76         }
  77
  78         set_irq_chained_handler(IRQ0_IRQ, se7722_irq_demux);
  79         set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW);
  80
  81         set_irq_chained_handler(IRQ1_IRQ, se7722_irq_demux);
  82         set_irq_type(IRQ1_IRQ, IRQ_TYPE_LEVEL_LOW);
  83 }