1 /* SPDX-License-Identifier: GPL-2.0 */
3 * S390 low-level entry points.
5 * Copyright IBM Corp. 1999, 2012
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 * Hartmut Penner (hp@de.ibm.com),
8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
9 * Heiko Carstens <heiko.carstens@de.ibm.com>
12 #include <linux/init.h>
13 #include <linux/linkage.h>
14 #include <asm/processor.h>
15 #include <asm/cache.h>
16 #include <asm/ctl_reg.h>
17 #include <asm/errno.h>
18 #include <asm/ptrace.h>
19 #include <asm/thread_info.h>
20 #include <asm/asm-offsets.h>
21 #include <asm/unistd.h>
25 #include <asm/vx-insn.h>
26 #include <asm/setup.h>
28 #include <asm/export.h>
31 __PT_R1 = __PT_GPRS + 8
32 __PT_R2 = __PT_GPRS + 16
33 __PT_R3 = __PT_GPRS + 24
34 __PT_R4 = __PT_GPRS + 32
35 __PT_R5 = __PT_GPRS + 40
36 __PT_R6 = __PT_GPRS + 48
37 __PT_R7 = __PT_GPRS + 56
38 __PT_R8 = __PT_GPRS + 64
39 __PT_R9 = __PT_GPRS + 72
40 __PT_R10 = __PT_GPRS + 80
41 __PT_R11 = __PT_GPRS + 88
42 __PT_R12 = __PT_GPRS + 96
43 __PT_R13 = __PT_GPRS + 104
44 __PT_R14 = __PT_GPRS + 112
45 __PT_R15 = __PT_GPRS + 120
47 STACK_SHIFT = PAGE_SHIFT + THREAD_SIZE_ORDER
48 STACK_SIZE = 1 << STACK_SHIFT
49 STACK_INIT = STACK_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE
51 _TIF_WORK = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
52 _TIF_UPROBE | _TIF_GUARDED_STORAGE | _TIF_PATCH_PENDING)
53 _TIF_TRACE = (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | _TIF_SECCOMP | \
54 _TIF_SYSCALL_TRACEPOINT)
55 _CIF_WORK = (_CIF_MCCK_PENDING | _CIF_ASCE_PRIMARY | \
56 _CIF_ASCE_SECONDARY | _CIF_FPU)
57 _PIF_WORK = (_PIF_PER_TRAP | _PIF_SYSCALL_RESTART)
59 #define BASED(name) name-cleanup_critical(%r13)
62 #ifdef CONFIG_TRACE_IRQFLAGS
64 brasl %r14,trace_hardirqs_on_caller
69 #ifdef CONFIG_TRACE_IRQFLAGS
71 brasl %r14,trace_hardirqs_off_caller
75 .macro LOCKDEP_SYS_EXIT
77 tm __PT_PSW+1(%r11),0x01 # returning to user ?
79 brasl %r14,lockdep_sys_exit
83 .macro CHECK_STACK stacksize,savearea
84 #ifdef CONFIG_CHECK_STACK
85 tml %r15,\stacksize - CONFIG_STACK_GUARD
91 .macro SWITCH_ASYNC savearea,timer
92 tmhh %r8,0x0001 # interrupting from user ?
95 slg %r14,BASED(.Lcritical_start)
96 clg %r14,BASED(.Lcritical_length)
98 lghi %r11,\savearea # inside critical section, do cleanup
99 brasl %r14,cleanup_critical
100 tmhh %r8,0x0001 # retest problem state after cleanup
102 0: lg %r14,__LC_ASYNC_STACK # are we already on the async stack?
104 srag %r14,%r14,STACK_SHIFT
106 CHECK_STACK 1<<STACK_SHIFT,\savearea
107 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
109 1: UPDATE_VTIME %r14,%r15,\timer
110 2: lg %r15,__LC_ASYNC_STACK # load async stack
111 3: la %r11,STACK_FRAME_OVERHEAD(%r15)
114 .macro UPDATE_VTIME w1,w2,enter_timer
115 lg \w1,__LC_EXIT_TIMER
116 lg \w2,__LC_LAST_UPDATE_TIMER
118 slg \w2,__LC_EXIT_TIMER
119 alg \w1,__LC_USER_TIMER
120 alg \w2,__LC_SYSTEM_TIMER
121 stg \w1,__LC_USER_TIMER
122 stg \w2,__LC_SYSTEM_TIMER
123 mvc __LC_LAST_UPDATE_TIMER(8),\enter_timer
127 stg %r8,__LC_RETURN_PSW
128 ni __LC_RETURN_PSW,0xbf
133 #ifdef CONFIG_HAVE_MARCH_Z9_109_FEATURES
134 .insn s,0xb27c0000,\savearea # store clock fast
136 .insn s,0xb2050000,\savearea # store clock
141 * The TSTMSK macro generates a test-under-mask instruction by
142 * calculating the memory offset for the specified mask value.
143 * Mask value can be any constant. The macro shifts the mask
144 * value to calculate the memory offset for the test-under-mask
147 .macro TSTMSK addr, mask, size=8, bytepos=0
148 .if (\bytepos < \size) && (\mask >> 8)
150 .error "Mask exceeds byte boundary"
152 TSTMSK \addr, "(\mask >> 8)", \size, "(\bytepos + 1)"
156 .error "Mask must not be zero"
158 off = \size - \bytepos - 1
162 .section .kprobes.text, "ax"
165 * This nop exists only in order to avoid that __switch_to starts at
166 * the beginning of the kprobes text section. In that case we would
167 * have several symbols at the same address. E.g. objdump would take
168 * an arbitrary symbol name when disassembling this code.
169 * With the added nop in between the __switch_to symbol is unique
175 * Scheduler resume function, called by switch_to
176 * gpr2 = (task_struct *) prev
177 * gpr3 = (task_struct *) next
182 stmg %r6,%r15,__SF_GPRS(%r15) # store gprs of prev task
184 aghi %r1,__TASK_thread # thread_struct of prev task
185 lg %r5,__TASK_stack(%r3) # start of kernel stack of next
186 stg %r15,__THREAD_ksp(%r1) # store kernel stack of prev
188 aghi %r1,__TASK_thread # thread_struct of next task
190 aghi %r15,STACK_INIT # end of kernel stack of next
191 stg %r3,__LC_CURRENT # store task struct of next
192 stg %r15,__LC_KERNEL_STACK # store end of kernel stack
193 lg %r15,__THREAD_ksp(%r1) # load kernel stack of next
194 mvc __LC_CURRENT_PID(4,%r0),__TASK_pid(%r3) # store pid of next
195 lmg %r6,%r15,__SF_GPRS(%r15) # load gprs of next task
196 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP
198 .insn s,0xb2800000,__LC_LPP # set program parameter
203 #if IS_ENABLED(CONFIG_KVM)
205 * sie64a calling convention:
206 * %r2 pointer to sie control block
207 * %r3 guest register save area
210 stmg %r6,%r14,__SF_GPRS(%r15) # save kernel registers
211 stg %r2,__SF_EMPTY(%r15) # save control block pointer
212 stg %r3,__SF_EMPTY+8(%r15) # save guest register save area
213 xc __SF_EMPTY+16(8,%r15),__SF_EMPTY+16(%r15) # reason code = 0
214 TSTMSK __LC_CPU_FLAGS,_CIF_FPU # load guest fp/vx registers ?
215 jno .Lsie_load_guest_gprs
216 brasl %r14,load_fpu_regs # load guest fp/vx regs
217 .Lsie_load_guest_gprs:
218 lmg %r0,%r13,0(%r3) # load guest gprs 0-13
219 lg %r14,__LC_GMAP # get gmap pointer
222 lctlg %c1,%c1,__GMAP_ASCE(%r14) # load primary asce
224 lg %r14,__SF_EMPTY(%r15) # get control block pointer
225 oi __SIE_PROG0C+3(%r14),1 # we are going into SIE now
226 tm __SIE_PROG20+3(%r14),3 # last exit...
228 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
229 jo .Lsie_skip # exit if fp/vx regs changed
233 ni __SIE_PROG0C+3(%r14),0xfe # no longer in SIE
234 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
236 # some program checks are suppressing. C code (e.g. do_protection_exception)
237 # will rewind the PSW by the ILC, which is often 4 bytes in case of SIE. There
238 # are some corner cases (e.g. runtime instrumentation) where ILC is unpredictable.
239 # Other instructions between sie64a and .Lsie_done should not cause program
240 # interrupts. So lets use 3 nops as a landing pad for all possible rewinds.
241 # See also .Lcleanup_sie
250 lg %r14,__SF_EMPTY+8(%r15) # load guest register save area
251 stmg %r0,%r13,0(%r14) # save guest gprs 0-13
252 lmg %r6,%r14,__SF_GPRS(%r15) # restore kernel registers
253 lg %r2,__SF_EMPTY+16(%r15) # return exit reason code
257 stg %r14,__SF_EMPTY+16(%r15) # set exit reason code
260 EX_TABLE(.Lrewind_pad6,.Lsie_fault)
261 EX_TABLE(.Lrewind_pad4,.Lsie_fault)
262 EX_TABLE(.Lrewind_pad2,.Lsie_fault)
263 EX_TABLE(sie_exit,.Lsie_fault)
264 EXPORT_SYMBOL(sie64a)
265 EXPORT_SYMBOL(sie_exit)
269 * SVC interrupt handler routine. System calls are synchronous events and
270 * are executed with interrupts enabled.
274 stpt __LC_SYNC_ENTER_TIMER
276 stmg %r8,%r15,__LC_SAVE_AREA_SYNC
278 lghi %r13,__TASK_thread
279 lghi %r14,_PIF_SYSCALL
281 lg %r15,__LC_KERNEL_STACK
282 la %r11,STACK_FRAME_OVERHEAD(%r15) # pointer to pt_regs
284 UPDATE_VTIME %r8,%r9,__LC_SYNC_ENTER_TIMER
285 stmg %r0,%r7,__PT_R0(%r11)
286 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
287 mvc __PT_PSW(16,%r11),__LC_SVC_OLD_PSW
288 mvc __PT_INT_CODE(4,%r11),__LC_SVC_ILC
289 stg %r14,__PT_FLAGS(%r11)
291 # load address of system call table
292 lg %r10,__THREAD_sysc_table(%r13,%r12)
293 llgh %r8,__PT_INT_CODE+2(%r11)
294 slag %r8,%r8,2 # shift and test for svc 0
296 # svc 0: system call number in %r1
297 llgfr %r1,%r1 # clear high word in r1
300 sth %r1,__PT_INT_CODE+2(%r11)
303 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
304 stg %r2,__PT_ORIG_GPR2(%r11)
305 stg %r7,STACK_FRAME_OVERHEAD(%r15)
306 lgf %r9,0(%r8,%r10) # get system call add.
307 TSTMSK __TI_flags(%r12),_TIF_TRACE
309 basr %r14,%r9 # call sys_xxxx
310 stg %r2,__PT_R2(%r11) # store return value
315 TSTMSK __PT_FLAGS(%r11),_PIF_WORK
317 TSTMSK __TI_flags(%r12),_TIF_WORK
318 jnz .Lsysc_work # check for work
319 TSTMSK __LC_CPU_FLAGS,_CIF_WORK
322 lg %r14,__LC_VDSO_PER_CPU
323 lmg %r0,%r10,__PT_R0(%r11)
324 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11)
327 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
328 lmg %r11,%r15,__PT_R11(%r11)
329 lpswe __LC_RETURN_PSW
333 # One of the work bits is on. Find out which one.
336 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING
337 jo .Lsysc_mcck_pending
338 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED
340 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL_RESTART
341 jo .Lsysc_syscall_restart
342 #ifdef CONFIG_UPROBES
343 TSTMSK __TI_flags(%r12),_TIF_UPROBE
344 jo .Lsysc_uprobe_notify
346 TSTMSK __TI_flags(%r12),_TIF_GUARDED_STORAGE
347 jo .Lsysc_guarded_storage
348 TSTMSK __PT_FLAGS(%r11),_PIF_PER_TRAP
350 #ifdef CONFIG_LIVEPATCH
351 TSTMSK __TI_flags(%r12),_TIF_PATCH_PENDING
352 jo .Lsysc_patch_pending # handle live patching just before
353 # signals and possible syscall restart
355 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL_RESTART
356 jo .Lsysc_syscall_restart
357 TSTMSK __TI_flags(%r12),_TIF_SIGPENDING
359 TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME
360 jo .Lsysc_notify_resume
361 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
363 TSTMSK __LC_CPU_FLAGS,(_CIF_ASCE_PRIMARY|_CIF_ASCE_SECONDARY)
365 j .Lsysc_return # beware of critical section cleanup
368 # _TIF_NEED_RESCHED is set, call schedule
371 larl %r14,.Lsysc_return
375 # _CIF_MCCK_PENDING is set, call handler
378 larl %r14,.Lsysc_return
379 jg s390_handle_mcck # TIF bit will be cleared by handler
382 # _CIF_ASCE_PRIMARY and/or CIF_ASCE_SECONDARY set, load user space asce
385 ni __LC_CPU_FLAGS+7,255-_CIF_ASCE_PRIMARY
386 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
387 TSTMSK __LC_CPU_FLAGS,_CIF_ASCE_SECONDARY
389 larl %r14,.Lsysc_return
393 # CIF_FPU is set, restore floating-point controls and floating-point registers.
396 larl %r14,.Lsysc_return
400 # _TIF_SIGPENDING is set, call do_signal
403 lgr %r2,%r11 # pass pointer to pt_regs
405 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL
408 lghi %r13,__TASK_thread
409 lmg %r2,%r7,__PT_R2(%r11) # load svc arguments
410 lghi %r1,0 # svc 0 returns -ENOSYS
414 # _TIF_NOTIFY_RESUME is set, call do_notify_resume
416 .Lsysc_notify_resume:
417 lgr %r2,%r11 # pass pointer to pt_regs
418 larl %r14,.Lsysc_return
422 # _TIF_UPROBE is set, call uprobe_notify_resume
424 #ifdef CONFIG_UPROBES
425 .Lsysc_uprobe_notify:
426 lgr %r2,%r11 # pass pointer to pt_regs
427 larl %r14,.Lsysc_return
428 jg uprobe_notify_resume
432 # _TIF_GUARDED_STORAGE is set, call guarded_storage_load
434 .Lsysc_guarded_storage:
435 lgr %r2,%r11 # pass pointer to pt_regs
436 larl %r14,.Lsysc_return
439 # _TIF_PATCH_PENDING is set, call klp_update_patch_state
441 #ifdef CONFIG_LIVEPATCH
442 .Lsysc_patch_pending:
443 lg %r2,__LC_CURRENT # pass pointer to task struct
444 larl %r14,.Lsysc_return
445 jg klp_update_patch_state
449 # _PIF_PER_TRAP is set, call do_per_trap
452 ni __PT_FLAGS+7(%r11),255-_PIF_PER_TRAP
453 lgr %r2,%r11 # pass pointer to pt_regs
454 larl %r14,.Lsysc_return
458 # _PIF_SYSCALL_RESTART is set, repeat the current system call
460 .Lsysc_syscall_restart:
461 ni __PT_FLAGS+7(%r11),255-_PIF_SYSCALL_RESTART
462 lmg %r1,%r7,__PT_R1(%r11) # load svc arguments
463 lg %r2,__PT_ORIG_GPR2(%r11)
467 # call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
468 # and after the system call
471 lgr %r2,%r11 # pass pointer to pt_regs
473 llgh %r0,__PT_INT_CODE+2(%r11)
474 stg %r0,__PT_R2(%r11)
475 brasl %r14,do_syscall_trace_enter
482 lmg %r3,%r7,__PT_R3(%r11)
483 stg %r7,STACK_FRAME_OVERHEAD(%r15)
484 lg %r2,__PT_ORIG_GPR2(%r11)
485 basr %r14,%r9 # call sys_xxx
486 stg %r2,__PT_R2(%r11) # store return value
488 TSTMSK __TI_flags(%r12),_TIF_TRACE
490 lgr %r2,%r11 # pass pointer to pt_regs
491 larl %r14,.Lsysc_return
492 jg do_syscall_trace_exit
495 # a new process exits the kernel with ret_from_fork
498 la %r11,STACK_FRAME_OVERHEAD(%r15)
500 brasl %r14,schedule_tail
502 ssm __LC_SVC_NEW_PSW # reenable interrupts
503 tm __PT_PSW+1(%r11),0x01 # forking a kernel thread ?
505 # it's a kernel thread
506 lmg %r9,%r10,__PT_R9(%r11) # load gprs
507 ENTRY(kernel_thread_starter)
513 * Program check handler routine
516 ENTRY(pgm_check_handler)
517 stpt __LC_SYNC_ENTER_TIMER
518 stmg %r8,%r15,__LC_SAVE_AREA_SYNC
519 lg %r10,__LC_LAST_BREAK
521 larl %r13,cleanup_critical
522 lmg %r8,%r9,__LC_PGM_OLD_PSW
523 tmhh %r8,0x0001 # test problem state bit
524 jnz 2f # -> fault in user space
525 #if IS_ENABLED(CONFIG_KVM)
526 # cleanup critical section for program checks in sie64a
528 slg %r14,BASED(.Lsie_critical_start)
529 clg %r14,BASED(.Lsie_critical_length)
531 lg %r14,__SF_EMPTY(%r15) # get control block pointer
532 ni __SIE_PROG0C+3(%r14),0xfe # no longer in SIE
533 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
534 larl %r9,sie_exit # skip forward to sie_exit
536 0: tmhh %r8,0x4000 # PER bit set in old PSW ?
537 jnz 1f # -> enabled, can't be a double fault
538 tm __LC_PGM_ILC+3,0x80 # check for per exception
539 jnz .Lpgm_svcper # -> single stepped svc
540 1: CHECK_STACK STACK_SIZE,__LC_SAVE_AREA_SYNC
541 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
543 2: UPDATE_VTIME %r14,%r15,__LC_SYNC_ENTER_TIMER
544 lg %r15,__LC_KERNEL_STACK
546 aghi %r14,__TASK_thread # pointer to thread_struct
547 lghi %r13,__LC_PGM_TDB
548 tm __LC_PGM_ILC+2,0x02 # check for transaction abort
550 mvc __THREAD_trap_tdb(256,%r14),0(%r13)
551 3: stg %r10,__THREAD_last_break(%r14)
552 4: la %r11,STACK_FRAME_OVERHEAD(%r15)
553 stmg %r0,%r7,__PT_R0(%r11)
554 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
555 stmg %r8,%r9,__PT_PSW(%r11)
556 mvc __PT_INT_CODE(4,%r11),__LC_PGM_ILC
557 mvc __PT_INT_PARM_LONG(8,%r11),__LC_TRANS_EXC_CODE
558 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
559 stg %r10,__PT_ARGS(%r11)
560 tm __LC_PGM_ILC+3,0x80 # check for per exception
562 tmhh %r8,0x0001 # kernel per event ?
564 oi __PT_FLAGS+7(%r11),_PIF_PER_TRAP
565 mvc __THREAD_per_address(8,%r14),__LC_PER_ADDRESS
566 mvc __THREAD_per_cause(2,%r14),__LC_PER_CODE
567 mvc __THREAD_per_paid(1,%r14),__LC_PER_ACCESS_ID
569 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
570 larl %r1,pgm_check_table
571 llgh %r10,__PT_INT_CODE+2(%r11)
575 lgf %r1,0(%r10,%r1) # load address of handler routine
576 lgr %r2,%r11 # pass pointer to pt_regs
577 basr %r14,%r1 # branch to interrupt-handler
580 tm __PT_PSW+1(%r11),0x01 # returning to user ?
582 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL
587 # PER event in supervisor state, must be kprobes
591 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
592 lgr %r2,%r11 # pass pointer to pt_regs
593 brasl %r14,do_per_trap
597 # single stepped system call
600 mvc __LC_RETURN_PSW(8),__LC_SVC_NEW_PSW
601 lghi %r13,__TASK_thread
603 stg %r14,__LC_RETURN_PSW+8
604 lghi %r14,_PIF_SYSCALL | _PIF_PER_TRAP
605 lpswe __LC_RETURN_PSW # branch to .Lsysc_per and enable irqs
608 * IO interrupt handler routine
610 ENTRY(io_int_handler)
612 stpt __LC_ASYNC_ENTER_TIMER
613 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC
615 larl %r13,cleanup_critical
616 lmg %r8,%r9,__LC_IO_OLD_PSW
617 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER
618 stmg %r0,%r7,__PT_R0(%r11)
619 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
620 stmg %r8,%r9,__PT_PSW(%r11)
621 mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID
622 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
623 TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ
626 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
628 lgr %r2,%r11 # pass pointer to pt_regs
629 lghi %r3,IO_INTERRUPT
630 tm __PT_INT_CODE+8(%r11),0x80 # adapter interrupt ?
632 lghi %r3,THIN_INTERRUPT
635 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPAR
639 mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID
645 TSTMSK __TI_flags(%r12),_TIF_WORK
646 jnz .Lio_work # there is work to do (signals etc.)
647 TSTMSK __LC_CPU_FLAGS,_CIF_WORK
650 lg %r14,__LC_VDSO_PER_CPU
651 lmg %r0,%r10,__PT_R0(%r11)
652 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11)
655 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
656 lmg %r11,%r15,__PT_R11(%r11)
657 lpswe __LC_RETURN_PSW
661 # There is work todo, find out in which context we have been interrupted:
662 # 1) if we return to user space we can do all _TIF_WORK work
663 # 2) if we return to kernel code and kvm is enabled check if we need to
664 # modify the psw to leave SIE
665 # 3) if we return to kernel code and preemptive scheduling is enabled check
666 # the preemption counter and if it is zero call preempt_schedule_irq
667 # Before any work can be done, a switch to the kernel stack is required.
670 tm __PT_PSW+1(%r11),0x01 # returning to user ?
671 jo .Lio_work_user # yes -> do resched & signal
672 #ifdef CONFIG_PREEMPT
673 # check for preemptive scheduling
674 icm %r0,15,__LC_PREEMPT_COUNT
675 jnz .Lio_restore # preemption is disabled
676 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED
678 # switch to kernel stack
679 lg %r1,__PT_R15(%r11)
680 aghi %r1,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
681 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
682 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
683 la %r11,STACK_FRAME_OVERHEAD(%r1)
685 # TRACE_IRQS_ON already done at .Lio_return, call
686 # TRACE_IRQS_OFF to keep things symmetrical
688 brasl %r14,preempt_schedule_irq
695 # Need to do work before returning to userspace, switch to kernel stack
698 lg %r1,__LC_KERNEL_STACK
699 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
700 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
701 la %r11,STACK_FRAME_OVERHEAD(%r1)
705 # One of the work bits is on. Find out which one.
708 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING
710 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED
712 #ifdef CONFIG_LIVEPATCH
713 TSTMSK __TI_flags(%r12),_TIF_PATCH_PENDING
714 jo .Lio_patch_pending
716 TSTMSK __TI_flags(%r12),_TIF_SIGPENDING
718 TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME
719 jo .Lio_notify_resume
720 TSTMSK __TI_flags(%r12),_TIF_GUARDED_STORAGE
721 jo .Lio_guarded_storage
722 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
724 TSTMSK __LC_CPU_FLAGS,(_CIF_ASCE_PRIMARY|_CIF_ASCE_SECONDARY)
726 j .Lio_return # beware of critical section cleanup
729 # _CIF_MCCK_PENDING is set, call handler
732 # TRACE_IRQS_ON already done at .Lio_return
733 brasl %r14,s390_handle_mcck # TIF bit will be cleared by handler
738 # _CIF_ASCE_PRIMARY and/or CIF_ASCE_SECONDARY set, load user space asce
741 ni __LC_CPU_FLAGS+7,255-_CIF_ASCE_PRIMARY
742 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
743 TSTMSK __LC_CPU_FLAGS,_CIF_ASCE_SECONDARY
745 larl %r14,.Lio_return
749 # CIF_FPU is set, restore floating-point controls and floating-point registers.
752 larl %r14,.Lio_return
756 # _TIF_GUARDED_STORAGE is set, call guarded_storage_load
758 .Lio_guarded_storage:
759 # TRACE_IRQS_ON already done at .Lio_return
760 ssm __LC_SVC_NEW_PSW # reenable interrupts
761 lgr %r2,%r11 # pass pointer to pt_regs
762 brasl %r14,gs_load_bc_cb
763 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
768 # _TIF_NEED_RESCHED is set, call schedule
771 # TRACE_IRQS_ON already done at .Lio_return
772 ssm __LC_SVC_NEW_PSW # reenable interrupts
773 brasl %r14,schedule # call scheduler
774 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
779 # _TIF_PATCH_PENDING is set, call klp_update_patch_state
781 #ifdef CONFIG_LIVEPATCH
783 lg %r2,__LC_CURRENT # pass pointer to task struct
784 larl %r14,.Lio_return
785 jg klp_update_patch_state
789 # _TIF_SIGPENDING or is set, call do_signal
792 # TRACE_IRQS_ON already done at .Lio_return
793 ssm __LC_SVC_NEW_PSW # reenable interrupts
794 lgr %r2,%r11 # pass pointer to pt_regs
796 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
801 # _TIF_NOTIFY_RESUME or is set, call do_notify_resume
804 # TRACE_IRQS_ON already done at .Lio_return
805 ssm __LC_SVC_NEW_PSW # reenable interrupts
806 lgr %r2,%r11 # pass pointer to pt_regs
807 brasl %r14,do_notify_resume
808 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
813 * External interrupt handler routine
815 ENTRY(ext_int_handler)
817 stpt __LC_ASYNC_ENTER_TIMER
818 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC
820 larl %r13,cleanup_critical
821 lmg %r8,%r9,__LC_EXT_OLD_PSW
822 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER
823 stmg %r0,%r7,__PT_R0(%r11)
824 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
825 stmg %r8,%r9,__PT_PSW(%r11)
826 lghi %r1,__LC_EXT_PARAMS2
827 mvc __PT_INT_CODE(4,%r11),__LC_EXT_CPU_ADDR
828 mvc __PT_INT_PARM(4,%r11),__LC_EXT_PARAMS
829 mvc __PT_INT_PARM_LONG(8,%r11),0(%r1)
830 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
831 TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ
834 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
835 lgr %r2,%r11 # pass pointer to pt_regs
836 lghi %r3,EXT_INTERRUPT
841 * Load idle PSW. The second "half" of this function is in .Lcleanup_idle.
844 stg %r3,__SF_EMPTY(%r15)
845 larl %r1,.Lpsw_idle_lpsw+4
846 stg %r1,__SF_EMPTY+8(%r15)
848 larl %r1,smp_cpu_mtid
852 .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+16(%r15)
855 oi __LC_CPU_FLAGS+7,_CIF_ENABLED_WAIT
856 STCK __CLOCK_IDLE_ENTER(%r2)
857 stpt __TIMER_IDLE_ENTER(%r2)
859 lpswe __SF_EMPTY(%r15)
864 * Store floating-point controls and floating-point or vector register
865 * depending whether the vector facility is available. A critical section
866 * cleanup assures that the registers are stored even if interrupted for
867 * some other work. The CIF_FPU flag is set to trigger a lazy restore
868 * of the register contents at return from io or a system call.
872 aghi %r2,__TASK_thread
873 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
875 stfpc __THREAD_FPU_fpc(%r2)
876 lg %r3,__THREAD_FPU_regs(%r2)
877 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX
878 jz .Lsave_fpu_regs_fp # no -> store FP regs
879 VSTM %v0,%v15,0,%r3 # vstm 0,15,0(3)
880 VSTM %v16,%v31,256,%r3 # vstm 16,31,256(3)
881 j .Lsave_fpu_regs_done # -> set CIF_FPU flag
899 .Lsave_fpu_regs_done:
900 oi __LC_CPU_FLAGS+7,_CIF_FPU
903 EXPORT_SYMBOL(save_fpu_regs)
906 * Load floating-point controls and floating-point or vector registers.
907 * A critical section cleanup assures that the register contents are
908 * loaded even if interrupted for some other work.
910 * There are special calling conventions to fit into sysc and io return work:
911 * %r15: <kernel stack>
912 * The function requires:
917 aghi %r4,__TASK_thread
918 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
920 lfpc __THREAD_FPU_fpc(%r4)
921 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX
922 lg %r4,__THREAD_FPU_regs(%r4) # %r4 <- reg save area
923 jz .Lload_fpu_regs_fp # -> no VX, load FP regs
925 VLM %v16,%v31,256,%r4
926 j .Lload_fpu_regs_done
944 .Lload_fpu_regs_done:
945 ni __LC_CPU_FLAGS+7,255-_CIF_FPU
952 * Machine check handler routines
954 ENTRY(mcck_int_handler)
956 la %r1,4095 # validate r1
957 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # validate cpu timer
958 sckc __LC_CLOCK_COMPARATOR # validate comparator
959 lam %a0,%a15,__LC_AREGS_SAVE_AREA-4095(%r1) # validate acrs
960 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# validate gprs
962 larl %r13,cleanup_critical
963 lmg %r8,%r9,__LC_MCK_OLD_PSW
964 TSTMSK __LC_MCCK_CODE,MCCK_CODE_SYSTEM_DAMAGE
965 jo .Lmcck_panic # yes -> rest of mcck code invalid
966 TSTMSK __LC_MCCK_CODE,MCCK_CODE_CR_VALID
967 jno .Lmcck_panic # control registers invalid -> panic
969 lctlg %c0,%c15,__LC_CREGS_SAVE_AREA-4095(%r14) # validate ctl regs
971 lg %r11,__LC_MCESAD-4095(%r14) # extended machine check save area
972 nill %r11,0xfc00 # MCESA_ORIGIN_MASK
973 TSTMSK __LC_CREGS_SAVE_AREA+16-4095(%r14),CR2_GUARDED_STORAGE
975 TSTMSK __LC_MCCK_CODE,MCCK_CODE_GS_VALID
977 .insn rxy,0xe3000000004d,0,__MCESA_GS_SAVE_AREA(%r11) # LGSC
978 0: l %r14,__LC_FP_CREG_SAVE_AREA-4095(%r14)
979 TSTMSK __LC_MCCK_CODE,MCCK_CODE_FC_VALID
983 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX
985 lghi %r14,__LC_FPREGS_SAVE_AREA
1003 0: VLM %v0,%v15,0,%r11
1004 VLM %v16,%v31,256,%r11
1005 1: lghi %r14,__LC_CPU_TIMER_SAVE_AREA
1006 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
1007 TSTMSK __LC_MCCK_CODE,MCCK_CODE_CPU_TIMER_VALID
1009 la %r14,__LC_SYNC_ENTER_TIMER
1010 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
1012 la %r14,__LC_ASYNC_ENTER_TIMER
1013 0: clc 0(8,%r14),__LC_EXIT_TIMER
1015 la %r14,__LC_EXIT_TIMER
1016 1: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
1018 la %r14,__LC_LAST_UPDATE_TIMER
1020 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
1021 3: TSTMSK __LC_MCCK_CODE,MCCK_CODE_PSW_MWP_VALID
1023 tmhh %r8,0x0001 # interrupting from user ?
1025 TSTMSK __LC_MCCK_CODE,MCCK_CODE_PSW_IA_VALID
1027 4: SWITCH_ASYNC __LC_GPREGS_SAVE_AREA+64,__LC_MCCK_ENTER_TIMER
1029 lghi %r14,__LC_GPREGS_SAVE_AREA+64
1030 stmg %r0,%r7,__PT_R0(%r11)
1031 mvc __PT_R8(64,%r11),0(%r14)
1032 stmg %r8,%r9,__PT_PSW(%r11)
1033 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
1034 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
1035 lgr %r2,%r11 # pass pointer to pt_regs
1036 brasl %r14,s390_do_machine_check
1037 tm __PT_PSW+1(%r11),0x01 # returning to user ?
1039 lg %r1,__LC_KERNEL_STACK # switch to kernel stack
1040 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
1041 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
1042 la %r11,STACK_FRAME_OVERHEAD(%r1)
1044 ssm __LC_PGM_NEW_PSW # turn dat on, keep irqs off
1045 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING
1048 brasl %r14,s390_handle_mcck
1051 lg %r14,__LC_VDSO_PER_CPU
1052 lmg %r0,%r10,__PT_R0(%r11)
1053 mvc __LC_RETURN_MCCK_PSW(16),__PT_PSW(%r11) # move return PSW
1054 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
1056 stpt __LC_EXIT_TIMER
1057 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
1058 0: lmg %r11,%r15,__PT_R11(%r11)
1059 lpswe __LC_RETURN_MCCK_PSW
1062 lg %r15,__LC_PANIC_STACK
1063 la %r11,STACK_FRAME_OVERHEAD(%r15)
1067 # PSW restart interrupt handler
1069 ENTRY(restart_int_handler)
1070 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP
1072 .insn s,0xb2800000,__LC_LPP
1073 0: stg %r15,__LC_SAVE_AREA_RESTART
1074 lg %r15,__LC_RESTART_STACK
1075 aghi %r15,-__PT_SIZE # create pt_regs on stack
1076 xc 0(__PT_SIZE,%r15),0(%r15)
1077 stmg %r0,%r14,__PT_R0(%r15)
1078 mvc __PT_R15(8,%r15),__LC_SAVE_AREA_RESTART
1079 mvc __PT_PSW(16,%r15),__LC_RST_OLD_PSW # store restart old psw
1080 aghi %r15,-STACK_FRAME_OVERHEAD # create stack frame on stack
1081 xc 0(STACK_FRAME_OVERHEAD,%r15),0(%r15)
1082 lg %r1,__LC_RESTART_FN # load fn, parm & source cpu
1083 lg %r2,__LC_RESTART_DATA
1084 lg %r3,__LC_RESTART_SOURCE
1085 ltgr %r3,%r3 # test source cpu address
1086 jm 1f # negative -> skip source stop
1087 0: sigp %r4,%r3,SIGP_SENSE # sigp sense to source cpu
1088 brc 10,0b # wait for status stored
1089 1: basr %r14,%r1 # call function
1090 stap __SF_EMPTY(%r15) # store cpu address
1091 llgh %r3,__SF_EMPTY(%r15)
1092 2: sigp %r4,%r3,SIGP_STOP # sigp stop to current cpu
1096 .section .kprobes.text, "ax"
1098 #ifdef CONFIG_CHECK_STACK
1100 * The synchronous or the asynchronous stack overflowed. We are dead.
1101 * No need to properly save the registers, we are going to panic anyway.
1102 * Setup a pt_regs so that show_trace can provide a good call trace.
1105 lg %r15,__LC_PANIC_STACK # change to panic stack
1106 la %r11,STACK_FRAME_OVERHEAD(%r15)
1107 stmg %r0,%r7,__PT_R0(%r11)
1108 stmg %r8,%r9,__PT_PSW(%r11)
1109 mvc __PT_R8(64,%r11),0(%r14)
1110 stg %r10,__PT_ORIG_GPR2(%r11) # store last break to orig_gpr2
1111 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
1112 lgr %r2,%r11 # pass pointer to pt_regs
1113 jg kernel_stack_overflow
1117 #if IS_ENABLED(CONFIG_KVM)
1118 clg %r9,BASED(.Lcleanup_table_sie) # .Lsie_gmap
1120 clg %r9,BASED(.Lcleanup_table_sie+8)# .Lsie_done
1123 clg %r9,BASED(.Lcleanup_table) # system_call
1125 clg %r9,BASED(.Lcleanup_table+8) # .Lsysc_do_svc
1126 jl .Lcleanup_system_call
1127 clg %r9,BASED(.Lcleanup_table+16) # .Lsysc_tif
1129 clg %r9,BASED(.Lcleanup_table+24) # .Lsysc_restore
1130 jl .Lcleanup_sysc_tif
1131 clg %r9,BASED(.Lcleanup_table+32) # .Lsysc_done
1132 jl .Lcleanup_sysc_restore
1133 clg %r9,BASED(.Lcleanup_table+40) # .Lio_tif
1135 clg %r9,BASED(.Lcleanup_table+48) # .Lio_restore
1137 clg %r9,BASED(.Lcleanup_table+56) # .Lio_done
1138 jl .Lcleanup_io_restore
1139 clg %r9,BASED(.Lcleanup_table+64) # psw_idle
1141 clg %r9,BASED(.Lcleanup_table+72) # .Lpsw_idle_end
1143 clg %r9,BASED(.Lcleanup_table+80) # save_fpu_regs
1145 clg %r9,BASED(.Lcleanup_table+88) # .Lsave_fpu_regs_end
1146 jl .Lcleanup_save_fpu_regs
1147 clg %r9,BASED(.Lcleanup_table+96) # load_fpu_regs
1149 clg %r9,BASED(.Lcleanup_table+104) # .Lload_fpu_regs_end
1150 jl .Lcleanup_load_fpu_regs
1158 .quad .Lsysc_restore
1164 .quad .Lpsw_idle_end
1166 .quad .Lsave_fpu_regs_end
1168 .quad .Lload_fpu_regs_end
1170 #if IS_ENABLED(CONFIG_KVM)
1171 .Lcleanup_table_sie:
1176 cghi %r11,__LC_SAVE_AREA_ASYNC #Is this in normal interrupt?
1178 slg %r9,BASED(.Lsie_crit_mcck_start)
1179 clg %r9,BASED(.Lsie_crit_mcck_length)
1181 oi __LC_CPU_FLAGS+7, _CIF_MCCK_GUEST
1182 1: lg %r9,__SF_EMPTY(%r15) # get control block pointer
1183 ni __SIE_PROG0C+3(%r9),0xfe # no longer in SIE
1184 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
1185 larl %r9,sie_exit # skip forward to sie_exit
1189 .Lcleanup_system_call:
1190 # check if stpt has been executed
1191 clg %r9,BASED(.Lcleanup_system_call_insn)
1193 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
1194 cghi %r11,__LC_SAVE_AREA_ASYNC
1196 mvc __LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER
1197 0: # check if stmg has been executed
1198 clg %r9,BASED(.Lcleanup_system_call_insn+8)
1200 mvc __LC_SAVE_AREA_SYNC(64),0(%r11)
1201 0: # check if base register setup + TIF bit load has been done
1202 clg %r9,BASED(.Lcleanup_system_call_insn+16)
1204 # set up saved register r12 task struct pointer
1206 # set up saved register r13 __TASK_thread offset
1207 mvc 40(8,%r11),BASED(.Lcleanup_system_call_const)
1208 0: # check if the user time update has been done
1209 clg %r9,BASED(.Lcleanup_system_call_insn+24)
1211 lg %r15,__LC_EXIT_TIMER
1212 slg %r15,__LC_SYNC_ENTER_TIMER
1213 alg %r15,__LC_USER_TIMER
1214 stg %r15,__LC_USER_TIMER
1215 0: # check if the system time update has been done
1216 clg %r9,BASED(.Lcleanup_system_call_insn+32)
1218 lg %r15,__LC_LAST_UPDATE_TIMER
1219 slg %r15,__LC_EXIT_TIMER
1220 alg %r15,__LC_SYSTEM_TIMER
1221 stg %r15,__LC_SYSTEM_TIMER
1222 0: # update accounting time stamp
1223 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
1224 # set up saved register r11
1225 lg %r15,__LC_KERNEL_STACK
1226 la %r9,STACK_FRAME_OVERHEAD(%r15)
1227 stg %r9,24(%r11) # r11 pt_regs pointer
1229 mvc __PT_R8(64,%r9),__LC_SAVE_AREA_SYNC
1230 stmg %r0,%r7,__PT_R0(%r9)
1231 mvc __PT_PSW(16,%r9),__LC_SVC_OLD_PSW
1232 mvc __PT_INT_CODE(4,%r9),__LC_SVC_ILC
1233 xc __PT_FLAGS(8,%r9),__PT_FLAGS(%r9)
1234 mvi __PT_FLAGS+7(%r9),_PIF_SYSCALL
1235 # setup saved register r15
1236 stg %r15,56(%r11) # r15 stack pointer
1237 # set new psw address and exit
1238 larl %r9,.Lsysc_do_svc
1240 .Lcleanup_system_call_insn:
1244 .quad .Lsysc_vtime+36
1245 .quad .Lsysc_vtime+42
1246 .Lcleanup_system_call_const:
1253 .Lcleanup_sysc_restore:
1254 # check if stpt has been executed
1255 clg %r9,BASED(.Lcleanup_sysc_restore_insn)
1257 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1258 cghi %r11,__LC_SAVE_AREA_ASYNC
1260 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
1261 0: clg %r9,BASED(.Lcleanup_sysc_restore_insn+8)
1263 lg %r9,24(%r11) # get saved pointer to pt_regs
1264 mvc __LC_RETURN_PSW(16),__PT_PSW(%r9)
1265 mvc 0(64,%r11),__PT_R8(%r9)
1266 lmg %r0,%r7,__PT_R0(%r9)
1267 1: lmg %r8,%r9,__LC_RETURN_PSW
1269 .Lcleanup_sysc_restore_insn:
1270 .quad .Lsysc_exit_timer
1271 .quad .Lsysc_done - 4
1277 .Lcleanup_io_restore:
1278 # check if stpt has been executed
1279 clg %r9,BASED(.Lcleanup_io_restore_insn)
1281 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
1282 0: clg %r9,BASED(.Lcleanup_io_restore_insn+8)
1284 lg %r9,24(%r11) # get saved r11 pointer to pt_regs
1285 mvc __LC_RETURN_PSW(16),__PT_PSW(%r9)
1286 mvc 0(64,%r11),__PT_R8(%r9)
1287 lmg %r0,%r7,__PT_R0(%r9)
1288 1: lmg %r8,%r9,__LC_RETURN_PSW
1290 .Lcleanup_io_restore_insn:
1291 .quad .Lio_exit_timer
1295 ni __LC_CPU_FLAGS+7,255-_CIF_ENABLED_WAIT
1296 # copy interrupt clock & cpu timer
1297 mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_INT_CLOCK
1298 mvc __TIMER_IDLE_EXIT(8,%r2),__LC_ASYNC_ENTER_TIMER
1299 cghi %r11,__LC_SAVE_AREA_ASYNC
1301 mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_MCCK_CLOCK
1302 mvc __TIMER_IDLE_EXIT(8,%r2),__LC_MCCK_ENTER_TIMER
1303 0: # check if stck & stpt have been executed
1304 clg %r9,BASED(.Lcleanup_idle_insn)
1306 mvc __CLOCK_IDLE_ENTER(8,%r2),__CLOCK_IDLE_EXIT(%r2)
1307 mvc __TIMER_IDLE_ENTER(8,%r2),__TIMER_IDLE_EXIT(%r2)
1308 1: # calculate idle cycles
1310 clg %r9,BASED(.Lcleanup_idle_insn)
1312 larl %r1,smp_cpu_mtid
1316 .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+80(%r15)
1318 ag %r3,__LC_PERCPU_OFFSET
1319 la %r4,__SF_EMPTY+16(%r15)
1328 3: # account system time going idle
1329 lg %r9,__LC_STEAL_TIMER
1330 alg %r9,__CLOCK_IDLE_ENTER(%r2)
1331 slg %r9,__LC_LAST_UPDATE_CLOCK
1332 stg %r9,__LC_STEAL_TIMER
1333 mvc __LC_LAST_UPDATE_CLOCK(8),__CLOCK_IDLE_EXIT(%r2)
1334 lg %r9,__LC_SYSTEM_TIMER
1335 alg %r9,__LC_LAST_UPDATE_TIMER
1336 slg %r9,__TIMER_IDLE_ENTER(%r2)
1337 stg %r9,__LC_SYSTEM_TIMER
1338 mvc __LC_LAST_UPDATE_TIMER(8),__TIMER_IDLE_EXIT(%r2)
1339 # prepare return psw
1340 nihh %r8,0xfcfd # clear irq & wait state bits
1341 lg %r9,48(%r11) # return from psw_idle
1343 .Lcleanup_idle_insn:
1344 .quad .Lpsw_idle_lpsw
1346 .Lcleanup_save_fpu_regs:
1347 larl %r9,save_fpu_regs
1350 .Lcleanup_load_fpu_regs:
1351 larl %r9,load_fpu_regs
1359 .quad .L__critical_start
1361 .quad .L__critical_end - .L__critical_start
1362 #if IS_ENABLED(CONFIG_KVM)
1363 .Lsie_critical_start:
1365 .Lsie_critical_length:
1366 .quad .Lsie_done - .Lsie_gmap
1367 .Lsie_crit_mcck_start:
1369 .Lsie_crit_mcck_length:
1370 .quad .Lsie_skip - .Lsie_entry
1373 .section .rodata, "a"
1374 #define SYSCALL(esame,emu) .long esame
1375 .globl sys_call_table
1377 #include "syscalls.S"
1380 #ifdef CONFIG_COMPAT
1382 #define SYSCALL(esame,emu) .long emu
1383 .globl sys_call_table_emu
1385 #include "syscalls.S"