arch/ppc/platforms/prpmc800.c

   1 /*
   2  * Author: Dale Farnsworth <dale.farnsworth@mvista.com>
   3  *
   4  * 2001-2004 (c) MontaVista, Software, Inc.  This file is licensed under
   5  * the terms of the GNU General Public License version 2.  This program
   6  * is licensed "as is" without any warranty of any kind, whether express
   7  * or implied.
   8  */
   9
  10 #include <linux/config.h>
  11 #include <linux/stddef.h>
  12 #include <linux/kernel.h>
  13 #include <linux/init.h>
  14 #include <linux/errno.h>
  15 #include <linux/reboot.h>
  16 #include <linux/pci.h>
  17 #include <linux/kdev_t.h>
  18 #include <linux/types.h>
  19 #include <linux/major.h>
  20 #include <linux/initrd.h>
  21 #include <linux/console.h>
  22 #include <linux/delay.h>
  23 #include <linux/seq_file.h>
  24 #include <linux/ide.h>
  25 #include <linux/root_dev.h>
  26 #include <linux/harrier_defs.h>
  27
  28 #include <asm/byteorder.h>
  29 #include <asm/system.h>
  30 #include <asm/pgtable.h>
  31 #include <asm/page.h>
  32 #include <asm/dma.h>
  33 #include <asm/io.h>
  34 #include <asm/irq.h>
  35 #include <asm/machdep.h>
  36 #include <asm/time.h>
  37 #include <asm/pci-bridge.h>
  38 #include <asm/open_pic.h>
  39 #include <asm/bootinfo.h>
  40 #include <asm/harrier.h>
  41
  42 #include "prpmc800.h"
  43
  44 #define HARRIER_REVI_REG        (PRPMC800_HARRIER_XCSR_BASE+HARRIER_REVI_OFF)
  45 #define HARRIER_UCTL_REG        (PRPMC800_HARRIER_XCSR_BASE+HARRIER_UCTL_OFF)
  46 #define HARRIER_MISC_CSR_REG   (PRPMC800_HARRIER_XCSR_BASE+HARRIER_MISC_CSR_OFF)
  47 #define HARRIER_IFEVP_REG    (PRPMC800_HARRIER_MPIC_BASE+HARRIER_MPIC_IFEVP_OFF)
  48 #define HARRIER_IFEDE_REG    (PRPMC800_HARRIER_MPIC_BASE+HARRIER_MPIC_IFEDE_OFF)
  49 #define HARRIER_FEEN_REG        (PRPMC800_HARRIER_XCSR_BASE+HARRIER_FEEN_OFF)
  50 #define HARRIER_FEMA_REG        (PRPMC800_HARRIER_XCSR_BASE+HARRIER_FEMA_OFF)
  51
  52 #define HARRIER_VENI_REG        (PRPMC800_HARRIER_XCSR_BASE + HARRIER_VENI_OFF)
  53 #define HARRIER_MISC_CSR        (PRPMC800_HARRIER_XCSR_BASE + \
  54                                  HARRIER_MISC_CSR_OFF)
  55
  56 #define MONARCH (monarch != 0)
  57 #define NON_MONARCH (monarch == 0)
  58
  59 extern int mpic_init(void);
  60 extern unsigned long loops_per_jiffy;
  61 extern void gen550_progress(char *, unsigned short);
  62
  63 static int monarch = 0;
  64 static int found_self = 0;
  65 static int self = 0;
  66
  67 static u_char prpmc800_openpic_initsenses[] __initdata =
  68 {
  69    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_HOSTINT0 */
  70    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_UNUSED */
  71    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_DEBUGINT */
  72    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_HARRIER_WDT */
  73    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_UNUSED */
  74    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_UNUSED */
  75    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_HOSTINT1 */
  76    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_HOSTINT2 */
  77    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_HOSTINT3 */
  78    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_PMC_INTA */
  79    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_PMC_INTB */
  80    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_PMC_INTC */
  81    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_PMC_INTD */
  82    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_UNUSED */
  83    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_UNUSED */
  84    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_UNUSED */
  85    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_HARRIER_INT (UARTS, ABORT, DMA) */
  86 };
  87
  88 /*
  89  * Motorola PrPMC750/PrPMC800 in PrPMCBASE or PrPMC-Carrier
  90  * Combined irq tables.  Only Base has IDSEL 14, only Carrier has 21 and 22.
  91  */
  92 static inline int
  93 prpmc_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
  94 {
  95         static char pci_irq_table[][4] =
  96         /*
  97          *      PCI IDSEL/INTPIN->INTLINE
  98          *      A       B       C       D
  99          */
 100         {
 101                 {12,    0,      0,      0},  /* IDSEL 14 - Ethernet, base */
 102                 {0,     0,      0,      0},  /* IDSEL 15 - unused */
 103                 {10,    11,     12,     9},  /* IDSEL 16 - PMC A1, PMC1 */
 104                 {10,    11,     12,     9},  /* IDSEL 17 - PrPMC-A-B, PMC2-B */
 105                 {11,    12,     9,      10}, /* IDSEL 18 - PMC A1-B, PMC1-B */
 106                 {0,     0,      0,      0},  /* IDSEL 19 - unused */
 107                 {9,     10,     11,     12}, /* IDSEL 20 - P2P Bridge */
 108                 {11,    12,     9,      10}, /* IDSEL 21 - PMC A2, carrier */
 109                 {12,    9,      10,     11}, /* IDSEL 22 - PMC A2-B, carrier */
 110         };
 111         const long min_idsel = 14, max_idsel = 22, irqs_per_slot = 4;
 112         return PCI_IRQ_TABLE_LOOKUP;
 113 };
 114
 115 static int
 116 prpmc_read_config_dword(struct pci_controller *hose, u8 bus, u8 devfn,
 117                         int offset, u32 * val)
 118 {
 119         /* paranoia */
 120         if ((hose == NULL) ||
 121             (hose->cfg_addr == NULL) || (hose->cfg_data == NULL))
 122                 return PCIBIOS_DEVICE_NOT_FOUND;
 123
 124         out_be32(hose->cfg_addr, ((offset & 0xfc) << 24) | (devfn << 16)
 125                  | ((bus - hose->bus_offset) << 8) | 0x80);
 126         *val = in_le32((u32 *) (hose->cfg_data + (offset & 3)));
 127
 128         return PCIBIOS_SUCCESSFUL;
 129 }
 130
 131 #define HARRIER_PCI_VEND_DEV_ID (PCI_VENDOR_ID_MOTOROLA | \
 132                                  (PCI_DEVICE_ID_MOTOROLA_HARRIER << 16))
 133 static int prpmc_self(u8 bus, u8 devfn)
 134 {
 135         /*
 136          * Harriers always view themselves as being on bus 0. If we're not
 137          * looking at bus 0, we're not going to find ourselves.
 138          */
 139         if (bus != 0)
 140                 return PCIBIOS_DEVICE_NOT_FOUND;
 141         else {
 142                 int result;
 143                 int val;
 144                 struct pci_controller *hose;
 145
 146                 hose = pci_bus_to_hose(bus);
 147
 148                 /* See if target device is a Harrier */
 149                 result = prpmc_read_config_dword(hose, bus, devfn,
 150                                                  PCI_VENDOR_ID, &val);
 151                 if ((result != PCIBIOS_SUCCESSFUL) ||
 152                     (val != HARRIER_PCI_VEND_DEV_ID))
 153                         return PCIBIOS_DEVICE_NOT_FOUND;
 154
 155                 /*
 156                  * LBA bit is set if target Harrier == initiating Harrier
 157                  * (i.e. if we are reading our own PCI header).
 158                  */
 159                 result = prpmc_read_config_dword(hose, bus, devfn,
 160                                                  HARRIER_LBA_OFF, &val);
 161                 if ((result != PCIBIOS_SUCCESSFUL) ||
 162                     ((val & HARRIER_LBA_MSK) != HARRIER_LBA_MSK))
 163                         return PCIBIOS_DEVICE_NOT_FOUND;
 164
 165                 /* It's us, save our location for later */
 166                 self = devfn;
 167                 found_self = 1;
 168                 return PCIBIOS_SUCCESSFUL;
 169         }
 170 }
 171
 172 static int prpmc_exclude_device(u8 bus, u8 devfn)
 173 {
 174         /*
 175          * Monarch is allowed to access all PCI devices. Non-monarch is
 176          * only allowed to access its own Harrier.
 177          */
 178
 179         if (MONARCH)
 180                 return PCIBIOS_SUCCESSFUL;
 181         if (found_self)
 182                 if ((bus == 0) && (devfn == self))
 183                         return PCIBIOS_SUCCESSFUL;
 184                 else
 185                         return PCIBIOS_DEVICE_NOT_FOUND;
 186         else
 187                 return prpmc_self(bus, devfn);
 188 }
 189
 190 void __init prpmc800_find_bridges(void)
 191 {
 192         struct pci_controller *hose;
 193         int host_bridge;
 194
 195         hose = pcibios_alloc_controller();
 196         if (!hose)
 197                 return;
 198
 199         hose->first_busno = 0;
 200         hose->last_busno = 0xff;
 201
 202         ppc_md.pci_exclude_device = prpmc_exclude_device;
 203         ppc_md.pcibios_fixup = NULL;
 204         ppc_md.pcibios_fixup_bus = NULL;
 205         ppc_md.pci_swizzle = common_swizzle;
 206         ppc_md.pci_map_irq = prpmc_map_irq;
 207
 208         setup_indirect_pci(hose,
 209                            PRPMC800_PCI_CONFIG_ADDR, PRPMC800_PCI_CONFIG_DATA);
 210
 211         /* Get host bridge vendor/dev id */
 212
 213         host_bridge = in_be32((uint *) (HARRIER_VENI_REG));
 214
 215         if (host_bridge != HARRIER_VEND_DEV_ID) {
 216                 printk(KERN_CRIT "Host bridge 0x%x not supported\n",
 217                                 host_bridge);
 218                 return;
 219         }
 220
 221         monarch = in_be32((uint *) HARRIER_MISC_CSR) & HARRIER_SYSCON;
 222
 223         printk(KERN_INFO "Running as %s.\n",
 224                         MONARCH ? "Monarch" : "Non-Monarch");
 225
 226         hose->io_space.start = PRPMC800_PCI_IO_START;
 227         hose->io_space.end = PRPMC800_PCI_IO_END;
 228         hose->io_base_virt = (void *)PRPMC800_ISA_IO_BASE;
 229         hose->pci_mem_offset = PRPMC800_PCI_PHY_MEM_OFFSET;
 230
 231         pci_init_resource(&hose->io_resource,
 232                           PRPMC800_PCI_IO_START, PRPMC800_PCI_IO_END,
 233                           IORESOURCE_IO, "PCI host bridge");
 234
 235         if (MONARCH) {
 236                 hose->mem_space.start = PRPMC800_PCI_MEM_START;
 237                 hose->mem_space.end = PRPMC800_PCI_MEM_END;
 238
 239                 pci_init_resource(&hose->mem_resources[0],
 240                                   PRPMC800_PCI_MEM_START,
 241                                   PRPMC800_PCI_MEM_END,
 242                                   IORESOURCE_MEM, "PCI host bridge");
 243
 244                 if (harrier_init(hose,
 245                                  PRPMC800_HARRIER_XCSR_BASE,
 246                                  PRPMC800_PROC_PCI_MEM_START,
 247                                  PRPMC800_PROC_PCI_MEM_END,
 248                                  PRPMC800_PROC_PCI_IO_START,
 249                                  PRPMC800_PROC_PCI_IO_END,
 250                                  PRPMC800_HARRIER_MPIC_BASE) != 0)
 251                         printk(KERN_CRIT "Could not initialize HARRIER "
 252                                          "bridge\n");
 253
 254                 harrier_release_eready(PRPMC800_HARRIER_XCSR_BASE);
 255                 harrier_wait_eready(PRPMC800_HARRIER_XCSR_BASE);
 256                 hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
 257
 258         } else {
 259                 pci_init_resource(&hose->mem_resources[0],
 260                                   PRPMC800_NM_PCI_MEM_START,
 261                                   PRPMC800_NM_PCI_MEM_END,
 262                                   IORESOURCE_MEM, "PCI host bridge");
 263
 264                 hose->mem_space.start = PRPMC800_NM_PCI_MEM_START;
 265                 hose->mem_space.end = PRPMC800_NM_PCI_MEM_END;
 266
 267                 if (harrier_init(hose,
 268                                  PRPMC800_HARRIER_XCSR_BASE,
 269                                  PRPMC800_NM_PROC_PCI_MEM_START,
 270                                  PRPMC800_NM_PROC_PCI_MEM_END,
 271                                  PRPMC800_PROC_PCI_IO_START,
 272                                  PRPMC800_PROC_PCI_IO_END,
 273                                  PRPMC800_HARRIER_MPIC_BASE) != 0)
 274                         printk(KERN_CRIT "Could not initialize HARRIER "
 275                                          "bridge\n");
 276
 277                 harrier_setup_nonmonarch(PRPMC800_HARRIER_XCSR_BASE,
 278                                          HARRIER_ITSZ_1MB);
 279                 harrier_release_eready(PRPMC800_HARRIER_XCSR_BASE);
 280         }
 281 }
 282
 283 static int prpmc800_show_cpuinfo(struct seq_file *m)
 284 {
 285         seq_printf(m, "machine\t\t: PrPMC800\n");
 286
 287         return 0;
 288 }
 289
 290 static void __init prpmc800_setup_arch(void)
 291 {
 292         /* init to some ~sane value until calibrate_delay() runs */
 293         loops_per_jiffy = 50000000 / HZ;
 294
 295         /* Lookup PCI host bridges */
 296         prpmc800_find_bridges();
 297
 298 #ifdef CONFIG_BLK_DEV_INITRD
 299         if (initrd_start)
 300                 ROOT_DEV = Root_RAM0;
 301         else
 302 #endif
 303 #ifdef CONFIG_ROOT_NFS
 304                 ROOT_DEV = Root_NFS;
 305 #else
 306                 ROOT_DEV = Root_SDA2;
 307 #endif
 308
 309         printk(KERN_INFO "Port by MontaVista Software, Inc. "
 310                          "(source@mvista.com)\n");
 311 }
 312
 313 /*
 314  * Compute the PrPMC800's tbl frequency using the baud clock as a reference.
 315  */
 316 static void __init prpmc800_calibrate_decr(void)
 317 {
 318         unsigned long tbl_start, tbl_end;
 319         unsigned long current_state, old_state, tb_ticks_per_second;
 320         unsigned int count;
 321         unsigned int harrier_revision;
 322
 323         harrier_revision = readb(HARRIER_REVI_REG);
 324         if (harrier_revision < 2) {
 325                 /* XTAL64 was broken in harrier revision 1 */
 326                 printk(KERN_INFO "time_init: Harrier revision %d, assuming "
 327                                  "100 Mhz bus\n", harrier_revision);
 328                 tb_ticks_per_second = 100000000 / 4;
 329                 tb_ticks_per_jiffy = tb_ticks_per_second / HZ;
 330                 tb_to_us = mulhwu_scale_factor(tb_ticks_per_second, 1000000);
 331                 return;
 332         }
 333
 334         /*
 335          * The XTAL64 bit oscillates at the 1/64 the base baud clock
 336          * Set count to XTAL64 cycles per second.  Since we'll count
 337          * half-cycles, we'll reach the count in half a second.
 338          */
 339         count = PRPMC800_BASE_BAUD / 64;
 340
 341         /* Find the first edge of the baud clock */
 342         old_state = readb(HARRIER_UCTL_REG) & HARRIER_XTAL64_MASK;
 343         do {
 344                 current_state = readb(HARRIER_UCTL_REG) & HARRIER_XTAL64_MASK;
 345         } while (old_state == current_state);
 346
 347         old_state = current_state;
 348
 349         /* Get the starting time base value */
 350         tbl_start = get_tbl();
 351
 352         /*
 353          * Loop until we have found a number of edges (half-cycles)
 354          * equal to the count (half a second)
 355          */
 356         do {
 357                 do {
 358                         current_state = readb(HARRIER_UCTL_REG) &
 359                             HARRIER_XTAL64_MASK;
 360                 } while (old_state == current_state);
 361                 old_state = current_state;
 362         } while (--count);
 363
 364         /* Get the ending time base value */
 365         tbl_end = get_tbl();
 366
 367         /* We only counted for half a second, so double to get ticks/second */
 368         tb_ticks_per_second = (tbl_end - tbl_start) * 2;
 369         tb_ticks_per_jiffy = tb_ticks_per_second / HZ;
 370         tb_to_us = mulhwu_scale_factor(tb_ticks_per_second, 1000000);
 371 }
 372
 373 static void prpmc800_restart(char *cmd)
 374 {
 375         ulong temp;
 376
 377         local_irq_disable();
 378         temp = in_be32((uint *) HARRIER_MISC_CSR_REG);
 379         temp |= HARRIER_RSTOUT;
 380         out_be32((uint *) HARRIER_MISC_CSR_REG, temp);
 381         while (1) ;
 382 }
 383
 384 static void prpmc800_halt(void)
 385 {
 386         local_irq_disable();
 387         while (1) ;
 388 }
 389
 390 static void prpmc800_power_off(void)
 391 {
 392         prpmc800_halt();
 393 }
 394
 395 static void __init prpmc800_init_IRQ(void)
 396 {
 397         OpenPIC_InitSenses = prpmc800_openpic_initsenses;
 398         OpenPIC_NumInitSenses = sizeof(prpmc800_openpic_initsenses);
 399
 400         /* Setup external interrupt sources. */
 401         openpic_set_sources(0, 16, OpenPIC_Addr + 0x10000);
 402         /* Setup internal UART interrupt source. */
 403         openpic_set_sources(16, 1, OpenPIC_Addr + 0x10200);
 404
 405         /* Do the MPIC initialization based on the above settings. */
 406         openpic_init(0);
 407
 408         /* enable functional exceptions for uarts and abort */
 409         out_8((u8 *) HARRIER_FEEN_REG, (HARRIER_FE_UA0 | HARRIER_FE_UA1));
 410         out_8((u8 *) HARRIER_FEMA_REG, ~(HARRIER_FE_UA0 | HARRIER_FE_UA1));
 411 }
 412
 413 /*
 414  * Set BAT 3 to map 0xf0000000 to end of physical memory space.
 415  */
 416 static __inline__ void prpmc800_set_bat(void)
 417 {
 418         mb();
 419         mtspr(SPRN_DBAT1U, 0xf0001ffe);
 420         mtspr(SPRN_DBAT1L, 0xf000002a);
 421         mb();
 422 }
 423
 424 /*
 425  * We need to read the Harrier memory controller
 426  * to properly determine this value
 427  */
 428 static unsigned long __init prpmc800_find_end_of_memory(void)
 429 {
 430         /* Read the memory size from the Harrier XCSR */
 431         return harrier_get_mem_size(PRPMC800_HARRIER_XCSR_BASE);
 432 }
 433
 434 static void __init prpmc800_map_io(void)
 435 {
 436         io_block_mapping(0x80000000, 0x80000000, 0x10000000, _PAGE_IO);
 437         io_block_mapping(0xf0000000, 0xf0000000, 0x10000000, _PAGE_IO);
 438 }
 439
 440 void __init
 441 platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
 442               unsigned long r6, unsigned long r7)
 443 {
 444         parse_bootinfo(find_bootinfo());
 445
 446         prpmc800_set_bat();
 447
 448         isa_io_base = PRPMC800_ISA_IO_BASE;
 449         isa_mem_base = PRPMC800_ISA_MEM_BASE;
 450         pci_dram_offset = PRPMC800_PCI_DRAM_OFFSET;
 451
 452         ppc_md.setup_arch = prpmc800_setup_arch;
 453         ppc_md.show_cpuinfo = prpmc800_show_cpuinfo;
 454         ppc_md.init_IRQ = prpmc800_init_IRQ;
 455         ppc_md.get_irq = openpic_get_irq;
 456
 457         ppc_md.find_end_of_memory = prpmc800_find_end_of_memory;
 458         ppc_md.setup_io_mappings = prpmc800_map_io;
 459
 460         ppc_md.restart = prpmc800_restart;
 461         ppc_md.power_off = prpmc800_power_off;
 462         ppc_md.halt = prpmc800_halt;
 463
 464         /* PrPMC800 has no timekeeper part */
 465         ppc_md.time_init = NULL;
 466         ppc_md.get_rtc_time = NULL;
 467         ppc_md.set_rtc_time = NULL;
 468         ppc_md.calibrate_decr = prpmc800_calibrate_decr;
 469 #ifdef  CONFIG_SERIAL_TEXT_DEBUG
 470         ppc_md.progress = gen550_progress;
 471 #else                           /* !CONFIG_SERIAL_TEXT_DEBUG */
 472         ppc_md.progress = NULL;
 473 #endif                          /* CONFIG_SERIAL_TEXT_DEBUG */
 474 }