arch/powerpc/platforms/powermac/low_i2c.c

   1 /*
   2  * arch/powerpc/platforms/powermac/low_i2c.c
   3  *
   4  *  Copyright (C) 2003-2005 Ben. Herrenschmidt (benh@kernel.crashing.org)
   5  *
   6  *  This program is free software; you can redistribute it and/or
   7  *  modify it under the terms of the GNU General Public License
   8  *  as published by the Free Software Foundation; either version
   9  *  2 of the License, or (at your option) any later version.
  10  *
  11  * The linux i2c layer isn't completely suitable for our needs for various
  12  * reasons ranging from too late initialisation to semantics not perfectly
  13  * matching some requirements of the apple platform functions etc...
  14  *
  15  * This file thus provides a simple low level unified i2c interface for
  16  * powermac that covers the various types of i2c busses used in Apple machines.
  17  * For now, keywest, PMU and SMU, though we could add Cuda, or other bit
  18  * banging busses found on older chipstes in earlier machines if we ever need
  19  * one of them.
  20  *
  21  * The drivers in this file are synchronous/blocking. In addition, the
  22  * keywest one is fairly slow due to the use of msleep instead of interrupts
  23  * as the interrupt is currently used by i2c-keywest. In the long run, we
  24  * might want to get rid of those high-level interfaces to linux i2c layer
  25  * either completely (converting all drivers) or replacing them all with a
  26  * single stub driver on top of this one. Once done, the interrupt will be
  27  * available for our use.
  28  */
  29
  30 #undef DEBUG
  31 #undef DEBUG_LOW
  32
  33 #include <linux/config.h>
  34 #include <linux/types.h>
  35 #include <linux/sched.h>
  36 #include <linux/init.h>
  37 #include <linux/module.h>
  38 #include <linux/adb.h>
  39 #include <linux/pmu.h>
  40 #include <linux/delay.h>
  41 #include <linux/completion.h>
  42 #include <linux/platform_device.h>
  43 #include <linux/interrupt.h>
  44 #include <linux/completion.h>
  45 #include <linux/timer.h>
  46 #include <asm/keylargo.h>
  47 #include <asm/uninorth.h>
  48 #include <asm/io.h>
  49 #include <asm/prom.h>
  50 #include <asm/machdep.h>
  51 #include <asm/smu.h>
  52 #include <asm/pmac_pfunc.h>
  53 #include <asm/pmac_low_i2c.h>
  54
  55 #ifdef DEBUG
  56 #define DBG(x...) do {\
  57                 printk(KERN_DEBUG "low_i2c:" x);        \
  58         } while(0)
  59 #else
  60 #define DBG(x...)
  61 #endif
  62
  63 #ifdef DEBUG_LOW
  64 #define DBG_LOW(x...) do {\
  65                 printk(KERN_DEBUG "low_i2c:" x);        \
  66         } while(0)
  67 #else
  68 #define DBG_LOW(x...)
  69 #endif
  70
  71
  72 static int pmac_i2c_force_poll = 1;
  73
  74 /*
  75  * A bus structure. Each bus in the system has such a structure associated.
  76  */
  77 struct pmac_i2c_bus
  78 {
  79         struct list_head        link;
  80         struct device_node      *controller;
  81         struct device_node      *busnode;
  82         int                     type;
  83         int                     flags;
  84         struct i2c_adapter      *adapter;
  85         void                    *hostdata;
  86         int                     channel;        /* some hosts have multiple */
  87         int                     mode;           /* current mode */
  88         struct semaphore        sem;
  89         int                     opened;
  90         int                     polled;         /* open mode */
  91         struct platform_device  *platform_dev;
  92
  93         /* ops */
  94         int (*open)(struct pmac_i2c_bus *bus);
  95         void (*close)(struct pmac_i2c_bus *bus);
  96         int (*xfer)(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
  97                     u32 subaddr, u8 *data, int len);
  98 };
  99
 100 static LIST_HEAD(pmac_i2c_busses);
 101
 102 /*
 103  * Keywest implementation
 104  */
 105
 106 struct pmac_i2c_host_kw
 107 {
 108         struct semaphore        mutex;          /* Access mutex for use by
 109                                                  * i2c-keywest */
 110         void __iomem            *base;          /* register base address */
 111         int                     bsteps;         /* register stepping */
 112         int                     speed;          /* speed */
 113         int                     irq;
 114         u8                      *data;
 115         unsigned                len;
 116         int                     state;
 117         int                     rw;
 118         int                     polled;
 119         int                     result;
 120         struct completion       complete;
 121         spinlock_t              lock;
 122         struct timer_list       timeout_timer;
 123 };
 124
 125 /* Register indices */
 126 typedef enum {
 127         reg_mode = 0,
 128         reg_control,
 129         reg_status,
 130         reg_isr,
 131         reg_ier,
 132         reg_addr,
 133         reg_subaddr,
 134         reg_data
 135 } reg_t;
 136
 137 /* The Tumbler audio equalizer can be really slow sometimes */
 138 #define KW_POLL_TIMEOUT         (2*HZ)
 139
 140 /* Mode register */
 141 #define KW_I2C_MODE_100KHZ      0x00
 142 #define KW_I2C_MODE_50KHZ       0x01
 143 #define KW_I2C_MODE_25KHZ       0x02
 144 #define KW_I2C_MODE_DUMB        0x00
 145 #define KW_I2C_MODE_STANDARD    0x04
 146 #define KW_I2C_MODE_STANDARDSUB 0x08
 147 #define KW_I2C_MODE_COMBINED    0x0C
 148 #define KW_I2C_MODE_MODE_MASK   0x0C
 149 #define KW_I2C_MODE_CHAN_MASK   0xF0
 150
 151 /* Control register */
 152 #define KW_I2C_CTL_AAK          0x01
 153 #define KW_I2C_CTL_XADDR        0x02
 154 #define KW_I2C_CTL_STOP         0x04
 155 #define KW_I2C_CTL_START        0x08
 156
 157 /* Status register */
 158 #define KW_I2C_STAT_BUSY        0x01
 159 #define KW_I2C_STAT_LAST_AAK    0x02
 160 #define KW_I2C_STAT_LAST_RW     0x04
 161 #define KW_I2C_STAT_SDA         0x08
 162 #define KW_I2C_STAT_SCL         0x10
 163
 164 /* IER & ISR registers */
 165 #define KW_I2C_IRQ_DATA         0x01
 166 #define KW_I2C_IRQ_ADDR         0x02
 167 #define KW_I2C_IRQ_STOP         0x04
 168 #define KW_I2C_IRQ_START        0x08
 169 #define KW_I2C_IRQ_MASK         0x0F
 170
 171 /* State machine states */
 172 enum {
 173         state_idle,
 174         state_addr,
 175         state_read,
 176         state_write,
 177         state_stop,
 178         state_dead
 179 };
 180
 181 #define WRONG_STATE(name) do {\
 182                 printk(KERN_DEBUG "KW: wrong state. Got %s, state: %s " \
 183                        "(isr: %02x)\n", \
 184                        name, __kw_state_names[host->state], isr); \
 185         } while(0)
 186
 187 static const char *__kw_state_names[] = {
 188         "state_idle",
 189         "state_addr",
 190         "state_read",
 191         "state_write",
 192         "state_stop",
 193         "state_dead"
 194 };
 195
 196 static inline u8 __kw_read_reg(struct pmac_i2c_host_kw *host, reg_t reg)
 197 {
 198         return readb(host->base + (((unsigned int)reg) << host->bsteps));
 199 }
 200
 201 static inline void __kw_write_reg(struct pmac_i2c_host_kw *host,
 202                                   reg_t reg, u8 val)
 203 {
 204         writeb(val, host->base + (((unsigned)reg) << host->bsteps));
 205         (void)__kw_read_reg(host, reg_subaddr);
 206 }
 207
 208 #define kw_write_reg(reg, val)  __kw_write_reg(host, reg, val)
 209 #define kw_read_reg(reg)        __kw_read_reg(host, reg)
 210
 211 static u8 kw_i2c_wait_interrupt(struct pmac_i2c_host_kw *host)
 212 {
 213         int i, j;
 214         u8 isr;
 215
 216         for (i = 0; i < 1000; i++) {
 217                 isr = kw_read_reg(reg_isr) & KW_I2C_IRQ_MASK;
 218                 if (isr != 0)
 219                         return isr;
 220
 221                 /* This code is used with the timebase frozen, we cannot rely
 222                  * on udelay nor schedule when in polled mode !
 223                  * For now, just use a bogus loop....
 224                  */
 225                 if (host->polled) {
 226                         for (j = 1; j < 100000; j++)
 227                                 mb();
 228                 } else
 229                         msleep(1);
 230         }
 231         return isr;
 232 }
 233
 234 static void kw_i2c_handle_interrupt(struct pmac_i2c_host_kw *host, u8 isr)
 235 {
 236         u8 ack;
 237
 238         DBG_LOW("kw_handle_interrupt(%s, isr: %x)\n",
 239                 __kw_state_names[host->state], isr);
 240
 241         if (host->state == state_idle) {
 242                 printk(KERN_WARNING "low_i2c: Keywest got an out of state"
 243                        " interrupt, ignoring\n");
 244                 kw_write_reg(reg_isr, isr);
 245                 return;
 246         }
 247
 248         if (isr == 0) {
 249                 if (host->state != state_stop) {
 250                         DBG_LOW("KW: Timeout !\n");
 251                         host->result = -EIO;
 252                         goto stop;
 253                 }
 254                 if (host->state == state_stop) {
 255                         ack = kw_read_reg(reg_status);
 256                         if (ack & KW_I2C_STAT_BUSY)
 257                                 kw_write_reg(reg_status, 0);
 258                         host->state = state_idle;
 259                         kw_write_reg(reg_ier, 0x00);
 260                         if (!host->polled)
 261                                 complete(&host->complete);
 262                 }
 263                 return;
 264         }
 265
 266         if (isr & KW_I2C_IRQ_ADDR) {
 267                 ack = kw_read_reg(reg_status);
 268                 if (host->state != state_addr) {
 269                         kw_write_reg(reg_isr, KW_I2C_IRQ_ADDR);
 270                         WRONG_STATE("KW_I2C_IRQ_ADDR");
 271                         host->result = -EIO;
 272                         goto stop;
 273                 }
 274                 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
 275                         host->result = -ENODEV;
 276                         DBG_LOW("KW: NAK on address\n");
 277                         host->state = state_stop;
 278                         return;
 279                 } else {
 280                         if (host->len == 0) {
 281                                 kw_write_reg(reg_isr, KW_I2C_IRQ_ADDR);
 282                                 goto stop;
 283                         }
 284                         if (host->rw) {
 285                                 host->state = state_read;
 286                                 if (host->len > 1)
 287                                         kw_write_reg(reg_control,
 288                                                      KW_I2C_CTL_AAK);
 289                         } else {
 290                                 host->state = state_write;
 291                                 kw_write_reg(reg_data, *(host->data++));
 292                                 host->len--;
 293                         }
 294                 }
 295                 kw_write_reg(reg_isr, KW_I2C_IRQ_ADDR);
 296         }
 297
 298         if (isr & KW_I2C_IRQ_DATA) {
 299                 if (host->state == state_read) {
 300                         *(host->data++) = kw_read_reg(reg_data);
 301                         host->len--;
 302                         kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
 303                         if (host->len == 0)
 304                                 host->state = state_stop;
 305                         else if (host->len == 1)
 306                                 kw_write_reg(reg_control, 0);
 307                 } else if (host->state == state_write) {
 308                         ack = kw_read_reg(reg_status);
 309                         if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
 310                                 DBG_LOW("KW: nack on data write\n");
 311                                 host->result = -EIO;
 312                                 goto stop;
 313                         } else if (host->len) {
 314                                 kw_write_reg(reg_data, *(host->data++));
 315                                 host->len--;
 316                         } else {
 317                                 kw_write_reg(reg_control, KW_I2C_CTL_STOP);
 318                                 host->state = state_stop;
 319                                 host->result = 0;
 320                         }
 321                         kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
 322                 } else {
 323                         kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
 324                         WRONG_STATE("KW_I2C_IRQ_DATA");
 325                         if (host->state != state_stop) {
 326                                 host->result = -EIO;
 327                                 goto stop;
 328                         }
 329                 }
 330         }
 331
 332         if (isr & KW_I2C_IRQ_STOP) {
 333                 kw_write_reg(reg_isr, KW_I2C_IRQ_STOP);
 334                 if (host->state != state_stop) {
 335                         WRONG_STATE("KW_I2C_IRQ_STOP");
 336                         host->result = -EIO;
 337                 }
 338                 host->state = state_idle;
 339                 if (!host->polled)
 340                         complete(&host->complete);
 341         }
 342
 343         if (isr & KW_I2C_IRQ_START)
 344                 kw_write_reg(reg_isr, KW_I2C_IRQ_START);
 345
 346         return;
 347  stop:
 348         kw_write_reg(reg_control, KW_I2C_CTL_STOP);
 349         host->state = state_stop;
 350         return;
 351 }
 352
 353 /* Interrupt handler */
 354 static irqreturn_t kw_i2c_irq(int irq, void *dev_id, struct pt_regs *regs)
 355 {
 356         struct pmac_i2c_host_kw *host = dev_id;
 357         unsigned long flags;
 358
 359         spin_lock_irqsave(&host->lock, flags);
 360         del_timer(&host->timeout_timer);
 361         kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr));
 362         if (host->state != state_idle) {
 363                 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
 364                 add_timer(&host->timeout_timer);
 365         }
 366         spin_unlock_irqrestore(&host->lock, flags);
 367         return IRQ_HANDLED;
 368 }
 369
 370 static void kw_i2c_timeout(unsigned long data)
 371 {
 372         struct pmac_i2c_host_kw *host = (struct pmac_i2c_host_kw *)data;
 373         unsigned long flags;
 374
 375         spin_lock_irqsave(&host->lock, flags);
 376         kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr));
 377         if (host->state != state_idle) {
 378                 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
 379                 add_timer(&host->timeout_timer);
 380         }
 381         spin_unlock_irqrestore(&host->lock, flags);
 382 }
 383
 384 static int kw_i2c_open(struct pmac_i2c_bus *bus)
 385 {
 386         struct pmac_i2c_host_kw *host = bus->hostdata;
 387         down(&host->mutex);
 388         return 0;
 389 }
 390
 391 static void kw_i2c_close(struct pmac_i2c_bus *bus)
 392 {
 393         struct pmac_i2c_host_kw *host = bus->hostdata;
 394         up(&host->mutex);
 395 }
 396
 397 static int kw_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
 398                        u32 subaddr, u8 *data, int len)
 399 {
 400         struct pmac_i2c_host_kw *host = bus->hostdata;
 401         u8 mode_reg = host->speed;
 402         int use_irq = host->irq != NO_IRQ && !bus->polled;
 403
 404         /* Setup mode & subaddress if any */
 405         switch(bus->mode) {
 406         case pmac_i2c_mode_dumb:
 407                 return -EINVAL;
 408         case pmac_i2c_mode_std:
 409                 mode_reg |= KW_I2C_MODE_STANDARD;
 410                 if (subsize != 0)
 411                         return -EINVAL;
 412                 break;
 413         case pmac_i2c_mode_stdsub:
 414                 mode_reg |= KW_I2C_MODE_STANDARDSUB;
 415                 if (subsize != 1)
 416                         return -EINVAL;
 417                 break;
 418         case pmac_i2c_mode_combined:
 419                 mode_reg |= KW_I2C_MODE_COMBINED;
 420                 if (subsize != 1)
 421                         return -EINVAL;
 422                 break;
 423         }
 424
 425         /* Setup channel & clear pending irqs */
 426         kw_write_reg(reg_isr, kw_read_reg(reg_isr));
 427         kw_write_reg(reg_mode, mode_reg | (bus->channel << 4));
 428         kw_write_reg(reg_status, 0);
 429
 430         /* Set up address and r/w bit, strip possible stale bus number from
 431          * address top bits
 432          */
 433         kw_write_reg(reg_addr, addrdir & 0xff);
 434
 435         /* Set up the sub address */
 436         if ((mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_STANDARDSUB
 437             || (mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_COMBINED)
 438                 kw_write_reg(reg_subaddr, subaddr);
 439
 440         /* Prepare for async operations */
 441         host->data = data;
 442         host->len = len;
 443         host->state = state_addr;
 444         host->result = 0;
 445         host->rw = (addrdir & 1);
 446         host->polled = bus->polled;
 447
 448         /* Enable interrupt if not using polled mode and interrupt is
 449          * available
 450          */
 451         if (use_irq) {
 452                 /* Clear completion */
 453                 INIT_COMPLETION(host->complete);
 454                 /* Ack stale interrupts */
 455                 kw_write_reg(reg_isr, kw_read_reg(reg_isr));
 456                 /* Arm timeout */
 457                 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
 458                 add_timer(&host->timeout_timer);
 459                 /* Enable emission */
 460                 kw_write_reg(reg_ier, KW_I2C_IRQ_MASK);
 461         }
 462
 463         /* Start sending address */
 464         kw_write_reg(reg_control, KW_I2C_CTL_XADDR);
 465
 466         /* Wait for completion */
 467         if (use_irq)
 468                 wait_for_completion(&host->complete);
 469         else {
 470                 while(host->state != state_idle) {
 471                         unsigned long flags;
 472
 473                         u8 isr = kw_i2c_wait_interrupt(host);
 474                         spin_lock_irqsave(&host->lock, flags);
 475                         kw_i2c_handle_interrupt(host, isr);
 476                         spin_unlock_irqrestore(&host->lock, flags);
 477                 }
 478         }
 479
 480         /* Disable emission */
 481         kw_write_reg(reg_ier, 0);
 482
 483         return host->result;
 484 }
 485
 486 static struct pmac_i2c_host_kw *__init kw_i2c_host_init(struct device_node *np)
 487 {
 488         struct pmac_i2c_host_kw *host;
 489         u32                     *psteps, *prate, *addrp, steps;
 490
 491         host = kzalloc(sizeof(struct pmac_i2c_host_kw), GFP_KERNEL);
 492         if (host == NULL) {
 493                 printk(KERN_ERR "low_i2c: Can't allocate host for %s\n",
 494                        np->full_name);
 495                 return NULL;
 496         }
 497
 498         /* Apple is kind enough to provide a valid AAPL,address property
 499          * on all i2c keywest nodes so far ... we would have to fallback
 500          * to macio parsing if that wasn't the case
 501          */
 502         addrp = (u32 *)get_property(np, "AAPL,address", NULL);
 503         if (addrp == NULL) {
 504                 printk(KERN_ERR "low_i2c: Can't find address for %s\n",
 505                        np->full_name);
 506                 kfree(host);
 507                 return NULL;
 508         }
 509         init_MUTEX(&host->mutex);
 510         init_completion(&host->complete);
 511         spin_lock_init(&host->lock);
 512         init_timer(&host->timeout_timer);
 513         host->timeout_timer.function = kw_i2c_timeout;
 514         host->timeout_timer.data = (unsigned long)host;
 515
 516         psteps = (u32 *)get_property(np, "AAPL,address-step", NULL);
 517         steps = psteps ? (*psteps) : 0x10;
 518         for (host->bsteps = 0; (steps & 0x01) == 0; host->bsteps++)
 519                 steps >>= 1;
 520         /* Select interface rate */
 521         host->speed = KW_I2C_MODE_25KHZ;
 522         prate = (u32 *)get_property(np, "AAPL,i2c-rate", NULL);
 523         if (prate) switch(*prate) {
 524         case 100:
 525                 host->speed = KW_I2C_MODE_100KHZ;
 526                 break;
 527         case 50:
 528                 host->speed = KW_I2C_MODE_50KHZ;
 529                 break;
 530         case 25:
 531                 host->speed = KW_I2C_MODE_25KHZ;
 532                 break;
 533         }
 534         if (np->n_intrs > 0)
 535                 host->irq = np->intrs[0].line;
 536         else
 537                 host->irq = NO_IRQ;
 538
 539         host->base = ioremap((*addrp), 0x1000);
 540         if (host->base == NULL) {
 541                 printk(KERN_ERR "low_i2c: Can't map registers for %s\n",
 542                        np->full_name);
 543                 kfree(host);
 544                 return NULL;
 545         }
 546
 547         /* Make sure IRA is disabled */
 548         kw_write_reg(reg_ier, 0);
 549
 550         /* Request chip interrupt */
 551         if (request_irq(host->irq, kw_i2c_irq, SA_SHIRQ, "keywest i2c", host))
 552                 host->irq = NO_IRQ;
 553
 554         printk(KERN_INFO "KeyWest i2c @0x%08x irq %d %s\n",
 555                *addrp, host->irq, np->full_name);
 556
 557         return host;
 558 }
 559
 560
 561 static void __init kw_i2c_add(struct pmac_i2c_host_kw *host,
 562                               struct device_node *controller,
 563                               struct device_node *busnode,
 564                               int channel)
 565 {
 566         struct pmac_i2c_bus *bus;
 567
 568         bus = kzalloc(sizeof(struct pmac_i2c_bus), GFP_KERNEL);
 569         if (bus == NULL)
 570                 return;
 571
 572         bus->controller = of_node_get(controller);
 573         bus->busnode = of_node_get(busnode);
 574         bus->type = pmac_i2c_bus_keywest;
 575         bus->hostdata = host;
 576         bus->channel = channel;
 577         bus->mode = pmac_i2c_mode_std;
 578         bus->open = kw_i2c_open;
 579         bus->close = kw_i2c_close;
 580         bus->xfer = kw_i2c_xfer;
 581         init_MUTEX(&bus->sem);
 582         if (controller == busnode)
 583                 bus->flags = pmac_i2c_multibus;
 584         list_add(&bus->link, &pmac_i2c_busses);
 585
 586         printk(KERN_INFO " channel %d bus %s\n", channel,
 587                (controller == busnode) ? "<multibus>" : busnode->full_name);
 588 }
 589
 590 static void __init kw_i2c_probe(void)
 591 {
 592         struct device_node *np, *child, *parent;
 593
 594         /* Probe keywest-i2c busses */
 595         for (np = NULL;
 596              (np = of_find_compatible_node(np, "i2c","keywest-i2c")) != NULL;){
 597                 struct pmac_i2c_host_kw *host;
 598                 int multibus, chans, i;
 599
 600                 /* Found one, init a host structure */
 601                 host = kw_i2c_host_init(np);
 602                 if (host == NULL)
 603                         continue;
 604
 605                 /* Now check if we have a multibus setup (old style) or if we
 606                  * have proper bus nodes. Note that the "new" way (proper bus
 607                  * nodes) might cause us to not create some busses that are
 608                  * kept hidden in the device-tree. In the future, we might
 609                  * want to work around that by creating busses without a node
 610                  * but not for now
 611                  */
 612                 child = of_get_next_child(np, NULL);
 613                 multibus = !child || strcmp(child->name, "i2c-bus");
 614                 of_node_put(child);
 615
 616                 /* For a multibus setup, we get the bus count based on the
 617                  * parent type
 618                  */
 619                 if (multibus) {
 620                         parent = of_get_parent(np);
 621                         if (parent == NULL)
 622                                 continue;
 623                         chans = parent->name[0] == 'u' ? 2 : 1;
 624                         for (i = 0; i < chans; i++)
 625                                 kw_i2c_add(host, np, np, i);
 626                 } else {
 627                         for (child = NULL;
 628                              (child = of_get_next_child(np, child)) != NULL;) {
 629                                 u32 *reg =
 630                                         (u32 *)get_property(child, "reg", NULL);
 631                                 if (reg == NULL)
 632                                         continue;
 633                                 kw_i2c_add(host, np, child, *reg);
 634                         }
 635                 }
 636         }
 637 }
 638
 639
 640 /*
 641  *
 642  * PMU implementation
 643  *
 644  */
 645
 646 #ifdef CONFIG_ADB_PMU
 647
 648 /*
 649  * i2c command block to the PMU
 650  */
 651 struct pmu_i2c_hdr {
 652         u8      bus;
 653         u8      mode;
 654         u8      bus2;
 655         u8      address;
 656         u8      sub_addr;
 657         u8      comb_addr;
 658         u8      count;
 659         u8      data[];
 660 };
 661
 662 static void pmu_i2c_complete(struct adb_request *req)
 663 {
 664         complete(req->arg);
 665 }
 666
 667 static int pmu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
 668                         u32 subaddr, u8 *data, int len)
 669 {
 670         struct adb_request *req = bus->hostdata;
 671         struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req->data[1];
 672         struct completion comp;
 673         int read = addrdir & 1;
 674         int retry;
 675         int rc = 0;
 676
 677         /* For now, limit ourselves to 16 bytes transfers */
 678         if (len > 16)
 679                 return -EINVAL;
 680
 681         init_completion(&comp);
 682
 683         for (retry = 0; retry < 16; retry++) {
 684                 memset(req, 0, sizeof(struct adb_request));
 685                 hdr->bus = bus->channel;
 686                 hdr->count = len;
 687
 688                 switch(bus->mode) {
 689                 case pmac_i2c_mode_std:
 690                         if (subsize != 0)
 691                                 return -EINVAL;
 692                         hdr->address = addrdir;
 693                         hdr->mode = PMU_I2C_MODE_SIMPLE;
 694                         break;
 695                 case pmac_i2c_mode_stdsub:
 696                 case pmac_i2c_mode_combined:
 697                         if (subsize != 1)
 698                                 return -EINVAL;
 699                         hdr->address = addrdir & 0xfe;
 700                         hdr->comb_addr = addrdir;
 701                         hdr->sub_addr = subaddr;
 702                         if (bus->mode == pmac_i2c_mode_stdsub)
 703                                 hdr->mode = PMU_I2C_MODE_STDSUB;
 704                         else
 705                                 hdr->mode = PMU_I2C_MODE_COMBINED;
 706                         break;
 707                 default:
 708                         return -EINVAL;
 709                 }
 710
 711                 INIT_COMPLETION(comp);
 712                 req->data[0] = PMU_I2C_CMD;
 713                 req->reply[0] = 0xff;
 714                 req->nbytes = sizeof(struct pmu_i2c_hdr) + 1;
 715                 req->done = pmu_i2c_complete;
 716                 req->arg = &comp;
 717                 if (!read && len) {
 718                         memcpy(hdr->data, data, len);
 719                         req->nbytes += len;
 720                 }
 721                 rc = pmu_queue_request(req);
 722                 if (rc)
 723                         return rc;
 724                 wait_for_completion(&comp);
 725                 if (req->reply[0] == PMU_I2C_STATUS_OK)
 726                         break;
 727                 msleep(15);
 728         }
 729         if (req->reply[0] != PMU_I2C_STATUS_OK)
 730                 return -EIO;
 731
 732         for (retry = 0; retry < 16; retry++) {
 733                 memset(req, 0, sizeof(struct adb_request));
 734
 735                 /* I know that looks like a lot, slow as hell, but darwin
 736                  * does it so let's be on the safe side for now
 737                  */
 738                 msleep(15);
 739
 740                 hdr->bus = PMU_I2C_BUS_STATUS;
 741
 742                 INIT_COMPLETION(comp);
 743                 req->data[0] = PMU_I2C_CMD;
 744                 req->reply[0] = 0xff;
 745                 req->nbytes = 2;
 746                 req->done = pmu_i2c_complete;
 747                 req->arg = &comp;
 748                 rc = pmu_queue_request(req);
 749                 if (rc)
 750                         return rc;
 751                 wait_for_completion(&comp);
 752
 753                 if (req->reply[0] == PMU_I2C_STATUS_OK && !read)
 754                         return 0;
 755                 if (req->reply[0] == PMU_I2C_STATUS_DATAREAD && read) {
 756                         int rlen = req->reply_len - 1;
 757
 758                         if (rlen != len) {
 759                                 printk(KERN_WARNING "low_i2c: PMU returned %d"
 760                                        " bytes, expected %d !\n", rlen, len);
 761                                 return -EIO;
 762                         }
 763                         if (len)
 764                                 memcpy(data, &req->reply[1], len);
 765                         return 0;
 766                 }
 767         }
 768         return -EIO;
 769 }
 770
 771 static void __init pmu_i2c_probe(void)
 772 {
 773         struct pmac_i2c_bus *bus;
 774         struct device_node *busnode;
 775         int channel, sz;
 776
 777         if (!pmu_present())
 778                 return;
 779
 780         /* There might or might not be a "pmu-i2c" node, we use that
 781          * or via-pmu itself, whatever we find. I haven't seen a machine
 782          * with separate bus nodes, so we assume a multibus setup
 783          */
 784         busnode = of_find_node_by_name(NULL, "pmu-i2c");
 785         if (busnode == NULL)
 786                 busnode = of_find_node_by_name(NULL, "via-pmu");
 787         if (busnode == NULL)
 788                 return;
 789
 790         printk(KERN_INFO "PMU i2c %s\n", busnode->full_name);
 791
 792         /*
 793          * We add bus 1 and 2 only for now, bus 0 is "special"
 794          */
 795         for (channel = 1; channel <= 2; channel++) {
 796                 sz = sizeof(struct pmac_i2c_bus) + sizeof(struct adb_request);
 797                 bus = kzalloc(sz, GFP_KERNEL);
 798                 if (bus == NULL)
 799                         return;
 800
 801                 bus->controller = busnode;
 802                 bus->busnode = busnode;
 803                 bus->type = pmac_i2c_bus_pmu;
 804                 bus->channel = channel;
 805                 bus->mode = pmac_i2c_mode_std;
 806                 bus->hostdata = bus + 1;
 807                 bus->xfer = pmu_i2c_xfer;
 808                 init_MUTEX(&bus->sem);
 809                 bus->flags = pmac_i2c_multibus;
 810                 list_add(&bus->link, &pmac_i2c_busses);
 811
 812                 printk(KERN_INFO " channel %d bus <multibus>\n", channel);
 813         }
 814 }
 815
 816 #endif /* CONFIG_ADB_PMU */
 817
 818
 819 /*
 820  *
 821  * SMU implementation
 822  *
 823  */
 824
 825 #ifdef CONFIG_PMAC_SMU
 826
 827 static void smu_i2c_complete(struct smu_i2c_cmd *cmd, void *misc)
 828 {
 829         complete(misc);
 830 }
 831
 832 static int smu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
 833                         u32 subaddr, u8 *data, int len)
 834 {
 835         struct smu_i2c_cmd *cmd = bus->hostdata;
 836         struct completion comp;
 837         int read = addrdir & 1;
 838         int rc = 0;
 839
 840         if ((read && len > SMU_I2C_READ_MAX) ||
 841             ((!read) && len > SMU_I2C_WRITE_MAX))
 842                 return -EINVAL;
 843
 844         memset(cmd, 0, sizeof(struct smu_i2c_cmd));
 845         cmd->info.bus = bus->channel;
 846         cmd->info.devaddr = addrdir;
 847         cmd->info.datalen = len;
 848
 849         switch(bus->mode) {
 850         case pmac_i2c_mode_std:
 851                 if (subsize != 0)
 852                         return -EINVAL;
 853                 cmd->info.type = SMU_I2C_TRANSFER_SIMPLE;
 854                 break;
 855         case pmac_i2c_mode_stdsub:
 856         case pmac_i2c_mode_combined:
 857                 if (subsize > 3 || subsize < 1)
 858                         return -EINVAL;
 859                 cmd->info.sublen = subsize;
 860                 /* that's big-endian only but heh ! */
 861                 memcpy(&cmd->info.subaddr, ((char *)&subaddr) + (4 - subsize),
 862                        subsize);
 863                 if (bus->mode == pmac_i2c_mode_stdsub)
 864                         cmd->info.type = SMU_I2C_TRANSFER_STDSUB;
 865                 else
 866                         cmd->info.type = SMU_I2C_TRANSFER_COMBINED;
 867                 break;
 868         default:
 869                 return -EINVAL;
 870         }
 871         if (!read && len)
 872                 memcpy(cmd->info.data, data, len);
 873
 874         init_completion(&comp);
 875         cmd->done = smu_i2c_complete;
 876         cmd->misc = &comp;
 877         rc = smu_queue_i2c(cmd);
 878         if (rc < 0)
 879                 return rc;
 880         wait_for_completion(&comp);
 881         rc = cmd->status;
 882
 883         if (read && len)
 884                 memcpy(data, cmd->info.data, len);
 885         return rc < 0 ? rc : 0;
 886 }
 887
 888 static void __init smu_i2c_probe(void)
 889 {
 890         struct device_node *controller, *busnode;
 891         struct pmac_i2c_bus *bus;
 892         u32 *reg;
 893         int sz;
 894
 895         if (!smu_present())
 896                 return;
 897
 898         controller = of_find_node_by_name(NULL, "smu-i2c-control");
 899         if (controller == NULL)
 900                 controller = of_find_node_by_name(NULL, "smu");
 901         if (controller == NULL)
 902                 return;
 903
 904         printk(KERN_INFO "SMU i2c %s\n", controller->full_name);
 905
 906         /* Look for childs, note that they might not be of the right
 907          * type as older device trees mix i2c busses and other thigns
 908          * at the same level
 909          */
 910         for (busnode = NULL;
 911              (busnode = of_get_next_child(controller, busnode)) != NULL;) {
 912                 if (strcmp(busnode->type, "i2c") &&
 913                     strcmp(busnode->type, "i2c-bus"))
 914                         continue;
 915                 reg = (u32 *)get_property(busnode, "reg", NULL);
 916                 if (reg == NULL)
 917                         continue;
 918
 919                 sz = sizeof(struct pmac_i2c_bus) + sizeof(struct smu_i2c_cmd);
 920                 bus = kzalloc(sz, GFP_KERNEL);
 921                 if (bus == NULL)
 922                         return;
 923
 924                 bus->controller = controller;
 925                 bus->busnode = of_node_get(busnode);
 926                 bus->type = pmac_i2c_bus_smu;
 927                 bus->channel = *reg;
 928                 bus->mode = pmac_i2c_mode_std;
 929                 bus->hostdata = bus + 1;
 930                 bus->xfer = smu_i2c_xfer;
 931                 init_MUTEX(&bus->sem);
 932                 bus->flags = 0;
 933                 list_add(&bus->link, &pmac_i2c_busses);
 934
 935                 printk(KERN_INFO " channel %x bus %s\n",
 936                        bus->channel, busnode->full_name);
 937         }
 938 }
 939
 940 #endif /* CONFIG_PMAC_SMU */
 941
 942 /*
 943  *
 944  * Core code
 945  *
 946  */
 947
 948
 949 struct pmac_i2c_bus *pmac_i2c_find_bus(struct device_node *node)
 950 {
 951         struct device_node *p = of_node_get(node);
 952         struct device_node *prev = NULL;
 953         struct pmac_i2c_bus *bus;
 954
 955         while(p) {
 956                 list_for_each_entry(bus, &pmac_i2c_busses, link) {
 957                         if (p == bus->busnode) {
 958                                 if (prev && bus->flags & pmac_i2c_multibus) {
 959                                         u32 *reg;
 960                                         reg = (u32 *)get_property(prev, "reg",
 961                                                                   NULL);
 962                                         if (!reg)
 963                                                 continue;
 964                                         if (((*reg) >> 8) != bus->channel)
 965                                                 continue;
 966                                 }
 967                                 of_node_put(p);
 968                                 of_node_put(prev);
 969                                 return bus;
 970                         }
 971                 }
 972                 of_node_put(prev);
 973                 prev = p;
 974                 p = of_get_parent(p);
 975         }
 976         return NULL;
 977 }
 978 EXPORT_SYMBOL_GPL(pmac_i2c_find_bus);
 979
 980 u8 pmac_i2c_get_dev_addr(struct device_node *device)
 981 {
 982         u32 *reg = (u32 *)get_property(device, "reg", NULL);
 983
 984         if (reg == NULL)
 985                 return 0;
 986
 987         return (*reg) & 0xff;
 988 }
 989 EXPORT_SYMBOL_GPL(pmac_i2c_get_dev_addr);
 990
 991 struct device_node *pmac_i2c_get_controller(struct pmac_i2c_bus *bus)
 992 {
 993         return bus->controller;
 994 }
 995 EXPORT_SYMBOL_GPL(pmac_i2c_get_controller);
 996
 997 struct device_node *pmac_i2c_get_bus_node(struct pmac_i2c_bus *bus)
 998 {
 999         return bus->busnode;
1000 }
1001 EXPORT_SYMBOL_GPL(pmac_i2c_get_bus_node);
1002
1003 int pmac_i2c_get_type(struct pmac_i2c_bus *bus)
1004 {
1005         return bus->type;
1006 }
1007 EXPORT_SYMBOL_GPL(pmac_i2c_get_type);
1008
1009 int pmac_i2c_get_flags(struct pmac_i2c_bus *bus)
1010 {
1011         return bus->flags;
1012 }
1013 EXPORT_SYMBOL_GPL(pmac_i2c_get_flags);
1014
1015 int pmac_i2c_get_channel(struct pmac_i2c_bus *bus)
1016 {
1017         return bus->channel;
1018 }
1019 EXPORT_SYMBOL_GPL(pmac_i2c_get_channel);
1020
1021
1022 void pmac_i2c_attach_adapter(struct pmac_i2c_bus *bus,
1023                              struct i2c_adapter *adapter)
1024 {
1025         WARN_ON(bus->adapter != NULL);
1026         bus->adapter = adapter;
1027 }
1028 EXPORT_SYMBOL_GPL(pmac_i2c_attach_adapter);
1029
1030 void pmac_i2c_detach_adapter(struct pmac_i2c_bus *bus,
1031                              struct i2c_adapter *adapter)
1032 {
1033         WARN_ON(bus->adapter != adapter);
1034         bus->adapter = NULL;
1035 }
1036 EXPORT_SYMBOL_GPL(pmac_i2c_detach_adapter);
1037
1038 struct i2c_adapter *pmac_i2c_get_adapter(struct pmac_i2c_bus *bus)
1039 {
1040         return bus->adapter;
1041 }
1042 EXPORT_SYMBOL_GPL(pmac_i2c_get_adapter);
1043
1044 struct pmac_i2c_bus *pmac_i2c_adapter_to_bus(struct i2c_adapter *adapter)
1045 {
1046         struct pmac_i2c_bus *bus;
1047
1048         list_for_each_entry(bus, &pmac_i2c_busses, link)
1049                 if (bus->adapter == adapter)
1050                         return bus;
1051         return NULL;
1052 }
1053 EXPORT_SYMBOL_GPL(pmac_i2c_adapter_to_bus);
1054
1055 int pmac_i2c_match_adapter(struct device_node *dev, struct i2c_adapter *adapter)
1056 {
1057         struct pmac_i2c_bus *bus = pmac_i2c_find_bus(dev);
1058
1059         if (bus == NULL)
1060                 return 0;
1061         return (bus->adapter == adapter);
1062 }
1063 EXPORT_SYMBOL_GPL(pmac_i2c_match_adapter);
1064
1065 int pmac_low_i2c_lock(struct device_node *np)
1066 {
1067         struct pmac_i2c_bus *bus, *found = NULL;
1068
1069         list_for_each_entry(bus, &pmac_i2c_busses, link) {
1070                 if (np == bus->controller) {
1071                         found = bus;
1072                         break;
1073                 }
1074         }
1075         if (!found)
1076                 return -ENODEV;
1077         return pmac_i2c_open(bus, 0);
1078 }
1079 EXPORT_SYMBOL_GPL(pmac_low_i2c_lock);
1080
1081 int pmac_low_i2c_unlock(struct device_node *np)
1082 {
1083         struct pmac_i2c_bus *bus, *found = NULL;
1084
1085         list_for_each_entry(bus, &pmac_i2c_busses, link) {
1086                 if (np == bus->controller) {
1087                         found = bus;
1088                         break;
1089                 }
1090         }
1091         if (!found)
1092                 return -ENODEV;
1093         pmac_i2c_close(bus);
1094         return 0;
1095 }
1096 EXPORT_SYMBOL_GPL(pmac_low_i2c_unlock);
1097
1098
1099 int pmac_i2c_open(struct pmac_i2c_bus *bus, int polled)
1100 {
1101         int rc;
1102
1103         down(&bus->sem);
1104         bus->polled = polled || pmac_i2c_force_poll;
1105         bus->opened = 1;
1106         bus->mode = pmac_i2c_mode_std;
1107         if (bus->open && (rc = bus->open(bus)) != 0) {
1108                 bus->opened = 0;
1109                 up(&bus->sem);
1110                 return rc;
1111         }
1112         return 0;
1113 }
1114 EXPORT_SYMBOL_GPL(pmac_i2c_open);
1115
1116 void pmac_i2c_close(struct pmac_i2c_bus *bus)
1117 {
1118         WARN_ON(!bus->opened);
1119         if (bus->close)
1120                 bus->close(bus);
1121         bus->opened = 0;
1122         up(&bus->sem);
1123 }
1124 EXPORT_SYMBOL_GPL(pmac_i2c_close);
1125
1126 int pmac_i2c_setmode(struct pmac_i2c_bus *bus, int mode)
1127 {
1128         WARN_ON(!bus->opened);
1129
1130         /* Report me if you see the error below as there might be a new
1131          * "combined4" mode that I need to implement for the SMU bus
1132          */
1133         if (mode < pmac_i2c_mode_dumb || mode > pmac_i2c_mode_combined) {
1134                 printk(KERN_ERR "low_i2c: Invalid mode %d requested on"
1135                        " bus %s !\n", mode, bus->busnode->full_name);
1136                 return -EINVAL;
1137         }
1138         bus->mode = mode;
1139
1140         return 0;
1141 }
1142 EXPORT_SYMBOL_GPL(pmac_i2c_setmode);
1143
1144 int pmac_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
1145                   u32 subaddr, u8 *data, int len)
1146 {
1147         int rc;
1148
1149         WARN_ON(!bus->opened);
1150
1151         DBG("xfer() chan=%d, addrdir=0x%x, mode=%d, subsize=%d, subaddr=0x%x,"
1152             " %d bytes, bus %s\n", bus->channel, addrdir, bus->mode, subsize,
1153             subaddr, len, bus->busnode->full_name);
1154
1155         rc = bus->xfer(bus, addrdir, subsize, subaddr, data, len);
1156
1157 #ifdef DEBUG
1158         if (rc)
1159                 DBG("xfer error %d\n", rc);
1160 #endif
1161         return rc;
1162 }
1163 EXPORT_SYMBOL_GPL(pmac_i2c_xfer);
1164
1165 /* some quirks for platform function decoding */
1166 enum {
1167         pmac_i2c_quirk_invmask = 0x00000001u,
1168 };
1169
1170 static void pmac_i2c_devscan(void (*callback)(struct device_node *dev,
1171                                               int quirks))
1172 {
1173         struct pmac_i2c_bus *bus;
1174         struct device_node *np;
1175         static struct whitelist_ent {
1176                 char *name;
1177                 char *compatible;
1178                 int quirks;
1179         } whitelist[] = {
1180                 /* XXX Study device-tree's & apple drivers are get the quirks
1181                  * right !
1182                  */
1183                 { "i2c-hwclock", NULL, pmac_i2c_quirk_invmask },
1184                 { "i2c-cpu-voltage", NULL, 0},
1185                 {  "temp-monitor", NULL, 0 },
1186                 {  "supply-monitor", NULL, 0 },
1187                 { NULL, NULL, 0 },
1188         };
1189
1190         /* Only some devices need to have platform functions instanciated
1191          * here. For now, we have a table. Others, like 9554 i2c GPIOs used
1192          * on Xserve, if we ever do a driver for them, will use their own
1193          * platform function instance
1194          */
1195         list_for_each_entry(bus, &pmac_i2c_busses, link) {
1196                 for (np = NULL;
1197                      (np = of_get_next_child(bus->busnode, np)) != NULL;) {
1198                         struct whitelist_ent *p;
1199                         /* If multibus, check if device is on that bus */
1200                         if (bus->flags & pmac_i2c_multibus)
1201                                 if (bus != pmac_i2c_find_bus(np))
1202                                         continue;
1203                         for (p = whitelist; p->name != NULL; p++) {
1204                                 if (strcmp(np->name, p->name))
1205                                         continue;
1206                                 if (p->compatible &&
1207                                     !device_is_compatible(np, p->compatible))
1208                                         continue;
1209                                 callback(np, p->quirks);
1210                                 break;
1211                         }
1212                 }
1213         }
1214 }
1215
1216 #define MAX_I2C_DATA    64
1217
1218 struct pmac_i2c_pf_inst
1219 {
1220         struct pmac_i2c_bus     *bus;
1221         u8                      addr;
1222         u8                      buffer[MAX_I2C_DATA];
1223         u8                      scratch[MAX_I2C_DATA];
1224         int                     bytes;
1225         int                     quirks;
1226 };
1227
1228 static void* pmac_i2c_do_begin(struct pmf_function *func, struct pmf_args *args)
1229 {
1230         struct pmac_i2c_pf_inst *inst;
1231         struct pmac_i2c_bus     *bus;
1232
1233         bus = pmac_i2c_find_bus(func->node);
1234         if (bus == NULL) {
1235                 printk(KERN_ERR "low_i2c: Can't find bus for %s (pfunc)\n",
1236                        func->node->full_name);
1237                 return NULL;
1238         }
1239         if (pmac_i2c_open(bus, 0)) {
1240                 printk(KERN_ERR "low_i2c: Can't open i2c bus for %s (pfunc)\n",
1241                        func->node->full_name);
1242                 return NULL;
1243         }
1244
1245         /* XXX might need GFP_ATOMIC when called during the suspend process,
1246          * but then, there are already lots of issues with suspending when
1247          * near OOM that need to be resolved, the allocator itself should
1248          * probably make GFP_NOIO implicit during suspend
1249          */
1250         inst = kzalloc(sizeof(struct pmac_i2c_pf_inst), GFP_KERNEL);
1251         if (inst == NULL) {
1252                 pmac_i2c_close(bus);
1253                 return NULL;
1254         }
1255         inst->bus = bus;
1256         inst->addr = pmac_i2c_get_dev_addr(func->node);
1257         inst->quirks = (int)(long)func->driver_data;
1258         return inst;
1259 }
1260
1261 static void pmac_i2c_do_end(struct pmf_function *func, void *instdata)
1262 {
1263         struct pmac_i2c_pf_inst *inst = instdata;
1264
1265         if (inst == NULL)
1266                 return;
1267         pmac_i2c_close(inst->bus);
1268         if (inst)
1269                 kfree(inst);
1270 }
1271
1272 static int pmac_i2c_do_read(PMF_STD_ARGS, u32 len)
1273 {
1274         struct pmac_i2c_pf_inst *inst = instdata;
1275
1276         inst->bytes = len;
1277         return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 0, 0,
1278                              inst->buffer, len);
1279 }
1280
1281 static int pmac_i2c_do_write(PMF_STD_ARGS, u32 len, const u8 *data)
1282 {
1283         struct pmac_i2c_pf_inst *inst = instdata;
1284
1285         return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0,
1286                              (u8 *)data, len);
1287 }
1288
1289 /* This function is used to do the masking & OR'ing for the "rmw" type
1290  * callbacks. Ze should apply the mask and OR in the values in the
1291  * buffer before writing back. The problem is that it seems that
1292  * various darwin drivers implement the mask/or differently, thus
1293  * we need to check the quirks first
1294  */
1295 static void pmac_i2c_do_apply_rmw(struct pmac_i2c_pf_inst *inst,
1296                                   u32 len, const u8 *mask, const u8 *val)
1297 {
1298         int i;
1299
1300         if (inst->quirks & pmac_i2c_quirk_invmask) {
1301                 for (i = 0; i < len; i ++)
1302                         inst->scratch[i] = (inst->buffer[i] & mask[i]) | val[i];
1303         } else {
1304                 for (i = 0; i < len; i ++)
1305                         inst->scratch[i] = (inst->buffer[i] & ~mask[i])
1306                                 | (val[i] & mask[i]);
1307         }
1308 }
1309
1310 static int pmac_i2c_do_rmw(PMF_STD_ARGS, u32 masklen, u32 valuelen,
1311                            u32 totallen, const u8 *maskdata,
1312                            const u8 *valuedata)
1313 {
1314         struct pmac_i2c_pf_inst *inst = instdata;
1315
1316         if (masklen > inst->bytes || valuelen > inst->bytes ||
1317             totallen > inst->bytes || valuelen > masklen)
1318                 return -EINVAL;
1319
1320         pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata);
1321
1322         return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0,
1323                              inst->scratch, totallen);
1324 }
1325
1326 static int pmac_i2c_do_read_sub(PMF_STD_ARGS, u8 subaddr, u32 len)
1327 {
1328         struct pmac_i2c_pf_inst *inst = instdata;
1329
1330         inst->bytes = len;
1331         return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 1, subaddr,
1332                              inst->buffer, len);
1333 }
1334
1335 static int pmac_i2c_do_write_sub(PMF_STD_ARGS, u8 subaddr, u32 len,
1336                                      const u8 *data)
1337 {
1338         struct pmac_i2c_pf_inst *inst = instdata;
1339
1340         return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1,
1341                              subaddr, (u8 *)data, len);
1342 }
1343
1344 static int pmac_i2c_do_set_mode(PMF_STD_ARGS, int mode)
1345 {
1346         struct pmac_i2c_pf_inst *inst = instdata;
1347
1348         return pmac_i2c_setmode(inst->bus, mode);
1349 }
1350
1351 static int pmac_i2c_do_rmw_sub(PMF_STD_ARGS, u8 subaddr, u32 masklen,
1352                                u32 valuelen, u32 totallen, const u8 *maskdata,
1353                                const u8 *valuedata)
1354 {
1355         struct pmac_i2c_pf_inst *inst = instdata;
1356
1357         if (masklen > inst->bytes || valuelen > inst->bytes ||
1358             totallen > inst->bytes || valuelen > masklen)
1359                 return -EINVAL;
1360
1361         pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata);
1362
1363         return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1,
1364                              subaddr, inst->scratch, totallen);
1365 }
1366
1367 static int pmac_i2c_do_mask_and_comp(PMF_STD_ARGS, u32 len,
1368                                      const u8 *maskdata,
1369                                      const u8 *valuedata)
1370 {
1371         struct pmac_i2c_pf_inst *inst = instdata;
1372         int i, match;
1373
1374         /* Get return value pointer, it's assumed to be a u32 */
1375         if (!args || !args->count || !args->u[0].p)
1376                 return -EINVAL;
1377
1378         /* Check buffer */
1379         if (len > inst->bytes)
1380                 return -EINVAL;
1381
1382         for (i = 0, match = 1; match && i < len; i ++)
1383                 if ((inst->buffer[i] & maskdata[i]) != valuedata[i])
1384                         match = 0;
1385         *args->u[0].p = match;
1386         return 0;
1387 }
1388
1389 static int pmac_i2c_do_delay(PMF_STD_ARGS, u32 duration)
1390 {
1391         msleep((duration + 999) / 1000);
1392         return 0;
1393 }
1394
1395
1396 static struct pmf_handlers pmac_i2c_pfunc_handlers = {
1397         .begin                  = pmac_i2c_do_begin,
1398         .end                    = pmac_i2c_do_end,
1399         .read_i2c               = pmac_i2c_do_read,
1400         .write_i2c              = pmac_i2c_do_write,
1401         .rmw_i2c                = pmac_i2c_do_rmw,
1402         .read_i2c_sub           = pmac_i2c_do_read_sub,
1403         .write_i2c_sub          = pmac_i2c_do_write_sub,
1404         .rmw_i2c_sub            = pmac_i2c_do_rmw_sub,
1405         .set_i2c_mode           = pmac_i2c_do_set_mode,
1406         .mask_and_compare       = pmac_i2c_do_mask_and_comp,
1407         .delay                  = pmac_i2c_do_delay,
1408 };
1409
1410 static void __init pmac_i2c_dev_create(struct device_node *np, int quirks)
1411 {
1412         DBG("dev_create(%s)\n", np->full_name);
1413
1414         pmf_register_driver(np, &pmac_i2c_pfunc_handlers,
1415                             (void *)(long)quirks);
1416 }
1417
1418 static void __init pmac_i2c_dev_init(struct device_node *np, int quirks)
1419 {
1420         DBG("dev_create(%s)\n", np->full_name);
1421
1422         pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_INIT, NULL);
1423 }
1424
1425 static void pmac_i2c_dev_suspend(struct device_node *np, int quirks)
1426 {
1427         DBG("dev_suspend(%s)\n", np->full_name);
1428         pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_SLEEP, NULL);
1429 }
1430
1431 static void pmac_i2c_dev_resume(struct device_node *np, int quirks)
1432 {
1433         DBG("dev_resume(%s)\n", np->full_name);
1434         pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_WAKE, NULL);
1435 }
1436
1437 void pmac_pfunc_i2c_suspend(void)
1438 {
1439         pmac_i2c_devscan(pmac_i2c_dev_suspend);
1440 }
1441
1442 void pmac_pfunc_i2c_resume(void)
1443 {
1444         pmac_i2c_devscan(pmac_i2c_dev_resume);
1445 }
1446
1447 /*
1448  * Initialize us: probe all i2c busses on the machine, instantiate
1449  * busses and platform functions as needed.
1450  */
1451 /* This is non-static as it might be called early by smp code */
1452 int __init pmac_i2c_init(void)
1453 {
1454         static int i2c_inited;
1455
1456         if (i2c_inited)
1457                 return 0;
1458         i2c_inited = 1;
1459
1460         if (!machine_is(powermac))
1461                 return 0;
1462
1463         /* Probe keywest-i2c busses */
1464         kw_i2c_probe();
1465
1466 #ifdef CONFIG_ADB_PMU
1467         /* Probe PMU i2c busses */
1468         pmu_i2c_probe();
1469 #endif
1470
1471 #ifdef CONFIG_PMAC_SMU
1472         /* Probe SMU i2c busses */
1473         smu_i2c_probe();
1474 #endif
1475
1476         /* Now add plaform functions for some known devices */
1477         pmac_i2c_devscan(pmac_i2c_dev_create);
1478
1479         return 0;
1480 }
1481 arch_initcall(pmac_i2c_init);
1482
1483 /* Since pmac_i2c_init can be called too early for the platform device
1484  * registration, we need to do it at a later time. In our case, subsys
1485  * happens to fit well, though I agree it's a bit of a hack...
1486  */
1487 static int __init pmac_i2c_create_platform_devices(void)
1488 {
1489         struct pmac_i2c_bus *bus;
1490         int i = 0;
1491
1492         /* In the case where we are initialized from smp_init(), we must
1493          * not use the timer (and thus the irq). It's safe from now on
1494          * though
1495          */
1496         pmac_i2c_force_poll = 0;
1497
1498         /* Create platform devices */
1499         list_for_each_entry(bus, &pmac_i2c_busses, link) {
1500                 bus->platform_dev =
1501                         platform_device_alloc("i2c-powermac", i++);
1502                 if (bus->platform_dev == NULL)
1503                         return -ENOMEM;
1504                 bus->platform_dev->dev.platform_data = bus;
1505                 platform_device_add(bus->platform_dev);
1506         }
1507
1508         /* Now call platform "init" functions */
1509         pmac_i2c_devscan(pmac_i2c_dev_init);
1510
1511         return 0;
1512 }
1513 subsys_initcall(pmac_i2c_create_platform_devices);