2 * Copyright 2012 Michael Ellerman, IBM Corporation.
3 * Copyright 2012 Benjamin Herrenschmidt, IBM Corporation.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License, version 2, as
7 * published by the Free Software Foundation.
10 #include <linux/kernel.h>
11 #include <linux/kvm_host.h>
12 #include <linux/err.h>
13 #include <linux/gfp.h>
14 #include <linux/anon_inodes.h>
15 #include <linux/spinlock.h>
17 #include <linux/uaccess.h>
18 #include <asm/kvm_book3s.h>
19 #include <asm/kvm_ppc.h>
20 #include <asm/hvcall.h>
22 #include <asm/debugfs.h>
25 #include <linux/seq_file.h>
27 #include "book3s_xics.h"
30 #define XICS_DBG(fmt...) do { } while (0)
32 #define XICS_DBG(fmt...) trace_printk(fmt)
35 #define ENABLE_REALMODE true
36 #define DEBUG_REALMODE false
42 * Each ICS has a spin lock protecting the information about the IRQ
43 * sources and avoiding simultaneous deliveries of the same interrupt.
45 * ICP operations are done via a single compare & swap transaction
46 * (most ICP state fits in the union kvmppc_icp_state)
53 * - To speed up resends, keep a bitmap of "resend" set bits in the
56 * - Speed up server# -> ICP lookup (array ? hash table ?)
58 * - Make ICS lockless as well, or at least a per-interrupt lock or hashed
59 * locks array to improve scalability
62 /* -- ICS routines -- */
64 static void icp_deliver_irq(struct kvmppc_xics *xics, struct kvmppc_icp *icp,
65 u32 new_irq, bool check_resend);
68 * Return value ideally indicates how the interrupt was handled, but no
69 * callers look at it (given that we don't implement KVM_IRQ_LINE_STATUS),
72 static int ics_deliver_irq(struct kvmppc_xics *xics, u32 irq, u32 level)
74 struct ics_irq_state *state;
75 struct kvmppc_ics *ics;
79 XICS_DBG("ics deliver %#x (level: %d)\n", irq, level);
81 ics = kvmppc_xics_find_ics(xics, irq, &src);
83 XICS_DBG("ics_deliver_irq: IRQ 0x%06x not found !\n", irq);
86 state = &ics->irq_state[src];
90 if (level == KVM_INTERRUPT_SET_LEVEL || level == KVM_INTERRUPT_SET)
92 else if (level == KVM_INTERRUPT_UNSET)
95 * Take other values the same as 1, consistent with original code.
99 if (!state->lsi && level == 0) /* noop for MSI */
103 pq_old = state->pq_state;
106 if (pq_old & PQ_PRESENTED)
107 /* Setting already set LSI ... */
110 pq_new = PQ_PRESENTED;
114 pq_new = ((pq_old << 1) & 3) | PQ_PRESENTED;
115 } while (cmpxchg(&state->pq_state, pq_old, pq_new) != pq_old);
117 /* Test P=1, Q=0, this is the only case where we present */
118 if (pq_new == PQ_PRESENTED)
119 icp_deliver_irq(xics, NULL, irq, false);
121 /* Record which CPU this arrived on for passed-through interrupts */
123 state->intr_cpu = raw_smp_processor_id();
128 static void ics_check_resend(struct kvmppc_xics *xics, struct kvmppc_ics *ics,
129 struct kvmppc_icp *icp)
133 for (i = 0; i < KVMPPC_XICS_IRQ_PER_ICS; i++) {
134 struct ics_irq_state *state = &ics->irq_state[i];
136 XICS_DBG("resend %#x prio %#x\n", state->number,
138 icp_deliver_irq(xics, icp, state->number, true);
143 static bool write_xive(struct kvmppc_xics *xics, struct kvmppc_ics *ics,
144 struct ics_irq_state *state,
145 u32 server, u32 priority, u32 saved_priority)
150 local_irq_save(flags);
151 arch_spin_lock(&ics->lock);
153 state->server = server;
154 state->priority = priority;
155 state->saved_priority = saved_priority;
157 if ((state->masked_pending || state->resend) && priority != MASKED) {
158 state->masked_pending = 0;
163 arch_spin_unlock(&ics->lock);
164 local_irq_restore(flags);
169 int kvmppc_xics_set_xive(struct kvm *kvm, u32 irq, u32 server, u32 priority)
171 struct kvmppc_xics *xics = kvm->arch.xics;
172 struct kvmppc_icp *icp;
173 struct kvmppc_ics *ics;
174 struct ics_irq_state *state;
180 ics = kvmppc_xics_find_ics(xics, irq, &src);
183 state = &ics->irq_state[src];
185 icp = kvmppc_xics_find_server(kvm, server);
189 XICS_DBG("set_xive %#x server %#x prio %#x MP:%d RS:%d\n",
190 irq, server, priority,
191 state->masked_pending, state->resend);
193 if (write_xive(xics, ics, state, server, priority, priority))
194 icp_deliver_irq(xics, icp, irq, false);
199 int kvmppc_xics_get_xive(struct kvm *kvm, u32 irq, u32 *server, u32 *priority)
201 struct kvmppc_xics *xics = kvm->arch.xics;
202 struct kvmppc_ics *ics;
203 struct ics_irq_state *state;
210 ics = kvmppc_xics_find_ics(xics, irq, &src);
213 state = &ics->irq_state[src];
215 local_irq_save(flags);
216 arch_spin_lock(&ics->lock);
217 *server = state->server;
218 *priority = state->priority;
219 arch_spin_unlock(&ics->lock);
220 local_irq_restore(flags);
225 int kvmppc_xics_int_on(struct kvm *kvm, u32 irq)
227 struct kvmppc_xics *xics = kvm->arch.xics;
228 struct kvmppc_icp *icp;
229 struct kvmppc_ics *ics;
230 struct ics_irq_state *state;
236 ics = kvmppc_xics_find_ics(xics, irq, &src);
239 state = &ics->irq_state[src];
241 icp = kvmppc_xics_find_server(kvm, state->server);
245 if (write_xive(xics, ics, state, state->server, state->saved_priority,
246 state->saved_priority))
247 icp_deliver_irq(xics, icp, irq, false);
252 int kvmppc_xics_int_off(struct kvm *kvm, u32 irq)
254 struct kvmppc_xics *xics = kvm->arch.xics;
255 struct kvmppc_ics *ics;
256 struct ics_irq_state *state;
262 ics = kvmppc_xics_find_ics(xics, irq, &src);
265 state = &ics->irq_state[src];
267 write_xive(xics, ics, state, state->server, MASKED, state->priority);
272 /* -- ICP routines, including hcalls -- */
274 static inline bool icp_try_update(struct kvmppc_icp *icp,
275 union kvmppc_icp_state old,
276 union kvmppc_icp_state new,
281 /* Calculate new output value */
282 new.out_ee = (new.xisr && (new.pending_pri < new.cppr));
284 /* Attempt atomic update */
285 success = cmpxchg64(&icp->state.raw, old.raw, new.raw) == old.raw;
289 XICS_DBG("UPD [%04lx] - C:%02x M:%02x PP: %02x PI:%06x R:%d O:%d\n",
291 old.cppr, old.mfrr, old.pending_pri, old.xisr,
292 old.need_resend, old.out_ee);
293 XICS_DBG("UPD - C:%02x M:%02x PP: %02x PI:%06x R:%d O:%d\n",
294 new.cppr, new.mfrr, new.pending_pri, new.xisr,
295 new.need_resend, new.out_ee);
297 * Check for output state update
299 * Note that this is racy since another processor could be updating
300 * the state already. This is why we never clear the interrupt output
301 * here, we only ever set it. The clear only happens prior to doing
302 * an update and only by the processor itself. Currently we do it
303 * in Accept (H_XIRR) and Up_Cppr (H_XPPR).
305 * We also do not try to figure out whether the EE state has changed,
306 * we unconditionally set it if the new state calls for it. The reason
307 * for that is that we opportunistically remove the pending interrupt
308 * flag when raising CPPR, so we need to set it back here if an
309 * interrupt is still pending.
312 kvmppc_book3s_queue_irqprio(icp->vcpu,
313 BOOK3S_INTERRUPT_EXTERNAL);
315 kvmppc_fast_vcpu_kick(icp->vcpu);
321 static void icp_check_resend(struct kvmppc_xics *xics,
322 struct kvmppc_icp *icp)
326 /* Order this load with the test for need_resend in the caller */
328 for_each_set_bit(icsid, icp->resend_map, xics->max_icsid + 1) {
329 struct kvmppc_ics *ics = xics->ics[icsid];
331 if (!test_and_clear_bit(icsid, icp->resend_map))
335 ics_check_resend(xics, ics, icp);
339 static bool icp_try_to_deliver(struct kvmppc_icp *icp, u32 irq, u8 priority,
342 union kvmppc_icp_state old_state, new_state;
345 XICS_DBG("try deliver %#x(P:%#x) to server %#lx\n", irq, priority,
349 old_state = new_state = READ_ONCE(icp->state);
353 /* See if we can deliver */
354 success = new_state.cppr > priority &&
355 new_state.mfrr > priority &&
356 new_state.pending_pri > priority;
359 * If we can, check for a rejection and perform the
363 *reject = new_state.xisr;
364 new_state.xisr = irq;
365 new_state.pending_pri = priority;
368 * If we failed to deliver we set need_resend
369 * so a subsequent CPPR state change causes us
370 * to try a new delivery.
372 new_state.need_resend = true;
375 } while (!icp_try_update(icp, old_state, new_state, false));
380 static void icp_deliver_irq(struct kvmppc_xics *xics, struct kvmppc_icp *icp,
381 u32 new_irq, bool check_resend)
383 struct ics_irq_state *state;
384 struct kvmppc_ics *ics;
390 * This is used both for initial delivery of an interrupt and
391 * for subsequent rejection.
393 * Rejection can be racy vs. resends. We have evaluated the
394 * rejection in an atomic ICP transaction which is now complete,
395 * so potentially the ICP can already accept the interrupt again.
397 * So we need to retry the delivery. Essentially the reject path
398 * boils down to a failed delivery. Always.
400 * Now the interrupt could also have moved to a different target,
401 * thus we may need to re-do the ICP lookup as well
405 /* Get the ICS state and lock it */
406 ics = kvmppc_xics_find_ics(xics, new_irq, &src);
408 XICS_DBG("icp_deliver_irq: IRQ 0x%06x not found !\n", new_irq);
411 state = &ics->irq_state[src];
413 /* Get a lock on the ICS */
414 local_irq_save(flags);
415 arch_spin_lock(&ics->lock);
418 if (!icp || state->server != icp->server_num) {
419 icp = kvmppc_xics_find_server(xics->kvm, state->server);
421 pr_warn("icp_deliver_irq: IRQ 0x%06x server 0x%x not found !\n",
422 new_irq, state->server);
431 /* Clear the resend bit of that interrupt */
435 * If masked, bail out
437 * Note: PAPR doesn't mention anything about masked pending
438 * when doing a resend, only when doing a delivery.
440 * However that would have the effect of losing a masked
441 * interrupt that was rejected and isn't consistent with
442 * the whole masked_pending business which is about not
443 * losing interrupts that occur while masked.
445 * I don't differentiate normal deliveries and resends, this
446 * implementation will differ from PAPR and not lose such
449 if (state->priority == MASKED) {
450 XICS_DBG("irq %#x masked pending\n", new_irq);
451 state->masked_pending = 1;
456 * Try the delivery, this will set the need_resend flag
457 * in the ICP as part of the atomic transaction if the
458 * delivery is not possible.
460 * Note that if successful, the new delivery might have itself
461 * rejected an interrupt that was "delivered" before we took the
464 * In this case we do the whole sequence all over again for the
465 * new guy. We cannot assume that the rejected interrupt is less
466 * favored than the new one, and thus doesn't need to be delivered,
467 * because by the time we exit icp_try_to_deliver() the target
468 * processor may well have alrady consumed & completed it, and thus
469 * the rejected interrupt might actually be already acceptable.
471 if (icp_try_to_deliver(icp, new_irq, state->priority, &reject)) {
473 * Delivery was successful, did we reject somebody else ?
475 if (reject && reject != XICS_IPI) {
476 arch_spin_unlock(&ics->lock);
477 local_irq_restore(flags);
484 * We failed to deliver the interrupt we need to set the
485 * resend map bit and mark the ICS state as needing a resend
490 * Make sure when checking resend, we don't miss the resend
491 * if resend_map bit is seen and cleared.
494 set_bit(ics->icsid, icp->resend_map);
497 * If the need_resend flag got cleared in the ICP some time
498 * between icp_try_to_deliver() atomic update and now, then
499 * we know it might have missed the resend_map bit. So we
503 if (!icp->state.need_resend) {
505 arch_spin_unlock(&ics->lock);
506 local_irq_restore(flags);
512 arch_spin_unlock(&ics->lock);
513 local_irq_restore(flags);
516 static void icp_down_cppr(struct kvmppc_xics *xics, struct kvmppc_icp *icp,
519 union kvmppc_icp_state old_state, new_state;
523 * This handles several related states in one operation:
525 * ICP State: Down_CPPR
527 * Load CPPR with new value and if the XISR is 0
528 * then check for resends:
532 * If MFRR is more favored than CPPR, check for IPIs
533 * and notify ICS of a potential resend. This is done
534 * asynchronously (when used in real mode, we will have
537 * We do not handle the complete Check_IPI as documented
538 * here. In the PAPR, this state will be used for both
539 * Set_MFRR and Down_CPPR. However, we know that we aren't
540 * changing the MFRR state here so we don't need to handle
541 * the case of an MFRR causing a reject of a pending irq,
542 * this will have been handled when the MFRR was set in the
545 * Thus we don't have to handle rejects, only resends.
547 * When implementing real mode for HV KVM, resend will lead to
548 * a H_TOO_HARD return and the whole transaction will be handled
552 old_state = new_state = READ_ONCE(icp->state);
555 new_state.cppr = new_cppr;
558 * Cut down Resend / Check_IPI / IPI
560 * The logic is that we cannot have a pending interrupt
561 * trumped by an IPI at this point (see above), so we
562 * know that either the pending interrupt is already an
563 * IPI (in which case we don't care to override it) or
564 * it's either more favored than us or non existent
566 if (new_state.mfrr < new_cppr &&
567 new_state.mfrr <= new_state.pending_pri) {
568 WARN_ON(new_state.xisr != XICS_IPI &&
569 new_state.xisr != 0);
570 new_state.pending_pri = new_state.mfrr;
571 new_state.xisr = XICS_IPI;
574 /* Latch/clear resend bit */
575 resend = new_state.need_resend;
576 new_state.need_resend = 0;
578 } while (!icp_try_update(icp, old_state, new_state, true));
581 * Now handle resend checks. Those are asynchronous to the ICP
582 * state update in HW (ie bus transactions) so we can handle them
583 * separately here too
586 icp_check_resend(xics, icp);
589 static noinline unsigned long kvmppc_h_xirr(struct kvm_vcpu *vcpu)
591 union kvmppc_icp_state old_state, new_state;
592 struct kvmppc_icp *icp = vcpu->arch.icp;
595 /* First, remove EE from the processor */
596 kvmppc_book3s_dequeue_irqprio(icp->vcpu, BOOK3S_INTERRUPT_EXTERNAL);
599 * ICP State: Accept_Interrupt
601 * Return the pending interrupt (if any) along with the
602 * current CPPR, then clear the XISR & set CPPR to the
606 old_state = new_state = READ_ONCE(icp->state);
608 xirr = old_state.xisr | (((u32)old_state.cppr) << 24);
611 new_state.cppr = new_state.pending_pri;
612 new_state.pending_pri = 0xff;
615 } while (!icp_try_update(icp, old_state, new_state, true));
617 XICS_DBG("h_xirr vcpu %d xirr %#x\n", vcpu->vcpu_id, xirr);
622 static noinline int kvmppc_h_ipi(struct kvm_vcpu *vcpu, unsigned long server,
625 union kvmppc_icp_state old_state, new_state;
626 struct kvmppc_xics *xics = vcpu->kvm->arch.xics;
627 struct kvmppc_icp *icp;
632 XICS_DBG("h_ipi vcpu %d to server %lu mfrr %#lx\n",
633 vcpu->vcpu_id, server, mfrr);
635 icp = vcpu->arch.icp;
636 local = icp->server_num == server;
638 icp = kvmppc_xics_find_server(vcpu->kvm, server);
644 * ICP state: Set_MFRR
646 * If the CPPR is more favored than the new MFRR, then
647 * nothing needs to be rejected as there can be no XISR to
648 * reject. If the MFRR is being made less favored then
649 * there might be a previously-rejected interrupt needing
652 * ICP state: Check_IPI
654 * If the CPPR is less favored, then we might be replacing
655 * an interrupt, and thus need to possibly reject it.
659 * Besides rejecting any pending interrupts, we also
660 * update XISR and pending_pri to mark IPI as pending.
662 * PAPR does not describe this state, but if the MFRR is being
663 * made less favored than its earlier value, there might be
664 * a previously-rejected interrupt needing to be resent.
665 * Ideally, we would want to resend only if
666 * prio(pending_interrupt) < mfrr &&
667 * prio(pending_interrupt) < cppr
668 * where pending interrupt is the one that was rejected. But
669 * we don't have that state, so we simply trigger a resend
670 * whenever the MFRR is made less favored.
673 old_state = new_state = READ_ONCE(icp->state);
676 new_state.mfrr = mfrr;
681 if (mfrr < new_state.cppr) {
682 /* Reject a pending interrupt if not an IPI */
683 if (mfrr <= new_state.pending_pri) {
684 reject = new_state.xisr;
685 new_state.pending_pri = mfrr;
686 new_state.xisr = XICS_IPI;
690 if (mfrr > old_state.mfrr) {
691 resend = new_state.need_resend;
692 new_state.need_resend = 0;
694 } while (!icp_try_update(icp, old_state, new_state, local));
697 if (reject && reject != XICS_IPI)
698 icp_deliver_irq(xics, icp, reject, false);
702 icp_check_resend(xics, icp);
707 static int kvmppc_h_ipoll(struct kvm_vcpu *vcpu, unsigned long server)
709 union kvmppc_icp_state state;
710 struct kvmppc_icp *icp;
712 icp = vcpu->arch.icp;
713 if (icp->server_num != server) {
714 icp = kvmppc_xics_find_server(vcpu->kvm, server);
718 state = READ_ONCE(icp->state);
719 kvmppc_set_gpr(vcpu, 4, ((u32)state.cppr << 24) | state.xisr);
720 kvmppc_set_gpr(vcpu, 5, state.mfrr);
724 static noinline void kvmppc_h_cppr(struct kvm_vcpu *vcpu, unsigned long cppr)
726 union kvmppc_icp_state old_state, new_state;
727 struct kvmppc_xics *xics = vcpu->kvm->arch.xics;
728 struct kvmppc_icp *icp = vcpu->arch.icp;
731 XICS_DBG("h_cppr vcpu %d cppr %#lx\n", vcpu->vcpu_id, cppr);
734 * ICP State: Set_CPPR
736 * We can safely compare the new value with the current
737 * value outside of the transaction as the CPPR is only
738 * ever changed by the processor on itself
740 if (cppr > icp->state.cppr)
741 icp_down_cppr(xics, icp, cppr);
742 else if (cppr == icp->state.cppr)
748 * The processor is raising its priority, this can result
749 * in a rejection of a pending interrupt:
751 * ICP State: Reject_Current
753 * We can remove EE from the current processor, the update
754 * transaction will set it again if needed
756 kvmppc_book3s_dequeue_irqprio(icp->vcpu, BOOK3S_INTERRUPT_EXTERNAL);
759 old_state = new_state = READ_ONCE(icp->state);
762 new_state.cppr = cppr;
764 if (cppr <= new_state.pending_pri) {
765 reject = new_state.xisr;
767 new_state.pending_pri = 0xff;
770 } while (!icp_try_update(icp, old_state, new_state, true));
773 * Check for rejects. They are handled by doing a new delivery
774 * attempt (see comments in icp_deliver_irq).
776 if (reject && reject != XICS_IPI)
777 icp_deliver_irq(xics, icp, reject, false);
780 static int ics_eoi(struct kvm_vcpu *vcpu, u32 irq)
782 struct kvmppc_xics *xics = vcpu->kvm->arch.xics;
783 struct kvmppc_icp *icp = vcpu->arch.icp;
784 struct kvmppc_ics *ics;
785 struct ics_irq_state *state;
790 * ICS EOI handling: For LSI, if P bit is still set, we need to
793 * For MSI, we move Q bit into P (and clear Q). If it is set,
797 ics = kvmppc_xics_find_ics(xics, irq, &src);
799 XICS_DBG("ios_eoi: IRQ 0x%06x not found !\n", irq);
802 state = &ics->irq_state[src];
805 pq_new = state->pq_state;
808 pq_old = state->pq_state;
809 pq_new = pq_old >> 1;
810 } while (cmpxchg(&state->pq_state, pq_old, pq_new) != pq_old);
812 if (pq_new & PQ_PRESENTED)
813 icp_deliver_irq(xics, icp, irq, false);
815 kvm_notify_acked_irq(vcpu->kvm, 0, irq);
820 static noinline int kvmppc_h_eoi(struct kvm_vcpu *vcpu, unsigned long xirr)
822 struct kvmppc_xics *xics = vcpu->kvm->arch.xics;
823 struct kvmppc_icp *icp = vcpu->arch.icp;
824 u32 irq = xirr & 0x00ffffff;
826 XICS_DBG("h_eoi vcpu %d eoi %#lx\n", vcpu->vcpu_id, xirr);
831 * Note: If EOI is incorrectly used by SW to lower the CPPR
832 * value (ie more favored), we do not check for rejection of
833 * a pending interrupt, this is a SW error and PAPR sepcifies
834 * that we don't have to deal with it.
836 * The sending of an EOI to the ICS is handled after the
839 * ICP State: Down_CPPR which we handle
840 * in a separate function as it's shared with H_CPPR.
842 icp_down_cppr(xics, icp, xirr >> 24);
844 /* IPIs have no EOI */
848 return ics_eoi(vcpu, irq);
851 int kvmppc_xics_rm_complete(struct kvm_vcpu *vcpu, u32 hcall)
853 struct kvmppc_xics *xics = vcpu->kvm->arch.xics;
854 struct kvmppc_icp *icp = vcpu->arch.icp;
856 XICS_DBG("XICS_RM: H_%x completing, act: %x state: %lx tgt: %p\n",
857 hcall, icp->rm_action, icp->rm_dbgstate.raw, icp->rm_dbgtgt);
859 if (icp->rm_action & XICS_RM_KICK_VCPU) {
860 icp->n_rm_kick_vcpu++;
861 kvmppc_fast_vcpu_kick(icp->rm_kick_target);
863 if (icp->rm_action & XICS_RM_CHECK_RESEND) {
864 icp->n_rm_check_resend++;
865 icp_check_resend(xics, icp->rm_resend_icp);
867 if (icp->rm_action & XICS_RM_NOTIFY_EOI) {
868 icp->n_rm_notify_eoi++;
869 kvm_notify_acked_irq(vcpu->kvm, 0, icp->rm_eoied_irq);
876 EXPORT_SYMBOL_GPL(kvmppc_xics_rm_complete);
878 int kvmppc_xics_hcall(struct kvm_vcpu *vcpu, u32 req)
880 struct kvmppc_xics *xics = vcpu->kvm->arch.xics;
884 /* Check if we have an ICP */
885 if (!xics || !vcpu->arch.icp)
888 /* These requests don't have real-mode implementations at present */
891 res = kvmppc_h_xirr(vcpu);
892 kvmppc_set_gpr(vcpu, 4, res);
893 kvmppc_set_gpr(vcpu, 5, get_tb());
896 rc = kvmppc_h_ipoll(vcpu, kvmppc_get_gpr(vcpu, 4));
900 /* Check for real mode returning too hard */
901 if (xics->real_mode && is_kvmppc_hv_enabled(vcpu->kvm))
902 return kvmppc_xics_rm_complete(vcpu, req);
906 res = kvmppc_h_xirr(vcpu);
907 kvmppc_set_gpr(vcpu, 4, res);
910 kvmppc_h_cppr(vcpu, kvmppc_get_gpr(vcpu, 4));
913 rc = kvmppc_h_eoi(vcpu, kvmppc_get_gpr(vcpu, 4));
916 rc = kvmppc_h_ipi(vcpu, kvmppc_get_gpr(vcpu, 4),
917 kvmppc_get_gpr(vcpu, 5));
923 EXPORT_SYMBOL_GPL(kvmppc_xics_hcall);
926 /* -- Initialisation code etc. -- */
928 static void xics_debugfs_irqmap(struct seq_file *m,
929 struct kvmppc_passthru_irqmap *pimap)
935 seq_printf(m, "========\nPIRQ mappings: %d maps\n===========\n",
937 for (i = 0; i < pimap->n_mapped; i++) {
938 seq_printf(m, "r_hwirq=%x, v_hwirq=%x\n",
939 pimap->mapped[i].r_hwirq, pimap->mapped[i].v_hwirq);
943 static int xics_debug_show(struct seq_file *m, void *private)
945 struct kvmppc_xics *xics = m->private;
946 struct kvm *kvm = xics->kvm;
947 struct kvm_vcpu *vcpu;
950 unsigned long t_rm_kick_vcpu, t_rm_check_resend;
951 unsigned long t_rm_notify_eoi;
952 unsigned long t_reject, t_check_resend;
959 t_rm_check_resend = 0;
963 xics_debugfs_irqmap(m, kvm->arch.pimap);
965 seq_printf(m, "=========\nICP state\n=========\n");
967 kvm_for_each_vcpu(i, vcpu, kvm) {
968 struct kvmppc_icp *icp = vcpu->arch.icp;
969 union kvmppc_icp_state state;
974 state.raw = READ_ONCE(icp->state.raw);
975 seq_printf(m, "cpu server %#lx XIRR:%#x PPRI:%#x CPPR:%#x MFRR:%#x OUT:%d NR:%d\n",
976 icp->server_num, state.xisr,
977 state.pending_pri, state.cppr, state.mfrr,
978 state.out_ee, state.need_resend);
979 t_rm_kick_vcpu += icp->n_rm_kick_vcpu;
980 t_rm_notify_eoi += icp->n_rm_notify_eoi;
981 t_rm_check_resend += icp->n_rm_check_resend;
982 t_check_resend += icp->n_check_resend;
983 t_reject += icp->n_reject;
986 seq_printf(m, "ICP Guest->Host totals: kick_vcpu=%lu check_resend=%lu notify_eoi=%lu\n",
987 t_rm_kick_vcpu, t_rm_check_resend,
989 seq_printf(m, "ICP Real Mode totals: check_resend=%lu resend=%lu\n",
990 t_check_resend, t_reject);
991 for (icsid = 0; icsid <= KVMPPC_XICS_MAX_ICS_ID; icsid++) {
992 struct kvmppc_ics *ics = xics->ics[icsid];
997 seq_printf(m, "=========\nICS state for ICS 0x%x\n=========\n",
1000 local_irq_save(flags);
1001 arch_spin_lock(&ics->lock);
1003 for (i = 0; i < KVMPPC_XICS_IRQ_PER_ICS; i++) {
1004 struct ics_irq_state *irq = &ics->irq_state[i];
1006 seq_printf(m, "irq 0x%06x: server %#x prio %#x save prio %#x pq_state %d resend %d masked pending %d\n",
1007 irq->number, irq->server, irq->priority,
1008 irq->saved_priority, irq->pq_state,
1009 irq->resend, irq->masked_pending);
1012 arch_spin_unlock(&ics->lock);
1013 local_irq_restore(flags);
1018 static int xics_debug_open(struct inode *inode, struct file *file)
1020 return single_open(file, xics_debug_show, inode->i_private);
1023 static const struct file_operations xics_debug_fops = {
1024 .open = xics_debug_open,
1026 .llseek = seq_lseek,
1027 .release = single_release,
1030 static void xics_debugfs_init(struct kvmppc_xics *xics)
1034 name = kasprintf(GFP_KERNEL, "kvm-xics-%p", xics);
1036 pr_err("%s: no memory for name\n", __func__);
1040 xics->dentry = debugfs_create_file(name, 0444, powerpc_debugfs_root,
1041 xics, &xics_debug_fops);
1043 pr_debug("%s: created %s\n", __func__, name);
1047 static struct kvmppc_ics *kvmppc_xics_create_ics(struct kvm *kvm,
1048 struct kvmppc_xics *xics, int irq)
1050 struct kvmppc_ics *ics;
1053 icsid = irq >> KVMPPC_XICS_ICS_SHIFT;
1055 mutex_lock(&kvm->lock);
1057 /* ICS already exists - somebody else got here first */
1058 if (xics->ics[icsid])
1061 /* Create the ICS */
1062 ics = kzalloc(sizeof(struct kvmppc_ics), GFP_KERNEL);
1068 for (i = 0; i < KVMPPC_XICS_IRQ_PER_ICS; i++) {
1069 ics->irq_state[i].number = (icsid << KVMPPC_XICS_ICS_SHIFT) | i;
1070 ics->irq_state[i].priority = MASKED;
1071 ics->irq_state[i].saved_priority = MASKED;
1074 xics->ics[icsid] = ics;
1076 if (icsid > xics->max_icsid)
1077 xics->max_icsid = icsid;
1080 mutex_unlock(&kvm->lock);
1081 return xics->ics[icsid];
1084 static int kvmppc_xics_create_icp(struct kvm_vcpu *vcpu, unsigned long server_num)
1086 struct kvmppc_icp *icp;
1088 if (!vcpu->kvm->arch.xics)
1091 if (kvmppc_xics_find_server(vcpu->kvm, server_num))
1094 icp = kzalloc(sizeof(struct kvmppc_icp), GFP_KERNEL);
1099 icp->server_num = server_num;
1100 icp->state.mfrr = MASKED;
1101 icp->state.pending_pri = MASKED;
1102 vcpu->arch.icp = icp;
1104 XICS_DBG("created server for vcpu %d\n", vcpu->vcpu_id);
1109 u64 kvmppc_xics_get_icp(struct kvm_vcpu *vcpu)
1111 struct kvmppc_icp *icp = vcpu->arch.icp;
1112 union kvmppc_icp_state state;
1117 return ((u64)state.cppr << KVM_REG_PPC_ICP_CPPR_SHIFT) |
1118 ((u64)state.xisr << KVM_REG_PPC_ICP_XISR_SHIFT) |
1119 ((u64)state.mfrr << KVM_REG_PPC_ICP_MFRR_SHIFT) |
1120 ((u64)state.pending_pri << KVM_REG_PPC_ICP_PPRI_SHIFT);
1123 int kvmppc_xics_set_icp(struct kvm_vcpu *vcpu, u64 icpval)
1125 struct kvmppc_icp *icp = vcpu->arch.icp;
1126 struct kvmppc_xics *xics = vcpu->kvm->arch.xics;
1127 union kvmppc_icp_state old_state, new_state;
1128 struct kvmppc_ics *ics;
1129 u8 cppr, mfrr, pending_pri;
1137 cppr = icpval >> KVM_REG_PPC_ICP_CPPR_SHIFT;
1138 xisr = (icpval >> KVM_REG_PPC_ICP_XISR_SHIFT) &
1139 KVM_REG_PPC_ICP_XISR_MASK;
1140 mfrr = icpval >> KVM_REG_PPC_ICP_MFRR_SHIFT;
1141 pending_pri = icpval >> KVM_REG_PPC_ICP_PPRI_SHIFT;
1143 /* Require the new state to be internally consistent */
1145 if (pending_pri != 0xff)
1147 } else if (xisr == XICS_IPI) {
1148 if (pending_pri != mfrr || pending_pri >= cppr)
1151 if (pending_pri >= mfrr || pending_pri >= cppr)
1153 ics = kvmppc_xics_find_ics(xics, xisr, &src);
1159 new_state.cppr = cppr;
1160 new_state.xisr = xisr;
1161 new_state.mfrr = mfrr;
1162 new_state.pending_pri = pending_pri;
1165 * Deassert the CPU interrupt request.
1166 * icp_try_update will reassert it if necessary.
1168 kvmppc_book3s_dequeue_irqprio(icp->vcpu, BOOK3S_INTERRUPT_EXTERNAL);
1171 * Note that if we displace an interrupt from old_state.xisr,
1172 * we don't mark it as rejected. We expect userspace to set
1173 * the state of the interrupt sources to be consistent with
1174 * the ICP states (either before or afterwards, which doesn't
1175 * matter). We do handle resends due to CPPR becoming less
1176 * favoured because that is necessary to end up with a
1177 * consistent state in the situation where userspace restores
1178 * the ICS states before the ICP states.
1181 old_state = READ_ONCE(icp->state);
1183 if (new_state.mfrr <= old_state.mfrr) {
1185 new_state.need_resend = old_state.need_resend;
1187 resend = old_state.need_resend;
1188 new_state.need_resend = 0;
1190 } while (!icp_try_update(icp, old_state, new_state, false));
1193 icp_check_resend(xics, icp);
1198 static int xics_get_source(struct kvmppc_xics *xics, long irq, u64 addr)
1201 struct kvmppc_ics *ics;
1202 struct ics_irq_state *irqp;
1203 u64 __user *ubufp = (u64 __user *) addr;
1206 unsigned long flags;
1208 ics = kvmppc_xics_find_ics(xics, irq, &idx);
1212 irqp = &ics->irq_state[idx];
1213 local_irq_save(flags);
1214 arch_spin_lock(&ics->lock);
1218 prio = irqp->priority;
1219 if (prio == MASKED) {
1220 val |= KVM_XICS_MASKED;
1221 prio = irqp->saved_priority;
1223 val |= prio << KVM_XICS_PRIORITY_SHIFT;
1225 val |= KVM_XICS_LEVEL_SENSITIVE;
1226 if (irqp->pq_state & PQ_PRESENTED)
1227 val |= KVM_XICS_PENDING;
1228 } else if (irqp->masked_pending || irqp->resend)
1229 val |= KVM_XICS_PENDING;
1231 if (irqp->pq_state & PQ_PRESENTED)
1232 val |= KVM_XICS_PRESENTED;
1234 if (irqp->pq_state & PQ_QUEUED)
1235 val |= KVM_XICS_QUEUED;
1239 arch_spin_unlock(&ics->lock);
1240 local_irq_restore(flags);
1242 if (!ret && put_user(val, ubufp))
1248 static int xics_set_source(struct kvmppc_xics *xics, long irq, u64 addr)
1250 struct kvmppc_ics *ics;
1251 struct ics_irq_state *irqp;
1252 u64 __user *ubufp = (u64 __user *) addr;
1257 unsigned long flags;
1259 if (irq < KVMPPC_XICS_FIRST_IRQ || irq >= KVMPPC_XICS_NR_IRQS)
1262 ics = kvmppc_xics_find_ics(xics, irq, &idx);
1264 ics = kvmppc_xics_create_ics(xics->kvm, xics, irq);
1268 irqp = &ics->irq_state[idx];
1269 if (get_user(val, ubufp))
1272 server = val & KVM_XICS_DESTINATION_MASK;
1273 prio = val >> KVM_XICS_PRIORITY_SHIFT;
1274 if (prio != MASKED &&
1275 kvmppc_xics_find_server(xics->kvm, server) == NULL)
1278 local_irq_save(flags);
1279 arch_spin_lock(&ics->lock);
1280 irqp->server = server;
1281 irqp->saved_priority = prio;
1282 if (val & KVM_XICS_MASKED)
1284 irqp->priority = prio;
1286 irqp->masked_pending = 0;
1289 if (val & KVM_XICS_LEVEL_SENSITIVE)
1291 /* If PENDING, set P in case P is not saved because of old code */
1292 if (val & KVM_XICS_PRESENTED || val & KVM_XICS_PENDING)
1293 irqp->pq_state |= PQ_PRESENTED;
1294 if (val & KVM_XICS_QUEUED)
1295 irqp->pq_state |= PQ_QUEUED;
1297 arch_spin_unlock(&ics->lock);
1298 local_irq_restore(flags);
1300 if (val & KVM_XICS_PENDING)
1301 icp_deliver_irq(xics, NULL, irqp->number, false);
1306 int kvmppc_xics_set_irq(struct kvm *kvm, int irq_source_id, u32 irq, int level,
1309 struct kvmppc_xics *xics = kvm->arch.xics;
1313 return ics_deliver_irq(xics, irq, level);
1316 static int xics_set_attr(struct kvm_device *dev, struct kvm_device_attr *attr)
1318 struct kvmppc_xics *xics = dev->private;
1320 switch (attr->group) {
1321 case KVM_DEV_XICS_GRP_SOURCES:
1322 return xics_set_source(xics, attr->attr, attr->addr);
1327 static int xics_get_attr(struct kvm_device *dev, struct kvm_device_attr *attr)
1329 struct kvmppc_xics *xics = dev->private;
1331 switch (attr->group) {
1332 case KVM_DEV_XICS_GRP_SOURCES:
1333 return xics_get_source(xics, attr->attr, attr->addr);
1338 static int xics_has_attr(struct kvm_device *dev, struct kvm_device_attr *attr)
1340 switch (attr->group) {
1341 case KVM_DEV_XICS_GRP_SOURCES:
1342 if (attr->attr >= KVMPPC_XICS_FIRST_IRQ &&
1343 attr->attr < KVMPPC_XICS_NR_IRQS)
1350 static void kvmppc_xics_free(struct kvm_device *dev)
1352 struct kvmppc_xics *xics = dev->private;
1354 struct kvm *kvm = xics->kvm;
1356 debugfs_remove(xics->dentry);
1359 kvm->arch.xics = NULL;
1361 for (i = 0; i <= xics->max_icsid; i++)
1362 kfree(xics->ics[i]);
1367 static int kvmppc_xics_create(struct kvm_device *dev, u32 type)
1369 struct kvmppc_xics *xics;
1370 struct kvm *kvm = dev->kvm;
1373 xics = kzalloc(sizeof(*xics), GFP_KERNEL);
1377 dev->private = xics;
1381 /* Already there ? */
1385 kvm->arch.xics = xics;
1392 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
1393 if (cpu_has_feature(CPU_FTR_ARCH_206) &&
1394 cpu_has_feature(CPU_FTR_HVMODE)) {
1395 /* Enable real mode support */
1396 xics->real_mode = ENABLE_REALMODE;
1397 xics->real_mode_dbg = DEBUG_REALMODE;
1399 #endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
1404 static void kvmppc_xics_init(struct kvm_device *dev)
1406 struct kvmppc_xics *xics = (struct kvmppc_xics *)dev->private;
1408 xics_debugfs_init(xics);
1411 struct kvm_device_ops kvm_xics_ops = {
1413 .create = kvmppc_xics_create,
1414 .init = kvmppc_xics_init,
1415 .destroy = kvmppc_xics_free,
1416 .set_attr = xics_set_attr,
1417 .get_attr = xics_get_attr,
1418 .has_attr = xics_has_attr,
1421 int kvmppc_xics_connect_vcpu(struct kvm_device *dev, struct kvm_vcpu *vcpu,
1424 struct kvmppc_xics *xics = dev->private;
1427 if (dev->ops != &kvm_xics_ops)
1429 if (xics->kvm != vcpu->kvm)
1431 if (vcpu->arch.irq_type)
1434 r = kvmppc_xics_create_icp(vcpu, xcpu);
1436 vcpu->arch.irq_type = KVMPPC_IRQ_XICS;
1441 void kvmppc_xics_free_icp(struct kvm_vcpu *vcpu)
1443 if (!vcpu->arch.icp)
1445 kfree(vcpu->arch.icp);
1446 vcpu->arch.icp = NULL;
1447 vcpu->arch.irq_type = KVMPPC_IRQ_DEFAULT;
1450 void kvmppc_xics_set_mapped(struct kvm *kvm, unsigned long irq,
1451 unsigned long host_irq)
1453 struct kvmppc_xics *xics = kvm->arch.xics;
1454 struct kvmppc_ics *ics;
1457 ics = kvmppc_xics_find_ics(xics, irq, &idx);
1461 ics->irq_state[idx].host_irq = host_irq;
1462 ics->irq_state[idx].intr_cpu = -1;
1464 EXPORT_SYMBOL_GPL(kvmppc_xics_set_mapped);
1466 void kvmppc_xics_clr_mapped(struct kvm *kvm, unsigned long irq,
1467 unsigned long host_irq)
1469 struct kvmppc_xics *xics = kvm->arch.xics;
1470 struct kvmppc_ics *ics;
1473 ics = kvmppc_xics_find_ics(xics, irq, &idx);
1477 ics->irq_state[idx].host_irq = 0;
1479 EXPORT_SYMBOL_GPL(kvmppc_xics_clr_mapped);