Merge tag 'kvm-ppc-next-4.18-2' of git://git.kernel.org/pub/scm/linux/kernel/git...
[sfrench/cifs-2.6.git] / arch / powerpc / kvm / book3s_hv.c
1 /*
2  * Copyright 2011 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com>
3  * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved.
4  *
5  * Authors:
6  *    Paul Mackerras <paulus@au1.ibm.com>
7  *    Alexander Graf <agraf@suse.de>
8  *    Kevin Wolf <mail@kevin-wolf.de>
9  *
10  * Description: KVM functions specific to running on Book 3S
11  * processors in hypervisor mode (specifically POWER7 and later).
12  *
13  * This file is derived from arch/powerpc/kvm/book3s.c,
14  * by Alexander Graf <agraf@suse.de>.
15  *
16  * This program is free software; you can redistribute it and/or modify
17  * it under the terms of the GNU General Public License, version 2, as
18  * published by the Free Software Foundation.
19  */
20
21 #include <linux/kvm_host.h>
22 #include <linux/kernel.h>
23 #include <linux/err.h>
24 #include <linux/slab.h>
25 #include <linux/preempt.h>
26 #include <linux/sched/signal.h>
27 #include <linux/sched/stat.h>
28 #include <linux/delay.h>
29 #include <linux/export.h>
30 #include <linux/fs.h>
31 #include <linux/anon_inodes.h>
32 #include <linux/cpu.h>
33 #include <linux/cpumask.h>
34 #include <linux/spinlock.h>
35 #include <linux/page-flags.h>
36 #include <linux/srcu.h>
37 #include <linux/miscdevice.h>
38 #include <linux/debugfs.h>
39 #include <linux/gfp.h>
40 #include <linux/vmalloc.h>
41 #include <linux/highmem.h>
42 #include <linux/hugetlb.h>
43 #include <linux/kvm_irqfd.h>
44 #include <linux/irqbypass.h>
45 #include <linux/module.h>
46 #include <linux/compiler.h>
47 #include <linux/of.h>
48
49 #include <asm/reg.h>
50 #include <asm/ppc-opcode.h>
51 #include <asm/asm-prototypes.h>
52 #include <asm/debug.h>
53 #include <asm/disassemble.h>
54 #include <asm/cputable.h>
55 #include <asm/cacheflush.h>
56 #include <asm/tlbflush.h>
57 #include <linux/uaccess.h>
58 #include <asm/io.h>
59 #include <asm/kvm_ppc.h>
60 #include <asm/kvm_book3s.h>
61 #include <asm/mmu_context.h>
62 #include <asm/lppaca.h>
63 #include <asm/processor.h>
64 #include <asm/cputhreads.h>
65 #include <asm/page.h>
66 #include <asm/hvcall.h>
67 #include <asm/switch_to.h>
68 #include <asm/smp.h>
69 #include <asm/dbell.h>
70 #include <asm/hmi.h>
71 #include <asm/pnv-pci.h>
72 #include <asm/mmu.h>
73 #include <asm/opal.h>
74 #include <asm/xics.h>
75 #include <asm/xive.h>
76
77 #include "book3s.h"
78
79 #define CREATE_TRACE_POINTS
80 #include "trace_hv.h"
81
82 /* #define EXIT_DEBUG */
83 /* #define EXIT_DEBUG_SIMPLE */
84 /* #define EXIT_DEBUG_INT */
85
86 /* Used to indicate that a guest page fault needs to be handled */
87 #define RESUME_PAGE_FAULT       (RESUME_GUEST | RESUME_FLAG_ARCH1)
88 /* Used to indicate that a guest passthrough interrupt needs to be handled */
89 #define RESUME_PASSTHROUGH      (RESUME_GUEST | RESUME_FLAG_ARCH2)
90
91 /* Used as a "null" value for timebase values */
92 #define TB_NIL  (~(u64)0)
93
94 static DECLARE_BITMAP(default_enabled_hcalls, MAX_HCALL_OPCODE/4 + 1);
95
96 static int dynamic_mt_modes = 6;
97 module_param(dynamic_mt_modes, int, 0644);
98 MODULE_PARM_DESC(dynamic_mt_modes, "Set of allowed dynamic micro-threading modes: 0 (= none), 2, 4, or 6 (= 2 or 4)");
99 static int target_smt_mode;
100 module_param(target_smt_mode, int, 0644);
101 MODULE_PARM_DESC(target_smt_mode, "Target threads per core (0 = max)");
102
103 static bool indep_threads_mode = true;
104 module_param(indep_threads_mode, bool, S_IRUGO | S_IWUSR);
105 MODULE_PARM_DESC(indep_threads_mode, "Independent-threads mode (only on POWER9)");
106
107 #ifdef CONFIG_KVM_XICS
108 static struct kernel_param_ops module_param_ops = {
109         .set = param_set_int,
110         .get = param_get_int,
111 };
112
113 module_param_cb(kvm_irq_bypass, &module_param_ops, &kvm_irq_bypass, 0644);
114 MODULE_PARM_DESC(kvm_irq_bypass, "Bypass passthrough interrupt optimization");
115
116 module_param_cb(h_ipi_redirect, &module_param_ops, &h_ipi_redirect, 0644);
117 MODULE_PARM_DESC(h_ipi_redirect, "Redirect H_IPI wakeup to a free host core");
118 #endif
119
120 /* If set, the threads on each CPU core have to be in the same MMU mode */
121 static bool no_mixing_hpt_and_radix;
122
123 static void kvmppc_end_cede(struct kvm_vcpu *vcpu);
124 static int kvmppc_hv_setup_htab_rma(struct kvm_vcpu *vcpu);
125
126 /*
127  * RWMR values for POWER8.  These control the rate at which PURR
128  * and SPURR count and should be set according to the number of
129  * online threads in the vcore being run.
130  */
131 #define RWMR_RPA_P8_1THREAD     0x164520C62609AECA
132 #define RWMR_RPA_P8_2THREAD     0x7FFF2908450D8DA9
133 #define RWMR_RPA_P8_3THREAD     0x164520C62609AECA
134 #define RWMR_RPA_P8_4THREAD     0x199A421245058DA9
135 #define RWMR_RPA_P8_5THREAD     0x164520C62609AECA
136 #define RWMR_RPA_P8_6THREAD     0x164520C62609AECA
137 #define RWMR_RPA_P8_7THREAD     0x164520C62609AECA
138 #define RWMR_RPA_P8_8THREAD     0x164520C62609AECA
139
140 static unsigned long p8_rwmr_values[MAX_SMT_THREADS + 1] = {
141         RWMR_RPA_P8_1THREAD,
142         RWMR_RPA_P8_1THREAD,
143         RWMR_RPA_P8_2THREAD,
144         RWMR_RPA_P8_3THREAD,
145         RWMR_RPA_P8_4THREAD,
146         RWMR_RPA_P8_5THREAD,
147         RWMR_RPA_P8_6THREAD,
148         RWMR_RPA_P8_7THREAD,
149         RWMR_RPA_P8_8THREAD,
150 };
151
152 static inline struct kvm_vcpu *next_runnable_thread(struct kvmppc_vcore *vc,
153                 int *ip)
154 {
155         int i = *ip;
156         struct kvm_vcpu *vcpu;
157
158         while (++i < MAX_SMT_THREADS) {
159                 vcpu = READ_ONCE(vc->runnable_threads[i]);
160                 if (vcpu) {
161                         *ip = i;
162                         return vcpu;
163                 }
164         }
165         return NULL;
166 }
167
168 /* Used to traverse the list of runnable threads for a given vcore */
169 #define for_each_runnable_thread(i, vcpu, vc) \
170         for (i = -1; (vcpu = next_runnable_thread(vc, &i)); )
171
172 static bool kvmppc_ipi_thread(int cpu)
173 {
174         unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER);
175
176         /* On POWER9 we can use msgsnd to IPI any cpu */
177         if (cpu_has_feature(CPU_FTR_ARCH_300)) {
178                 msg |= get_hard_smp_processor_id(cpu);
179                 smp_mb();
180                 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg));
181                 return true;
182         }
183
184         /* On POWER8 for IPIs to threads in the same core, use msgsnd */
185         if (cpu_has_feature(CPU_FTR_ARCH_207S)) {
186                 preempt_disable();
187                 if (cpu_first_thread_sibling(cpu) ==
188                     cpu_first_thread_sibling(smp_processor_id())) {
189                         msg |= cpu_thread_in_core(cpu);
190                         smp_mb();
191                         __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg));
192                         preempt_enable();
193                         return true;
194                 }
195                 preempt_enable();
196         }
197
198 #if defined(CONFIG_PPC_ICP_NATIVE) && defined(CONFIG_SMP)
199         if (cpu >= 0 && cpu < nr_cpu_ids) {
200                 if (paca_ptrs[cpu]->kvm_hstate.xics_phys) {
201                         xics_wake_cpu(cpu);
202                         return true;
203                 }
204                 opal_int_set_mfrr(get_hard_smp_processor_id(cpu), IPI_PRIORITY);
205                 return true;
206         }
207 #endif
208
209         return false;
210 }
211
212 static void kvmppc_fast_vcpu_kick_hv(struct kvm_vcpu *vcpu)
213 {
214         int cpu;
215         struct swait_queue_head *wqp;
216
217         wqp = kvm_arch_vcpu_wq(vcpu);
218         if (swq_has_sleeper(wqp)) {
219                 swake_up(wqp);
220                 ++vcpu->stat.halt_wakeup;
221         }
222
223         cpu = READ_ONCE(vcpu->arch.thread_cpu);
224         if (cpu >= 0 && kvmppc_ipi_thread(cpu))
225                 return;
226
227         /* CPU points to the first thread of the core */
228         cpu = vcpu->cpu;
229         if (cpu >= 0 && cpu < nr_cpu_ids && cpu_online(cpu))
230                 smp_send_reschedule(cpu);
231 }
232
233 /*
234  * We use the vcpu_load/put functions to measure stolen time.
235  * Stolen time is counted as time when either the vcpu is able to
236  * run as part of a virtual core, but the task running the vcore
237  * is preempted or sleeping, or when the vcpu needs something done
238  * in the kernel by the task running the vcpu, but that task is
239  * preempted or sleeping.  Those two things have to be counted
240  * separately, since one of the vcpu tasks will take on the job
241  * of running the core, and the other vcpu tasks in the vcore will
242  * sleep waiting for it to do that, but that sleep shouldn't count
243  * as stolen time.
244  *
245  * Hence we accumulate stolen time when the vcpu can run as part of
246  * a vcore using vc->stolen_tb, and the stolen time when the vcpu
247  * needs its task to do other things in the kernel (for example,
248  * service a page fault) in busy_stolen.  We don't accumulate
249  * stolen time for a vcore when it is inactive, or for a vcpu
250  * when it is in state RUNNING or NOTREADY.  NOTREADY is a bit of
251  * a misnomer; it means that the vcpu task is not executing in
252  * the KVM_VCPU_RUN ioctl, i.e. it is in userspace or elsewhere in
253  * the kernel.  We don't have any way of dividing up that time
254  * between time that the vcpu is genuinely stopped, time that
255  * the task is actively working on behalf of the vcpu, and time
256  * that the task is preempted, so we don't count any of it as
257  * stolen.
258  *
259  * Updates to busy_stolen are protected by arch.tbacct_lock;
260  * updates to vc->stolen_tb are protected by the vcore->stoltb_lock
261  * lock.  The stolen times are measured in units of timebase ticks.
262  * (Note that the != TB_NIL checks below are purely defensive;
263  * they should never fail.)
264  */
265
266 static void kvmppc_core_start_stolen(struct kvmppc_vcore *vc)
267 {
268         unsigned long flags;
269
270         spin_lock_irqsave(&vc->stoltb_lock, flags);
271         vc->preempt_tb = mftb();
272         spin_unlock_irqrestore(&vc->stoltb_lock, flags);
273 }
274
275 static void kvmppc_core_end_stolen(struct kvmppc_vcore *vc)
276 {
277         unsigned long flags;
278
279         spin_lock_irqsave(&vc->stoltb_lock, flags);
280         if (vc->preempt_tb != TB_NIL) {
281                 vc->stolen_tb += mftb() - vc->preempt_tb;
282                 vc->preempt_tb = TB_NIL;
283         }
284         spin_unlock_irqrestore(&vc->stoltb_lock, flags);
285 }
286
287 static void kvmppc_core_vcpu_load_hv(struct kvm_vcpu *vcpu, int cpu)
288 {
289         struct kvmppc_vcore *vc = vcpu->arch.vcore;
290         unsigned long flags;
291
292         /*
293          * We can test vc->runner without taking the vcore lock,
294          * because only this task ever sets vc->runner to this
295          * vcpu, and once it is set to this vcpu, only this task
296          * ever sets it to NULL.
297          */
298         if (vc->runner == vcpu && vc->vcore_state >= VCORE_SLEEPING)
299                 kvmppc_core_end_stolen(vc);
300
301         spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags);
302         if (vcpu->arch.state == KVMPPC_VCPU_BUSY_IN_HOST &&
303             vcpu->arch.busy_preempt != TB_NIL) {
304                 vcpu->arch.busy_stolen += mftb() - vcpu->arch.busy_preempt;
305                 vcpu->arch.busy_preempt = TB_NIL;
306         }
307         spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags);
308 }
309
310 static void kvmppc_core_vcpu_put_hv(struct kvm_vcpu *vcpu)
311 {
312         struct kvmppc_vcore *vc = vcpu->arch.vcore;
313         unsigned long flags;
314
315         if (vc->runner == vcpu && vc->vcore_state >= VCORE_SLEEPING)
316                 kvmppc_core_start_stolen(vc);
317
318         spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags);
319         if (vcpu->arch.state == KVMPPC_VCPU_BUSY_IN_HOST)
320                 vcpu->arch.busy_preempt = mftb();
321         spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags);
322 }
323
324 static void kvmppc_set_msr_hv(struct kvm_vcpu *vcpu, u64 msr)
325 {
326         /*
327          * Check for illegal transactional state bit combination
328          * and if we find it, force the TS field to a safe state.
329          */
330         if ((msr & MSR_TS_MASK) == MSR_TS_MASK)
331                 msr &= ~MSR_TS_MASK;
332         vcpu->arch.shregs.msr = msr;
333         kvmppc_end_cede(vcpu);
334 }
335
336 static void kvmppc_set_pvr_hv(struct kvm_vcpu *vcpu, u32 pvr)
337 {
338         vcpu->arch.pvr = pvr;
339 }
340
341 /* Dummy value used in computing PCR value below */
342 #define PCR_ARCH_300    (PCR_ARCH_207 << 1)
343
344 static int kvmppc_set_arch_compat(struct kvm_vcpu *vcpu, u32 arch_compat)
345 {
346         unsigned long host_pcr_bit = 0, guest_pcr_bit = 0;
347         struct kvmppc_vcore *vc = vcpu->arch.vcore;
348
349         /* We can (emulate) our own architecture version and anything older */
350         if (cpu_has_feature(CPU_FTR_ARCH_300))
351                 host_pcr_bit = PCR_ARCH_300;
352         else if (cpu_has_feature(CPU_FTR_ARCH_207S))
353                 host_pcr_bit = PCR_ARCH_207;
354         else if (cpu_has_feature(CPU_FTR_ARCH_206))
355                 host_pcr_bit = PCR_ARCH_206;
356         else
357                 host_pcr_bit = PCR_ARCH_205;
358
359         /* Determine lowest PCR bit needed to run guest in given PVR level */
360         guest_pcr_bit = host_pcr_bit;
361         if (arch_compat) {
362                 switch (arch_compat) {
363                 case PVR_ARCH_205:
364                         guest_pcr_bit = PCR_ARCH_205;
365                         break;
366                 case PVR_ARCH_206:
367                 case PVR_ARCH_206p:
368                         guest_pcr_bit = PCR_ARCH_206;
369                         break;
370                 case PVR_ARCH_207:
371                         guest_pcr_bit = PCR_ARCH_207;
372                         break;
373                 case PVR_ARCH_300:
374                         guest_pcr_bit = PCR_ARCH_300;
375                         break;
376                 default:
377                         return -EINVAL;
378                 }
379         }
380
381         /* Check requested PCR bits don't exceed our capabilities */
382         if (guest_pcr_bit > host_pcr_bit)
383                 return -EINVAL;
384
385         spin_lock(&vc->lock);
386         vc->arch_compat = arch_compat;
387         /* Set all PCR bits for which guest_pcr_bit <= bit < host_pcr_bit */
388         vc->pcr = host_pcr_bit - guest_pcr_bit;
389         spin_unlock(&vc->lock);
390
391         return 0;
392 }
393
394 static void kvmppc_dump_regs(struct kvm_vcpu *vcpu)
395 {
396         int r;
397
398         pr_err("vcpu %p (%d):\n", vcpu, vcpu->vcpu_id);
399         pr_err("pc  = %.16lx  msr = %.16llx  trap = %x\n",
400                vcpu->arch.regs.nip, vcpu->arch.shregs.msr, vcpu->arch.trap);
401         for (r = 0; r < 16; ++r)
402                 pr_err("r%2d = %.16lx  r%d = %.16lx\n",
403                        r, kvmppc_get_gpr(vcpu, r),
404                        r+16, kvmppc_get_gpr(vcpu, r+16));
405         pr_err("ctr = %.16lx  lr  = %.16lx\n",
406                vcpu->arch.regs.ctr, vcpu->arch.regs.link);
407         pr_err("srr0 = %.16llx srr1 = %.16llx\n",
408                vcpu->arch.shregs.srr0, vcpu->arch.shregs.srr1);
409         pr_err("sprg0 = %.16llx sprg1 = %.16llx\n",
410                vcpu->arch.shregs.sprg0, vcpu->arch.shregs.sprg1);
411         pr_err("sprg2 = %.16llx sprg3 = %.16llx\n",
412                vcpu->arch.shregs.sprg2, vcpu->arch.shregs.sprg3);
413         pr_err("cr = %.8x  xer = %.16lx  dsisr = %.8x\n",
414                vcpu->arch.cr, vcpu->arch.regs.xer, vcpu->arch.shregs.dsisr);
415         pr_err("dar = %.16llx\n", vcpu->arch.shregs.dar);
416         pr_err("fault dar = %.16lx dsisr = %.8x\n",
417                vcpu->arch.fault_dar, vcpu->arch.fault_dsisr);
418         pr_err("SLB (%d entries):\n", vcpu->arch.slb_max);
419         for (r = 0; r < vcpu->arch.slb_max; ++r)
420                 pr_err("  ESID = %.16llx VSID = %.16llx\n",
421                        vcpu->arch.slb[r].orige, vcpu->arch.slb[r].origv);
422         pr_err("lpcr = %.16lx sdr1 = %.16lx last_inst = %.8x\n",
423                vcpu->arch.vcore->lpcr, vcpu->kvm->arch.sdr1,
424                vcpu->arch.last_inst);
425 }
426
427 static struct kvm_vcpu *kvmppc_find_vcpu(struct kvm *kvm, int id)
428 {
429         struct kvm_vcpu *ret;
430
431         mutex_lock(&kvm->lock);
432         ret = kvm_get_vcpu_by_id(kvm, id);
433         mutex_unlock(&kvm->lock);
434         return ret;
435 }
436
437 static void init_vpa(struct kvm_vcpu *vcpu, struct lppaca *vpa)
438 {
439         vpa->__old_status |= LPPACA_OLD_SHARED_PROC;
440         vpa->yield_count = cpu_to_be32(1);
441 }
442
443 static int set_vpa(struct kvm_vcpu *vcpu, struct kvmppc_vpa *v,
444                    unsigned long addr, unsigned long len)
445 {
446         /* check address is cacheline aligned */
447         if (addr & (L1_CACHE_BYTES - 1))
448                 return -EINVAL;
449         spin_lock(&vcpu->arch.vpa_update_lock);
450         if (v->next_gpa != addr || v->len != len) {
451                 v->next_gpa = addr;
452                 v->len = addr ? len : 0;
453                 v->update_pending = 1;
454         }
455         spin_unlock(&vcpu->arch.vpa_update_lock);
456         return 0;
457 }
458
459 /* Length for a per-processor buffer is passed in at offset 4 in the buffer */
460 struct reg_vpa {
461         u32 dummy;
462         union {
463                 __be16 hword;
464                 __be32 word;
465         } length;
466 };
467
468 static int vpa_is_registered(struct kvmppc_vpa *vpap)
469 {
470         if (vpap->update_pending)
471                 return vpap->next_gpa != 0;
472         return vpap->pinned_addr != NULL;
473 }
474
475 static unsigned long do_h_register_vpa(struct kvm_vcpu *vcpu,
476                                        unsigned long flags,
477                                        unsigned long vcpuid, unsigned long vpa)
478 {
479         struct kvm *kvm = vcpu->kvm;
480         unsigned long len, nb;
481         void *va;
482         struct kvm_vcpu *tvcpu;
483         int err;
484         int subfunc;
485         struct kvmppc_vpa *vpap;
486
487         tvcpu = kvmppc_find_vcpu(kvm, vcpuid);
488         if (!tvcpu)
489                 return H_PARAMETER;
490
491         subfunc = (flags >> H_VPA_FUNC_SHIFT) & H_VPA_FUNC_MASK;
492         if (subfunc == H_VPA_REG_VPA || subfunc == H_VPA_REG_DTL ||
493             subfunc == H_VPA_REG_SLB) {
494                 /* Registering new area - address must be cache-line aligned */
495                 if ((vpa & (L1_CACHE_BYTES - 1)) || !vpa)
496                         return H_PARAMETER;
497
498                 /* convert logical addr to kernel addr and read length */
499                 va = kvmppc_pin_guest_page(kvm, vpa, &nb);
500                 if (va == NULL)
501                         return H_PARAMETER;
502                 if (subfunc == H_VPA_REG_VPA)
503                         len = be16_to_cpu(((struct reg_vpa *)va)->length.hword);
504                 else
505                         len = be32_to_cpu(((struct reg_vpa *)va)->length.word);
506                 kvmppc_unpin_guest_page(kvm, va, vpa, false);
507
508                 /* Check length */
509                 if (len > nb || len < sizeof(struct reg_vpa))
510                         return H_PARAMETER;
511         } else {
512                 vpa = 0;
513                 len = 0;
514         }
515
516         err = H_PARAMETER;
517         vpap = NULL;
518         spin_lock(&tvcpu->arch.vpa_update_lock);
519
520         switch (subfunc) {
521         case H_VPA_REG_VPA:             /* register VPA */
522                 /*
523                  * The size of our lppaca is 1kB because of the way we align
524                  * it for the guest to avoid crossing a 4kB boundary. We only
525                  * use 640 bytes of the structure though, so we should accept
526                  * clients that set a size of 640.
527                  */
528                 BUILD_BUG_ON(sizeof(struct lppaca) != 640);
529                 if (len < sizeof(struct lppaca))
530                         break;
531                 vpap = &tvcpu->arch.vpa;
532                 err = 0;
533                 break;
534
535         case H_VPA_REG_DTL:             /* register DTL */
536                 if (len < sizeof(struct dtl_entry))
537                         break;
538                 len -= len % sizeof(struct dtl_entry);
539
540                 /* Check that they have previously registered a VPA */
541                 err = H_RESOURCE;
542                 if (!vpa_is_registered(&tvcpu->arch.vpa))
543                         break;
544
545                 vpap = &tvcpu->arch.dtl;
546                 err = 0;
547                 break;
548
549         case H_VPA_REG_SLB:             /* register SLB shadow buffer */
550                 /* Check that they have previously registered a VPA */
551                 err = H_RESOURCE;
552                 if (!vpa_is_registered(&tvcpu->arch.vpa))
553                         break;
554
555                 vpap = &tvcpu->arch.slb_shadow;
556                 err = 0;
557                 break;
558
559         case H_VPA_DEREG_VPA:           /* deregister VPA */
560                 /* Check they don't still have a DTL or SLB buf registered */
561                 err = H_RESOURCE;
562                 if (vpa_is_registered(&tvcpu->arch.dtl) ||
563                     vpa_is_registered(&tvcpu->arch.slb_shadow))
564                         break;
565
566                 vpap = &tvcpu->arch.vpa;
567                 err = 0;
568                 break;
569
570         case H_VPA_DEREG_DTL:           /* deregister DTL */
571                 vpap = &tvcpu->arch.dtl;
572                 err = 0;
573                 break;
574
575         case H_VPA_DEREG_SLB:           /* deregister SLB shadow buffer */
576                 vpap = &tvcpu->arch.slb_shadow;
577                 err = 0;
578                 break;
579         }
580
581         if (vpap) {
582                 vpap->next_gpa = vpa;
583                 vpap->len = len;
584                 vpap->update_pending = 1;
585         }
586
587         spin_unlock(&tvcpu->arch.vpa_update_lock);
588
589         return err;
590 }
591
592 static void kvmppc_update_vpa(struct kvm_vcpu *vcpu, struct kvmppc_vpa *vpap)
593 {
594         struct kvm *kvm = vcpu->kvm;
595         void *va;
596         unsigned long nb;
597         unsigned long gpa;
598
599         /*
600          * We need to pin the page pointed to by vpap->next_gpa,
601          * but we can't call kvmppc_pin_guest_page under the lock
602          * as it does get_user_pages() and down_read().  So we
603          * have to drop the lock, pin the page, then get the lock
604          * again and check that a new area didn't get registered
605          * in the meantime.
606          */
607         for (;;) {
608                 gpa = vpap->next_gpa;
609                 spin_unlock(&vcpu->arch.vpa_update_lock);
610                 va = NULL;
611                 nb = 0;
612                 if (gpa)
613                         va = kvmppc_pin_guest_page(kvm, gpa, &nb);
614                 spin_lock(&vcpu->arch.vpa_update_lock);
615                 if (gpa == vpap->next_gpa)
616                         break;
617                 /* sigh... unpin that one and try again */
618                 if (va)
619                         kvmppc_unpin_guest_page(kvm, va, gpa, false);
620         }
621
622         vpap->update_pending = 0;
623         if (va && nb < vpap->len) {
624                 /*
625                  * If it's now too short, it must be that userspace
626                  * has changed the mappings underlying guest memory,
627                  * so unregister the region.
628                  */
629                 kvmppc_unpin_guest_page(kvm, va, gpa, false);
630                 va = NULL;
631         }
632         if (vpap->pinned_addr)
633                 kvmppc_unpin_guest_page(kvm, vpap->pinned_addr, vpap->gpa,
634                                         vpap->dirty);
635         vpap->gpa = gpa;
636         vpap->pinned_addr = va;
637         vpap->dirty = false;
638         if (va)
639                 vpap->pinned_end = va + vpap->len;
640 }
641
642 static void kvmppc_update_vpas(struct kvm_vcpu *vcpu)
643 {
644         if (!(vcpu->arch.vpa.update_pending ||
645               vcpu->arch.slb_shadow.update_pending ||
646               vcpu->arch.dtl.update_pending))
647                 return;
648
649         spin_lock(&vcpu->arch.vpa_update_lock);
650         if (vcpu->arch.vpa.update_pending) {
651                 kvmppc_update_vpa(vcpu, &vcpu->arch.vpa);
652                 if (vcpu->arch.vpa.pinned_addr)
653                         init_vpa(vcpu, vcpu->arch.vpa.pinned_addr);
654         }
655         if (vcpu->arch.dtl.update_pending) {
656                 kvmppc_update_vpa(vcpu, &vcpu->arch.dtl);
657                 vcpu->arch.dtl_ptr = vcpu->arch.dtl.pinned_addr;
658                 vcpu->arch.dtl_index = 0;
659         }
660         if (vcpu->arch.slb_shadow.update_pending)
661                 kvmppc_update_vpa(vcpu, &vcpu->arch.slb_shadow);
662         spin_unlock(&vcpu->arch.vpa_update_lock);
663 }
664
665 /*
666  * Return the accumulated stolen time for the vcore up until `now'.
667  * The caller should hold the vcore lock.
668  */
669 static u64 vcore_stolen_time(struct kvmppc_vcore *vc, u64 now)
670 {
671         u64 p;
672         unsigned long flags;
673
674         spin_lock_irqsave(&vc->stoltb_lock, flags);
675         p = vc->stolen_tb;
676         if (vc->vcore_state != VCORE_INACTIVE &&
677             vc->preempt_tb != TB_NIL)
678                 p += now - vc->preempt_tb;
679         spin_unlock_irqrestore(&vc->stoltb_lock, flags);
680         return p;
681 }
682
683 static void kvmppc_create_dtl_entry(struct kvm_vcpu *vcpu,
684                                     struct kvmppc_vcore *vc)
685 {
686         struct dtl_entry *dt;
687         struct lppaca *vpa;
688         unsigned long stolen;
689         unsigned long core_stolen;
690         u64 now;
691         unsigned long flags;
692
693         dt = vcpu->arch.dtl_ptr;
694         vpa = vcpu->arch.vpa.pinned_addr;
695         now = mftb();
696         core_stolen = vcore_stolen_time(vc, now);
697         stolen = core_stolen - vcpu->arch.stolen_logged;
698         vcpu->arch.stolen_logged = core_stolen;
699         spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags);
700         stolen += vcpu->arch.busy_stolen;
701         vcpu->arch.busy_stolen = 0;
702         spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags);
703         if (!dt || !vpa)
704                 return;
705         memset(dt, 0, sizeof(struct dtl_entry));
706         dt->dispatch_reason = 7;
707         dt->processor_id = cpu_to_be16(vc->pcpu + vcpu->arch.ptid);
708         dt->timebase = cpu_to_be64(now + vc->tb_offset);
709         dt->enqueue_to_dispatch_time = cpu_to_be32(stolen);
710         dt->srr0 = cpu_to_be64(kvmppc_get_pc(vcpu));
711         dt->srr1 = cpu_to_be64(vcpu->arch.shregs.msr);
712         ++dt;
713         if (dt == vcpu->arch.dtl.pinned_end)
714                 dt = vcpu->arch.dtl.pinned_addr;
715         vcpu->arch.dtl_ptr = dt;
716         /* order writing *dt vs. writing vpa->dtl_idx */
717         smp_wmb();
718         vpa->dtl_idx = cpu_to_be64(++vcpu->arch.dtl_index);
719         vcpu->arch.dtl.dirty = true;
720 }
721
722 /* See if there is a doorbell interrupt pending for a vcpu */
723 static bool kvmppc_doorbell_pending(struct kvm_vcpu *vcpu)
724 {
725         int thr;
726         struct kvmppc_vcore *vc;
727
728         if (vcpu->arch.doorbell_request)
729                 return true;
730         /*
731          * Ensure that the read of vcore->dpdes comes after the read
732          * of vcpu->doorbell_request.  This barrier matches the
733          * lwsync in book3s_hv_rmhandlers.S just before the
734          * fast_guest_return label.
735          */
736         smp_rmb();
737         vc = vcpu->arch.vcore;
738         thr = vcpu->vcpu_id - vc->first_vcpuid;
739         return !!(vc->dpdes & (1 << thr));
740 }
741
742 static bool kvmppc_power8_compatible(struct kvm_vcpu *vcpu)
743 {
744         if (vcpu->arch.vcore->arch_compat >= PVR_ARCH_207)
745                 return true;
746         if ((!vcpu->arch.vcore->arch_compat) &&
747             cpu_has_feature(CPU_FTR_ARCH_207S))
748                 return true;
749         return false;
750 }
751
752 static int kvmppc_h_set_mode(struct kvm_vcpu *vcpu, unsigned long mflags,
753                              unsigned long resource, unsigned long value1,
754                              unsigned long value2)
755 {
756         switch (resource) {
757         case H_SET_MODE_RESOURCE_SET_CIABR:
758                 if (!kvmppc_power8_compatible(vcpu))
759                         return H_P2;
760                 if (value2)
761                         return H_P4;
762                 if (mflags)
763                         return H_UNSUPPORTED_FLAG_START;
764                 /* Guests can't breakpoint the hypervisor */
765                 if ((value1 & CIABR_PRIV) == CIABR_PRIV_HYPER)
766                         return H_P3;
767                 vcpu->arch.ciabr  = value1;
768                 return H_SUCCESS;
769         case H_SET_MODE_RESOURCE_SET_DAWR:
770                 if (!kvmppc_power8_compatible(vcpu))
771                         return H_P2;
772                 if (!ppc_breakpoint_available())
773                         return H_P2;
774                 if (mflags)
775                         return H_UNSUPPORTED_FLAG_START;
776                 if (value2 & DABRX_HYP)
777                         return H_P4;
778                 vcpu->arch.dawr  = value1;
779                 vcpu->arch.dawrx = value2;
780                 return H_SUCCESS;
781         default:
782                 return H_TOO_HARD;
783         }
784 }
785
786 static int kvm_arch_vcpu_yield_to(struct kvm_vcpu *target)
787 {
788         struct kvmppc_vcore *vcore = target->arch.vcore;
789
790         /*
791          * We expect to have been called by the real mode handler
792          * (kvmppc_rm_h_confer()) which would have directly returned
793          * H_SUCCESS if the source vcore wasn't idle (e.g. if it may
794          * have useful work to do and should not confer) so we don't
795          * recheck that here.
796          */
797
798         spin_lock(&vcore->lock);
799         if (target->arch.state == KVMPPC_VCPU_RUNNABLE &&
800             vcore->vcore_state != VCORE_INACTIVE &&
801             vcore->runner)
802                 target = vcore->runner;
803         spin_unlock(&vcore->lock);
804
805         return kvm_vcpu_yield_to(target);
806 }
807
808 static int kvmppc_get_yield_count(struct kvm_vcpu *vcpu)
809 {
810         int yield_count = 0;
811         struct lppaca *lppaca;
812
813         spin_lock(&vcpu->arch.vpa_update_lock);
814         lppaca = (struct lppaca *)vcpu->arch.vpa.pinned_addr;
815         if (lppaca)
816                 yield_count = be32_to_cpu(lppaca->yield_count);
817         spin_unlock(&vcpu->arch.vpa_update_lock);
818         return yield_count;
819 }
820
821 int kvmppc_pseries_do_hcall(struct kvm_vcpu *vcpu)
822 {
823         unsigned long req = kvmppc_get_gpr(vcpu, 3);
824         unsigned long target, ret = H_SUCCESS;
825         int yield_count;
826         struct kvm_vcpu *tvcpu;
827         int idx, rc;
828
829         if (req <= MAX_HCALL_OPCODE &&
830             !test_bit(req/4, vcpu->kvm->arch.enabled_hcalls))
831                 return RESUME_HOST;
832
833         switch (req) {
834         case H_CEDE:
835                 break;
836         case H_PROD:
837                 target = kvmppc_get_gpr(vcpu, 4);
838                 tvcpu = kvmppc_find_vcpu(vcpu->kvm, target);
839                 if (!tvcpu) {
840                         ret = H_PARAMETER;
841                         break;
842                 }
843                 tvcpu->arch.prodded = 1;
844                 smp_mb();
845                 if (tvcpu->arch.ceded)
846                         kvmppc_fast_vcpu_kick_hv(tvcpu);
847                 break;
848         case H_CONFER:
849                 target = kvmppc_get_gpr(vcpu, 4);
850                 if (target == -1)
851                         break;
852                 tvcpu = kvmppc_find_vcpu(vcpu->kvm, target);
853                 if (!tvcpu) {
854                         ret = H_PARAMETER;
855                         break;
856                 }
857                 yield_count = kvmppc_get_gpr(vcpu, 5);
858                 if (kvmppc_get_yield_count(tvcpu) != yield_count)
859                         break;
860                 kvm_arch_vcpu_yield_to(tvcpu);
861                 break;
862         case H_REGISTER_VPA:
863                 ret = do_h_register_vpa(vcpu, kvmppc_get_gpr(vcpu, 4),
864                                         kvmppc_get_gpr(vcpu, 5),
865                                         kvmppc_get_gpr(vcpu, 6));
866                 break;
867         case H_RTAS:
868                 if (list_empty(&vcpu->kvm->arch.rtas_tokens))
869                         return RESUME_HOST;
870
871                 idx = srcu_read_lock(&vcpu->kvm->srcu);
872                 rc = kvmppc_rtas_hcall(vcpu);
873                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
874
875                 if (rc == -ENOENT)
876                         return RESUME_HOST;
877                 else if (rc == 0)
878                         break;
879
880                 /* Send the error out to userspace via KVM_RUN */
881                 return rc;
882         case H_LOGICAL_CI_LOAD:
883                 ret = kvmppc_h_logical_ci_load(vcpu);
884                 if (ret == H_TOO_HARD)
885                         return RESUME_HOST;
886                 break;
887         case H_LOGICAL_CI_STORE:
888                 ret = kvmppc_h_logical_ci_store(vcpu);
889                 if (ret == H_TOO_HARD)
890                         return RESUME_HOST;
891                 break;
892         case H_SET_MODE:
893                 ret = kvmppc_h_set_mode(vcpu, kvmppc_get_gpr(vcpu, 4),
894                                         kvmppc_get_gpr(vcpu, 5),
895                                         kvmppc_get_gpr(vcpu, 6),
896                                         kvmppc_get_gpr(vcpu, 7));
897                 if (ret == H_TOO_HARD)
898                         return RESUME_HOST;
899                 break;
900         case H_XIRR:
901         case H_CPPR:
902         case H_EOI:
903         case H_IPI:
904         case H_IPOLL:
905         case H_XIRR_X:
906                 if (kvmppc_xics_enabled(vcpu)) {
907                         if (xive_enabled()) {
908                                 ret = H_NOT_AVAILABLE;
909                                 return RESUME_GUEST;
910                         }
911                         ret = kvmppc_xics_hcall(vcpu, req);
912                         break;
913                 }
914                 return RESUME_HOST;
915         case H_PUT_TCE:
916                 ret = kvmppc_h_put_tce(vcpu, kvmppc_get_gpr(vcpu, 4),
917                                                 kvmppc_get_gpr(vcpu, 5),
918                                                 kvmppc_get_gpr(vcpu, 6));
919                 if (ret == H_TOO_HARD)
920                         return RESUME_HOST;
921                 break;
922         case H_PUT_TCE_INDIRECT:
923                 ret = kvmppc_h_put_tce_indirect(vcpu, kvmppc_get_gpr(vcpu, 4),
924                                                 kvmppc_get_gpr(vcpu, 5),
925                                                 kvmppc_get_gpr(vcpu, 6),
926                                                 kvmppc_get_gpr(vcpu, 7));
927                 if (ret == H_TOO_HARD)
928                         return RESUME_HOST;
929                 break;
930         case H_STUFF_TCE:
931                 ret = kvmppc_h_stuff_tce(vcpu, kvmppc_get_gpr(vcpu, 4),
932                                                 kvmppc_get_gpr(vcpu, 5),
933                                                 kvmppc_get_gpr(vcpu, 6),
934                                                 kvmppc_get_gpr(vcpu, 7));
935                 if (ret == H_TOO_HARD)
936                         return RESUME_HOST;
937                 break;
938         default:
939                 return RESUME_HOST;
940         }
941         kvmppc_set_gpr(vcpu, 3, ret);
942         vcpu->arch.hcall_needed = 0;
943         return RESUME_GUEST;
944 }
945
946 static int kvmppc_hcall_impl_hv(unsigned long cmd)
947 {
948         switch (cmd) {
949         case H_CEDE:
950         case H_PROD:
951         case H_CONFER:
952         case H_REGISTER_VPA:
953         case H_SET_MODE:
954         case H_LOGICAL_CI_LOAD:
955         case H_LOGICAL_CI_STORE:
956 #ifdef CONFIG_KVM_XICS
957         case H_XIRR:
958         case H_CPPR:
959         case H_EOI:
960         case H_IPI:
961         case H_IPOLL:
962         case H_XIRR_X:
963 #endif
964                 return 1;
965         }
966
967         /* See if it's in the real-mode table */
968         return kvmppc_hcall_impl_hv_realmode(cmd);
969 }
970
971 static int kvmppc_emulate_debug_inst(struct kvm_run *run,
972                                         struct kvm_vcpu *vcpu)
973 {
974         u32 last_inst;
975
976         if (kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst) !=
977                                         EMULATE_DONE) {
978                 /*
979                  * Fetch failed, so return to guest and
980                  * try executing it again.
981                  */
982                 return RESUME_GUEST;
983         }
984
985         if (last_inst == KVMPPC_INST_SW_BREAKPOINT) {
986                 run->exit_reason = KVM_EXIT_DEBUG;
987                 run->debug.arch.address = kvmppc_get_pc(vcpu);
988                 return RESUME_HOST;
989         } else {
990                 kvmppc_core_queue_program(vcpu, SRR1_PROGILL);
991                 return RESUME_GUEST;
992         }
993 }
994
995 static void do_nothing(void *x)
996 {
997 }
998
999 static unsigned long kvmppc_read_dpdes(struct kvm_vcpu *vcpu)
1000 {
1001         int thr, cpu, pcpu, nthreads;
1002         struct kvm_vcpu *v;
1003         unsigned long dpdes;
1004
1005         nthreads = vcpu->kvm->arch.emul_smt_mode;
1006         dpdes = 0;
1007         cpu = vcpu->vcpu_id & ~(nthreads - 1);
1008         for (thr = 0; thr < nthreads; ++thr, ++cpu) {
1009                 v = kvmppc_find_vcpu(vcpu->kvm, cpu);
1010                 if (!v)
1011                         continue;
1012                 /*
1013                  * If the vcpu is currently running on a physical cpu thread,
1014                  * interrupt it in order to pull it out of the guest briefly,
1015                  * which will update its vcore->dpdes value.
1016                  */
1017                 pcpu = READ_ONCE(v->cpu);
1018                 if (pcpu >= 0)
1019                         smp_call_function_single(pcpu, do_nothing, NULL, 1);
1020                 if (kvmppc_doorbell_pending(v))
1021                         dpdes |= 1 << thr;
1022         }
1023         return dpdes;
1024 }
1025
1026 /*
1027  * On POWER9, emulate doorbell-related instructions in order to
1028  * give the guest the illusion of running on a multi-threaded core.
1029  * The instructions emulated are msgsndp, msgclrp, mfspr TIR,
1030  * and mfspr DPDES.
1031  */
1032 static int kvmppc_emulate_doorbell_instr(struct kvm_vcpu *vcpu)
1033 {
1034         u32 inst, rb, thr;
1035         unsigned long arg;
1036         struct kvm *kvm = vcpu->kvm;
1037         struct kvm_vcpu *tvcpu;
1038
1039         if (kvmppc_get_last_inst(vcpu, INST_GENERIC, &inst) != EMULATE_DONE)
1040                 return RESUME_GUEST;
1041         if (get_op(inst) != 31)
1042                 return EMULATE_FAIL;
1043         rb = get_rb(inst);
1044         thr = vcpu->vcpu_id & (kvm->arch.emul_smt_mode - 1);
1045         switch (get_xop(inst)) {
1046         case OP_31_XOP_MSGSNDP:
1047                 arg = kvmppc_get_gpr(vcpu, rb);
1048                 if (((arg >> 27) & 0xf) != PPC_DBELL_SERVER)
1049                         break;
1050                 arg &= 0x3f;
1051                 if (arg >= kvm->arch.emul_smt_mode)
1052                         break;
1053                 tvcpu = kvmppc_find_vcpu(kvm, vcpu->vcpu_id - thr + arg);
1054                 if (!tvcpu)
1055                         break;
1056                 if (!tvcpu->arch.doorbell_request) {
1057                         tvcpu->arch.doorbell_request = 1;
1058                         kvmppc_fast_vcpu_kick_hv(tvcpu);
1059                 }
1060                 break;
1061         case OP_31_XOP_MSGCLRP:
1062                 arg = kvmppc_get_gpr(vcpu, rb);
1063                 if (((arg >> 27) & 0xf) != PPC_DBELL_SERVER)
1064                         break;
1065                 vcpu->arch.vcore->dpdes = 0;
1066                 vcpu->arch.doorbell_request = 0;
1067                 break;
1068         case OP_31_XOP_MFSPR:
1069                 switch (get_sprn(inst)) {
1070                 case SPRN_TIR:
1071                         arg = thr;
1072                         break;
1073                 case SPRN_DPDES:
1074                         arg = kvmppc_read_dpdes(vcpu);
1075                         break;
1076                 default:
1077                         return EMULATE_FAIL;
1078                 }
1079                 kvmppc_set_gpr(vcpu, get_rt(inst), arg);
1080                 break;
1081         default:
1082                 return EMULATE_FAIL;
1083         }
1084         kvmppc_set_pc(vcpu, kvmppc_get_pc(vcpu) + 4);
1085         return RESUME_GUEST;
1086 }
1087
1088 /* Called with vcpu->arch.vcore->lock held */
1089 static int kvmppc_handle_exit_hv(struct kvm_run *run, struct kvm_vcpu *vcpu,
1090                                  struct task_struct *tsk)
1091 {
1092         int r = RESUME_HOST;
1093
1094         vcpu->stat.sum_exits++;
1095
1096         /*
1097          * This can happen if an interrupt occurs in the last stages
1098          * of guest entry or the first stages of guest exit (i.e. after
1099          * setting paca->kvm_hstate.in_guest to KVM_GUEST_MODE_GUEST_HV
1100          * and before setting it to KVM_GUEST_MODE_HOST_HV).
1101          * That can happen due to a bug, or due to a machine check
1102          * occurring at just the wrong time.
1103          */
1104         if (vcpu->arch.shregs.msr & MSR_HV) {
1105                 printk(KERN_EMERG "KVM trap in HV mode!\n");
1106                 printk(KERN_EMERG "trap=0x%x | pc=0x%lx | msr=0x%llx\n",
1107                         vcpu->arch.trap, kvmppc_get_pc(vcpu),
1108                         vcpu->arch.shregs.msr);
1109                 kvmppc_dump_regs(vcpu);
1110                 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
1111                 run->hw.hardware_exit_reason = vcpu->arch.trap;
1112                 return RESUME_HOST;
1113         }
1114         run->exit_reason = KVM_EXIT_UNKNOWN;
1115         run->ready_for_interrupt_injection = 1;
1116         switch (vcpu->arch.trap) {
1117         /* We're good on these - the host merely wanted to get our attention */
1118         case BOOK3S_INTERRUPT_HV_DECREMENTER:
1119                 vcpu->stat.dec_exits++;
1120                 r = RESUME_GUEST;
1121                 break;
1122         case BOOK3S_INTERRUPT_EXTERNAL:
1123         case BOOK3S_INTERRUPT_H_DOORBELL:
1124         case BOOK3S_INTERRUPT_H_VIRT:
1125                 vcpu->stat.ext_intr_exits++;
1126                 r = RESUME_GUEST;
1127                 break;
1128         /* SR/HMI/PMI are HV interrupts that host has handled. Resume guest.*/
1129         case BOOK3S_INTERRUPT_HMI:
1130         case BOOK3S_INTERRUPT_PERFMON:
1131         case BOOK3S_INTERRUPT_SYSTEM_RESET:
1132                 r = RESUME_GUEST;
1133                 break;
1134         case BOOK3S_INTERRUPT_MACHINE_CHECK:
1135                 /* Exit to guest with KVM_EXIT_NMI as exit reason */
1136                 run->exit_reason = KVM_EXIT_NMI;
1137                 run->hw.hardware_exit_reason = vcpu->arch.trap;
1138                 /* Clear out the old NMI status from run->flags */
1139                 run->flags &= ~KVM_RUN_PPC_NMI_DISP_MASK;
1140                 /* Now set the NMI status */
1141                 if (vcpu->arch.mce_evt.disposition == MCE_DISPOSITION_RECOVERED)
1142                         run->flags |= KVM_RUN_PPC_NMI_DISP_FULLY_RECOV;
1143                 else
1144                         run->flags |= KVM_RUN_PPC_NMI_DISP_NOT_RECOV;
1145
1146                 r = RESUME_HOST;
1147                 /* Print the MCE event to host console. */
1148                 machine_check_print_event_info(&vcpu->arch.mce_evt, false);
1149                 break;
1150         case BOOK3S_INTERRUPT_PROGRAM:
1151         {
1152                 ulong flags;
1153                 /*
1154                  * Normally program interrupts are delivered directly
1155                  * to the guest by the hardware, but we can get here
1156                  * as a result of a hypervisor emulation interrupt
1157                  * (e40) getting turned into a 700 by BML RTAS.
1158                  */
1159                 flags = vcpu->arch.shregs.msr & 0x1f0000ull;
1160                 kvmppc_core_queue_program(vcpu, flags);
1161                 r = RESUME_GUEST;
1162                 break;
1163         }
1164         case BOOK3S_INTERRUPT_SYSCALL:
1165         {
1166                 /* hcall - punt to userspace */
1167                 int i;
1168
1169                 /* hypercall with MSR_PR has already been handled in rmode,
1170                  * and never reaches here.
1171                  */
1172
1173                 run->papr_hcall.nr = kvmppc_get_gpr(vcpu, 3);
1174                 for (i = 0; i < 9; ++i)
1175                         run->papr_hcall.args[i] = kvmppc_get_gpr(vcpu, 4 + i);
1176                 run->exit_reason = KVM_EXIT_PAPR_HCALL;
1177                 vcpu->arch.hcall_needed = 1;
1178                 r = RESUME_HOST;
1179                 break;
1180         }
1181         /*
1182          * We get these next two if the guest accesses a page which it thinks
1183          * it has mapped but which is not actually present, either because
1184          * it is for an emulated I/O device or because the corresonding
1185          * host page has been paged out.  Any other HDSI/HISI interrupts
1186          * have been handled already.
1187          */
1188         case BOOK3S_INTERRUPT_H_DATA_STORAGE:
1189                 r = RESUME_PAGE_FAULT;
1190                 break;
1191         case BOOK3S_INTERRUPT_H_INST_STORAGE:
1192                 vcpu->arch.fault_dar = kvmppc_get_pc(vcpu);
1193                 vcpu->arch.fault_dsisr = 0;
1194                 r = RESUME_PAGE_FAULT;
1195                 break;
1196         /*
1197          * This occurs if the guest executes an illegal instruction.
1198          * If the guest debug is disabled, generate a program interrupt
1199          * to the guest. If guest debug is enabled, we need to check
1200          * whether the instruction is a software breakpoint instruction.
1201          * Accordingly return to Guest or Host.
1202          */
1203         case BOOK3S_INTERRUPT_H_EMUL_ASSIST:
1204                 if (vcpu->arch.emul_inst != KVM_INST_FETCH_FAILED)
1205                         vcpu->arch.last_inst = kvmppc_need_byteswap(vcpu) ?
1206                                 swab32(vcpu->arch.emul_inst) :
1207                                 vcpu->arch.emul_inst;
1208                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) {
1209                         /* Need vcore unlocked to call kvmppc_get_last_inst */
1210                         spin_unlock(&vcpu->arch.vcore->lock);
1211                         r = kvmppc_emulate_debug_inst(run, vcpu);
1212                         spin_lock(&vcpu->arch.vcore->lock);
1213                 } else {
1214                         kvmppc_core_queue_program(vcpu, SRR1_PROGILL);
1215                         r = RESUME_GUEST;
1216                 }
1217                 break;
1218         /*
1219          * This occurs if the guest (kernel or userspace), does something that
1220          * is prohibited by HFSCR.
1221          * On POWER9, this could be a doorbell instruction that we need
1222          * to emulate.
1223          * Otherwise, we just generate a program interrupt to the guest.
1224          */
1225         case BOOK3S_INTERRUPT_H_FAC_UNAVAIL:
1226                 r = EMULATE_FAIL;
1227                 if (((vcpu->arch.hfscr >> 56) == FSCR_MSGP_LG) &&
1228                     cpu_has_feature(CPU_FTR_ARCH_300)) {
1229                         /* Need vcore unlocked to call kvmppc_get_last_inst */
1230                         spin_unlock(&vcpu->arch.vcore->lock);
1231                         r = kvmppc_emulate_doorbell_instr(vcpu);
1232                         spin_lock(&vcpu->arch.vcore->lock);
1233                 }
1234                 if (r == EMULATE_FAIL) {
1235                         kvmppc_core_queue_program(vcpu, SRR1_PROGILL);
1236                         r = RESUME_GUEST;
1237                 }
1238                 break;
1239
1240 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1241         case BOOK3S_INTERRUPT_HV_SOFTPATCH:
1242                 /*
1243                  * This occurs for various TM-related instructions that
1244                  * we need to emulate on POWER9 DD2.2.  We have already
1245                  * handled the cases where the guest was in real-suspend
1246                  * mode and was transitioning to transactional state.
1247                  */
1248                 r = kvmhv_p9_tm_emulation(vcpu);
1249                 break;
1250 #endif
1251
1252         case BOOK3S_INTERRUPT_HV_RM_HARD:
1253                 r = RESUME_PASSTHROUGH;
1254                 break;
1255         default:
1256                 kvmppc_dump_regs(vcpu);
1257                 printk(KERN_EMERG "trap=0x%x | pc=0x%lx | msr=0x%llx\n",
1258                         vcpu->arch.trap, kvmppc_get_pc(vcpu),
1259                         vcpu->arch.shregs.msr);
1260                 run->hw.hardware_exit_reason = vcpu->arch.trap;
1261                 r = RESUME_HOST;
1262                 break;
1263         }
1264
1265         return r;
1266 }
1267
1268 static int kvm_arch_vcpu_ioctl_get_sregs_hv(struct kvm_vcpu *vcpu,
1269                                             struct kvm_sregs *sregs)
1270 {
1271         int i;
1272
1273         memset(sregs, 0, sizeof(struct kvm_sregs));
1274         sregs->pvr = vcpu->arch.pvr;
1275         for (i = 0; i < vcpu->arch.slb_max; i++) {
1276                 sregs->u.s.ppc64.slb[i].slbe = vcpu->arch.slb[i].orige;
1277                 sregs->u.s.ppc64.slb[i].slbv = vcpu->arch.slb[i].origv;
1278         }
1279
1280         return 0;
1281 }
1282
1283 static int kvm_arch_vcpu_ioctl_set_sregs_hv(struct kvm_vcpu *vcpu,
1284                                             struct kvm_sregs *sregs)
1285 {
1286         int i, j;
1287
1288         /* Only accept the same PVR as the host's, since we can't spoof it */
1289         if (sregs->pvr != vcpu->arch.pvr)
1290                 return -EINVAL;
1291
1292         j = 0;
1293         for (i = 0; i < vcpu->arch.slb_nr; i++) {
1294                 if (sregs->u.s.ppc64.slb[i].slbe & SLB_ESID_V) {
1295                         vcpu->arch.slb[j].orige = sregs->u.s.ppc64.slb[i].slbe;
1296                         vcpu->arch.slb[j].origv = sregs->u.s.ppc64.slb[i].slbv;
1297                         ++j;
1298                 }
1299         }
1300         vcpu->arch.slb_max = j;
1301
1302         return 0;
1303 }
1304
1305 static void kvmppc_set_lpcr(struct kvm_vcpu *vcpu, u64 new_lpcr,
1306                 bool preserve_top32)
1307 {
1308         struct kvm *kvm = vcpu->kvm;
1309         struct kvmppc_vcore *vc = vcpu->arch.vcore;
1310         u64 mask;
1311
1312         mutex_lock(&kvm->lock);
1313         spin_lock(&vc->lock);
1314         /*
1315          * If ILE (interrupt little-endian) has changed, update the
1316          * MSR_LE bit in the intr_msr for each vcpu in this vcore.
1317          */
1318         if ((new_lpcr & LPCR_ILE) != (vc->lpcr & LPCR_ILE)) {
1319                 struct kvm_vcpu *vcpu;
1320                 int i;
1321
1322                 kvm_for_each_vcpu(i, vcpu, kvm) {
1323                         if (vcpu->arch.vcore != vc)
1324                                 continue;
1325                         if (new_lpcr & LPCR_ILE)
1326                                 vcpu->arch.intr_msr |= MSR_LE;
1327                         else
1328                                 vcpu->arch.intr_msr &= ~MSR_LE;
1329                 }
1330         }
1331
1332         /*
1333          * Userspace can only modify DPFD (default prefetch depth),
1334          * ILE (interrupt little-endian) and TC (translation control).
1335          * On POWER8 and POWER9 userspace can also modify AIL (alt. interrupt loc.).
1336          */
1337         mask = LPCR_DPFD | LPCR_ILE | LPCR_TC;
1338         if (cpu_has_feature(CPU_FTR_ARCH_207S))
1339                 mask |= LPCR_AIL;
1340         /*
1341          * On POWER9, allow userspace to enable large decrementer for the
1342          * guest, whether or not the host has it enabled.
1343          */
1344         if (cpu_has_feature(CPU_FTR_ARCH_300))
1345                 mask |= LPCR_LD;
1346
1347         /* Broken 32-bit version of LPCR must not clear top bits */
1348         if (preserve_top32)
1349                 mask &= 0xFFFFFFFF;
1350         vc->lpcr = (vc->lpcr & ~mask) | (new_lpcr & mask);
1351         spin_unlock(&vc->lock);
1352         mutex_unlock(&kvm->lock);
1353 }
1354
1355 static int kvmppc_get_one_reg_hv(struct kvm_vcpu *vcpu, u64 id,
1356                                  union kvmppc_one_reg *val)
1357 {
1358         int r = 0;
1359         long int i;
1360
1361         switch (id) {
1362         case KVM_REG_PPC_DEBUG_INST:
1363                 *val = get_reg_val(id, KVMPPC_INST_SW_BREAKPOINT);
1364                 break;
1365         case KVM_REG_PPC_HIOR:
1366                 *val = get_reg_val(id, 0);
1367                 break;
1368         case KVM_REG_PPC_DABR:
1369                 *val = get_reg_val(id, vcpu->arch.dabr);
1370                 break;
1371         case KVM_REG_PPC_DABRX:
1372                 *val = get_reg_val(id, vcpu->arch.dabrx);
1373                 break;
1374         case KVM_REG_PPC_DSCR:
1375                 *val = get_reg_val(id, vcpu->arch.dscr);
1376                 break;
1377         case KVM_REG_PPC_PURR:
1378                 *val = get_reg_val(id, vcpu->arch.purr);
1379                 break;
1380         case KVM_REG_PPC_SPURR:
1381                 *val = get_reg_val(id, vcpu->arch.spurr);
1382                 break;
1383         case KVM_REG_PPC_AMR:
1384                 *val = get_reg_val(id, vcpu->arch.amr);
1385                 break;
1386         case KVM_REG_PPC_UAMOR:
1387                 *val = get_reg_val(id, vcpu->arch.uamor);
1388                 break;
1389         case KVM_REG_PPC_MMCR0 ... KVM_REG_PPC_MMCRS:
1390                 i = id - KVM_REG_PPC_MMCR0;
1391                 *val = get_reg_val(id, vcpu->arch.mmcr[i]);
1392                 break;
1393         case KVM_REG_PPC_PMC1 ... KVM_REG_PPC_PMC8:
1394                 i = id - KVM_REG_PPC_PMC1;
1395                 *val = get_reg_val(id, vcpu->arch.pmc[i]);
1396                 break;
1397         case KVM_REG_PPC_SPMC1 ... KVM_REG_PPC_SPMC2:
1398                 i = id - KVM_REG_PPC_SPMC1;
1399                 *val = get_reg_val(id, vcpu->arch.spmc[i]);
1400                 break;
1401         case KVM_REG_PPC_SIAR:
1402                 *val = get_reg_val(id, vcpu->arch.siar);
1403                 break;
1404         case KVM_REG_PPC_SDAR:
1405                 *val = get_reg_val(id, vcpu->arch.sdar);
1406                 break;
1407         case KVM_REG_PPC_SIER:
1408                 *val = get_reg_val(id, vcpu->arch.sier);
1409                 break;
1410         case KVM_REG_PPC_IAMR:
1411                 *val = get_reg_val(id, vcpu->arch.iamr);
1412                 break;
1413         case KVM_REG_PPC_PSPB:
1414                 *val = get_reg_val(id, vcpu->arch.pspb);
1415                 break;
1416         case KVM_REG_PPC_DPDES:
1417                 *val = get_reg_val(id, vcpu->arch.vcore->dpdes);
1418                 break;
1419         case KVM_REG_PPC_VTB:
1420                 *val = get_reg_val(id, vcpu->arch.vcore->vtb);
1421                 break;
1422         case KVM_REG_PPC_DAWR:
1423                 *val = get_reg_val(id, vcpu->arch.dawr);
1424                 break;
1425         case KVM_REG_PPC_DAWRX:
1426                 *val = get_reg_val(id, vcpu->arch.dawrx);
1427                 break;
1428         case KVM_REG_PPC_CIABR:
1429                 *val = get_reg_val(id, vcpu->arch.ciabr);
1430                 break;
1431         case KVM_REG_PPC_CSIGR:
1432                 *val = get_reg_val(id, vcpu->arch.csigr);
1433                 break;
1434         case KVM_REG_PPC_TACR:
1435                 *val = get_reg_val(id, vcpu->arch.tacr);
1436                 break;
1437         case KVM_REG_PPC_TCSCR:
1438                 *val = get_reg_val(id, vcpu->arch.tcscr);
1439                 break;
1440         case KVM_REG_PPC_PID:
1441                 *val = get_reg_val(id, vcpu->arch.pid);
1442                 break;
1443         case KVM_REG_PPC_ACOP:
1444                 *val = get_reg_val(id, vcpu->arch.acop);
1445                 break;
1446         case KVM_REG_PPC_WORT:
1447                 *val = get_reg_val(id, vcpu->arch.wort);
1448                 break;
1449         case KVM_REG_PPC_TIDR:
1450                 *val = get_reg_val(id, vcpu->arch.tid);
1451                 break;
1452         case KVM_REG_PPC_PSSCR:
1453                 *val = get_reg_val(id, vcpu->arch.psscr);
1454                 break;
1455         case KVM_REG_PPC_VPA_ADDR:
1456                 spin_lock(&vcpu->arch.vpa_update_lock);
1457                 *val = get_reg_val(id, vcpu->arch.vpa.next_gpa);
1458                 spin_unlock(&vcpu->arch.vpa_update_lock);
1459                 break;
1460         case KVM_REG_PPC_VPA_SLB:
1461                 spin_lock(&vcpu->arch.vpa_update_lock);
1462                 val->vpaval.addr = vcpu->arch.slb_shadow.next_gpa;
1463                 val->vpaval.length = vcpu->arch.slb_shadow.len;
1464                 spin_unlock(&vcpu->arch.vpa_update_lock);
1465                 break;
1466         case KVM_REG_PPC_VPA_DTL:
1467                 spin_lock(&vcpu->arch.vpa_update_lock);
1468                 val->vpaval.addr = vcpu->arch.dtl.next_gpa;
1469                 val->vpaval.length = vcpu->arch.dtl.len;
1470                 spin_unlock(&vcpu->arch.vpa_update_lock);
1471                 break;
1472         case KVM_REG_PPC_TB_OFFSET:
1473                 *val = get_reg_val(id, vcpu->arch.vcore->tb_offset);
1474                 break;
1475         case KVM_REG_PPC_LPCR:
1476         case KVM_REG_PPC_LPCR_64:
1477                 *val = get_reg_val(id, vcpu->arch.vcore->lpcr);
1478                 break;
1479         case KVM_REG_PPC_PPR:
1480                 *val = get_reg_val(id, vcpu->arch.ppr);
1481                 break;
1482 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1483         case KVM_REG_PPC_TFHAR:
1484                 *val = get_reg_val(id, vcpu->arch.tfhar);
1485                 break;
1486         case KVM_REG_PPC_TFIAR:
1487                 *val = get_reg_val(id, vcpu->arch.tfiar);
1488                 break;
1489         case KVM_REG_PPC_TEXASR:
1490                 *val = get_reg_val(id, vcpu->arch.texasr);
1491                 break;
1492         case KVM_REG_PPC_TM_GPR0 ... KVM_REG_PPC_TM_GPR31:
1493                 i = id - KVM_REG_PPC_TM_GPR0;
1494                 *val = get_reg_val(id, vcpu->arch.gpr_tm[i]);
1495                 break;
1496         case KVM_REG_PPC_TM_VSR0 ... KVM_REG_PPC_TM_VSR63:
1497         {
1498                 int j;
1499                 i = id - KVM_REG_PPC_TM_VSR0;
1500                 if (i < 32)
1501                         for (j = 0; j < TS_FPRWIDTH; j++)
1502                                 val->vsxval[j] = vcpu->arch.fp_tm.fpr[i][j];
1503                 else {
1504                         if (cpu_has_feature(CPU_FTR_ALTIVEC))
1505                                 val->vval = vcpu->arch.vr_tm.vr[i-32];
1506                         else
1507                                 r = -ENXIO;
1508                 }
1509                 break;
1510         }
1511         case KVM_REG_PPC_TM_CR:
1512                 *val = get_reg_val(id, vcpu->arch.cr_tm);
1513                 break;
1514         case KVM_REG_PPC_TM_XER:
1515                 *val = get_reg_val(id, vcpu->arch.xer_tm);
1516                 break;
1517         case KVM_REG_PPC_TM_LR:
1518                 *val = get_reg_val(id, vcpu->arch.lr_tm);
1519                 break;
1520         case KVM_REG_PPC_TM_CTR:
1521                 *val = get_reg_val(id, vcpu->arch.ctr_tm);
1522                 break;
1523         case KVM_REG_PPC_TM_FPSCR:
1524                 *val = get_reg_val(id, vcpu->arch.fp_tm.fpscr);
1525                 break;
1526         case KVM_REG_PPC_TM_AMR:
1527                 *val = get_reg_val(id, vcpu->arch.amr_tm);
1528                 break;
1529         case KVM_REG_PPC_TM_PPR:
1530                 *val = get_reg_val(id, vcpu->arch.ppr_tm);
1531                 break;
1532         case KVM_REG_PPC_TM_VRSAVE:
1533                 *val = get_reg_val(id, vcpu->arch.vrsave_tm);
1534                 break;
1535         case KVM_REG_PPC_TM_VSCR:
1536                 if (cpu_has_feature(CPU_FTR_ALTIVEC))
1537                         *val = get_reg_val(id, vcpu->arch.vr_tm.vscr.u[3]);
1538                 else
1539                         r = -ENXIO;
1540                 break;
1541         case KVM_REG_PPC_TM_DSCR:
1542                 *val = get_reg_val(id, vcpu->arch.dscr_tm);
1543                 break;
1544         case KVM_REG_PPC_TM_TAR:
1545                 *val = get_reg_val(id, vcpu->arch.tar_tm);
1546                 break;
1547 #endif
1548         case KVM_REG_PPC_ARCH_COMPAT:
1549                 *val = get_reg_val(id, vcpu->arch.vcore->arch_compat);
1550                 break;
1551         case KVM_REG_PPC_DEC_EXPIRY:
1552                 *val = get_reg_val(id, vcpu->arch.dec_expires +
1553                                    vcpu->arch.vcore->tb_offset);
1554                 break;
1555         case KVM_REG_PPC_ONLINE:
1556                 *val = get_reg_val(id, vcpu->arch.online);
1557                 break;
1558         default:
1559                 r = -EINVAL;
1560                 break;
1561         }
1562
1563         return r;
1564 }
1565
1566 static int kvmppc_set_one_reg_hv(struct kvm_vcpu *vcpu, u64 id,
1567                                  union kvmppc_one_reg *val)
1568 {
1569         int r = 0;
1570         long int i;
1571         unsigned long addr, len;
1572
1573         switch (id) {
1574         case KVM_REG_PPC_HIOR:
1575                 /* Only allow this to be set to zero */
1576                 if (set_reg_val(id, *val))
1577                         r = -EINVAL;
1578                 break;
1579         case KVM_REG_PPC_DABR:
1580                 vcpu->arch.dabr = set_reg_val(id, *val);
1581                 break;
1582         case KVM_REG_PPC_DABRX:
1583                 vcpu->arch.dabrx = set_reg_val(id, *val) & ~DABRX_HYP;
1584                 break;
1585         case KVM_REG_PPC_DSCR:
1586                 vcpu->arch.dscr = set_reg_val(id, *val);
1587                 break;
1588         case KVM_REG_PPC_PURR:
1589                 vcpu->arch.purr = set_reg_val(id, *val);
1590                 break;
1591         case KVM_REG_PPC_SPURR:
1592                 vcpu->arch.spurr = set_reg_val(id, *val);
1593                 break;
1594         case KVM_REG_PPC_AMR:
1595                 vcpu->arch.amr = set_reg_val(id, *val);
1596                 break;
1597         case KVM_REG_PPC_UAMOR:
1598                 vcpu->arch.uamor = set_reg_val(id, *val);
1599                 break;
1600         case KVM_REG_PPC_MMCR0 ... KVM_REG_PPC_MMCRS:
1601                 i = id - KVM_REG_PPC_MMCR0;
1602                 vcpu->arch.mmcr[i] = set_reg_val(id, *val);
1603                 break;
1604         case KVM_REG_PPC_PMC1 ... KVM_REG_PPC_PMC8:
1605                 i = id - KVM_REG_PPC_PMC1;
1606                 vcpu->arch.pmc[i] = set_reg_val(id, *val);
1607                 break;
1608         case KVM_REG_PPC_SPMC1 ... KVM_REG_PPC_SPMC2:
1609                 i = id - KVM_REG_PPC_SPMC1;
1610                 vcpu->arch.spmc[i] = set_reg_val(id, *val);
1611                 break;
1612         case KVM_REG_PPC_SIAR:
1613                 vcpu->arch.siar = set_reg_val(id, *val);
1614                 break;
1615         case KVM_REG_PPC_SDAR:
1616                 vcpu->arch.sdar = set_reg_val(id, *val);
1617                 break;
1618         case KVM_REG_PPC_SIER:
1619                 vcpu->arch.sier = set_reg_val(id, *val);
1620                 break;
1621         case KVM_REG_PPC_IAMR:
1622                 vcpu->arch.iamr = set_reg_val(id, *val);
1623                 break;
1624         case KVM_REG_PPC_PSPB:
1625                 vcpu->arch.pspb = set_reg_val(id, *val);
1626                 break;
1627         case KVM_REG_PPC_DPDES:
1628                 vcpu->arch.vcore->dpdes = set_reg_val(id, *val);
1629                 break;
1630         case KVM_REG_PPC_VTB:
1631                 vcpu->arch.vcore->vtb = set_reg_val(id, *val);
1632                 break;
1633         case KVM_REG_PPC_DAWR:
1634                 vcpu->arch.dawr = set_reg_val(id, *val);
1635                 break;
1636         case KVM_REG_PPC_DAWRX:
1637                 vcpu->arch.dawrx = set_reg_val(id, *val) & ~DAWRX_HYP;
1638                 break;
1639         case KVM_REG_PPC_CIABR:
1640                 vcpu->arch.ciabr = set_reg_val(id, *val);
1641                 /* Don't allow setting breakpoints in hypervisor code */
1642                 if ((vcpu->arch.ciabr & CIABR_PRIV) == CIABR_PRIV_HYPER)
1643                         vcpu->arch.ciabr &= ~CIABR_PRIV;        /* disable */
1644                 break;
1645         case KVM_REG_PPC_CSIGR:
1646                 vcpu->arch.csigr = set_reg_val(id, *val);
1647                 break;
1648         case KVM_REG_PPC_TACR:
1649                 vcpu->arch.tacr = set_reg_val(id, *val);
1650                 break;
1651         case KVM_REG_PPC_TCSCR:
1652                 vcpu->arch.tcscr = set_reg_val(id, *val);
1653                 break;
1654         case KVM_REG_PPC_PID:
1655                 vcpu->arch.pid = set_reg_val(id, *val);
1656                 break;
1657         case KVM_REG_PPC_ACOP:
1658                 vcpu->arch.acop = set_reg_val(id, *val);
1659                 break;
1660         case KVM_REG_PPC_WORT:
1661                 vcpu->arch.wort = set_reg_val(id, *val);
1662                 break;
1663         case KVM_REG_PPC_TIDR:
1664                 vcpu->arch.tid = set_reg_val(id, *val);
1665                 break;
1666         case KVM_REG_PPC_PSSCR:
1667                 vcpu->arch.psscr = set_reg_val(id, *val) & PSSCR_GUEST_VIS;
1668                 break;
1669         case KVM_REG_PPC_VPA_ADDR:
1670                 addr = set_reg_val(id, *val);
1671                 r = -EINVAL;
1672                 if (!addr && (vcpu->arch.slb_shadow.next_gpa ||
1673                               vcpu->arch.dtl.next_gpa))
1674                         break;
1675                 r = set_vpa(vcpu, &vcpu->arch.vpa, addr, sizeof(struct lppaca));
1676                 break;
1677         case KVM_REG_PPC_VPA_SLB:
1678                 addr = val->vpaval.addr;
1679                 len = val->vpaval.length;
1680                 r = -EINVAL;
1681                 if (addr && !vcpu->arch.vpa.next_gpa)
1682                         break;
1683                 r = set_vpa(vcpu, &vcpu->arch.slb_shadow, addr, len);
1684                 break;
1685         case KVM_REG_PPC_VPA_DTL:
1686                 addr = val->vpaval.addr;
1687                 len = val->vpaval.length;
1688                 r = -EINVAL;
1689                 if (addr && (len < sizeof(struct dtl_entry) ||
1690                              !vcpu->arch.vpa.next_gpa))
1691                         break;
1692                 len -= len % sizeof(struct dtl_entry);
1693                 r = set_vpa(vcpu, &vcpu->arch.dtl, addr, len);
1694                 break;
1695         case KVM_REG_PPC_TB_OFFSET:
1696                 /*
1697                  * POWER9 DD1 has an erratum where writing TBU40 causes
1698                  * the timebase to lose ticks.  So we don't let the
1699                  * timebase offset be changed on P9 DD1.  (It is
1700                  * initialized to zero.)
1701                  */
1702                 if (cpu_has_feature(CPU_FTR_POWER9_DD1))
1703                         break;
1704                 /* round up to multiple of 2^24 */
1705                 vcpu->arch.vcore->tb_offset =
1706                         ALIGN(set_reg_val(id, *val), 1UL << 24);
1707                 break;
1708         case KVM_REG_PPC_LPCR:
1709                 kvmppc_set_lpcr(vcpu, set_reg_val(id, *val), true);
1710                 break;
1711         case KVM_REG_PPC_LPCR_64:
1712                 kvmppc_set_lpcr(vcpu, set_reg_val(id, *val), false);
1713                 break;
1714         case KVM_REG_PPC_PPR:
1715                 vcpu->arch.ppr = set_reg_val(id, *val);
1716                 break;
1717 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1718         case KVM_REG_PPC_TFHAR:
1719                 vcpu->arch.tfhar = set_reg_val(id, *val);
1720                 break;
1721         case KVM_REG_PPC_TFIAR:
1722                 vcpu->arch.tfiar = set_reg_val(id, *val);
1723                 break;
1724         case KVM_REG_PPC_TEXASR:
1725                 vcpu->arch.texasr = set_reg_val(id, *val);
1726                 break;
1727         case KVM_REG_PPC_TM_GPR0 ... KVM_REG_PPC_TM_GPR31:
1728                 i = id - KVM_REG_PPC_TM_GPR0;
1729                 vcpu->arch.gpr_tm[i] = set_reg_val(id, *val);
1730                 break;
1731         case KVM_REG_PPC_TM_VSR0 ... KVM_REG_PPC_TM_VSR63:
1732         {
1733                 int j;
1734                 i = id - KVM_REG_PPC_TM_VSR0;
1735                 if (i < 32)
1736                         for (j = 0; j < TS_FPRWIDTH; j++)
1737                                 vcpu->arch.fp_tm.fpr[i][j] = val->vsxval[j];
1738                 else
1739                         if (cpu_has_feature(CPU_FTR_ALTIVEC))
1740                                 vcpu->arch.vr_tm.vr[i-32] = val->vval;
1741                         else
1742                                 r = -ENXIO;
1743                 break;
1744         }
1745         case KVM_REG_PPC_TM_CR:
1746                 vcpu->arch.cr_tm = set_reg_val(id, *val);
1747                 break;
1748         case KVM_REG_PPC_TM_XER:
1749                 vcpu->arch.xer_tm = set_reg_val(id, *val);
1750                 break;
1751         case KVM_REG_PPC_TM_LR:
1752                 vcpu->arch.lr_tm = set_reg_val(id, *val);
1753                 break;
1754         case KVM_REG_PPC_TM_CTR:
1755                 vcpu->arch.ctr_tm = set_reg_val(id, *val);
1756                 break;
1757         case KVM_REG_PPC_TM_FPSCR:
1758                 vcpu->arch.fp_tm.fpscr = set_reg_val(id, *val);
1759                 break;
1760         case KVM_REG_PPC_TM_AMR:
1761                 vcpu->arch.amr_tm = set_reg_val(id, *val);
1762                 break;
1763         case KVM_REG_PPC_TM_PPR:
1764                 vcpu->arch.ppr_tm = set_reg_val(id, *val);
1765                 break;
1766         case KVM_REG_PPC_TM_VRSAVE:
1767                 vcpu->arch.vrsave_tm = set_reg_val(id, *val);
1768                 break;
1769         case KVM_REG_PPC_TM_VSCR:
1770                 if (cpu_has_feature(CPU_FTR_ALTIVEC))
1771                         vcpu->arch.vr.vscr.u[3] = set_reg_val(id, *val);
1772                 else
1773                         r = - ENXIO;
1774                 break;
1775         case KVM_REG_PPC_TM_DSCR:
1776                 vcpu->arch.dscr_tm = set_reg_val(id, *val);
1777                 break;
1778         case KVM_REG_PPC_TM_TAR:
1779                 vcpu->arch.tar_tm = set_reg_val(id, *val);
1780                 break;
1781 #endif
1782         case KVM_REG_PPC_ARCH_COMPAT:
1783                 r = kvmppc_set_arch_compat(vcpu, set_reg_val(id, *val));
1784                 break;
1785         case KVM_REG_PPC_DEC_EXPIRY:
1786                 vcpu->arch.dec_expires = set_reg_val(id, *val) -
1787                         vcpu->arch.vcore->tb_offset;
1788                 break;
1789         case KVM_REG_PPC_ONLINE:
1790                 i = set_reg_val(id, *val);
1791                 if (i && !vcpu->arch.online)
1792                         atomic_inc(&vcpu->arch.vcore->online_count);
1793                 else if (!i && vcpu->arch.online)
1794                         atomic_dec(&vcpu->arch.vcore->online_count);
1795                 vcpu->arch.online = i;
1796                 break;
1797         default:
1798                 r = -EINVAL;
1799                 break;
1800         }
1801
1802         return r;
1803 }
1804
1805 /*
1806  * On POWER9, threads are independent and can be in different partitions.
1807  * Therefore we consider each thread to be a subcore.
1808  * There is a restriction that all threads have to be in the same
1809  * MMU mode (radix or HPT), unfortunately, but since we only support
1810  * HPT guests on a HPT host so far, that isn't an impediment yet.
1811  */
1812 static int threads_per_vcore(struct kvm *kvm)
1813 {
1814         if (kvm->arch.threads_indep)
1815                 return 1;
1816         return threads_per_subcore;
1817 }
1818
1819 static struct kvmppc_vcore *kvmppc_vcore_create(struct kvm *kvm, int core)
1820 {
1821         struct kvmppc_vcore *vcore;
1822
1823         vcore = kzalloc(sizeof(struct kvmppc_vcore), GFP_KERNEL);
1824
1825         if (vcore == NULL)
1826                 return NULL;
1827
1828         spin_lock_init(&vcore->lock);
1829         spin_lock_init(&vcore->stoltb_lock);
1830         init_swait_queue_head(&vcore->wq);
1831         vcore->preempt_tb = TB_NIL;
1832         vcore->lpcr = kvm->arch.lpcr;
1833         vcore->first_vcpuid = core * kvm->arch.smt_mode;
1834         vcore->kvm = kvm;
1835         INIT_LIST_HEAD(&vcore->preempt_list);
1836
1837         return vcore;
1838 }
1839
1840 #ifdef CONFIG_KVM_BOOK3S_HV_EXIT_TIMING
1841 static struct debugfs_timings_element {
1842         const char *name;
1843         size_t offset;
1844 } timings[] = {
1845         {"rm_entry",    offsetof(struct kvm_vcpu, arch.rm_entry)},
1846         {"rm_intr",     offsetof(struct kvm_vcpu, arch.rm_intr)},
1847         {"rm_exit",     offsetof(struct kvm_vcpu, arch.rm_exit)},
1848         {"guest",       offsetof(struct kvm_vcpu, arch.guest_time)},
1849         {"cede",        offsetof(struct kvm_vcpu, arch.cede_time)},
1850 };
1851
1852 #define N_TIMINGS       (ARRAY_SIZE(timings))
1853
1854 struct debugfs_timings_state {
1855         struct kvm_vcpu *vcpu;
1856         unsigned int    buflen;
1857         char            buf[N_TIMINGS * 100];
1858 };
1859
1860 static int debugfs_timings_open(struct inode *inode, struct file *file)
1861 {
1862         struct kvm_vcpu *vcpu = inode->i_private;
1863         struct debugfs_timings_state *p;
1864
1865         p = kzalloc(sizeof(*p), GFP_KERNEL);
1866         if (!p)
1867                 return -ENOMEM;
1868
1869         kvm_get_kvm(vcpu->kvm);
1870         p->vcpu = vcpu;
1871         file->private_data = p;
1872
1873         return nonseekable_open(inode, file);
1874 }
1875
1876 static int debugfs_timings_release(struct inode *inode, struct file *file)
1877 {
1878         struct debugfs_timings_state *p = file->private_data;
1879
1880         kvm_put_kvm(p->vcpu->kvm);
1881         kfree(p);
1882         return 0;
1883 }
1884
1885 static ssize_t debugfs_timings_read(struct file *file, char __user *buf,
1886                                     size_t len, loff_t *ppos)
1887 {
1888         struct debugfs_timings_state *p = file->private_data;
1889         struct kvm_vcpu *vcpu = p->vcpu;
1890         char *s, *buf_end;
1891         struct kvmhv_tb_accumulator tb;
1892         u64 count;
1893         loff_t pos;
1894         ssize_t n;
1895         int i, loops;
1896         bool ok;
1897
1898         if (!p->buflen) {
1899                 s = p->buf;
1900                 buf_end = s + sizeof(p->buf);
1901                 for (i = 0; i < N_TIMINGS; ++i) {
1902                         struct kvmhv_tb_accumulator *acc;
1903
1904                         acc = (struct kvmhv_tb_accumulator *)
1905                                 ((unsigned long)vcpu + timings[i].offset);
1906                         ok = false;
1907                         for (loops = 0; loops < 1000; ++loops) {
1908                                 count = acc->seqcount;
1909                                 if (!(count & 1)) {
1910                                         smp_rmb();
1911                                         tb = *acc;
1912                                         smp_rmb();
1913                                         if (count == acc->seqcount) {
1914                                                 ok = true;
1915                                                 break;
1916                                         }
1917                                 }
1918                                 udelay(1);
1919                         }
1920                         if (!ok)
1921                                 snprintf(s, buf_end - s, "%s: stuck\n",
1922                                         timings[i].name);
1923                         else
1924                                 snprintf(s, buf_end - s,
1925                                         "%s: %llu %llu %llu %llu\n",
1926                                         timings[i].name, count / 2,
1927                                         tb_to_ns(tb.tb_total),
1928                                         tb_to_ns(tb.tb_min),
1929                                         tb_to_ns(tb.tb_max));
1930                         s += strlen(s);
1931                 }
1932                 p->buflen = s - p->buf;
1933         }
1934
1935         pos = *ppos;
1936         if (pos >= p->buflen)
1937                 return 0;
1938         if (len > p->buflen - pos)
1939                 len = p->buflen - pos;
1940         n = copy_to_user(buf, p->buf + pos, len);
1941         if (n) {
1942                 if (n == len)
1943                         return -EFAULT;
1944                 len -= n;
1945         }
1946         *ppos = pos + len;
1947         return len;
1948 }
1949
1950 static ssize_t debugfs_timings_write(struct file *file, const char __user *buf,
1951                                      size_t len, loff_t *ppos)
1952 {
1953         return -EACCES;
1954 }
1955
1956 static const struct file_operations debugfs_timings_ops = {
1957         .owner   = THIS_MODULE,
1958         .open    = debugfs_timings_open,
1959         .release = debugfs_timings_release,
1960         .read    = debugfs_timings_read,
1961         .write   = debugfs_timings_write,
1962         .llseek  = generic_file_llseek,
1963 };
1964
1965 /* Create a debugfs directory for the vcpu */
1966 static void debugfs_vcpu_init(struct kvm_vcpu *vcpu, unsigned int id)
1967 {
1968         char buf[16];
1969         struct kvm *kvm = vcpu->kvm;
1970
1971         snprintf(buf, sizeof(buf), "vcpu%u", id);
1972         if (IS_ERR_OR_NULL(kvm->arch.debugfs_dir))
1973                 return;
1974         vcpu->arch.debugfs_dir = debugfs_create_dir(buf, kvm->arch.debugfs_dir);
1975         if (IS_ERR_OR_NULL(vcpu->arch.debugfs_dir))
1976                 return;
1977         vcpu->arch.debugfs_timings =
1978                 debugfs_create_file("timings", 0444, vcpu->arch.debugfs_dir,
1979                                     vcpu, &debugfs_timings_ops);
1980 }
1981
1982 #else /* CONFIG_KVM_BOOK3S_HV_EXIT_TIMING */
1983 static void debugfs_vcpu_init(struct kvm_vcpu *vcpu, unsigned int id)
1984 {
1985 }
1986 #endif /* CONFIG_KVM_BOOK3S_HV_EXIT_TIMING */
1987
1988 static struct kvm_vcpu *kvmppc_core_vcpu_create_hv(struct kvm *kvm,
1989                                                    unsigned int id)
1990 {
1991         struct kvm_vcpu *vcpu;
1992         int err;
1993         int core;
1994         struct kvmppc_vcore *vcore;
1995
1996         err = -ENOMEM;
1997         vcpu = kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL);
1998         if (!vcpu)
1999                 goto out;
2000
2001         err = kvm_vcpu_init(vcpu, kvm, id);
2002         if (err)
2003                 goto free_vcpu;
2004
2005         vcpu->arch.shared = &vcpu->arch.shregs;
2006 #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
2007         /*
2008          * The shared struct is never shared on HV,
2009          * so we can always use host endianness
2010          */
2011 #ifdef __BIG_ENDIAN__
2012         vcpu->arch.shared_big_endian = true;
2013 #else
2014         vcpu->arch.shared_big_endian = false;
2015 #endif
2016 #endif
2017         vcpu->arch.mmcr[0] = MMCR0_FC;
2018         vcpu->arch.ctrl = CTRL_RUNLATCH;
2019         /* default to host PVR, since we can't spoof it */
2020         kvmppc_set_pvr_hv(vcpu, mfspr(SPRN_PVR));
2021         spin_lock_init(&vcpu->arch.vpa_update_lock);
2022         spin_lock_init(&vcpu->arch.tbacct_lock);
2023         vcpu->arch.busy_preempt = TB_NIL;
2024         vcpu->arch.intr_msr = MSR_SF | MSR_ME;
2025
2026         /*
2027          * Set the default HFSCR for the guest from the host value.
2028          * This value is only used on POWER9.
2029          * On POWER9 DD1, TM doesn't work, so we make sure to
2030          * prevent the guest from using it.
2031          * On POWER9, we want to virtualize the doorbell facility, so we
2032          * turn off the HFSCR bit, which causes those instructions to trap.
2033          */
2034         vcpu->arch.hfscr = mfspr(SPRN_HFSCR);
2035         if (cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST))
2036                 vcpu->arch.hfscr |= HFSCR_TM;
2037         else if (!cpu_has_feature(CPU_FTR_TM_COMP))
2038                 vcpu->arch.hfscr &= ~HFSCR_TM;
2039         if (cpu_has_feature(CPU_FTR_ARCH_300))
2040                 vcpu->arch.hfscr &= ~HFSCR_MSGP;
2041
2042         kvmppc_mmu_book3s_hv_init(vcpu);
2043
2044         vcpu->arch.state = KVMPPC_VCPU_NOTREADY;
2045
2046         init_waitqueue_head(&vcpu->arch.cpu_run);
2047
2048         mutex_lock(&kvm->lock);
2049         vcore = NULL;
2050         err = -EINVAL;
2051         core = id / kvm->arch.smt_mode;
2052         if (core < KVM_MAX_VCORES) {
2053                 vcore = kvm->arch.vcores[core];
2054                 if (!vcore) {
2055                         err = -ENOMEM;
2056                         vcore = kvmppc_vcore_create(kvm, core);
2057                         kvm->arch.vcores[core] = vcore;
2058                         kvm->arch.online_vcores++;
2059                 }
2060         }
2061         mutex_unlock(&kvm->lock);
2062
2063         if (!vcore)
2064                 goto free_vcpu;
2065
2066         spin_lock(&vcore->lock);
2067         ++vcore->num_threads;
2068         spin_unlock(&vcore->lock);
2069         vcpu->arch.vcore = vcore;
2070         vcpu->arch.ptid = vcpu->vcpu_id - vcore->first_vcpuid;
2071         vcpu->arch.thread_cpu = -1;
2072         vcpu->arch.prev_cpu = -1;
2073
2074         vcpu->arch.cpu_type = KVM_CPU_3S_64;
2075         kvmppc_sanity_check(vcpu);
2076
2077         debugfs_vcpu_init(vcpu, id);
2078
2079         return vcpu;
2080
2081 free_vcpu:
2082         kmem_cache_free(kvm_vcpu_cache, vcpu);
2083 out:
2084         return ERR_PTR(err);
2085 }
2086
2087 static int kvmhv_set_smt_mode(struct kvm *kvm, unsigned long smt_mode,
2088                               unsigned long flags)
2089 {
2090         int err;
2091         int esmt = 0;
2092
2093         if (flags)
2094                 return -EINVAL;
2095         if (smt_mode > MAX_SMT_THREADS || !is_power_of_2(smt_mode))
2096                 return -EINVAL;
2097         if (!cpu_has_feature(CPU_FTR_ARCH_300)) {
2098                 /*
2099                  * On POWER8 (or POWER7), the threading mode is "strict",
2100                  * so we pack smt_mode vcpus per vcore.
2101                  */
2102                 if (smt_mode > threads_per_subcore)
2103                         return -EINVAL;
2104         } else {
2105                 /*
2106                  * On POWER9, the threading mode is "loose",
2107                  * so each vcpu gets its own vcore.
2108                  */
2109                 esmt = smt_mode;
2110                 smt_mode = 1;
2111         }
2112         mutex_lock(&kvm->lock);
2113         err = -EBUSY;
2114         if (!kvm->arch.online_vcores) {
2115                 kvm->arch.smt_mode = smt_mode;
2116                 kvm->arch.emul_smt_mode = esmt;
2117                 err = 0;
2118         }
2119         mutex_unlock(&kvm->lock);
2120
2121         return err;
2122 }
2123
2124 static void unpin_vpa(struct kvm *kvm, struct kvmppc_vpa *vpa)
2125 {
2126         if (vpa->pinned_addr)
2127                 kvmppc_unpin_guest_page(kvm, vpa->pinned_addr, vpa->gpa,
2128                                         vpa->dirty);
2129 }
2130
2131 static void kvmppc_core_vcpu_free_hv(struct kvm_vcpu *vcpu)
2132 {
2133         spin_lock(&vcpu->arch.vpa_update_lock);
2134         unpin_vpa(vcpu->kvm, &vcpu->arch.dtl);
2135         unpin_vpa(vcpu->kvm, &vcpu->arch.slb_shadow);
2136         unpin_vpa(vcpu->kvm, &vcpu->arch.vpa);
2137         spin_unlock(&vcpu->arch.vpa_update_lock);
2138         kvm_vcpu_uninit(vcpu);
2139         kmem_cache_free(kvm_vcpu_cache, vcpu);
2140 }
2141
2142 static int kvmppc_core_check_requests_hv(struct kvm_vcpu *vcpu)
2143 {
2144         /* Indicate we want to get back into the guest */
2145         return 1;
2146 }
2147
2148 static void kvmppc_set_timer(struct kvm_vcpu *vcpu)
2149 {
2150         unsigned long dec_nsec, now;
2151
2152         now = get_tb();
2153         if (now > vcpu->arch.dec_expires) {
2154                 /* decrementer has already gone negative */
2155                 kvmppc_core_queue_dec(vcpu);
2156                 kvmppc_core_prepare_to_enter(vcpu);
2157                 return;
2158         }
2159         dec_nsec = (vcpu->arch.dec_expires - now) * NSEC_PER_SEC
2160                    / tb_ticks_per_sec;
2161         hrtimer_start(&vcpu->arch.dec_timer, dec_nsec, HRTIMER_MODE_REL);
2162         vcpu->arch.timer_running = 1;
2163 }
2164
2165 static void kvmppc_end_cede(struct kvm_vcpu *vcpu)
2166 {
2167         vcpu->arch.ceded = 0;
2168         if (vcpu->arch.timer_running) {
2169                 hrtimer_try_to_cancel(&vcpu->arch.dec_timer);
2170                 vcpu->arch.timer_running = 0;
2171         }
2172 }
2173
2174 extern int __kvmppc_vcore_entry(void);
2175
2176 static void kvmppc_remove_runnable(struct kvmppc_vcore *vc,
2177                                    struct kvm_vcpu *vcpu)
2178 {
2179         u64 now;
2180
2181         if (vcpu->arch.state != KVMPPC_VCPU_RUNNABLE)
2182                 return;
2183         spin_lock_irq(&vcpu->arch.tbacct_lock);
2184         now = mftb();
2185         vcpu->arch.busy_stolen += vcore_stolen_time(vc, now) -
2186                 vcpu->arch.stolen_logged;
2187         vcpu->arch.busy_preempt = now;
2188         vcpu->arch.state = KVMPPC_VCPU_BUSY_IN_HOST;
2189         spin_unlock_irq(&vcpu->arch.tbacct_lock);
2190         --vc->n_runnable;
2191         WRITE_ONCE(vc->runnable_threads[vcpu->arch.ptid], NULL);
2192 }
2193
2194 static int kvmppc_grab_hwthread(int cpu)
2195 {
2196         struct paca_struct *tpaca;
2197         long timeout = 10000;
2198
2199         tpaca = paca_ptrs[cpu];
2200
2201         /* Ensure the thread won't go into the kernel if it wakes */
2202         tpaca->kvm_hstate.kvm_vcpu = NULL;
2203         tpaca->kvm_hstate.kvm_vcore = NULL;
2204         tpaca->kvm_hstate.napping = 0;
2205         smp_wmb();
2206         tpaca->kvm_hstate.hwthread_req = 1;
2207
2208         /*
2209          * If the thread is already executing in the kernel (e.g. handling
2210          * a stray interrupt), wait for it to get back to nap mode.
2211          * The smp_mb() is to ensure that our setting of hwthread_req
2212          * is visible before we look at hwthread_state, so if this
2213          * races with the code at system_reset_pSeries and the thread
2214          * misses our setting of hwthread_req, we are sure to see its
2215          * setting of hwthread_state, and vice versa.
2216          */
2217         smp_mb();
2218         while (tpaca->kvm_hstate.hwthread_state == KVM_HWTHREAD_IN_KERNEL) {
2219                 if (--timeout <= 0) {
2220                         pr_err("KVM: couldn't grab cpu %d\n", cpu);
2221                         return -EBUSY;
2222                 }
2223                 udelay(1);
2224         }
2225         return 0;
2226 }
2227
2228 static void kvmppc_release_hwthread(int cpu)
2229 {
2230         struct paca_struct *tpaca;
2231
2232         tpaca = paca_ptrs[cpu];
2233         tpaca->kvm_hstate.hwthread_req = 0;
2234         tpaca->kvm_hstate.kvm_vcpu = NULL;
2235         tpaca->kvm_hstate.kvm_vcore = NULL;
2236         tpaca->kvm_hstate.kvm_split_mode = NULL;
2237 }
2238
2239 static void radix_flush_cpu(struct kvm *kvm, int cpu, struct kvm_vcpu *vcpu)
2240 {
2241         int i;
2242
2243         cpu = cpu_first_thread_sibling(cpu);
2244         cpumask_set_cpu(cpu, &kvm->arch.need_tlb_flush);
2245         /*
2246          * Make sure setting of bit in need_tlb_flush precedes
2247          * testing of cpu_in_guest bits.  The matching barrier on
2248          * the other side is the first smp_mb() in kvmppc_run_core().
2249          */
2250         smp_mb();
2251         for (i = 0; i < threads_per_core; ++i)
2252                 if (cpumask_test_cpu(cpu + i, &kvm->arch.cpu_in_guest))
2253                         smp_call_function_single(cpu + i, do_nothing, NULL, 1);
2254 }
2255
2256 static void kvmppc_prepare_radix_vcpu(struct kvm_vcpu *vcpu, int pcpu)
2257 {
2258         struct kvm *kvm = vcpu->kvm;
2259
2260         /*
2261          * With radix, the guest can do TLB invalidations itself,
2262          * and it could choose to use the local form (tlbiel) if
2263          * it is invalidating a translation that has only ever been
2264          * used on one vcpu.  However, that doesn't mean it has
2265          * only ever been used on one physical cpu, since vcpus
2266          * can move around between pcpus.  To cope with this, when
2267          * a vcpu moves from one pcpu to another, we need to tell
2268          * any vcpus running on the same core as this vcpu previously
2269          * ran to flush the TLB.  The TLB is shared between threads,
2270          * so we use a single bit in .need_tlb_flush for all 4 threads.
2271          */
2272         if (vcpu->arch.prev_cpu != pcpu) {
2273                 if (vcpu->arch.prev_cpu >= 0 &&
2274                     cpu_first_thread_sibling(vcpu->arch.prev_cpu) !=
2275                     cpu_first_thread_sibling(pcpu))
2276                         radix_flush_cpu(kvm, vcpu->arch.prev_cpu, vcpu);
2277                 vcpu->arch.prev_cpu = pcpu;
2278         }
2279 }
2280
2281 static void kvmppc_start_thread(struct kvm_vcpu *vcpu, struct kvmppc_vcore *vc)
2282 {
2283         int cpu;
2284         struct paca_struct *tpaca;
2285         struct kvm *kvm = vc->kvm;
2286
2287         cpu = vc->pcpu;
2288         if (vcpu) {
2289                 if (vcpu->arch.timer_running) {
2290                         hrtimer_try_to_cancel(&vcpu->arch.dec_timer);
2291                         vcpu->arch.timer_running = 0;
2292                 }
2293                 cpu += vcpu->arch.ptid;
2294                 vcpu->cpu = vc->pcpu;
2295                 vcpu->arch.thread_cpu = cpu;
2296                 cpumask_set_cpu(cpu, &kvm->arch.cpu_in_guest);
2297         }
2298         tpaca = paca_ptrs[cpu];
2299         tpaca->kvm_hstate.kvm_vcpu = vcpu;
2300         tpaca->kvm_hstate.ptid = cpu - vc->pcpu;
2301         tpaca->kvm_hstate.fake_suspend = 0;
2302         /* Order stores to hstate.kvm_vcpu etc. before store to kvm_vcore */
2303         smp_wmb();
2304         tpaca->kvm_hstate.kvm_vcore = vc;
2305         if (cpu != smp_processor_id())
2306                 kvmppc_ipi_thread(cpu);
2307 }
2308
2309 static void kvmppc_wait_for_nap(int n_threads)
2310 {
2311         int cpu = smp_processor_id();
2312         int i, loops;
2313
2314         if (n_threads <= 1)
2315                 return;
2316         for (loops = 0; loops < 1000000; ++loops) {
2317                 /*
2318                  * Check if all threads are finished.
2319                  * We set the vcore pointer when starting a thread
2320                  * and the thread clears it when finished, so we look
2321                  * for any threads that still have a non-NULL vcore ptr.
2322                  */
2323                 for (i = 1; i < n_threads; ++i)
2324                         if (paca_ptrs[cpu + i]->kvm_hstate.kvm_vcore)
2325                                 break;
2326                 if (i == n_threads) {
2327                         HMT_medium();
2328                         return;
2329                 }
2330                 HMT_low();
2331         }
2332         HMT_medium();
2333         for (i = 1; i < n_threads; ++i)
2334                 if (paca_ptrs[cpu + i]->kvm_hstate.kvm_vcore)
2335                         pr_err("KVM: CPU %d seems to be stuck\n", cpu + i);
2336 }
2337
2338 /*
2339  * Check that we are on thread 0 and that any other threads in
2340  * this core are off-line.  Then grab the threads so they can't
2341  * enter the kernel.
2342  */
2343 static int on_primary_thread(void)
2344 {
2345         int cpu = smp_processor_id();
2346         int thr;
2347
2348         /* Are we on a primary subcore? */
2349         if (cpu_thread_in_subcore(cpu))
2350                 return 0;
2351
2352         thr = 0;
2353         while (++thr < threads_per_subcore)
2354                 if (cpu_online(cpu + thr))
2355                         return 0;
2356
2357         /* Grab all hw threads so they can't go into the kernel */
2358         for (thr = 1; thr < threads_per_subcore; ++thr) {
2359                 if (kvmppc_grab_hwthread(cpu + thr)) {
2360                         /* Couldn't grab one; let the others go */
2361                         do {
2362                                 kvmppc_release_hwthread(cpu + thr);
2363                         } while (--thr > 0);
2364                         return 0;
2365                 }
2366         }
2367         return 1;
2368 }
2369
2370 /*
2371  * A list of virtual cores for each physical CPU.
2372  * These are vcores that could run but their runner VCPU tasks are
2373  * (or may be) preempted.
2374  */
2375 struct preempted_vcore_list {
2376         struct list_head        list;
2377         spinlock_t              lock;
2378 };
2379
2380 static DEFINE_PER_CPU(struct preempted_vcore_list, preempted_vcores);
2381
2382 static void init_vcore_lists(void)
2383 {
2384         int cpu;
2385
2386         for_each_possible_cpu(cpu) {
2387                 struct preempted_vcore_list *lp = &per_cpu(preempted_vcores, cpu);
2388                 spin_lock_init(&lp->lock);
2389                 INIT_LIST_HEAD(&lp->list);
2390         }
2391 }
2392
2393 static void kvmppc_vcore_preempt(struct kvmppc_vcore *vc)
2394 {
2395         struct preempted_vcore_list *lp = this_cpu_ptr(&preempted_vcores);
2396
2397         vc->vcore_state = VCORE_PREEMPT;
2398         vc->pcpu = smp_processor_id();
2399         if (vc->num_threads < threads_per_vcore(vc->kvm)) {
2400                 spin_lock(&lp->lock);
2401                 list_add_tail(&vc->preempt_list, &lp->list);
2402                 spin_unlock(&lp->lock);
2403         }
2404
2405         /* Start accumulating stolen time */
2406         kvmppc_core_start_stolen(vc);
2407 }
2408
2409 static void kvmppc_vcore_end_preempt(struct kvmppc_vcore *vc)
2410 {
2411         struct preempted_vcore_list *lp;
2412
2413         kvmppc_core_end_stolen(vc);
2414         if (!list_empty(&vc->preempt_list)) {
2415                 lp = &per_cpu(preempted_vcores, vc->pcpu);
2416                 spin_lock(&lp->lock);
2417                 list_del_init(&vc->preempt_list);
2418                 spin_unlock(&lp->lock);
2419         }
2420         vc->vcore_state = VCORE_INACTIVE;
2421 }
2422
2423 /*
2424  * This stores information about the virtual cores currently
2425  * assigned to a physical core.
2426  */
2427 struct core_info {
2428         int             n_subcores;
2429         int             max_subcore_threads;
2430         int             total_threads;
2431         int             subcore_threads[MAX_SUBCORES];
2432         struct kvmppc_vcore *vc[MAX_SUBCORES];
2433 };
2434
2435 /*
2436  * This mapping means subcores 0 and 1 can use threads 0-3 and 4-7
2437  * respectively in 2-way micro-threading (split-core) mode on POWER8.
2438  */
2439 static int subcore_thread_map[MAX_SUBCORES] = { 0, 4, 2, 6 };
2440
2441 static void init_core_info(struct core_info *cip, struct kvmppc_vcore *vc)
2442 {
2443         memset(cip, 0, sizeof(*cip));
2444         cip->n_subcores = 1;
2445         cip->max_subcore_threads = vc->num_threads;
2446         cip->total_threads = vc->num_threads;
2447         cip->subcore_threads[0] = vc->num_threads;
2448         cip->vc[0] = vc;
2449 }
2450
2451 static bool subcore_config_ok(int n_subcores, int n_threads)
2452 {
2453         /*
2454          * POWER9 "SMT4" cores are permanently in what is effectively a 4-way
2455          * split-core mode, with one thread per subcore.
2456          */
2457         if (cpu_has_feature(CPU_FTR_ARCH_300))
2458                 return n_subcores <= 4 && n_threads == 1;
2459
2460         /* On POWER8, can only dynamically split if unsplit to begin with */
2461         if (n_subcores > 1 && threads_per_subcore < MAX_SMT_THREADS)
2462                 return false;
2463         if (n_subcores > MAX_SUBCORES)
2464                 return false;
2465         if (n_subcores > 1) {
2466                 if (!(dynamic_mt_modes & 2))
2467                         n_subcores = 4;
2468                 if (n_subcores > 2 && !(dynamic_mt_modes & 4))
2469                         return false;
2470         }
2471
2472         return n_subcores * roundup_pow_of_two(n_threads) <= MAX_SMT_THREADS;
2473 }
2474
2475 static void init_vcore_to_run(struct kvmppc_vcore *vc)
2476 {
2477         vc->entry_exit_map = 0;
2478         vc->in_guest = 0;
2479         vc->napping_threads = 0;
2480         vc->conferring_threads = 0;
2481         vc->tb_offset_applied = 0;
2482 }
2483
2484 static bool can_dynamic_split(struct kvmppc_vcore *vc, struct core_info *cip)
2485 {
2486         int n_threads = vc->num_threads;
2487         int sub;
2488
2489         if (!cpu_has_feature(CPU_FTR_ARCH_207S))
2490                 return false;
2491
2492         /* Some POWER9 chips require all threads to be in the same MMU mode */
2493         if (no_mixing_hpt_and_radix &&
2494             kvm_is_radix(vc->kvm) != kvm_is_radix(cip->vc[0]->kvm))
2495                 return false;
2496
2497         if (n_threads < cip->max_subcore_threads)
2498                 n_threads = cip->max_subcore_threads;
2499         if (!subcore_config_ok(cip->n_subcores + 1, n_threads))
2500                 return false;
2501         cip->max_subcore_threads = n_threads;
2502
2503         sub = cip->n_subcores;
2504         ++cip->n_subcores;
2505         cip->total_threads += vc->num_threads;
2506         cip->subcore_threads[sub] = vc->num_threads;
2507         cip->vc[sub] = vc;
2508         init_vcore_to_run(vc);
2509         list_del_init(&vc->preempt_list);
2510
2511         return true;
2512 }
2513
2514 /*
2515  * Work out whether it is possible to piggyback the execution of
2516  * vcore *pvc onto the execution of the other vcores described in *cip.
2517  */
2518 static bool can_piggyback(struct kvmppc_vcore *pvc, struct core_info *cip,
2519                           int target_threads)
2520 {
2521         if (cip->total_threads + pvc->num_threads > target_threads)
2522                 return false;
2523
2524         return can_dynamic_split(pvc, cip);
2525 }
2526
2527 static void prepare_threads(struct kvmppc_vcore *vc)
2528 {
2529         int i;
2530         struct kvm_vcpu *vcpu;
2531
2532         for_each_runnable_thread(i, vcpu, vc) {
2533                 if (signal_pending(vcpu->arch.run_task))
2534                         vcpu->arch.ret = -EINTR;
2535                 else if (vcpu->arch.vpa.update_pending ||
2536                          vcpu->arch.slb_shadow.update_pending ||
2537                          vcpu->arch.dtl.update_pending)
2538                         vcpu->arch.ret = RESUME_GUEST;
2539                 else
2540                         continue;
2541                 kvmppc_remove_runnable(vc, vcpu);
2542                 wake_up(&vcpu->arch.cpu_run);
2543         }
2544 }
2545
2546 static void collect_piggybacks(struct core_info *cip, int target_threads)
2547 {
2548         struct preempted_vcore_list *lp = this_cpu_ptr(&preempted_vcores);
2549         struct kvmppc_vcore *pvc, *vcnext;
2550
2551         spin_lock(&lp->lock);
2552         list_for_each_entry_safe(pvc, vcnext, &lp->list, preempt_list) {
2553                 if (!spin_trylock(&pvc->lock))
2554                         continue;
2555                 prepare_threads(pvc);
2556                 if (!pvc->n_runnable) {
2557                         list_del_init(&pvc->preempt_list);
2558                         if (pvc->runner == NULL) {
2559                                 pvc->vcore_state = VCORE_INACTIVE;
2560                                 kvmppc_core_end_stolen(pvc);
2561                         }
2562                         spin_unlock(&pvc->lock);
2563                         continue;
2564                 }
2565                 if (!can_piggyback(pvc, cip, target_threads)) {
2566                         spin_unlock(&pvc->lock);
2567                         continue;
2568                 }
2569                 kvmppc_core_end_stolen(pvc);
2570                 pvc->vcore_state = VCORE_PIGGYBACK;
2571                 if (cip->total_threads >= target_threads)
2572                         break;
2573         }
2574         spin_unlock(&lp->lock);
2575 }
2576
2577 static bool recheck_signals(struct core_info *cip)
2578 {
2579         int sub, i;
2580         struct kvm_vcpu *vcpu;
2581
2582         for (sub = 0; sub < cip->n_subcores; ++sub)
2583                 for_each_runnable_thread(i, vcpu, cip->vc[sub])
2584                         if (signal_pending(vcpu->arch.run_task))
2585                                 return true;
2586         return false;
2587 }
2588
2589 static void post_guest_process(struct kvmppc_vcore *vc, bool is_master)
2590 {
2591         int still_running = 0, i;
2592         u64 now;
2593         long ret;
2594         struct kvm_vcpu *vcpu;
2595
2596         spin_lock(&vc->lock);
2597         now = get_tb();
2598         for_each_runnable_thread(i, vcpu, vc) {
2599                 /* cancel pending dec exception if dec is positive */
2600                 if (now < vcpu->arch.dec_expires &&
2601                     kvmppc_core_pending_dec(vcpu))
2602                         kvmppc_core_dequeue_dec(vcpu);
2603
2604                 trace_kvm_guest_exit(vcpu);
2605
2606                 ret = RESUME_GUEST;
2607                 if (vcpu->arch.trap)
2608                         ret = kvmppc_handle_exit_hv(vcpu->arch.kvm_run, vcpu,
2609                                                     vcpu->arch.run_task);
2610
2611                 vcpu->arch.ret = ret;
2612                 vcpu->arch.trap = 0;
2613
2614                 if (is_kvmppc_resume_guest(vcpu->arch.ret)) {
2615                         if (vcpu->arch.pending_exceptions)
2616                                 kvmppc_core_prepare_to_enter(vcpu);
2617                         if (vcpu->arch.ceded)
2618                                 kvmppc_set_timer(vcpu);
2619                         else
2620                                 ++still_running;
2621                 } else {
2622                         kvmppc_remove_runnable(vc, vcpu);
2623                         wake_up(&vcpu->arch.cpu_run);
2624                 }
2625         }
2626         if (!is_master) {
2627                 if (still_running > 0) {
2628                         kvmppc_vcore_preempt(vc);
2629                 } else if (vc->runner) {
2630                         vc->vcore_state = VCORE_PREEMPT;
2631                         kvmppc_core_start_stolen(vc);
2632                 } else {
2633                         vc->vcore_state = VCORE_INACTIVE;
2634                 }
2635                 if (vc->n_runnable > 0 && vc->runner == NULL) {
2636                         /* make sure there's a candidate runner awake */
2637                         i = -1;
2638                         vcpu = next_runnable_thread(vc, &i);
2639                         wake_up(&vcpu->arch.cpu_run);
2640                 }
2641         }
2642         spin_unlock(&vc->lock);
2643 }
2644
2645 /*
2646  * Clear core from the list of active host cores as we are about to
2647  * enter the guest. Only do this if it is the primary thread of the
2648  * core (not if a subcore) that is entering the guest.
2649  */
2650 static inline int kvmppc_clear_host_core(unsigned int cpu)
2651 {
2652         int core;
2653
2654         if (!kvmppc_host_rm_ops_hv || cpu_thread_in_core(cpu))
2655                 return 0;
2656         /*
2657          * Memory barrier can be omitted here as we will do a smp_wmb()
2658          * later in kvmppc_start_thread and we need ensure that state is
2659          * visible to other CPUs only after we enter guest.
2660          */
2661         core = cpu >> threads_shift;
2662         kvmppc_host_rm_ops_hv->rm_core[core].rm_state.in_host = 0;
2663         return 0;
2664 }
2665
2666 /*
2667  * Advertise this core as an active host core since we exited the guest
2668  * Only need to do this if it is the primary thread of the core that is
2669  * exiting.
2670  */
2671 static inline int kvmppc_set_host_core(unsigned int cpu)
2672 {
2673         int core;
2674
2675         if (!kvmppc_host_rm_ops_hv || cpu_thread_in_core(cpu))
2676                 return 0;
2677
2678         /*
2679          * Memory barrier can be omitted here because we do a spin_unlock
2680          * immediately after this which provides the memory barrier.
2681          */
2682         core = cpu >> threads_shift;
2683         kvmppc_host_rm_ops_hv->rm_core[core].rm_state.in_host = 1;
2684         return 0;
2685 }
2686
2687 static void set_irq_happened(int trap)
2688 {
2689         switch (trap) {
2690         case BOOK3S_INTERRUPT_EXTERNAL:
2691                 local_paca->irq_happened |= PACA_IRQ_EE;
2692                 break;
2693         case BOOK3S_INTERRUPT_H_DOORBELL:
2694                 local_paca->irq_happened |= PACA_IRQ_DBELL;
2695                 break;
2696         case BOOK3S_INTERRUPT_HMI:
2697                 local_paca->irq_happened |= PACA_IRQ_HMI;
2698                 break;
2699         case BOOK3S_INTERRUPT_SYSTEM_RESET:
2700                 replay_system_reset();
2701                 break;
2702         }
2703 }
2704
2705 /*
2706  * Run a set of guest threads on a physical core.
2707  * Called with vc->lock held.
2708  */
2709 static noinline void kvmppc_run_core(struct kvmppc_vcore *vc)
2710 {
2711         struct kvm_vcpu *vcpu;
2712         int i;
2713         int srcu_idx;
2714         struct core_info core_info;
2715         struct kvmppc_vcore *pvc;
2716         struct kvm_split_mode split_info, *sip;
2717         int split, subcore_size, active;
2718         int sub;
2719         bool thr0_done;
2720         unsigned long cmd_bit, stat_bit;
2721         int pcpu, thr;
2722         int target_threads;
2723         int controlled_threads;
2724         int trap;
2725         bool is_power8;
2726         bool hpt_on_radix;
2727
2728         /*
2729          * Remove from the list any threads that have a signal pending
2730          * or need a VPA update done
2731          */
2732         prepare_threads(vc);
2733
2734         /* if the runner is no longer runnable, let the caller pick a new one */
2735         if (vc->runner->arch.state != KVMPPC_VCPU_RUNNABLE)
2736                 return;
2737
2738         /*
2739          * Initialize *vc.
2740          */
2741         init_vcore_to_run(vc);
2742         vc->preempt_tb = TB_NIL;
2743
2744         /*
2745          * Number of threads that we will be controlling: the same as
2746          * the number of threads per subcore, except on POWER9,
2747          * where it's 1 because the threads are (mostly) independent.
2748          */
2749         controlled_threads = threads_per_vcore(vc->kvm);
2750
2751         /*
2752          * Make sure we are running on primary threads, and that secondary
2753          * threads are offline.  Also check if the number of threads in this
2754          * guest are greater than the current system threads per guest.
2755          * On POWER9, we need to be not in independent-threads mode if
2756          * this is a HPT guest on a radix host machine where the
2757          * CPU threads may not be in different MMU modes.
2758          */
2759         hpt_on_radix = no_mixing_hpt_and_radix && radix_enabled() &&
2760                 !kvm_is_radix(vc->kvm);
2761         if (((controlled_threads > 1) &&
2762              ((vc->num_threads > threads_per_subcore) || !on_primary_thread())) ||
2763             (hpt_on_radix && vc->kvm->arch.threads_indep)) {
2764                 for_each_runnable_thread(i, vcpu, vc) {
2765                         vcpu->arch.ret = -EBUSY;
2766                         kvmppc_remove_runnable(vc, vcpu);
2767                         wake_up(&vcpu->arch.cpu_run);
2768                 }
2769                 goto out;
2770         }
2771
2772         /*
2773          * See if we could run any other vcores on the physical core
2774          * along with this one.
2775          */
2776         init_core_info(&core_info, vc);
2777         pcpu = smp_processor_id();
2778         target_threads = controlled_threads;
2779         if (target_smt_mode && target_smt_mode < target_threads)
2780                 target_threads = target_smt_mode;
2781         if (vc->num_threads < target_threads)
2782                 collect_piggybacks(&core_info, target_threads);
2783
2784         /*
2785          * On radix, arrange for TLB flushing if necessary.
2786          * This has to be done before disabling interrupts since
2787          * it uses smp_call_function().
2788          */
2789         pcpu = smp_processor_id();
2790         if (kvm_is_radix(vc->kvm)) {
2791                 for (sub = 0; sub < core_info.n_subcores; ++sub)
2792                         for_each_runnable_thread(i, vcpu, core_info.vc[sub])
2793                                 kvmppc_prepare_radix_vcpu(vcpu, pcpu);
2794         }
2795
2796         /*
2797          * Hard-disable interrupts, and check resched flag and signals.
2798          * If we need to reschedule or deliver a signal, clean up
2799          * and return without going into the guest(s).
2800          * If the mmu_ready flag has been cleared, don't go into the
2801          * guest because that means a HPT resize operation is in progress.
2802          */
2803         local_irq_disable();
2804         hard_irq_disable();
2805         if (lazy_irq_pending() || need_resched() ||
2806             recheck_signals(&core_info) || !vc->kvm->arch.mmu_ready) {
2807                 local_irq_enable();
2808                 vc->vcore_state = VCORE_INACTIVE;
2809                 /* Unlock all except the primary vcore */
2810                 for (sub = 1; sub < core_info.n_subcores; ++sub) {
2811                         pvc = core_info.vc[sub];
2812                         /* Put back on to the preempted vcores list */
2813                         kvmppc_vcore_preempt(pvc);
2814                         spin_unlock(&pvc->lock);
2815                 }
2816                 for (i = 0; i < controlled_threads; ++i)
2817                         kvmppc_release_hwthread(pcpu + i);
2818                 return;
2819         }
2820
2821         kvmppc_clear_host_core(pcpu);
2822
2823         /* Decide on micro-threading (split-core) mode */
2824         subcore_size = threads_per_subcore;
2825         cmd_bit = stat_bit = 0;
2826         split = core_info.n_subcores;
2827         sip = NULL;
2828         is_power8 = cpu_has_feature(CPU_FTR_ARCH_207S)
2829                 && !cpu_has_feature(CPU_FTR_ARCH_300);
2830
2831         if (split > 1 || hpt_on_radix) {
2832                 sip = &split_info;
2833                 memset(&split_info, 0, sizeof(split_info));
2834                 for (sub = 0; sub < core_info.n_subcores; ++sub)
2835                         split_info.vc[sub] = core_info.vc[sub];
2836
2837                 if (is_power8) {
2838                         if (split == 2 && (dynamic_mt_modes & 2)) {
2839                                 cmd_bit = HID0_POWER8_1TO2LPAR;
2840                                 stat_bit = HID0_POWER8_2LPARMODE;
2841                         } else {
2842                                 split = 4;
2843                                 cmd_bit = HID0_POWER8_1TO4LPAR;
2844                                 stat_bit = HID0_POWER8_4LPARMODE;
2845                         }
2846                         subcore_size = MAX_SMT_THREADS / split;
2847                         split_info.rpr = mfspr(SPRN_RPR);
2848                         split_info.pmmar = mfspr(SPRN_PMMAR);
2849                         split_info.ldbar = mfspr(SPRN_LDBAR);
2850                         split_info.subcore_size = subcore_size;
2851                 } else {
2852                         split_info.subcore_size = 1;
2853                         if (hpt_on_radix) {
2854                                 /* Use the split_info for LPCR/LPIDR changes */
2855                                 split_info.lpcr_req = vc->lpcr;
2856                                 split_info.lpidr_req = vc->kvm->arch.lpid;
2857                                 split_info.host_lpcr = vc->kvm->arch.host_lpcr;
2858                                 split_info.do_set = 1;
2859                         }
2860                 }
2861
2862                 /* order writes to split_info before kvm_split_mode pointer */
2863                 smp_wmb();
2864         }
2865
2866         for (thr = 0; thr < controlled_threads; ++thr) {
2867                 struct paca_struct *paca = paca_ptrs[pcpu + thr];
2868
2869                 paca->kvm_hstate.tid = thr;
2870                 paca->kvm_hstate.napping = 0;
2871                 paca->kvm_hstate.kvm_split_mode = sip;
2872         }
2873
2874         /* Initiate micro-threading (split-core) on POWER8 if required */
2875         if (cmd_bit) {
2876                 unsigned long hid0 = mfspr(SPRN_HID0);
2877
2878                 hid0 |= cmd_bit | HID0_POWER8_DYNLPARDIS;
2879                 mb();
2880                 mtspr(SPRN_HID0, hid0);
2881                 isync();
2882                 for (;;) {
2883                         hid0 = mfspr(SPRN_HID0);
2884                         if (hid0 & stat_bit)
2885                                 break;
2886                         cpu_relax();
2887                 }
2888         }
2889
2890         /*
2891          * On POWER8, set RWMR register.
2892          * Since it only affects PURR and SPURR, it doesn't affect
2893          * the host, so we don't save/restore the host value.
2894          */
2895         if (is_power8) {
2896                 unsigned long rwmr_val = RWMR_RPA_P8_8THREAD;
2897                 int n_online = atomic_read(&vc->online_count);
2898
2899                 /*
2900                  * Use the 8-thread value if we're doing split-core
2901                  * or if the vcore's online count looks bogus.
2902                  */
2903                 if (split == 1 && threads_per_subcore == MAX_SMT_THREADS &&
2904                     n_online >= 1 && n_online <= MAX_SMT_THREADS)
2905                         rwmr_val = p8_rwmr_values[n_online];
2906                 mtspr(SPRN_RWMR, rwmr_val);
2907         }
2908
2909         /* Start all the threads */
2910         active = 0;
2911         for (sub = 0; sub < core_info.n_subcores; ++sub) {
2912                 thr = is_power8 ? subcore_thread_map[sub] : sub;
2913                 thr0_done = false;
2914                 active |= 1 << thr;
2915                 pvc = core_info.vc[sub];
2916                 pvc->pcpu = pcpu + thr;
2917                 for_each_runnable_thread(i, vcpu, pvc) {
2918                         kvmppc_start_thread(vcpu, pvc);
2919                         kvmppc_create_dtl_entry(vcpu, pvc);
2920                         trace_kvm_guest_enter(vcpu);
2921                         if (!vcpu->arch.ptid)
2922                                 thr0_done = true;
2923                         active |= 1 << (thr + vcpu->arch.ptid);
2924                 }
2925                 /*
2926                  * We need to start the first thread of each subcore
2927                  * even if it doesn't have a vcpu.
2928                  */
2929                 if (!thr0_done)
2930                         kvmppc_start_thread(NULL, pvc);
2931         }
2932
2933         /*
2934          * Ensure that split_info.do_nap is set after setting
2935          * the vcore pointer in the PACA of the secondaries.
2936          */
2937         smp_mb();
2938
2939         /*
2940          * When doing micro-threading, poke the inactive threads as well.
2941          * This gets them to the nap instruction after kvm_do_nap,
2942          * which reduces the time taken to unsplit later.
2943          * For POWER9 HPT guest on radix host, we need all the secondary
2944          * threads woken up so they can do the LPCR/LPIDR change.
2945          */
2946         if (cmd_bit || hpt_on_radix) {
2947                 split_info.do_nap = 1;  /* ask secondaries to nap when done */
2948                 for (thr = 1; thr < threads_per_subcore; ++thr)
2949                         if (!(active & (1 << thr)))
2950                                 kvmppc_ipi_thread(pcpu + thr);
2951         }
2952
2953         vc->vcore_state = VCORE_RUNNING;
2954         preempt_disable();
2955
2956         trace_kvmppc_run_core(vc, 0);
2957
2958         for (sub = 0; sub < core_info.n_subcores; ++sub)
2959                 spin_unlock(&core_info.vc[sub]->lock);
2960
2961         if (kvm_is_radix(vc->kvm)) {
2962                 int tmp = pcpu;
2963
2964                 /*
2965                  * Do we need to flush the process scoped TLB for the LPAR?
2966                  *
2967                  * On POWER9, individual threads can come in here, but the
2968                  * TLB is shared between the 4 threads in a core, hence
2969                  * invalidating on one thread invalidates for all.
2970                  * Thus we make all 4 threads use the same bit here.
2971                  *
2972                  * Hash must be flushed in realmode in order to use tlbiel.
2973                  */
2974                 mtspr(SPRN_LPID, vc->kvm->arch.lpid);
2975                 isync();
2976
2977                 if (cpu_has_feature(CPU_FTR_ARCH_300))
2978                         tmp &= ~0x3UL;
2979
2980                 if (cpumask_test_cpu(tmp, &vc->kvm->arch.need_tlb_flush)) {
2981                         radix__local_flush_tlb_lpid_guest(vc->kvm->arch.lpid);
2982                         /* Clear the bit after the TLB flush */
2983                         cpumask_clear_cpu(tmp, &vc->kvm->arch.need_tlb_flush);
2984                 }
2985         }
2986
2987         /*
2988          * Interrupts will be enabled once we get into the guest,
2989          * so tell lockdep that we're about to enable interrupts.
2990          */
2991         trace_hardirqs_on();
2992
2993         guest_enter_irqoff();
2994
2995         srcu_idx = srcu_read_lock(&vc->kvm->srcu);
2996
2997         this_cpu_disable_ftrace();
2998
2999         trap = __kvmppc_vcore_entry();
3000
3001         this_cpu_enable_ftrace();
3002
3003         srcu_read_unlock(&vc->kvm->srcu, srcu_idx);
3004
3005         trace_hardirqs_off();
3006         set_irq_happened(trap);
3007
3008         spin_lock(&vc->lock);
3009         /* prevent other vcpu threads from doing kvmppc_start_thread() now */
3010         vc->vcore_state = VCORE_EXITING;
3011
3012         /* wait for secondary threads to finish writing their state to memory */
3013         kvmppc_wait_for_nap(controlled_threads);
3014
3015         /* Return to whole-core mode if we split the core earlier */
3016         if (cmd_bit) {
3017                 unsigned long hid0 = mfspr(SPRN_HID0);
3018                 unsigned long loops = 0;
3019
3020                 hid0 &= ~HID0_POWER8_DYNLPARDIS;
3021                 stat_bit = HID0_POWER8_2LPARMODE | HID0_POWER8_4LPARMODE;
3022                 mb();
3023                 mtspr(SPRN_HID0, hid0);
3024                 isync();
3025                 for (;;) {
3026                         hid0 = mfspr(SPRN_HID0);
3027                         if (!(hid0 & stat_bit))
3028                                 break;
3029                         cpu_relax();
3030                         ++loops;
3031                 }
3032         } else if (hpt_on_radix) {
3033                 /* Wait for all threads to have seen final sync */
3034                 for (thr = 1; thr < controlled_threads; ++thr) {
3035                         struct paca_struct *paca = paca_ptrs[pcpu + thr];
3036
3037                         while (paca->kvm_hstate.kvm_split_mode) {
3038                                 HMT_low();
3039                                 barrier();
3040                         }
3041                         HMT_medium();
3042                 }
3043         }
3044         split_info.do_nap = 0;
3045
3046         kvmppc_set_host_core(pcpu);
3047
3048         local_irq_enable();
3049         guest_exit();
3050
3051         /* Let secondaries go back to the offline loop */
3052         for (i = 0; i < controlled_threads; ++i) {
3053                 kvmppc_release_hwthread(pcpu + i);
3054                 if (sip && sip->napped[i])
3055                         kvmppc_ipi_thread(pcpu + i);
3056                 cpumask_clear_cpu(pcpu + i, &vc->kvm->arch.cpu_in_guest);
3057         }
3058
3059         spin_unlock(&vc->lock);
3060
3061         /* make sure updates to secondary vcpu structs are visible now */
3062         smp_mb();
3063
3064         preempt_enable();
3065
3066         for (sub = 0; sub < core_info.n_subcores; ++sub) {
3067                 pvc = core_info.vc[sub];
3068                 post_guest_process(pvc, pvc == vc);
3069         }
3070
3071         spin_lock(&vc->lock);
3072
3073  out:
3074         vc->vcore_state = VCORE_INACTIVE;
3075         trace_kvmppc_run_core(vc, 1);
3076 }
3077
3078 /*
3079  * Wait for some other vcpu thread to execute us, and
3080  * wake us up when we need to handle something in the host.
3081  */
3082 static void kvmppc_wait_for_exec(struct kvmppc_vcore *vc,
3083                                  struct kvm_vcpu *vcpu, int wait_state)
3084 {
3085         DEFINE_WAIT(wait);
3086
3087         prepare_to_wait(&vcpu->arch.cpu_run, &wait, wait_state);
3088         if (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE) {
3089                 spin_unlock(&vc->lock);
3090                 schedule();
3091                 spin_lock(&vc->lock);
3092         }
3093         finish_wait(&vcpu->arch.cpu_run, &wait);
3094 }
3095
3096 static void grow_halt_poll_ns(struct kvmppc_vcore *vc)
3097 {
3098         /* 10us base */
3099         if (vc->halt_poll_ns == 0 && halt_poll_ns_grow)
3100                 vc->halt_poll_ns = 10000;
3101         else
3102                 vc->halt_poll_ns *= halt_poll_ns_grow;
3103 }
3104
3105 static void shrink_halt_poll_ns(struct kvmppc_vcore *vc)
3106 {
3107         if (halt_poll_ns_shrink == 0)
3108                 vc->halt_poll_ns = 0;
3109         else
3110                 vc->halt_poll_ns /= halt_poll_ns_shrink;
3111 }
3112
3113 #ifdef CONFIG_KVM_XICS
3114 static inline bool xive_interrupt_pending(struct kvm_vcpu *vcpu)
3115 {
3116         if (!xive_enabled())
3117                 return false;
3118         return vcpu->arch.irq_pending || vcpu->arch.xive_saved_state.pipr <
3119                 vcpu->arch.xive_saved_state.cppr;
3120 }
3121 #else
3122 static inline bool xive_interrupt_pending(struct kvm_vcpu *vcpu)
3123 {
3124         return false;
3125 }
3126 #endif /* CONFIG_KVM_XICS */