arch/powerpc/kvm/book3s_64_emulate.c

   1 /*
   2  * This program is free software; you can redistribute it and/or modify
   3  * it under the terms of the GNU General Public License, version 2, as
   4  * published by the Free Software Foundation.
   5  *
   6  * This program is distributed in the hope that it will be useful,
   7  * but WITHOUT ANY WARRANTY; without even the implied warranty of
   8  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   9  * GNU General Public License for more details.
  10  *
  11  * You should have received a copy of the GNU General Public License
  12  * along with this program; if not, write to the Free Software
  13  * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
  14  *
  15  * Copyright SUSE Linux Products GmbH 2009
  16  *
  17  * Authors: Alexander Graf <agraf@suse.de>
  18  */
  19
  20 #include <asm/kvm_ppc.h>
  21 #include <asm/disassemble.h>
  22 #include <asm/kvm_book3s.h>
  23 #include <asm/reg.h>
  24
  25 #define OP_19_XOP_RFID          18
  26 #define OP_19_XOP_RFI           50
  27
  28 #define OP_31_XOP_MFMSR         83
  29 #define OP_31_XOP_MTMSR         146
  30 #define OP_31_XOP_MTMSRD        178
  31 #define OP_31_XOP_MTSRIN        242
  32 #define OP_31_XOP_TLBIEL        274
  33 #define OP_31_XOP_TLBIE         306
  34 #define OP_31_XOP_SLBMTE        402
  35 #define OP_31_XOP_SLBIE         434
  36 #define OP_31_XOP_SLBIA         498
  37 #define OP_31_XOP_MFSRIN        659
  38 #define OP_31_XOP_SLBMFEV       851
  39 #define OP_31_XOP_EIOIO         854
  40 #define OP_31_XOP_SLBMFEE       915
  41
  42 /* DCBZ is actually 1014, but we patch it to 1010 so we get a trap */
  43 #define OP_31_XOP_DCBZ          1010
  44
  45 int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
  46                            unsigned int inst, int *advance)
  47 {
  48         int emulated = EMULATE_DONE;
  49
  50         switch (get_op(inst)) {
  51         case 19:
  52                 switch (get_xop(inst)) {
  53                 case OP_19_XOP_RFID:
  54                 case OP_19_XOP_RFI:
  55                         vcpu->arch.pc = vcpu->arch.srr0;
  56                         kvmppc_set_msr(vcpu, vcpu->arch.srr1);
  57                         *advance = 0;
  58                         break;
  59
  60                 default:
  61                         emulated = EMULATE_FAIL;
  62                         break;
  63                 }
  64                 break;
  65         case 31:
  66                 switch (get_xop(inst)) {
  67                 case OP_31_XOP_MFMSR:
  68                         vcpu->arch.gpr[get_rt(inst)] = vcpu->arch.msr;
  69                         break;
  70                 case OP_31_XOP_MTMSRD:
  71                 {
  72                         ulong rs = vcpu->arch.gpr[get_rs(inst)];
  73                         if (inst & 0x10000) {
  74                                 vcpu->arch.msr &= ~(MSR_RI | MSR_EE);
  75                                 vcpu->arch.msr |= rs & (MSR_RI | MSR_EE);
  76                         } else
  77                                 kvmppc_set_msr(vcpu, rs);
  78                         break;
  79                 }
  80                 case OP_31_XOP_MTMSR:
  81                         kvmppc_set_msr(vcpu, vcpu->arch.gpr[get_rs(inst)]);
  82                         break;
  83                 case OP_31_XOP_MFSRIN:
  84                 {
  85                         int srnum;
  86
  87                         srnum = (vcpu->arch.gpr[get_rb(inst)] >> 28) & 0xf;
  88                         if (vcpu->arch.mmu.mfsrin) {
  89                                 u32 sr;
  90                                 sr = vcpu->arch.mmu.mfsrin(vcpu, srnum);
  91                                 vcpu->arch.gpr[get_rt(inst)] = sr;
  92                         }
  93                         break;
  94                 }
  95                 case OP_31_XOP_MTSRIN:
  96                         vcpu->arch.mmu.mtsrin(vcpu,
  97                                 (vcpu->arch.gpr[get_rb(inst)] >> 28) & 0xf,
  98                                 vcpu->arch.gpr[get_rs(inst)]);
  99                         break;
 100                 case OP_31_XOP_TLBIE:
 101                 case OP_31_XOP_TLBIEL:
 102                 {
 103                         bool large = (inst & 0x00200000) ? true : false;
 104                         ulong addr = vcpu->arch.gpr[get_rb(inst)];
 105                         vcpu->arch.mmu.tlbie(vcpu, addr, large);
 106                         break;
 107                 }
 108                 case OP_31_XOP_EIOIO:
 109                         break;
 110                 case OP_31_XOP_SLBMTE:
 111                         if (!vcpu->arch.mmu.slbmte)
 112                                 return EMULATE_FAIL;
 113
 114                         vcpu->arch.mmu.slbmte(vcpu, vcpu->arch.gpr[get_rs(inst)],
 115                                                 vcpu->arch.gpr[get_rb(inst)]);
 116                         break;
 117                 case OP_31_XOP_SLBIE:
 118                         if (!vcpu->arch.mmu.slbie)
 119                                 return EMULATE_FAIL;
 120
 121                         vcpu->arch.mmu.slbie(vcpu, vcpu->arch.gpr[get_rb(inst)]);
 122                         break;
 123                 case OP_31_XOP_SLBIA:
 124                         if (!vcpu->arch.mmu.slbia)
 125                                 return EMULATE_FAIL;
 126
 127                         vcpu->arch.mmu.slbia(vcpu);
 128                         break;
 129                 case OP_31_XOP_SLBMFEE:
 130                         if (!vcpu->arch.mmu.slbmfee) {
 131                                 emulated = EMULATE_FAIL;
 132                         } else {
 133                                 ulong t, rb;
 134
 135                                 rb = vcpu->arch.gpr[get_rb(inst)];
 136                                 t = vcpu->arch.mmu.slbmfee(vcpu, rb);
 137                                 vcpu->arch.gpr[get_rt(inst)] = t;
 138                         }
 139                         break;
 140                 case OP_31_XOP_SLBMFEV:
 141                         if (!vcpu->arch.mmu.slbmfev) {
 142                                 emulated = EMULATE_FAIL;
 143                         } else {
 144                                 ulong t, rb;
 145
 146                                 rb = vcpu->arch.gpr[get_rb(inst)];
 147                                 t = vcpu->arch.mmu.slbmfev(vcpu, rb);
 148                                 vcpu->arch.gpr[get_rt(inst)] = t;
 149                         }
 150                         break;
 151                 case OP_31_XOP_DCBZ:
 152                 {
 153                         ulong rb =  vcpu->arch.gpr[get_rb(inst)];
 154                         ulong ra = 0;
 155                         ulong addr;
 156                         u32 zeros[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
 157
 158                         if (get_ra(inst))
 159                                 ra = vcpu->arch.gpr[get_ra(inst)];
 160
 161                         addr = (ra + rb) & ~31ULL;
 162                         if (!(vcpu->arch.msr & MSR_SF))
 163                                 addr &= 0xffffffff;
 164
 165                         if (kvmppc_st(vcpu, addr, 32, zeros)) {
 166                                 vcpu->arch.dear = addr;
 167                                 vcpu->arch.fault_dear = addr;
 168                                 to_book3s(vcpu)->dsisr = DSISR_PROTFAULT |
 169                                                       DSISR_ISSTORE;
 170                                 kvmppc_book3s_queue_irqprio(vcpu,
 171                                         BOOK3S_INTERRUPT_DATA_STORAGE);
 172                                 kvmppc_mmu_pte_flush(vcpu, addr, ~0xFFFULL);
 173                         }
 174
 175                         break;
 176                 }
 177                 default:
 178                         emulated = EMULATE_FAIL;
 179                 }
 180                 break;
 181         default:
 182                 emulated = EMULATE_FAIL;
 183         }
 184
 185         return emulated;
 186 }
 187
 188 void kvmppc_set_bat(struct kvm_vcpu *vcpu, struct kvmppc_bat *bat, bool upper,
 189                     u32 val)
 190 {
 191         if (upper) {
 192                 /* Upper BAT */
 193                 u32 bl = (val >> 2) & 0x7ff;
 194                 bat->bepi_mask = (~bl << 17);
 195                 bat->bepi = val & 0xfffe0000;
 196                 bat->vs = (val & 2) ? 1 : 0;
 197                 bat->vp = (val & 1) ? 1 : 0;
 198                 bat->raw = (bat->raw & 0xffffffff00000000ULL) | val;
 199         } else {
 200                 /* Lower BAT */
 201                 bat->brpn = val & 0xfffe0000;
 202                 bat->wimg = (val >> 3) & 0xf;
 203                 bat->pp = val & 3;
 204                 bat->raw = (bat->raw & 0x00000000ffffffffULL) | ((u64)val << 32);
 205         }
 206 }
 207
 208 static void kvmppc_write_bat(struct kvm_vcpu *vcpu, int sprn, u32 val)
 209 {
 210         struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
 211         struct kvmppc_bat *bat;
 212
 213         switch (sprn) {
 214         case SPRN_IBAT0U ... SPRN_IBAT3L:
 215                 bat = &vcpu_book3s->ibat[(sprn - SPRN_IBAT0U) / 2];
 216                 break;
 217         case SPRN_IBAT4U ... SPRN_IBAT7L:
 218                 bat = &vcpu_book3s->ibat[(sprn - SPRN_IBAT4U) / 2];
 219                 break;
 220         case SPRN_DBAT0U ... SPRN_DBAT3L:
 221                 bat = &vcpu_book3s->dbat[(sprn - SPRN_DBAT0U) / 2];
 222                 break;
 223         case SPRN_DBAT4U ... SPRN_DBAT7L:
 224                 bat = &vcpu_book3s->dbat[(sprn - SPRN_DBAT4U) / 2];
 225                 break;
 226         default:
 227                 BUG();
 228         }
 229
 230         kvmppc_set_bat(vcpu, bat, !(sprn % 2), val);
 231 }
 232
 233 int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
 234 {
 235         int emulated = EMULATE_DONE;
 236
 237         switch (sprn) {
 238         case SPRN_SDR1:
 239                 to_book3s(vcpu)->sdr1 = vcpu->arch.gpr[rs];
 240                 break;
 241         case SPRN_DSISR:
 242                 to_book3s(vcpu)->dsisr = vcpu->arch.gpr[rs];
 243                 break;
 244         case SPRN_DAR:
 245                 vcpu->arch.dear = vcpu->arch.gpr[rs];
 246                 break;
 247         case SPRN_HIOR:
 248                 to_book3s(vcpu)->hior = vcpu->arch.gpr[rs];
 249                 break;
 250         case SPRN_IBAT0U ... SPRN_IBAT3L:
 251         case SPRN_IBAT4U ... SPRN_IBAT7L:
 252         case SPRN_DBAT0U ... SPRN_DBAT3L:
 253         case SPRN_DBAT4U ... SPRN_DBAT7L:
 254                 kvmppc_write_bat(vcpu, sprn, (u32)vcpu->arch.gpr[rs]);
 255                 /* BAT writes happen so rarely that we're ok to flush
 256                  * everything here */
 257                 kvmppc_mmu_pte_flush(vcpu, 0, 0);
 258                 break;
 259         case SPRN_HID0:
 260                 to_book3s(vcpu)->hid[0] = vcpu->arch.gpr[rs];
 261                 break;
 262         case SPRN_HID1:
 263                 to_book3s(vcpu)->hid[1] = vcpu->arch.gpr[rs];
 264                 break;
 265         case SPRN_HID2:
 266                 to_book3s(vcpu)->hid[2] = vcpu->arch.gpr[rs];
 267                 break;
 268         case SPRN_HID4:
 269                 to_book3s(vcpu)->hid[4] = vcpu->arch.gpr[rs];
 270                 break;
 271         case SPRN_HID5:
 272                 to_book3s(vcpu)->hid[5] = vcpu->arch.gpr[rs];
 273                 /* guest HID5 set can change is_dcbz32 */
 274                 if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
 275                     (mfmsr() & MSR_HV))
 276                         vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32;
 277                 break;
 278         case SPRN_ICTC:
 279         case SPRN_THRM1:
 280         case SPRN_THRM2:
 281         case SPRN_THRM3:
 282         case SPRN_CTRLF:
 283         case SPRN_CTRLT:
 284                 break;
 285         default:
 286                 printk(KERN_INFO "KVM: invalid SPR write: %d\n", sprn);
 287 #ifndef DEBUG_SPR
 288                 emulated = EMULATE_FAIL;
 289 #endif
 290                 break;
 291         }
 292
 293         return emulated;
 294 }
 295
 296 int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
 297 {
 298         int emulated = EMULATE_DONE;
 299
 300         switch (sprn) {
 301         case SPRN_SDR1:
 302                 vcpu->arch.gpr[rt] = to_book3s(vcpu)->sdr1;
 303                 break;
 304         case SPRN_DSISR:
 305                 vcpu->arch.gpr[rt] = to_book3s(vcpu)->dsisr;
 306                 break;
 307         case SPRN_DAR:
 308                 vcpu->arch.gpr[rt] = vcpu->arch.dear;
 309                 break;
 310         case SPRN_HIOR:
 311                 vcpu->arch.gpr[rt] = to_book3s(vcpu)->hior;
 312                 break;
 313         case SPRN_HID0:
 314                 vcpu->arch.gpr[rt] = to_book3s(vcpu)->hid[0];
 315                 break;
 316         case SPRN_HID1:
 317                 vcpu->arch.gpr[rt] = to_book3s(vcpu)->hid[1];
 318                 break;
 319         case SPRN_HID2:
 320                 vcpu->arch.gpr[rt] = to_book3s(vcpu)->hid[2];
 321                 break;
 322         case SPRN_HID4:
 323                 vcpu->arch.gpr[rt] = to_book3s(vcpu)->hid[4];
 324                 break;
 325         case SPRN_HID5:
 326                 vcpu->arch.gpr[rt] = to_book3s(vcpu)->hid[5];
 327                 break;
 328         case SPRN_THRM1:
 329         case SPRN_THRM2:
 330         case SPRN_THRM3:
 331         case SPRN_CTRLF:
 332         case SPRN_CTRLT:
 333                 vcpu->arch.gpr[rt] = 0;
 334                 break;
 335         default:
 336                 printk(KERN_INFO "KVM: invalid SPR read: %d\n", sprn);
 337 #ifndef DEBUG_SPR
 338                 emulated = EMULATE_FAIL;
 339 #endif
 340                 break;
 341         }
 342
 343         return emulated;
 344 }
 345