arch/powerpc/kernel/asm-offsets.c

   1 /*
   2  * This program is used to generate definitions needed by
   3  * assembly language modules.
   4  *
   5  * We use the technique used in the OSF Mach kernel code:
   6  * generate asm statements containing #defines,
   7  * compile this file to assembler, and then extract the
   8  * #defines from the assembly-language output.
   9  *
  10  * This program is free software; you can redistribute it and/or
  11  * modify it under the terms of the GNU General Public License
  12  * as published by the Free Software Foundation; either version
  13  * 2 of the License, or (at your option) any later version.
  14  */
  15
  16 #include <linux/compat.h>
  17 #include <linux/signal.h>
  18 #include <linux/sched.h>
  19 #include <linux/kernel.h>
  20 #include <linux/errno.h>
  21 #include <linux/string.h>
  22 #include <linux/types.h>
  23 #include <linux/mman.h>
  24 #include <linux/mm.h>
  25 #include <linux/suspend.h>
  26 #include <linux/hrtimer.h>
  27 #ifdef CONFIG_PPC64
  28 #include <linux/time.h>
  29 #include <linux/hardirq.h>
  30 #endif
  31 #include <linux/kbuild.h>
  32
  33 #include <asm/io.h>
  34 #include <asm/page.h>
  35 #include <asm/pgtable.h>
  36 #include <asm/processor.h>
  37 #include <asm/cputable.h>
  38 #include <asm/thread_info.h>
  39 #include <asm/rtas.h>
  40 #include <asm/vdso_datapage.h>
  41 #include <asm/dbell.h>
  42 #ifdef CONFIG_PPC64
  43 #include <asm/paca.h>
  44 #include <asm/lppaca.h>
  45 #include <asm/cache.h>
  46 #include <asm/mmu.h>
  47 #include <asm/hvcall.h>
  48 #include <asm/xics.h>
  49 #endif
  50 #ifdef CONFIG_PPC_POWERNV
  51 #include <asm/opal.h>
  52 #endif
  53 #if defined(CONFIG_KVM) || defined(CONFIG_KVM_GUEST)
  54 #include <linux/kvm_host.h>
  55 #endif
  56 #if defined(CONFIG_KVM) && defined(CONFIG_PPC_BOOK3S)
  57 #include <asm/kvm_book3s.h>
  58 #include <asm/kvm_ppc.h>
  59 #endif
  60
  61 #ifdef CONFIG_PPC32
  62 #if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
  63 #include "head_booke.h"
  64 #endif
  65 #endif
  66
  67 #if defined(CONFIG_PPC_FSL_BOOK3E)
  68 #include "../mm/mmu_decl.h"
  69 #endif
  70
  71 #ifdef CONFIG_PPC_8xx
  72 #include <asm/fixmap.h>
  73 #endif
  74
  75 #define STACK_PT_REGS_OFFSET(sym, val)  \
  76         DEFINE(sym, STACK_FRAME_OVERHEAD + offsetof(struct pt_regs, val))
  77
  78 int main(void)
  79 {
  80         OFFSET(THREAD, task_struct, thread);
  81         OFFSET(MM, task_struct, mm);
  82 #ifdef CONFIG_STACKPROTECTOR
  83         OFFSET(TASK_CANARY, task_struct, stack_canary);
  84 #ifdef CONFIG_PPC64
  85         OFFSET(PACA_CANARY, paca_struct, canary);
  86 #endif
  87 #endif
  88         OFFSET(MMCONTEXTID, mm_struct, context.id);
  89 #ifdef CONFIG_PPC64
  90         DEFINE(SIGSEGV, SIGSEGV);
  91         DEFINE(NMI_MASK, NMI_MASK);
  92 #else
  93         OFFSET(THREAD_INFO, task_struct, stack);
  94         DEFINE(THREAD_INFO_GAP, _ALIGN_UP(sizeof(struct thread_info), 16));
  95         OFFSET(KSP_LIMIT, thread_struct, ksp_limit);
  96 #endif /* CONFIG_PPC64 */
  97
  98 #ifdef CONFIG_LIVEPATCH
  99         OFFSET(TI_livepatch_sp, thread_info, livepatch_sp);
 100 #endif
 101
 102         OFFSET(KSP, thread_struct, ksp);
 103         OFFSET(PT_REGS, thread_struct, regs);
 104 #ifdef CONFIG_BOOKE
 105         OFFSET(THREAD_NORMSAVES, thread_struct, normsave[0]);
 106 #endif
 107         OFFSET(THREAD_FPEXC_MODE, thread_struct, fpexc_mode);
 108         OFFSET(THREAD_FPSTATE, thread_struct, fp_state.fpr);
 109         OFFSET(THREAD_FPSAVEAREA, thread_struct, fp_save_area);
 110         OFFSET(FPSTATE_FPSCR, thread_fp_state, fpscr);
 111         OFFSET(THREAD_LOAD_FP, thread_struct, load_fp);
 112 #ifdef CONFIG_ALTIVEC
 113         OFFSET(THREAD_VRSTATE, thread_struct, vr_state.vr);
 114         OFFSET(THREAD_VRSAVEAREA, thread_struct, vr_save_area);
 115         OFFSET(THREAD_VRSAVE, thread_struct, vrsave);
 116         OFFSET(THREAD_USED_VR, thread_struct, used_vr);
 117         OFFSET(VRSTATE_VSCR, thread_vr_state, vscr);
 118         OFFSET(THREAD_LOAD_VEC, thread_struct, load_vec);
 119 #endif /* CONFIG_ALTIVEC */
 120 #ifdef CONFIG_VSX
 121         OFFSET(THREAD_USED_VSR, thread_struct, used_vsr);
 122 #endif /* CONFIG_VSX */
 123 #ifdef CONFIG_PPC64
 124         OFFSET(KSP_VSID, thread_struct, ksp_vsid);
 125 #else /* CONFIG_PPC64 */
 126         OFFSET(PGDIR, thread_struct, pgdir);
 127 #ifdef CONFIG_SPE
 128         OFFSET(THREAD_EVR0, thread_struct, evr[0]);
 129         OFFSET(THREAD_ACC, thread_struct, acc);
 130         OFFSET(THREAD_SPEFSCR, thread_struct, spefscr);
 131         OFFSET(THREAD_USED_SPE, thread_struct, used_spe);
 132 #endif /* CONFIG_SPE */
 133 #endif /* CONFIG_PPC64 */
 134 #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
 135         OFFSET(THREAD_DBCR0, thread_struct, debug.dbcr0);
 136 #endif
 137 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
 138         OFFSET(THREAD_KVM_SVCPU, thread_struct, kvm_shadow_vcpu);
 139 #endif
 140 #if defined(CONFIG_KVM) && defined(CONFIG_BOOKE)
 141         OFFSET(THREAD_KVM_VCPU, thread_struct, kvm_vcpu);
 142 #endif
 143
 144 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
 145         OFFSET(PACATMSCRATCH, paca_struct, tm_scratch);
 146         OFFSET(THREAD_TM_TFHAR, thread_struct, tm_tfhar);
 147         OFFSET(THREAD_TM_TEXASR, thread_struct, tm_texasr);
 148         OFFSET(THREAD_TM_TFIAR, thread_struct, tm_tfiar);
 149         OFFSET(THREAD_TM_TAR, thread_struct, tm_tar);
 150         OFFSET(THREAD_TM_PPR, thread_struct, tm_ppr);
 151         OFFSET(THREAD_TM_DSCR, thread_struct, tm_dscr);
 152         OFFSET(PT_CKPT_REGS, thread_struct, ckpt_regs);
 153         OFFSET(THREAD_CKVRSTATE, thread_struct, ckvr_state.vr);
 154         OFFSET(THREAD_CKVRSAVE, thread_struct, ckvrsave);
 155         OFFSET(THREAD_CKFPSTATE, thread_struct, ckfp_state.fpr);
 156         /* Local pt_regs on stack for Transactional Memory funcs. */
 157         DEFINE(TM_FRAME_SIZE, STACK_FRAME_OVERHEAD +
 158                sizeof(struct pt_regs) + 16);
 159 #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
 160
 161         OFFSET(TI_FLAGS, thread_info, flags);
 162         OFFSET(TI_LOCAL_FLAGS, thread_info, local_flags);
 163         OFFSET(TI_PREEMPT, thread_info, preempt_count);
 164         OFFSET(TI_TASK, thread_info, task);
 165         OFFSET(TI_CPU, thread_info, cpu);
 166
 167 #ifdef CONFIG_PPC64
 168         OFFSET(DCACHEL1BLOCKSIZE, ppc64_caches, l1d.block_size);
 169         OFFSET(DCACHEL1LOGBLOCKSIZE, ppc64_caches, l1d.log_block_size);
 170         OFFSET(DCACHEL1BLOCKSPERPAGE, ppc64_caches, l1d.blocks_per_page);
 171         OFFSET(ICACHEL1BLOCKSIZE, ppc64_caches, l1i.block_size);
 172         OFFSET(ICACHEL1LOGBLOCKSIZE, ppc64_caches, l1i.log_block_size);
 173         OFFSET(ICACHEL1BLOCKSPERPAGE, ppc64_caches, l1i.blocks_per_page);
 174         /* paca */
 175         DEFINE(PACA_SIZE, sizeof(struct paca_struct));
 176         OFFSET(PACAPACAINDEX, paca_struct, paca_index);
 177         OFFSET(PACAPROCSTART, paca_struct, cpu_start);
 178         OFFSET(PACAKSAVE, paca_struct, kstack);
 179         OFFSET(PACACURRENT, paca_struct, __current);
 180         OFFSET(PACASAVEDMSR, paca_struct, saved_msr);
 181         OFFSET(PACAR1, paca_struct, saved_r1);
 182         OFFSET(PACATOC, paca_struct, kernel_toc);
 183         OFFSET(PACAKBASE, paca_struct, kernelbase);
 184         OFFSET(PACAKMSR, paca_struct, kernel_msr);
 185         OFFSET(PACAIRQSOFTMASK, paca_struct, irq_soft_mask);
 186         OFFSET(PACAIRQHAPPENED, paca_struct, irq_happened);
 187         OFFSET(PACA_FTRACE_ENABLED, paca_struct, ftrace_enabled);
 188 #ifdef CONFIG_PPC_BOOK3S
 189         OFFSET(PACACONTEXTID, paca_struct, mm_ctx_id);
 190 #ifdef CONFIG_PPC_MM_SLICES
 191         OFFSET(PACALOWSLICESPSIZE, paca_struct, mm_ctx_low_slices_psize);
 192         OFFSET(PACAHIGHSLICEPSIZE, paca_struct, mm_ctx_high_slices_psize);
 193         OFFSET(PACA_SLB_ADDR_LIMIT, paca_struct, mm_ctx_slb_addr_limit);
 194         DEFINE(MMUPSIZEDEFSIZE, sizeof(struct mmu_psize_def));
 195 #endif /* CONFIG_PPC_MM_SLICES */
 196 #endif
 197
 198 #ifdef CONFIG_PPC_BOOK3E
 199         OFFSET(PACAPGD, paca_struct, pgd);
 200         OFFSET(PACA_KERNELPGD, paca_struct, kernel_pgd);
 201         OFFSET(PACA_EXGEN, paca_struct, exgen);
 202         OFFSET(PACA_EXTLB, paca_struct, extlb);
 203         OFFSET(PACA_EXMC, paca_struct, exmc);
 204         OFFSET(PACA_EXCRIT, paca_struct, excrit);
 205         OFFSET(PACA_EXDBG, paca_struct, exdbg);
 206         OFFSET(PACA_MC_STACK, paca_struct, mc_kstack);
 207         OFFSET(PACA_CRIT_STACK, paca_struct, crit_kstack);
 208         OFFSET(PACA_DBG_STACK, paca_struct, dbg_kstack);
 209         OFFSET(PACA_TCD_PTR, paca_struct, tcd_ptr);
 210
 211         OFFSET(TCD_ESEL_NEXT, tlb_core_data, esel_next);
 212         OFFSET(TCD_ESEL_MAX, tlb_core_data, esel_max);
 213         OFFSET(TCD_ESEL_FIRST, tlb_core_data, esel_first);
 214 #endif /* CONFIG_PPC_BOOK3E */
 215
 216 #ifdef CONFIG_PPC_BOOK3S_64
 217         OFFSET(PACASLBCACHE, paca_struct, slb_cache);
 218         OFFSET(PACASLBCACHEPTR, paca_struct, slb_cache_ptr);
 219         OFFSET(PACASTABRR, paca_struct, stab_rr);
 220         OFFSET(PACAVMALLOCSLLP, paca_struct, vmalloc_sllp);
 221 #ifdef CONFIG_PPC_MM_SLICES
 222         OFFSET(MMUPSIZESLLP, mmu_psize_def, sllp);
 223 #else
 224         OFFSET(PACACONTEXTSLLP, paca_struct, mm_ctx_sllp);
 225 #endif /* CONFIG_PPC_MM_SLICES */
 226         OFFSET(PACA_EXGEN, paca_struct, exgen);
 227         OFFSET(PACA_EXMC, paca_struct, exmc);
 228         OFFSET(PACA_EXSLB, paca_struct, exslb);
 229         OFFSET(PACA_EXNMI, paca_struct, exnmi);
 230 #ifdef CONFIG_PPC_PSERIES
 231         OFFSET(PACALPPACAPTR, paca_struct, lppaca_ptr);
 232 #endif
 233         OFFSET(PACA_SLBSHADOWPTR, paca_struct, slb_shadow_ptr);
 234         OFFSET(SLBSHADOW_STACKVSID, slb_shadow, save_area[SLB_NUM_BOLTED - 1].vsid);
 235         OFFSET(SLBSHADOW_STACKESID, slb_shadow, save_area[SLB_NUM_BOLTED - 1].esid);
 236         OFFSET(SLBSHADOW_SAVEAREA, slb_shadow, save_area);
 237         OFFSET(LPPACA_PMCINUSE, lppaca, pmcregs_in_use);
 238 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
 239         OFFSET(PACA_PMCINUSE, paca_struct, pmcregs_in_use);
 240 #endif
 241         OFFSET(LPPACA_DTLIDX, lppaca, dtl_idx);
 242         OFFSET(LPPACA_YIELDCOUNT, lppaca, yield_count);
 243         OFFSET(PACA_DTL_RIDX, paca_struct, dtl_ridx);
 244 #endif /* CONFIG_PPC_BOOK3S_64 */
 245         OFFSET(PACAEMERGSP, paca_struct, emergency_sp);
 246 #ifdef CONFIG_PPC_BOOK3S_64
 247         OFFSET(PACAMCEMERGSP, paca_struct, mc_emergency_sp);
 248         OFFSET(PACA_NMI_EMERG_SP, paca_struct, nmi_emergency_sp);
 249         OFFSET(PACA_IN_MCE, paca_struct, in_mce);
 250         OFFSET(PACA_IN_NMI, paca_struct, in_nmi);
 251         OFFSET(PACA_RFI_FLUSH_FALLBACK_AREA, paca_struct, rfi_flush_fallback_area);
 252         OFFSET(PACA_EXRFI, paca_struct, exrfi);
 253         OFFSET(PACA_L1D_FLUSH_SIZE, paca_struct, l1d_flush_size);
 254
 255 #endif
 256         OFFSET(PACAHWCPUID, paca_struct, hw_cpu_id);
 257         OFFSET(PACAKEXECSTATE, paca_struct, kexec_state);
 258         OFFSET(PACA_DSCR_DEFAULT, paca_struct, dscr_default);
 259         OFFSET(ACCOUNT_STARTTIME, paca_struct, accounting.starttime);
 260         OFFSET(ACCOUNT_STARTTIME_USER, paca_struct, accounting.starttime_user);
 261         OFFSET(ACCOUNT_USER_TIME, paca_struct, accounting.utime);
 262         OFFSET(ACCOUNT_SYSTEM_TIME, paca_struct, accounting.stime);
 263         OFFSET(PACA_TRAP_SAVE, paca_struct, trap_save);
 264         OFFSET(PACA_NAPSTATELOST, paca_struct, nap_state_lost);
 265         OFFSET(PACA_SPRG_VDSO, paca_struct, sprg_vdso);
 266 #else /* CONFIG_PPC64 */
 267 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
 268         OFFSET(ACCOUNT_STARTTIME, thread_info, accounting.starttime);
 269         OFFSET(ACCOUNT_STARTTIME_USER, thread_info, accounting.starttime_user);
 270         OFFSET(ACCOUNT_USER_TIME, thread_info, accounting.utime);
 271         OFFSET(ACCOUNT_SYSTEM_TIME, thread_info, accounting.stime);
 272 #endif
 273 #endif /* CONFIG_PPC64 */
 274
 275         /* RTAS */
 276         OFFSET(RTASBASE, rtas_t, base);
 277         OFFSET(RTASENTRY, rtas_t, entry);
 278
 279         /* Interrupt register frame */
 280         DEFINE(INT_FRAME_SIZE, STACK_INT_FRAME_SIZE);
 281         DEFINE(SWITCH_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs));
 282         STACK_PT_REGS_OFFSET(GPR0, gpr[0]);
 283         STACK_PT_REGS_OFFSET(GPR1, gpr[1]);
 284         STACK_PT_REGS_OFFSET(GPR2, gpr[2]);
 285         STACK_PT_REGS_OFFSET(GPR3, gpr[3]);
 286         STACK_PT_REGS_OFFSET(GPR4, gpr[4]);
 287         STACK_PT_REGS_OFFSET(GPR5, gpr[5]);
 288         STACK_PT_REGS_OFFSET(GPR6, gpr[6]);
 289         STACK_PT_REGS_OFFSET(GPR7, gpr[7]);
 290         STACK_PT_REGS_OFFSET(GPR8, gpr[8]);
 291         STACK_PT_REGS_OFFSET(GPR9, gpr[9]);
 292         STACK_PT_REGS_OFFSET(GPR10, gpr[10]);
 293         STACK_PT_REGS_OFFSET(GPR11, gpr[11]);
 294         STACK_PT_REGS_OFFSET(GPR12, gpr[12]);
 295         STACK_PT_REGS_OFFSET(GPR13, gpr[13]);
 296 #ifndef CONFIG_PPC64
 297         STACK_PT_REGS_OFFSET(GPR14, gpr[14]);
 298 #endif /* CONFIG_PPC64 */
 299         /*
 300          * Note: these symbols include _ because they overlap with special
 301          * register names
 302          */
 303         STACK_PT_REGS_OFFSET(_NIP, nip);
 304         STACK_PT_REGS_OFFSET(_MSR, msr);
 305         STACK_PT_REGS_OFFSET(_CTR, ctr);
 306         STACK_PT_REGS_OFFSET(_LINK, link);
 307         STACK_PT_REGS_OFFSET(_CCR, ccr);
 308         STACK_PT_REGS_OFFSET(_XER, xer);
 309         STACK_PT_REGS_OFFSET(_DAR, dar);
 310         STACK_PT_REGS_OFFSET(_DSISR, dsisr);
 311         STACK_PT_REGS_OFFSET(ORIG_GPR3, orig_gpr3);
 312         STACK_PT_REGS_OFFSET(RESULT, result);
 313         STACK_PT_REGS_OFFSET(_TRAP, trap);
 314 #ifndef CONFIG_PPC64
 315         /*
 316          * The PowerPC 400-class & Book-E processors have neither the DAR
 317          * nor the DSISR SPRs. Hence, we overload them to hold the similar
 318          * DEAR and ESR SPRs for such processors.  For critical interrupts
 319          * we use them to hold SRR0 and SRR1.
 320          */
 321         STACK_PT_REGS_OFFSET(_DEAR, dar);
 322         STACK_PT_REGS_OFFSET(_ESR, dsisr);
 323 #else /* CONFIG_PPC64 */
 324         STACK_PT_REGS_OFFSET(SOFTE, softe);
 325         STACK_PT_REGS_OFFSET(_PPR, ppr);
 326 #endif /* CONFIG_PPC64 */
 327
 328 #if defined(CONFIG_PPC32)
 329 #if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
 330         DEFINE(EXC_LVL_SIZE, STACK_EXC_LVL_FRAME_SIZE);
 331         DEFINE(MAS0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0));
 332         /* we overload MMUCR for 44x on MAS0 since they are mutually exclusive */
 333         DEFINE(MMUCR, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0));
 334         DEFINE(MAS1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas1));
 335         DEFINE(MAS2, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas2));
 336         DEFINE(MAS3, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas3));
 337         DEFINE(MAS6, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas6));
 338         DEFINE(MAS7, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas7));
 339         DEFINE(_SRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr0));
 340         DEFINE(_SRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr1));
 341         DEFINE(_CSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr0));
 342         DEFINE(_CSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr1));
 343         DEFINE(_DSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr0));
 344         DEFINE(_DSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr1));
 345         DEFINE(SAVED_KSP_LIMIT, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, saved_ksp_limit));
 346 #endif
 347 #endif
 348
 349 #ifndef CONFIG_PPC64
 350         OFFSET(MM_PGD, mm_struct, pgd);
 351 #endif /* ! CONFIG_PPC64 */
 352
 353         /* About the CPU features table */
 354         OFFSET(CPU_SPEC_FEATURES, cpu_spec, cpu_features);
 355         OFFSET(CPU_SPEC_SETUP, cpu_spec, cpu_setup);
 356         OFFSET(CPU_SPEC_RESTORE, cpu_spec, cpu_restore);
 357
 358         OFFSET(pbe_address, pbe, address);
 359         OFFSET(pbe_orig_address, pbe, orig_address);
 360         OFFSET(pbe_next, pbe, next);
 361
 362 #ifndef CONFIG_PPC64
 363         DEFINE(TASK_SIZE, TASK_SIZE);
 364         DEFINE(NUM_USER_SEGMENTS, TASK_SIZE>>28);
 365 #endif /* ! CONFIG_PPC64 */
 366
 367         /* datapage offsets for use by vdso */
 368         OFFSET(CFG_TB_ORIG_STAMP, vdso_data, tb_orig_stamp);
 369         OFFSET(CFG_TB_TICKS_PER_SEC, vdso_data, tb_ticks_per_sec);
 370         OFFSET(CFG_TB_TO_XS, vdso_data, tb_to_xs);
 371         OFFSET(CFG_TB_UPDATE_COUNT, vdso_data, tb_update_count);
 372         OFFSET(CFG_TZ_MINUTEWEST, vdso_data, tz_minuteswest);
 373         OFFSET(CFG_TZ_DSTTIME, vdso_data, tz_dsttime);
 374         OFFSET(CFG_SYSCALL_MAP32, vdso_data, syscall_map_32);
 375         OFFSET(WTOM_CLOCK_SEC, vdso_data, wtom_clock_sec);
 376         OFFSET(WTOM_CLOCK_NSEC, vdso_data, wtom_clock_nsec);
 377         OFFSET(STAMP_XTIME, vdso_data, stamp_xtime);
 378         OFFSET(STAMP_SEC_FRAC, vdso_data, stamp_sec_fraction);
 379         OFFSET(CFG_ICACHE_BLOCKSZ, vdso_data, icache_block_size);
 380         OFFSET(CFG_DCACHE_BLOCKSZ, vdso_data, dcache_block_size);
 381         OFFSET(CFG_ICACHE_LOGBLOCKSZ, vdso_data, icache_log_block_size);
 382         OFFSET(CFG_DCACHE_LOGBLOCKSZ, vdso_data, dcache_log_block_size);
 383 #ifdef CONFIG_PPC64
 384         OFFSET(CFG_SYSCALL_MAP64, vdso_data, syscall_map_64);
 385         OFFSET(TVAL64_TV_SEC, timeval, tv_sec);
 386         OFFSET(TVAL64_TV_USEC, timeval, tv_usec);
 387         OFFSET(TVAL32_TV_SEC, old_timeval32, tv_sec);
 388         OFFSET(TVAL32_TV_USEC, old_timeval32, tv_usec);
 389         OFFSET(TSPC64_TV_SEC, timespec, tv_sec);
 390         OFFSET(TSPC64_TV_NSEC, timespec, tv_nsec);
 391         OFFSET(TSPC32_TV_SEC, old_timespec32, tv_sec);
 392         OFFSET(TSPC32_TV_NSEC, old_timespec32, tv_nsec);
 393 #else
 394         OFFSET(TVAL32_TV_SEC, timeval, tv_sec);
 395         OFFSET(TVAL32_TV_USEC, timeval, tv_usec);
 396         OFFSET(TSPC32_TV_SEC, timespec, tv_sec);
 397         OFFSET(TSPC32_TV_NSEC, timespec, tv_nsec);
 398 #endif
 399         /* timeval/timezone offsets for use by vdso */
 400         OFFSET(TZONE_TZ_MINWEST, timezone, tz_minuteswest);
 401         OFFSET(TZONE_TZ_DSTTIME, timezone, tz_dsttime);
 402
 403         /* Other bits used by the vdso */
 404         DEFINE(CLOCK_REALTIME, CLOCK_REALTIME);
 405         DEFINE(CLOCK_MONOTONIC, CLOCK_MONOTONIC);
 406         DEFINE(CLOCK_REALTIME_COARSE, CLOCK_REALTIME_COARSE);
 407         DEFINE(CLOCK_MONOTONIC_COARSE, CLOCK_MONOTONIC_COARSE);
 408         DEFINE(NSEC_PER_SEC, NSEC_PER_SEC);
 409         DEFINE(CLOCK_REALTIME_RES, MONOTONIC_RES_NSEC);
 410
 411 #ifdef CONFIG_BUG
 412         DEFINE(BUG_ENTRY_SIZE, sizeof(struct bug_entry));
 413 #endif
 414
 415 #ifdef CONFIG_PPC_BOOK3S_64
 416         DEFINE(PGD_TABLE_SIZE, (sizeof(pgd_t) << max(RADIX_PGD_INDEX_SIZE, H_PGD_INDEX_SIZE)));
 417 #else
 418         DEFINE(PGD_TABLE_SIZE, PGD_TABLE_SIZE);
 419 #endif
 420         DEFINE(PTE_SIZE, sizeof(pte_t));
 421
 422 #ifdef CONFIG_KVM
 423         OFFSET(VCPU_HOST_STACK, kvm_vcpu, arch.host_stack);
 424         OFFSET(VCPU_HOST_PID, kvm_vcpu, arch.host_pid);
 425         OFFSET(VCPU_GUEST_PID, kvm_vcpu, arch.pid);
 426         OFFSET(VCPU_GPRS, kvm_vcpu, arch.regs.gpr);
 427         OFFSET(VCPU_VRSAVE, kvm_vcpu, arch.vrsave);
 428         OFFSET(VCPU_FPRS, kvm_vcpu, arch.fp.fpr);
 429 #ifdef CONFIG_ALTIVEC
 430         OFFSET(VCPU_VRS, kvm_vcpu, arch.vr.vr);
 431 #endif
 432         OFFSET(VCPU_XER, kvm_vcpu, arch.regs.xer);
 433         OFFSET(VCPU_CTR, kvm_vcpu, arch.regs.ctr);
 434         OFFSET(VCPU_LR, kvm_vcpu, arch.regs.link);
 435 #ifdef CONFIG_PPC_BOOK3S
 436         OFFSET(VCPU_TAR, kvm_vcpu, arch.tar);
 437 #endif
 438         OFFSET(VCPU_CR, kvm_vcpu, arch.regs.ccr);
 439         OFFSET(VCPU_PC, kvm_vcpu, arch.regs.nip);
 440 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
 441         OFFSET(VCPU_MSR, kvm_vcpu, arch.shregs.msr);
 442         OFFSET(VCPU_SRR0, kvm_vcpu, arch.shregs.srr0);
 443         OFFSET(VCPU_SRR1, kvm_vcpu, arch.shregs.srr1);
 444         OFFSET(VCPU_SPRG0, kvm_vcpu, arch.shregs.sprg0);
 445         OFFSET(VCPU_SPRG1, kvm_vcpu, arch.shregs.sprg1);
 446         OFFSET(VCPU_SPRG2, kvm_vcpu, arch.shregs.sprg2);
 447         OFFSET(VCPU_SPRG3, kvm_vcpu, arch.shregs.sprg3);
 448 #endif
 449 #ifdef CONFIG_KVM_BOOK3S_HV_EXIT_TIMING
 450         OFFSET(VCPU_TB_RMENTRY, kvm_vcpu, arch.rm_entry);
 451         OFFSET(VCPU_TB_RMINTR, kvm_vcpu, arch.rm_intr);
 452         OFFSET(VCPU_TB_RMEXIT, kvm_vcpu, arch.rm_exit);
 453         OFFSET(VCPU_TB_GUEST, kvm_vcpu, arch.guest_time);
 454         OFFSET(VCPU_TB_CEDE, kvm_vcpu, arch.cede_time);
 455         OFFSET(VCPU_CUR_ACTIVITY, kvm_vcpu, arch.cur_activity);
 456         OFFSET(VCPU_ACTIVITY_START, kvm_vcpu, arch.cur_tb_start);
 457         OFFSET(TAS_SEQCOUNT, kvmhv_tb_accumulator, seqcount);
 458         OFFSET(TAS_TOTAL, kvmhv_tb_accumulator, tb_total);
 459         OFFSET(TAS_MIN, kvmhv_tb_accumulator, tb_min);
 460         OFFSET(TAS_MAX, kvmhv_tb_accumulator, tb_max);
 461 #endif
 462         OFFSET(VCPU_SHARED_SPRG3, kvm_vcpu_arch_shared, sprg3);
 463         OFFSET(VCPU_SHARED_SPRG4, kvm_vcpu_arch_shared, sprg4);
 464         OFFSET(VCPU_SHARED_SPRG5, kvm_vcpu_arch_shared, sprg5);
 465         OFFSET(VCPU_SHARED_SPRG6, kvm_vcpu_arch_shared, sprg6);
 466         OFFSET(VCPU_SHARED_SPRG7, kvm_vcpu_arch_shared, sprg7);
 467         OFFSET(VCPU_SHADOW_PID, kvm_vcpu, arch.shadow_pid);
 468         OFFSET(VCPU_SHADOW_PID1, kvm_vcpu, arch.shadow_pid1);
 469         OFFSET(VCPU_SHARED, kvm_vcpu, arch.shared);
 470         OFFSET(VCPU_SHARED_MSR, kvm_vcpu_arch_shared, msr);
 471         OFFSET(VCPU_SHADOW_MSR, kvm_vcpu, arch.shadow_msr);
 472 #if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_KVM_BOOK3S_PR_POSSIBLE)
 473         OFFSET(VCPU_SHAREDBE, kvm_vcpu, arch.shared_big_endian);
 474 #endif
 475
 476         OFFSET(VCPU_SHARED_MAS0, kvm_vcpu_arch_shared, mas0);
 477         OFFSET(VCPU_SHARED_MAS1, kvm_vcpu_arch_shared, mas1);
 478         OFFSET(VCPU_SHARED_MAS2, kvm_vcpu_arch_shared, mas2);
 479         OFFSET(VCPU_SHARED_MAS7_3, kvm_vcpu_arch_shared, mas7_3);
 480         OFFSET(VCPU_SHARED_MAS4, kvm_vcpu_arch_shared, mas4);
 481         OFFSET(VCPU_SHARED_MAS6, kvm_vcpu_arch_shared, mas6);
 482
 483         OFFSET(VCPU_KVM, kvm_vcpu, kvm);
 484         OFFSET(KVM_LPID, kvm, arch.lpid);
 485
 486         /* book3s */
 487 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
 488         OFFSET(KVM_TLB_SETS, kvm, arch.tlb_sets);
 489         OFFSET(KVM_SDR1, kvm, arch.sdr1);
 490         OFFSET(KVM_HOST_LPID, kvm, arch.host_lpid);
 491         OFFSET(KVM_HOST_LPCR, kvm, arch.host_lpcr);
 492         OFFSET(KVM_HOST_SDR1, kvm, arch.host_sdr1);
 493         OFFSET(KVM_NEED_FLUSH, kvm, arch.need_tlb_flush.bits);
 494         OFFSET(KVM_ENABLED_HCALLS, kvm, arch.enabled_hcalls);
 495         OFFSET(KVM_VRMA_SLB_V, kvm, arch.vrma_slb_v);
 496         OFFSET(KVM_RADIX, kvm, arch.radix);
 497         OFFSET(KVM_FWNMI, kvm, arch.fwnmi_enabled);
 498         OFFSET(VCPU_DSISR, kvm_vcpu, arch.shregs.dsisr);
 499         OFFSET(VCPU_DAR, kvm_vcpu, arch.shregs.dar);
 500         OFFSET(VCPU_VPA, kvm_vcpu, arch.vpa.pinned_addr);
 501         OFFSET(VCPU_VPA_DIRTY, kvm_vcpu, arch.vpa.dirty);
 502         OFFSET(VCPU_HEIR, kvm_vcpu, arch.emul_inst);
 503         OFFSET(VCPU_NESTED, kvm_vcpu, arch.nested);
 504         OFFSET(VCPU_CPU, kvm_vcpu, cpu);
 505         OFFSET(VCPU_THREAD_CPU, kvm_vcpu, arch.thread_cpu);
 506 #endif
 507 #ifdef CONFIG_PPC_BOOK3S
 508         OFFSET(VCPU_PURR, kvm_vcpu, arch.purr);
 509         OFFSET(VCPU_SPURR, kvm_vcpu, arch.spurr);
 510         OFFSET(VCPU_IC, kvm_vcpu, arch.ic);
 511         OFFSET(VCPU_DSCR, kvm_vcpu, arch.dscr);
 512         OFFSET(VCPU_AMR, kvm_vcpu, arch.amr);
 513         OFFSET(VCPU_UAMOR, kvm_vcpu, arch.uamor);
 514         OFFSET(VCPU_IAMR, kvm_vcpu, arch.iamr);
 515         OFFSET(VCPU_CTRL, kvm_vcpu, arch.ctrl);
 516         OFFSET(VCPU_DABR, kvm_vcpu, arch.dabr);
 517         OFFSET(VCPU_DABRX, kvm_vcpu, arch.dabrx);
 518         OFFSET(VCPU_DAWR, kvm_vcpu, arch.dawr);
 519         OFFSET(VCPU_DAWRX, kvm_vcpu, arch.dawrx);
 520         OFFSET(VCPU_CIABR, kvm_vcpu, arch.ciabr);
 521         OFFSET(VCPU_HFLAGS, kvm_vcpu, arch.hflags);
 522         OFFSET(VCPU_DEC, kvm_vcpu, arch.dec);
 523         OFFSET(VCPU_DEC_EXPIRES, kvm_vcpu, arch.dec_expires);
 524         OFFSET(VCPU_PENDING_EXC, kvm_vcpu, arch.pending_exceptions);
 525         OFFSET(VCPU_CEDED, kvm_vcpu, arch.ceded);
 526         OFFSET(VCPU_PRODDED, kvm_vcpu, arch.prodded);
 527         OFFSET(VCPU_IRQ_PENDING, kvm_vcpu, arch.irq_pending);
 528         OFFSET(VCPU_DBELL_REQ, kvm_vcpu, arch.doorbell_request);
 529         OFFSET(VCPU_MMCR, kvm_vcpu, arch.mmcr);
 530         OFFSET(VCPU_PMC, kvm_vcpu, arch.pmc);
 531         OFFSET(VCPU_SPMC, kvm_vcpu, arch.spmc);
 532         OFFSET(VCPU_SIAR, kvm_vcpu, arch.siar);
 533         OFFSET(VCPU_SDAR, kvm_vcpu, arch.sdar);
 534         OFFSET(VCPU_SIER, kvm_vcpu, arch.sier);
 535         OFFSET(VCPU_SLB, kvm_vcpu, arch.slb);
 536         OFFSET(VCPU_SLB_MAX, kvm_vcpu, arch.slb_max);
 537         OFFSET(VCPU_SLB_NR, kvm_vcpu, arch.slb_nr);
 538         OFFSET(VCPU_FAULT_DSISR, kvm_vcpu, arch.fault_dsisr);
 539         OFFSET(VCPU_FAULT_DAR, kvm_vcpu, arch.fault_dar);
 540         OFFSET(VCPU_FAULT_GPA, kvm_vcpu, arch.fault_gpa);
 541         OFFSET(VCPU_INTR_MSR, kvm_vcpu, arch.intr_msr);
 542         OFFSET(VCPU_LAST_INST, kvm_vcpu, arch.last_inst);
 543         OFFSET(VCPU_TRAP, kvm_vcpu, arch.trap);
 544         OFFSET(VCPU_CFAR, kvm_vcpu, arch.cfar);
 545         OFFSET(VCPU_PPR, kvm_vcpu, arch.ppr);
 546         OFFSET(VCPU_FSCR, kvm_vcpu, arch.fscr);
 547         OFFSET(VCPU_PSPB, kvm_vcpu, arch.pspb);
 548         OFFSET(VCPU_EBBHR, kvm_vcpu, arch.ebbhr);
 549         OFFSET(VCPU_EBBRR, kvm_vcpu, arch.ebbrr);
 550         OFFSET(VCPU_BESCR, kvm_vcpu, arch.bescr);
 551         OFFSET(VCPU_CSIGR, kvm_vcpu, arch.csigr);
 552         OFFSET(VCPU_TACR, kvm_vcpu, arch.tacr);
 553         OFFSET(VCPU_TCSCR, kvm_vcpu, arch.tcscr);
 554         OFFSET(VCPU_ACOP, kvm_vcpu, arch.acop);
 555         OFFSET(VCPU_WORT, kvm_vcpu, arch.wort);
 556         OFFSET(VCPU_TID, kvm_vcpu, arch.tid);
 557         OFFSET(VCPU_PSSCR, kvm_vcpu, arch.psscr);
 558         OFFSET(VCPU_HFSCR, kvm_vcpu, arch.hfscr);
 559         OFFSET(VCORE_ENTRY_EXIT, kvmppc_vcore, entry_exit_map);
 560         OFFSET(VCORE_IN_GUEST, kvmppc_vcore, in_guest);
 561         OFFSET(VCORE_NAPPING_THREADS, kvmppc_vcore, napping_threads);
 562         OFFSET(VCORE_KVM, kvmppc_vcore, kvm);
 563         OFFSET(VCORE_TB_OFFSET, kvmppc_vcore, tb_offset);
 564         OFFSET(VCORE_TB_OFFSET_APPL, kvmppc_vcore, tb_offset_applied);
 565         OFFSET(VCORE_LPCR, kvmppc_vcore, lpcr);
 566         OFFSET(VCORE_PCR, kvmppc_vcore, pcr);
 567         OFFSET(VCORE_DPDES, kvmppc_vcore, dpdes);
 568         OFFSET(VCORE_VTB, kvmppc_vcore, vtb);
 569         OFFSET(VCPU_SLB_E, kvmppc_slb, orige);
 570         OFFSET(VCPU_SLB_V, kvmppc_slb, origv);
 571         DEFINE(VCPU_SLB_SIZE, sizeof(struct kvmppc_slb));
 572 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
 573         OFFSET(VCPU_TFHAR, kvm_vcpu, arch.tfhar);
 574         OFFSET(VCPU_TFIAR, kvm_vcpu, arch.tfiar);
 575         OFFSET(VCPU_TEXASR, kvm_vcpu, arch.texasr);
 576         OFFSET(VCPU_ORIG_TEXASR, kvm_vcpu, arch.orig_texasr);
 577         OFFSET(VCPU_GPR_TM, kvm_vcpu, arch.gpr_tm);
 578         OFFSET(VCPU_FPRS_TM, kvm_vcpu, arch.fp_tm.fpr);
 579         OFFSET(VCPU_VRS_TM, kvm_vcpu, arch.vr_tm.vr);
 580         OFFSET(VCPU_VRSAVE_TM, kvm_vcpu, arch.vrsave_tm);
 581         OFFSET(VCPU_CR_TM, kvm_vcpu, arch.cr_tm);
 582         OFFSET(VCPU_XER_TM, kvm_vcpu, arch.xer_tm);
 583         OFFSET(VCPU_LR_TM, kvm_vcpu, arch.lr_tm);
 584         OFFSET(VCPU_CTR_TM, kvm_vcpu, arch.ctr_tm);
 585         OFFSET(VCPU_AMR_TM, kvm_vcpu, arch.amr_tm);
 586         OFFSET(VCPU_PPR_TM, kvm_vcpu, arch.ppr_tm);
 587         OFFSET(VCPU_DSCR_TM, kvm_vcpu, arch.dscr_tm);
 588         OFFSET(VCPU_TAR_TM, kvm_vcpu, arch.tar_tm);
 589 #endif
 590
 591 #ifdef CONFIG_PPC_BOOK3S_64
 592 #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
 593         OFFSET(PACA_SVCPU, paca_struct, shadow_vcpu);
 594 # define SVCPU_FIELD(x, f)      DEFINE(x, offsetof(struct paca_struct, shadow_vcpu.f))
 595 #else
 596 # define SVCPU_FIELD(x, f)
 597 #endif
 598 # define HSTATE_FIELD(x, f)     DEFINE(x, offsetof(struct paca_struct, kvm_hstate.f))
 599 #else   /* 32-bit */
 600 # define SVCPU_FIELD(x, f)      DEFINE(x, offsetof(struct kvmppc_book3s_shadow_vcpu, f))
 601 # define HSTATE_FIELD(x, f)     DEFINE(x, offsetof(struct kvmppc_book3s_shadow_vcpu, hstate.f))
 602 #endif
 603
 604         SVCPU_FIELD(SVCPU_CR, cr);
 605         SVCPU_FIELD(SVCPU_XER, xer);
 606         SVCPU_FIELD(SVCPU_CTR, ctr);
 607         SVCPU_FIELD(SVCPU_LR, lr);
 608         SVCPU_FIELD(SVCPU_PC, pc);
 609         SVCPU_FIELD(SVCPU_R0, gpr[0]);
 610         SVCPU_FIELD(SVCPU_R1, gpr[1]);
 611         SVCPU_FIELD(SVCPU_R2, gpr[2]);
 612         SVCPU_FIELD(SVCPU_R3, gpr[3]);
 613         SVCPU_FIELD(SVCPU_R4, gpr[4]);
 614         SVCPU_FIELD(SVCPU_R5, gpr[5]);
 615         SVCPU_FIELD(SVCPU_R6, gpr[6]);
 616         SVCPU_FIELD(SVCPU_R7, gpr[7]);
 617         SVCPU_FIELD(SVCPU_R8, gpr[8]);
 618         SVCPU_FIELD(SVCPU_R9, gpr[9]);
 619         SVCPU_FIELD(SVCPU_R10, gpr[10]);
 620         SVCPU_FIELD(SVCPU_R11, gpr[11]);
 621         SVCPU_FIELD(SVCPU_R12, gpr[12]);
 622         SVCPU_FIELD(SVCPU_R13, gpr[13]);
 623         SVCPU_FIELD(SVCPU_FAULT_DSISR, fault_dsisr);
 624         SVCPU_FIELD(SVCPU_FAULT_DAR, fault_dar);
 625         SVCPU_FIELD(SVCPU_LAST_INST, last_inst);
 626         SVCPU_FIELD(SVCPU_SHADOW_SRR1, shadow_srr1);
 627 #ifdef CONFIG_PPC_BOOK3S_32
 628         SVCPU_FIELD(SVCPU_SR, sr);
 629 #endif
 630 #ifdef CONFIG_PPC64
 631         SVCPU_FIELD(SVCPU_SLB, slb);
 632         SVCPU_FIELD(SVCPU_SLB_MAX, slb_max);
 633         SVCPU_FIELD(SVCPU_SHADOW_FSCR, shadow_fscr);
 634 #endif
 635
 636         HSTATE_FIELD(HSTATE_HOST_R1, host_r1);
 637         HSTATE_FIELD(HSTATE_HOST_R2, host_r2);
 638         HSTATE_FIELD(HSTATE_HOST_MSR, host_msr);
 639         HSTATE_FIELD(HSTATE_VMHANDLER, vmhandler);
 640         HSTATE_FIELD(HSTATE_SCRATCH0, scratch0);
 641         HSTATE_FIELD(HSTATE_SCRATCH1, scratch1);
 642         HSTATE_FIELD(HSTATE_SCRATCH2, scratch2);
 643         HSTATE_FIELD(HSTATE_IN_GUEST, in_guest);
 644         HSTATE_FIELD(HSTATE_RESTORE_HID5, restore_hid5);
 645         HSTATE_FIELD(HSTATE_NAPPING, napping);
 646
 647 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
 648         HSTATE_FIELD(HSTATE_HWTHREAD_REQ, hwthread_req);
 649         HSTATE_FIELD(HSTATE_HWTHREAD_STATE, hwthread_state);
 650         HSTATE_FIELD(HSTATE_KVM_VCPU, kvm_vcpu);
 651         HSTATE_FIELD(HSTATE_KVM_VCORE, kvm_vcore);
 652         HSTATE_FIELD(HSTATE_XICS_PHYS, xics_phys);
 653         HSTATE_FIELD(HSTATE_XIVE_TIMA_PHYS, xive_tima_phys);
 654         HSTATE_FIELD(HSTATE_XIVE_TIMA_VIRT, xive_tima_virt);
 655         HSTATE_FIELD(HSTATE_SAVED_XIRR, saved_xirr);
 656         HSTATE_FIELD(HSTATE_HOST_IPI, host_ipi);
 657         HSTATE_FIELD(HSTATE_PTID, ptid);
 658         HSTATE_FIELD(HSTATE_TID, tid);
 659         HSTATE_FIELD(HSTATE_FAKE_SUSPEND, fake_suspend);
 660         HSTATE_FIELD(HSTATE_MMCR0, host_mmcr[0]);
 661         HSTATE_FIELD(HSTATE_MMCR1, host_mmcr[1]);
 662         HSTATE_FIELD(HSTATE_MMCRA, host_mmcr[2]);
 663         HSTATE_FIELD(HSTATE_SIAR, host_mmcr[3]);
 664         HSTATE_FIELD(HSTATE_SDAR, host_mmcr[4]);
 665         HSTATE_FIELD(HSTATE_MMCR2, host_mmcr[5]);
 666         HSTATE_FIELD(HSTATE_SIER, host_mmcr[6]);
 667         HSTATE_FIELD(HSTATE_PMC1, host_pmc[0]);
 668         HSTATE_FIELD(HSTATE_PMC2, host_pmc[1]);
 669         HSTATE_FIELD(HSTATE_PMC3, host_pmc[2]);
 670         HSTATE_FIELD(HSTATE_PMC4, host_pmc[3]);
 671         HSTATE_FIELD(HSTATE_PMC5, host_pmc[4]);
 672         HSTATE_FIELD(HSTATE_PMC6, host_pmc[5]);
 673         HSTATE_FIELD(HSTATE_PURR, host_purr);
 674         HSTATE_FIELD(HSTATE_SPURR, host_spurr);
 675         HSTATE_FIELD(HSTATE_DSCR, host_dscr);
 676         HSTATE_FIELD(HSTATE_DABR, dabr);
 677         HSTATE_FIELD(HSTATE_DECEXP, dec_expires);
 678         HSTATE_FIELD(HSTATE_SPLIT_MODE, kvm_split_mode);
 679         DEFINE(IPI_PRIORITY, IPI_PRIORITY);
 680         OFFSET(KVM_SPLIT_RPR, kvm_split_mode, rpr);
 681         OFFSET(KVM_SPLIT_PMMAR, kvm_split_mode, pmmar);
 682         OFFSET(KVM_SPLIT_LDBAR, kvm_split_mode, ldbar);
 683         OFFSET(KVM_SPLIT_DO_NAP, kvm_split_mode, do_nap);
 684         OFFSET(KVM_SPLIT_NAPPED, kvm_split_mode, napped);
 685         OFFSET(KVM_SPLIT_DO_SET, kvm_split_mode, do_set);
 686         OFFSET(KVM_SPLIT_DO_RESTORE, kvm_split_mode, do_restore);
 687 #endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
 688
 689 #ifdef CONFIG_PPC_BOOK3S_64
 690         HSTATE_FIELD(HSTATE_CFAR, cfar);
 691         HSTATE_FIELD(HSTATE_PPR, ppr);
 692         HSTATE_FIELD(HSTATE_HOST_FSCR, host_fscr);
 693 #endif /* CONFIG_PPC_BOOK3S_64 */
 694
 695 #else /* CONFIG_PPC_BOOK3S */
 696         OFFSET(VCPU_CR, kvm_vcpu, arch.regs.ccr);
 697         OFFSET(VCPU_XER, kvm_vcpu, arch.regs.xer);
 698         OFFSET(VCPU_LR, kvm_vcpu, arch.regs.link);
 699         OFFSET(VCPU_CTR, kvm_vcpu, arch.regs.ctr);
 700         OFFSET(VCPU_PC, kvm_vcpu, arch.regs.nip);
 701         OFFSET(VCPU_SPRG9, kvm_vcpu, arch.sprg9);
 702         OFFSET(VCPU_LAST_INST, kvm_vcpu, arch.last_inst);
 703         OFFSET(VCPU_FAULT_DEAR, kvm_vcpu, arch.fault_dear);
 704         OFFSET(VCPU_FAULT_ESR, kvm_vcpu, arch.fault_esr);
 705         OFFSET(VCPU_CRIT_SAVE, kvm_vcpu, arch.crit_save);
 706 #endif /* CONFIG_PPC_BOOK3S */
 707 #endif /* CONFIG_KVM */
 708
 709 #ifdef CONFIG_KVM_GUEST
 710         OFFSET(KVM_MAGIC_SCRATCH1, kvm_vcpu_arch_shared, scratch1);
 711         OFFSET(KVM_MAGIC_SCRATCH2, kvm_vcpu_arch_shared, scratch2);
 712         OFFSET(KVM_MAGIC_SCRATCH3, kvm_vcpu_arch_shared, scratch3);
 713         OFFSET(KVM_MAGIC_INT, kvm_vcpu_arch_shared, int_pending);
 714         OFFSET(KVM_MAGIC_MSR, kvm_vcpu_arch_shared, msr);
 715         OFFSET(KVM_MAGIC_CRITICAL, kvm_vcpu_arch_shared, critical);
 716         OFFSET(KVM_MAGIC_SR, kvm_vcpu_arch_shared, sr);
 717 #endif
 718
 719 #ifdef CONFIG_44x
 720         DEFINE(PGD_T_LOG2, PGD_T_LOG2);
 721         DEFINE(PTE_T_LOG2, PTE_T_LOG2);
 722 #endif
 723 #ifdef CONFIG_PPC_FSL_BOOK3E
 724         DEFINE(TLBCAM_SIZE, sizeof(struct tlbcam));
 725         OFFSET(TLBCAM_MAS0, tlbcam, MAS0);
 726         OFFSET(TLBCAM_MAS1, tlbcam, MAS1);
 727         OFFSET(TLBCAM_MAS2, tlbcam, MAS2);
 728         OFFSET(TLBCAM_MAS3, tlbcam, MAS3);
 729         OFFSET(TLBCAM_MAS7, tlbcam, MAS7);
 730 #endif
 731
 732 #if defined(CONFIG_KVM) && defined(CONFIG_SPE)
 733         OFFSET(VCPU_EVR, kvm_vcpu, arch.evr[0]);
 734         OFFSET(VCPU_ACC, kvm_vcpu, arch.acc);
 735         OFFSET(VCPU_SPEFSCR, kvm_vcpu, arch.spefscr);
 736         OFFSET(VCPU_HOST_SPEFSCR, kvm_vcpu, arch.host_spefscr);
 737 #endif
 738
 739 #ifdef CONFIG_KVM_BOOKE_HV
 740         OFFSET(VCPU_HOST_MAS4, kvm_vcpu, arch.host_mas4);
 741         OFFSET(VCPU_HOST_MAS6, kvm_vcpu, arch.host_mas6);
 742 #endif
 743
 744 #ifdef CONFIG_KVM_XICS
 745         DEFINE(VCPU_XIVE_SAVED_STATE, offsetof(struct kvm_vcpu,
 746                                                arch.xive_saved_state));
 747         DEFINE(VCPU_XIVE_CAM_WORD, offsetof(struct kvm_vcpu,
 748                                             arch.xive_cam_word));
 749         DEFINE(VCPU_XIVE_PUSHED, offsetof(struct kvm_vcpu, arch.xive_pushed));
 750         DEFINE(VCPU_XIVE_ESC_ON, offsetof(struct kvm_vcpu, arch.xive_esc_on));
 751         DEFINE(VCPU_XIVE_ESC_RADDR, offsetof(struct kvm_vcpu, arch.xive_esc_raddr));
 752         DEFINE(VCPU_XIVE_ESC_VADDR, offsetof(struct kvm_vcpu, arch.xive_esc_vaddr));
 753 #endif
 754
 755 #ifdef CONFIG_KVM_EXIT_TIMING
 756         OFFSET(VCPU_TIMING_EXIT_TBU, kvm_vcpu, arch.timing_exit.tv32.tbu);
 757         OFFSET(VCPU_TIMING_EXIT_TBL, kvm_vcpu, arch.timing_exit.tv32.tbl);
 758         OFFSET(VCPU_TIMING_LAST_ENTER_TBU, kvm_vcpu, arch.timing_last_enter.tv32.tbu);
 759         OFFSET(VCPU_TIMING_LAST_ENTER_TBL, kvm_vcpu, arch.timing_last_enter.tv32.tbl);
 760 #endif
 761
 762 #ifdef CONFIG_PPC_POWERNV
 763         OFFSET(PACA_CORE_IDLE_STATE_PTR, paca_struct, core_idle_state_ptr);
 764         OFFSET(PACA_THREAD_IDLE_STATE, paca_struct, thread_idle_state);
 765         OFFSET(PACA_THREAD_MASK, paca_struct, thread_mask);
 766         OFFSET(PACA_SUBCORE_SIBLING_MASK, paca_struct, subcore_sibling_mask);
 767         OFFSET(PACA_REQ_PSSCR, paca_struct, requested_psscr);
 768         OFFSET(PACA_DONT_STOP, paca_struct, dont_stop);
 769 #define STOP_SPR(x, f)  OFFSET(x, paca_struct, stop_sprs.f)
 770         STOP_SPR(STOP_PID, pid);
 771         STOP_SPR(STOP_LDBAR, ldbar);
 772         STOP_SPR(STOP_FSCR, fscr);
 773         STOP_SPR(STOP_HFSCR, hfscr);
 774         STOP_SPR(STOP_MMCR1, mmcr1);
 775         STOP_SPR(STOP_MMCR2, mmcr2);
 776         STOP_SPR(STOP_MMCRA, mmcra);
 777 #endif
 778
 779         DEFINE(PPC_DBELL_SERVER, PPC_DBELL_SERVER);
 780         DEFINE(PPC_DBELL_MSGTYPE, PPC_DBELL_MSGTYPE);
 781
 782 #ifdef CONFIG_PPC_8xx
 783         DEFINE(VIRT_IMMR_BASE, (u64)__fix_to_virt(FIX_IMMR_BASE));
 784 #endif
 785
 786         return 0;
 787 }