arch/powerpc/kernel/asm-offsets.c

   1 /*
   2  * This program is used to generate definitions needed by
   3  * assembly language modules.
   4  *
   5  * We use the technique used in the OSF Mach kernel code:
   6  * generate asm statements containing #defines,
   7  * compile this file to assembler, and then extract the
   8  * #defines from the assembly-language output.
   9  *
  10  * This program is free software; you can redistribute it and/or
  11  * modify it under the terms of the GNU General Public License
  12  * as published by the Free Software Foundation; either version
  13  * 2 of the License, or (at your option) any later version.
  14  */
  15
  16 #include <linux/compat.h>
  17 #include <linux/signal.h>
  18 #include <linux/sched.h>
  19 #include <linux/kernel.h>
  20 #include <linux/errno.h>
  21 #include <linux/string.h>
  22 #include <linux/types.h>
  23 #include <linux/mman.h>
  24 #include <linux/mm.h>
  25 #include <linux/suspend.h>
  26 #include <linux/hrtimer.h>
  27 #ifdef CONFIG_PPC64
  28 #include <linux/time.h>
  29 #include <linux/hardirq.h>
  30 #endif
  31 #include <linux/kbuild.h>
  32
  33 #include <asm/io.h>
  34 #include <asm/page.h>
  35 #include <asm/pgtable.h>
  36 #include <asm/processor.h>
  37 #include <asm/cputable.h>
  38 #include <asm/thread_info.h>
  39 #include <asm/rtas.h>
  40 #include <asm/vdso_datapage.h>
  41 #include <asm/dbell.h>
  42 #ifdef CONFIG_PPC64
  43 #include <asm/paca.h>
  44 #include <asm/lppaca.h>
  45 #include <asm/cache.h>
  46 #include <asm/mmu.h>
  47 #include <asm/hvcall.h>
  48 #include <asm/xics.h>
  49 #endif
  50 #ifdef CONFIG_PPC_POWERNV
  51 #include <asm/opal.h>
  52 #endif
  53 #if defined(CONFIG_KVM) || defined(CONFIG_KVM_GUEST)
  54 #include <linux/kvm_host.h>
  55 #endif
  56 #if defined(CONFIG_KVM) && defined(CONFIG_PPC_BOOK3S)
  57 #include <asm/kvm_book3s.h>
  58 #include <asm/kvm_ppc.h>
  59 #endif
  60
  61 #ifdef CONFIG_PPC32
  62 #if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
  63 #include "head_booke.h"
  64 #endif
  65 #endif
  66
  67 #if defined(CONFIG_PPC_FSL_BOOK3E)
  68 #include "../mm/mmu_decl.h"
  69 #endif
  70
  71 #ifdef CONFIG_PPC_8xx
  72 #include <asm/fixmap.h>
  73 #endif
  74
  75 #define STACK_PT_REGS_OFFSET(sym, val)  \
  76         DEFINE(sym, STACK_FRAME_OVERHEAD + offsetof(struct pt_regs, val))
  77
  78 int main(void)
  79 {
  80         OFFSET(THREAD, task_struct, thread);
  81         OFFSET(MM, task_struct, mm);
  82         OFFSET(MMCONTEXTID, mm_struct, context.id);
  83 #ifdef CONFIG_PPC64
  84         DEFINE(SIGSEGV, SIGSEGV);
  85         DEFINE(NMI_MASK, NMI_MASK);
  86         OFFSET(TASKTHREADPPR, task_struct, thread.ppr);
  87 #else
  88         OFFSET(THREAD_INFO, task_struct, stack);
  89         DEFINE(THREAD_INFO_GAP, _ALIGN_UP(sizeof(struct thread_info), 16));
  90         OFFSET(KSP_LIMIT, thread_struct, ksp_limit);
  91 #endif /* CONFIG_PPC64 */
  92
  93 #ifdef CONFIG_LIVEPATCH
  94         OFFSET(TI_livepatch_sp, thread_info, livepatch_sp);
  95 #endif
  96
  97         OFFSET(KSP, thread_struct, ksp);
  98         OFFSET(PT_REGS, thread_struct, regs);
  99 #ifdef CONFIG_BOOKE
 100         OFFSET(THREAD_NORMSAVES, thread_struct, normsave[0]);
 101 #endif
 102         OFFSET(THREAD_FPEXC_MODE, thread_struct, fpexc_mode);
 103         OFFSET(THREAD_FPSTATE, thread_struct, fp_state.fpr);
 104         OFFSET(THREAD_FPSAVEAREA, thread_struct, fp_save_area);
 105         OFFSET(FPSTATE_FPSCR, thread_fp_state, fpscr);
 106         OFFSET(THREAD_LOAD_FP, thread_struct, load_fp);
 107 #ifdef CONFIG_ALTIVEC
 108         OFFSET(THREAD_VRSTATE, thread_struct, vr_state.vr);
 109         OFFSET(THREAD_VRSAVEAREA, thread_struct, vr_save_area);
 110         OFFSET(THREAD_VRSAVE, thread_struct, vrsave);
 111         OFFSET(THREAD_USED_VR, thread_struct, used_vr);
 112         OFFSET(VRSTATE_VSCR, thread_vr_state, vscr);
 113         OFFSET(THREAD_LOAD_VEC, thread_struct, load_vec);
 114 #endif /* CONFIG_ALTIVEC */
 115 #ifdef CONFIG_VSX
 116         OFFSET(THREAD_USED_VSR, thread_struct, used_vsr);
 117 #endif /* CONFIG_VSX */
 118 #ifdef CONFIG_PPC64
 119         OFFSET(KSP_VSID, thread_struct, ksp_vsid);
 120 #else /* CONFIG_PPC64 */
 121         OFFSET(PGDIR, thread_struct, pgdir);
 122 #ifdef CONFIG_SPE
 123         OFFSET(THREAD_EVR0, thread_struct, evr[0]);
 124         OFFSET(THREAD_ACC, thread_struct, acc);
 125         OFFSET(THREAD_SPEFSCR, thread_struct, spefscr);
 126         OFFSET(THREAD_USED_SPE, thread_struct, used_spe);
 127 #endif /* CONFIG_SPE */
 128 #endif /* CONFIG_PPC64 */
 129 #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
 130         OFFSET(THREAD_DBCR0, thread_struct, debug.dbcr0);
 131 #endif
 132 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
 133         OFFSET(THREAD_KVM_SVCPU, thread_struct, kvm_shadow_vcpu);
 134 #endif
 135 #if defined(CONFIG_KVM) && defined(CONFIG_BOOKE)
 136         OFFSET(THREAD_KVM_VCPU, thread_struct, kvm_vcpu);
 137 #endif
 138
 139 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
 140         OFFSET(PACATMSCRATCH, paca_struct, tm_scratch);
 141         OFFSET(THREAD_TM_TFHAR, thread_struct, tm_tfhar);
 142         OFFSET(THREAD_TM_TEXASR, thread_struct, tm_texasr);
 143         OFFSET(THREAD_TM_TFIAR, thread_struct, tm_tfiar);
 144         OFFSET(THREAD_TM_TAR, thread_struct, tm_tar);
 145         OFFSET(THREAD_TM_PPR, thread_struct, tm_ppr);
 146         OFFSET(THREAD_TM_DSCR, thread_struct, tm_dscr);
 147         OFFSET(PT_CKPT_REGS, thread_struct, ckpt_regs);
 148         OFFSET(THREAD_CKVRSTATE, thread_struct, ckvr_state.vr);
 149         OFFSET(THREAD_CKVRSAVE, thread_struct, ckvrsave);
 150         OFFSET(THREAD_CKFPSTATE, thread_struct, ckfp_state.fpr);
 151         /* Local pt_regs on stack for Transactional Memory funcs. */
 152         DEFINE(TM_FRAME_SIZE, STACK_FRAME_OVERHEAD +
 153                sizeof(struct pt_regs) + 16);
 154 #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
 155
 156         OFFSET(TI_FLAGS, thread_info, flags);
 157         OFFSET(TI_LOCAL_FLAGS, thread_info, local_flags);
 158         OFFSET(TI_PREEMPT, thread_info, preempt_count);
 159         OFFSET(TI_TASK, thread_info, task);
 160         OFFSET(TI_CPU, thread_info, cpu);
 161
 162 #ifdef CONFIG_PPC64
 163         OFFSET(DCACHEL1BLOCKSIZE, ppc64_caches, l1d.block_size);
 164         OFFSET(DCACHEL1LOGBLOCKSIZE, ppc64_caches, l1d.log_block_size);
 165         OFFSET(DCACHEL1BLOCKSPERPAGE, ppc64_caches, l1d.blocks_per_page);
 166         OFFSET(ICACHEL1BLOCKSIZE, ppc64_caches, l1i.block_size);
 167         OFFSET(ICACHEL1LOGBLOCKSIZE, ppc64_caches, l1i.log_block_size);
 168         OFFSET(ICACHEL1BLOCKSPERPAGE, ppc64_caches, l1i.blocks_per_page);
 169         /* paca */
 170         DEFINE(PACA_SIZE, sizeof(struct paca_struct));
 171         OFFSET(PACAPACAINDEX, paca_struct, paca_index);
 172         OFFSET(PACAPROCSTART, paca_struct, cpu_start);
 173         OFFSET(PACAKSAVE, paca_struct, kstack);
 174         OFFSET(PACACURRENT, paca_struct, __current);
 175         OFFSET(PACASAVEDMSR, paca_struct, saved_msr);
 176         OFFSET(PACASTABRR, paca_struct, stab_rr);
 177         OFFSET(PACAR1, paca_struct, saved_r1);
 178         OFFSET(PACATOC, paca_struct, kernel_toc);
 179         OFFSET(PACAKBASE, paca_struct, kernelbase);
 180         OFFSET(PACAKMSR, paca_struct, kernel_msr);
 181         OFFSET(PACAIRQSOFTMASK, paca_struct, irq_soft_mask);
 182         OFFSET(PACAIRQHAPPENED, paca_struct, irq_happened);
 183         OFFSET(PACA_FTRACE_ENABLED, paca_struct, ftrace_enabled);
 184 #ifdef CONFIG_PPC_BOOK3S
 185         OFFSET(PACACONTEXTID, paca_struct, mm_ctx_id);
 186 #ifdef CONFIG_PPC_MM_SLICES
 187         OFFSET(PACALOWSLICESPSIZE, paca_struct, mm_ctx_low_slices_psize);
 188         OFFSET(PACAHIGHSLICEPSIZE, paca_struct, mm_ctx_high_slices_psize);
 189         OFFSET(PACA_SLB_ADDR_LIMIT, paca_struct, mm_ctx_slb_addr_limit);
 190         DEFINE(MMUPSIZEDEFSIZE, sizeof(struct mmu_psize_def));
 191 #endif /* CONFIG_PPC_MM_SLICES */
 192 #endif
 193
 194 #ifdef CONFIG_PPC_BOOK3E
 195         OFFSET(PACAPGD, paca_struct, pgd);
 196         OFFSET(PACA_KERNELPGD, paca_struct, kernel_pgd);
 197         OFFSET(PACA_EXGEN, paca_struct, exgen);
 198         OFFSET(PACA_EXTLB, paca_struct, extlb);
 199         OFFSET(PACA_EXMC, paca_struct, exmc);
 200         OFFSET(PACA_EXCRIT, paca_struct, excrit);
 201         OFFSET(PACA_EXDBG, paca_struct, exdbg);
 202         OFFSET(PACA_MC_STACK, paca_struct, mc_kstack);
 203         OFFSET(PACA_CRIT_STACK, paca_struct, crit_kstack);
 204         OFFSET(PACA_DBG_STACK, paca_struct, dbg_kstack);
 205         OFFSET(PACA_TCD_PTR, paca_struct, tcd_ptr);
 206
 207         OFFSET(TCD_ESEL_NEXT, tlb_core_data, esel_next);
 208         OFFSET(TCD_ESEL_MAX, tlb_core_data, esel_max);
 209         OFFSET(TCD_ESEL_FIRST, tlb_core_data, esel_first);
 210 #endif /* CONFIG_PPC_BOOK3E */
 211
 212 #ifdef CONFIG_PPC_BOOK3S_64
 213         OFFSET(PACASLBCACHE, paca_struct, slb_cache);
 214         OFFSET(PACASLBCACHEPTR, paca_struct, slb_cache_ptr);
 215         OFFSET(PACAVMALLOCSLLP, paca_struct, vmalloc_sllp);
 216 #ifdef CONFIG_PPC_MM_SLICES
 217         OFFSET(MMUPSIZESLLP, mmu_psize_def, sllp);
 218 #else
 219         OFFSET(PACACONTEXTSLLP, paca_struct, mm_ctx_sllp);
 220 #endif /* CONFIG_PPC_MM_SLICES */
 221         OFFSET(PACA_EXGEN, paca_struct, exgen);
 222         OFFSET(PACA_EXMC, paca_struct, exmc);
 223         OFFSET(PACA_EXSLB, paca_struct, exslb);
 224         OFFSET(PACA_EXNMI, paca_struct, exnmi);
 225 #ifdef CONFIG_PPC_PSERIES
 226         OFFSET(PACALPPACAPTR, paca_struct, lppaca_ptr);
 227 #endif
 228         OFFSET(PACA_SLBSHADOWPTR, paca_struct, slb_shadow_ptr);
 229         OFFSET(SLBSHADOW_STACKVSID, slb_shadow, save_area[SLB_NUM_BOLTED - 1].vsid);
 230         OFFSET(SLBSHADOW_STACKESID, slb_shadow, save_area[SLB_NUM_BOLTED - 1].esid);
 231         OFFSET(SLBSHADOW_SAVEAREA, slb_shadow, save_area);
 232         OFFSET(LPPACA_PMCINUSE, lppaca, pmcregs_in_use);
 233 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
 234         OFFSET(PACA_PMCINUSE, paca_struct, pmcregs_in_use);
 235 #endif
 236         OFFSET(LPPACA_DTLIDX, lppaca, dtl_idx);
 237         OFFSET(LPPACA_YIELDCOUNT, lppaca, yield_count);
 238         OFFSET(PACA_DTL_RIDX, paca_struct, dtl_ridx);
 239 #endif /* CONFIG_PPC_BOOK3S_64 */
 240         OFFSET(PACAEMERGSP, paca_struct, emergency_sp);
 241 #ifdef CONFIG_PPC_BOOK3S_64
 242         OFFSET(PACAMCEMERGSP, paca_struct, mc_emergency_sp);
 243         OFFSET(PACA_NMI_EMERG_SP, paca_struct, nmi_emergency_sp);
 244         OFFSET(PACA_IN_MCE, paca_struct, in_mce);
 245         OFFSET(PACA_IN_NMI, paca_struct, in_nmi);
 246         OFFSET(PACA_RFI_FLUSH_FALLBACK_AREA, paca_struct, rfi_flush_fallback_area);
 247         OFFSET(PACA_EXRFI, paca_struct, exrfi);
 248         OFFSET(PACA_L1D_FLUSH_SIZE, paca_struct, l1d_flush_size);
 249
 250 #endif
 251         OFFSET(PACAHWCPUID, paca_struct, hw_cpu_id);
 252         OFFSET(PACAKEXECSTATE, paca_struct, kexec_state);
 253         OFFSET(PACA_DSCR_DEFAULT, paca_struct, dscr_default);
 254         OFFSET(ACCOUNT_STARTTIME, paca_struct, accounting.starttime);
 255         OFFSET(ACCOUNT_STARTTIME_USER, paca_struct, accounting.starttime_user);
 256         OFFSET(ACCOUNT_USER_TIME, paca_struct, accounting.utime);
 257         OFFSET(ACCOUNT_SYSTEM_TIME, paca_struct, accounting.stime);
 258         OFFSET(PACA_TRAP_SAVE, paca_struct, trap_save);
 259         OFFSET(PACA_NAPSTATELOST, paca_struct, nap_state_lost);
 260         OFFSET(PACA_SPRG_VDSO, paca_struct, sprg_vdso);
 261 #else /* CONFIG_PPC64 */
 262 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
 263         OFFSET(ACCOUNT_STARTTIME, thread_info, accounting.starttime);
 264         OFFSET(ACCOUNT_STARTTIME_USER, thread_info, accounting.starttime_user);
 265         OFFSET(ACCOUNT_USER_TIME, thread_info, accounting.utime);
 266         OFFSET(ACCOUNT_SYSTEM_TIME, thread_info, accounting.stime);
 267 #endif
 268 #endif /* CONFIG_PPC64 */
 269
 270         /* RTAS */
 271         OFFSET(RTASBASE, rtas_t, base);
 272         OFFSET(RTASENTRY, rtas_t, entry);
 273
 274         /* Interrupt register frame */
 275         DEFINE(INT_FRAME_SIZE, STACK_INT_FRAME_SIZE);
 276         DEFINE(SWITCH_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs));
 277 #ifdef CONFIG_PPC64
 278         /* Create extra stack space for SRR0 and SRR1 when calling prom/rtas. */
 279         DEFINE(PROM_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16);
 280         DEFINE(RTAS_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16);
 281 #endif /* CONFIG_PPC64 */
 282         STACK_PT_REGS_OFFSET(GPR0, gpr[0]);
 283         STACK_PT_REGS_OFFSET(GPR1, gpr[1]);
 284         STACK_PT_REGS_OFFSET(GPR2, gpr[2]);
 285         STACK_PT_REGS_OFFSET(GPR3, gpr[3]);
 286         STACK_PT_REGS_OFFSET(GPR4, gpr[4]);
 287         STACK_PT_REGS_OFFSET(GPR5, gpr[5]);
 288         STACK_PT_REGS_OFFSET(GPR6, gpr[6]);
 289         STACK_PT_REGS_OFFSET(GPR7, gpr[7]);
 290         STACK_PT_REGS_OFFSET(GPR8, gpr[8]);
 291         STACK_PT_REGS_OFFSET(GPR9, gpr[9]);
 292         STACK_PT_REGS_OFFSET(GPR10, gpr[10]);
 293         STACK_PT_REGS_OFFSET(GPR11, gpr[11]);
 294         STACK_PT_REGS_OFFSET(GPR12, gpr[12]);
 295         STACK_PT_REGS_OFFSET(GPR13, gpr[13]);
 296 #ifndef CONFIG_PPC64
 297         STACK_PT_REGS_OFFSET(GPR14, gpr[14]);
 298 #endif /* CONFIG_PPC64 */
 299         /*
 300          * Note: these symbols include _ because they overlap with special
 301          * register names
 302          */
 303         STACK_PT_REGS_OFFSET(_NIP, nip);
 304         STACK_PT_REGS_OFFSET(_MSR, msr);
 305         STACK_PT_REGS_OFFSET(_CTR, ctr);
 306         STACK_PT_REGS_OFFSET(_LINK, link);
 307         STACK_PT_REGS_OFFSET(_CCR, ccr);
 308         STACK_PT_REGS_OFFSET(_XER, xer);
 309         STACK_PT_REGS_OFFSET(_DAR, dar);
 310         STACK_PT_REGS_OFFSET(_DSISR, dsisr);
 311         STACK_PT_REGS_OFFSET(ORIG_GPR3, orig_gpr3);
 312         STACK_PT_REGS_OFFSET(RESULT, result);
 313         STACK_PT_REGS_OFFSET(_TRAP, trap);
 314 #ifndef CONFIG_PPC64
 315         /*
 316          * The PowerPC 400-class & Book-E processors have neither the DAR
 317          * nor the DSISR SPRs. Hence, we overload them to hold the similar
 318          * DEAR and ESR SPRs for such processors.  For critical interrupts
 319          * we use them to hold SRR0 and SRR1.
 320          */
 321         STACK_PT_REGS_OFFSET(_DEAR, dar);
 322         STACK_PT_REGS_OFFSET(_ESR, dsisr);
 323 #else /* CONFIG_PPC64 */
 324         STACK_PT_REGS_OFFSET(SOFTE, softe);
 325
 326         /* These _only_ to be used with {PROM,RTAS}_FRAME_SIZE!!! */
 327         DEFINE(_SRR0, STACK_FRAME_OVERHEAD+sizeof(struct pt_regs));
 328         DEFINE(_SRR1, STACK_FRAME_OVERHEAD+sizeof(struct pt_regs)+8);
 329 #endif /* CONFIG_PPC64 */
 330
 331 #if defined(CONFIG_PPC32)
 332 #if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
 333         DEFINE(EXC_LVL_SIZE, STACK_EXC_LVL_FRAME_SIZE);
 334         DEFINE(MAS0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0));
 335         /* we overload MMUCR for 44x on MAS0 since they are mutually exclusive */
 336         DEFINE(MMUCR, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0));
 337         DEFINE(MAS1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas1));
 338         DEFINE(MAS2, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas2));
 339         DEFINE(MAS3, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas3));
 340         DEFINE(MAS6, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas6));
 341         DEFINE(MAS7, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas7));
 342         DEFINE(_SRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr0));
 343         DEFINE(_SRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr1));
 344         DEFINE(_CSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr0));
 345         DEFINE(_CSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr1));
 346         DEFINE(_DSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr0));
 347         DEFINE(_DSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr1));
 348         DEFINE(SAVED_KSP_LIMIT, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, saved_ksp_limit));
 349 #endif
 350 #endif
 351
 352 #ifndef CONFIG_PPC64
 353         OFFSET(MM_PGD, mm_struct, pgd);
 354 #endif /* ! CONFIG_PPC64 */
 355
 356         /* About the CPU features table */
 357         OFFSET(CPU_SPEC_FEATURES, cpu_spec, cpu_features);
 358         OFFSET(CPU_SPEC_SETUP, cpu_spec, cpu_setup);
 359         OFFSET(CPU_SPEC_RESTORE, cpu_spec, cpu_restore);
 360
 361         OFFSET(pbe_address, pbe, address);
 362         OFFSET(pbe_orig_address, pbe, orig_address);
 363         OFFSET(pbe_next, pbe, next);
 364
 365 #ifndef CONFIG_PPC64
 366         DEFINE(TASK_SIZE, TASK_SIZE);
 367         DEFINE(NUM_USER_SEGMENTS, TASK_SIZE>>28);
 368 #endif /* ! CONFIG_PPC64 */
 369
 370         /* datapage offsets for use by vdso */
 371         OFFSET(CFG_TB_ORIG_STAMP, vdso_data, tb_orig_stamp);
 372         OFFSET(CFG_TB_TICKS_PER_SEC, vdso_data, tb_ticks_per_sec);
 373         OFFSET(CFG_TB_TO_XS, vdso_data, tb_to_xs);
 374         OFFSET(CFG_TB_UPDATE_COUNT, vdso_data, tb_update_count);
 375         OFFSET(CFG_TZ_MINUTEWEST, vdso_data, tz_minuteswest);
 376         OFFSET(CFG_TZ_DSTTIME, vdso_data, tz_dsttime);
 377         OFFSET(CFG_SYSCALL_MAP32, vdso_data, syscall_map_32);
 378         OFFSET(WTOM_CLOCK_SEC, vdso_data, wtom_clock_sec);
 379         OFFSET(WTOM_CLOCK_NSEC, vdso_data, wtom_clock_nsec);
 380         OFFSET(STAMP_XTIME, vdso_data, stamp_xtime);
 381         OFFSET(STAMP_SEC_FRAC, vdso_data, stamp_sec_fraction);
 382         OFFSET(CFG_ICACHE_BLOCKSZ, vdso_data, icache_block_size);
 383         OFFSET(CFG_DCACHE_BLOCKSZ, vdso_data, dcache_block_size);
 384         OFFSET(CFG_ICACHE_LOGBLOCKSZ, vdso_data, icache_log_block_size);
 385         OFFSET(CFG_DCACHE_LOGBLOCKSZ, vdso_data, dcache_log_block_size);
 386 #ifdef CONFIG_PPC64
 387         OFFSET(CFG_SYSCALL_MAP64, vdso_data, syscall_map_64);
 388         OFFSET(TVAL64_TV_SEC, timeval, tv_sec);
 389         OFFSET(TVAL64_TV_USEC, timeval, tv_usec);
 390         OFFSET(TVAL32_TV_SEC, old_timeval32, tv_sec);
 391         OFFSET(TVAL32_TV_USEC, old_timeval32, tv_usec);
 392         OFFSET(TSPC64_TV_SEC, timespec, tv_sec);
 393         OFFSET(TSPC64_TV_NSEC, timespec, tv_nsec);
 394         OFFSET(TSPC32_TV_SEC, old_timespec32, tv_sec);
 395         OFFSET(TSPC32_TV_NSEC, old_timespec32, tv_nsec);
 396 #else
 397         OFFSET(TVAL32_TV_SEC, timeval, tv_sec);
 398         OFFSET(TVAL32_TV_USEC, timeval, tv_usec);
 399         OFFSET(TSPC32_TV_SEC, timespec, tv_sec);
 400         OFFSET(TSPC32_TV_NSEC, timespec, tv_nsec);
 401 #endif
 402         /* timeval/timezone offsets for use by vdso */
 403         OFFSET(TZONE_TZ_MINWEST, timezone, tz_minuteswest);
 404         OFFSET(TZONE_TZ_DSTTIME, timezone, tz_dsttime);
 405
 406         /* Other bits used by the vdso */
 407         DEFINE(CLOCK_REALTIME, CLOCK_REALTIME);
 408         DEFINE(CLOCK_MONOTONIC, CLOCK_MONOTONIC);
 409         DEFINE(CLOCK_REALTIME_COARSE, CLOCK_REALTIME_COARSE);
 410         DEFINE(CLOCK_MONOTONIC_COARSE, CLOCK_MONOTONIC_COARSE);
 411         DEFINE(NSEC_PER_SEC, NSEC_PER_SEC);
 412         DEFINE(CLOCK_REALTIME_RES, MONOTONIC_RES_NSEC);
 413
 414 #ifdef CONFIG_BUG
 415         DEFINE(BUG_ENTRY_SIZE, sizeof(struct bug_entry));
 416 #endif
 417
 418 #ifdef CONFIG_PPC_BOOK3S_64
 419         DEFINE(PGD_TABLE_SIZE, (sizeof(pgd_t) << max(RADIX_PGD_INDEX_SIZE, H_PGD_INDEX_SIZE)));
 420 #else
 421         DEFINE(PGD_TABLE_SIZE, PGD_TABLE_SIZE);
 422 #endif
 423         DEFINE(PTE_SIZE, sizeof(pte_t));
 424
 425 #ifdef CONFIG_KVM
 426         OFFSET(VCPU_HOST_STACK, kvm_vcpu, arch.host_stack);
 427         OFFSET(VCPU_HOST_PID, kvm_vcpu, arch.host_pid);
 428         OFFSET(VCPU_GUEST_PID, kvm_vcpu, arch.pid);
 429         OFFSET(VCPU_GPRS, kvm_vcpu, arch.regs.gpr);
 430         OFFSET(VCPU_VRSAVE, kvm_vcpu, arch.vrsave);
 431         OFFSET(VCPU_FPRS, kvm_vcpu, arch.fp.fpr);
 432 #ifdef CONFIG_ALTIVEC
 433         OFFSET(VCPU_VRS, kvm_vcpu, arch.vr.vr);
 434 #endif
 435         OFFSET(VCPU_XER, kvm_vcpu, arch.regs.xer);
 436         OFFSET(VCPU_CTR, kvm_vcpu, arch.regs.ctr);
 437         OFFSET(VCPU_LR, kvm_vcpu, arch.regs.link);
 438 #ifdef CONFIG_PPC_BOOK3S
 439         OFFSET(VCPU_TAR, kvm_vcpu, arch.tar);
 440 #endif
 441         OFFSET(VCPU_CR, kvm_vcpu, arch.cr);
 442         OFFSET(VCPU_PC, kvm_vcpu, arch.regs.nip);
 443 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
 444         OFFSET(VCPU_MSR, kvm_vcpu, arch.shregs.msr);
 445         OFFSET(VCPU_SRR0, kvm_vcpu, arch.shregs.srr0);
 446         OFFSET(VCPU_SRR1, kvm_vcpu, arch.shregs.srr1);
 447         OFFSET(VCPU_SPRG0, kvm_vcpu, arch.shregs.sprg0);
 448         OFFSET(VCPU_SPRG1, kvm_vcpu, arch.shregs.sprg1);
 449         OFFSET(VCPU_SPRG2, kvm_vcpu, arch.shregs.sprg2);
 450         OFFSET(VCPU_SPRG3, kvm_vcpu, arch.shregs.sprg3);
 451 #endif
 452 #ifdef CONFIG_KVM_BOOK3S_HV_EXIT_TIMING
 453         OFFSET(VCPU_TB_RMENTRY, kvm_vcpu, arch.rm_entry);
 454         OFFSET(VCPU_TB_RMINTR, kvm_vcpu, arch.rm_intr);
 455         OFFSET(VCPU_TB_RMEXIT, kvm_vcpu, arch.rm_exit);
 456         OFFSET(VCPU_TB_GUEST, kvm_vcpu, arch.guest_time);
 457         OFFSET(VCPU_TB_CEDE, kvm_vcpu, arch.cede_time);
 458         OFFSET(VCPU_CUR_ACTIVITY, kvm_vcpu, arch.cur_activity);
 459         OFFSET(VCPU_ACTIVITY_START, kvm_vcpu, arch.cur_tb_start);
 460         OFFSET(TAS_SEQCOUNT, kvmhv_tb_accumulator, seqcount);
 461         OFFSET(TAS_TOTAL, kvmhv_tb_accumulator, tb_total);
 462         OFFSET(TAS_MIN, kvmhv_tb_accumulator, tb_min);
 463         OFFSET(TAS_MAX, kvmhv_tb_accumulator, tb_max);
 464 #endif
 465         OFFSET(VCPU_SHARED_SPRG3, kvm_vcpu_arch_shared, sprg3);
 466         OFFSET(VCPU_SHARED_SPRG4, kvm_vcpu_arch_shared, sprg4);
 467         OFFSET(VCPU_SHARED_SPRG5, kvm_vcpu_arch_shared, sprg5);
 468         OFFSET(VCPU_SHARED_SPRG6, kvm_vcpu_arch_shared, sprg6);
 469         OFFSET(VCPU_SHARED_SPRG7, kvm_vcpu_arch_shared, sprg7);
 470         OFFSET(VCPU_SHADOW_PID, kvm_vcpu, arch.shadow_pid);
 471         OFFSET(VCPU_SHADOW_PID1, kvm_vcpu, arch.shadow_pid1);
 472         OFFSET(VCPU_SHARED, kvm_vcpu, arch.shared);
 473         OFFSET(VCPU_SHARED_MSR, kvm_vcpu_arch_shared, msr);
 474         OFFSET(VCPU_SHADOW_MSR, kvm_vcpu, arch.shadow_msr);
 475 #if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_KVM_BOOK3S_PR_POSSIBLE)
 476         OFFSET(VCPU_SHAREDBE, kvm_vcpu, arch.shared_big_endian);
 477 #endif
 478
 479         OFFSET(VCPU_SHARED_MAS0, kvm_vcpu_arch_shared, mas0);
 480         OFFSET(VCPU_SHARED_MAS1, kvm_vcpu_arch_shared, mas1);
 481         OFFSET(VCPU_SHARED_MAS2, kvm_vcpu_arch_shared, mas2);
 482         OFFSET(VCPU_SHARED_MAS7_3, kvm_vcpu_arch_shared, mas7_3);
 483         OFFSET(VCPU_SHARED_MAS4, kvm_vcpu_arch_shared, mas4);
 484         OFFSET(VCPU_SHARED_MAS6, kvm_vcpu_arch_shared, mas6);
 485
 486         OFFSET(VCPU_KVM, kvm_vcpu, kvm);
 487         OFFSET(KVM_LPID, kvm, arch.lpid);
 488
 489         /* book3s */
 490 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
 491         OFFSET(KVM_TLB_SETS, kvm, arch.tlb_sets);
 492         OFFSET(KVM_SDR1, kvm, arch.sdr1);
 493         OFFSET(KVM_HOST_LPID, kvm, arch.host_lpid);
 494         OFFSET(KVM_HOST_LPCR, kvm, arch.host_lpcr);
 495         OFFSET(KVM_HOST_SDR1, kvm, arch.host_sdr1);
 496         OFFSET(KVM_NEED_FLUSH, kvm, arch.need_tlb_flush.bits);
 497         OFFSET(KVM_ENABLED_HCALLS, kvm, arch.enabled_hcalls);
 498         OFFSET(KVM_VRMA_SLB_V, kvm, arch.vrma_slb_v);
 499         OFFSET(KVM_RADIX, kvm, arch.radix);
 500         OFFSET(KVM_FWNMI, kvm, arch.fwnmi_enabled);
 501         OFFSET(VCPU_DSISR, kvm_vcpu, arch.shregs.dsisr);
 502         OFFSET(VCPU_DAR, kvm_vcpu, arch.shregs.dar);
 503         OFFSET(VCPU_VPA, kvm_vcpu, arch.vpa.pinned_addr);
 504         OFFSET(VCPU_VPA_DIRTY, kvm_vcpu, arch.vpa.dirty);
 505         OFFSET(VCPU_HEIR, kvm_vcpu, arch.emul_inst);
 506         OFFSET(VCPU_CPU, kvm_vcpu, cpu);
 507         OFFSET(VCPU_THREAD_CPU, kvm_vcpu, arch.thread_cpu);
 508 #endif
 509 #ifdef CONFIG_PPC_BOOK3S
 510         OFFSET(VCPU_PURR, kvm_vcpu, arch.purr);
 511         OFFSET(VCPU_SPURR, kvm_vcpu, arch.spurr);
 512         OFFSET(VCPU_IC, kvm_vcpu, arch.ic);
 513         OFFSET(VCPU_DSCR, kvm_vcpu, arch.dscr);
 514         OFFSET(VCPU_AMR, kvm_vcpu, arch.amr);
 515         OFFSET(VCPU_UAMOR, kvm_vcpu, arch.uamor);
 516         OFFSET(VCPU_IAMR, kvm_vcpu, arch.iamr);
 517         OFFSET(VCPU_CTRL, kvm_vcpu, arch.ctrl);
 518         OFFSET(VCPU_DABR, kvm_vcpu, arch.dabr);
 519         OFFSET(VCPU_DABRX, kvm_vcpu, arch.dabrx);
 520         OFFSET(VCPU_DAWR, kvm_vcpu, arch.dawr);
 521         OFFSET(VCPU_DAWRX, kvm_vcpu, arch.dawrx);
 522         OFFSET(VCPU_CIABR, kvm_vcpu, arch.ciabr);
 523         OFFSET(VCPU_HFLAGS, kvm_vcpu, arch.hflags);
 524         OFFSET(VCPU_DEC, kvm_vcpu, arch.dec);
 525         OFFSET(VCPU_DEC_EXPIRES, kvm_vcpu, arch.dec_expires);
 526         OFFSET(VCPU_PENDING_EXC, kvm_vcpu, arch.pending_exceptions);
 527         OFFSET(VCPU_CEDED, kvm_vcpu, arch.ceded);
 528         OFFSET(VCPU_PRODDED, kvm_vcpu, arch.prodded);
 529         OFFSET(VCPU_IRQ_PENDING, kvm_vcpu, arch.irq_pending);
 530         OFFSET(VCPU_DBELL_REQ, kvm_vcpu, arch.doorbell_request);
 531         OFFSET(VCPU_MMCR, kvm_vcpu, arch.mmcr);
 532         OFFSET(VCPU_PMC, kvm_vcpu, arch.pmc);
 533         OFFSET(VCPU_SPMC, kvm_vcpu, arch.spmc);
 534         OFFSET(VCPU_SIAR, kvm_vcpu, arch.siar);
 535         OFFSET(VCPU_SDAR, kvm_vcpu, arch.sdar);
 536         OFFSET(VCPU_SIER, kvm_vcpu, arch.sier);
 537         OFFSET(VCPU_SLB, kvm_vcpu, arch.slb);
 538         OFFSET(VCPU_SLB_MAX, kvm_vcpu, arch.slb_max);
 539         OFFSET(VCPU_SLB_NR, kvm_vcpu, arch.slb_nr);
 540         OFFSET(VCPU_FAULT_DSISR, kvm_vcpu, arch.fault_dsisr);
 541         OFFSET(VCPU_FAULT_DAR, kvm_vcpu, arch.fault_dar);
 542         OFFSET(VCPU_FAULT_GPA, kvm_vcpu, arch.fault_gpa);
 543         OFFSET(VCPU_INTR_MSR, kvm_vcpu, arch.intr_msr);
 544         OFFSET(VCPU_LAST_INST, kvm_vcpu, arch.last_inst);
 545         OFFSET(VCPU_TRAP, kvm_vcpu, arch.trap);
 546         OFFSET(VCPU_CFAR, kvm_vcpu, arch.cfar);
 547         OFFSET(VCPU_PPR, kvm_vcpu, arch.ppr);
 548         OFFSET(VCPU_FSCR, kvm_vcpu, arch.fscr);
 549         OFFSET(VCPU_PSPB, kvm_vcpu, arch.pspb);
 550         OFFSET(VCPU_EBBHR, kvm_vcpu, arch.ebbhr);
 551         OFFSET(VCPU_EBBRR, kvm_vcpu, arch.ebbrr);
 552         OFFSET(VCPU_BESCR, kvm_vcpu, arch.bescr);
 553         OFFSET(VCPU_CSIGR, kvm_vcpu, arch.csigr);
 554         OFFSET(VCPU_TACR, kvm_vcpu, arch.tacr);
 555         OFFSET(VCPU_TCSCR, kvm_vcpu, arch.tcscr);
 556         OFFSET(VCPU_ACOP, kvm_vcpu, arch.acop);
 557         OFFSET(VCPU_WORT, kvm_vcpu, arch.wort);
 558         OFFSET(VCPU_TID, kvm_vcpu, arch.tid);
 559         OFFSET(VCPU_PSSCR, kvm_vcpu, arch.psscr);
 560         OFFSET(VCPU_HFSCR, kvm_vcpu, arch.hfscr);
 561         OFFSET(VCORE_ENTRY_EXIT, kvmppc_vcore, entry_exit_map);
 562         OFFSET(VCORE_IN_GUEST, kvmppc_vcore, in_guest);
 563         OFFSET(VCORE_NAPPING_THREADS, kvmppc_vcore, napping_threads);
 564         OFFSET(VCORE_KVM, kvmppc_vcore, kvm);
 565         OFFSET(VCORE_TB_OFFSET, kvmppc_vcore, tb_offset);
 566         OFFSET(VCORE_TB_OFFSET_APPL, kvmppc_vcore, tb_offset_applied);
 567         OFFSET(VCORE_LPCR, kvmppc_vcore, lpcr);
 568         OFFSET(VCORE_PCR, kvmppc_vcore, pcr);
 569         OFFSET(VCORE_DPDES, kvmppc_vcore, dpdes);
 570         OFFSET(VCORE_VTB, kvmppc_vcore, vtb);
 571         OFFSET(VCPU_SLB_E, kvmppc_slb, orige);
 572         OFFSET(VCPU_SLB_V, kvmppc_slb, origv);
 573         DEFINE(VCPU_SLB_SIZE, sizeof(struct kvmppc_slb));
 574 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
 575         OFFSET(VCPU_TFHAR, kvm_vcpu, arch.tfhar);
 576         OFFSET(VCPU_TFIAR, kvm_vcpu, arch.tfiar);
 577         OFFSET(VCPU_TEXASR, kvm_vcpu, arch.texasr);
 578         OFFSET(VCPU_ORIG_TEXASR, kvm_vcpu, arch.orig_texasr);
 579         OFFSET(VCPU_GPR_TM, kvm_vcpu, arch.gpr_tm);
 580         OFFSET(VCPU_FPRS_TM, kvm_vcpu, arch.fp_tm.fpr);
 581         OFFSET(VCPU_VRS_TM, kvm_vcpu, arch.vr_tm.vr);
 582         OFFSET(VCPU_VRSAVE_TM, kvm_vcpu, arch.vrsave_tm);
 583         OFFSET(VCPU_CR_TM, kvm_vcpu, arch.cr_tm);
 584         OFFSET(VCPU_XER_TM, kvm_vcpu, arch.xer_tm);
 585         OFFSET(VCPU_LR_TM, kvm_vcpu, arch.lr_tm);
 586         OFFSET(VCPU_CTR_TM, kvm_vcpu, arch.ctr_tm);
 587         OFFSET(VCPU_AMR_TM, kvm_vcpu, arch.amr_tm);
 588         OFFSET(VCPU_PPR_TM, kvm_vcpu, arch.ppr_tm);
 589         OFFSET(VCPU_DSCR_TM, kvm_vcpu, arch.dscr_tm);
 590         OFFSET(VCPU_TAR_TM, kvm_vcpu, arch.tar_tm);
 591 #endif
 592
 593 #ifdef CONFIG_PPC_BOOK3S_64
 594 #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
 595         OFFSET(PACA_SVCPU, paca_struct, shadow_vcpu);
 596 # define SVCPU_FIELD(x, f)      DEFINE(x, offsetof(struct paca_struct, shadow_vcpu.f))
 597 #else
 598 # define SVCPU_FIELD(x, f)
 599 #endif
 600 # define HSTATE_FIELD(x, f)     DEFINE(x, offsetof(struct paca_struct, kvm_hstate.f))
 601 #else   /* 32-bit */
 602 # define SVCPU_FIELD(x, f)      DEFINE(x, offsetof(struct kvmppc_book3s_shadow_vcpu, f))
 603 # define HSTATE_FIELD(x, f)     DEFINE(x, offsetof(struct kvmppc_book3s_shadow_vcpu, hstate.f))
 604 #endif
 605
 606         SVCPU_FIELD(SVCPU_CR, cr);
 607         SVCPU_FIELD(SVCPU_XER, xer);
 608         SVCPU_FIELD(SVCPU_CTR, ctr);
 609         SVCPU_FIELD(SVCPU_LR, lr);
 610         SVCPU_FIELD(SVCPU_PC, pc);
 611         SVCPU_FIELD(SVCPU_R0, gpr[0]);
 612         SVCPU_FIELD(SVCPU_R1, gpr[1]);
 613         SVCPU_FIELD(SVCPU_R2, gpr[2]);
 614         SVCPU_FIELD(SVCPU_R3, gpr[3]);
 615         SVCPU_FIELD(SVCPU_R4, gpr[4]);
 616         SVCPU_FIELD(SVCPU_R5, gpr[5]);
 617         SVCPU_FIELD(SVCPU_R6, gpr[6]);
 618         SVCPU_FIELD(SVCPU_R7, gpr[7]);
 619         SVCPU_FIELD(SVCPU_R8, gpr[8]);
 620         SVCPU_FIELD(SVCPU_R9, gpr[9]);
 621         SVCPU_FIELD(SVCPU_R10, gpr[10]);
 622         SVCPU_FIELD(SVCPU_R11, gpr[11]);
 623         SVCPU_FIELD(SVCPU_R12, gpr[12]);
 624         SVCPU_FIELD(SVCPU_R13, gpr[13]);
 625         SVCPU_FIELD(SVCPU_FAULT_DSISR, fault_dsisr);
 626         SVCPU_FIELD(SVCPU_FAULT_DAR, fault_dar);
 627         SVCPU_FIELD(SVCPU_LAST_INST, last_inst);
 628         SVCPU_FIELD(SVCPU_SHADOW_SRR1, shadow_srr1);
 629 #ifdef CONFIG_PPC_BOOK3S_32
 630         SVCPU_FIELD(SVCPU_SR, sr);
 631 #endif
 632 #ifdef CONFIG_PPC64
 633         SVCPU_FIELD(SVCPU_SLB, slb);
 634         SVCPU_FIELD(SVCPU_SLB_MAX, slb_max);
 635         SVCPU_FIELD(SVCPU_SHADOW_FSCR, shadow_fscr);
 636 #endif
 637
 638         HSTATE_FIELD(HSTATE_HOST_R1, host_r1);
 639         HSTATE_FIELD(HSTATE_HOST_R2, host_r2);
 640         HSTATE_FIELD(HSTATE_HOST_MSR, host_msr);
 641         HSTATE_FIELD(HSTATE_VMHANDLER, vmhandler);
 642         HSTATE_FIELD(HSTATE_SCRATCH0, scratch0);
 643         HSTATE_FIELD(HSTATE_SCRATCH1, scratch1);
 644         HSTATE_FIELD(HSTATE_SCRATCH2, scratch2);
 645         HSTATE_FIELD(HSTATE_IN_GUEST, in_guest);
 646         HSTATE_FIELD(HSTATE_RESTORE_HID5, restore_hid5);
 647         HSTATE_FIELD(HSTATE_NAPPING, napping);
 648
 649 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
 650         HSTATE_FIELD(HSTATE_HWTHREAD_REQ, hwthread_req);
 651         HSTATE_FIELD(HSTATE_HWTHREAD_STATE, hwthread_state);
 652         HSTATE_FIELD(HSTATE_KVM_VCPU, kvm_vcpu);
 653         HSTATE_FIELD(HSTATE_KVM_VCORE, kvm_vcore);
 654         HSTATE_FIELD(HSTATE_XICS_PHYS, xics_phys);
 655         HSTATE_FIELD(HSTATE_XIVE_TIMA_PHYS, xive_tima_phys);
 656         HSTATE_FIELD(HSTATE_XIVE_TIMA_VIRT, xive_tima_virt);
 657         HSTATE_FIELD(HSTATE_SAVED_XIRR, saved_xirr);
 658         HSTATE_FIELD(HSTATE_HOST_IPI, host_ipi);
 659         HSTATE_FIELD(HSTATE_PTID, ptid);
 660         HSTATE_FIELD(HSTATE_TID, tid);
 661         HSTATE_FIELD(HSTATE_FAKE_SUSPEND, fake_suspend);
 662         HSTATE_FIELD(HSTATE_MMCR0, host_mmcr[0]);
 663         HSTATE_FIELD(HSTATE_MMCR1, host_mmcr[1]);
 664         HSTATE_FIELD(HSTATE_MMCRA, host_mmcr[2]);
 665         HSTATE_FIELD(HSTATE_SIAR, host_mmcr[3]);
 666         HSTATE_FIELD(HSTATE_SDAR, host_mmcr[4]);
 667         HSTATE_FIELD(HSTATE_MMCR2, host_mmcr[5]);
 668         HSTATE_FIELD(HSTATE_SIER, host_mmcr[6]);
 669         HSTATE_FIELD(HSTATE_PMC1, host_pmc[0]);
 670         HSTATE_FIELD(HSTATE_PMC2, host_pmc[1]);
 671         HSTATE_FIELD(HSTATE_PMC3, host_pmc[2]);
 672         HSTATE_FIELD(HSTATE_PMC4, host_pmc[3]);
 673         HSTATE_FIELD(HSTATE_PMC5, host_pmc[4]);
 674         HSTATE_FIELD(HSTATE_PMC6, host_pmc[5]);
 675         HSTATE_FIELD(HSTATE_PURR, host_purr);
 676         HSTATE_FIELD(HSTATE_SPURR, host_spurr);
 677         HSTATE_FIELD(HSTATE_DSCR, host_dscr);
 678         HSTATE_FIELD(HSTATE_DABR, dabr);
 679         HSTATE_FIELD(HSTATE_DECEXP, dec_expires);
 680         HSTATE_FIELD(HSTATE_SPLIT_MODE, kvm_split_mode);
 681         DEFINE(IPI_PRIORITY, IPI_PRIORITY);
 682         OFFSET(KVM_SPLIT_RPR, kvm_split_mode, rpr);
 683         OFFSET(KVM_SPLIT_PMMAR, kvm_split_mode, pmmar);
 684         OFFSET(KVM_SPLIT_LDBAR, kvm_split_mode, ldbar);
 685         OFFSET(KVM_SPLIT_DO_NAP, kvm_split_mode, do_nap);
 686         OFFSET(KVM_SPLIT_NAPPED, kvm_split_mode, napped);
 687         OFFSET(KVM_SPLIT_DO_SET, kvm_split_mode, do_set);
 688         OFFSET(KVM_SPLIT_DO_RESTORE, kvm_split_mode, do_restore);
 689 #endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
 690
 691 #ifdef CONFIG_PPC_BOOK3S_64
 692         HSTATE_FIELD(HSTATE_CFAR, cfar);
 693         HSTATE_FIELD(HSTATE_PPR, ppr);
 694         HSTATE_FIELD(HSTATE_HOST_FSCR, host_fscr);
 695 #endif /* CONFIG_PPC_BOOK3S_64 */
 696
 697 #else /* CONFIG_PPC_BOOK3S */
 698         OFFSET(VCPU_CR, kvm_vcpu, arch.cr);
 699         OFFSET(VCPU_XER, kvm_vcpu, arch.regs.xer);
 700         OFFSET(VCPU_LR, kvm_vcpu, arch.regs.link);
 701         OFFSET(VCPU_CTR, kvm_vcpu, arch.regs.ctr);
 702         OFFSET(VCPU_PC, kvm_vcpu, arch.regs.nip);
 703         OFFSET(VCPU_SPRG9, kvm_vcpu, arch.sprg9);
 704         OFFSET(VCPU_LAST_INST, kvm_vcpu, arch.last_inst);
 705         OFFSET(VCPU_FAULT_DEAR, kvm_vcpu, arch.fault_dear);
 706         OFFSET(VCPU_FAULT_ESR, kvm_vcpu, arch.fault_esr);
 707         OFFSET(VCPU_CRIT_SAVE, kvm_vcpu, arch.crit_save);
 708 #endif /* CONFIG_PPC_BOOK3S */
 709 #endif /* CONFIG_KVM */
 710
 711 #ifdef CONFIG_KVM_GUEST
 712         OFFSET(KVM_MAGIC_SCRATCH1, kvm_vcpu_arch_shared, scratch1);
 713         OFFSET(KVM_MAGIC_SCRATCH2, kvm_vcpu_arch_shared, scratch2);
 714         OFFSET(KVM_MAGIC_SCRATCH3, kvm_vcpu_arch_shared, scratch3);
 715         OFFSET(KVM_MAGIC_INT, kvm_vcpu_arch_shared, int_pending);
 716         OFFSET(KVM_MAGIC_MSR, kvm_vcpu_arch_shared, msr);
 717         OFFSET(KVM_MAGIC_CRITICAL, kvm_vcpu_arch_shared, critical);
 718         OFFSET(KVM_MAGIC_SR, kvm_vcpu_arch_shared, sr);
 719 #endif
 720
 721 #ifdef CONFIG_44x
 722         DEFINE(PGD_T_LOG2, PGD_T_LOG2);
 723         DEFINE(PTE_T_LOG2, PTE_T_LOG2);
 724 #endif
 725 #ifdef CONFIG_PPC_FSL_BOOK3E
 726         DEFINE(TLBCAM_SIZE, sizeof(struct tlbcam));
 727         OFFSET(TLBCAM_MAS0, tlbcam, MAS0);
 728         OFFSET(TLBCAM_MAS1, tlbcam, MAS1);
 729         OFFSET(TLBCAM_MAS2, tlbcam, MAS2);
 730         OFFSET(TLBCAM_MAS3, tlbcam, MAS3);
 731         OFFSET(TLBCAM_MAS7, tlbcam, MAS7);
 732 #endif
 733
 734 #if defined(CONFIG_KVM) && defined(CONFIG_SPE)
 735         OFFSET(VCPU_EVR, kvm_vcpu, arch.evr[0]);
 736         OFFSET(VCPU_ACC, kvm_vcpu, arch.acc);
 737         OFFSET(VCPU_SPEFSCR, kvm_vcpu, arch.spefscr);
 738         OFFSET(VCPU_HOST_SPEFSCR, kvm_vcpu, arch.host_spefscr);
 739 #endif
 740
 741 #ifdef CONFIG_KVM_BOOKE_HV
 742         OFFSET(VCPU_HOST_MAS4, kvm_vcpu, arch.host_mas4);
 743         OFFSET(VCPU_HOST_MAS6, kvm_vcpu, arch.host_mas6);
 744 #endif
 745
 746 #ifdef CONFIG_KVM_XICS
 747         DEFINE(VCPU_XIVE_SAVED_STATE, offsetof(struct kvm_vcpu,
 748                                                arch.xive_saved_state));
 749         DEFINE(VCPU_XIVE_CAM_WORD, offsetof(struct kvm_vcpu,
 750                                             arch.xive_cam_word));
 751         DEFINE(VCPU_XIVE_PUSHED, offsetof(struct kvm_vcpu, arch.xive_pushed));
 752         DEFINE(VCPU_XIVE_ESC_ON, offsetof(struct kvm_vcpu, arch.xive_esc_on));
 753         DEFINE(VCPU_XIVE_ESC_RADDR, offsetof(struct kvm_vcpu, arch.xive_esc_raddr));
 754         DEFINE(VCPU_XIVE_ESC_VADDR, offsetof(struct kvm_vcpu, arch.xive_esc_vaddr));
 755 #endif
 756
 757 #ifdef CONFIG_KVM_EXIT_TIMING
 758         OFFSET(VCPU_TIMING_EXIT_TBU, kvm_vcpu, arch.timing_exit.tv32.tbu);
 759         OFFSET(VCPU_TIMING_EXIT_TBL, kvm_vcpu, arch.timing_exit.tv32.tbl);
 760         OFFSET(VCPU_TIMING_LAST_ENTER_TBU, kvm_vcpu, arch.timing_last_enter.tv32.tbu);
 761         OFFSET(VCPU_TIMING_LAST_ENTER_TBL, kvm_vcpu, arch.timing_last_enter.tv32.tbl);
 762 #endif
 763
 764 #ifdef CONFIG_PPC_POWERNV
 765         OFFSET(PACA_CORE_IDLE_STATE_PTR, paca_struct, core_idle_state_ptr);
 766         OFFSET(PACA_THREAD_IDLE_STATE, paca_struct, thread_idle_state);
 767         OFFSET(PACA_THREAD_MASK, paca_struct, thread_mask);
 768         OFFSET(PACA_SUBCORE_SIBLING_MASK, paca_struct, subcore_sibling_mask);
 769         OFFSET(PACA_REQ_PSSCR, paca_struct, requested_psscr);
 770         OFFSET(PACA_DONT_STOP, paca_struct, dont_stop);
 771 #define STOP_SPR(x, f)  OFFSET(x, paca_struct, stop_sprs.f)
 772         STOP_SPR(STOP_PID, pid);
 773         STOP_SPR(STOP_LDBAR, ldbar);
 774         STOP_SPR(STOP_FSCR, fscr);
 775         STOP_SPR(STOP_HFSCR, hfscr);
 776         STOP_SPR(STOP_MMCR1, mmcr1);
 777         STOP_SPR(STOP_MMCR2, mmcr2);
 778         STOP_SPR(STOP_MMCRA, mmcra);
 779 #endif
 780
 781         DEFINE(PPC_DBELL_SERVER, PPC_DBELL_SERVER);
 782         DEFINE(PPC_DBELL_MSGTYPE, PPC_DBELL_MSGTYPE);
 783
 784 #ifdef CONFIG_PPC_8xx
 785         DEFINE(VIRT_IMMR_BASE, (u64)__fix_to_virt(FIX_IMMR_BASE));
 786 #endif
 787
 788         return 0;
 789 }