Merge commit 'kumar/kumar-next' into next
[sfrench/cifs-2.6.git] / arch / powerpc / boot / dts / mpc8641_hpcn.dts
1 /*
2  * MPC8641 HPCN Device Tree Source
3  *
4  * Copyright 2006 Freescale Semiconductor Inc.
5  *
6  * This program is free software; you can redistribute  it and/or modify it
7  * under  the terms of  the GNU General  Public License as published by the
8  * Free Software Foundation;  either version 2 of the  License, or (at your
9  * option) any later version.
10  */
11
12 /dts-v1/;
13
14 / {
15         model = "MPC8641HPCN";
16         compatible = "fsl,mpc8641hpcn";
17         #address-cells = <1>;
18         #size-cells = <1>;
19
20         aliases {
21                 ethernet0 = &enet0;
22                 ethernet1 = &enet1;
23                 ethernet2 = &enet2;
24                 ethernet3 = &enet3;
25                 serial0 = &serial0;
26                 serial1 = &serial1;
27                 pci0 = &pci0;
28                 pci1 = &pci1;
29 /*
30  * Only one of Rapid IO or PCI can be present due to HW limitations and
31  * due to the fact that the 2 now share address space in the new memory
32  * map.  The most likely case is that we have PCI, so comment out the
33  * rapidio node.  Leave it here for reference.
34  */
35                 /* rapidio0 = &rapidio0; */
36         };
37
38         cpus {
39                 #address-cells = <1>;
40                 #size-cells = <0>;
41
42                 PowerPC,8641@0 {
43                         device_type = "cpu";
44                         reg = <0>;
45                         d-cache-line-size = <32>;
46                         i-cache-line-size = <32>;
47                         d-cache-size = <32768>;         // L1
48                         i-cache-size = <32768>;         // L1
49                         timebase-frequency = <0>;       // From uboot
50                         bus-frequency = <0>;            // From uboot
51                         clock-frequency = <0>;          // From uboot
52                 };
53                 PowerPC,8641@1 {
54                         device_type = "cpu";
55                         reg = <1>;
56                         d-cache-line-size = <32>;
57                         i-cache-line-size = <32>;
58                         d-cache-size = <32768>;
59                         i-cache-size = <32768>;
60                         timebase-frequency = <0>;       // From uboot
61                         bus-frequency = <0>;            // From uboot
62                         clock-frequency = <0>;          // From uboot
63                 };
64         };
65
66         memory {
67                 device_type = "memory";
68                 reg = <0x00000000 0x40000000>;  // 1G at 0x0
69         };
70
71         localbus@ffe05000 {
72                 #address-cells = <2>;
73                 #size-cells = <1>;
74                 compatible = "fsl,mpc8641-localbus", "simple-bus";
75                 reg = <0xffe05000 0x1000>;
76                 interrupts = <19 2>;
77                 interrupt-parent = <&mpic>;
78
79                 ranges = <0 0 0xef800000 0x00800000
80                           2 0 0xffdf8000 0x00008000
81                           3 0 0xffdf0000 0x00008000>;
82
83                 flash@0,0 {
84                         compatible = "cfi-flash";
85                         reg = <0 0 0x00800000>;
86                         bank-width = <2>;
87                         device-width = <2>;
88                         #address-cells = <1>;
89                         #size-cells = <1>;
90                         partition@0 {
91                                 label = "kernel";
92                                 reg = <0x00000000 0x00300000>;
93                         };
94                         partition@300000 {
95                                 label = "firmware b";
96                                 reg = <0x00300000 0x00100000>;
97                                 read-only;
98                         };
99                         partition@400000 {
100                                 label = "fs";
101                                 reg = <0x00400000 0x00300000>;
102                         };
103                         partition@700000 {
104                                 label = "firmware a";
105                                 reg = <0x00700000 0x00100000>;
106                                 read-only;
107                         };
108                 };
109         };
110
111         soc8641@ffe00000 {
112                 #address-cells = <1>;
113                 #size-cells = <1>;
114                 device_type = "soc";
115                 compatible = "simple-bus";
116                 ranges = <0x00000000 0xffe00000 0x00100000>;
117                 reg = <0xffe00000 0x00001000>;  // CCSRBAR
118                 bus-frequency = <0>;
119
120                 i2c@3000 {
121                         #address-cells = <1>;
122                         #size-cells = <0>;
123                         cell-index = <0>;
124                         compatible = "fsl-i2c";
125                         reg = <0x3000 0x100>;
126                         interrupts = <43 2>;
127                         interrupt-parent = <&mpic>;
128                         dfsrr;
129                 };
130
131                 i2c@3100 {
132                         #address-cells = <1>;
133                         #size-cells = <0>;
134                         cell-index = <1>;
135                         compatible = "fsl-i2c";
136                         reg = <0x3100 0x100>;
137                         interrupts = <43 2>;
138                         interrupt-parent = <&mpic>;
139                         dfsrr;
140                 };
141
142                 dma@21300 {
143                         #address-cells = <1>;
144                         #size-cells = <1>;
145                         compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma";
146                         reg = <0x21300 0x4>;
147                         ranges = <0x0 0x21100 0x200>;
148                         cell-index = <0>;
149                         dma-channel@0 {
150                                 compatible = "fsl,mpc8641-dma-channel",
151                                                 "fsl,eloplus-dma-channel";
152                                 reg = <0x0 0x80>;
153                                 cell-index = <0>;
154                                 interrupt-parent = <&mpic>;
155                                 interrupts = <20 2>;
156                         };
157                         dma-channel@80 {
158                                 compatible = "fsl,mpc8641-dma-channel",
159                                                 "fsl,eloplus-dma-channel";
160                                 reg = <0x80 0x80>;
161                                 cell-index = <1>;
162                                 interrupt-parent = <&mpic>;
163                                 interrupts = <21 2>;
164                         };
165                         dma-channel@100 {
166                                 compatible = "fsl,mpc8641-dma-channel",
167                                                 "fsl,eloplus-dma-channel";
168                                 reg = <0x100 0x80>;
169                                 cell-index = <2>;
170                                 interrupt-parent = <&mpic>;
171                                 interrupts = <22 2>;
172                         };
173                         dma-channel@180 {
174                                 compatible = "fsl,mpc8641-dma-channel",
175                                                 "fsl,eloplus-dma-channel";
176                                 reg = <0x180 0x80>;
177                                 cell-index = <3>;
178                                 interrupt-parent = <&mpic>;
179                                 interrupts = <23 2>;
180                         };
181                 };
182
183                 mdio@24520 {
184                         #address-cells = <1>;
185                         #size-cells = <0>;
186                         compatible = "fsl,gianfar-mdio";
187                         reg = <0x24520 0x20>;
188
189                         phy0: ethernet-phy@0 {
190                                 interrupt-parent = <&mpic>;
191                                 interrupts = <10 1>;
192                                 reg = <0>;
193                                 device_type = "ethernet-phy";
194                         };
195                         phy1: ethernet-phy@1 {
196                                 interrupt-parent = <&mpic>;
197                                 interrupts = <10 1>;
198                                 reg = <1>;
199                                 device_type = "ethernet-phy";
200                         };
201                         phy2: ethernet-phy@2 {
202                                 interrupt-parent = <&mpic>;
203                                 interrupts = <10 1>;
204                                 reg = <2>;
205                                 device_type = "ethernet-phy";
206                         };
207                         phy3: ethernet-phy@3 {
208                                 interrupt-parent = <&mpic>;
209                                 interrupts = <10 1>;
210                                 reg = <3>;
211                                 device_type = "ethernet-phy";
212                         };
213                         tbi0: tbi-phy@11 {
214                                 reg = <0x11>;
215                                 device_type = "tbi-phy";
216                         };
217                 };
218
219                 mdio@25520 {
220                         #address-cells = <1>;
221                         #size-cells = <0>;
222                         compatible = "fsl,gianfar-tbi";
223                         reg = <0x25520 0x20>;
224
225                         tbi1: tbi-phy@11 {
226                                 reg = <0x11>;
227                                 device_type = "tbi-phy";
228                         };
229                 };
230
231                 mdio@26520 {
232                         #address-cells = <1>;
233                         #size-cells = <0>;
234                         compatible = "fsl,gianfar-tbi";
235                         reg = <0x26520 0x20>;
236
237                         tbi2: tbi-phy@11 {
238                                 reg = <0x11>;
239                                 device_type = "tbi-phy";
240                         };
241                 };
242
243                 mdio@27520 {
244                         #address-cells = <1>;
245                         #size-cells = <0>;
246                         compatible = "fsl,gianfar-tbi";
247                         reg = <0x27520 0x20>;
248
249                         tbi3: tbi-phy@11 {
250                                 reg = <0x11>;
251                                 device_type = "tbi-phy";
252                         };
253                 };
254
255
256                 enet0: ethernet@24000 {
257                         cell-index = <0>;
258                         device_type = "network";
259                         model = "TSEC";
260                         compatible = "gianfar";
261                         reg = <0x24000 0x1000>;
262                         local-mac-address = [ 00 00 00 00 00 00 ];
263                         interrupts = <29 2 30  2 34 2>;
264                         interrupt-parent = <&mpic>;
265                         tbi-handle = <&tbi0>;
266                         phy-handle = <&phy0>;
267                         phy-connection-type = "rgmii-id";
268                 };
269
270                 enet1: ethernet@25000 {
271                         cell-index = <1>;
272                         device_type = "network";
273                         model = "TSEC";
274                         compatible = "gianfar";
275                         reg = <0x25000 0x1000>;
276                         local-mac-address = [ 00 00 00 00 00 00 ];
277                         interrupts = <35 2 36 2 40 2>;
278                         interrupt-parent = <&mpic>;
279                         tbi-handle = <&tbi1>;
280                         phy-handle = <&phy1>;
281                         phy-connection-type = "rgmii-id";
282                 };
283                 
284                 enet2: ethernet@26000 {
285                         cell-index = <2>;
286                         device_type = "network";
287                         model = "TSEC";
288                         compatible = "gianfar";
289                         reg = <0x26000 0x1000>;
290                         local-mac-address = [ 00 00 00 00 00 00 ];
291                         interrupts = <31 2 32 2 33 2>;
292                         interrupt-parent = <&mpic>;
293                         tbi-handle = <&tbi2>;
294                         phy-handle = <&phy2>;
295                         phy-connection-type = "rgmii-id";
296                 };
297
298                 enet3: ethernet@27000 {
299                         cell-index = <3>;
300                         device_type = "network";
301                         model = "TSEC";
302                         compatible = "gianfar";
303                         reg = <0x27000 0x1000>;
304                         local-mac-address = [ 00 00 00 00 00 00 ];
305                         interrupts = <37 2 38 2 39 2>;
306                         interrupt-parent = <&mpic>;
307                         tbi-handle = <&tbi3>;
308                         phy-handle = <&phy3>;
309                         phy-connection-type = "rgmii-id";
310                 };
311
312                 serial0: serial@4500 {
313                         cell-index = <0>;
314                         device_type = "serial";
315                         compatible = "ns16550";
316                         reg = <0x4500 0x100>;
317                         clock-frequency = <0>;
318                         interrupts = <42 2>;
319                         interrupt-parent = <&mpic>;
320                 };
321
322                 serial1: serial@4600 {
323                         cell-index = <1>;
324                         device_type = "serial";
325                         compatible = "ns16550";
326                         reg = <0x4600 0x100>;
327                         clock-frequency = <0>;
328                         interrupts = <28 2>;
329                         interrupt-parent = <&mpic>;
330                 };
331
332                 mpic: pic@40000 {
333                         interrupt-controller;
334                         #address-cells = <0>;
335                         #interrupt-cells = <2>;
336                         reg = <0x40000 0x40000>;
337                         compatible = "chrp,open-pic";
338                         device_type = "open-pic";
339                 };
340
341                 global-utilities@e0000 {
342                         compatible = "fsl,mpc8641-guts";
343                         reg = <0xe0000 0x1000>;
344                         fsl,has-rstcr;
345                 };
346         };
347
348         pci0: pcie@ffe08000 {
349                 cell-index = <0>;
350                 compatible = "fsl,mpc8641-pcie";
351                 device_type = "pci";
352                 #interrupt-cells = <1>;
353                 #size-cells = <2>;
354                 #address-cells = <3>;
355                 reg = <0xffe08000 0x1000>;
356                 bus-range = <0x0 0xff>;
357                 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000
358                           0x01000000 0x0 0x00000000 0xffc00000 0x0 0x00010000>;
359                 clock-frequency = <33333333>;
360                 interrupt-parent = <&mpic>;
361                 interrupts = <24 2>;
362                 interrupt-map-mask = <0xff00 0 0 7>;
363                 interrupt-map = <
364                         /* IDSEL 0x11 func 0 - PCI slot 1 */
365                         0x8800 0 0 1 &mpic 2 1
366                         0x8800 0 0 2 &mpic 3 1
367                         0x8800 0 0 3 &mpic 4 1
368                         0x8800 0 0 4 &mpic 1 1
369
370                         /* IDSEL 0x11 func 1 - PCI slot 1 */
371                         0x8900 0 0 1 &mpic 2 1
372                         0x8900 0 0 2 &mpic 3 1
373                         0x8900 0 0 3 &mpic 4 1
374                         0x8900 0 0 4 &mpic 1 1
375
376                         /* IDSEL 0x11 func 2 - PCI slot 1 */
377                         0x8a00 0 0 1 &mpic 2 1
378                         0x8a00 0 0 2 &mpic 3 1
379                         0x8a00 0 0 3 &mpic 4 1
380                         0x8a00 0 0 4 &mpic 1 1
381
382                         /* IDSEL 0x11 func 3 - PCI slot 1 */
383                         0x8b00 0 0 1 &mpic 2 1
384                         0x8b00 0 0 2 &mpic 3 1
385                         0x8b00 0 0 3 &mpic 4 1
386                         0x8b00 0 0 4 &mpic 1 1
387
388                         /* IDSEL 0x11 func 4 - PCI slot 1 */
389                         0x8c00 0 0 1 &mpic 2 1
390                         0x8c00 0 0 2 &mpic 3 1
391                         0x8c00 0 0 3 &mpic 4 1
392                         0x8c00 0 0 4 &mpic 1 1
393
394                         /* IDSEL 0x11 func 5 - PCI slot 1 */
395                         0x8d00 0 0 1 &mpic 2 1
396                         0x8d00 0 0 2 &mpic 3 1
397                         0x8d00 0 0 3 &mpic 4 1
398                         0x8d00 0 0 4 &mpic 1 1
399
400                         /* IDSEL 0x11 func 6 - PCI slot 1 */
401                         0x8e00 0 0 1 &mpic 2 1
402                         0x8e00 0 0 2 &mpic 3 1
403                         0x8e00 0 0 3 &mpic 4 1
404                         0x8e00 0 0 4 &mpic 1 1
405
406                         /* IDSEL 0x11 func 7 - PCI slot 1 */
407                         0x8f00 0 0 1 &mpic 2 1
408                         0x8f00 0 0 2 &mpic 3 1
409                         0x8f00 0 0 3 &mpic 4 1
410                         0x8f00 0 0 4 &mpic 1 1
411
412                         /* IDSEL 0x12 func 0 - PCI slot 2 */
413                         0x9000 0 0 1 &mpic 3 1
414                         0x9000 0 0 2 &mpic 4 1
415                         0x9000 0 0 3 &mpic 1 1
416                         0x9000 0 0 4 &mpic 2 1
417
418                         /* IDSEL 0x12 func 1 - PCI slot 2 */
419                         0x9100 0 0 1 &mpic 3 1
420                         0x9100 0 0 2 &mpic 4 1
421                         0x9100 0 0 3 &mpic 1 1
422                         0x9100 0 0 4 &mpic 2 1
423
424                         /* IDSEL 0x12 func 2 - PCI slot 2 */
425                         0x9200 0 0 1 &mpic 3 1
426                         0x9200 0 0 2 &mpic 4 1
427                         0x9200 0 0 3 &mpic 1 1
428                         0x9200 0 0 4 &mpic 2 1
429
430                         /* IDSEL 0x12 func 3 - PCI slot 2 */
431                         0x9300 0 0 1 &mpic 3 1
432                         0x9300 0 0 2 &mpic 4 1
433                         0x9300 0 0 3 &mpic 1 1
434                         0x9300 0 0 4 &mpic 2 1
435
436                         /* IDSEL 0x12 func 4 - PCI slot 2 */
437                         0x9400 0 0 1 &mpic 3 1
438                         0x9400 0 0 2 &mpic 4 1
439                         0x9400 0 0 3 &mpic 1 1
440                         0x9400 0 0 4 &mpic 2 1
441
442                         /* IDSEL 0x12 func 5 - PCI slot 2 */
443                         0x9500 0 0 1 &mpic 3 1
444                         0x9500 0 0 2 &mpic 4 1
445                         0x9500 0 0 3 &mpic 1 1
446                         0x9500 0 0 4 &mpic 2 1
447
448                         /* IDSEL 0x12 func 6 - PCI slot 2 */
449                         0x9600 0 0 1 &mpic 3 1
450                         0x9600 0 0 2 &mpic 4 1
451                         0x9600 0 0 3 &mpic 1 1
452                         0x9600 0 0 4 &mpic 2 1
453
454                         /* IDSEL 0x12 func 7 - PCI slot 2 */
455                         0x9700 0 0 1 &mpic 3 1
456                         0x9700 0 0 2 &mpic 4 1
457                         0x9700 0 0 3 &mpic 1 1
458                         0x9700 0 0 4 &mpic 2 1
459
460                         // IDSEL 0x1c  USB
461                         0xe000 0 0 1 &i8259 12 2
462                         0xe100 0 0 2 &i8259 9 2
463                         0xe200 0 0 3 &i8259 10 2
464                         0xe300 0 0 4 &i8259 11 2
465
466                         // IDSEL 0x1d  Audio
467                         0xe800 0 0 1 &i8259 6 2
468
469                         // IDSEL 0x1e Legacy
470                         0xf000 0 0 1 &i8259 7 2
471                         0xf100 0 0 1 &i8259 7 2
472
473                         // IDSEL 0x1f IDE/SATA
474                         0xf800 0 0 1 &i8259 14 2
475                         0xf900 0 0 1 &i8259 5 2
476                         >;
477
478                 pcie@0 {
479                         reg = <0 0 0 0 0>;
480                         #size-cells = <2>;
481                         #address-cells = <3>;
482                         device_type = "pci";
483                         ranges = <0x02000000 0x0 0x80000000
484                                   0x02000000 0x0 0x80000000
485                                   0x0 0x20000000
486
487                                   0x01000000 0x0 0x00000000
488                                   0x01000000 0x0 0x00000000
489                                   0x0 0x00010000>;
490                         uli1575@0 {
491                                 reg = <0 0 0 0 0>;
492                                 #size-cells = <2>;
493                                 #address-cells = <3>;
494                                 ranges = <0x02000000 0x0 0x80000000
495                                           0x02000000 0x0 0x80000000
496                                           0x0 0x20000000
497                                           0x01000000 0x0 0x00000000
498                                           0x01000000 0x0 0x00000000
499                                           0x0 0x00010000>;
500                                 isa@1e {
501                                         device_type = "isa";
502                                         #interrupt-cells = <2>;
503                                         #size-cells = <1>;
504                                         #address-cells = <2>;
505                                         reg = <0xf000 0 0 0 0>;
506                                         ranges = <1 0 0x01000000 0 0
507                                                   0x00001000>;
508                                         interrupt-parent = <&i8259>;
509
510                                         i8259: interrupt-controller@20 {
511                                                 reg = <1 0x20 2
512                                                        1 0xa0 2
513                                                        1 0x4d0 2>;
514                                                 interrupt-controller;
515                                                 device_type = "interrupt-controller";
516                                                 #address-cells = <0>;
517                                                 #interrupt-cells = <2>;
518                                                 compatible = "chrp,iic";
519                                                 interrupts = <9 2>;
520                                                 interrupt-parent = <&mpic>;
521                                         };
522
523                                         i8042@60 {
524                                                 #size-cells = <0>;
525                                                 #address-cells = <1>;
526                                                 reg = <1 0x60 1 1 0x64 1>;
527                                                 interrupts = <1 3 12 3>;
528                                                 interrupt-parent =
529                                                         <&i8259>;
530
531                                                 keyboard@0 {
532                                                         reg = <0>;
533                                                         compatible = "pnpPNP,303";
534                                                 };
535
536                                                 mouse@1 {
537                                                         reg = <1>;
538                                                         compatible = "pnpPNP,f03";
539                                                 };
540                                         };
541
542                                         rtc@70 {
543                                                 compatible =
544                                                         "pnpPNP,b00";
545                                                 reg = <1 0x70 2>;
546                                         };
547
548                                         gpio@400 {
549                                                 reg = <1 0x400 0x80>;
550                                         };
551                                 };
552                         };
553                 };
554
555         };
556
557         pci1: pcie@ffe09000 {
558                 cell-index = <1>;
559                 compatible = "fsl,mpc8641-pcie";
560                 device_type = "pci";
561                 #interrupt-cells = <1>;
562                 #size-cells = <2>;
563                 #address-cells = <3>;
564                 reg = <0xffe09000 0x1000>;
565                 bus-range = <0 0xff>;
566                 ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
567                           0x01000000 0x0 0x00000000 0xffc10000 0x0 0x00010000>;
568                 clock-frequency = <33333333>;
569                 interrupt-parent = <&mpic>;
570                 interrupts = <25 2>;
571                 interrupt-map-mask = <0xf800 0 0 7>;
572                 interrupt-map = <
573                         /* IDSEL 0x0 */
574                         0x0000 0 0 1 &mpic 4 1
575                         0x0000 0 0 2 &mpic 5 1
576                         0x0000 0 0 3 &mpic 6 1
577                         0x0000 0 0 4 &mpic 7 1
578                         >;
579                 pcie@0 {
580                         reg = <0 0 0 0 0>;
581                         #size-cells = <2>;
582                         #address-cells = <3>;
583                         device_type = "pci";
584                         ranges = <0x02000000 0x0 0xa0000000
585                                   0x02000000 0x0 0xa0000000
586                                   0x0 0x20000000
587
588                                   0x01000000 0x0 0x00000000
589                                   0x01000000 0x0 0x00000000
590                                   0x0 0x00010000>;
591                 };
592         };
593 /*
594         rapidio0: rapidio@ffec0000 {
595                 #address-cells = <2>;
596                 #size-cells = <2>;
597                 compatible = "fsl,rapidio-delta";
598                 reg = <0xffec0000 0x20000>;
599                 ranges = <0 0 0x80000000 0 0x20000000>;
600                 interrupt-parent = <&mpic>;
601                 // err_irq bell_outb_irq bell_inb_irq
602                 //      msg1_tx_irq msg1_rx_irq msg2_tx_irq msg2_rx_irq
603                 interrupts = <48 2 49 2 50 2 53 2 54 2 55 2 56 2>;
604         };
605 */
606
607 };