arch/powerpc/boot/dts/mpc8540ads.dts

   1 /*
   2  * MPC8540 ADS Device Tree Source
   3  *
   4  * Copyright 2006 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12
  13 / {
  14         model = "MPC8540ADS";
  15         compatible = "MPC8540ADS", "MPC85xxADS";
  16         #address-cells = <1>;
  17         #size-cells = <1>;
  18
  19         cpus {
  20                 #cpus = <1>;
  21                 #address-cells = <1>;
  22                 #size-cells = <0>;
  23
  24                 PowerPC,8540@0 {
  25                         device_type = "cpu";
  26                         reg = <0>;
  27                         d-cache-line-size = <20>;       // 32 bytes
  28                         i-cache-line-size = <20>;       // 32 bytes
  29                         d-cache-size = <8000>;          // L1, 32K
  30                         i-cache-size = <8000>;          // L1, 32K
  31                         timebase-frequency = <0>;       //  33 MHz, from uboot
  32                         bus-frequency = <0>;    // 166 MHz
  33                         clock-frequency = <0>;  // 825 MHz, from uboot
  34                         32-bit;
  35                 };
  36         };
  37
  38         memory {
  39                 device_type = "memory";
  40                 reg = <00000000 08000000>;      // 128M at 0x0
  41         };
  42
  43         soc8540@e0000000 {
  44                 #address-cells = <1>;
  45                 #size-cells = <1>;
  46                 #interrupt-cells = <2>;
  47                 device_type = "soc";
  48                 ranges = <0 e0000000 00100000>;
  49                 reg = <e0000000 00100000>;      // CCSRBAR 1M
  50                 bus-frequency = <0>;
  51
  52                 i2c@3000 {
  53                         device_type = "i2c";
  54                         compatible = "fsl-i2c";
  55                         reg = <3000 100>;
  56                         interrupts = <1b 2>;
  57                         interrupt-parent = <&mpic>;
  58                         dfsrr;
  59                 };
  60
  61                 mdio@24520 {
  62                         #address-cells = <1>;
  63                         #size-cells = <0>;
  64                         device_type = "mdio";
  65                         compatible = "gianfar";
  66                         reg = <24520 20>;
  67                         phy0: ethernet-phy@0 {
  68                                 interrupt-parent = <&mpic>;
  69                                 interrupts = <35 1>;
  70                                 reg = <0>;
  71                                 device_type = "ethernet-phy";
  72                         };
  73                         phy1: ethernet-phy@1 {
  74                                 interrupt-parent = <&mpic>;
  75                                 interrupts = <35 1>;
  76                                 reg = <1>;
  77                                 device_type = "ethernet-phy";
  78                         };
  79                         phy3: ethernet-phy@3 {
  80                                 interrupt-parent = <&mpic>;
  81                                 interrupts = <37 1>;
  82                                 reg = <3>;
  83                                 device_type = "ethernet-phy";
  84                         };
  85                 };
  86
  87                 ethernet@24000 {
  88                         #address-cells = <1>;
  89                         #size-cells = <0>;
  90                         device_type = "network";
  91                         model = "TSEC";
  92                         compatible = "gianfar";
  93                         reg = <24000 1000>;
  94                         address = [ 00 E0 0C 00 73 00 ];
  95                         local-mac-address = [ 00 E0 0C 00 73 00 ];
  96                         interrupts = <d 2 e 2 12 2>;
  97                         interrupt-parent = <&mpic>;
  98                         phy-handle = <&phy0>;
  99                 };
 100
 101                 ethernet@25000 {
 102                         #address-cells = <1>;
 103                         #size-cells = <0>;
 104                         device_type = "network";
 105                         model = "TSEC";
 106                         compatible = "gianfar";
 107                         reg = <25000 1000>;
 108                         address = [ 00 E0 0C 00 73 01 ];
 109                         local-mac-address = [ 00 E0 0C 00 73 01 ];
 110                         interrupts = <13 2 14 2 18 2>;
 111                         interrupt-parent = <&mpic>;
 112                         phy-handle = <&phy1>;
 113                 };
 114
 115                 ethernet@26000 {
 116                         #address-cells = <1>;
 117                         #size-cells = <0>;
 118                         device_type = "network";
 119                         model = "FEC";
 120                         compatible = "gianfar";
 121                         reg = <26000 1000>;
 122                         address = [ 00 E0 0C 00 73 02 ];
 123                         local-mac-address = [ 00 E0 0C 00 73 02 ];
 124                         interrupts = <19 2>;
 125                         interrupt-parent = <&mpic>;
 126                         phy-handle = <&phy3>;
 127                 };
 128
 129                 serial@4500 {
 130                         device_type = "serial";
 131                         compatible = "ns16550";
 132                         reg = <4500 100>;       // reg base, size
 133                         clock-frequency = <0>;  // should we fill in in uboot?
 134                         interrupts = <1a 2>;
 135                         interrupt-parent = <&mpic>;
 136                 };
 137
 138                 serial@4600 {
 139                         device_type = "serial";
 140                         compatible = "ns16550";
 141                         reg = <4600 100>;       // reg base, size
 142                         clock-frequency = <0>;  // should we fill in in uboot?
 143                         interrupts = <1a 2>;
 144                         interrupt-parent = <&mpic>;
 145                 };
 146                 pci@8000 {
 147                         interrupt-map-mask = <f800 0 0 7>;
 148                         interrupt-map = <
 149
 150                                 /* IDSEL 0x02 */
 151                                 1000 0 0 1 &mpic 31 1
 152                                 1000 0 0 2 &mpic 32 1
 153                                 1000 0 0 3 &mpic 33 1
 154                                 1000 0 0 4 &mpic 34 1
 155
 156                                 /* IDSEL 0x03 */
 157                                 1800 0 0 1 &mpic 34 1
 158                                 1800 0 0 2 &mpic 31 1
 159                                 1800 0 0 3 &mpic 32 1
 160                                 1800 0 0 4 &mpic 33 1
 161
 162                                 /* IDSEL 0x04 */
 163                                 2000 0 0 1 &mpic 33 1
 164                                 2000 0 0 2 &mpic 34 1
 165                                 2000 0 0 3 &mpic 31 1
 166                                 2000 0 0 4 &mpic 32 1
 167
 168                                 /* IDSEL 0x05 */
 169                                 2800 0 0 1 &mpic 32 1
 170                                 2800 0 0 2 &mpic 33 1
 171                                 2800 0 0 3 &mpic 34 1
 172                                 2800 0 0 4 &mpic 31 1
 173
 174                                 /* IDSEL 0x0c */
 175                                 6000 0 0 1 &mpic 31 1
 176                                 6000 0 0 2 &mpic 32 1
 177                                 6000 0 0 3 &mpic 33 1
 178                                 6000 0 0 4 &mpic 34 1
 179
 180                                 /* IDSEL 0x0d */
 181                                 6800 0 0 1 &mpic 34 1
 182                                 6800 0 0 2 &mpic 31 1
 183                                 6800 0 0 3 &mpic 32 1
 184                                 6800 0 0 4 &mpic 33 1
 185
 186                                 /* IDSEL 0x0e */
 187                                 7000 0 0 1 &mpic 33 1
 188                                 7000 0 0 2 &mpic 34 1
 189                                 7000 0 0 3 &mpic 31 1
 190                                 7000 0 0 4 &mpic 32 1
 191
 192                                 /* IDSEL 0x0f */
 193                                 7800 0 0 1 &mpic 32 1
 194                                 7800 0 0 2 &mpic 33 1
 195                                 7800 0 0 3 &mpic 34 1
 196                                 7800 0 0 4 &mpic 31 1
 197
 198                                 /* IDSEL 0x12 */
 199                                 9000 0 0 1 &mpic 31 1
 200                                 9000 0 0 2 &mpic 32 1
 201                                 9000 0 0 3 &mpic 33 1
 202                                 9000 0 0 4 &mpic 34 1
 203
 204                                 /* IDSEL 0x13 */
 205                                 9800 0 0 1 &mpic 34 1
 206                                 9800 0 0 2 &mpic 31 1
 207                                 9800 0 0 3 &mpic 32 1
 208                                 9800 0 0 4 &mpic 33 1
 209
 210                                 /* IDSEL 0x14 */
 211                                 a000 0 0 1 &mpic 33 1
 212                                 a000 0 0 2 &mpic 34 1
 213                                 a000 0 0 3 &mpic 31 1
 214                                 a000 0 0 4 &mpic 32 1
 215
 216                                 /* IDSEL 0x15 */
 217                                 a800 0 0 1 &mpic 32 1
 218                                 a800 0 0 2 &mpic 33 1
 219                                 a800 0 0 3 &mpic 34 1
 220                                 a800 0 0 4 &mpic 31 1>;
 221                         interrupt-parent = <&mpic>;
 222                         interrupts = <08 2>;
 223                         bus-range = <0 0>;
 224                         ranges = <02000000 0 80000000 80000000 0 20000000
 225                                   01000000 0 00000000 e2000000 0 00100000>;
 226                         clock-frequency = <3f940aa>;
 227                         #interrupt-cells = <1>;
 228                         #size-cells = <2>;
 229                         #address-cells = <3>;
 230                         reg = <8000 1000>;
 231                         compatible = "85xx";
 232                         device_type = "pci";
 233                 };
 234
 235                 mpic: pic@40000 {
 236                         clock-frequency = <0>;
 237                         interrupt-controller;
 238                         #address-cells = <0>;
 239                         #interrupt-cells = <2>;
 240                         reg = <40000 40000>;
 241                         built-in;
 242                         compatible = "chrp,open-pic";
 243                         device_type = "open-pic";
 244                         big-endian;
 245                 };
 246         };
 247 };