arch/powerpc/boot/dts/mpc8379_rdb.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * MPC8379E RDB Device Tree Source
   4  *
   5  * Copyright 2007, 2008 Freescale Semiconductor Inc.
   6  */
   7
   8 /dts-v1/;
   9
  10 / {
  11         compatible = "fsl,mpc8379rdb";
  12         #address-cells = <1>;
  13         #size-cells = <1>;
  14
  15         aliases {
  16                 ethernet0 = &enet0;
  17                 ethernet1 = &enet1;
  18                 serial0 = &serial0;
  19                 serial1 = &serial1;
  20                 pci0 = &pci0;
  21         };
  22
  23         cpus {
  24                 #address-cells = <1>;
  25                 #size-cells = <0>;
  26
  27                 PowerPC,8379@0 {
  28                         device_type = "cpu";
  29                         reg = <0x0>;
  30                         d-cache-line-size = <32>;
  31                         i-cache-line-size = <32>;
  32                         d-cache-size = <32768>;
  33                         i-cache-size = <32768>;
  34                         timebase-frequency = <0>;
  35                         bus-frequency = <0>;
  36                         clock-frequency = <0>;
  37                 };
  38         };
  39
  40         memory {
  41                 device_type = "memory";
  42                 reg = <0x00000000 0x10000000>;  // 256MB at 0
  43         };
  44
  45         localbus@e0005000 {
  46                 #address-cells = <2>;
  47                 #size-cells = <1>;
  48                 compatible = "fsl,mpc8379-elbc", "fsl,elbc", "simple-bus";
  49                 reg = <0xe0005000 0x1000>;
  50                 interrupts = <77 0x8>;
  51                 interrupt-parent = <&ipic>;
  52
  53                 // CS0 and CS1 are swapped when
  54                 // booting from nand, but the
  55                 // addresses are the same.
  56                 ranges = <0x0 0x0 0xfe000000 0x00800000
  57                           0x1 0x0 0xe0600000 0x00008000
  58                           0x2 0x0 0xf0000000 0x00020000
  59                           0x3 0x0 0xfa000000 0x00008000>;
  60
  61                 flash@0,0 {
  62                         #address-cells = <1>;
  63                         #size-cells = <1>;
  64                         compatible = "cfi-flash";
  65                         reg = <0x0 0x0 0x800000>;
  66                         bank-width = <2>;
  67                         device-width = <1>;
  68                 };
  69
  70                 nand@1,0 {
  71                         #address-cells = <1>;
  72                         #size-cells = <1>;
  73                         compatible = "fsl,mpc8379-fcm-nand",
  74                                      "fsl,elbc-fcm-nand";
  75                         reg = <0x1 0x0 0x8000>;
  76
  77                         u-boot@0 {
  78                                 reg = <0x0 0x100000>;
  79                                 read-only;
  80                         };
  81
  82                         kernel@100000 {
  83                                 reg = <0x100000 0x300000>;
  84                         };
  85                         fs@400000 {
  86                                 reg = <0x400000 0x1c00000>;
  87                         };
  88                 };
  89         };
  90
  91         immr@e0000000 {
  92                 #address-cells = <1>;
  93                 #size-cells = <1>;
  94                 device_type = "soc";
  95                 compatible = "simple-bus";
  96                 ranges = <0x0 0xe0000000 0x00100000>;
  97                 reg = <0xe0000000 0x00000200>;
  98                 bus-frequency = <0>;
  99
 100                 wdt@200 {
 101                         device_type = "watchdog";
 102                         compatible = "mpc83xx_wdt";
 103                         reg = <0x200 0x100>;
 104                 };
 105
 106                 gpio1: gpio-controller@c00 {
 107                         #gpio-cells = <2>;
 108                         compatible = "fsl,mpc8379-gpio", "fsl,mpc8349-gpio";
 109                         reg = <0xc00 0x100>;
 110                         interrupts = <74 0x8>;
 111                         interrupt-parent = <&ipic>;
 112                         gpio-controller;
 113                 };
 114
 115                 gpio2: gpio-controller@d00 {
 116                         #gpio-cells = <2>;
 117                         compatible = "fsl,mpc8379-gpio", "fsl,mpc8349-gpio";
 118                         reg = <0xd00 0x100>;
 119                         interrupts = <75 0x8>;
 120                         interrupt-parent = <&ipic>;
 121                         gpio-controller;
 122                 };
 123
 124                 sleep-nexus {
 125                         #address-cells = <1>;
 126                         #size-cells = <1>;
 127                         compatible = "simple-bus";
 128                         sleep = <&pmc 0x0c000000>;
 129                         ranges;
 130
 131                         i2c@3000 {
 132                                 #address-cells = <1>;
 133                                 #size-cells = <0>;
 134                                 cell-index = <0>;
 135                                 compatible = "fsl-i2c";
 136                                 reg = <0x3000 0x100>;
 137                                 interrupts = <14 0x8>;
 138                                 interrupt-parent = <&ipic>;
 139                                 dfsrr;
 140
 141                                 dtt@48 {
 142                                         compatible = "national,lm75";
 143                                         reg = <0x48>;
 144                                 };
 145
 146                                 at24@50 {
 147                                         compatible = "atmel,24c256";
 148                                         reg = <0x50>;
 149                                 };
 150
 151                                 rtc@68 {
 152                                         compatible = "dallas,ds1339";
 153                                         reg = <0x68>;
 154                                 };
 155
 156                                 mcu_pio: mcu@a {
 157                                         #gpio-cells = <2>;
 158                                         compatible = "fsl,mc9s08qg8-mpc8379erdb",
 159                                                      "fsl,mcu-mpc8349emitx";
 160                                         reg = <0x0a>;
 161                                         gpio-controller;
 162                                 };
 163                         };
 164
 165                         sdhci@2e000 {
 166                                 compatible = "fsl,mpc8379-esdhc", "fsl,esdhc";
 167                                 reg = <0x2e000 0x1000>;
 168                                 interrupts = <42 0x8>;
 169                                 interrupt-parent = <&ipic>;
 170                                 sdhci,wp-inverted;
 171                                 /* Filled in by U-Boot */
 172                                 clock-frequency = <111111111>;
 173                         };
 174                 };
 175
 176                 i2c@3100 {
 177                         #address-cells = <1>;
 178                         #size-cells = <0>;
 179                         cell-index = <1>;
 180                         compatible = "fsl-i2c";
 181                         reg = <0x3100 0x100>;
 182                         interrupts = <15 0x8>;
 183                         interrupt-parent = <&ipic>;
 184                         dfsrr;
 185                 };
 186
 187                 spi@7000 {
 188                         cell-index = <0>;
 189                         compatible = "fsl,spi";
 190                         reg = <0x7000 0x1000>;
 191                         interrupts = <16 0x8>;
 192                         interrupt-parent = <&ipic>;
 193                         mode = "cpu";
 194                 };
 195
 196                 dma@82a8 {
 197                         #address-cells = <1>;
 198                         #size-cells = <1>;
 199                         compatible = "fsl,mpc8379-dma", "fsl,elo-dma";
 200                         reg = <0x82a8 4>;
 201                         ranges = <0 0x8100 0x1a8>;
 202                         interrupt-parent = <&ipic>;
 203                         interrupts = <71 8>;
 204                         cell-index = <0>;
 205                         dma-channel@0 {
 206                                 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
 207                                 reg = <0 0x80>;
 208                                 cell-index = <0>;
 209                                 interrupt-parent = <&ipic>;
 210                                 interrupts = <71 8>;
 211                         };
 212                         dma-channel@80 {
 213                                 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
 214                                 reg = <0x80 0x80>;
 215                                 cell-index = <1>;
 216                                 interrupt-parent = <&ipic>;
 217                                 interrupts = <71 8>;
 218                         };
 219                         dma-channel@100 {
 220                                 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
 221                                 reg = <0x100 0x80>;
 222                                 cell-index = <2>;
 223                                 interrupt-parent = <&ipic>;
 224                                 interrupts = <71 8>;
 225                         };
 226                         dma-channel@180 {
 227                                 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
 228                                 reg = <0x180 0x28>;
 229                                 cell-index = <3>;
 230                                 interrupt-parent = <&ipic>;
 231                                 interrupts = <71 8>;
 232                         };
 233                 };
 234
 235                 usb@23000 {
 236                         compatible = "fsl-usb2-dr";
 237                         reg = <0x23000 0x1000>;
 238                         #address-cells = <1>;
 239                         #size-cells = <0>;
 240                         interrupt-parent = <&ipic>;
 241                         interrupts = <38 0x8>;
 242                         phy_type = "ulpi";
 243                         sleep = <&pmc 0x00c00000>;
 244                 };
 245
 246                 enet0: ethernet@24000 {
 247                         #address-cells = <1>;
 248                         #size-cells = <1>;
 249                         cell-index = <0>;
 250                         device_type = "network";
 251                         model = "eTSEC";
 252                         compatible = "gianfar";
 253                         reg = <0x24000 0x1000>;
 254                         ranges = <0x0 0x24000 0x1000>;
 255                         local-mac-address = [ 00 00 00 00 00 00 ];
 256                         interrupts = <32 0x8 33 0x8 34 0x8>;
 257                         phy-connection-type = "mii";
 258                         interrupt-parent = <&ipic>;
 259                         tbi-handle = <&tbi0>;
 260                         phy-handle = <&phy2>;
 261                         sleep = <&pmc 0xc0000000>;
 262                         fsl,magic-packet;
 263
 264                         mdio@520 {
 265                                 #address-cells = <1>;
 266                                 #size-cells = <0>;
 267                                 compatible = "fsl,gianfar-mdio";
 268                                 reg = <0x520 0x20>;
 269
 270                                 phy2: ethernet-phy@2 {
 271                                         interrupt-parent = <&ipic>;
 272                                         interrupts = <17 0x8>;
 273                                         reg = <0x2>;
 274                                 };
 275
 276                                 tbi0: tbi-phy@11 {
 277                                         reg = <0x11>;
 278                                         device_type = "tbi-phy";
 279                                 };
 280                         };
 281                 };
 282
 283                 enet1: ethernet@25000 {
 284                         #address-cells = <1>;
 285                         #size-cells = <1>;
 286                         cell-index = <1>;
 287                         device_type = "network";
 288                         model = "eTSEC";
 289                         compatible = "gianfar";
 290                         reg = <0x25000 0x1000>;
 291                         ranges = <0x0 0x25000 0x1000>;
 292                         local-mac-address = [ 00 00 00 00 00 00 ];
 293                         interrupts = <35 0x8 36 0x8 37 0x8>;
 294                         phy-connection-type = "mii";
 295                         interrupt-parent = <&ipic>;
 296                         fixed-link = <1 1 1000 0 0>;
 297                         tbi-handle = <&tbi1>;
 298                         sleep = <&pmc 0x30000000>;
 299                         fsl,magic-packet;
 300
 301                         mdio@520 {
 302                                 #address-cells = <1>;
 303                                 #size-cells = <0>;
 304                                 compatible = "fsl,gianfar-tbi";
 305                                 reg = <0x520 0x20>;
 306
 307                                 tbi1: tbi-phy@11 {
 308                                         reg = <0x11>;
 309                                         device_type = "tbi-phy";
 310                                 };
 311                         };
 312                 };
 313
 314                 serial0: serial@4500 {
 315                         cell-index = <0>;
 316                         device_type = "serial";
 317                         compatible = "fsl,ns16550", "ns16550";
 318                         reg = <0x4500 0x100>;
 319                         clock-frequency = <0>;
 320                         interrupts = <9 0x8>;
 321                         interrupt-parent = <&ipic>;
 322                 };
 323
 324                 serial1: serial@4600 {
 325                         cell-index = <1>;
 326                         device_type = "serial";
 327                         compatible = "fsl,ns16550", "ns16550";
 328                         reg = <0x4600 0x100>;
 329                         clock-frequency = <0>;
 330                         interrupts = <10 0x8>;
 331                         interrupt-parent = <&ipic>;
 332                 };
 333
 334                 crypto@30000 {
 335                         compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
 336                                      "fsl,sec2.1", "fsl,sec2.0";
 337                         reg = <0x30000 0x10000>;
 338                         interrupts = <11 0x8>;
 339                         interrupt-parent = <&ipic>;
 340                         fsl,num-channels = <4>;
 341                         fsl,channel-fifo-len = <24>;
 342                         fsl,exec-units-mask = <0x9fe>;
 343                         fsl,descriptor-types-mask = <0x3ab0ebf>;
 344                         sleep = <&pmc 0x03000000>;
 345                 };
 346
 347                 sata@18000 {
 348                         compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
 349                         reg = <0x18000 0x1000>;
 350                         interrupts = <44 0x8>;
 351                         interrupt-parent = <&ipic>;
 352                         sleep = <&pmc 0x000000c0>;
 353                 };
 354
 355                 sata@19000 {
 356                         compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
 357                         reg = <0x19000 0x1000>;
 358                         interrupts = <45 0x8>;
 359                         interrupt-parent = <&ipic>;
 360                         sleep = <&pmc 0x00000030>;
 361                 };
 362
 363                 sata@1a000 {
 364                         compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
 365                         reg = <0x1a000 0x1000>;
 366                         interrupts = <46 0x8>;
 367                         interrupt-parent = <&ipic>;
 368                         sleep = <&pmc 0x0000000c>;
 369                 };
 370
 371                 sata@1b000 {
 372                         compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
 373                         reg = <0x1b000 0x1000>;
 374                         interrupts = <47 0x8>;
 375                         interrupt-parent = <&ipic>;
 376                         sleep = <&pmc 0x00000003>;
 377                 };
 378
 379                 /* IPIC
 380                  * interrupts cell = <intr #, sense>
 381                  * sense values match linux IORESOURCE_IRQ_* defines:
 382                  * sense == 8: Level, low assertion
 383                  * sense == 2: Edge, high-to-low change
 384                  */
 385                 ipic: interrupt-controller@700 {
 386                         compatible = "fsl,ipic";
 387                         interrupt-controller;
 388                         #address-cells = <0>;
 389                         #interrupt-cells = <2>;
 390                         reg = <0x700 0x100>;
 391                 };
 392
 393                 pmc: power@b00 {
 394                         compatible = "fsl,mpc8379-pmc", "fsl,mpc8349-pmc";
 395                         reg = <0xb00 0x100 0xa00 0x100>;
 396                         interrupts = <80 0x8>;
 397                         interrupt-parent = <&ipic>;
 398                 };
 399         };
 400
 401         pci0: pci@e0008500 {
 402                 interrupt-map-mask = <0xf800 0 0 7>;
 403                 interrupt-map = <
 404                                 /* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */
 405
 406                                 /* IDSEL AD14 IRQ6 inta */
 407                                  0x7000 0x0 0x0 0x1 &ipic 22 0x8
 408
 409                                 /* IDSEL AD15 IRQ5 inta, IRQ6 intb, IRQ7 intd */
 410                                  0x7800 0x0 0x0 0x1 &ipic 21 0x8
 411                                  0x7800 0x0 0x0 0x2 &ipic 22 0x8
 412                                  0x7800 0x0 0x0 0x4 &ipic 23 0x8
 413
 414                                 /* IDSEL AD28 IRQ7 inta, IRQ5 intb IRQ6 intc*/
 415                                  0xE000 0x0 0x0 0x1 &ipic 23 0x8
 416                                  0xE000 0x0 0x0 0x2 &ipic 21 0x8
 417                                  0xE000 0x0 0x0 0x3 &ipic 22 0x8>;
 418                 interrupt-parent = <&ipic>;
 419                 interrupts = <66 0x8>;
 420                 bus-range = <0x0 0x0>;
 421                 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
 422                           0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
 423                           0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
 424                 sleep = <&pmc 0x00010000>;
 425                 clock-frequency = <66666666>;
 426                 #interrupt-cells = <1>;
 427                 #size-cells = <2>;
 428                 #address-cells = <3>;
 429                 reg = <0xe0008500 0x100         /* internal registers */
 430                        0xe0008300 0x8>;         /* config space access registers */
 431                 compatible = "fsl,mpc8349-pci";
 432                 device_type = "pci";
 433         };
 434
 435         leds {
 436                 compatible = "gpio-leds";
 437
 438                 pwr {
 439                         gpios = <&mcu_pio 0 0>;
 440                         default-state = "on";
 441                 };
 442
 443                 hdd {
 444                         gpios = <&mcu_pio 1 0>;
 445                         linux,default-trigger = "disk-activity";
 446                 };
 447         };
 448 };